2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
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25 *************************************************************************
31 Miniport generic portion header file
35 -------- ---------- ----------------------------------------------
37 #include "../rt_config.h"
39 UCHAR BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
40 char* CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
43 // BBP register initialization set
45 REG_PAIR BBPRegTable[] = {
46 {BBP_R65, 0x2C}, // fix rssi issue
47 {BBP_R66, 0x38}, // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
49 {BBP_R70, 0xa}, // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
54 {BBP_R84, 0x99}, // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
55 {BBP_R86, 0x00}, // middle range issue, Rory @2008-01-28
56 {BBP_R91, 0x04}, // middle range issue, Rory @2008-01-28
57 {BBP_R92, 0x00}, // middle range issue, Rory @2008-01-28
58 {BBP_R103, 0x00}, // near range high-power issue, requested from Gary @2008-0528
59 {BBP_R105, 0x05}, // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
60 {BBP_R106, 0x35}, // for ShortGI throughput
62 #define NUM_BBP_REG_PARMS (sizeof(BBPRegTable) / sizeof(REG_PAIR))
66 // ASIC register initialization sets
69 RTMP_REG_PAIR MACRegTable[] = {
70 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
71 {BCN_OFFSET0, 0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
72 {BCN_OFFSET1, 0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
73 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
74 {BCN_OFFSET0, 0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
75 {BCN_OFFSET1, 0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
77 #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
78 #endif // HW_BEACON_OFFSET //
80 {LEGACY_BASIC_RATE, 0x0000013f}, // Basic rate set bitmap
81 {HT_BASIC_RATE, 0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
82 {MAC_SYS_CTRL, 0x00}, // 0x1004, , default Disable RX
83 {RX_FILTR_CFG, 0x17f97}, //0x1400 , RX filter control,
84 {BKOFF_SLOT_CFG, 0x209}, // default set short slot time, CC_DELAY_TIME should be 2
85 //{TX_SW_CFG0, 0x40a06}, // Gary,2006-08-23
86 {TX_SW_CFG0, 0x0}, // Gary,2008-05-21 for CWC test
87 {TX_SW_CFG1, 0x80606}, // Gary,2006-08-23
88 {TX_LINK_CFG, 0x1020}, // Gary,2006-08-23
89 //{TX_TIMEOUT_CFG, 0x00182090}, // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT
90 {TX_TIMEOUT_CFG, 0x000a2090}, // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
91 {MAX_LEN_CFG, MAX_AGGREGATION_SIZE | 0x00001000}, // 0x3018, MAX frame length. Max PSDU = 16kbytes.
92 {LED_CFG, 0x7f031e46}, // Gary, 2006-08-23
94 {PBF_MAX_PCNT, 0x1F3FBF9F}, //0x1F3f7f9f}, //Jan, 2006/04/20
96 {TX_RTY_CFG, 0x47d01f0f}, // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
98 {AUTO_RSP_CFG, 0x00000013}, // Initial Auto_Responder, because QA will turn off Auto-Responder
99 {CCK_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
100 {OFDM_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
102 {PBF_CFG, 0xf40006}, // Only enable Queue 2
103 {MM40_PROT_CFG, 0x3F44084}, // Initial Auto_Responder, because QA will turn off Auto-Responder
104 {WPDMA_GLO_CFG, 0x00000030},
105 #endif // RTMP_MAC_USB //
106 {GF20_PROT_CFG, 0x01744004}, // set 19:18 --> Short NAV for MIMO PS
107 {GF40_PROT_CFG, 0x03F44084},
108 {MM20_PROT_CFG, 0x01744004},
110 {MM40_PROT_CFG, 0x03F54084},
111 #endif // RTMP_MAC_PCI //
112 {TXOP_CTRL_CFG, 0x0000583f, /*0x0000243f*/ /*0x000024bf*/}, //Extension channel backoff.
113 {TX_RTS_CFG, 0x00092b20},
114 {EXP_ACK_TIME, 0x002400ca}, // default value
116 {TXOP_HLDR_ET, 0x00000002},
118 /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
119 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
120 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
121 will always lost. So we change the SIFS of CCK from 10us to 16us. */
122 {XIFS_TIME_CFG, 0x33a41010},
123 {PWR_PIN_CFG, 0x00000003}, // patch for 2880-E
126 RTMP_REG_PAIR STAMACRegTable[] = {
127 {WMM_AIFSN_CFG, 0x00002273},
128 {WMM_CWMIN_CFG, 0x00002344},
129 {WMM_CWMAX_CFG, 0x000034aa},
132 #define NUM_MAC_REG_PARMS (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
133 #define NUM_STA_MAC_REG_PARMS (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
137 ========================================================================
140 Allocate RTMP_ADAPTER data block and do some initialization
143 Adapter Pointer to our adapter
153 ========================================================================
155 NDIS_STATUS RTMPAllocAdapterBlock(
157 OUT PRTMP_ADAPTER *ppAdapter)
162 UCHAR *pBeaconBuf = NULL;
164 DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
170 // Allocate RTMP_ADAPTER memory block
171 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
172 if (pBeaconBuf == NULL)
174 Status = NDIS_STATUS_FAILURE;
175 DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
178 NdisZeroMemory(pBeaconBuf, MAX_BEACON_SIZE);
180 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
181 if (Status != NDIS_STATUS_SUCCESS)
183 DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
186 pAd->BeaconBuf = pBeaconBuf;
187 DBGPRINT(RT_DEBUG_OFF, ("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER)));
191 NdisAllocateSpinLock(&pAd->MgmtRingLock);
193 NdisAllocateSpinLock(&pAd->RxRingLock);
194 #endif // RTMP_MAC_PCI //
196 for (index =0 ; index < NUM_OF_TX_RING; index++)
198 NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
199 NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
200 pAd->DeQueueRunning[index] = FALSE;
203 NdisAllocateSpinLock(&pAd->irq_lock);
207 if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
212 DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
217 ========================================================================
220 Read initial Tx power per MCS and BW from EEPROM
223 Adapter Pointer to our adapter
232 ========================================================================
234 VOID RTMPReadTxPwrPerRate(
235 IN PRTMP_ADAPTER pAd)
237 ULONG data, Adata, Gdata;
238 USHORT i, value, value2;
239 INT Apwrdelta, Gpwrdelta;
241 BOOLEAN bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
244 // Get power delta for 20MHz and 40MHz.
246 DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
247 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
251 if ((value2 & 0xff) != 0xff)
254 Gpwrdelta = (value2&0xf);
257 bGpwrdeltaMinus = FALSE;
259 bGpwrdeltaMinus = TRUE;
261 if ((value2 & 0xff00) != 0xff00)
263 if ((value2 & 0x8000))
264 Apwrdelta = ((value2&0xf00)>>8);
266 if ((value2 & 0x4000))
267 bApwrdeltaMinus = FALSE;
269 bApwrdeltaMinus = TRUE;
271 DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
274 // Get Txpower per MCS for 20MHz in 2.4G.
278 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
280 if (bApwrdeltaMinus == FALSE)
282 t1 = (value&0xf)+(Apwrdelta);
285 t2 = ((value&0xf0)>>4)+(Apwrdelta);
288 t3 = ((value&0xf00)>>8)+(Apwrdelta);
291 t4 = ((value&0xf000)>>12)+(Apwrdelta);
297 if ((value&0xf) > Apwrdelta)
298 t1 = (value&0xf)-(Apwrdelta);
301 if (((value&0xf0)>>4) > Apwrdelta)
302 t2 = ((value&0xf0)>>4)-(Apwrdelta);
305 if (((value&0xf00)>>8) > Apwrdelta)
306 t3 = ((value&0xf00)>>8)-(Apwrdelta);
309 if (((value&0xf000)>>12) > Apwrdelta)
310 t4 = ((value&0xf000)>>12)-(Apwrdelta);
314 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
315 if (bGpwrdeltaMinus == FALSE)
317 t1 = (value&0xf)+(Gpwrdelta);
320 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
323 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
326 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
332 if ((value&0xf) > Gpwrdelta)
333 t1 = (value&0xf)-(Gpwrdelta);
336 if (((value&0xf0)>>4) > Gpwrdelta)
337 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
340 if (((value&0xf00)>>8) > Gpwrdelta)
341 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
344 if (((value&0xf000)>>12) > Gpwrdelta)
345 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
349 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
351 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
352 if (bApwrdeltaMinus == FALSE)
354 t1 = (value&0xf)+(Apwrdelta);
357 t2 = ((value&0xf0)>>4)+(Apwrdelta);
360 t3 = ((value&0xf00)>>8)+(Apwrdelta);
363 t4 = ((value&0xf000)>>12)+(Apwrdelta);
369 if ((value&0xf) > Apwrdelta)
370 t1 = (value&0xf)-(Apwrdelta);
373 if (((value&0xf0)>>4) > Apwrdelta)
374 t2 = ((value&0xf0)>>4)-(Apwrdelta);
377 if (((value&0xf00)>>8) > Apwrdelta)
378 t3 = ((value&0xf00)>>8)-(Apwrdelta);
381 if (((value&0xf000)>>12) > Apwrdelta)
382 t4 = ((value&0xf000)>>12)-(Apwrdelta);
386 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
387 if (bGpwrdeltaMinus == FALSE)
389 t1 = (value&0xf)+(Gpwrdelta);
392 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
395 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
398 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
404 if ((value&0xf) > Gpwrdelta)
405 t1 = (value&0xf)-(Gpwrdelta);
408 if (((value&0xf0)>>4) > Gpwrdelta)
409 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
412 if (((value&0xf00)>>8) > Gpwrdelta)
413 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
416 if (((value&0xf000)>>12) > Gpwrdelta)
417 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
421 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
424 /* For 20M/40M Power Delta issue */
425 pAd->Tx20MPwrCfgABand[i] = data;
426 pAd->Tx20MPwrCfgGBand[i] = data;
427 pAd->Tx40MPwrCfgABand[i] = Adata;
428 pAd->Tx40MPwrCfgGBand[i] = Gdata;
430 if (data != 0xffffffff)
431 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
432 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx, Adata = %lx, Gdata = %lx \n", data, Adata, Gdata));
438 ========================================================================
441 Read initial channel power parameters from EEPROM
444 Adapter Pointer to our adapter
453 ========================================================================
455 VOID RTMPReadChannelPwr(
456 IN PRTMP_ADAPTER pAd)
459 EEPROM_TX_PWR_STRUC Power;
460 EEPROM_TX_PWR_STRUC Power2;
462 // Read Tx power value for all channels
463 // Value from 1 - 0x7f. Default value is 24.
464 // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
465 // : 5.5G 0xF9 (-7) ~ 0x0F (15)
467 // 0. 11b/g, ch1 - ch 14
468 for (i = 0; i < 7; i++)
470 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
471 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
472 pAd->TxPower[i * 2].Channel = i * 2 + 1;
473 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
475 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
476 pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
478 pAd->TxPower[i * 2].Power = Power.field.Byte0;
480 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
481 pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
483 pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
485 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
486 pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
488 pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
490 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
491 pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
493 pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
496 // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
497 // 1.1 Fill up channel
499 for (i = 0; i < 4; i++)
501 pAd->TxPower[3 * i + choffset + 0].Channel = 36 + i * 8 + 0;
502 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
503 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
505 pAd->TxPower[3 * i + choffset + 1].Channel = 36 + i * 8 + 2;
506 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
507 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
509 pAd->TxPower[3 * i + choffset + 2].Channel = 36 + i * 8 + 4;
510 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
511 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
515 for (i = 0; i < 6; i++)
517 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
518 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
520 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
521 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
523 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
524 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
526 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
527 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
529 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
530 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
533 // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
534 // 2.1 Fill up channel
536 for (i = 0; i < 5; i++)
538 pAd->TxPower[3 * i + choffset + 0].Channel = 100 + i * 8 + 0;
539 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
540 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
542 pAd->TxPower[3 * i + choffset + 1].Channel = 100 + i * 8 + 2;
543 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
544 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
546 pAd->TxPower[3 * i + choffset + 2].Channel = 100 + i * 8 + 4;
547 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
548 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
550 pAd->TxPower[3 * 5 + choffset + 0].Channel = 140;
551 pAd->TxPower[3 * 5 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
552 pAd->TxPower[3 * 5 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
555 for (i = 0; i < 8; i++)
557 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
558 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
560 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
561 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
563 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
564 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
566 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
567 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
569 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
570 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
573 // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165, 167, 169; 171, 173 (including central frequency in BW 40MHz)
574 // 3.1 Fill up channel
575 choffset = 14 + 12 + 16;
576 /*for (i = 0; i < 2; i++)*/
577 for (i = 0; i < 3; i++)
579 pAd->TxPower[3 * i + choffset + 0].Channel = 149 + i * 8 + 0;
580 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
581 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
583 pAd->TxPower[3 * i + choffset + 1].Channel = 149 + i * 8 + 2;
584 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
585 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
587 pAd->TxPower[3 * i + choffset + 2].Channel = 149 + i * 8 + 4;
588 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
589 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
591 pAd->TxPower[3 * 3 + choffset + 0].Channel = 171;
592 pAd->TxPower[3 * 3 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
593 pAd->TxPower[3 * 3 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
595 pAd->TxPower[3 * 3 + choffset + 1].Channel = 173;
596 pAd->TxPower[3 * 3 + choffset + 1].Power = DEFAULT_RF_TX_POWER;
597 pAd->TxPower[3 * 3 + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
600 /*for (i = 0; i < 4; i++)*/
601 for (i = 0; i < 6; i++)
603 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
604 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
606 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
607 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
609 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
610 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
612 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
613 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
615 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
616 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
619 // 4. Print and Debug
620 /*choffset = 14 + 12 + 16 + 7;*/
621 choffset = 14 + 12 + 16 + 11;
627 ========================================================================
630 Read the following from the registry
631 1. All the parameters
635 Adapter Pointer to our adapter
636 WrapperConfigurationContext For use by NdisOpenConfiguration
641 NDIS_STATUS_RESOURCES
647 ========================================================================
649 NDIS_STATUS NICReadRegParameters(
650 IN PRTMP_ADAPTER pAd,
651 IN NDIS_HANDLE WrapperConfigurationContext
654 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
655 DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
661 ========================================================================
664 Read initial parameters from EEPROM
667 Adapter Pointer to our adapter
676 ========================================================================
678 VOID NICReadEEPROMParameters(
679 IN PRTMP_ADAPTER pAd,
683 USHORT i, value, value2;
685 EEPROM_TX_PWR_STRUC Power;
686 EEPROM_VERSION_STRUC Version;
687 EEPROM_ANTENNA_STRUC Antenna;
688 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
690 DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
692 if (pAd->chipOps.eeinit)
693 pAd->chipOps.eeinit(pAd);
694 #ifdef RTMP_EFUSE_SUPPORT
696 if(!pAd->bFroceEEPROMBuffer && pAd->bEEPROMFile)
698 DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters::(Efuse)Load to EEPROM Buffer Mode\n"));
699 eFuseLoadEEPROM(pAd);
702 #endif // RTMP_EFUSE_SUPPORT //
704 // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
705 RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
706 DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
708 if((data & 0x30) == 0)
709 pAd->EEPROMAddressNum = 6; // 93C46
710 else if((data & 0x30) == 0x10)
711 pAd->EEPROMAddressNum = 8; // 93C66
713 pAd->EEPROMAddressNum = 8; // 93C86
714 DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
716 // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
717 // MAC address registers according to E2PROM setting
718 if (mac_addr == NULL ||
719 strlen((PSTRING) mac_addr) != 17 ||
720 mac_addr[2] != ':' || mac_addr[5] != ':' || mac_addr[8] != ':' ||
721 mac_addr[11] != ':' || mac_addr[14] != ':')
723 USHORT Addr01,Addr23,Addr45 ;
725 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
726 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
727 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
729 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
730 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
731 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
732 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
733 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
734 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
736 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
743 macptr = (PSTRING) mac_addr;
745 for (j=0; j<MAC_ADDR_LEN; j++)
747 AtoH(macptr, &pAd->PermanentAddress[j], 1);
751 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
756 //more conveninet to test mbssid, so ap's bssid &0xf1
757 if (pAd->PermanentAddress[0] == 0xff)
758 pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
760 //if (pAd->PermanentAddress[5] == 0xff)
761 // pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
763 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
764 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
765 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
766 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
767 if (pAd->bLocalAdminMAC == FALSE)
771 COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
772 csr2.field.Byte0 = pAd->CurrentAddress[0];
773 csr2.field.Byte1 = pAd->CurrentAddress[1];
774 csr2.field.Byte2 = pAd->CurrentAddress[2];
775 csr2.field.Byte3 = pAd->CurrentAddress[3];
776 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
778 csr3.field.Byte4 = pAd->CurrentAddress[4];
779 csr3.field.Byte5 = pAd->CurrentAddress[5];
780 csr3.field.U2MeMask = 0xff;
781 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
782 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
783 PRINT_MAC(pAd->PermanentAddress)));
787 // if not return early. cause fail at emulation.
788 // Init the channel number for TX channel power
789 RTMPReadChannelPwr(pAd);
791 // if E2PROM version mismatch with driver's expectation, then skip
792 // all subsequent E2RPOM retieval and set a system error bit to notify GUI
793 RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
794 pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
795 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
797 if (Version.field.Version > VALID_EEPROM_VERSION)
799 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
800 /*pAd->SystemErrorBitmap |= 0x00000001;
802 // hard-code default value when no proper E2PROM installed
803 pAd->bAutoTxAgcA = FALSE;
804 pAd->bAutoTxAgcG = FALSE;
806 // Default the channel power
807 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
808 pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
810 // Default the channel power
811 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
812 pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
814 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
815 pAd->EEPROMDefaultValue[i] = 0xffff;
819 // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
820 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
821 pAd->EEPROMDefaultValue[0] = value;
823 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
824 pAd->EEPROMDefaultValue[1] = value;
826 RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
827 pAd->EEPROMDefaultValue[2] = value;
829 for(i = 0; i < 8; i++)
831 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
832 pAd->EEPROMDefaultValue[i+3] = value;
835 // We have to parse NIC configuration 0 at here.
836 // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
837 // Therefore, we have to read TxAutoAgc control beforehand.
838 // Read Tx AGC control bit
839 Antenna.word = pAd->EEPROMDefaultValue[0];
840 if (Antenna.word == 0xFFFF)
843 if(IS_RT3090(pAd)|| IS_RT3390(pAd))
846 Antenna.field.RfIcType = RFIC_3020;
847 Antenna.field.TxPath = 1;
848 Antenna.field.RxPath = 1;
855 Antenna.field.RfIcType = RFIC_2820;
856 Antenna.field.TxPath = 1;
857 Antenna.field.RxPath = 2;
858 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
862 // Choose the desired Tx&Rx stream.
863 if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
864 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
866 if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
868 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
870 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
871 (pAd->CommonCfg.RxStream > 2))
873 // only 2 Rx streams for RT2860 series
874 pAd->CommonCfg.RxStream = 2;
879 // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
885 NicConfig2.word = pAd->EEPROMDefaultValue[1];
888 if ((NicConfig2.word & 0x00ff) == 0xff)
890 NicConfig2.word &= 0xff00;
893 if ((NicConfig2.word >> 8) == 0xff)
895 NicConfig2.word &= 0x00ff;
899 if (NicConfig2.field.DynamicTxAgcControl == 1)
900 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
902 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
904 DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
906 // Save the antenna for future use
907 pAd->Antenna.word = Antenna.word;
909 // Set the RfICType here, then we can initialize RFIC related operation callbacks
910 pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
911 pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
913 #ifdef RTMP_RF_RW_SUPPORT
914 RtmpChipOpsRFHook(pAd);
915 #endif // RTMP_RF_RW_SUPPORT //
918 sprintf((PSTRING) pAd->nickname, "RT2860STA");
919 #endif // RTMP_MAC_PCI //
923 // Reset PhyMode if we don't support 802.11a
924 // Only RFIC_2850 & RFIC_2750 support 802.11a
926 if ((Antenna.field.RfIcType != RFIC_2850)
927 && (Antenna.field.RfIcType != RFIC_2750)
928 && (Antenna.field.RfIcType != RFIC_3052))
930 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
931 (pAd->CommonCfg.PhyMode == PHY_11A))
932 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
933 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED) ||
934 (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED) ||
935 (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED) ||
936 (pAd->CommonCfg.PhyMode == PHY_11N_5G))
937 pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
940 // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
943 /* these are tempature reference value (0x00 ~ 0xFE)
944 ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
945 TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
946 TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
947 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
948 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
949 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
950 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
951 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
952 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
953 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
954 pAd->TssiRefG = Power.field.Byte0; /* reference value [0] */
955 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
956 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
957 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
958 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
959 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
960 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
961 pAd->TxAgcStepG = Power.field.Byte1;
962 pAd->TxAgcCompensateG = 0;
963 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
964 pAd->TssiPlusBoundaryG[0] = pAd->TssiRefG;
966 // Disable TxAgc if the based value is not right
967 if (pAd->TssiRefG == 0xff)
968 pAd->bAutoTxAgcG = FALSE;
970 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
971 pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
973 pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
974 pAd->TxAgcStepG, pAd->bAutoTxAgcG));
978 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
979 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
980 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
981 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
982 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
983 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
984 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
985 pAd->TssiRefA = Power.field.Byte0;
986 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
987 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
988 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
989 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
990 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
991 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
992 pAd->TxAgcStepA = Power.field.Byte1;
993 pAd->TxAgcCompensateA = 0;
994 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
995 pAd->TssiPlusBoundaryA[0] = pAd->TssiRefA;
997 // Disable TxAgc if the based value is not right
998 if (pAd->TssiRefA == 0xff)
999 pAd->bAutoTxAgcA = FALSE;
1001 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1002 pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1004 pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1005 pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1007 pAd->BbpRssiToDbmDelta = 0x0;
1009 // Read frequency offset setting for RF
1010 RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1011 if ((value & 0x00FF) != 0x00FF)
1012 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1014 pAd->RfFreqOffset = 0;
1015 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1017 //CountryRegion byte offset (38h)
1018 value = pAd->EEPROMDefaultValue[2] >> 8; // 2.4G band
1019 value2 = pAd->EEPROMDefaultValue[2] & 0x00FF; // 5G band
1021 if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1023 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1024 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1025 TmpPhy = pAd->CommonCfg.PhyMode;
1026 pAd->CommonCfg.PhyMode = 0xff;
1027 RTMPSetPhyMode(pAd, TmpPhy);
1032 // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1033 // The valid value are (-10 ~ 10)
1035 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1036 pAd->BGRssiOffset0 = value & 0x00ff;
1037 pAd->BGRssiOffset1 = (value >> 8);
1038 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1039 pAd->BGRssiOffset2 = value & 0x00ff;
1040 pAd->ALNAGain1 = (value >> 8);
1041 RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1042 pAd->BLNAGain = value & 0x00ff;
1043 pAd->ALNAGain0 = (value >> 8);
1045 // Validate 11b/g RSSI_0 offset.
1046 if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1047 pAd->BGRssiOffset0 = 0;
1049 // Validate 11b/g RSSI_1 offset.
1050 if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1051 pAd->BGRssiOffset1 = 0;
1053 // Validate 11b/g RSSI_2 offset.
1054 if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1055 pAd->BGRssiOffset2 = 0;
1057 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1058 pAd->ARssiOffset0 = value & 0x00ff;
1059 pAd->ARssiOffset1 = (value >> 8);
1060 RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1061 pAd->ARssiOffset2 = value & 0x00ff;
1062 pAd->ALNAGain2 = (value >> 8);
1064 if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1065 pAd->ALNAGain1 = pAd->ALNAGain0;
1066 if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1067 pAd->ALNAGain2 = pAd->ALNAGain0;
1069 // Validate 11a RSSI_0 offset.
1070 if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1071 pAd->ARssiOffset0 = 0;
1073 // Validate 11a RSSI_1 offset.
1074 if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1075 pAd->ARssiOffset1 = 0;
1077 //Validate 11a RSSI_2 offset.
1078 if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1079 pAd->ARssiOffset2 = 0;
1083 // Get TX mixer gain setting
1084 // 0xff are invalid value
1085 // Note: RT30xX default value is 0x00 and will program to RF_R17 only when this value is not zero.
1086 // RT359X default value is 0x02
1088 if (IS_RT30xx(pAd) || IS_RT3572(pAd))
1090 RT28xx_EEPROM_READ16(pAd, EEPROM_TXMIXER_GAIN_2_4G, value);
1091 pAd->TxMixerGain24G = 0;
1096 pAd->TxMixerGain24G = (UCHAR)value;
1104 RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1105 pAd->LedCntl.word = (value>>8);
1106 RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1108 RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1110 RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1113 RTMPReadTxPwrPerRate(pAd);
1116 #ifdef RTMP_EFUSE_SUPPORT
1117 RtmpEfuseSupportCheck(pAd);
1118 #endif // RTMP_EFUSE_SUPPORT //
1121 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1125 ========================================================================
1127 Routine Description:
1128 Set default value from EEPROM
1131 Adapter Pointer to our adapter
1136 IRQL = PASSIVE_LEVEL
1140 ========================================================================
1142 VOID NICInitAsicFromEEPROM(
1143 IN PRTMP_ADAPTER pAd)
1148 // EEPROM_ANTENNA_STRUC Antenna;
1149 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1152 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1153 for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1155 UCHAR BbpRegIdx, BbpValue;
1157 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1159 BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1160 BbpValue = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1161 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1166 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1169 if ((NicConfig2.word & 0x00ff) == 0xff)
1171 NicConfig2.word &= 0xff00;
1174 if ((NicConfig2.word >> 8) == 0xff)
1176 NicConfig2.word &= 0x00ff;
1180 // Save the antenna for future use
1181 pAd->NicConfig2.word = NicConfig2.word;
1184 // set default antenna as main
1185 if (pAd->RfIcType == RFIC_3020)
1186 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
1190 // Send LED Setting to MCU.
1192 if (pAd->LedCntl.word == 0xFF)
1194 pAd->LedCntl.word = 0x01;
1200 #endif // RTMP_MAC_PCI //
1203 #endif // RTMP_MAC_USB //
1206 AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1207 AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1208 AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1209 AsicSendCommandToMcu(pAd, 0x51, 0xff, 0, pAd->LedCntl.field.Polarity);
1211 pAd->LedIndicatorStrength = 0xFF;
1212 RTMPSetSignalLED(pAd, -100); // Force signal strength Led to be turned off, before link up
1215 // Read Hardware controlled Radio state enable bit
1216 if (NicConfig2.field.HardwareRadioControl == 1)
1218 pAd->StaCfg.bHardwareRadio = TRUE;
1220 // Read GPIO pin2 as Hardware controlled radio state
1221 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1222 if ((data & 0x04) == 0)
1224 pAd->StaCfg.bHwRadio = FALSE;
1225 pAd->StaCfg.bRadio = FALSE;
1226 // RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1227 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1231 pAd->StaCfg.bHardwareRadio = FALSE;
1233 if (pAd->StaCfg.bRadio == FALSE)
1235 RTMPSetLED(pAd, LED_RADIO_OFF);
1239 RTMPSetLED(pAd, LED_RADIO_ON);
1241 AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1242 AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1243 // 2-1. wait command ok.
1244 AsicCheckCommanOk(pAd, PowerWakeCID);
1245 #endif // RTMP_MAC_PCI //
1249 // Turn off patching for cardbus controller
1250 if (NicConfig2.field.CardbusAcceleration == 1)
1252 // pAd->bTest1 = TRUE;
1255 if (NicConfig2.field.DynamicTxAgcControl == 1)
1256 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1258 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1260 // Since BBP has been progamed, to make sure BBP setting will be
1261 // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1263 pAd->CommonCfg.BandState = UNKNOWN_BAND;
1265 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1267 if(pAd->Antenna.field.RxPath == 3)
1271 else if(pAd->Antenna.field.RxPath == 2)
1275 else if(pAd->Antenna.field.RxPath == 1)
1279 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1282 // Handle the difference when 1T
1283 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1284 if(pAd->Antenna.field.TxPath == 1)
1288 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1290 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n",
1291 pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1296 // update registers from EEPROM for RT3071 or later(3572/3592).
1298 if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
1300 UCHAR RegIdx, RegValue;
1303 // after RT3071, write BBP from EEPROM 0xF0 to 0x102
1304 for (i = 0xF0; i <= 0x102; i = i+2)
1307 RT28xx_EEPROM_READ16(pAd, i, value);
1308 if ((value != 0xFFFF) && (value != 0))
1310 RegIdx = (UCHAR)(value >> 8);
1311 RegValue = (UCHAR)(value & 0xff);
1312 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, RegIdx, RegValue);
1313 DBGPRINT(RT_DEBUG_TRACE, ("Update BBP Registers from EEPROM(0x%0x), BBP(0x%x) = 0x%x\n", i, RegIdx, RegValue));
1317 // after RT3071, write RF from EEPROM 0x104 to 0x116
1318 for (i = 0x104; i <= 0x116; i = i+2)
1321 RT28xx_EEPROM_READ16(pAd, i, value);
1322 if ((value != 0xFFFF) && (value != 0))
1324 RegIdx = (UCHAR)(value >> 8);
1325 RegValue = (UCHAR)(value & 0xff);
1326 RT30xxWriteRFRegister(pAd, RegIdx, RegValue);
1327 DBGPRINT(RT_DEBUG_TRACE, ("Update RF Registers from EEPROM0x%x), BBP(0x%x) = 0x%x\n", i, RegIdx, RegValue));
1332 #endif // RTMP_MAC_USB //
1334 DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n",
1335 pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath,
1336 pAd->RfIcType, pAd->LedCntl.word));
1337 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1341 ========================================================================
1343 Routine Description:
1344 Initialize NIC hardware
1347 Adapter Pointer to our adapter
1352 IRQL = PASSIVE_LEVEL
1356 ========================================================================
1358 NDIS_STATUS NICInitializeAdapter(
1359 IN PRTMP_ADAPTER pAd,
1360 IN BOOLEAN bHardReset)
1362 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1363 WPDMA_GLO_CFG_STRUC GloCfg;
1366 DELAY_INT_CFG_STRUC IntCfg;
1367 #endif // RTMP_MAC_PCI //
1368 // INT_MASK_CSR_STRUC IntMask;
1370 AC_TXOP_CSR0_STRUC csr0;
1372 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1374 // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1379 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1380 if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
1383 RTMPusecDelay(1000);
1386 DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1387 GloCfg.word &= 0xff0;
1388 GloCfg.field.EnTXWriteBackDDONE =1;
1389 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1391 // Record HW Beacon offset
1392 pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1393 pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1394 pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1395 pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1396 pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1397 pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1398 pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1399 pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1402 // write all shared Ring's base address into ASIC
1405 // asic simulation sequence put this ahead before loading firmware.
1406 // pbf hardware reset
1408 RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f); // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1409 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1410 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1411 #endif // RTMP_MAC_PCI //
1413 // Initialze ASIC for TX & Rx operation
1414 if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1418 NICLoadFirmware(pAd);
1421 return NDIS_STATUS_FAILURE;
1426 // Write AC_BK base address register
1427 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1428 RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1429 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1431 // Write AC_BE base address register
1432 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1433 RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1434 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1436 // Write AC_VI base address register
1437 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1438 RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1439 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1441 // Write AC_VO base address register
1442 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1443 RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1444 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1446 // Write HCCA base address register
1447 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
1448 RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
1449 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
1451 // Write MGMT_BASE_CSR register
1452 Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1453 RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1454 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1456 // Write RX_BASE_CSR register
1457 Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1458 RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1459 DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1461 // Init RX Ring index pointer
1462 pAd->RxRing.RxSwReadIdx = 0;
1463 pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1464 RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1466 // Init TX rings index pointer
1468 for (i=0; i<NUM_OF_TX_RING; i++)
1470 pAd->TxRing[i].TxSwFreeIdx = 0;
1471 pAd->TxRing[i].TxCpuIdx = 0;
1472 RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) , pAd->TxRing[i].TxCpuIdx);
1476 // init MGMT ring index pointer
1477 pAd->MgmtRing.TxSwFreeIdx = 0;
1478 pAd->MgmtRing.TxCpuIdx = 0;
1479 RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX, pAd->MgmtRing.TxCpuIdx);
1482 // set each Ring's SIZE into ASIC. Descriptor Size is fixed by design.
1485 // Write TX_RING_CSR0 register
1486 Value = TX_RING_SIZE;
1487 RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1488 RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1489 RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1490 RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1491 RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1492 Value = MGMT_RING_SIZE;
1493 RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1495 // Write RX_RING_CSR register
1496 Value = RX_RING_SIZE;
1497 RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1498 #endif // RTMP_MAC_PCI //
1503 RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1504 if (pAd->CommonCfg.PhyMode == PHY_11B)
1506 csr0.field.Ac0Txop = 192; // AC_VI: 192*32us ~= 6ms
1507 csr0.field.Ac1Txop = 96; // AC_VO: 96*32us ~= 3ms
1511 csr0.field.Ac0Txop = 96; // AC_VI: 96*32us ~= 3ms
1512 csr0.field.Ac1Txop = 48; // AC_VO: 48*32us ~= 1.5ms
1514 RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1518 // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1522 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1523 if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
1526 RTMPusecDelay(1000);
1530 GloCfg.word &= 0xff0;
1531 GloCfg.field.EnTXWriteBackDDONE =1;
1532 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1535 RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1536 #endif // RTMP_MAC_PCI //
1541 // Status = NICLoadFirmware(pAd);
1543 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1548 ========================================================================
1550 Routine Description:
1554 Adapter Pointer to our adapter
1559 IRQL = PASSIVE_LEVEL
1563 ========================================================================
1565 NDIS_STATUS NICInitializeAsic(
1566 IN PRTMP_ADAPTER pAd,
1567 IN BOOLEAN bHardReset)
1571 UINT32 MacCsr12 = 0, Counter = 0;
1576 #endif // RTMP_MAC_USB //
1584 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1587 RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x3); // To fix driver disable/enable hang issue when radio off
1588 if (bHardReset == TRUE)
1590 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1593 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1595 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1596 // Initialize MAC register to default value
1597 for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1599 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
1603 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1605 RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1608 #endif // RTMP_MAC_PCI //
1611 // Make sure MAC gets ready after NICLoadFirmware().
1615 //To avoid hang-on issue when interface up in kernel 2.4,
1616 //we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.
1619 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
1621 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
1625 } while (Index++ < 100);
1627 pAd->MACVersion = MacCsr0;
1628 DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0 [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
1629 // turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.
1630 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
1631 MacCsr12 &= (~0x2000);
1632 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
1634 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1635 RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
1636 Status = RTUSBVenderReset(pAd);
1638 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1640 // Initialize MAC register to default value
1641 for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
1644 if ((MACRegTable[Index].Register == TX_SW_CFG0) && (IS_RT3070(pAd) || IS_RT3071(pAd) || IS_RT3572(pAd)))
1646 MACRegTable[Index].Value = 0x00000400;
1649 RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
1653 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1655 RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1658 #endif // RTMP_MAC_USB //
1661 // Initialize RT3070 serial MAC registers which is different from RT2870 serial
1662 if (IS_RT3090(pAd) || IS_RT3572(pAd)||IS_RT3390(pAd))
1664 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
1666 // RT3071 version E has fixed this issue
1667 if ((pAd->MACVersion & 0xffff) < 0x0211)
1669 if (pAd->NicConfig2.field.DACTestBit == 1)
1671 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C); // To fix throughput drop drastically
1675 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically
1680 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
1683 else if (IS_RT3070(pAd))
1685 if (((pAd->MACVersion & 0xffff) < 0x0201))
1687 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
1688 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C); // To fix throughput drop drastically
1692 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0);
1698 // Before program BBP, we need to wait BBP/RF get wake up.
1703 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1705 if ((MacCsr12 & 0x03) == 0) // if BB.RF is stable
1708 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG = Busy = %x\n", MacCsr12));
1709 RTMPusecDelay(1000);
1710 } while (Index++ < 100);
1712 // The commands to firmware should be after these commands, these commands will init firmware
1713 // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
1714 RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
1715 RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1716 RTMPusecDelay(1000);
1718 // Read BBP register, make sure BBP is up and running before write new data
1722 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1723 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1724 } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1725 //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
1727 if ((R0 == 0xff) || (R0 == 0x00))
1728 return NDIS_STATUS_FAILURE;
1730 // Initialize BBP register to default value
1731 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1733 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
1737 // TODO: shiang, check MACVersion, currently, rbus-based chip use this.
1738 if (pAd->MACVersion == 0x28720200)
1743 //disable MLD by Bruce 20080704
1744 //BBP_IO_READ8_BY_REG_ID(pAd, BBP_R105, &value);
1745 //BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, value | 4);
1747 //Maximum PSDU length from 16K to 32K bytes
1748 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &value2);
1749 value2 &= ~(0x3<<12);
1750 value2 |= (0x2<<12);
1751 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, value2);
1753 #endif // RTMP_MAC_PCI //
1755 // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
1756 // RT3090 should not program BBP R84 to 0x19, otherwise TX will block.
1757 //3070/71/72,3090,3090A( are included in RT30xx),3572,3390
1758 if (((pAd->MACVersion & 0xffff) != 0x0101) && !(IS_RT30xx(pAd)|| IS_RT3572(pAd) || IS_RT3390(pAd)))
1759 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1762 // add by johnli, RF power sequence setup
1763 if (IS_RT30xx(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
1764 { //update for RT3070/71/72/90/91/92,3572,3390.
1765 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
1766 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
1767 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
1770 if (IS_RT3090(pAd)||IS_RT3390(pAd)) // RT309x, RT3071/72
1773 if ((pAd->MACVersion & 0xffff) >= 0x0211)
1775 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
1778 // improve power consumption
1779 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
1780 if (pAd->Antenna.field.TxPath == 1)
1782 // turn off tx DAC_1
1783 bbpreg = (bbpreg | 0x20);
1786 if (pAd->Antenna.field.RxPath == 1)
1788 // turn off tx ADC_1
1791 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
1793 // improve power consumption in RT3071 Ver.E
1794 if ((pAd->MACVersion & 0xffff) >= 0x0211)
1796 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
1798 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
1801 else if (IS_RT3070(pAd))
1803 if ((pAd->MACVersion & 0xffff) >= 0x0201)
1806 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
1808 // improve power consumption in RT3070 Ver.F
1809 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
1811 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
1814 // TX_LO1_en, RF R17 register Bit 3 to 0
1815 RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
1817 // to fix rx long range issue
1818 if (pAd->NicConfig2.field.ExternalLNAForG == 0)
1822 // set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h
1823 if (pAd->TxMixerGain24G >= 1)
1825 RFValue &= (~0x7); // clean bit [2:0]
1826 RFValue |= pAd->TxMixerGain24G;
1828 RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
1833 if (pAd->MACVersion == 0x28600100)
1835 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1836 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1839 if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
1841 // enlarge MAX_LEN_CFG
1843 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1846 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1851 UCHAR MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
1853 //Initialize WCID table
1855 for(Index =0 ;Index < 254;Index++)
1857 RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
1860 #endif // RTMP_MAC_USB //
1862 // Add radio off control
1864 if (pAd->StaCfg.bRadio == FALSE)
1866 // RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1867 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1868 DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
1872 // Clear raw counters
1873 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1874 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1875 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1876 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1877 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1878 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1880 // ASIC will keep garbage value after boot
1881 // Clear all shared key table when initial
1882 // This routine can be ignored in radio-ON/OFF operation.
1885 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
1887 RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
1890 // Clear all pairwise key table when initial
1891 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
1893 RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
1897 // assert HOST ready bit
1898 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x0); // 2004-09-14 asked by Mark
1899 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x4);
1901 // It isn't necessary to clear this space when not hard reset.
1902 if (bHardReset == TRUE)
1904 // clear all on-chip BEACON frame space
1905 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
1907 for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
1908 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
1913 AsicDisableSync(pAd);
1914 // Clear raw counters
1915 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1916 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1917 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1918 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1919 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1920 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1921 // Default PCI clock cycle per ms is different as default setting, which is based on PCI.
1922 RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
1923 Counter&=0xffffff00;
1925 RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
1926 #endif // RTMP_MAC_USB //
1929 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
1930 if ((pAd->MACVersion&0xffff) != 0x0101)
1931 RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
1934 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
1935 return NDIS_STATUS_SUCCESS;
1939 ========================================================================
1941 Routine Description:
1945 Adapter Pointer to our adapter
1950 IRQL = PASSIVE_LEVEL
1953 Reset NIC to initial state AS IS system boot up time.
1955 ========================================================================
1958 IN PRTMP_ADAPTER pAd)
1961 DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
1963 // Abort Tx, prevent ASIC from writing to Host memory
1964 //RTMP_IO_WRITE32(pAd, TX_CNTL_CSR, 0x001f0000);
1966 // Disable Rx, register value supposed will remain after reset
1967 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1968 Value &= (0xfffffff3);
1969 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1971 // Issue reset and clear from reset state
1972 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
1973 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
1975 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
1979 ========================================================================
1981 Routine Description:
1982 Check ASIC registers and find any reason the system might hang
1985 Adapter Pointer to our adapter
1990 IRQL = DISPATCH_LEVEL
1992 ========================================================================
1994 BOOLEAN NICCheckForHang(
1995 IN PRTMP_ADAPTER pAd)
2000 VOID NICUpdateFifoStaCounters(
2001 IN PRTMP_ADAPTER pAd)
2003 TX_STA_FIFO_STRUC StaFifo;
2004 MAC_TABLE_ENTRY *pEntry;
2006 UCHAR pid = 0, wcid = 0;
2012 RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2014 if (StaFifo.field.bValid == 0)
2017 wcid = (UCHAR)StaFifo.field.wcid;
2020 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2021 if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2027 /* PID store Tx MCS Rate */
2028 pid = (UCHAR)StaFifo.field.PidType;
2030 pEntry = &pAd->MacTab.Content[wcid];
2032 pEntry->DebugFIFOCount++;
2034 if (StaFifo.field.TxBF) // 3*3
2035 pEntry->TxBFCount++;
2037 if (!StaFifo.field.TxSuccess)
2039 pEntry->FIFOCount++;
2040 pEntry->OneSecTxFailCount++;
2042 if (pEntry->FIFOCount >= 1)
2044 DBGPRINT(RT_DEBUG_TRACE, ("#"));
2045 pEntry->NoBADataCountDown = 64;
2047 if(pEntry->PsMode == PWR_ACTIVE)
2050 for (tid=0; tid<NUM_OF_TID; tid++)
2052 BAOriSessionTearDown(pAd, pEntry->Aid, tid, FALSE, FALSE);
2055 // Update the continuous transmission counter except PS mode
2056 pEntry->ContinueTxFailCnt++;
2060 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2061 // this tx error happened due to sta just go to sleep.
2062 pEntry->FIFOCount = 0;
2063 pEntry->ContinueTxFailCnt = 0;
2065 //pEntry->FIFOCount = 0;
2067 //pEntry->bSendBAR = TRUE;
2071 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2073 pEntry->NoBADataCountDown--;
2074 if (pEntry->NoBADataCountDown==0)
2076 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2080 pEntry->FIFOCount = 0;
2081 pEntry->OneSecTxNoRetryOkCount++;
2082 // update NoDataIdleCount when sucessful send packet to STA.
2083 pEntry->NoDataIdleCount = 0;
2084 pEntry->ContinueTxFailCnt = 0;
2087 succMCS = StaFifo.field.SuccessRate & 0x7F;
2089 reTry = pid - succMCS;
2091 if (StaFifo.field.TxSuccess)
2093 pEntry->TXMCSExpected[pid]++;
2096 pEntry->TXMCSSuccessful[pid]++;
2100 pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2105 pEntry->TXMCSFailed[pid]++;
2110 if ((pid >= 12) && succMCS <=7)
2114 pEntry->OneSecTxRetryOkCount += reTry;
2118 // ASIC store 16 stack
2119 } while ( i < (2*TX_RING_SIZE) );
2124 ========================================================================
2126 Routine Description:
2127 Read statistical counters from hardware registers and record them
2128 in software variables for later on query
2131 pAd Pointer to our adapter
2136 IRQL = DISPATCH_LEVEL
2138 ========================================================================
2140 VOID NICUpdateRawCounters(
2141 IN PRTMP_ADAPTER pAd)
2143 UINT32 OldValue;//, Value2;
2144 //ULONG PageSum, OneSecTransmitCount;
2145 //ULONG TxErrorRatio, Retry, Fail;
2146 RX_STA_CNT0_STRUC RxStaCnt0;
2147 RX_STA_CNT1_STRUC RxStaCnt1;
2148 RX_STA_CNT2_STRUC RxStaCnt2;
2149 TX_STA_CNT0_STRUC TxStaCnt0;
2150 TX_STA_CNT1_STRUC StaTx1;
2151 TX_STA_CNT2_STRUC StaTx2;
2152 TX_AGG_CNT_STRUC TxAggCnt;
2153 TX_AGG_CNT0_STRUC TxAggCnt0;
2154 TX_AGG_CNT1_STRUC TxAggCnt1;
2155 TX_AGG_CNT2_STRUC TxAggCnt2;
2156 TX_AGG_CNT3_STRUC TxAggCnt3;
2157 TX_AGG_CNT4_STRUC TxAggCnt4;
2158 TX_AGG_CNT5_STRUC TxAggCnt5;
2159 TX_AGG_CNT6_STRUC TxAggCnt6;
2160 TX_AGG_CNT7_STRUC TxAggCnt7;
2161 COUNTER_RALINK *pRalinkCounters;
2164 pRalinkCounters = &pAd->RalinkCounters;
2166 RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2167 RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2170 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2171 // Update RX PLCP error counter
2172 pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2173 // Update False CCA counter
2174 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2177 // Update FCS counters
2178 OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2179 pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2180 if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2181 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2183 // Add FCS error count to private counters
2184 pRalinkCounters->OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2185 OldValue = pRalinkCounters->RealFcsErrCount.u.LowPart;
2186 pRalinkCounters->RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2187 if (pRalinkCounters->RealFcsErrCount.u.LowPart < OldValue)
2188 pRalinkCounters->RealFcsErrCount.u.HighPart++;
2190 // Update Duplicate Rcv check
2191 pRalinkCounters->DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2192 pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2193 // Update RX Overflow counter
2194 pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2196 //pAd->RalinkCounters.RxCount = 0;
2198 if (pRalinkCounters->RxCount != pAd->watchDogRxCnt)
2200 pAd->watchDogRxCnt = pRalinkCounters->RxCount;
2201 pAd->watchDogRxOverFlowCnt = 0;
2205 if (RxStaCnt2.field.RxFifoOverflowCount)
2206 pAd->watchDogRxOverFlowCnt++;
2208 pAd->watchDogRxOverFlowCnt = 0;
2210 #endif // RTMP_MAC_USB //
2213 //if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) ||
2214 // (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) && (pAd->MacTab.Size != 1)))
2215 if (!pAd->bUpdateBcnCntDone)
2217 // Update BEACON sent count
2218 RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2219 RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2220 RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2221 pRalinkCounters->OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2222 pRalinkCounters->OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2223 pRalinkCounters->OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2224 pRalinkCounters->OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2225 pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2226 pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2227 pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2231 //if (pAd->bStaFifoTest == TRUE)
2233 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2234 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2235 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2236 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2237 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2238 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2239 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2240 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2241 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2242 pRalinkCounters->TxAggCount += TxAggCnt.field.AggTxCount;
2243 pRalinkCounters->TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2244 pRalinkCounters->TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2245 pRalinkCounters->TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2247 pRalinkCounters->TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2248 pRalinkCounters->TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2249 pRalinkCounters->TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2250 pRalinkCounters->TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2252 pRalinkCounters->TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2253 pRalinkCounters->TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2254 pRalinkCounters->TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2255 pRalinkCounters->TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2257 pRalinkCounters->TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2258 pRalinkCounters->TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2259 pRalinkCounters->TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2260 pRalinkCounters->TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2262 pRalinkCounters->TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2263 pRalinkCounters->TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2265 // Calculate the transmitted A-MPDU count
2266 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2267 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2269 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2270 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2272 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2273 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2275 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2276 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2278 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2279 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2281 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2282 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2284 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2285 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2287 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2288 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2297 ========================================================================
2299 Routine Description:
2300 Reset NIC from error
2303 Adapter Pointer to our adapter
2308 IRQL = PASSIVE_LEVEL
2311 Reset NIC from error state
2313 ========================================================================
2315 VOID NICResetFromError(
2316 IN PRTMP_ADAPTER pAd)
2318 // Reset BBP (according to alex, reset ASIC will force reset BBP
2319 // Therefore, skip the reset BBP
2320 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2322 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2323 // Remove ASIC from reset state
2324 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2326 NICInitializeAdapter(pAd, FALSE);
2327 NICInitAsicFromEEPROM(pAd);
2329 // Switch to current channel, since during reset process, the connection should remains on.
2330 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2331 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2335 NDIS_STATUS NICLoadFirmware(
2336 IN PRTMP_ADAPTER pAd)
2338 NDIS_STATUS status = NDIS_STATUS_SUCCESS;
2339 if (pAd->chipOps.loadFirmware)
2340 status = pAd->chipOps.loadFirmware(pAd);
2347 ========================================================================
2349 Routine Description:
2350 erase 8051 firmware image in MAC ASIC
2353 Adapter Pointer to our adapter
2355 IRQL = PASSIVE_LEVEL
2357 ========================================================================
2359 VOID NICEraseFirmware(
2360 IN PRTMP_ADAPTER pAd)
2362 if (pAd->chipOps.eraseFirmware)
2363 pAd->chipOps.eraseFirmware(pAd);
2365 }/* End of NICEraseFirmware */
2369 ========================================================================
2371 Routine Description:
2372 Load Tx rate switching parameters
2375 Adapter Pointer to our adapter
2378 NDIS_STATUS_SUCCESS firmware image load ok
2379 NDIS_STATUS_FAILURE image not found
2381 IRQL = PASSIVE_LEVEL
2384 1. (B0: Valid Item number) (B1:Initial item from zero)
2385 2. Item Number(Dec) Mode(Hex) Current MCS(Dec) TrainUp(Dec) TrainDown(Dec)
2387 ========================================================================
2389 NDIS_STATUS NICLoadRateSwitchingParams(
2390 IN PRTMP_ADAPTER pAd)
2392 return NDIS_STATUS_SUCCESS;
2397 ========================================================================
2399 Routine Description:
2400 Compare two memory block
2403 pSrc1 Pointer to first memory address
2404 pSrc2 Pointer to second memory address
2408 1: pSrc1 memory is larger
2409 2: pSrc2 memory is larger
2411 IRQL = DISPATCH_LEVEL
2415 ========================================================================
2417 ULONG RTMPCompareMemory(
2426 pMem1 = (PUCHAR) pSrc1;
2427 pMem2 = (PUCHAR) pSrc2;
2429 for (Index = 0; Index < Length; Index++)
2431 if (pMem1[Index] > pMem2[Index])
2433 else if (pMem1[Index] < pMem2[Index])
2442 ========================================================================
2444 Routine Description:
2445 Zero out memory block
2448 pSrc1 Pointer to memory address
2454 IRQL = PASSIVE_LEVEL
2455 IRQL = DISPATCH_LEVEL
2459 ========================================================================
2461 VOID RTMPZeroMemory(
2468 pMem = (PUCHAR) pSrc;
2470 for (Index = 0; Index < Length; Index++)
2478 ========================================================================
2480 Routine Description:
2481 Copy data from memory block 1 to memory block 2
2484 pDest Pointer to destination memory address
2485 pSrc Pointer to source memory address
2491 IRQL = PASSIVE_LEVEL
2492 IRQL = DISPATCH_LEVEL
2496 ========================================================================
2498 VOID RTMPMoveMemory(
2507 ASSERT((Length==0) || (pDest && pSrc));
2509 pMem1 = (PUCHAR) pDest;
2510 pMem2 = (PUCHAR) pSrc;
2512 for (Index = 0; Index < Length; Index++)
2514 pMem1[Index] = pMem2[Index];
2519 ========================================================================
2521 Routine Description:
2522 Initialize port configuration structure
2525 Adapter Pointer to our adapter
2530 IRQL = PASSIVE_LEVEL
2534 ========================================================================
2537 IN PRTMP_ADAPTER pAd)
2539 UINT key_index, bss_index;
2541 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
2544 // part I. intialize common configuration
2547 pAd->BulkOutReq = 0;
2549 pAd->BulkOutComplete = 0;
2550 pAd->BulkOutCompleteOther = 0;
2551 pAd->BulkOutCompleteCancel = 0;
2553 pAd->BulkInComplete = 0;
2554 pAd->BulkInCompleteFail = 0;
2556 //pAd->QuickTimerP = 100;
2557 //pAd->TurnAggrBulkInCount = 0;
2558 pAd->bUsbTxBulkAggre = 0;
2560 // init as unsed value to ensure driver will set to MCU once.
2561 pAd->LedIndicatorStrength = 0xFF;
2563 pAd->CommonCfg.MaxPktOneTxBulk = 2;
2564 pAd->CommonCfg.TxBulkFactor = 1;
2565 pAd->CommonCfg.RxBulkFactor =1;
2567 pAd->CommonCfg.TxPower = 100; //mW
2569 NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
2570 #endif // RTMP_MAC_USB //
2572 for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
2574 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
2576 pAd->SharedKey[bss_index][key_index].KeyLen = 0;
2577 pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
2581 pAd->EepromAccess = FALSE;
2583 pAd->Antenna.word = 0;
2584 pAd->CommonCfg.BBPCurrentBW = BW_20;
2586 pAd->LedCntl.word = 0;
2588 pAd->LedIndicatorStrength = 0;
2589 pAd->RLnkCtrlOffset = 0;
2590 pAd->HostLnkCtrlOffset = 0;
2591 #endif // RTMP_MAC_PCI //
2593 pAd->bAutoTxAgcA = FALSE; // Default is OFF
2594 pAd->bAutoTxAgcG = FALSE; // Default is OFF
2595 pAd->RfIcType = RFIC_2820;
2597 // Init timer for reset complete event
2598 pAd->CommonCfg.CentralChannel = 1;
2599 pAd->bForcePrintTX = FALSE;
2600 pAd->bForcePrintRX = FALSE;
2601 pAd->bStaFifoTest = FALSE;
2602 pAd->bProtectionTest = FALSE;
2603 pAd->bHCCATest = FALSE;
2604 pAd->bGenOneHCCA = FALSE;
2605 pAd->CommonCfg.Dsifs = 10; // in units of usec
2606 pAd->CommonCfg.TxPower = 100; //mW
2607 pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
2608 pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
2609 pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
2610 pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
2611 pAd->CommonCfg.RtsThreshold = 2347;
2612 pAd->CommonCfg.FragmentThreshold = 2346;
2613 pAd->CommonCfg.UseBGProtection = 0; // 0: AUTO
2614 pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
2615 pAd->CommonCfg.PhyMode = 0xff; // unknown
2616 pAd->CommonCfg.BandState = UNKNOWN_BAND;
2617 pAd->CommonCfg.RadarDetect.CSPeriod = 10;
2618 pAd->CommonCfg.RadarDetect.CSCount = 0;
2619 pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
2624 pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
2625 pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
2626 pAd->CommonCfg.bAPSDCapable = FALSE;
2627 pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
2628 pAd->CommonCfg.TriggerTimerCount = 0;
2629 pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
2630 pAd->CommonCfg.bCountryFlag = FALSE;
2631 pAd->CommonCfg.TxStream = 0;
2632 pAd->CommonCfg.RxStream = 0;
2634 NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
2636 NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
2637 pAd->HTCEnable = FALSE;
2638 pAd->bBroadComHT = FALSE;
2639 pAd->CommonCfg.bRdg = FALSE;
2641 NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
2642 pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
2643 pAd->CommonCfg.BACapability.field.MpduDensity = 0;
2644 pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
2645 pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
2646 pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
2647 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
2649 pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
2650 BATableInit(pAd, &pAd->BATable);
2652 pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
2653 pAd->CommonCfg.bHTProtect = 1;
2654 pAd->CommonCfg.bMIMOPSEnable = TRUE;
2655 //2008/11/05:KH add to support Antenna power-saving of AP<--
2656 pAd->CommonCfg.bGreenAPEnable=FALSE;
2657 //2008/11/05:KH add to support Antenna power-saving of AP-->
2658 pAd->CommonCfg.bBADecline = FALSE;
2659 pAd->CommonCfg.bDisableReordering = FALSE;
2661 if (pAd->MACVersion == 0x28720200)
2663 pAd->CommonCfg.TxBASize = 13; //by Jerry recommend
2665 pAd->CommonCfg.TxBASize = 7;
2668 pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
2670 //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
2671 //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
2672 //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
2673 //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
2674 pAd->CommonCfg.TxRate = RATE_6;
2676 pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
2677 pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
2678 pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
2680 pAd->CommonCfg.BeaconPeriod = 100; // in mSec
2683 // part II. intialize STA specific configuration
2686 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
2687 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
2688 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
2689 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
2691 pAd->StaCfg.Psm = PWR_ACTIVE;
2693 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
2694 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
2695 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
2696 pAd->StaCfg.bMixCipher = FALSE;
2697 pAd->StaCfg.DefaultKeyId = 0;
2699 // 802.1x port control
2700 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
2701 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
2702 pAd->StaCfg.LastMicErrorTime = 0;
2703 pAd->StaCfg.MicErrCnt = 0;
2704 pAd->StaCfg.bBlockAssoc = FALSE;
2705 pAd->StaCfg.WpaState = SS_NOTUSE;
2707 pAd->CommonCfg.NdisRadioStateOff = FALSE; // New to support microsoft disable radio with OID command
2709 pAd->StaCfg.RssiTrigger = 0;
2710 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
2711 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
2712 pAd->StaCfg.AtimWin = 0;
2713 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
2714 pAd->StaCfg.BssType = BSS_INFRA; // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
2715 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
2716 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
2717 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
2719 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
2720 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
2723 // global variables mXXXX used in MAC protocol state machines
2724 OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
2725 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
2726 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
2728 // PHY specification
2729 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED; // default PHY mode
2730 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED); // CCK use LONG preamble
2733 // user desired power mode
2734 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
2735 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
2736 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
2738 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
2739 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
2742 pAd->StaCfg.ScanCnt = 0;
2744 pAd->StaCfg.bHwRadio = TRUE; // Default Hardware Radio status is On
2745 pAd->StaCfg.bSwRadio = TRUE; // Default Software Radio status is On
2746 pAd->StaCfg.bRadio = TRUE; // bHwRadio && bSwRadio
2747 pAd->StaCfg.bHardwareRadio = FALSE; // Default is OFF
2748 pAd->StaCfg.bShowHiddenSSID = FALSE; // Default no show
2750 // Nitro mode control
2751 pAd->StaCfg.bAutoReconnect = TRUE;
2753 // Save the init time as last scan time, the system should do scan after 2 seconds.
2754 // This patch is for driver wake up from standby mode, system will do scan right away.
2755 NdisGetSystemUpTime(&pAd->StaCfg.LastScanTime);
2756 if (pAd->StaCfg.LastScanTime > 10 * OS_HZ)
2757 pAd->StaCfg.LastScanTime -= (10 * OS_HZ);
2759 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
2761 sprintf((PSTRING) pAd->nickname, "RT2870STA");
2762 #endif // RTMP_MAC_USB //
2763 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
2764 pAd->StaCfg.IEEE8021X = FALSE;
2765 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
2766 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
2767 pAd->StaCfg.bRSN_IE_FromWpaSupplicant = FALSE;
2768 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
2769 pAd->StaCfg.bLostAp = FALSE;
2771 NdisZeroMemory(pAd->StaCfg.ReplayCounter, 8);
2774 pAd->StaCfg.bAutoConnectByBssid = FALSE;
2775 pAd->StaCfg.BeaconLostTime = BEACON_LOST_TIME;
2776 NdisZeroMemory(pAd->StaCfg.WpaPassPhrase, 64);
2777 pAd->StaCfg.WpaPassPhraseLen = 0;
2778 pAd->StaCfg.bAutoRoaming = FALSE;
2779 pAd->StaCfg.bForceTxBurst = FALSE;
2782 // Default for extra information is not valid
2783 pAd->ExtraInfo = EXTRA_INFO_CLEAR;
2785 // Default Config change flag
2786 pAd->bConfigChanged = FALSE;
2789 // part III. AP configurations
2796 // dynamic BBP R66:sensibity tuning to overcome background noise
2797 pAd->BbpTuning.bEnable = TRUE;
2798 pAd->BbpTuning.FalseCcaLowerThreshold = 100;
2799 pAd->BbpTuning.FalseCcaUpperThreshold = 512;
2800 pAd->BbpTuning.R66Delta = 4;
2801 pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
2804 // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
2805 // if not initial this value, the default value will be 0.
2807 pAd->BbpTuning.R66CurrentValue = 0x38;
2809 pAd->Bbp94 = BBPR94_DEFAULT;
2810 pAd->BbpForCCK = FALSE;
2812 // Default is FALSE for test bit 1
2813 //pAd->bTest1 = FALSE;
2815 // initialize MAC table and allocate spin lock
2816 NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
2817 InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
2818 NdisAllocateSpinLock(&pAd->MacTabLock);
2820 //RTMPInitTimer(pAd, &pAd->RECBATimer, RECBATimerTimeout, pAd, TRUE);
2821 //RTMPSetTimer(&pAd->RECBATimer, REORDER_EXEC_INTV);
2825 pAd->CommonCfg.bWiFiTest = FALSE;
2827 pAd->bPCIclkOff = FALSE;
2828 #endif // RTMP_MAC_PCI //
2830 RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
2831 DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
2834 // IRQL = PASSIVE_LEVEL
2835 UCHAR BtoH(STRING ch)
2837 if (ch >= '0' && ch <= '9') return (ch - '0'); // Handle numerals
2838 if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA); // Handle capitol hex digits
2839 if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA); // Handle small hex digits
2844 // FUNCTION: AtoH(char *, UCHAR *, int)
2846 // PURPOSE: Converts ascii string to network order hex
2849 // src - pointer to input ascii string
2850 // dest - pointer to output hex
2851 // destlen - size of dest
2855 // 2 ascii bytes make a hex byte so must put 1st ascii byte of pair
2856 // into upper nibble and 2nd ascii byte of pair into lower nibble.
2858 // IRQL = PASSIVE_LEVEL
2860 void AtoH(PSTRING src, PUCHAR dest, int destlen)
2866 destTemp = (PUCHAR) dest;
2870 *destTemp = BtoH(*srcptr++) << 4; // Put 1st ascii byte in upper nibble.
2871 *destTemp += BtoH(*srcptr++); // Add 2nd ascii byte to above.
2877 //+++Mark by shiang, not use now, need to remove after confirm
2878 //---Mark by shiang, not use now, need to remove after confirm
2882 ========================================================================
2884 Routine Description:
2888 pAd Pointer to our adapter
2889 pTimer Timer structure
2890 pTimerFunc Function to execute when timer expired
2891 Repeat Ture for period timer
2898 ========================================================================
2901 IN PRTMP_ADAPTER pAd,
2902 IN PRALINK_TIMER_STRUCT pTimer,
2903 IN PVOID pTimerFunc,
2908 // Set Valid to TRUE for later used.
2909 // It will crash if we cancel a timer or set a timer
2910 // that we haven't initialize before.
2912 pTimer->Valid = TRUE;
2914 pTimer->PeriodicType = Repeat;
2915 pTimer->State = FALSE;
2916 pTimer->cookie = (ULONG) pData;
2918 #ifdef RTMP_TIMER_TASK_SUPPORT
2920 #endif // RTMP_TIMER_TASK_SUPPORT //
2922 RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj, pTimerFunc, (PVOID) pTimer);
2926 ========================================================================
2928 Routine Description:
2932 pTimer Timer structure
2933 Value Timer value in milliseconds
2939 To use this routine, must call RTMPInitTimer before.
2941 ========================================================================
2944 IN PRALINK_TIMER_STRUCT pTimer,
2949 pTimer->TimerValue = Value;
2950 pTimer->State = FALSE;
2951 if (pTimer->PeriodicType == TRUE)
2953 pTimer->Repeat = TRUE;
2954 RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
2958 pTimer->Repeat = FALSE;
2959 RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
2964 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
2970 ========================================================================
2972 Routine Description:
2976 pTimer Timer structure
2977 Value Timer value in milliseconds
2983 To use this routine, must call RTMPInitTimer before.
2985 ========================================================================
2988 IN PRALINK_TIMER_STRUCT pTimer,
2995 pTimer->TimerValue = Value;
2996 pTimer->State = FALSE;
2997 if (pTimer->PeriodicType == TRUE)
2999 RTMPCancelTimer(pTimer, &Cancel);
3000 RTMPSetTimer(pTimer, Value);
3004 RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3009 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3014 ========================================================================
3016 Routine Description:
3017 Cancel timer objects
3020 Adapter Pointer to our adapter
3025 IRQL = PASSIVE_LEVEL
3026 IRQL = DISPATCH_LEVEL
3029 1.) To use this routine, must call RTMPInitTimer before.
3030 2.) Reset NIC to initial state AS IS system boot up time.
3032 ========================================================================
3034 VOID RTMPCancelTimer(
3035 IN PRALINK_TIMER_STRUCT pTimer,
3036 OUT BOOLEAN *pCancelled)
3040 if (pTimer->State == FALSE)
3041 pTimer->Repeat = FALSE;
3043 RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3045 if (*pCancelled == TRUE)
3046 pTimer->State = TRUE;
3048 #ifdef RTMP_TIMER_TASK_SUPPORT
3049 // We need to go-through the TimerQ to findout this timer handler and remove it if
3050 // it's still waiting for execution.
3051 RtmpTimerQRemove(pTimer->pAd, pTimer);
3052 #endif // RTMP_TIMER_TASK_SUPPORT //
3056 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3061 ========================================================================
3063 Routine Description:
3067 pAd Pointer to our adapter
3073 IRQL = PASSIVE_LEVEL
3074 IRQL = DISPATCH_LEVEL
3078 ========================================================================
3081 IN PRTMP_ADAPTER pAd,
3088 LowByte = pAd->LedCntl.field.LedMode&0x7f;
3093 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3094 pAd->LedIndicatorStrength = 0;
3097 if (pAd->CommonCfg.Channel > 14)
3101 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3105 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3108 LowByte = 0; // Driver sets MAC register and MAC controls LED
3111 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3115 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3117 case LED_ON_SITE_SURVEY:
3119 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3123 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3126 DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3131 // Keep LED status for LED SiteSurvey mode.
3132 // After SiteSurvey, we will set the LED mode to previous status.
3134 if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3135 pAd->LedStatus = Status;
3137 DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3141 ========================================================================
3143 Routine Description:
3144 Set LED Signal Stregth
3147 pAd Pointer to our adapter
3153 IRQL = PASSIVE_LEVEL
3156 Can be run on any IRQL level.
3158 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3165 ========================================================================
3167 VOID RTMPSetSignalLED(
3168 IN PRTMP_ADAPTER pAd,
3169 IN NDIS_802_11_RSSI Dbm)
3173 if (pAd->LedCntl.field.LedMode == LED_MODE_SIGNAL_STREGTH)
3177 else if (Dbm <= -81)
3179 else if (Dbm <= -71)
3181 else if (Dbm <= -67)
3183 else if (Dbm <= -57)
3189 // Update Signal Stregth to firmware if changed.
3191 if (pAd->LedIndicatorStrength != nLed)
3193 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3194 pAd->LedIndicatorStrength = nLed;
3200 ========================================================================
3202 Routine Description:
3206 pAd Pointer to our adapter
3211 IRQL <= DISPATCH_LEVEL
3214 Before Enable RX, make sure you have enabled Interrupt.
3215 ========================================================================
3217 VOID RTMPEnableRxTx(
3218 IN PRTMP_ADAPTER pAd)
3220 // WPDMA_GLO_CFG_STRUC GloCfg;
3222 UINT32 rx_filter_flag;
3224 DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3227 RT28XXDMAEnable(pAd);
3229 // enable RX of MAC block
3230 if (pAd->OpMode == OPMODE_AP)
3232 rx_filter_flag = APNORMAL;
3235 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag); // enable RX of DMA block
3239 if (pAd->CommonCfg.PSPXlink)
3240 rx_filter_flag = PSPXLINK;
3242 rx_filter_flag = STANORMAL; // Staion not drop control frame will fail WiFi Certification.
3243 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);
3246 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3247 DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3251 //+++Add by shiang, move from os/linux/rt_main_dev.c
3252 void CfgInitHook(PRTMP_ADAPTER pAd)
3254 pAd->bBroadComHT = TRUE;
3259 IN PRTMP_ADAPTER pAd,
3260 IN PSTRING pDefaultMac,
3261 IN PSTRING pHostName)
3271 // If dirver doesn't wake up firmware here,
3272 // NICLoadFirmware will hang forever when interface is up again.
3274 if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) &&
3275 OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE))
3277 AUTO_WAKEUP_STRUC AutoWakeupCfg;
3278 AsicForceWakeup(pAd, TRUE);
3279 AutoWakeupCfg.word = 0;
3280 RTMP_IO_WRITE32(pAd, AUTO_WAKEUP_CFG, AutoWakeupCfg.word);
3281 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3284 #endif // RTMP_MAC_PCI //
3287 // reset Adapter flags
3288 RTMP_CLEAR_FLAGS(pAd);
3290 // Init BssTab & ChannelInfo tabbles for auto channel select.
3292 // Allocate BA Reordering memory
3293 ba_reordering_resource_init(pAd, MAX_REORDERING_MPDU_NUM);
3295 // Make sure MAC gets ready.
3299 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
3300 pAd->MACVersion = MacCsr0;
3302 if ((pAd->MACVersion != 0x00) && (pAd->MACVersion != 0xFFFFFFFF))
3306 } while (index++ < 100);
3307 DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0 [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
3311 // To fix driver disable/enable hang issue when radio off
3312 RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x2);
3313 #endif // RTMP_MAC_PCI //
3316 RT28XXDMADisable(pAd);
3319 // Load 8051 firmware
3320 Status = NICLoadFirmware(pAd);
3321 if (Status != NDIS_STATUS_SUCCESS)
3323 DBGPRINT_ERR(("NICLoadFirmware failed, Status[=0x%08x]\n", Status));
3327 NICLoadRateSwitchingParams(pAd);
3329 // Disable interrupts here which is as soon as possible
3330 // This statement should never be true. We might consider to remove it later
3332 if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE))
3334 RTMP_ASIC_INTERRUPT_DISABLE(pAd);
3336 #endif // RTMP_MAC_PCI //
3338 Status = RTMPAllocTxRxRingMemory(pAd);
3339 if (Status != NDIS_STATUS_SUCCESS)
3341 DBGPRINT_ERR(("RTMPAllocDMAMemory failed, Status[=0x%08x]\n", Status));
3345 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
3350 Status = RtmpMgmtTaskInit(pAd);
3351 if (Status != NDIS_STATUS_SUCCESS)
3354 Status = MlmeInit(pAd);
3355 if (Status != NDIS_STATUS_SUCCESS)
3357 DBGPRINT_ERR(("MlmeInit failed, Status[=0x%08x]\n", Status));
3361 // Initialize pAd->StaCfg, pAd->ApCfg, pAd->CommonCfg to manufacture default
3364 Status = RtmpNetTaskInit(pAd);
3365 if (Status != NDIS_STATUS_SUCCESS)
3368 // COPY_MAC_ADDR(pAd->ApCfg.MBSSID[apidx].Bssid, netif->hwaddr);
3369 // pAd->bForcePrintTX = TRUE;
3373 NdisAllocateSpinLock(&pAd->MacTabLock);
3375 MeasureReqTabInit(pAd);
3379 // Init the hardware, we need to init asic before read registry, otherwise mac register will be reset
3381 Status = NICInitializeAdapter(pAd, TRUE);
3382 if (Status != NDIS_STATUS_SUCCESS)
3384 DBGPRINT_ERR(("NICInitializeAdapter failed, Status[=0x%08x]\n", Status));
3385 if (Status != NDIS_STATUS_SUCCESS)
3389 // Read parameters from Config File
3390 Status = RTMPReadParametersHook(pAd);
3392 DBGPRINT(RT_DEBUG_OFF, ("1. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3393 if (Status != NDIS_STATUS_SUCCESS)
3395 DBGPRINT_ERR(("NICReadRegParameters failed, Status[=0x%08x]\n",Status));
3401 pAd->CommonCfg.bMultipleIRP = FALSE;
3403 if (pAd->CommonCfg.bMultipleIRP)
3404 pAd->CommonCfg.NumOfBulkInIRP = RX_RING_SIZE;
3406 pAd->CommonCfg.NumOfBulkInIRP = 1;
3407 #endif // RTMP_MAC_USB //
3409 //Init Ba Capability parameters.
3410 // RT28XX_BA_INIT(pAd);
3411 pAd->CommonCfg.DesiredHtPhy.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
3412 pAd->CommonCfg.DesiredHtPhy.AmsduEnable = (USHORT)pAd->CommonCfg.BACapability.field.AmsduEnable;
3413 pAd->CommonCfg.DesiredHtPhy.AmsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
3414 pAd->CommonCfg.DesiredHtPhy.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
3416 pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
3417 pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
3418 pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
3420 // after reading Registry, we now know if in AP mode or STA mode
3422 // Load 8051 firmware; crash when FW image not existent
3423 // Status = NICLoadFirmware(pAd);
3424 // if (Status != NDIS_STATUS_SUCCESS)
3427 DBGPRINT(RT_DEBUG_OFF, ("2. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3429 // We should read EEPROM for all cases. rt2860b
3430 NICReadEEPROMParameters(pAd, (PUCHAR)pDefaultMac);
3432 DBGPRINT(RT_DEBUG_OFF, ("3. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3434 NICInitAsicFromEEPROM(pAd); //rt2860b
3436 // Set PHY to appropriate mode
3437 TmpPhy = pAd->CommonCfg.PhyMode;
3438 pAd->CommonCfg.PhyMode = 0xff;
3439 RTMPSetPhyMode(pAd, TmpPhy);
3442 // No valid channels.
3443 if (pAd->ChannelListNum == 0)
3445 DBGPRINT(RT_DEBUG_ERROR, ("Wrong configuration. No valid channel found. Check \"ContryCode\" and \"ChannelGeography\" setting.\n"));
3449 DBGPRINT(RT_DEBUG_OFF, ("MCS Set = %02x %02x %02x %02x %02x\n", pAd->CommonCfg.HtCapability.MCSSet[0],
3450 pAd->CommonCfg.HtCapability.MCSSet[1], pAd->CommonCfg.HtCapability.MCSSet[2],
3451 pAd->CommonCfg.HtCapability.MCSSet[3], pAd->CommonCfg.HtCapability.MCSSet[4]));
3453 #ifdef RTMP_RF_RW_SUPPORT
3454 //Init RT30xx RFRegisters after read RFIC type from EEPROM
3455 NICInitRFRegisters(pAd);
3456 #endif // RTMP_RF_RW_SUPPORT //
3458 // APInitialize(pAd);
3462 // Initialize RF register to default value
3464 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3465 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3467 // 8051 firmware require the signal during booting time.
3468 //2008/11/28:KH marked the following codes to patch Frequency offset bug
3469 //AsicSendCommandToMcu(pAd, 0x72, 0xFF, 0x00, 0x00);
3471 if (pAd && (Status != NDIS_STATUS_SUCCESS))
3474 // Undo everything if it failed
3476 if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
3478 // NdisMDeregisterInterrupt(&pAd->Interrupt);
3479 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
3481 // RTMPFreeAdapter(pAd); // we will free it in disconnect()
3485 // Microsoft HCT require driver send a disconnect event after driver initialization.
3486 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
3487 // pAd->IndicateMediaState = NdisMediaStateDisconnected;
3488 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_MEDIA_STATE_CHANGE);
3490 DBGPRINT(RT_DEBUG_TRACE, ("NDIS_STATUS_MEDIA_DISCONNECT Event B!\n"));
3493 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS);
3494 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_REMOVE_IN_PROGRESS);
3497 // Support multiple BulkIn IRP,
3498 // the value on pAd->CommonCfg.NumOfBulkInIRP may be large than 1.
3500 for(index=0; index<pAd->CommonCfg.NumOfBulkInIRP; index++)
3502 RTUSBBulkReceive(pAd);
3503 DBGPRINT(RT_DEBUG_TRACE, ("RTUSBBulkReceive!\n" ));
3505 #endif // RTMP_MAC_USB //
3509 // Set up the Mac address
3510 RtmpOSNetDevAddrSet(pAd->net_dev, &pAd->CurrentAddress[0]);
3512 DBGPRINT_S(Status, ("<==== rt28xx_init, Status=%x\n", Status));
3521 RTMPFreeTxRxRingMemory(pAd);
3524 os_free_mem(pAd, pAd->mpdu_blk_pool.mem); // free BA pool
3526 // shall not set priv to NULL here because the priv didn't been free yet.
3527 //net_dev->ml_priv = 0;
3532 DBGPRINT(RT_DEBUG_ERROR, ("!!! rt28xx Initialized fail !!!\n"));
3535 //---Add by shiang, move from os/linux/rt_main_dev.c
3538 static INT RtmpChipOpsRegister(
3539 IN RTMP_ADAPTER *pAd,
3542 RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
3545 memset(pChipOps, 0, sizeof(RTMP_CHIP_OP));
3547 /* set eeprom related hook functions */
3548 status = RtmpChipOpsEepromHook(pAd, infType);
3550 /* set mcu related hook functions */
3553 #ifdef RTMP_PCI_SUPPORT
3554 case RTMP_DEV_INF_PCI:
3555 pChipOps->loadFirmware = RtmpAsicLoadFirmware;
3556 pChipOps->eraseFirmware = RtmpAsicEraseFirmware;
3557 pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
3559 #endif // RTMP_PCI_SUPPORT //
3560 #ifdef RTMP_USB_SUPPORT
3561 case RTMP_DEV_INF_USB:
3562 pChipOps->loadFirmware = RtmpAsicLoadFirmware;
3563 pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
3565 #endif // RTMP_USB_SUPPORT //
3574 INT RtmpRaDevCtrlInit(
3575 IN RTMP_ADAPTER *pAd,
3576 IN RTMP_INF_TYPE infType)
3580 // Assign the interface type. We need use it when do register/EEPROM access.
3581 pAd->infType = infType;
3584 pAd->OpMode = OPMODE_STA;
3585 DBGPRINT(RT_DEBUG_TRACE, ("STA Driver version-%s\n", STA_DRIVER_VERSION));
3588 init_MUTEX(&(pAd->UsbVendorReq_semaphore));
3589 os_alloc_mem(pAd, (PUCHAR)&pAd->UsbVendorReqBuf, MAX_PARAM_BUFFER_SIZE - 1);
3590 if (pAd->UsbVendorReqBuf == NULL)
3592 DBGPRINT(RT_DEBUG_ERROR, ("Allocate vendor request temp buffer failed!\n"));
3595 #endif // RTMP_MAC_USB //
3597 RtmpChipOpsRegister(pAd, infType);
3604 BOOLEAN RtmpRaDevCtrlExit(IN RTMP_ADAPTER *pAd)
3608 RTMPFreeAdapter(pAd);
3614 // not yet support MBSS
3615 PNET_DEV get_netdev_from_bssid(
3616 IN PRTMP_ADAPTER pAd,
3617 IN UCHAR FromWhichBSSID)
3619 PNET_DEV dev_p = NULL;
3622 dev_p = pAd->net_dev;
3626 return dev_p; /* return one of MBSS */