2 * Copyright (C) 2009 QUALCOMM Incorporated.
6 #include <linux/kernel.h>
8 /*Micron settings from Applications for lower power consumption.*/
9 struct reg_struct mt9p012_reg_pat[2] = {
11 /* vt_pix_clk_div REG=0x0300 */
14 /* vt_sys_clk_div REG=0x0302 */
17 /* pre_pll_clk_div REG=0x0304 */
20 /* pll_multiplier REG=0x0306 */
23 /* op_pix_clk_div REG=0x0308 */
26 /* op_sys_clk_div REG=0x030A */
29 /* scale_m REG=0x0404 */
32 /* row_speed REG=0x3016 */
35 /* x_addr_start REG=0x3004 */
38 /* x_addr_end REG=0x3008 */
41 /* y_addr_start REG=0x3002 */
44 /* y_addr_end REG=0x3006 */
47 /* read_mode REG=0x3040
48 * Preview 2x2 skipping */
51 /* x_output_size REG=0x034C */
54 /* y_output_size REG=0x034E */
57 /* line_length_pck REG=0x300C */
60 /* frame_length_lines REG=0x300A */
63 /* coarse_integration_time REG=0x3012 */
66 /* fine_integration_time REG=0x3014 */
70 /* vt_pix_clk_div REG=0x0300 */
73 /* vt_sys_clk_div REG=0x0302 */
76 /* pre_pll_clk_div REG=0x0304 */
79 /* pll_multiplier REG=0x0306
80 * 60 for 10fps snapshot */
83 /* op_pix_clk_div REG=0x0308 */
86 /* op_sys_clk_div REG=0x030A */
89 /* scale_m REG=0x0404 */
92 /* row_speed REG=0x3016 */
95 /* x_addr_start REG=0x3004 */
98 /* x_addr_end REG=0x3008 */
101 /* y_addr_start REG=0x3002 */
104 /* y_addr_end REG=0x3006 */
107 /* read_mode REG=0x3040 */
110 /* x_output_size REG=0x034C */
113 /* y_output_size REG=0x034E */
116 /* line_length_pck REG=0x300C */
119 /* frame_length_lines REG=0x300A //10 fps snapshot */
122 /* coarse_integration_time REG=0x3012 */
125 /* fine_integration_time REG=0x3014 */
131 struct mt9p012_i2c_reg_conf mt9p012_test_tbl[] = {
132 {0x3044, 0x0544 & 0xFBFF},
133 {0x30CA, 0x0004 | 0x0001},
134 {0x30D4, 0x9020 & 0x7FFF},
135 {0x31E0, 0x0003 & 0xFFFE},
136 {0x3180, 0x91FF & 0x7FFF},
137 {0x301A, (0x10CC | 0x8000) & 0xFFF7},
143 struct mt9p012_i2c_reg_conf mt9p012_lc_tbl[] = {
144 /* [Lens shading 85 Percent TL84] */
352 /* rolloff table for illuminant A */
353 struct mt9p012_i2c_reg_conf mt9p012_rolloff_tbl[] = {
562 struct mt9p012_reg mt9p012_regs = {
563 .reg_pat = &mt9p012_reg_pat[0],
564 .reg_pat_size = ARRAY_SIZE(mt9p012_reg_pat),
565 .ttbl = &mt9p012_test_tbl[0],
566 .ttbl_size = ARRAY_SIZE(mt9p012_test_tbl),
567 .lctbl = &mt9p012_lc_tbl[0],
568 .lctbl_size = ARRAY_SIZE(mt9p012_lc_tbl),
569 .rftbl = &mt9p012_rolloff_tbl[0],
570 .rftbl_size = ARRAY_SIZE(mt9p012_rolloff_tbl)