drivers/staging/dream/camera/msm_vfe8x.h

   1 /*
   2  * Copyright (C) 2008-2009 QUALCOMM Incorporated.
   3  */
   4 #ifndef __MSM_VFE8X_H__
   5 #define __MSM_VFE8X_H__
   6
   7 #define TRUE  1
   8 #define FALSE 0
   9 #define boolean uint8_t
  10
  11 enum  VFE_STATE {
  12         VFE_STATE_IDLE,
  13         VFE_STATE_ACTIVE
  14 };
  15
  16 enum vfe_cmd_id {
  17         /*
  18         *Important! Command_ID are arranged in order.
  19         *Don't change!*/
  20         VFE_CMD_ID_START,
  21         VFE_CMD_ID_RESET,
  22
  23         /* bus and camif config */
  24         VFE_CMD_ID_AXI_INPUT_CONFIG,
  25         VFE_CMD_ID_CAMIF_CONFIG,
  26         VFE_CMD_ID_AXI_OUTPUT_CONFIG,
  27
  28         /* module config  */
  29         VFE_CMD_ID_BLACK_LEVEL_CONFIG,
  30         VFE_CMD_ID_ROLL_OFF_CONFIG,
  31         VFE_CMD_ID_DEMUX_CHANNEL_GAIN_CONFIG,
  32         VFE_CMD_ID_DEMOSAIC_CONFIG,
  33         VFE_CMD_ID_FOV_CROP_CONFIG,
  34         VFE_CMD_ID_MAIN_SCALER_CONFIG,
  35         VFE_CMD_ID_WHITE_BALANCE_CONFIG,
  36         VFE_CMD_ID_COLOR_CORRECTION_CONFIG,
  37         VFE_CMD_ID_LA_CONFIG,
  38         VFE_CMD_ID_RGB_GAMMA_CONFIG,
  39         VFE_CMD_ID_CHROMA_ENHAN_CONFIG,
  40         VFE_CMD_ID_CHROMA_SUPPRESSION_CONFIG,
  41         VFE_CMD_ID_ASF_CONFIG,
  42         VFE_CMD_ID_SCALER2Y_CONFIG,
  43         VFE_CMD_ID_SCALER2CbCr_CONFIG,
  44         VFE_CMD_ID_CHROMA_SUBSAMPLE_CONFIG,
  45         VFE_CMD_ID_FRAME_SKIP_CONFIG,
  46         VFE_CMD_ID_OUTPUT_CLAMP_CONFIG,
  47
  48         /* test gen */
  49         VFE_CMD_ID_TEST_GEN_START,
  50
  51         VFE_CMD_ID_UPDATE,
  52
  53         /* ackownledge from upper layer */
  54         VFE_CMD_ID_OUTPUT1_ACK,
  55         VFE_CMD_ID_OUTPUT2_ACK,
  56         VFE_CMD_ID_EPOCH1_ACK,
  57         VFE_CMD_ID_EPOCH2_ACK,
  58         VFE_CMD_ID_STATS_AUTOFOCUS_ACK,
  59         VFE_CMD_ID_STATS_WB_EXP_ACK,
  60
  61         /* module update commands */
  62         VFE_CMD_ID_BLACK_LEVEL_UPDATE,
  63         VFE_CMD_ID_DEMUX_CHANNEL_GAIN_UPDATE,
  64         VFE_CMD_ID_DEMOSAIC_BPC_UPDATE,
  65         VFE_CMD_ID_DEMOSAIC_ABF_UPDATE,
  66         VFE_CMD_ID_FOV_CROP_UPDATE,
  67         VFE_CMD_ID_WHITE_BALANCE_UPDATE,
  68         VFE_CMD_ID_COLOR_CORRECTION_UPDATE,
  69         VFE_CMD_ID_LA_UPDATE,
  70         VFE_CMD_ID_RGB_GAMMA_UPDATE,
  71         VFE_CMD_ID_CHROMA_ENHAN_UPDATE,
  72         VFE_CMD_ID_CHROMA_SUPPRESSION_UPDATE,
  73         VFE_CMD_ID_MAIN_SCALER_UPDATE,
  74         VFE_CMD_ID_SCALER2CbCr_UPDATE,
  75         VFE_CMD_ID_SCALER2Y_UPDATE,
  76         VFE_CMD_ID_ASF_UPDATE,
  77         VFE_CMD_ID_FRAME_SKIP_UPDATE,
  78         VFE_CMD_ID_CAMIF_FRAME_UPDATE,
  79
  80         /* stats update commands */
  81         VFE_CMD_ID_STATS_AUTOFOCUS_UPDATE,
  82         VFE_CMD_ID_STATS_WB_EXP_UPDATE,
  83
  84         /* control of start, stop, update, etc... */
  85   VFE_CMD_ID_STOP,
  86         VFE_CMD_ID_GET_HW_VERSION,
  87
  88         /* stats */
  89         VFE_CMD_ID_STATS_SETTING,
  90         VFE_CMD_ID_STATS_AUTOFOCUS_START,
  91         VFE_CMD_ID_STATS_AUTOFOCUS_STOP,
  92         VFE_CMD_ID_STATS_WB_EXP_START,
  93         VFE_CMD_ID_STATS_WB_EXP_STOP,
  94
  95         VFE_CMD_ID_ASYNC_TIMER_SETTING,
  96
  97         /* max id  */
  98         VFE_CMD_ID_MAX
  99 };
 100
 101 struct vfe_cmd_hw_version {
 102         uint32_t minorVersion;
 103         uint32_t majorVersion;
 104         uint32_t coreVersion;
 105 };
 106
 107 enum VFE_CAMIF_SYNC_EDGE {
 108         VFE_CAMIF_SYNC_EDGE_ActiveHigh,
 109         VFE_CAMIF_SYNC_EDGE_ActiveLow
 110 };
 111
 112 enum VFE_CAMIF_SYNC_MODE {
 113         VFE_CAMIF_SYNC_MODE_APS,
 114         VFE_CAMIF_SYNC_MODE_EFS,
 115         VFE_CAMIF_SYNC_MODE_ELS,
 116         VFE_CAMIF_SYNC_MODE_ILLEGAL
 117 };
 118
 119 struct vfe_cmds_camif_efs {
 120         uint8_t efsendofline;
 121         uint8_t efsstartofline;
 122         uint8_t efsendofframe;
 123         uint8_t efsstartofframe;
 124 };
 125
 126 struct vfe_cmds_camif_frame {
 127         uint16_t pixelsPerLine;
 128         uint16_t linesPerFrame;
 129 };
 130
 131 struct vfe_cmds_camif_window {
 132         uint16_t firstpixel;
 133         uint16_t lastpixel;
 134         uint16_t firstline;
 135         uint16_t lastline;
 136 };
 137
 138 enum CAMIF_SUBSAMPLE_FRAME_SKIP {
 139         CAMIF_SUBSAMPLE_FRAME_SKIP_0,
 140         CAMIF_SUBSAMPLE_FRAME_SKIP_AllFrames,
 141         CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_2Frame,
 142         CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_3Frame,
 143         CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_4Frame,
 144         CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_5Frame,
 145         CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_6Frame,
 146         CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_7Frame,
 147         CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_8Frame,
 148         CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_9Frame,
 149         CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_10Frame,
 150         CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_11Frame,
 151         CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_12Frame,
 152         CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_13Frame,
 153         CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_14Frame,
 154         CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_15Frame
 155 };
 156
 157 struct vfe_cmds_camif_subsample {
 158         uint16_t pixelskipmask;
 159         uint16_t lineskipmask;
 160         enum CAMIF_SUBSAMPLE_FRAME_SKIP frameskip;
 161         uint8_t frameskipmode;
 162         uint8_t pixelskipwrap;
 163 };
 164
 165 struct vfe_cmds_camif_epoch {
 166         uint8_t  enable;
 167         uint16_t lineindex;
 168 };
 169
 170 struct vfe_cmds_camif_cfg {
 171         enum VFE_CAMIF_SYNC_EDGE  vSyncEdge;
 172         enum VFE_CAMIF_SYNC_EDGE  hSyncEdge;
 173         enum VFE_CAMIF_SYNC_MODE  syncMode;
 174         uint8_t vfeSubSampleEnable;
 175         uint8_t busSubSampleEnable;
 176         uint8_t irqSubSampleEnable;
 177         uint8_t binningEnable;
 178         uint8_t misrEnable;
 179 };
 180
 181 struct vfe_cmd_camif_config {
 182         struct vfe_cmds_camif_cfg camifConfig;
 183         struct vfe_cmds_camif_efs EFS;
 184         struct vfe_cmds_camif_frame     frame;
 185         struct vfe_cmds_camif_window    window;
 186         struct vfe_cmds_camif_subsample subsample;
 187         struct vfe_cmds_camif_epoch     epoch1;
 188         struct vfe_cmds_camif_epoch     epoch2;
 189 };
 190
 191 enum VFE_AXI_OUTPUT_MODE {
 192         VFE_AXI_OUTPUT_MODE_Output1,
 193         VFE_AXI_OUTPUT_MODE_Output2,
 194         VFE_AXI_OUTPUT_MODE_Output1AndOutput2,
 195         VFE_AXI_OUTPUT_MODE_CAMIFToAXIViaOutput2,
 196         VFE_AXI_OUTPUT_MODE_Output2AndCAMIFToAXIViaOutput1,
 197         VFE_AXI_OUTPUT_MODE_Output1AndCAMIFToAXIViaOutput2,
 198         VFE_AXI_LAST_OUTPUT_MODE_ENUM
 199 };
 200
 201 enum VFE_RAW_WR_PATH_SEL {
 202         VFE_RAW_OUTPUT_DISABLED,
 203         VFE_RAW_OUTPUT_ENC_CBCR_PATH,
 204         VFE_RAW_OUTPUT_VIEW_CBCR_PATH,
 205         VFE_RAW_OUTPUT_PATH_INVALID
 206 };
 207
 208 enum VFE_RAW_PIXEL_DATA_SIZE {
 209         VFE_RAW_PIXEL_DATA_SIZE_8BIT,
 210         VFE_RAW_PIXEL_DATA_SIZE_10BIT,
 211         VFE_RAW_PIXEL_DATA_SIZE_12BIT,
 212 };
 213
 214 #define VFE_AXI_OUTPUT_BURST_LENGTH     4
 215 #define VFE_MAX_NUM_FRAGMENTS_PER_FRAME 4
 216 #define VFE_AXI_OUTPUT_CFG_FRAME_COUNT  3
 217
 218 struct vfe_cmds_axi_out_per_component {
 219         uint16_t imageWidth;
 220         uint16_t imageHeight;
 221         uint16_t outRowCount;
 222         uint16_t outRowIncrement;
 223         uint32_t outFragments[VFE_AXI_OUTPUT_CFG_FRAME_COUNT]
 224                 [VFE_MAX_NUM_FRAGMENTS_PER_FRAME];
 225 };
 226
 227 struct vfe_cmds_axi_per_output_path {
 228         uint8_t fragmentCount;
 229         struct vfe_cmds_axi_out_per_component outputY;
 230         struct vfe_cmds_axi_out_per_component outputCbcr;
 231 };
 232
 233 enum VFE_AXI_BURST_LENGTH {
 234         VFE_AXI_BURST_LENGTH_IS_2  = 2,
 235         VFE_AXI_BURST_LENGTH_IS_4  = 4,
 236         VFE_AXI_BURST_LENGTH_IS_8  = 8,
 237         VFE_AXI_BURST_LENGTH_IS_16 = 16
 238 };
 239
 240 struct vfe_cmd_axi_output_config {
 241         enum VFE_AXI_BURST_LENGTH burstLength;
 242         enum VFE_AXI_OUTPUT_MODE outputMode;
 243         enum VFE_RAW_PIXEL_DATA_SIZE outputDataSize;
 244         struct vfe_cmds_axi_per_output_path output1;
 245         struct vfe_cmds_axi_per_output_path output2;
 246 };
 247
 248 struct vfe_cmd_fov_crop_config {
 249         uint8_t enable;
 250         uint16_t firstPixel;
 251         uint16_t lastPixel;
 252         uint16_t firstLine;
 253         uint16_t lastLine;
 254 };
 255
 256 struct vfe_cmds_main_scaler_stripe_init {
 257         uint16_t MNCounterInit;
 258         uint16_t phaseInit;
 259 };
 260
 261 struct vfe_cmds_scaler_one_dimension {
 262         uint8_t  enable;
 263         uint16_t inputSize;
 264         uint16_t outputSize;
 265         uint32_t phaseMultiplicationFactor;
 266         uint8_t  interpolationResolution;
 267 };
 268
 269 struct vfe_cmd_main_scaler_config {
 270         uint8_t enable;
 271         struct vfe_cmds_scaler_one_dimension    hconfig;
 272         struct vfe_cmds_scaler_one_dimension    vconfig;
 273         struct vfe_cmds_main_scaler_stripe_init MNInitH;
 274         struct vfe_cmds_main_scaler_stripe_init MNInitV;
 275 };
 276
 277 struct vfe_cmd_scaler2_config {
 278         uint8_t enable;
 279         struct vfe_cmds_scaler_one_dimension hconfig;
 280         struct vfe_cmds_scaler_one_dimension vconfig;
 281 };
 282
 283 struct vfe_cmd_frame_skip_config {
 284         uint8_t output1Period;
 285         uint32_t output1Pattern;
 286         uint8_t output2Period;
 287         uint32_t output2Pattern;
 288 };
 289
 290 struct vfe_cmd_frame_skip_update {
 291         uint32_t output1Pattern;
 292         uint32_t output2Pattern;
 293 };
 294
 295 struct vfe_cmd_output_clamp_config {
 296         uint8_t minCh0;
 297         uint8_t minCh1;
 298         uint8_t minCh2;
 299         uint8_t maxCh0;
 300         uint8_t maxCh1;
 301         uint8_t maxCh2;
 302 };
 303
 304 struct vfe_cmd_chroma_subsample_config {
 305         uint8_t enable;
 306         uint8_t cropEnable;
 307         uint8_t vsubSampleEnable;
 308         uint8_t hsubSampleEnable;
 309         uint8_t vCosited;
 310         uint8_t hCosited;
 311         uint8_t vCositedPhase;
 312         uint8_t hCositedPhase;
 313         uint16_t cropWidthFirstPixel;
 314         uint16_t cropWidthLastPixel;
 315         uint16_t cropHeightFirstLine;
 316         uint16_t cropHeightLastLine;
 317 };
 318
 319 enum VFE_START_INPUT_SOURCE {
 320         VFE_START_INPUT_SOURCE_CAMIF,
 321         VFE_START_INPUT_SOURCE_TESTGEN,
 322         VFE_START_INPUT_SOURCE_AXI,
 323         VFE_START_INPUT_SOURCE_INVALID
 324 };
 325
 326 enum VFE_START_OPERATION_MODE {
 327         VFE_START_OPERATION_MODE_CONTINUOUS,
 328         VFE_START_OPERATION_MODE_SNAPSHOT
 329 };
 330
 331 enum VFE_START_PIXEL_PATTERN {
 332         VFE_BAYER_RGRGRG,
 333         VFE_BAYER_GRGRGR,
 334         VFE_BAYER_BGBGBG,
 335         VFE_BAYER_GBGBGB,
 336         VFE_YUV_YCbYCr,
 337         VFE_YUV_YCrYCb,
 338         VFE_YUV_CbYCrY,
 339         VFE_YUV_CrYCbY
 340 };
 341
 342 enum VFE_BUS_RD_INPUT_PIXEL_PATTERN {
 343         VFE_BAYER_RAW,
 344         VFE_YUV_INTERLEAVED,
 345         VFE_YUV_PSEUDO_PLANAR_Y,
 346         VFE_YUV_PSEUDO_PLANAR_CBCR
 347 };
 348
 349 enum VFE_YUV_INPUT_COSITING_MODE {
 350         VFE_YUV_COSITED,
 351         VFE_YUV_INTERPOLATED
 352 };
 353
 354 struct vfe_cmd_start {
 355         enum VFE_START_INPUT_SOURCE inputSource;
 356         enum VFE_START_OPERATION_MODE operationMode;
 357         uint8_t     snapshotCount;
 358         enum VFE_START_PIXEL_PATTERN pixel;
 359         enum VFE_YUV_INPUT_COSITING_MODE yuvInputCositingMode;
 360 };
 361
 362 struct vfe_cmd_output_ack {
 363         uint32_t ybufaddr[VFE_MAX_NUM_FRAGMENTS_PER_FRAME];
 364         uint32_t chromabufaddr[VFE_MAX_NUM_FRAGMENTS_PER_FRAME];
 365 };
 366
 367 #define VFE_STATS_BUFFER_COUNT 3
 368
 369 struct vfe_cmd_stats_setting {
 370         uint16_t frameHDimension;
 371         uint16_t frameVDimension;
 372         uint8_t  afBusPrioritySelection;
 373         uint8_t  afBusPriority;
 374         uint8_t  awbBusPrioritySelection;
 375         uint8_t  awbBusPriority;
 376         uint8_t  histBusPrioritySelection;
 377         uint8_t  histBusPriority;
 378         uint32_t afBuffer[VFE_STATS_BUFFER_COUNT];
 379         uint32_t awbBuffer[VFE_STATS_BUFFER_COUNT];
 380         uint32_t histBuffer[VFE_STATS_BUFFER_COUNT];
 381 };
 382
 383 struct vfe_cmd_stats_af_start {
 384         uint8_t  enable;
 385         uint8_t  windowMode;
 386         uint16_t windowHOffset;
 387         uint16_t windowVOffset;
 388         uint16_t windowWidth;
 389         uint16_t windowHeight;
 390         uint8_t  gridForMultiWindows[16];
 391         uint8_t     metricSelection;
 392         int16_t  metricMax;
 393         int8_t   highPassCoef[7];
 394         int8_t   bufferHeader;
 395 };
 396
 397 struct vfe_cmd_stats_af_update {
 398         uint8_t  windowMode;
 399         uint16_t windowHOffset;
 400         uint16_t windowVOffset;
 401         uint16_t windowWidth;
 402         uint16_t windowHeight;
 403 };
 404
 405 struct vfe_cmd_stats_wb_exp_start {
 406         uint8_t   enable;
 407         uint8_t   wbExpRegions;
 408         uint8_t   wbExpSubRegion;
 409         uint8_t   awbYMin;
 410         uint8_t   awbYMax;
 411         int8_t    awbMCFG[4];
 412         int16_t   awbCCFG[4];
 413         int8_t    axwHeader;
 414 };
 415
 416 struct vfe_cmd_stats_wb_exp_update {
 417         uint8_t wbExpRegions;
 418         uint8_t wbExpSubRegion;
 419         int8_t  awbYMin;
 420         int8_t  awbYMax;
 421         int8_t  awbMCFG[4];
 422         int16_t awbCCFG[4];
 423 };
 424
 425 struct vfe_cmd_stats_af_ack {
 426         uint32_t nextAFOutputBufferAddr;
 427 };
 428
 429 struct vfe_cmd_stats_wb_exp_ack {
 430         uint32_t  nextWbExpOutputBufferAddr;
 431 };
 432
 433 struct vfe_cmd_black_level_config {
 434         uint8_t  enable;
 435         uint16_t evenEvenAdjustment;
 436         uint16_t evenOddAdjustment;
 437         uint16_t oddEvenAdjustment;
 438         uint16_t oddOddAdjustment;
 439 };
 440
 441 /* 13*1  */
 442 #define  VFE_ROLL_OFF_INIT_TABLE_SIZE  13
 443 /* 13*16 */
 444 #define  VFE_ROLL_OFF_DELTA_TABLE_SIZE 208
 445
 446 struct vfe_cmd_roll_off_config {
 447         uint8_t  enable;
 448         uint16_t gridWidth;
 449         uint16_t gridHeight;
 450         uint16_t  yDelta;
 451         uint8_t  gridXIndex;
 452         uint8_t  gridYIndex;
 453         uint16_t gridPixelXIndex;
 454         uint16_t gridPixelYIndex;
 455         uint16_t yDeltaAccum;
 456         uint16_t initTableR[VFE_ROLL_OFF_INIT_TABLE_SIZE];
 457         uint16_t initTableGr[VFE_ROLL_OFF_INIT_TABLE_SIZE];
 458         uint16_t initTableB[VFE_ROLL_OFF_INIT_TABLE_SIZE];
 459         uint16_t initTableGb[VFE_ROLL_OFF_INIT_TABLE_SIZE];
 460         int16_t  deltaTableR[VFE_ROLL_OFF_DELTA_TABLE_SIZE];
 461         int16_t  deltaTableGr[VFE_ROLL_OFF_DELTA_TABLE_SIZE];
 462         int16_t  deltaTableB[VFE_ROLL_OFF_DELTA_TABLE_SIZE];
 463         int16_t  deltaTableGb[VFE_ROLL_OFF_DELTA_TABLE_SIZE];
 464 };
 465
 466 struct vfe_cmd_demux_channel_gain_config {
 467         uint16_t ch0EvenGain;
 468         uint16_t ch0OddGain;
 469         uint16_t ch1Gain;
 470         uint16_t ch2Gain;
 471 };
 472
 473 struct vfe_cmds_demosaic_abf {
 474         uint8_t   enable;
 475         uint8_t   forceOn;
 476         uint8_t   shift;
 477         uint16_t  lpThreshold;
 478         uint16_t  max;
 479         uint16_t  min;
 480         uint8_t   ratio;
 481 };
 482
 483 struct vfe_cmds_demosaic_bpc {
 484         uint8_t   enable;
 485         uint16_t  fmaxThreshold;
 486         uint16_t  fminThreshold;
 487         uint16_t  redDiffThreshold;
 488         uint16_t  blueDiffThreshold;
 489         uint16_t  greenDiffThreshold;
 490 };
 491
 492 struct vfe_cmd_demosaic_config {
 493         uint8_t   enable;
 494         uint8_t   slopeShift;
 495         struct vfe_cmds_demosaic_abf abfConfig;
 496         struct vfe_cmds_demosaic_bpc bpcConfig;
 497 };
 498
 499 struct vfe_cmd_demosaic_bpc_update {
 500         struct vfe_cmds_demosaic_bpc bpcUpdate;
 501 };
 502
 503 struct vfe_cmd_demosaic_abf_update {
 504         struct vfe_cmds_demosaic_abf abfUpdate;
 505 };
 506
 507 struct vfe_cmd_white_balance_config {
 508         uint8_t  enable;
 509         uint16_t ch2Gain;
 510         uint16_t ch1Gain;
 511         uint16_t ch0Gain;
 512 };
 513
 514 enum VFE_COLOR_CORRECTION_COEF_QFACTOR {
 515         COEF_IS_Q7_SIGNED,
 516         COEF_IS_Q8_SIGNED,
 517         COEF_IS_Q9_SIGNED,
 518         COEF_IS_Q10_SIGNED
 519 };
 520
 521 struct vfe_cmd_color_correction_config {
 522         uint8_t     enable;
 523         enum VFE_COLOR_CORRECTION_COEF_QFACTOR coefQFactor;
 524         int16_t  C0;
 525         int16_t  C1;
 526         int16_t  C2;
 527         int16_t  C3;
 528         int16_t  C4;
 529         int16_t  C5;
 530         int16_t  C6;
 531         int16_t  C7;
 532         int16_t  C8;
 533         int16_t  K0;
 534         int16_t  K1;
 535         int16_t  K2;
 536 };
 537
 538 #define VFE_LA_TABLE_LENGTH 256
 539 struct vfe_cmd_la_config {
 540         uint8_t enable;
 541         int16_t table[VFE_LA_TABLE_LENGTH];
 542 };
 543
 544 #define VFE_GAMMA_TABLE_LENGTH 256
 545 enum VFE_RGB_GAMMA_TABLE_SELECT {
 546         RGB_GAMMA_CH0_SELECTED,
 547         RGB_GAMMA_CH1_SELECTED,
 548         RGB_GAMMA_CH2_SELECTED,
 549         RGB_GAMMA_CH0_CH1_SELECTED,
 550         RGB_GAMMA_CH0_CH2_SELECTED,
 551         RGB_GAMMA_CH1_CH2_SELECTED,
 552         RGB_GAMMA_CH0_CH1_CH2_SELECTED
 553 };
 554
 555 struct vfe_cmd_rgb_gamma_config {
 556         uint8_t enable;
 557         enum VFE_RGB_GAMMA_TABLE_SELECT channelSelect;
 558         int16_t table[VFE_GAMMA_TABLE_LENGTH];
 559 };
 560
 561 struct vfe_cmd_chroma_enhan_config {
 562         uint8_t  enable;
 563         int16_t am;
 564         int16_t ap;
 565         int16_t bm;
 566         int16_t bp;
 567         int16_t cm;
 568         int16_t cp;
 569         int16_t dm;
 570         int16_t dp;
 571         int16_t kcr;
 572         int16_t kcb;
 573         int16_t RGBtoYConversionV0;
 574         int16_t RGBtoYConversionV1;
 575         int16_t RGBtoYConversionV2;
 576         uint8_t RGBtoYConversionOffset;
 577 };
 578
 579 struct vfe_cmd_chroma_suppression_config {
 580         uint8_t enable;
 581         uint8_t m1;
 582         uint8_t m3;
 583         uint8_t n1;
 584         uint8_t n3;
 585         uint8_t nn1;
 586         uint8_t mm1;
 587 };
 588
 589 struct vfe_cmd_asf_config {
 590         uint8_t enable;
 591         uint8_t smoothFilterEnabled;
 592         uint8_t sharpMode;
 593         uint8_t smoothCoefCenter;
 594         uint8_t smoothCoefSurr;
 595         uint8_t normalizeFactor;
 596         uint8_t sharpK1;
 597         uint8_t sharpK2;
 598         uint8_t sharpThreshE1;
 599         int8_t sharpThreshE2;
 600         int8_t sharpThreshE3;
 601         int8_t sharpThreshE4;
 602         int8_t sharpThreshE5;
 603         int8_t filter1Coefficients[9];
 604         int8_t filter2Coefficients[9];
 605         uint8_t  cropEnable;
 606         uint16_t cropFirstPixel;
 607         uint16_t cropLastPixel;
 608         uint16_t cropFirstLine;
 609         uint16_t cropLastLine;
 610 };
 611
 612 struct vfe_cmd_asf_update {
 613         uint8_t enable;
 614         uint8_t smoothFilterEnabled;
 615         uint8_t sharpMode;
 616         uint8_t smoothCoefCenter;
 617         uint8_t smoothCoefSurr;
 618         uint8_t normalizeFactor;
 619         uint8_t sharpK1;
 620         uint8_t sharpK2;
 621         uint8_t sharpThreshE1;
 622         int8_t  sharpThreshE2;
 623         int8_t  sharpThreshE3;
 624         int8_t  sharpThreshE4;
 625         int8_t  sharpThreshE5;
 626         int8_t  filter1Coefficients[9];
 627         int8_t  filter2Coefficients[9];
 628         uint8_t cropEnable;
 629 };
 630
 631 enum VFE_TEST_GEN_SYNC_EDGE {
 632         VFE_TEST_GEN_SYNC_EDGE_ActiveHigh,
 633         VFE_TEST_GEN_SYNC_EDGE_ActiveLow
 634 };
 635
 636 struct vfe_cmd_test_gen_start {
 637         uint8_t pixelDataSelect;
 638         uint8_t systematicDataSelect;
 639         enum VFE_TEST_GEN_SYNC_EDGE  hsyncEdge;
 640         enum VFE_TEST_GEN_SYNC_EDGE  vsyncEdge;
 641         uint16_t numFrame;
 642         enum VFE_RAW_PIXEL_DATA_SIZE pixelDataSize;
 643         uint16_t imageWidth;
 644         uint16_t imageHeight;
 645         uint32_t startOfFrameOffset;
 646         uint32_t endOfFrameNOffset;
 647         uint16_t startOfLineOffset;
 648         uint16_t endOfLineNOffset;
 649         uint16_t hbi;
 650         uint8_t  vblEnable;
 651         uint16_t vbl;
 652         uint8_t  startOfFrameDummyLine;
 653         uint8_t  endOfFrameDummyLine;
 654         uint8_t  unicolorBarEnable;
 655         uint8_t  colorBarsSplitEnable;
 656         uint8_t  unicolorBarSelect;
 657         enum VFE_START_PIXEL_PATTERN  colorBarsPixelPattern;
 658         uint8_t  colorBarsRotatePeriod;
 659         uint16_t testGenRandomSeed;
 660 };
 661
 662 struct vfe_cmd_bus_pm_start {
 663         uint8_t output2YWrPmEnable;
 664         uint8_t output2CbcrWrPmEnable;
 665         uint8_t output1YWrPmEnable;
 666         uint8_t output1CbcrWrPmEnable;
 667 };
 668
 669 struct vfe_cmd_camif_frame_update {
 670         struct vfe_cmds_camif_frame camifFrame;
 671 };
 672
 673 struct vfe_cmd_sync_timer_setting {
 674         uint8_t  whichSyncTimer;
 675         uint8_t  operation;
 676         uint8_t  polarity;
 677         uint16_t repeatCount;
 678         uint16_t hsyncCount;
 679         uint32_t pclkCount;
 680         uint32_t outputDuration;
 681 };
 682
 683 struct vfe_cmd_async_timer_setting {
 684         uint8_t  whichAsyncTimer;
 685         uint8_t  operation;
 686         uint8_t  polarity;
 687         uint16_t repeatCount;
 688         uint16_t inactiveCount;
 689         uint32_t activeCount;
 690 };
 691
 692 struct  vfe_frame_skip_counts {
 693         uint32_t  totalFrameCount;
 694         uint32_t  output1Count;
 695         uint32_t  output2Count;
 696 };
 697
 698 enum VFE_AXI_RD_UNPACK_HBI_SEL {
 699         VFE_AXI_RD_HBI_32_CLOCK_CYCLES,
 700         VFE_AXI_RD_HBI_64_CLOCK_CYCLES,
 701         VFE_AXI_RD_HBI_128_CLOCK_CYCLES,
 702         VFE_AXI_RD_HBI_256_CLOCK_CYCLES,
 703         VFE_AXI_RD_HBI_512_CLOCK_CYCLES,
 704         VFE_AXI_RD_HBI_1024_CLOCK_CYCLES,
 705         VFE_AXI_RD_HBI_2048_CLOCK_CYCLES,
 706         VFE_AXI_RD_HBI_4096_CLOCK_CYCLES
 707 };
 708
 709 struct vfe_cmd_axi_input_config {
 710         uint32_t  fragAddr[4];
 711         uint8_t   totalFragmentCount;
 712         uint16_t  ySize;
 713         uint16_t  xOffset;
 714         uint16_t  xSize;
 715         uint16_t  rowIncrement;
 716         uint16_t  numOfRows;
 717         enum VFE_AXI_BURST_LENGTH burstLength;
 718         uint8_t   unpackPhase;
 719         enum VFE_AXI_RD_UNPACK_HBI_SEL unpackHbi;
 720         enum VFE_RAW_PIXEL_DATA_SIZE   pixelSize;
 721         uint8_t   padRepeatCountLeft;
 722         uint8_t   padRepeatCountRight;
 723         uint8_t   padRepeatCountTop;
 724         uint8_t   padRepeatCountBottom;
 725         uint8_t   padLeftComponentSelectCycle0;
 726         uint8_t   padLeftComponentSelectCycle1;
 727         uint8_t   padLeftComponentSelectCycle2;
 728         uint8_t   padLeftComponentSelectCycle3;
 729         uint8_t   padLeftStopCycle0;
 730         uint8_t   padLeftStopCycle1;
 731         uint8_t   padLeftStopCycle2;
 732         uint8_t   padLeftStopCycle3;
 733         uint8_t   padRightComponentSelectCycle0;
 734         uint8_t   padRightComponentSelectCycle1;
 735         uint8_t   padRightComponentSelectCycle2;
 736         uint8_t   padRightComponentSelectCycle3;
 737         uint8_t   padRightStopCycle0;
 738         uint8_t   padRightStopCycle1;
 739         uint8_t   padRightStopCycle2;
 740         uint8_t   padRightStopCycle3;
 741         uint8_t   padTopLineCount;
 742         uint8_t   padBottomLineCount;
 743 };
 744
 745 struct vfe_interrupt_status {
 746         uint8_t camifErrorIrq;
 747         uint8_t camifSofIrq;
 748         uint8_t camifEolIrq;
 749         uint8_t camifEofIrq;
 750         uint8_t camifEpoch1Irq;
 751         uint8_t camifEpoch2Irq;
 752         uint8_t camifOverflowIrq;
 753         uint8_t ceIrq;
 754         uint8_t regUpdateIrq;
 755         uint8_t resetAckIrq;
 756         uint8_t encYPingpongIrq;
 757         uint8_t encCbcrPingpongIrq;
 758         uint8_t viewYPingpongIrq;
 759         uint8_t viewCbcrPingpongIrq;
 760         uint8_t rdPingpongIrq;
 761         uint8_t afPingpongIrq;
 762         uint8_t awbPingpongIrq;
 763         uint8_t histPingpongIrq;
 764         uint8_t encIrq;
 765         uint8_t viewIrq;
 766         uint8_t busOverflowIrq;
 767         uint8_t afOverflowIrq;
 768         uint8_t awbOverflowIrq;
 769         uint8_t syncTimer0Irq;
 770         uint8_t syncTimer1Irq;
 771         uint8_t syncTimer2Irq;
 772         uint8_t asyncTimer0Irq;
 773         uint8_t asyncTimer1Irq;
 774         uint8_t asyncTimer2Irq;
 775         uint8_t asyncTimer3Irq;
 776         uint8_t axiErrorIrq;
 777         uint8_t violationIrq;
 778         uint8_t anyErrorIrqs;
 779         uint8_t anyOutput1PathIrqs;
 780         uint8_t anyOutput2PathIrqs;
 781         uint8_t anyOutputPathIrqs;
 782         uint8_t anyAsyncTimerIrqs;
 783         uint8_t anySyncTimerIrqs;
 784         uint8_t anyIrqForActiveStatesOnly;
 785 };
 786
 787 enum VFE_MESSAGE_ID {
 788         VFE_MSG_ID_RESET_ACK,
 789         VFE_MSG_ID_START_ACK,
 790         VFE_MSG_ID_STOP_ACK,
 791         VFE_MSG_ID_UPDATE_ACK,
 792         VFE_MSG_ID_OUTPUT1,
 793         VFE_MSG_ID_OUTPUT2,
 794         VFE_MSG_ID_SNAPSHOT_DONE,
 795         VFE_MSG_ID_STATS_AUTOFOCUS,
 796         VFE_MSG_ID_STATS_WB_EXP,
 797         VFE_MSG_ID_EPOCH1,
 798         VFE_MSG_ID_EPOCH2,
 799         VFE_MSG_ID_SYNC_TIMER0_DONE,
 800         VFE_MSG_ID_SYNC_TIMER1_DONE,
 801         VFE_MSG_ID_SYNC_TIMER2_DONE,
 802         VFE_MSG_ID_ASYNC_TIMER0_DONE,
 803         VFE_MSG_ID_ASYNC_TIMER1_DONE,
 804         VFE_MSG_ID_ASYNC_TIMER2_DONE,
 805         VFE_MSG_ID_ASYNC_TIMER3_DONE,
 806         VFE_MSG_ID_AF_OVERFLOW,
 807         VFE_MSG_ID_AWB_OVERFLOW,
 808         VFE_MSG_ID_AXI_ERROR,
 809         VFE_MSG_ID_CAMIF_OVERFLOW,
 810         VFE_MSG_ID_VIOLATION,
 811         VFE_MSG_ID_CAMIF_ERROR,
 812         VFE_MSG_ID_BUS_OVERFLOW,
 813 };
 814
 815 struct vfe_msg_stats_autofocus {
 816         uint32_t    afBuffer;
 817         uint32_t    frameCounter;
 818 };
 819
 820 struct vfe_msg_stats_wb_exp {
 821         uint32_t awbBuffer;
 822         uint32_t frameCounter;
 823 };
 824
 825 struct vfe_frame_bpc_info {
 826         uint32_t greenDefectPixelCount;
 827         uint32_t redBlueDefectPixelCount;
 828 };
 829
 830 struct vfe_frame_asf_info {
 831         uint32_t  asfMaxEdge;
 832         uint32_t  asfHbiCount;
 833 };
 834
 835 struct vfe_msg_camif_status {
 836         uint8_t  camifState;
 837         uint32_t pixelCount;
 838         uint32_t lineCount;
 839 };
 840
 841 struct vfe_bus_pm_per_path {
 842         uint32_t yWrPmStats0;
 843         uint32_t yWrPmStats1;
 844         uint32_t cbcrWrPmStats0;
 845         uint32_t cbcrWrPmStats1;
 846 };
 847
 848 struct vfe_bus_performance_monitor {
 849         struct vfe_bus_pm_per_path encPathPmInfo;
 850         struct vfe_bus_pm_per_path viewPathPmInfo;
 851 };
 852
 853 struct vfe_irq_thread_msg {
 854         uint32_t  vfeIrqStatus;
 855         uint32_t  camifStatus;
 856         uint32_t  demosaicStatus;
 857         uint32_t  asfMaxEdge;
 858         struct vfe_bus_performance_monitor pmInfo;
 859 };
 860
 861 struct vfe_msg_output {
 862         uint32_t  yBuffer;
 863         uint32_t  cbcrBuffer;
 864         struct vfe_frame_bpc_info bpcInfo;
 865         struct vfe_frame_asf_info asfInfo;
 866         uint32_t  frameCounter;
 867         struct vfe_bus_pm_per_path pmData;
 868 };
 869
 870 struct vfe_message {
 871         enum VFE_MESSAGE_ID _d;
 872         union {
 873                 struct vfe_msg_output              msgOutput1;
 874                 struct vfe_msg_output              msgOutput2;
 875                 struct vfe_msg_stats_autofocus     msgStatsAf;
 876                 struct vfe_msg_stats_wb_exp        msgStatsWbExp;
 877                 struct vfe_msg_camif_status        msgCamifError;
 878                 struct vfe_bus_performance_monitor msgBusOverflow;
 879    } _u;
 880 };
 881
 882 /* New one for 8k */
 883 struct msm_vfe_command_8k {
 884         int32_t  id;
 885         uint16_t length;
 886         void     *value;
 887 };
 888
 889 struct vfe_frame_extra {
 890         struct vfe_frame_bpc_info bpcInfo;
 891         struct vfe_frame_asf_info asfInfo;
 892         uint32_t  frameCounter;
 893         struct vfe_bus_pm_per_path pmData;
 894 };
 895 #endif /* __MSM_VFE8X_H__ */