2 * Blackfin On-Chip Sport Emulated UART Driver
4 * Copyright 2006-2009 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
12 * This driver and the hardware supported are in term of EE-191 of ADI.
13 * http://www.analog.com/UploadedFiles/Application_Notes/399447663EE191.pdf
14 * This application note describe how to implement a UART on a Sharc DSP,
15 * but this driver is implemented on Blackfin Processor.
16 * Transmit Frame Sync is not used by this driver to transfer data out.
21 #define DRV_NAME "bfin-sport-uart"
22 #define DEVICE_NAME "ttySS"
23 #define pr_fmt(fmt) DRV_NAME ": " fmt
25 #include <linux/module.h>
26 #include <linux/ioport.h>
28 #include <linux/init.h>
29 #include <linux/console.h>
30 #include <linux/sysrq.h>
31 #include <linux/slab.h>
32 #include <linux/platform_device.h>
33 #include <linux/tty.h>
34 #include <linux/tty_flip.h>
35 #include <linux/serial_core.h>
37 #include <asm/delay.h>
38 #include <asm/portmux.h>
40 #include "bfin_sport_uart.h"
42 struct sport_uart_port {
43 struct uart_port port;
46 unsigned short rxmask;
47 unsigned short txmask1;
48 unsigned short txmask2;
50 /* unsigned char parib; */
51 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
57 static void sport_uart_tx_chars(struct sport_uart_port *up);
58 static void sport_stop_tx(struct uart_port *port);
60 static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value)
62 pr_debug("%s value:%x, mask1=0x%x, mask2=0x%x\n", __func__, value,
63 up->txmask1, up->txmask2);
65 /* Place Start and Stop bits */
66 __asm__ __volatile__ (
68 "%[val] = %[val] & %[mask1];"
69 "%[val] = %[val] | %[mask2];"
71 : [mask1]"d"(up->txmask1), [mask2]"d"(up->txmask2)
74 pr_debug("%s value:%x\n", __func__, value);
76 SPORT_PUT_TX(up, value);
79 static inline unsigned char rx_one_byte(struct sport_uart_port *up)
82 unsigned char extract;
83 u32 tmp_mask1, tmp_mask2, tmp_shift, tmp;
85 if ((up->csize + up->stopb) > 7)
86 value = SPORT_GET_RX32(up);
88 value = SPORT_GET_RX(up);
90 pr_debug("%s value:%x, cs=%d, mask=0x%x\n", __func__, value,
91 up->csize, up->rxmask);
94 __asm__ __volatile__ (
96 "%[mask1] = %[rxmask];"
97 "%[mask2] = 0x0200(Z);"
99 "LSETUP(.Lloop_s, .Lloop_e) LC0 = %[lc];"
101 "%[tmp] = extract(%[val], %[mask1].L)(Z);"
102 "%[tmp] <<= %[shift];"
103 "%[extr] = %[extr] | %[tmp];"
104 "%[mask1] = %[mask1] - %[mask2];"
107 : [extr]"=&d"(extract), [shift]"=&d"(tmp_shift), [tmp]"=&d"(tmp),
108 [mask1]"=&d"(tmp_mask1), [mask2]"=&d"(tmp_mask2)
109 : [val]"d"(value), [rxmask]"d"(up->rxmask), [lc]"a"(up->csize)
110 : "ASTAT", "LB0", "LC0", "LT0"
113 pr_debug(" extract:%x\n", extract);
117 static int sport_uart_setup(struct sport_uart_port *up, int size, int baud_rate)
119 int tclkdiv, rclkdiv;
120 unsigned int sclk = get_sclk();
122 /* Set TCR1 and TCR2, TFSR is not enabled for uart */
123 SPORT_PUT_TCR1(up, (ITFS | TLSBIT | ITCLK));
124 SPORT_PUT_TCR2(up, size + 1);
125 pr_debug("%s TCR1:%x, TCR2:%x\n", __func__, SPORT_GET_TCR1(up), SPORT_GET_TCR2(up));
127 /* Set RCR1 and RCR2 */
128 SPORT_PUT_RCR1(up, (RCKFE | LARFS | LRFS | RFSR | IRCLK));
129 SPORT_PUT_RCR2(up, (size + 1) * 2 - 1);
130 pr_debug("%s RCR1:%x, RCR2:%x\n", __func__, SPORT_GET_RCR1(up), SPORT_GET_RCR2(up));
132 tclkdiv = sclk / (2 * baud_rate) - 1;
133 rclkdiv = sclk / (2 * baud_rate * 2) - 1;
134 SPORT_PUT_TCLKDIV(up, tclkdiv);
135 SPORT_PUT_RCLKDIV(up, rclkdiv);
137 pr_debug("%s sclk:%d, baud_rate:%d, tclkdiv:%d, rclkdiv:%d\n",
138 __func__, sclk, baud_rate, tclkdiv, rclkdiv);
143 static irqreturn_t sport_uart_rx_irq(int irq, void *dev_id)
145 struct sport_uart_port *up = dev_id;
146 struct tty_struct *tty = up->port.state->port.tty;
149 spin_lock(&up->port.lock);
151 while (SPORT_GET_STAT(up) & RXNE) {
152 ch = rx_one_byte(up);
153 up->port.icount.rx++;
155 if (!uart_handle_sysrq_char(&up->port, ch))
156 tty_insert_flip_char(tty, ch, TTY_NORMAL);
158 tty_flip_buffer_push(tty);
160 spin_unlock(&up->port.lock);
165 static irqreturn_t sport_uart_tx_irq(int irq, void *dev_id)
167 struct sport_uart_port *up = dev_id;
169 spin_lock(&up->port.lock);
170 sport_uart_tx_chars(up);
171 spin_unlock(&up->port.lock);
176 static irqreturn_t sport_uart_err_irq(int irq, void *dev_id)
178 struct sport_uart_port *up = dev_id;
179 struct tty_struct *tty = up->port.state->port.tty;
180 unsigned int stat = SPORT_GET_STAT(up);
182 spin_lock(&up->port.lock);
184 /* Overflow in RX FIFO */
186 up->port.icount.overrun++;
187 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
188 SPORT_PUT_STAT(up, ROVF); /* Clear ROVF bit */
190 /* These should not happen */
191 if (stat & (TOVF | TUVF | RUVF)) {
192 pr_err("SPORT Error:%s %s %s\n",
193 (stat & TOVF) ? "TX overflow" : "",
194 (stat & TUVF) ? "TX underflow" : "",
195 (stat & RUVF) ? "RX underflow" : "");
196 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
197 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
201 spin_unlock(&up->port.lock);
205 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
206 static unsigned int sport_get_mctrl(struct uart_port *port)
208 struct sport_uart_port *up = (struct sport_uart_port *)port;
210 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
212 /* CTS PIN is negative assertive. */
213 if (SPORT_UART_GET_CTS(up))
214 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
216 return TIOCM_DSR | TIOCM_CAR;
219 static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
221 struct sport_uart_port *up = (struct sport_uart_port *)port;
225 /* RTS PIN is negative assertive. */
226 if (mctrl & TIOCM_RTS)
227 SPORT_UART_ENABLE_RTS(up);
229 SPORT_UART_DISABLE_RTS(up);
233 * Handle any change of modem status signal.
235 static irqreturn_t sport_mctrl_cts_int(int irq, void *dev_id)
237 struct sport_uart_port *up = (struct sport_uart_port *)dev_id;
240 status = sport_get_mctrl(&up->port);
241 uart_handle_cts_change(&up->port, status & TIOCM_CTS);
246 static unsigned int sport_get_mctrl(struct uart_port *port)
248 pr_debug("%s enter\n", __func__);
249 return TIOCM_CTS | TIOCM_CD | TIOCM_DSR;
252 static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
254 pr_debug("%s enter\n", __func__);
258 /* Reqeust IRQ, Setup clock */
259 static int sport_startup(struct uart_port *port)
261 struct sport_uart_port *up = (struct sport_uart_port *)port;
264 pr_debug("%s enter\n", __func__);
265 ret = request_irq(up->port.irq, sport_uart_rx_irq, 0,
266 "SPORT_UART_RX", up);
268 dev_err(port->dev, "unable to request SPORT RX interrupt\n");
272 ret = request_irq(up->port.irq+1, sport_uart_tx_irq, 0,
273 "SPORT_UART_TX", up);
275 dev_err(port->dev, "unable to request SPORT TX interrupt\n");
279 ret = request_irq(up->err_irq, sport_uart_err_irq, 0,
280 "SPORT_UART_STATUS", up);
282 dev_err(port->dev, "unable to request SPORT status interrupt\n");
286 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
287 if (up->cts_pin >= 0) {
288 if (request_irq(gpio_to_irq(up->cts_pin),
290 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
291 IRQF_DISABLED, "BFIN_SPORT_UART_CTS", up)) {
293 dev_info(port->dev, "Unable to attach BlackFin UART \
294 over SPORT CTS interrupt. So, disable it.\n");
297 if (up->rts_pin >= 0)
298 gpio_direction_output(up->rts_pin, 0);
303 free_irq(up->port.irq+1, up);
305 free_irq(up->port.irq, up);
310 static void sport_uart_tx_chars(struct sport_uart_port *up)
312 struct circ_buf *xmit = &up->port.state->xmit;
314 if (SPORT_GET_STAT(up) & TXF)
317 if (up->port.x_char) {
318 tx_one_byte(up, up->port.x_char);
319 up->port.icount.tx++;
324 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
325 /* The waiting loop to stop SPORT TX from TX interrupt is
326 * too long. This may block SPORT RX interrupts and cause
327 * RX FIFO overflow. So, do stop sport TX only after the last
328 * char in TX FIFO is moved into the shift register.
330 if (SPORT_GET_STAT(up) & TXHRE)
331 sport_stop_tx(&up->port);
335 while(!(SPORT_GET_STAT(up) & TXF) && !uart_circ_empty(xmit)) {
336 tx_one_byte(up, xmit->buf[xmit->tail]);
337 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE -1);
338 up->port.icount.tx++;
341 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
342 uart_write_wakeup(&up->port);
345 static unsigned int sport_tx_empty(struct uart_port *port)
347 struct sport_uart_port *up = (struct sport_uart_port *)port;
350 stat = SPORT_GET_STAT(up);
351 pr_debug("%s stat:%04x\n", __func__, stat);
358 static void sport_stop_tx(struct uart_port *port)
360 struct sport_uart_port *up = (struct sport_uart_port *)port;
362 pr_debug("%s enter\n", __func__);
364 /* Although the hold register is empty, last byte is still in shift
365 * register and not sent out yet. So, put a dummy data into TX FIFO.
366 * Then, sport tx stops when last byte is shift out and the dummy
367 * data is moved into the shift register.
369 SPORT_PUT_TX(up, 0xffff);
370 while (!(SPORT_GET_STAT(up) & TXHRE))
373 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
379 static void sport_start_tx(struct uart_port *port)
381 struct sport_uart_port *up = (struct sport_uart_port *)port;
383 pr_debug("%s enter\n", __func__);
385 /* Write data into SPORT FIFO before enable SPROT to transmit */
386 sport_uart_tx_chars(up);
388 /* Enable transmit, then an interrupt will generated */
389 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
391 pr_debug("%s exit\n", __func__);
394 static void sport_stop_rx(struct uart_port *port)
396 struct sport_uart_port *up = (struct sport_uart_port *)port;
398 pr_debug("%s enter\n", __func__);
399 /* Disable sport to stop rx */
400 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
404 static void sport_enable_ms(struct uart_port *port)
406 pr_debug("%s enter\n", __func__);
409 static void sport_break_ctl(struct uart_port *port, int break_state)
411 pr_debug("%s enter\n", __func__);
414 static void sport_shutdown(struct uart_port *port)
416 struct sport_uart_port *up = (struct sport_uart_port *)port;
418 dev_dbg(port->dev, "%s enter\n", __func__);
421 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
422 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
425 free_irq(up->port.irq, up);
426 free_irq(up->port.irq+1, up);
427 free_irq(up->err_irq, up);
428 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
429 if (up->cts_pin >= 0)
430 free_irq(gpio_to_irq(up->cts_pin), up);
434 static const char *sport_type(struct uart_port *port)
436 struct sport_uart_port *up = (struct sport_uart_port *)port;
438 pr_debug("%s enter\n", __func__);
439 return up->port.type == PORT_BFIN_SPORT ? "BFIN-SPORT-UART" : NULL;
442 static void sport_release_port(struct uart_port *port)
444 pr_debug("%s enter\n", __func__);
447 static int sport_request_port(struct uart_port *port)
449 pr_debug("%s enter\n", __func__);
453 static void sport_config_port(struct uart_port *port, int flags)
455 struct sport_uart_port *up = (struct sport_uart_port *)port;
457 pr_debug("%s enter\n", __func__);
458 up->port.type = PORT_BFIN_SPORT;
461 static int sport_verify_port(struct uart_port *port, struct serial_struct *ser)
463 pr_debug("%s enter\n", __func__);
467 static void sport_set_termios(struct uart_port *port,
468 struct ktermios *termios, struct ktermios *old)
470 struct sport_uart_port *up = (struct sport_uart_port *)port;
474 pr_debug("%s enter, c_cflag:%08x\n", __func__, termios->c_cflag);
476 switch (termios->c_cflag & CSIZE) {
490 pr_warning("requested word length not supported\n");
493 if (termios->c_cflag & CSTOPB) {
496 if (termios->c_cflag & PARENB) {
497 pr_warning("PAREN bits is not supported yet\n");
501 port->read_status_mask = OE;
502 if (termios->c_iflag & INPCK)
503 port->read_status_mask |= (FE | PE);
504 if (termios->c_iflag & (BRKINT | PARMRK))
505 port->read_status_mask |= BI;
508 * Characters to ignore
510 port->ignore_status_mask = 0;
511 if (termios->c_iflag & IGNPAR)
512 port->ignore_status_mask |= FE | PE;
513 if (termios->c_iflag & IGNBRK) {
514 port->ignore_status_mask |= BI;
516 * If we're ignoring parity and break indicators,
517 * ignore overruns too (for real raw support).
519 if (termios->c_iflag & IGNPAR)
520 port->ignore_status_mask |= OE;
523 /* RX extract mask */
524 up->rxmask = 0x01 | (((up->csize + up->stopb) * 2 - 1) << 0x8);
525 /* TX masks, 8 bit data and 1 bit stop for example:
526 * mask1 = b#0111111110
527 * mask2 = b#1000000000
529 for (i = 0, up->txmask1 = 0; i < up->csize; i++)
530 up->txmask1 |= (1<<i);
531 up->txmask2 = (1<<i);
534 up->txmask2 |= (1<<i);
539 port->uartclk = uart_get_baud_rate(port, termios, old, 0, get_sclk()/16);
541 spin_lock_irqsave(&up->port.lock, flags);
544 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
545 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
547 sport_uart_setup(up, up->csize + up->stopb, port->uartclk);
549 /* driver TX line high after config, one dummy data is
550 * necessary to stop sport after shift one byte
552 SPORT_PUT_TX(up, 0xffff);
553 SPORT_PUT_TX(up, 0xffff);
554 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
556 while (!(SPORT_GET_STAT(up) & TXHRE))
558 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
561 /* Port speed changed, update the per-port timeout. */
562 uart_update_timeout(port, termios->c_cflag, port->uartclk);
564 /* Enable sport rx */
565 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) | RSPEN);
568 spin_unlock_irqrestore(&up->port.lock, flags);
571 struct uart_ops sport_uart_ops = {
572 .tx_empty = sport_tx_empty,
573 .set_mctrl = sport_set_mctrl,
574 .get_mctrl = sport_get_mctrl,
575 .stop_tx = sport_stop_tx,
576 .start_tx = sport_start_tx,
577 .stop_rx = sport_stop_rx,
578 .enable_ms = sport_enable_ms,
579 .break_ctl = sport_break_ctl,
580 .startup = sport_startup,
581 .shutdown = sport_shutdown,
582 .set_termios = sport_set_termios,
584 .release_port = sport_release_port,
585 .request_port = sport_request_port,
586 .config_port = sport_config_port,
587 .verify_port = sport_verify_port,
590 #define BFIN_SPORT_UART_MAX_PORTS 4
592 static struct sport_uart_port *bfin_sport_uart_ports[BFIN_SPORT_UART_MAX_PORTS];
594 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
595 #define CLASS_BFIN_SPORT_CONSOLE "bfin-sport-console"
598 sport_uart_console_setup(struct console *co, char *options)
600 struct sport_uart_port *up;
604 # ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
610 /* Check whether an invalid uart number has been specified */
611 if (co->index < 0 || co->index >= BFIN_SPORT_UART_MAX_PORTS)
614 up = bfin_sport_uart_ports[co->index];
619 uart_parse_options(options, &baud, &parity, &bits, &flow);
621 return uart_set_options(&up->port, co, baud, parity, bits, flow);
624 static void sport_uart_console_putchar(struct uart_port *port, int ch)
626 struct sport_uart_port *up = (struct sport_uart_port *)port;
628 while (SPORT_GET_STAT(up) & TXF)
635 * Interrupts are disabled on entering
638 sport_uart_console_write(struct console *co, const char *s, unsigned int count)
640 struct sport_uart_port *up = bfin_sport_uart_ports[co->index];
643 spin_lock_irqsave(&up->port.lock, flags);
645 if (SPORT_GET_TCR1(up) & TSPEN)
646 uart_console_write(&up->port, s, count, sport_uart_console_putchar);
648 /* dummy data to start sport */
649 while (SPORT_GET_STAT(up) & TXF)
651 SPORT_PUT_TX(up, 0xffff);
652 /* Enable transmit, then an interrupt will generated */
653 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
656 uart_console_write(&up->port, s, count, sport_uart_console_putchar);
658 /* Although the hold register is empty, last byte is still in shift
659 * register and not sent out yet. So, put a dummy data into TX FIFO.
660 * Then, sport tx stops when last byte is shift out and the dummy
661 * data is moved into the shift register.
663 while (SPORT_GET_STAT(up) & TXF)
665 SPORT_PUT_TX(up, 0xffff);
666 while (!(SPORT_GET_STAT(up) & TXHRE))
669 /* Stop sport tx transfer */
670 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
674 spin_unlock_irqrestore(&up->port.lock, flags);
677 static struct uart_driver sport_uart_reg;
679 static struct console sport_uart_console = {
681 .write = sport_uart_console_write,
682 .device = uart_console_device,
683 .setup = sport_uart_console_setup,
684 .flags = CON_PRINTBUFFER,
686 .data = &sport_uart_reg,
689 #define SPORT_UART_CONSOLE (&sport_uart_console)
691 #define SPORT_UART_CONSOLE NULL
692 #endif /* CONFIG_SERIAL_BFIN_SPORT_CONSOLE */
695 static struct uart_driver sport_uart_reg = {
696 .owner = THIS_MODULE,
697 .driver_name = DRV_NAME,
698 .dev_name = DEVICE_NAME,
701 .nr = BFIN_SPORT_UART_MAX_PORTS,
702 .cons = SPORT_UART_CONSOLE,
706 static int sport_uart_suspend(struct device *dev)
708 struct sport_uart_port *sport = dev_get_drvdata(dev);
710 dev_dbg(dev, "%s enter\n", __func__);
712 uart_suspend_port(&sport_uart_reg, &sport->port);
717 static int sport_uart_resume(struct device *dev)
719 struct sport_uart_port *sport = dev_get_drvdata(dev);
721 dev_dbg(dev, "%s enter\n", __func__);
723 uart_resume_port(&sport_uart_reg, &sport->port);
728 static struct dev_pm_ops bfin_sport_uart_dev_pm_ops = {
729 .suspend = sport_uart_suspend,
730 .resume = sport_uart_resume,
734 static int __devinit sport_uart_probe(struct platform_device *pdev)
736 struct resource *res;
737 struct sport_uart_port *sport;
740 dev_dbg(&pdev->dev, "%s enter\n", __func__);
742 if (pdev->id < 0 || pdev->id >= BFIN_SPORT_UART_MAX_PORTS) {
743 dev_err(&pdev->dev, "Wrong sport uart platform device id.\n");
747 if (bfin_sport_uart_ports[pdev->id] == NULL) {
748 bfin_sport_uart_ports[pdev->id] =
749 kmalloc(sizeof(struct sport_uart_port), GFP_KERNEL);
750 sport = bfin_sport_uart_ports[pdev->id];
753 "Fail to kmalloc sport_uart_port\n");
757 ret = peripheral_request_list(
758 (unsigned short *)pdev->dev.platform_data, DRV_NAME);
761 "Fail to request SPORT peripherals\n");
762 goto out_error_free_mem;
765 spin_lock_init(&sport->port.lock);
766 sport->port.fifosize = SPORT_TX_FIFO_SIZE,
767 sport->port.ops = &sport_uart_ops;
768 sport->port.line = pdev->id;
769 sport->port.iotype = UPIO_MEM;
770 sport->port.flags = UPF_BOOT_AUTOCONF;
772 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
774 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
776 goto out_error_free_peripherals;
779 sport->port.membase = ioremap(res->start,
780 res->end - res->start);
781 if (!sport->port.membase) {
782 dev_err(&pdev->dev, "Cannot map sport IO\n");
784 goto out_error_free_peripherals;
786 sport->port.mapbase = res->start;
788 sport->port.irq = platform_get_irq(pdev, 0);
789 if (sport->port.irq < 0) {
790 dev_err(&pdev->dev, "No sport RX/TX IRQ specified\n");
792 goto out_error_unmap;
795 sport->err_irq = platform_get_irq(pdev, 1);
796 if (sport->err_irq < 0) {
797 dev_err(&pdev->dev, "No sport status IRQ specified\n");
799 goto out_error_unmap;
801 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
802 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
806 sport->cts_pin = res->start;
808 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
812 sport->rts_pin = res->start;
814 if (sport->rts_pin >= 0)
815 gpio_request(sport->rts_pin, DRV_NAME);
819 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
820 if (!is_early_platform_device(pdev)) {
822 sport = bfin_sport_uart_ports[pdev->id];
823 sport->port.dev = &pdev->dev;
824 dev_set_drvdata(&pdev->dev, sport);
825 ret = uart_add_one_port(&sport_uart_reg, &sport->port);
826 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
834 iounmap(sport->port.membase);
835 out_error_free_peripherals:
836 peripheral_free_list(
837 (unsigned short *)pdev->dev.platform_data);
840 bfin_sport_uart_ports[pdev->id] = NULL;
846 static int __devexit sport_uart_remove(struct platform_device *pdev)
848 struct sport_uart_port *sport = platform_get_drvdata(pdev);
850 dev_dbg(&pdev->dev, "%s enter\n", __func__);
851 dev_set_drvdata(&pdev->dev, NULL);
854 uart_remove_one_port(&sport_uart_reg, &sport->port);
855 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
856 if (sport->rts_pin >= 0)
857 gpio_free(sport->rts_pin);
859 iounmap(sport->port.membase);
860 peripheral_free_list(
861 (unsigned short *)pdev->dev.platform_data);
863 bfin_sport_uart_ports[pdev->id] = NULL;
869 static struct platform_driver sport_uart_driver = {
870 .probe = sport_uart_probe,
871 .remove = __devexit_p(sport_uart_remove),
875 .pm = &bfin_sport_uart_dev_pm_ops,
880 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
881 static __initdata struct early_platform_driver early_sport_uart_driver = {
882 .class_str = CLASS_BFIN_SPORT_CONSOLE,
883 .pdrv = &sport_uart_driver,
884 .requested_id = EARLY_PLATFORM_ID_UNSET,
887 static int __init sport_uart_rs_console_init(void)
889 early_platform_driver_register(&early_sport_uart_driver, DRV_NAME);
891 early_platform_driver_probe(CLASS_BFIN_SPORT_CONSOLE,
892 BFIN_SPORT_UART_MAX_PORTS, 0);
894 register_console(&sport_uart_console);
898 console_initcall(sport_uart_rs_console_init);
901 static int __init sport_uart_init(void)
905 pr_info("Blackfin uart over sport driver\n");
907 ret = uart_register_driver(&sport_uart_reg);
909 pr_err("failed to register %s:%d\n",
910 sport_uart_reg.driver_name, ret);
914 ret = platform_driver_register(&sport_uart_driver);
916 pr_err("failed to register sport uart driver:%d\n", ret);
917 uart_unregister_driver(&sport_uart_reg);
922 module_init(sport_uart_init);
924 static void __exit sport_uart_exit(void)
926 platform_driver_unregister(&sport_uart_driver);
927 uart_unregister_driver(&sport_uart_reg);
929 module_exit(sport_uart_exit);
931 MODULE_AUTHOR("Sonic Zhang, Roy Huang");
932 MODULE_DESCRIPTION("Blackfin serial over SPORT driver");
933 MODULE_LICENSE("GPL");