drivers/serial/bfin_5xx.c

   1 /*
   2  * Blackfin On-Chip Serial Driver
   3  *
   4  * Copyright 2006-2008 Analog Devices Inc.
   5  *
   6  * Enter bugs at http://blackfin.uclinux.org/
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  12 #define SUPPORT_SYSRQ
  13 #endif
  14
  15 #include <linux/module.h>
  16 #include <linux/ioport.h>
  17 #include <linux/init.h>
  18 #include <linux/console.h>
  19 #include <linux/sysrq.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/tty.h>
  22 #include <linux/tty_flip.h>
  23 #include <linux/serial_core.h>
  24
  25 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  26         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  27 #include <linux/kgdb.h>
  28 #include <asm/irq_regs.h>
  29 #endif
  30
  31 #include <asm/gpio.h>
  32 #include <mach/bfin_serial_5xx.h>
  33
  34 #ifdef CONFIG_SERIAL_BFIN_DMA
  35 #include <linux/dma-mapping.h>
  36 #include <asm/io.h>
  37 #include <asm/irq.h>
  38 #include <asm/cacheflush.h>
  39 #endif
  40
  41 /* UART name and device definitions */
  42 #define BFIN_SERIAL_NAME        "ttyBF"
  43 #define BFIN_SERIAL_MAJOR       204
  44 #define BFIN_SERIAL_MINOR       64
  45
  46 static struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
  47 static int nr_active_ports = ARRAY_SIZE(bfin_serial_resource);
  48
  49 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  50         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  51
  52 # ifndef CONFIG_SERIAL_BFIN_PIO
  53 #  error KGDB only support UART in PIO mode.
  54 # endif
  55
  56 static int kgdboc_port_line;
  57 static int kgdboc_break_enabled;
  58 #endif
  59 /*
  60  * Setup for console. Argument comes from the menuconfig
  61  */
  62 #define DMA_RX_XCOUNT           512
  63 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
  64
  65 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
  66
  67 #ifdef CONFIG_SERIAL_BFIN_DMA
  68 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  69 #else
  70 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  71 #endif
  72
  73 static void bfin_serial_reset_irda(struct uart_port *port);
  74
  75 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  76         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  77 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  78 {
  79         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  80         if (uart->cts_pin < 0)
  81                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  82
  83         /* CTS PIN is negative assertive. */
  84         if (UART_GET_CTS(uart))
  85                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  86         else
  87                 return TIOCM_DSR | TIOCM_CAR;
  88 }
  89
  90 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  91 {
  92         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  93         if (uart->rts_pin < 0)
  94                 return;
  95
  96         /* RTS PIN is negative assertive. */
  97         if (mctrl & TIOCM_RTS)
  98                 UART_ENABLE_RTS(uart);
  99         else
 100                 UART_DISABLE_RTS(uart);
 101 }
 102
 103 /*
 104  * Handle any change of modem status signal.
 105  */
 106 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
 107 {
 108         struct bfin_serial_port *uart = dev_id;
 109         unsigned int status;
 110
 111         status = bfin_serial_get_mctrl(&uart->port);
 112         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
 113 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 114         uart->scts = 1;
 115         UART_CLEAR_SCTS(uart);
 116         UART_CLEAR_IER(uart, EDSSI);
 117 #endif
 118
 119         return IRQ_HANDLED;
 120 }
 121 #else
 122 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
 123 {
 124         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 125 }
 126
 127 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 128 {
 129 }
 130 #endif
 131
 132 /*
 133  * interrupts are disabled on entry
 134  */
 135 static void bfin_serial_stop_tx(struct uart_port *port)
 136 {
 137         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 138 #ifdef CONFIG_SERIAL_BFIN_DMA
 139         struct circ_buf *xmit = &uart->port.info->xmit;
 140 #endif
 141
 142         while (!(UART_GET_LSR(uart) & TEMT))
 143                 cpu_relax();
 144
 145 #ifdef CONFIG_SERIAL_BFIN_DMA
 146         disable_dma(uart->tx_dma_channel);
 147         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 148         uart->port.icount.tx += uart->tx_count;
 149         uart->tx_count = 0;
 150         uart->tx_done = 1;
 151 #else
 152 #ifdef CONFIG_BF54x
 153         /* Clear TFI bit */
 154         UART_PUT_LSR(uart, TFI);
 155 #endif
 156         UART_CLEAR_IER(uart, ETBEI);
 157 #endif
 158 }
 159
 160 /*
 161  * port is locked and interrupts are disabled
 162  */
 163 static void bfin_serial_start_tx(struct uart_port *port)
 164 {
 165         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 166         struct tty_struct *tty = uart->port.info->port.tty;
 167
 168 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 169         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
 170                 uart->scts = 0;
 171                 uart_handle_cts_change(&uart->port, uart->scts);
 172         }
 173 #endif
 174
 175         /*
 176          * To avoid losting RX interrupt, we reset IR function
 177          * before sending data.
 178          */
 179         if (tty->termios->c_line == N_IRDA)
 180                 bfin_serial_reset_irda(port);
 181
 182 #ifdef CONFIG_SERIAL_BFIN_DMA
 183         if (uart->tx_done)
 184                 bfin_serial_dma_tx_chars(uart);
 185 #else
 186         UART_SET_IER(uart, ETBEI);
 187         bfin_serial_tx_chars(uart);
 188 #endif
 189 }
 190
 191 /*
 192  * Interrupts are enabled
 193  */
 194 static void bfin_serial_stop_rx(struct uart_port *port)
 195 {
 196         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 197
 198         UART_CLEAR_IER(uart, ERBFI);
 199 }
 200
 201 /*
 202  * Set the modem control timer to fire immediately.
 203  */
 204 static void bfin_serial_enable_ms(struct uart_port *port)
 205 {
 206 }
 207
 208
 209 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
 210 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
 211 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
 212 #else
 213 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
 214 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
 215 #endif
 216
 217 #ifdef CONFIG_SERIAL_BFIN_PIO
 218 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
 219 {
 220         struct tty_struct *tty = NULL;
 221         unsigned int status, ch, flg;
 222         static struct timeval anomaly_start = { .tv_sec = 0 };
 223
 224         status = UART_GET_LSR(uart);
 225         UART_CLEAR_LSR(uart);
 226
 227         ch = UART_GET_CHAR(uart);
 228         uart->port.icount.rx++;
 229
 230 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 231         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 232         if (kgdb_connected && kgdboc_port_line == uart->port.line)
 233                 if (ch == 0x3) {/* Ctrl + C */
 234                         kgdb_breakpoint();
 235                         return;
 236                 }
 237
 238         if (!uart->port.info || !uart->port.info->port.tty)
 239                 return;
 240 #endif
 241         tty = uart->port.info->port.tty;
 242
 243         if (ANOMALY_05000363) {
 244                 /* The BF533 (and BF561) family of processors have a nice anomaly
 245                  * where they continuously generate characters for a "single" break.
 246                  * We have to basically ignore this flood until the "next" valid
 247                  * character comes across.  Due to the nature of the flood, it is
 248                  * not possible to reliably catch bytes that are sent too quickly
 249                  * after this break.  So application code talking to the Blackfin
 250                  * which sends a break signal must allow at least 1.5 character
 251                  * times after the end of the break for things to stabilize.  This
 252                  * timeout was picked as it must absolutely be larger than 1
 253                  * character time +/- some percent.  So 1.5 sounds good.  All other
 254                  * Blackfin families operate properly.  Woo.
 255                  */
 256                 if (anomaly_start.tv_sec) {
 257                         struct timeval curr;
 258                         suseconds_t usecs;
 259
 260                         if ((~ch & (~ch + 1)) & 0xff)
 261                                 goto known_good_char;
 262
 263                         do_gettimeofday(&curr);
 264                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
 265                                 goto known_good_char;
 266
 267                         usecs = 0;
 268                         if (curr.tv_sec != anomaly_start.tv_sec)
 269                                 usecs += USEC_PER_SEC;
 270                         usecs += curr.tv_usec - anomaly_start.tv_usec;
 271
 272                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
 273                                 goto known_good_char;
 274
 275                         if (ch)
 276                                 anomaly_start.tv_sec = 0;
 277                         else
 278                                 anomaly_start = curr;
 279
 280                         return;
 281
 282  known_good_char:
 283                         status &= ~BI;
 284                         anomaly_start.tv_sec = 0;
 285                 }
 286         }
 287
 288         if (status & BI) {
 289                 if (ANOMALY_05000363)
 290                         if (bfin_revid() < 5)
 291                                 do_gettimeofday(&anomaly_start);
 292                 uart->port.icount.brk++;
 293                 if (uart_handle_break(&uart->port))
 294                         goto ignore_char;
 295                 status &= ~(PE | FE);
 296         }
 297         if (status & PE)
 298                 uart->port.icount.parity++;
 299         if (status & OE)
 300                 uart->port.icount.overrun++;
 301         if (status & FE)
 302                 uart->port.icount.frame++;
 303
 304         status &= uart->port.read_status_mask;
 305
 306         if (status & BI)
 307                 flg = TTY_BREAK;
 308         else if (status & PE)
 309                 flg = TTY_PARITY;
 310         else if (status & FE)
 311                 flg = TTY_FRAME;
 312         else
 313                 flg = TTY_NORMAL;
 314
 315         if (uart_handle_sysrq_char(&uart->port, ch))
 316                 goto ignore_char;
 317
 318         uart_insert_char(&uart->port, status, OE, ch, flg);
 319
 320  ignore_char:
 321         tty_flip_buffer_push(tty);
 322 }
 323
 324 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
 325 {
 326         struct circ_buf *xmit = &uart->port.info->xmit;
 327
 328         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 329 #ifdef CONFIG_BF54x
 330                 /* Clear TFI bit */
 331                 UART_PUT_LSR(uart, TFI);
 332 #endif
 333                 /* Anomaly notes:
 334                  *  05000215 -  we always clear ETBEI within last UART TX
 335                  *              interrupt to end a string. It is always set
 336                  *              when start a new tx.
 337                  */
 338                 UART_CLEAR_IER(uart, ETBEI);
 339                 return;
 340         }
 341
 342         if (uart->port.x_char) {
 343                 UART_PUT_CHAR(uart, uart->port.x_char);
 344                 uart->port.icount.tx++;
 345                 uart->port.x_char = 0;
 346         }
 347
 348         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
 349                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
 350                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 351                 uart->port.icount.tx++;
 352                 SSYNC();
 353         }
 354
 355         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 356                 uart_write_wakeup(&uart->port);
 357 }
 358
 359 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
 360 {
 361         struct bfin_serial_port *uart = dev_id;
 362
 363         spin_lock(&uart->port.lock);
 364         while (UART_GET_LSR(uart) & DR)
 365                 bfin_serial_rx_chars(uart);
 366         spin_unlock(&uart->port.lock);
 367
 368         return IRQ_HANDLED;
 369 }
 370
 371 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
 372 {
 373         struct bfin_serial_port *uart = dev_id;
 374
 375 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 376         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
 377                 uart->scts = 0;
 378                 uart_handle_cts_change(&uart->port, uart->scts);
 379         }
 380 #endif
 381         spin_lock(&uart->port.lock);
 382         if (UART_GET_LSR(uart) & THRE)
 383                 bfin_serial_tx_chars(uart);
 384         spin_unlock(&uart->port.lock);
 385
 386         return IRQ_HANDLED;
 387 }
 388 #endif
 389
 390 #ifdef CONFIG_SERIAL_BFIN_DMA
 391 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
 392 {
 393         struct circ_buf *xmit = &uart->port.info->xmit;
 394
 395         uart->tx_done = 0;
 396
 397         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 398                 uart->tx_count = 0;
 399                 uart->tx_done = 1;
 400                 return;
 401         }
 402
 403         if (uart->port.x_char) {
 404                 UART_PUT_CHAR(uart, uart->port.x_char);
 405                 uart->port.icount.tx++;
 406                 uart->port.x_char = 0;
 407         }
 408
 409         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
 410         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
 411                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
 412         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
 413                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
 414         set_dma_config(uart->tx_dma_channel,
 415                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
 416                         INTR_ON_BUF,
 417                         DIMENSION_LINEAR,
 418                         DATA_SIZE_8,
 419                         DMA_SYNC_RESTART));
 420         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
 421         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
 422         set_dma_x_modify(uart->tx_dma_channel, 1);
 423         SSYNC();
 424         enable_dma(uart->tx_dma_channel);
 425
 426         UART_SET_IER(uart, ETBEI);
 427 }
 428
 429 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
 430 {
 431         struct tty_struct *tty = uart->port.info->port.tty;
 432         int i, flg, status;
 433
 434         status = UART_GET_LSR(uart);
 435         UART_CLEAR_LSR(uart);
 436
 437         uart->port.icount.rx +=
 438                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
 439                 UART_XMIT_SIZE);
 440
 441         if (status & BI) {
 442                 uart->port.icount.brk++;
 443                 if (uart_handle_break(&uart->port))
 444                         goto dma_ignore_char;
 445                 status &= ~(PE | FE);
 446         }
 447         if (status & PE)
 448                 uart->port.icount.parity++;
 449         if (status & OE)
 450                 uart->port.icount.overrun++;
 451         if (status & FE)
 452                 uart->port.icount.frame++;
 453
 454         status &= uart->port.read_status_mask;
 455
 456         if (status & BI)
 457                 flg = TTY_BREAK;
 458         else if (status & PE)
 459                 flg = TTY_PARITY;
 460         else if (status & FE)
 461                 flg = TTY_FRAME;
 462         else
 463                 flg = TTY_NORMAL;
 464
 465         for (i = uart->rx_dma_buf.tail; ; i++) {
 466                 if (i >= UART_XMIT_SIZE)
 467                         i = 0;
 468                 if (i == uart->rx_dma_buf.head)
 469                         break;
 470                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
 471                         uart_insert_char(&uart->port, status, OE,
 472                                 uart->rx_dma_buf.buf[i], flg);
 473         }
 474
 475  dma_ignore_char:
 476         tty_flip_buffer_push(tty);
 477 }
 478
 479 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
 480 {
 481         int x_pos, pos;
 482         unsigned long flags;
 483
 484         spin_lock_irqsave(&uart->port.lock, flags);
 485
 486         /* 2D DMA RX buffer ring is used. Because curr_y_count and
 487          * curr_x_count can't be read as an atomic operation,
 488          * curr_y_count should be read before curr_x_count. When
 489          * curr_x_count is read, curr_y_count may already indicate
 490          * next buffer line. But, the position calculated here is
 491          * still indicate the old line. The wrong position data may
 492          * be smaller than current buffer tail, which cause garbages
 493          * are received if it is not prohibit.
 494          */
 495         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 496         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 497         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 498         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 499                 uart->rx_dma_nrows = 0;
 500         x_pos = DMA_RX_XCOUNT - x_pos;
 501         if (x_pos == DMA_RX_XCOUNT)
 502                 x_pos = 0;
 503
 504         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
 505         /* Ignore receiving data if new position is in the same line of
 506          * current buffer tail and small.
 507          */
 508         if (pos > uart->rx_dma_buf.tail ||
 509                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 510                 uart->rx_dma_buf.head = pos;
 511                 bfin_serial_dma_rx_chars(uart);
 512                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 513         }
 514
 515         spin_unlock_irqrestore(&uart->port.lock, flags);
 516
 517         mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
 518 }
 519
 520 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
 521 {
 522         struct bfin_serial_port *uart = dev_id;
 523         struct circ_buf *xmit = &uart->port.info->xmit;
 524
 525 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 526         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) {
 527                 uart->scts = 0;
 528                 uart_handle_cts_change(&uart->port, uart->scts);
 529         }
 530 #endif
 531
 532         spin_lock(&uart->port.lock);
 533         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
 534                 disable_dma(uart->tx_dma_channel);
 535                 clear_dma_irqstat(uart->tx_dma_channel);
 536                 /* Anomaly notes:
 537                  *  05000215 -  we always clear ETBEI within last UART TX
 538                  *              interrupt to end a string. It is always set
 539                  *              when start a new tx.
 540                  */
 541                 UART_CLEAR_IER(uart, ETBEI);
 542                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 543                 uart->port.icount.tx += uart->tx_count;
 544
 545                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 546                         uart_write_wakeup(&uart->port);
 547
 548                 bfin_serial_dma_tx_chars(uart);
 549         }
 550
 551         spin_unlock(&uart->port.lock);
 552         return IRQ_HANDLED;
 553 }
 554
 555 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
 556 {
 557         struct bfin_serial_port *uart = dev_id;
 558         unsigned short irqstat;
 559         int x_pos, pos;
 560
 561         spin_lock(&uart->port.lock);
 562         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
 563         clear_dma_irqstat(uart->rx_dma_channel);
 564
 565         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 566         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 567         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 568         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 569                 uart->rx_dma_nrows = 0;
 570
 571         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
 572         if (pos > uart->rx_dma_buf.tail ||
 573                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 574                 uart->rx_dma_buf.head = pos;
 575                 bfin_serial_dma_rx_chars(uart);
 576                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 577         }
 578
 579         spin_unlock(&uart->port.lock);
 580
 581         return IRQ_HANDLED;
 582 }
 583 #endif
 584
 585 /*
 586  * Return TIOCSER_TEMT when transmitter is not busy.
 587  */
 588 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
 589 {
 590         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 591         unsigned short lsr;
 592
 593         lsr = UART_GET_LSR(uart);
 594         if (lsr & TEMT)
 595                 return TIOCSER_TEMT;
 596         else
 597                 return 0;
 598 }
 599
 600 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
 601 {
 602         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 603         u16 lcr = UART_GET_LCR(uart);
 604         if (break_state)
 605                 lcr |= SB;
 606         else
 607                 lcr &= ~SB;
 608         UART_PUT_LCR(uart, lcr);
 609         SSYNC();
 610 }
 611
 612 static int bfin_serial_startup(struct uart_port *port)
 613 {
 614         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 615
 616 #ifdef CONFIG_SERIAL_BFIN_DMA
 617         dma_addr_t dma_handle;
 618
 619         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
 620                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
 621                 return -EBUSY;
 622         }
 623
 624         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
 625                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
 626                 free_dma(uart->rx_dma_channel);
 627                 return -EBUSY;
 628         }
 629
 630         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
 631         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
 632
 633         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
 634         uart->rx_dma_buf.head = 0;
 635         uart->rx_dma_buf.tail = 0;
 636         uart->rx_dma_nrows = 0;
 637
 638         set_dma_config(uart->rx_dma_channel,
 639                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
 640                                 INTR_ON_ROW, DIMENSION_2D,
 641                                 DATA_SIZE_8,
 642                                 DMA_SYNC_RESTART));
 643         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
 644         set_dma_x_modify(uart->rx_dma_channel, 1);
 645         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
 646         set_dma_y_modify(uart->rx_dma_channel, 1);
 647         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
 648         enable_dma(uart->rx_dma_channel);
 649
 650         uart->rx_dma_timer.data = (unsigned long)(uart);
 651         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
 652         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
 653         add_timer(&(uart->rx_dma_timer));
 654 #else
 655 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 656         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 657         if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
 658                 kgdboc_break_enabled = 0;
 659         else {
 660 # endif
 661         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
 662              "BFIN_UART_RX", uart)) {
 663                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
 664                 return -EBUSY;
 665         }
 666
 667         if (request_irq
 668             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
 669              "BFIN_UART_TX", uart)) {
 670                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
 671                 free_irq(uart->port.irq, uart);
 672                 return -EBUSY;
 673         }
 674
 675 # ifdef CONFIG_BF54x
 676         {
 677                 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
 678
 679                 switch (uart->port.irq) {
 680                 case IRQ_UART3_RX:
 681                         uart_dma_ch_rx = CH_UART3_RX;
 682                         uart_dma_ch_tx = CH_UART3_TX;
 683                         break;
 684                 case IRQ_UART2_RX:
 685                         uart_dma_ch_rx = CH_UART2_RX;
 686                         uart_dma_ch_tx = CH_UART2_TX;
 687                         break;
 688                 default:
 689                         uart_dma_ch_rx = uart_dma_ch_tx = 0;
 690                         break;
 691                 };
 692
 693                 if (uart_dma_ch_rx &&
 694                         request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
 695                         printk(KERN_NOTICE"Fail to attach UART interrupt\n");
 696                         free_irq(uart->port.irq, uart);
 697                         free_irq(uart->port.irq + 1, uart);
 698                         return -EBUSY;
 699                 }
 700                 if (uart_dma_ch_tx &&
 701                         request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
 702                         printk(KERN_NOTICE "Fail to attach UART interrupt\n");
 703                         free_dma(uart_dma_ch_rx);
 704                         free_irq(uart->port.irq, uart);
 705                         free_irq(uart->port.irq + 1, uart);
 706                         return -EBUSY;
 707                 }
 708         }
 709 # endif
 710 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 711         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 712         }
 713 # endif
 714 #endif
 715
 716 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 717         if (uart->cts_pin >= 0) {
 718                 if (request_irq(gpio_to_irq(uart->cts_pin),
 719                         bfin_serial_mctrl_cts_int,
 720                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
 721                         IRQF_DISABLED, "BFIN_UART_CTS", uart)) {
 722                         uart->cts_pin = -1;
 723                         pr_info("Unable to attach BlackFin UART CTS interrupt.\
 724                                  So, disable it.\n");
 725                 }
 726         }
 727         if (uart->rts_pin >= 0) {
 728                 gpio_request(uart->rts_pin, DRIVER_NAME);
 729                 gpio_direction_output(uart->rts_pin, 0);
 730         }
 731 #endif
 732 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 733         if (request_irq(uart->status_irq,
 734                 bfin_serial_mctrl_cts_int,
 735                 IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
 736                 pr_info("Unable to attach BlackFin UART Modem \
 737                         Status interrupt.\n");
 738         }
 739
 740         if (uart->cts_pin >= 0) {
 741                 gpio_request(uart->cts_pin, DRIVER_NAME);
 742                 gpio_direction_output(uart->cts_pin, 1);
 743         }
 744         if (uart->rts_pin >= 0) {
 745                 gpio_request(uart->rts_pin, DRIVER_NAME);
 746                 gpio_direction_output(uart->rts_pin, 0);
 747         }
 748
 749         /* CTS RTS PINs are negative assertive. */
 750         UART_PUT_MCR(uart, ACTS);
 751         UART_SET_IER(uart, EDSSI);
 752 #endif
 753
 754         UART_SET_IER(uart, ERBFI);
 755         return 0;
 756 }
 757
 758 static void bfin_serial_shutdown(struct uart_port *port)
 759 {
 760         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 761
 762 #ifdef CONFIG_SERIAL_BFIN_DMA
 763         disable_dma(uart->tx_dma_channel);
 764         free_dma(uart->tx_dma_channel);
 765         disable_dma(uart->rx_dma_channel);
 766         free_dma(uart->rx_dma_channel);
 767         del_timer(&(uart->rx_dma_timer));
 768         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
 769 #else
 770 #ifdef CONFIG_BF54x
 771         switch (uart->port.irq) {
 772         case IRQ_UART3_RX:
 773                 free_dma(CH_UART3_RX);
 774                 free_dma(CH_UART3_TX);
 775                 break;
 776         case IRQ_UART2_RX:
 777                 free_dma(CH_UART2_RX);
 778                 free_dma(CH_UART2_TX);
 779                 break;
 780         default:
 781                 break;
 782         };
 783 #endif
 784         free_irq(uart->port.irq, uart);
 785         free_irq(uart->port.irq+1, uart);
 786 #endif
 787
 788 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 789         if (uart->cts_pin >= 0)
 790                 free_irq(gpio_to_irq(uart->cts_pin), uart);
 791         if (uart->rts_pin >= 0)
 792                 gpio_free(uart->rts_pin);
 793 #endif
 794 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 795         if (uart->cts_pin >= 0)
 796                 gpio_free(uart->cts_pin);
 797         if (uart->rts_pin >= 0)
 798                 gpio_free(uart->rts_pin);
 799         if (UART_GET_IER(uart) && EDSSI)
 800                 free_irq(uart->status_irq, uart);
 801 #endif
 802 }
 803
 804 static void
 805 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
 806                    struct ktermios *old)
 807 {
 808         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 809         unsigned long flags;
 810         unsigned int baud, quot;
 811         unsigned short val, ier, lcr = 0;
 812
 813         switch (termios->c_cflag & CSIZE) {
 814         case CS8:
 815                 lcr = WLS(8);
 816                 break;
 817         case CS7:
 818                 lcr = WLS(7);
 819                 break;
 820         case CS6:
 821                 lcr = WLS(6);
 822                 break;
 823         case CS5:
 824                 lcr = WLS(5);
 825                 break;
 826         default:
 827                 printk(KERN_ERR "%s: word lengh not supported\n",
 828                         __func__);
 829         }
 830
 831         if (termios->c_cflag & CSTOPB)
 832                 lcr |= STB;
 833         if (termios->c_cflag & PARENB)
 834                 lcr |= PEN;
 835         if (!(termios->c_cflag & PARODD))
 836                 lcr |= EPS;
 837         if (termios->c_cflag & CMSPAR)
 838                 lcr |= STP;
 839
 840         port->read_status_mask = OE;
 841         if (termios->c_iflag & INPCK)
 842                 port->read_status_mask |= (FE | PE);
 843         if (termios->c_iflag & (BRKINT | PARMRK))
 844                 port->read_status_mask |= BI;
 845
 846         /*
 847          * Characters to ignore
 848          */
 849         port->ignore_status_mask = 0;
 850         if (termios->c_iflag & IGNPAR)
 851                 port->ignore_status_mask |= FE | PE;
 852         if (termios->c_iflag & IGNBRK) {
 853                 port->ignore_status_mask |= BI;
 854                 /*
 855                  * If we're ignoring parity and break indicators,
 856                  * ignore overruns too (for real raw support).
 857                  */
 858                 if (termios->c_iflag & IGNPAR)
 859                         port->ignore_status_mask |= OE;
 860         }
 861
 862         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 863         quot = uart_get_divisor(port, baud) - ANOMALY_05000230;
 864         spin_lock_irqsave(&uart->port.lock, flags);
 865
 866         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
 867
 868         /* Disable UART */
 869         ier = UART_GET_IER(uart);
 870         UART_DISABLE_INTS(uart);
 871
 872         /* Set DLAB in LCR to Access DLL and DLH */
 873         UART_SET_DLAB(uart);
 874
 875         UART_PUT_DLL(uart, quot & 0xFF);
 876         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
 877         SSYNC();
 878
 879         /* Clear DLAB in LCR to Access THR RBR IER */
 880         UART_CLEAR_DLAB(uart);
 881
 882         UART_PUT_LCR(uart, lcr);
 883
 884         /* Enable UART */
 885         UART_ENABLE_INTS(uart, ier);
 886
 887         val = UART_GET_GCTL(uart);
 888         val |= UCEN;
 889         UART_PUT_GCTL(uart, val);
 890
 891         /* Port speed changed, update the per-port timeout. */
 892         uart_update_timeout(port, termios->c_cflag, baud);
 893
 894         spin_unlock_irqrestore(&uart->port.lock, flags);
 895 }
 896
 897 static const char *bfin_serial_type(struct uart_port *port)
 898 {
 899         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 900
 901         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
 902 }
 903
 904 /*
 905  * Release the memory region(s) being used by 'port'.
 906  */
 907 static void bfin_serial_release_port(struct uart_port *port)
 908 {
 909 }
 910
 911 /*
 912  * Request the memory region(s) being used by 'port'.
 913  */
 914 static int bfin_serial_request_port(struct uart_port *port)
 915 {
 916         return 0;
 917 }
 918
 919 /*
 920  * Configure/autoconfigure the port.
 921  */
 922 static void bfin_serial_config_port(struct uart_port *port, int flags)
 923 {
 924         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 925
 926         if (flags & UART_CONFIG_TYPE &&
 927             bfin_serial_request_port(&uart->port) == 0)
 928                 uart->port.type = PORT_BFIN;
 929 }
 930
 931 /*
 932  * Verify the new serial_struct (for TIOCSSERIAL).
 933  * The only change we allow are to the flags and type, and
 934  * even then only between PORT_BFIN and PORT_UNKNOWN
 935  */
 936 static int
 937 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
 938 {
 939         return 0;
 940 }
 941
 942 /*
 943  * Enable the IrDA function if tty->ldisc.num is N_IRDA.
 944  * In other cases, disable IrDA function.
 945  */
 946 static void bfin_serial_set_ldisc(struct uart_port *port)
 947 {
 948         int line = port->line;
 949         unsigned short val;
 950
 951         if (line >= port->info->port.tty->driver->num)
 952                 return;
 953
 954         switch (port->info->port.tty->termios->c_line) {
 955         case N_IRDA:
 956                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
 957                 val |= (IREN | RPOLC);
 958                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
 959                 break;
 960         default:
 961                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
 962                 val &= ~(IREN | RPOLC);
 963                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
 964         }
 965 }
 966
 967 static void bfin_serial_reset_irda(struct uart_port *port)
 968 {
 969         int line = port->line;
 970         unsigned short val;
 971
 972         val = UART_GET_GCTL(&bfin_serial_ports[line]);
 973         val &= ~(IREN | RPOLC);
 974         UART_PUT_GCTL(&bfin_serial_ports[line], val);
 975         SSYNC();
 976         val |= (IREN | RPOLC);
 977         UART_PUT_GCTL(&bfin_serial_ports[line], val);
 978         SSYNC();
 979 }
 980
 981 #ifdef CONFIG_CONSOLE_POLL
 982 /* Anomaly notes:
 983  *  05000099 -  Because we only use THRE in poll_put and DR in poll_get,
 984  *              losing other bits of UART_LSR is not a problem here.
 985  */
 986 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
 987 {
 988         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 989
 990         while (!(UART_GET_LSR(uart) & THRE))
 991                 cpu_relax();
 992
 993         UART_CLEAR_DLAB(uart);
 994         UART_PUT_CHAR(uart, (unsigned char)chr);
 995 }
 996
 997 static int bfin_serial_poll_get_char(struct uart_port *port)
 998 {
 999         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1000         unsigned char chr;
1001
1002         while (!(UART_GET_LSR(uart) & DR))
1003                 cpu_relax();
1004
1005         UART_CLEAR_DLAB(uart);
1006         chr = UART_GET_CHAR(uart);
1007
1008         return chr;
1009 }
1010 #endif
1011
1012 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1013         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1014 static void bfin_kgdboc_port_shutdown(struct uart_port *port)
1015 {
1016         if (kgdboc_break_enabled) {
1017                 kgdboc_break_enabled = 0;
1018                 bfin_serial_shutdown(port);
1019         }
1020 }
1021
1022 static int bfin_kgdboc_port_startup(struct uart_port *port)
1023 {
1024         kgdboc_port_line = port->line;
1025         kgdboc_break_enabled = !bfin_serial_startup(port);
1026         return 0;
1027 }
1028 #endif
1029
1030 static struct uart_ops bfin_serial_pops = {
1031         .tx_empty       = bfin_serial_tx_empty,
1032         .set_mctrl      = bfin_serial_set_mctrl,
1033         .get_mctrl      = bfin_serial_get_mctrl,
1034         .stop_tx        = bfin_serial_stop_tx,
1035         .start_tx       = bfin_serial_start_tx,
1036         .stop_rx        = bfin_serial_stop_rx,
1037         .enable_ms      = bfin_serial_enable_ms,
1038         .break_ctl      = bfin_serial_break_ctl,
1039         .startup        = bfin_serial_startup,
1040         .shutdown       = bfin_serial_shutdown,
1041         .set_termios    = bfin_serial_set_termios,
1042         .set_ldisc      = bfin_serial_set_ldisc,
1043         .type           = bfin_serial_type,
1044         .release_port   = bfin_serial_release_port,
1045         .request_port   = bfin_serial_request_port,
1046         .config_port    = bfin_serial_config_port,
1047         .verify_port    = bfin_serial_verify_port,
1048 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1049         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1050         .kgdboc_port_startup    = bfin_kgdboc_port_startup,
1051         .kgdboc_port_shutdown   = bfin_kgdboc_port_shutdown,
1052 #endif
1053 #ifdef CONFIG_CONSOLE_POLL
1054         .poll_put_char  = bfin_serial_poll_put_char,
1055         .poll_get_char  = bfin_serial_poll_get_char,
1056 #endif
1057 };
1058
1059 static void __init bfin_serial_hw_init(void)
1060 {
1061 #ifdef CONFIG_SERIAL_BFIN_UART0
1062         peripheral_request(P_UART0_TX, DRIVER_NAME);
1063         peripheral_request(P_UART0_RX, DRIVER_NAME);
1064 #endif
1065
1066 #ifdef CONFIG_SERIAL_BFIN_UART1
1067         peripheral_request(P_UART1_TX, DRIVER_NAME);
1068         peripheral_request(P_UART1_RX, DRIVER_NAME);
1069
1070 # if defined(CONFIG_BFIN_UART1_CTSRTS) && defined(CONFIG_BF54x)
1071         peripheral_request(P_UART1_RTS, DRIVER_NAME);
1072         peripheral_request(P_UART1_CTS, DRIVER_NAME);
1073 # endif
1074 #endif
1075
1076 #ifdef CONFIG_SERIAL_BFIN_UART2
1077         peripheral_request(P_UART2_TX, DRIVER_NAME);
1078         peripheral_request(P_UART2_RX, DRIVER_NAME);
1079 #endif
1080
1081 #ifdef CONFIG_SERIAL_BFIN_UART3
1082         peripheral_request(P_UART3_TX, DRIVER_NAME);
1083         peripheral_request(P_UART3_RX, DRIVER_NAME);
1084
1085 # if defined(CONFIG_BFIN_UART3_CTSRTS) && defined(CONFIG_BF54x)
1086         peripheral_request(P_UART3_RTS, DRIVER_NAME);
1087         peripheral_request(P_UART3_CTS, DRIVER_NAME);
1088 # endif
1089 #endif
1090 }
1091
1092 static void __init bfin_serial_init_ports(void)
1093 {
1094         static int first = 1;
1095         int i;
1096
1097         if (!first)
1098                 return;
1099         first = 0;
1100
1101         bfin_serial_hw_init();
1102
1103         for (i = 0; i < nr_active_ports; i++) {
1104                 bfin_serial_ports[i].port.uartclk   = get_sclk();
1105                 bfin_serial_ports[i].port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
1106                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
1107                 bfin_serial_ports[i].port.line      = i;
1108                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
1109                 bfin_serial_ports[i].port.membase   =
1110                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
1111                 bfin_serial_ports[i].port.mapbase   =
1112                         bfin_serial_resource[i].uart_base_addr;
1113                 bfin_serial_ports[i].port.irq       =
1114                         bfin_serial_resource[i].uart_irq;
1115                 bfin_serial_ports[i].status_irq     =
1116                         bfin_serial_resource[i].uart_status_irq;
1117                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
1118 #ifdef CONFIG_SERIAL_BFIN_DMA
1119                 bfin_serial_ports[i].tx_done        = 1;
1120                 bfin_serial_ports[i].tx_count       = 0;
1121                 bfin_serial_ports[i].tx_dma_channel =
1122                         bfin_serial_resource[i].uart_tx_dma_channel;
1123                 bfin_serial_ports[i].rx_dma_channel =
1124                         bfin_serial_resource[i].uart_rx_dma_channel;
1125                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
1126 #endif
1127 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1128         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1129                 bfin_serial_ports[i].cts_pin        =
1130                         bfin_serial_resource[i].uart_cts_pin;
1131                 bfin_serial_ports[i].rts_pin        =
1132                         bfin_serial_resource[i].uart_rts_pin;
1133 #endif
1134         }
1135 }
1136
1137 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1138 /*
1139  * If the port was already initialised (eg, by a boot loader),
1140  * try to determine the current setup.
1141  */
1142 static void __init
1143 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1144                            int *parity, int *bits)
1145 {
1146         unsigned short status;
1147
1148         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1149         if (status == (ERBFI | ETBEI)) {
1150                 /* ok, the port was enabled */
1151                 u16 lcr, dlh, dll;
1152
1153                 lcr = UART_GET_LCR(uart);
1154
1155                 *parity = 'n';
1156                 if (lcr & PEN) {
1157                         if (lcr & EPS)
1158                                 *parity = 'e';
1159                         else
1160                                 *parity = 'o';
1161                 }
1162                 switch (lcr & 0x03) {
1163                         case 0: *bits = 5; break;
1164                         case 1: *bits = 6; break;
1165                         case 2: *bits = 7; break;
1166                         case 3: *bits = 8; break;
1167                 }
1168                 /* Set DLAB in LCR to Access DLL and DLH */
1169                 UART_SET_DLAB(uart);
1170
1171                 dll = UART_GET_DLL(uart);
1172                 dlh = UART_GET_DLH(uart);
1173
1174                 /* Clear DLAB in LCR to Access THR RBR IER */
1175                 UART_CLEAR_DLAB(uart);
1176
1177                 *baud = get_sclk() / (16*(dll | dlh << 8));
1178         }
1179         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1180 }
1181
1182 static struct uart_driver bfin_serial_reg;
1183
1184 static int __init
1185 bfin_serial_console_setup(struct console *co, char *options)
1186 {
1187         struct bfin_serial_port *uart;
1188         int baud = 57600;
1189         int bits = 8;
1190         int parity = 'n';
1191 # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1192         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1193         int flow = 'r';
1194 # else
1195         int flow = 'n';
1196 # endif
1197
1198         /*
1199          * Check whether an invalid uart number has been specified, and
1200          * if so, search for the first available port that does have
1201          * console support.
1202          */
1203         if (co->index == -1 || co->index >= nr_active_ports)
1204                 co->index = 0;
1205         uart = &bfin_serial_ports[co->index];
1206
1207         if (options)
1208                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1209         else
1210                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1211
1212         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1213 }
1214 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1215                                  defined (CONFIG_EARLY_PRINTK) */
1216
1217 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1218 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1219 {
1220         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1221         while (!(UART_GET_LSR(uart) & THRE))
1222                 barrier();
1223         UART_PUT_CHAR(uart, ch);
1224         SSYNC();
1225 }
1226
1227 /*
1228  * Interrupts are disabled on entering
1229  */
1230 static void
1231 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1232 {
1233         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1234         unsigned long flags;
1235
1236         spin_lock_irqsave(&uart->port.lock, flags);
1237         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1238         spin_unlock_irqrestore(&uart->port.lock, flags);
1239
1240 }
1241
1242 static struct console bfin_serial_console = {
1243         .name           = BFIN_SERIAL_NAME,
1244         .write          = bfin_serial_console_write,
1245         .device         = uart_console_device,
1246         .setup          = bfin_serial_console_setup,
1247         .flags          = CON_PRINTBUFFER,
1248         .index          = -1,
1249         .data           = &bfin_serial_reg,
1250 };
1251
1252 static int __init bfin_serial_rs_console_init(void)
1253 {
1254         bfin_serial_init_ports();
1255         register_console(&bfin_serial_console);
1256
1257         return 0;
1258 }
1259 console_initcall(bfin_serial_rs_console_init);
1260
1261 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1262 #else
1263 #define BFIN_SERIAL_CONSOLE     NULL
1264 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1265
1266
1267 #ifdef CONFIG_EARLY_PRINTK
1268 static __init void early_serial_putc(struct uart_port *port, int ch)
1269 {
1270         unsigned timeout = 0xffff;
1271         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1272
1273         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1274                 cpu_relax();
1275         UART_PUT_CHAR(uart, ch);
1276 }
1277
1278 static __init void early_serial_write(struct console *con, const char *s,
1279                                         unsigned int n)
1280 {
1281         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1282         unsigned int i;
1283
1284         for (i = 0; i < n; i++, s++) {
1285                 if (*s == '\n')
1286                         early_serial_putc(&uart->port, '\r');
1287                 early_serial_putc(&uart->port, *s);
1288         }
1289 }
1290
1291 /*
1292  * This should have a .setup or .early_setup in it, but then things get called
1293  * without the command line options, and the baud rate gets messed up - so
1294  * don't let the common infrastructure play with things. (see calls to setup
1295  * & earlysetup in ./kernel/printk.c:register_console()
1296  */
1297 static struct __initdata console bfin_early_serial_console = {
1298         .name = "early_BFuart",
1299         .write = early_serial_write,
1300         .device = uart_console_device,
1301         .flags = CON_PRINTBUFFER,
1302         .index = -1,
1303         .data  = &bfin_serial_reg,
1304 };
1305
1306 struct console __init *bfin_earlyserial_init(unsigned int port,
1307                                                 unsigned int cflag)
1308 {
1309         struct bfin_serial_port *uart;
1310         struct ktermios t;
1311
1312         if (port == -1 || port >= nr_active_ports)
1313                 port = 0;
1314         bfin_serial_init_ports();
1315         bfin_early_serial_console.index = port;
1316         uart = &bfin_serial_ports[port];
1317         t.c_cflag = cflag;
1318         t.c_iflag = 0;
1319         t.c_oflag = 0;
1320         t.c_lflag = ICANON;
1321         t.c_line = port;
1322         bfin_serial_set_termios(&uart->port, &t, &t);
1323         return &bfin_early_serial_console;
1324 }
1325
1326 #endif /* CONFIG_EARLY_PRINTK */
1327
1328 static struct uart_driver bfin_serial_reg = {
1329         .owner                  = THIS_MODULE,
1330         .driver_name            = "bfin-uart",
1331         .dev_name               = BFIN_SERIAL_NAME,
1332         .major                  = BFIN_SERIAL_MAJOR,
1333         .minor                  = BFIN_SERIAL_MINOR,
1334         .nr                     = BFIN_UART_NR_PORTS,
1335         .cons                   = BFIN_SERIAL_CONSOLE,
1336 };
1337
1338 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1339 {
1340         int i;
1341
1342         for (i = 0; i < nr_active_ports; i++) {
1343                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1344                         continue;
1345                 uart_suspend_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1346         }
1347
1348         return 0;
1349 }
1350
1351 static int bfin_serial_resume(struct platform_device *dev)
1352 {
1353         int i;
1354
1355         for (i = 0; i < nr_active_ports; i++) {
1356                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1357                         continue;
1358                 uart_resume_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1359         }
1360
1361         return 0;
1362 }
1363
1364 static int bfin_serial_probe(struct platform_device *dev)
1365 {
1366         struct resource *res = dev->resource;
1367         int i;
1368
1369         for (i = 0; i < dev->num_resources; i++, res++)
1370                 if (res->flags & IORESOURCE_MEM)
1371                         break;
1372
1373         if (i < dev->num_resources) {
1374                 for (i = 0; i < nr_active_ports; i++, res++) {
1375                         if (bfin_serial_ports[i].port.mapbase != res->start)
1376                                 continue;
1377                         bfin_serial_ports[i].port.dev = &dev->dev;
1378                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1379                 }
1380         }
1381
1382         return 0;
1383 }
1384
1385 static int bfin_serial_remove(struct platform_device *dev)
1386 {
1387         int i;
1388
1389         for (i = 0; i < nr_active_ports; i++) {
1390                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1391                         continue;
1392                 uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1393                 bfin_serial_ports[i].port.dev = NULL;
1394 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1395         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1396                 gpio_free(bfin_serial_ports[i].cts_pin);
1397                 gpio_free(bfin_serial_ports[i].rts_pin);
1398 #endif
1399         }
1400
1401         return 0;
1402 }
1403
1404 static struct platform_driver bfin_serial_driver = {
1405         .probe          = bfin_serial_probe,
1406         .remove         = bfin_serial_remove,
1407         .suspend        = bfin_serial_suspend,
1408         .resume         = bfin_serial_resume,
1409         .driver         = {
1410                 .name   = "bfin-uart",
1411                 .owner  = THIS_MODULE,
1412         },
1413 };
1414
1415 static int __init bfin_serial_init(void)
1416 {
1417         int ret;
1418
1419         pr_info("Serial: Blackfin serial driver\n");
1420
1421         bfin_serial_init_ports();
1422
1423         ret = uart_register_driver(&bfin_serial_reg);
1424         if (ret == 0) {
1425                 ret = platform_driver_register(&bfin_serial_driver);
1426                 if (ret) {
1427                         pr_debug("uart register failed\n");
1428                         uart_unregister_driver(&bfin_serial_reg);
1429                 }
1430         }
1431         return ret;
1432 }
1433
1434 static void __exit bfin_serial_exit(void)
1435 {
1436         platform_driver_unregister(&bfin_serial_driver);
1437         uart_unregister_driver(&bfin_serial_reg);
1438 }
1439
1440
1441 module_init(bfin_serial_init);
1442 module_exit(bfin_serial_exit);
1443
1444 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1445 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1446 MODULE_LICENSE("GPL");
1447 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1448 MODULE_ALIAS("platform:bfin-uart");