drivers/serial/bfin_5xx.c

   1 /*
   2  * Blackfin On-Chip Serial Driver
   3  *
   4  * Copyright 2006-2008 Analog Devices Inc.
   5  *
   6  * Enter bugs at http://blackfin.uclinux.org/
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  12 #define SUPPORT_SYSRQ
  13 #endif
  14
  15 #include <linux/module.h>
  16 #include <linux/ioport.h>
  17 #include <linux/init.h>
  18 #include <linux/console.h>
  19 #include <linux/sysrq.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/tty.h>
  22 #include <linux/tty_flip.h>
  23 #include <linux/serial_core.h>
  24
  25 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  26         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  27 #include <linux/kgdb.h>
  28 #include <asm/irq_regs.h>
  29 #endif
  30
  31 #include <asm/gpio.h>
  32 #include <mach/bfin_serial_5xx.h>
  33
  34 #ifdef CONFIG_SERIAL_BFIN_DMA
  35 #include <linux/dma-mapping.h>
  36 #include <asm/io.h>
  37 #include <asm/irq.h>
  38 #include <asm/cacheflush.h>
  39 #endif
  40
  41 #ifdef CONFIG_SERIAL_BFIN_MODULE
  42 # undef CONFIG_EARLY_PRINTK
  43 #endif
  44
  45 #ifdef CONFIG_SERIAL_BFIN_MODULE
  46 # undef CONFIG_EARLY_PRINTK
  47 #endif
  48
  49 /* UART name and device definitions */
  50 #define BFIN_SERIAL_NAME        "ttyBF"
  51 #define BFIN_SERIAL_MAJOR       204
  52 #define BFIN_SERIAL_MINOR       64
  53
  54 static struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
  55 static int nr_active_ports = ARRAY_SIZE(bfin_serial_resource);
  56
  57 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  58         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  59
  60 # ifndef CONFIG_SERIAL_BFIN_PIO
  61 #  error KGDB only support UART in PIO mode.
  62 # endif
  63
  64 static int kgdboc_port_line;
  65 static int kgdboc_break_enabled;
  66 #endif
  67 /*
  68  * Setup for console. Argument comes from the menuconfig
  69  */
  70 #define DMA_RX_XCOUNT           512
  71 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
  72
  73 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
  74
  75 #ifdef CONFIG_SERIAL_BFIN_DMA
  76 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  77 #else
  78 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  79 #endif
  80
  81 static void bfin_serial_reset_irda(struct uart_port *port);
  82
  83 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  84         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  85 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  86 {
  87         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  88         if (uart->cts_pin < 0)
  89                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  90
  91         /* CTS PIN is negative assertive. */
  92         if (UART_GET_CTS(uart))
  93                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  94         else
  95                 return TIOCM_DSR | TIOCM_CAR;
  96 }
  97
  98 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  99 {
 100         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 101         if (uart->rts_pin < 0)
 102                 return;
 103
 104         /* RTS PIN is negative assertive. */
 105         if (mctrl & TIOCM_RTS)
 106                 UART_ENABLE_RTS(uart);
 107         else
 108                 UART_DISABLE_RTS(uart);
 109 }
 110
 111 /*
 112  * Handle any change of modem status signal.
 113  */
 114 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
 115 {
 116         struct bfin_serial_port *uart = dev_id;
 117         unsigned int status;
 118
 119         status = bfin_serial_get_mctrl(&uart->port);
 120         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
 121 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 122         uart->scts = 1;
 123         UART_CLEAR_SCTS(uart);
 124         UART_CLEAR_IER(uart, EDSSI);
 125 #endif
 126
 127         return IRQ_HANDLED;
 128 }
 129 #else
 130 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
 131 {
 132         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 133 }
 134
 135 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 136 {
 137 }
 138 #endif
 139
 140 /*
 141  * interrupts are disabled on entry
 142  */
 143 static void bfin_serial_stop_tx(struct uart_port *port)
 144 {
 145         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 146 #ifdef CONFIG_SERIAL_BFIN_DMA
 147         struct circ_buf *xmit = &uart->port.state->xmit;
 148 #endif
 149
 150         while (!(UART_GET_LSR(uart) & TEMT))
 151                 cpu_relax();
 152
 153 #ifdef CONFIG_SERIAL_BFIN_DMA
 154         disable_dma(uart->tx_dma_channel);
 155         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 156         uart->port.icount.tx += uart->tx_count;
 157         uart->tx_count = 0;
 158         uart->tx_done = 1;
 159 #else
 160 #ifdef CONFIG_BF54x
 161         /* Clear TFI bit */
 162         UART_PUT_LSR(uart, TFI);
 163 #endif
 164         UART_CLEAR_IER(uart, ETBEI);
 165 #endif
 166 }
 167
 168 /*
 169  * port is locked and interrupts are disabled
 170  */
 171 static void bfin_serial_start_tx(struct uart_port *port)
 172 {
 173         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 174         struct tty_struct *tty = uart->port.state->port.tty;
 175
 176 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 177         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
 178                 uart->scts = 0;
 179                 uart_handle_cts_change(&uart->port, uart->scts);
 180         }
 181 #endif
 182
 183         /*
 184          * To avoid losting RX interrupt, we reset IR function
 185          * before sending data.
 186          */
 187         if (tty->termios->c_line == N_IRDA)
 188                 bfin_serial_reset_irda(port);
 189
 190 #ifdef CONFIG_SERIAL_BFIN_DMA
 191         if (uart->tx_done)
 192                 bfin_serial_dma_tx_chars(uart);
 193 #else
 194         UART_SET_IER(uart, ETBEI);
 195         bfin_serial_tx_chars(uart);
 196 #endif
 197 }
 198
 199 /*
 200  * Interrupts are enabled
 201  */
 202 static void bfin_serial_stop_rx(struct uart_port *port)
 203 {
 204         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 205
 206         UART_CLEAR_IER(uart, ERBFI);
 207 }
 208
 209 /*
 210  * Set the modem control timer to fire immediately.
 211  */
 212 static void bfin_serial_enable_ms(struct uart_port *port)
 213 {
 214 }
 215
 216
 217 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
 218 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
 219 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
 220 #else
 221 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
 222 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
 223 #endif
 224
 225 #ifdef CONFIG_SERIAL_BFIN_PIO
 226 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
 227 {
 228         struct tty_struct *tty = NULL;
 229         unsigned int status, ch, flg;
 230         static struct timeval anomaly_start = { .tv_sec = 0 };
 231
 232         status = UART_GET_LSR(uart);
 233         UART_CLEAR_LSR(uart);
 234
 235         ch = UART_GET_CHAR(uart);
 236         uart->port.icount.rx++;
 237
 238 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 239         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 240         if (kgdb_connected && kgdboc_port_line == uart->port.line
 241                 && kgdboc_break_enabled)
 242                 if (ch == 0x3) {/* Ctrl + C */
 243                         kgdb_breakpoint();
 244                         return;
 245                 }
 246
 247         if (!uart->port.state || !uart->port.state->port.tty)
 248                 return;
 249 #endif
 250         tty = uart->port.state->port.tty;
 251
 252         if (ANOMALY_05000363) {
 253                 /* The BF533 (and BF561) family of processors have a nice anomaly
 254                  * where they continuously generate characters for a "single" break.
 255                  * We have to basically ignore this flood until the "next" valid
 256                  * character comes across.  Due to the nature of the flood, it is
 257                  * not possible to reliably catch bytes that are sent too quickly
 258                  * after this break.  So application code talking to the Blackfin
 259                  * which sends a break signal must allow at least 1.5 character
 260                  * times after the end of the break for things to stabilize.  This
 261                  * timeout was picked as it must absolutely be larger than 1
 262                  * character time +/- some percent.  So 1.5 sounds good.  All other
 263                  * Blackfin families operate properly.  Woo.
 264                  */
 265                 if (anomaly_start.tv_sec) {
 266                         struct timeval curr;
 267                         suseconds_t usecs;
 268
 269                         if ((~ch & (~ch + 1)) & 0xff)
 270                                 goto known_good_char;
 271
 272                         do_gettimeofday(&curr);
 273                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
 274                                 goto known_good_char;
 275
 276                         usecs = 0;
 277                         if (curr.tv_sec != anomaly_start.tv_sec)
 278                                 usecs += USEC_PER_SEC;
 279                         usecs += curr.tv_usec - anomaly_start.tv_usec;
 280
 281                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
 282                                 goto known_good_char;
 283
 284                         if (ch)
 285                                 anomaly_start.tv_sec = 0;
 286                         else
 287                                 anomaly_start = curr;
 288
 289                         return;
 290
 291  known_good_char:
 292                         status &= ~BI;
 293                         anomaly_start.tv_sec = 0;
 294                 }
 295         }
 296
 297         if (status & BI) {
 298                 if (ANOMALY_05000363)
 299                         if (bfin_revid() < 5)
 300                                 do_gettimeofday(&anomaly_start);
 301                 uart->port.icount.brk++;
 302                 if (uart_handle_break(&uart->port))
 303                         goto ignore_char;
 304                 status &= ~(PE | FE);
 305         }
 306         if (status & PE)
 307                 uart->port.icount.parity++;
 308         if (status & OE)
 309                 uart->port.icount.overrun++;
 310         if (status & FE)
 311                 uart->port.icount.frame++;
 312
 313         status &= uart->port.read_status_mask;
 314
 315         if (status & BI)
 316                 flg = TTY_BREAK;
 317         else if (status & PE)
 318                 flg = TTY_PARITY;
 319         else if (status & FE)
 320                 flg = TTY_FRAME;
 321         else
 322                 flg = TTY_NORMAL;
 323
 324         if (uart_handle_sysrq_char(&uart->port, ch))
 325                 goto ignore_char;
 326
 327         uart_insert_char(&uart->port, status, OE, ch, flg);
 328
 329  ignore_char:
 330         tty_flip_buffer_push(tty);
 331 }
 332
 333 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
 334 {
 335         struct circ_buf *xmit = &uart->port.state->xmit;
 336
 337         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 338 #ifdef CONFIG_BF54x
 339                 /* Clear TFI bit */
 340                 UART_PUT_LSR(uart, TFI);
 341 #endif
 342                 /* Anomaly notes:
 343                  *  05000215 -  we always clear ETBEI within last UART TX
 344                  *              interrupt to end a string. It is always set
 345                  *              when start a new tx.
 346                  */
 347                 UART_CLEAR_IER(uart, ETBEI);
 348                 return;
 349         }
 350
 351         if (uart->port.x_char) {
 352                 UART_PUT_CHAR(uart, uart->port.x_char);
 353                 uart->port.icount.tx++;
 354                 uart->port.x_char = 0;
 355         }
 356
 357         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
 358                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
 359                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 360                 uart->port.icount.tx++;
 361                 SSYNC();
 362         }
 363
 364         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 365                 uart_write_wakeup(&uart->port);
 366 }
 367
 368 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
 369 {
 370         struct bfin_serial_port *uart = dev_id;
 371
 372         spin_lock(&uart->port.lock);
 373         while (UART_GET_LSR(uart) & DR)
 374                 bfin_serial_rx_chars(uart);
 375         spin_unlock(&uart->port.lock);
 376
 377         return IRQ_HANDLED;
 378 }
 379
 380 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
 381 {
 382         struct bfin_serial_port *uart = dev_id;
 383
 384 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 385         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
 386                 uart->scts = 0;
 387                 uart_handle_cts_change(&uart->port, uart->scts);
 388         }
 389 #endif
 390         spin_lock(&uart->port.lock);
 391         if (UART_GET_LSR(uart) & THRE)
 392                 bfin_serial_tx_chars(uart);
 393         spin_unlock(&uart->port.lock);
 394
 395         return IRQ_HANDLED;
 396 }
 397 #endif
 398
 399 #ifdef CONFIG_SERIAL_BFIN_DMA
 400 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
 401 {
 402         struct circ_buf *xmit = &uart->port.state->xmit;
 403
 404         uart->tx_done = 0;
 405
 406         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 407                 uart->tx_count = 0;
 408                 uart->tx_done = 1;
 409                 return;
 410         }
 411
 412         if (uart->port.x_char) {
 413                 UART_PUT_CHAR(uart, uart->port.x_char);
 414                 uart->port.icount.tx++;
 415                 uart->port.x_char = 0;
 416         }
 417
 418         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
 419         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
 420                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
 421         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
 422                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
 423         set_dma_config(uart->tx_dma_channel,
 424                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
 425                         INTR_ON_BUF,
 426                         DIMENSION_LINEAR,
 427                         DATA_SIZE_8,
 428                         DMA_SYNC_RESTART));
 429         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
 430         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
 431         set_dma_x_modify(uart->tx_dma_channel, 1);
 432         SSYNC();
 433         enable_dma(uart->tx_dma_channel);
 434
 435         UART_SET_IER(uart, ETBEI);
 436 }
 437
 438 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
 439 {
 440         struct tty_struct *tty = uart->port.state->port.tty;
 441         int i, flg, status;
 442
 443         status = UART_GET_LSR(uart);
 444         UART_CLEAR_LSR(uart);
 445
 446         uart->port.icount.rx +=
 447                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
 448                 UART_XMIT_SIZE);
 449
 450         if (status & BI) {
 451                 uart->port.icount.brk++;
 452                 if (uart_handle_break(&uart->port))
 453                         goto dma_ignore_char;
 454                 status &= ~(PE | FE);
 455         }
 456         if (status & PE)
 457                 uart->port.icount.parity++;
 458         if (status & OE)
 459                 uart->port.icount.overrun++;
 460         if (status & FE)
 461                 uart->port.icount.frame++;
 462
 463         status &= uart->port.read_status_mask;
 464
 465         if (status & BI)
 466                 flg = TTY_BREAK;
 467         else if (status & PE)
 468                 flg = TTY_PARITY;
 469         else if (status & FE)
 470                 flg = TTY_FRAME;
 471         else
 472                 flg = TTY_NORMAL;
 473
 474         for (i = uart->rx_dma_buf.tail; ; i++) {
 475                 if (i >= UART_XMIT_SIZE)
 476                         i = 0;
 477                 if (i == uart->rx_dma_buf.head)
 478                         break;
 479                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
 480                         uart_insert_char(&uart->port, status, OE,
 481                                 uart->rx_dma_buf.buf[i], flg);
 482         }
 483
 484  dma_ignore_char:
 485         tty_flip_buffer_push(tty);
 486 }
 487
 488 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
 489 {
 490         int x_pos, pos;
 491
 492         dma_disable_irq(uart->tx_dma_channel);
 493         dma_disable_irq(uart->rx_dma_channel);
 494         spin_lock_bh(&uart->port.lock);
 495
 496         /* 2D DMA RX buffer ring is used. Because curr_y_count and
 497          * curr_x_count can't be read as an atomic operation,
 498          * curr_y_count should be read before curr_x_count. When
 499          * curr_x_count is read, curr_y_count may already indicate
 500          * next buffer line. But, the position calculated here is
 501          * still indicate the old line. The wrong position data may
 502          * be smaller than current buffer tail, which cause garbages
 503          * are received if it is not prohibit.
 504          */
 505         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 506         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 507         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 508         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 509                 uart->rx_dma_nrows = 0;
 510         x_pos = DMA_RX_XCOUNT - x_pos;
 511         if (x_pos == DMA_RX_XCOUNT)
 512                 x_pos = 0;
 513
 514         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
 515         /* Ignore receiving data if new position is in the same line of
 516          * current buffer tail and small.
 517          */
 518         if (pos > uart->rx_dma_buf.tail ||
 519                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 520                 uart->rx_dma_buf.head = pos;
 521                 bfin_serial_dma_rx_chars(uart);
 522                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 523         }
 524
 525         spin_unlock_bh(&uart->port.lock);
 526         dma_enable_irq(uart->tx_dma_channel);
 527         dma_enable_irq(uart->rx_dma_channel);
 528
 529         mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
 530 }
 531
 532 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
 533 {
 534         struct bfin_serial_port *uart = dev_id;
 535         struct circ_buf *xmit = &uart->port.state->xmit;
 536
 537 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 538         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) {
 539                 uart->scts = 0;
 540                 uart_handle_cts_change(&uart->port, uart->scts);
 541         }
 542 #endif
 543
 544         spin_lock(&uart->port.lock);
 545         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
 546                 disable_dma(uart->tx_dma_channel);
 547                 clear_dma_irqstat(uart->tx_dma_channel);
 548                 /* Anomaly notes:
 549                  *  05000215 -  we always clear ETBEI within last UART TX
 550                  *              interrupt to end a string. It is always set
 551                  *              when start a new tx.
 552                  */
 553                 UART_CLEAR_IER(uart, ETBEI);
 554                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 555                 uart->port.icount.tx += uart->tx_count;
 556
 557                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 558                         uart_write_wakeup(&uart->port);
 559
 560                 bfin_serial_dma_tx_chars(uart);
 561         }
 562
 563         spin_unlock(&uart->port.lock);
 564         return IRQ_HANDLED;
 565 }
 566
 567 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
 568 {
 569         struct bfin_serial_port *uart = dev_id;
 570         unsigned short irqstat;
 571         int x_pos, pos;
 572
 573         spin_lock(&uart->port.lock);
 574         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
 575         clear_dma_irqstat(uart->rx_dma_channel);
 576
 577         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 578         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 579         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 580         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 581                 uart->rx_dma_nrows = 0;
 582
 583         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
 584         if (pos > uart->rx_dma_buf.tail ||
 585                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 586                 uart->rx_dma_buf.head = pos;
 587                 bfin_serial_dma_rx_chars(uart);
 588                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 589         }
 590
 591         spin_unlock(&uart->port.lock);
 592
 593         return IRQ_HANDLED;
 594 }
 595 #endif
 596
 597 /*
 598  * Return TIOCSER_TEMT when transmitter is not busy.
 599  */
 600 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
 601 {
 602         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 603         unsigned short lsr;
 604
 605         lsr = UART_GET_LSR(uart);
 606         if (lsr & TEMT)
 607                 return TIOCSER_TEMT;
 608         else
 609                 return 0;
 610 }
 611
 612 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
 613 {
 614         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 615         u16 lcr = UART_GET_LCR(uart);
 616         if (break_state)
 617                 lcr |= SB;
 618         else
 619                 lcr &= ~SB;
 620         UART_PUT_LCR(uart, lcr);
 621         SSYNC();
 622 }
 623
 624 static int bfin_serial_startup(struct uart_port *port)
 625 {
 626         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 627
 628 #ifdef CONFIG_SERIAL_BFIN_DMA
 629         dma_addr_t dma_handle;
 630
 631         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
 632                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
 633                 return -EBUSY;
 634         }
 635
 636         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
 637                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
 638                 free_dma(uart->rx_dma_channel);
 639                 return -EBUSY;
 640         }
 641
 642         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
 643         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
 644
 645         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
 646         uart->rx_dma_buf.head = 0;
 647         uart->rx_dma_buf.tail = 0;
 648         uart->rx_dma_nrows = 0;
 649
 650         set_dma_config(uart->rx_dma_channel,
 651                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
 652                                 INTR_ON_ROW, DIMENSION_2D,
 653                                 DATA_SIZE_8,
 654                                 DMA_SYNC_RESTART));
 655         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
 656         set_dma_x_modify(uart->rx_dma_channel, 1);
 657         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
 658         set_dma_y_modify(uart->rx_dma_channel, 1);
 659         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
 660         enable_dma(uart->rx_dma_channel);
 661
 662         uart->rx_dma_timer.data = (unsigned long)(uart);
 663         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
 664         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
 665         add_timer(&(uart->rx_dma_timer));
 666 #else
 667 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 668         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 669         if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
 670                 kgdboc_break_enabled = 0;
 671         else {
 672 # endif
 673         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
 674              "BFIN_UART_RX", uart)) {
 675                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
 676                 return -EBUSY;
 677         }
 678
 679         if (request_irq
 680             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
 681              "BFIN_UART_TX", uart)) {
 682                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
 683                 free_irq(uart->port.irq, uart);
 684                 return -EBUSY;
 685         }
 686
 687 # ifdef CONFIG_BF54x
 688         {
 689                 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
 690
 691                 switch (uart->port.irq) {
 692                 case IRQ_UART3_RX:
 693                         uart_dma_ch_rx = CH_UART3_RX;
 694                         uart_dma_ch_tx = CH_UART3_TX;
 695                         break;
 696                 case IRQ_UART2_RX:
 697                         uart_dma_ch_rx = CH_UART2_RX;
 698                         uart_dma_ch_tx = CH_UART2_TX;
 699                         break;
 700                 default:
 701                         uart_dma_ch_rx = uart_dma_ch_tx = 0;
 702                         break;
 703                 };
 704
 705                 if (uart_dma_ch_rx &&
 706                         request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
 707                         printk(KERN_NOTICE"Fail to attach UART interrupt\n");
 708                         free_irq(uart->port.irq, uart);
 709                         free_irq(uart->port.irq + 1, uart);
 710                         return -EBUSY;
 711                 }
 712                 if (uart_dma_ch_tx &&
 713                         request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
 714                         printk(KERN_NOTICE "Fail to attach UART interrupt\n");
 715                         free_dma(uart_dma_ch_rx);
 716                         free_irq(uart->port.irq, uart);
 717                         free_irq(uart->port.irq + 1, uart);
 718                         return -EBUSY;
 719                 }
 720         }
 721 # endif
 722 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 723         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 724         }
 725 # endif
 726 #endif
 727
 728 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 729         if (uart->cts_pin >= 0) {
 730                 if (request_irq(gpio_to_irq(uart->cts_pin),
 731                         bfin_serial_mctrl_cts_int,
 732                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
 733                         IRQF_DISABLED, "BFIN_UART_CTS", uart)) {
 734                         uart->cts_pin = -1;
 735                         pr_info("Unable to attach BlackFin UART CTS interrupt.\
 736                                  So, disable it.\n");
 737                 }
 738         }
 739         if (uart->rts_pin >= 0) {
 740                 gpio_request(uart->rts_pin, DRIVER_NAME);
 741                 gpio_direction_output(uart->rts_pin, 0);
 742         }
 743 #endif
 744 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 745         if (request_irq(uart->status_irq,
 746                 bfin_serial_mctrl_cts_int,
 747                 IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
 748                 pr_info("Unable to attach BlackFin UART Modem \
 749                         Status interrupt.\n");
 750         }
 751
 752         /* CTS RTS PINs are negative assertive. */
 753         UART_PUT_MCR(uart, ACTS);
 754         UART_SET_IER(uart, EDSSI);
 755 #endif
 756
 757         UART_SET_IER(uart, ERBFI);
 758         return 0;
 759 }
 760
 761 static void bfin_serial_shutdown(struct uart_port *port)
 762 {
 763         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 764
 765 #ifdef CONFIG_SERIAL_BFIN_DMA
 766         disable_dma(uart->tx_dma_channel);
 767         free_dma(uart->tx_dma_channel);
 768         disable_dma(uart->rx_dma_channel);
 769         free_dma(uart->rx_dma_channel);
 770         del_timer(&(uart->rx_dma_timer));
 771         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
 772 #else
 773 #ifdef CONFIG_BF54x
 774         switch (uart->port.irq) {
 775         case IRQ_UART3_RX:
 776                 free_dma(CH_UART3_RX);
 777                 free_dma(CH_UART3_TX);
 778                 break;
 779         case IRQ_UART2_RX:
 780                 free_dma(CH_UART2_RX);
 781                 free_dma(CH_UART2_TX);
 782                 break;
 783         default:
 784                 break;
 785         };
 786 #endif
 787         free_irq(uart->port.irq, uart);
 788         free_irq(uart->port.irq+1, uart);
 789 #endif
 790
 791 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 792         if (uart->cts_pin >= 0)
 793                 free_irq(gpio_to_irq(uart->cts_pin), uart);
 794         if (uart->rts_pin >= 0)
 795                 gpio_free(uart->rts_pin);
 796 #endif
 797 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 798         if (UART_GET_IER(uart) && EDSSI)
 799                 free_irq(uart->status_irq, uart);
 800 #endif
 801 }
 802
 803 static void
 804 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
 805                    struct ktermios *old)
 806 {
 807         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 808         unsigned long flags;
 809         unsigned int baud, quot;
 810         unsigned short val, ier, lcr = 0;
 811
 812         switch (termios->c_cflag & CSIZE) {
 813         case CS8:
 814                 lcr = WLS(8);
 815                 break;
 816         case CS7:
 817                 lcr = WLS(7);
 818                 break;
 819         case CS6:
 820                 lcr = WLS(6);
 821                 break;
 822         case CS5:
 823                 lcr = WLS(5);
 824                 break;
 825         default:
 826                 printk(KERN_ERR "%s: word lengh not supported\n",
 827                         __func__);
 828         }
 829
 830         /* Anomaly notes:
 831          *  05000231 -  STOP bit is always set to 1 whatever the user is set.
 832          */
 833         if (termios->c_cflag & CSTOPB) {
 834                 if (ANOMALY_05000231)
 835                         printk(KERN_WARNING "STOP bits other than 1 is not "
 836                                 "supported in case of anomaly 05000231.\n");
 837                 else
 838                         lcr |= STB;
 839         }
 840         if (termios->c_cflag & PARENB)
 841                 lcr |= PEN;
 842         if (!(termios->c_cflag & PARODD))
 843                 lcr |= EPS;
 844         if (termios->c_cflag & CMSPAR)
 845                 lcr |= STP;
 846
 847         port->read_status_mask = OE;
 848         if (termios->c_iflag & INPCK)
 849                 port->read_status_mask |= (FE | PE);
 850         if (termios->c_iflag & (BRKINT | PARMRK))
 851                 port->read_status_mask |= BI;
 852
 853         /*
 854          * Characters to ignore
 855          */
 856         port->ignore_status_mask = 0;
 857         if (termios->c_iflag & IGNPAR)
 858                 port->ignore_status_mask |= FE | PE;
 859         if (termios->c_iflag & IGNBRK) {
 860                 port->ignore_status_mask |= BI;
 861                 /*
 862                  * If we're ignoring parity and break indicators,
 863                  * ignore overruns too (for real raw support).
 864                  */
 865                 if (termios->c_iflag & IGNPAR)
 866                         port->ignore_status_mask |= OE;
 867         }
 868
 869         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 870         quot = uart_get_divisor(port, baud) - ANOMALY_05000230;
 871         spin_lock_irqsave(&uart->port.lock, flags);
 872
 873         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
 874
 875         /* Disable UART */
 876         ier = UART_GET_IER(uart);
 877         UART_DISABLE_INTS(uart);
 878
 879         /* Set DLAB in LCR to Access DLL and DLH */
 880         UART_SET_DLAB(uart);
 881
 882         UART_PUT_DLL(uart, quot & 0xFF);
 883         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
 884         SSYNC();
 885
 886         /* Clear DLAB in LCR to Access THR RBR IER */
 887         UART_CLEAR_DLAB(uart);
 888
 889         UART_PUT_LCR(uart, lcr);
 890
 891         /* Enable UART */
 892         UART_ENABLE_INTS(uart, ier);
 893
 894         val = UART_GET_GCTL(uart);
 895         val |= UCEN;
 896         UART_PUT_GCTL(uart, val);
 897
 898         /* Port speed changed, update the per-port timeout. */
 899         uart_update_timeout(port, termios->c_cflag, baud);
 900
 901         spin_unlock_irqrestore(&uart->port.lock, flags);
 902 }
 903
 904 static const char *bfin_serial_type(struct uart_port *port)
 905 {
 906         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 907
 908         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
 909 }
 910
 911 /*
 912  * Release the memory region(s) being used by 'port'.
 913  */
 914 static void bfin_serial_release_port(struct uart_port *port)
 915 {
 916 }
 917
 918 /*
 919  * Request the memory region(s) being used by 'port'.
 920  */
 921 static int bfin_serial_request_port(struct uart_port *port)
 922 {
 923         return 0;
 924 }
 925
 926 /*
 927  * Configure/autoconfigure the port.
 928  */
 929 static void bfin_serial_config_port(struct uart_port *port, int flags)
 930 {
 931         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 932
 933         if (flags & UART_CONFIG_TYPE &&
 934             bfin_serial_request_port(&uart->port) == 0)
 935                 uart->port.type = PORT_BFIN;
 936 }
 937
 938 /*
 939  * Verify the new serial_struct (for TIOCSSERIAL).
 940  * The only change we allow are to the flags and type, and
 941  * even then only between PORT_BFIN and PORT_UNKNOWN
 942  */
 943 static int
 944 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
 945 {
 946         return 0;
 947 }
 948
 949 /*
 950  * Enable the IrDA function if tty->ldisc.num is N_IRDA.
 951  * In other cases, disable IrDA function.
 952  */
 953 static void bfin_serial_set_ldisc(struct uart_port *port)
 954 {
 955         int line = port->line;
 956         unsigned short val;
 957
 958         if (line >= port->state->port.tty->driver->num)
 959                 return;
 960
 961         switch (port->state->port.tty->termios->c_line) {
 962         case N_IRDA:
 963                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
 964                 val |= (IREN | RPOLC);
 965                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
 966                 break;
 967         default:
 968                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
 969                 val &= ~(IREN | RPOLC);
 970                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
 971         }
 972 }
 973
 974 static void bfin_serial_reset_irda(struct uart_port *port)
 975 {
 976         int line = port->line;
 977         unsigned short val;
 978
 979         val = UART_GET_GCTL(&bfin_serial_ports[line]);
 980         val &= ~(IREN | RPOLC);
 981         UART_PUT_GCTL(&bfin_serial_ports[line], val);
 982         SSYNC();
 983         val |= (IREN | RPOLC);
 984         UART_PUT_GCTL(&bfin_serial_ports[line], val);
 985         SSYNC();
 986 }
 987
 988 #ifdef CONFIG_CONSOLE_POLL
 989 /* Anomaly notes:
 990  *  05000099 -  Because we only use THRE in poll_put and DR in poll_get,
 991  *              losing other bits of UART_LSR is not a problem here.
 992  */
 993 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
 994 {
 995         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 996
 997         while (!(UART_GET_LSR(uart) & THRE))
 998                 cpu_relax();
 999
1000         UART_CLEAR_DLAB(uart);
1001         UART_PUT_CHAR(uart, (unsigned char)chr);
1002 }
1003
1004 static int bfin_serial_poll_get_char(struct uart_port *port)
1005 {
1006         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1007         unsigned char chr;
1008
1009         while (!(UART_GET_LSR(uart) & DR))
1010                 cpu_relax();
1011
1012         UART_CLEAR_DLAB(uart);
1013         chr = UART_GET_CHAR(uart);
1014
1015         return chr;
1016 }
1017 #endif
1018
1019 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1020         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1021 static void bfin_kgdboc_port_shutdown(struct uart_port *port)
1022 {
1023         if (kgdboc_break_enabled) {
1024                 kgdboc_break_enabled = 0;
1025                 bfin_serial_shutdown(port);
1026         }
1027 }
1028
1029 static int bfin_kgdboc_port_startup(struct uart_port *port)
1030 {
1031         kgdboc_port_line = port->line;
1032         kgdboc_break_enabled = !bfin_serial_startup(port);
1033         return 0;
1034 }
1035 #endif
1036
1037 static struct uart_ops bfin_serial_pops = {
1038         .tx_empty       = bfin_serial_tx_empty,
1039         .set_mctrl      = bfin_serial_set_mctrl,
1040         .get_mctrl      = bfin_serial_get_mctrl,
1041         .stop_tx        = bfin_serial_stop_tx,
1042         .start_tx       = bfin_serial_start_tx,
1043         .stop_rx        = bfin_serial_stop_rx,
1044         .enable_ms      = bfin_serial_enable_ms,
1045         .break_ctl      = bfin_serial_break_ctl,
1046         .startup        = bfin_serial_startup,
1047         .shutdown       = bfin_serial_shutdown,
1048         .set_termios    = bfin_serial_set_termios,
1049         .set_ldisc      = bfin_serial_set_ldisc,
1050         .type           = bfin_serial_type,
1051         .release_port   = bfin_serial_release_port,
1052         .request_port   = bfin_serial_request_port,
1053         .config_port    = bfin_serial_config_port,
1054         .verify_port    = bfin_serial_verify_port,
1055 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1056         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1057         .kgdboc_port_startup    = bfin_kgdboc_port_startup,
1058         .kgdboc_port_shutdown   = bfin_kgdboc_port_shutdown,
1059 #endif
1060 #ifdef CONFIG_CONSOLE_POLL
1061         .poll_put_char  = bfin_serial_poll_put_char,
1062         .poll_get_char  = bfin_serial_poll_get_char,
1063 #endif
1064 };
1065
1066 static void __init bfin_serial_hw_init(void)
1067 {
1068 #ifdef CONFIG_SERIAL_BFIN_UART0
1069         peripheral_request(P_UART0_TX, DRIVER_NAME);
1070         peripheral_request(P_UART0_RX, DRIVER_NAME);
1071 #endif
1072
1073 #ifdef CONFIG_SERIAL_BFIN_UART1
1074         peripheral_request(P_UART1_TX, DRIVER_NAME);
1075         peripheral_request(P_UART1_RX, DRIVER_NAME);
1076
1077 # if defined(CONFIG_BFIN_UART1_CTSRTS) && defined(CONFIG_BF54x)
1078         peripheral_request(P_UART1_RTS, DRIVER_NAME);
1079         peripheral_request(P_UART1_CTS, DRIVER_NAME);
1080 # endif
1081 #endif
1082
1083 #ifdef CONFIG_SERIAL_BFIN_UART2
1084         peripheral_request(P_UART2_TX, DRIVER_NAME);
1085         peripheral_request(P_UART2_RX, DRIVER_NAME);
1086 #endif
1087
1088 #ifdef CONFIG_SERIAL_BFIN_UART3
1089         peripheral_request(P_UART3_TX, DRIVER_NAME);
1090         peripheral_request(P_UART3_RX, DRIVER_NAME);
1091
1092 # if defined(CONFIG_BFIN_UART3_CTSRTS) && defined(CONFIG_BF54x)
1093         peripheral_request(P_UART3_RTS, DRIVER_NAME);
1094         peripheral_request(P_UART3_CTS, DRIVER_NAME);
1095 # endif
1096 #endif
1097 }
1098
1099 static void __init bfin_serial_init_ports(void)
1100 {
1101         static int first = 1;
1102         int i;
1103
1104         if (!first)
1105                 return;
1106         first = 0;
1107
1108         bfin_serial_hw_init();
1109
1110         for (i = 0; i < nr_active_ports; i++) {
1111                 spin_lock_init(&bfin_serial_ports[i].port.lock);
1112                 bfin_serial_ports[i].port.uartclk   = get_sclk();
1113                 bfin_serial_ports[i].port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
1114                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
1115                 bfin_serial_ports[i].port.line      = i;
1116                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
1117                 bfin_serial_ports[i].port.membase   =
1118                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
1119                 bfin_serial_ports[i].port.mapbase   =
1120                         bfin_serial_resource[i].uart_base_addr;
1121                 bfin_serial_ports[i].port.irq       =
1122                         bfin_serial_resource[i].uart_irq;
1123                 bfin_serial_ports[i].status_irq     =
1124                         bfin_serial_resource[i].uart_status_irq;
1125                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
1126 #ifdef CONFIG_SERIAL_BFIN_DMA
1127                 bfin_serial_ports[i].tx_done        = 1;
1128                 bfin_serial_ports[i].tx_count       = 0;
1129                 bfin_serial_ports[i].tx_dma_channel =
1130                         bfin_serial_resource[i].uart_tx_dma_channel;
1131                 bfin_serial_ports[i].rx_dma_channel =
1132                         bfin_serial_resource[i].uart_rx_dma_channel;
1133                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
1134 #endif
1135 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1136         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1137                 bfin_serial_ports[i].cts_pin        =
1138                         bfin_serial_resource[i].uart_cts_pin;
1139                 bfin_serial_ports[i].rts_pin        =
1140                         bfin_serial_resource[i].uart_rts_pin;
1141 #endif
1142         }
1143 }
1144
1145 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1146 /*
1147  * If the port was already initialised (eg, by a boot loader),
1148  * try to determine the current setup.
1149  */
1150 static void __init
1151 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1152                            int *parity, int *bits)
1153 {
1154         unsigned short status;
1155
1156         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1157         if (status == (ERBFI | ETBEI)) {
1158                 /* ok, the port was enabled */
1159                 u16 lcr, dlh, dll;
1160
1161                 lcr = UART_GET_LCR(uart);
1162
1163                 *parity = 'n';
1164                 if (lcr & PEN) {
1165                         if (lcr & EPS)
1166                                 *parity = 'e';
1167                         else
1168                                 *parity = 'o';
1169                 }
1170                 switch (lcr & 0x03) {
1171                         case 0: *bits = 5; break;
1172                         case 1: *bits = 6; break;
1173                         case 2: *bits = 7; break;
1174                         case 3: *bits = 8; break;
1175                 }
1176                 /* Set DLAB in LCR to Access DLL and DLH */
1177                 UART_SET_DLAB(uart);
1178
1179                 dll = UART_GET_DLL(uart);
1180                 dlh = UART_GET_DLH(uart);
1181
1182                 /* Clear DLAB in LCR to Access THR RBR IER */
1183                 UART_CLEAR_DLAB(uart);
1184
1185                 *baud = get_sclk() / (16*(dll | dlh << 8));
1186         }
1187         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1188 }
1189
1190 static struct uart_driver bfin_serial_reg;
1191
1192 static int __init
1193 bfin_serial_console_setup(struct console *co, char *options)
1194 {
1195         struct bfin_serial_port *uart;
1196         int baud = 57600;
1197         int bits = 8;
1198         int parity = 'n';
1199 # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1200         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1201         int flow = 'r';
1202 # else
1203         int flow = 'n';
1204 # endif
1205
1206         /*
1207          * Check whether an invalid uart number has been specified, and
1208          * if so, search for the first available port that does have
1209          * console support.
1210          */
1211         if (co->index == -1 || co->index >= nr_active_ports)
1212                 co->index = 0;
1213         uart = &bfin_serial_ports[co->index];
1214
1215         if (options)
1216                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1217         else
1218                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1219
1220         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1221 }
1222 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1223                                  defined (CONFIG_EARLY_PRINTK) */
1224
1225 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1226 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1227 {
1228         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1229         while (!(UART_GET_LSR(uart) & THRE))
1230                 barrier();
1231         UART_PUT_CHAR(uart, ch);
1232         SSYNC();
1233 }
1234
1235 /*
1236  * Interrupts are disabled on entering
1237  */
1238 static void
1239 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1240 {
1241         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1242         unsigned long flags;
1243
1244         spin_lock_irqsave(&uart->port.lock, flags);
1245         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1246         spin_unlock_irqrestore(&uart->port.lock, flags);
1247
1248 }
1249
1250 static struct console bfin_serial_console = {
1251         .name           = BFIN_SERIAL_NAME,
1252         .write          = bfin_serial_console_write,
1253         .device         = uart_console_device,
1254         .setup          = bfin_serial_console_setup,
1255         .flags          = CON_PRINTBUFFER,
1256         .index          = -1,
1257         .data           = &bfin_serial_reg,
1258 };
1259
1260 static int __init bfin_serial_rs_console_init(void)
1261 {
1262         bfin_serial_init_ports();
1263         register_console(&bfin_serial_console);
1264
1265         return 0;
1266 }
1267 console_initcall(bfin_serial_rs_console_init);
1268
1269 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1270 #else
1271 #define BFIN_SERIAL_CONSOLE     NULL
1272 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1273
1274
1275 #ifdef CONFIG_EARLY_PRINTK
1276 static __init void early_serial_putc(struct uart_port *port, int ch)
1277 {
1278         unsigned timeout = 0xffff;
1279         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1280
1281         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1282                 cpu_relax();
1283         UART_PUT_CHAR(uart, ch);
1284 }
1285
1286 static __init void early_serial_write(struct console *con, const char *s,
1287                                         unsigned int n)
1288 {
1289         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1290         unsigned int i;
1291
1292         for (i = 0; i < n; i++, s++) {
1293                 if (*s == '\n')
1294                         early_serial_putc(&uart->port, '\r');
1295                 early_serial_putc(&uart->port, *s);
1296         }
1297 }
1298
1299 /*
1300  * This should have a .setup or .early_setup in it, but then things get called
1301  * without the command line options, and the baud rate gets messed up - so
1302  * don't let the common infrastructure play with things. (see calls to setup
1303  * & earlysetup in ./kernel/printk.c:register_console()
1304  */
1305 static struct __initdata console bfin_early_serial_console = {
1306         .name = "early_BFuart",
1307         .write = early_serial_write,
1308         .device = uart_console_device,
1309         .flags = CON_PRINTBUFFER,
1310         .index = -1,
1311         .data  = &bfin_serial_reg,
1312 };
1313
1314 struct console __init *bfin_earlyserial_init(unsigned int port,
1315                                                 unsigned int cflag)
1316 {
1317         struct bfin_serial_port *uart;
1318         struct ktermios t;
1319
1320         if (port == -1 || port >= nr_active_ports)
1321                 port = 0;
1322         bfin_serial_init_ports();
1323         bfin_early_serial_console.index = port;
1324         uart = &bfin_serial_ports[port];
1325         t.c_cflag = cflag;
1326         t.c_iflag = 0;
1327         t.c_oflag = 0;
1328         t.c_lflag = ICANON;
1329         t.c_line = port;
1330         bfin_serial_set_termios(&uart->port, &t, &t);
1331         return &bfin_early_serial_console;
1332 }
1333
1334 #endif /* CONFIG_EARLY_PRINTK */
1335
1336 static struct uart_driver bfin_serial_reg = {
1337         .owner                  = THIS_MODULE,
1338         .driver_name            = "bfin-uart",
1339         .dev_name               = BFIN_SERIAL_NAME,
1340         .major                  = BFIN_SERIAL_MAJOR,
1341         .minor                  = BFIN_SERIAL_MINOR,
1342         .nr                     = BFIN_UART_NR_PORTS,
1343         .cons                   = BFIN_SERIAL_CONSOLE,
1344 };
1345
1346 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1347 {
1348         int i;
1349
1350         for (i = 0; i < nr_active_ports; i++) {
1351                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1352                         continue;
1353                 uart_suspend_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1354         }
1355
1356         return 0;
1357 }
1358
1359 static int bfin_serial_resume(struct platform_device *dev)
1360 {
1361         int i;
1362
1363         for (i = 0; i < nr_active_ports; i++) {
1364                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1365                         continue;
1366                 uart_resume_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1367         }
1368
1369         return 0;
1370 }
1371
1372 static int bfin_serial_probe(struct platform_device *dev)
1373 {
1374         struct resource *res = dev->resource;
1375         int i;
1376
1377         for (i = 0; i < dev->num_resources; i++, res++)
1378                 if (res->flags & IORESOURCE_MEM)
1379                         break;
1380
1381         if (i < dev->num_resources) {
1382                 for (i = 0; i < nr_active_ports; i++, res++) {
1383                         if (bfin_serial_ports[i].port.mapbase != res->start)
1384                                 continue;
1385                         bfin_serial_ports[i].port.dev = &dev->dev;
1386                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1387                 }
1388         }
1389
1390         return 0;
1391 }
1392
1393 static int bfin_serial_remove(struct platform_device *dev)
1394 {
1395         int i;
1396
1397         for (i = 0; i < nr_active_ports; i++) {
1398                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1399                         continue;
1400                 uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1401                 bfin_serial_ports[i].port.dev = NULL;
1402 #if defined(CONFIG_SERIAL_BFIN_CTSRTS)
1403                 gpio_free(bfin_serial_ports[i].cts_pin);
1404                 gpio_free(bfin_serial_ports[i].rts_pin);
1405 #endif
1406         }
1407
1408         return 0;
1409 }
1410
1411 static struct platform_driver bfin_serial_driver = {
1412         .probe          = bfin_serial_probe,
1413         .remove         = bfin_serial_remove,
1414         .suspend        = bfin_serial_suspend,
1415         .resume         = bfin_serial_resume,
1416         .driver         = {
1417                 .name   = "bfin-uart",
1418                 .owner  = THIS_MODULE,
1419         },
1420 };
1421
1422 static int __init bfin_serial_init(void)
1423 {
1424         int ret;
1425
1426         pr_info("Serial: Blackfin serial driver\n");
1427
1428         bfin_serial_init_ports();
1429
1430         ret = uart_register_driver(&bfin_serial_reg);
1431         if (ret == 0) {
1432                 ret = platform_driver_register(&bfin_serial_driver);
1433                 if (ret) {
1434                         pr_debug("uart register failed\n");
1435                         uart_unregister_driver(&bfin_serial_reg);
1436                 }
1437         }
1438         return ret;
1439 }
1440
1441 static void __exit bfin_serial_exit(void)
1442 {
1443         platform_driver_unregister(&bfin_serial_driver);
1444         uart_unregister_driver(&bfin_serial_reg);
1445 }
1446
1447
1448 module_init(bfin_serial_init);
1449 module_exit(bfin_serial_exit);
1450
1451 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1452 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1453 MODULE_LICENSE("GPL");
1454 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1455 MODULE_ALIAS("platform:bfin-uart");