drivers/scsi/lpfc/lpfc_hw4.h

   1 /*******************************************************************
   2  * This file is part of the Emulex Linux Device Driver for         *
   3  * Fibre Channel Host Bus Adapters.                                *
   4  * Copyright (C) 2009 Emulex.  All rights reserved.                *
   5  * EMULEX and SLI are trademarks of Emulex.                        *
   6  * www.emulex.com                                                  *
   7  *                                                                 *
   8  * This program is free software; you can redistribute it and/or   *
   9  * modify it under the terms of version 2 of the GNU General       *
  10  * Public License as published by the Free Software Foundation.    *
  11  * This program is distributed in the hope that it will be useful. *
  12  * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *
  13  * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *
  14  * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *
  15  * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  16  * TO BE LEGALLY INVALID.  See the GNU General Public License for  *
  17  * more details, a copy of which can be found in the file COPYING  *
  18  * included with this package.                                     *
  19  *******************************************************************/
  20
  21 /* Macros to deal with bit fields. Each bit field must have 3 #defines
  22  * associated with it (_SHIFT, _MASK, and _WORD).
  23  * EG. For a bit field that is in the 7th bit of the "field4" field of a
  24  * structure and is 2 bits in size the following #defines must exist:
  25  *      struct temp {
  26  *              uint32_t        field1;
  27  *              uint32_t        field2;
  28  *              uint32_t        field3;
  29  *              uint32_t        field4;
  30  *      #define example_bit_field_SHIFT         7
  31  *      #define example_bit_field_MASK          0x03
  32  *      #define example_bit_field_WORD          field4
  33  *              uint32_t        field5;
  34  *      };
  35  * Then the macros below may be used to get or set the value of that field.
  36  * EG. To get the value of the bit field from the above example:
  37  *      struct temp t1;
  38  *      value = bf_get(example_bit_field, &t1);
  39  * And then to set that bit field:
  40  *      bf_set(example_bit_field, &t1, 2);
  41  * Or clear that bit field:
  42  *      bf_set(example_bit_field, &t1, 0);
  43  */
  44 #define bf_get_le32(name, ptr) \
  45         ((le32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK)
  46 #define bf_get(name, ptr) \
  47         (((ptr)->name##_WORD >> name##_SHIFT) & name##_MASK)
  48 #define bf_set_le32(name, ptr, value) \
  49         ((ptr)->name##_WORD = cpu_to_le32(((((value) & \
  50         name##_MASK) << name##_SHIFT) | (le32_to_cpu((ptr)->name##_WORD) & \
  51         ~(name##_MASK << name##_SHIFT)))))
  52 #define bf_set(name, ptr, value) \
  53         ((ptr)->name##_WORD = ((((value) & name##_MASK) << name##_SHIFT) | \
  54                  ((ptr)->name##_WORD & ~(name##_MASK << name##_SHIFT))))
  55
  56 struct dma_address {
  57         uint32_t addr_lo;
  58         uint32_t addr_hi;
  59 };
  60
  61 struct lpfc_sli_intf {
  62         uint32_t word0;
  63 #define lpfc_sli_intf_valid_SHIFT               29
  64 #define lpfc_sli_intf_valid_MASK                0x00000007
  65 #define lpfc_sli_intf_valid_WORD                word0
  66 #define LPFC_SLI_INTF_VALID             6
  67 #define lpfc_sli_intf_featurelevel2_SHIFT       24
  68 #define lpfc_sli_intf_featurelevel2_MASK        0x0000001F
  69 #define lpfc_sli_intf_featurelevel2_WORD        word0
  70 #define lpfc_sli_intf_featurelevel1_SHIFT       16
  71 #define lpfc_sli_intf_featurelevel1_MASK        0x000000FF
  72 #define lpfc_sli_intf_featurelevel1_WORD        word0
  73 #define LPFC_SLI_INTF_FEATURELEVEL1_1   1
  74 #define LPFC_SLI_INTF_FEATURELEVEL1_2   2
  75 #define lpfc_sli_intf_sli_family_SHIFT          8
  76 #define lpfc_sli_intf_sli_family_MASK           0x000000FF
  77 #define lpfc_sli_intf_sli_family_WORD           word0
  78 #define LPFC_SLI_INTF_FAMILY_BE2        0
  79 #define LPFC_SLI_INTF_FAMILY_BE3        1
  80 #define lpfc_sli_intf_slirev_SHIFT              4
  81 #define lpfc_sli_intf_slirev_MASK               0x0000000F
  82 #define lpfc_sli_intf_slirev_WORD               word0
  83 #define LPFC_SLI_INTF_REV_SLI3          3
  84 #define LPFC_SLI_INTF_REV_SLI4          4
  85 #define lpfc_sli_intf_if_type_SHIFT             0
  86 #define lpfc_sli_intf_if_type_MASK              0x00000007
  87 #define lpfc_sli_intf_if_type_WORD              word0
  88 #define LPFC_SLI_INTF_IF_TYPE_0         0
  89 #define LPFC_SLI_INTF_IF_TYPE_1         1
  90 };
  91
  92 #define LPFC_SLI4_MBX_EMBED     true
  93 #define LPFC_SLI4_MBX_NEMBED    false
  94
  95 #define LPFC_SLI4_MB_WORD_COUNT         64
  96 #define LPFC_MAX_MQ_PAGE                8
  97 #define LPFC_MAX_WQ_PAGE                8
  98 #define LPFC_MAX_CQ_PAGE                4
  99 #define LPFC_MAX_EQ_PAGE                8
 100
 101 #define LPFC_VIR_FUNC_MAX       32 /* Maximum number of virtual functions */
 102 #define LPFC_PCI_FUNC_MAX        5 /* Maximum number of PCI functions */
 103 #define LPFC_VFR_PAGE_SIZE      0x1000 /* 4KB BAR2 per-VF register page size */
 104
 105 /* Define SLI4 Alignment requirements. */
 106 #define LPFC_ALIGN_16_BYTE      16
 107 #define LPFC_ALIGN_64_BYTE      64
 108
 109 /* Define SLI4 specific definitions. */
 110 #define LPFC_MQ_CQE_BYTE_OFFSET 256
 111 #define LPFC_MBX_CMD_HDR_LENGTH 16
 112 #define LPFC_MBX_ERROR_RANGE    0x4000
 113 #define LPFC_BMBX_BIT1_ADDR_HI  0x2
 114 #define LPFC_BMBX_BIT1_ADDR_LO  0
 115 #define LPFC_RPI_HDR_COUNT      64
 116 #define LPFC_HDR_TEMPLATE_SIZE  4096
 117 #define LPFC_RPI_ALLOC_ERROR    0xFFFF
 118 #define LPFC_FCF_RECORD_WD_CNT  132
 119 #define LPFC_ENTIRE_FCF_DATABASE 0
 120 #define LPFC_DFLT_FCF_INDEX      0
 121
 122 /* Virtual function numbers */
 123 #define LPFC_VF0                0
 124 #define LPFC_VF1                1
 125 #define LPFC_VF2                2
 126 #define LPFC_VF3                3
 127 #define LPFC_VF4                4
 128 #define LPFC_VF5                5
 129 #define LPFC_VF6                6
 130 #define LPFC_VF7                7
 131 #define LPFC_VF8                8
 132 #define LPFC_VF9                9
 133 #define LPFC_VF10               10
 134 #define LPFC_VF11               11
 135 #define LPFC_VF12               12
 136 #define LPFC_VF13               13
 137 #define LPFC_VF14               14
 138 #define LPFC_VF15               15
 139 #define LPFC_VF16               16
 140 #define LPFC_VF17               17
 141 #define LPFC_VF18               18
 142 #define LPFC_VF19               19
 143 #define LPFC_VF20               20
 144 #define LPFC_VF21               21
 145 #define LPFC_VF22               22
 146 #define LPFC_VF23               23
 147 #define LPFC_VF24               24
 148 #define LPFC_VF25               25
 149 #define LPFC_VF26               26
 150 #define LPFC_VF27               27
 151 #define LPFC_VF28               28
 152 #define LPFC_VF29               29
 153 #define LPFC_VF30               30
 154 #define LPFC_VF31               31
 155
 156 /* PCI function numbers */
 157 #define LPFC_PCI_FUNC0          0
 158 #define LPFC_PCI_FUNC1          1
 159 #define LPFC_PCI_FUNC2          2
 160 #define LPFC_PCI_FUNC3          3
 161 #define LPFC_PCI_FUNC4          4
 162
 163 /* Active interrupt test count */
 164 #define LPFC_ACT_INTR_CNT       4
 165
 166 /* Delay Multiplier constant */
 167 #define LPFC_DMULT_CONST       651042
 168 #define LPFC_MIM_IMAX          636
 169 #define LPFC_FP_DEF_IMAX       10000
 170 #define LPFC_SP_DEF_IMAX       10000
 171
 172 /* PORT_CAPABILITIES constants. */
 173 #define LPFC_MAX_SUPPORTED_PAGES        8
 174
 175 struct ulp_bde64 {
 176         union ULP_BDE_TUS {
 177                 uint32_t w;
 178                 struct {
 179 #ifdef __BIG_ENDIAN_BITFIELD
 180                         uint32_t bdeFlags:8;    /* BDE Flags 0 IS A SUPPORTED
 181                                                    VALUE !! */
 182                         uint32_t bdeSize:24;    /* Size of buffer (in bytes) */
 183 #else   /*  __LITTLE_ENDIAN_BITFIELD */
 184                         uint32_t bdeSize:24;    /* Size of buffer (in bytes) */
 185                         uint32_t bdeFlags:8;    /* BDE Flags 0 IS A SUPPORTED
 186                                                    VALUE !! */
 187 #endif
 188 #define BUFF_TYPE_BDE_64    0x00        /* BDE (Host_resident) */
 189 #define BUFF_TYPE_BDE_IMMED 0x01        /* Immediate Data BDE */
 190 #define BUFF_TYPE_BDE_64P   0x02        /* BDE (Port-resident) */
 191 #define BUFF_TYPE_BDE_64I   0x08        /* Input BDE (Host-resident) */
 192 #define BUFF_TYPE_BDE_64IP  0x0A        /* Input BDE (Port-resident) */
 193 #define BUFF_TYPE_BLP_64    0x40        /* BLP (Host-resident) */
 194 #define BUFF_TYPE_BLP_64P   0x42        /* BLP (Port-resident) */
 195                 } f;
 196         } tus;
 197         uint32_t addrLow;
 198         uint32_t addrHigh;
 199 };
 200
 201 struct lpfc_sli4_flags {
 202         uint32_t word0;
 203 #define lpfc_fip_flag_SHIFT 0
 204 #define lpfc_fip_flag_MASK 0x00000001
 205 #define lpfc_fip_flag_WORD word0
 206 };
 207
 208 struct sli4_bls_acc {
 209         uint32_t word0_rsvd;      /* Word0 must be reserved */
 210         uint32_t word1;
 211 #define lpfc_abts_orig_SHIFT      0
 212 #define lpfc_abts_orig_MASK       0x00000001
 213 #define lpfc_abts_orig_WORD       word1
 214 #define LPFC_ABTS_UNSOL_RSP       1
 215 #define LPFC_ABTS_UNSOL_INT       0
 216         uint32_t word2;
 217 #define lpfc_abts_rxid_SHIFT      0
 218 #define lpfc_abts_rxid_MASK       0x0000FFFF
 219 #define lpfc_abts_rxid_WORD       word2
 220 #define lpfc_abts_oxid_SHIFT      16
 221 #define lpfc_abts_oxid_MASK       0x0000FFFF
 222 #define lpfc_abts_oxid_WORD       word2
 223         uint32_t word3;
 224         uint32_t word4;
 225         uint32_t word5_rsvd;    /* Word5 must be reserved */
 226 };
 227
 228 /* event queue entry structure */
 229 struct lpfc_eqe {
 230         uint32_t word0;
 231 #define lpfc_eqe_resource_id_SHIFT      16
 232 #define lpfc_eqe_resource_id_MASK       0x000000FF
 233 #define lpfc_eqe_resource_id_WORD       word0
 234 #define lpfc_eqe_minor_code_SHIFT       4
 235 #define lpfc_eqe_minor_code_MASK        0x00000FFF
 236 #define lpfc_eqe_minor_code_WORD        word0
 237 #define lpfc_eqe_major_code_SHIFT       1
 238 #define lpfc_eqe_major_code_MASK        0x00000007
 239 #define lpfc_eqe_major_code_WORD        word0
 240 #define lpfc_eqe_valid_SHIFT            0
 241 #define lpfc_eqe_valid_MASK             0x00000001
 242 #define lpfc_eqe_valid_WORD             word0
 243 };
 244
 245 /* completion queue entry structure (common fields for all cqe types) */
 246 struct lpfc_cqe {
 247         uint32_t reserved0;
 248         uint32_t reserved1;
 249         uint32_t reserved2;
 250         uint32_t word3;
 251 #define lpfc_cqe_valid_SHIFT            31
 252 #define lpfc_cqe_valid_MASK             0x00000001
 253 #define lpfc_cqe_valid_WORD             word3
 254 #define lpfc_cqe_code_SHIFT             16
 255 #define lpfc_cqe_code_MASK              0x000000FF
 256 #define lpfc_cqe_code_WORD              word3
 257 };
 258
 259 /* Completion Queue Entry Status Codes */
 260 #define CQE_STATUS_SUCCESS              0x0
 261 #define CQE_STATUS_FCP_RSP_FAILURE      0x1
 262 #define CQE_STATUS_REMOTE_STOP          0x2
 263 #define CQE_STATUS_LOCAL_REJECT         0x3
 264 #define CQE_STATUS_NPORT_RJT            0x4
 265 #define CQE_STATUS_FABRIC_RJT           0x5
 266 #define CQE_STATUS_NPORT_BSY            0x6
 267 #define CQE_STATUS_FABRIC_BSY           0x7
 268 #define CQE_STATUS_INTERMED_RSP         0x8
 269 #define CQE_STATUS_LS_RJT               0x9
 270 #define CQE_STATUS_CMD_REJECT           0xb
 271 #define CQE_STATUS_FCP_TGT_LENCHECK     0xc
 272 #define CQE_STATUS_NEED_BUFF_ENTRY      0xf
 273
 274 /* Status returned by hardware (valid only if status = CQE_STATUS_SUCCESS). */
 275 #define CQE_HW_STATUS_NO_ERR            0x0
 276 #define CQE_HW_STATUS_UNDERRUN          0x1
 277 #define CQE_HW_STATUS_OVERRUN           0x2
 278
 279 /* Completion Queue Entry Codes */
 280 #define CQE_CODE_COMPL_WQE              0x1
 281 #define CQE_CODE_RELEASE_WQE            0x2
 282 #define CQE_CODE_RECEIVE                0x4
 283 #define CQE_CODE_XRI_ABORTED            0x5
 284
 285 /* completion queue entry for wqe completions */
 286 struct lpfc_wcqe_complete {
 287         uint32_t word0;
 288 #define lpfc_wcqe_c_request_tag_SHIFT   16
 289 #define lpfc_wcqe_c_request_tag_MASK    0x0000FFFF
 290 #define lpfc_wcqe_c_request_tag_WORD    word0
 291 #define lpfc_wcqe_c_status_SHIFT        8
 292 #define lpfc_wcqe_c_status_MASK         0x000000FF
 293 #define lpfc_wcqe_c_status_WORD         word0
 294 #define lpfc_wcqe_c_hw_status_SHIFT     0
 295 #define lpfc_wcqe_c_hw_status_MASK      0x000000FF
 296 #define lpfc_wcqe_c_hw_status_WORD      word0
 297         uint32_t total_data_placed;
 298         uint32_t parameter;
 299         uint32_t word3;
 300 #define lpfc_wcqe_c_valid_SHIFT         lpfc_cqe_valid_SHIFT
 301 #define lpfc_wcqe_c_valid_MASK          lpfc_cqe_valid_MASK
 302 #define lpfc_wcqe_c_valid_WORD          lpfc_cqe_valid_WORD
 303 #define lpfc_wcqe_c_xb_SHIFT            28
 304 #define lpfc_wcqe_c_xb_MASK             0x00000001
 305 #define lpfc_wcqe_c_xb_WORD             word3
 306 #define lpfc_wcqe_c_pv_SHIFT            27
 307 #define lpfc_wcqe_c_pv_MASK             0x00000001
 308 #define lpfc_wcqe_c_pv_WORD             word3
 309 #define lpfc_wcqe_c_priority_SHIFT      24
 310 #define lpfc_wcqe_c_priority_MASK               0x00000007
 311 #define lpfc_wcqe_c_priority_WORD               word3
 312 #define lpfc_wcqe_c_code_SHIFT          lpfc_cqe_code_SHIFT
 313 #define lpfc_wcqe_c_code_MASK           lpfc_cqe_code_MASK
 314 #define lpfc_wcqe_c_code_WORD           lpfc_cqe_code_WORD
 315 };
 316
 317 /* completion queue entry for wqe release */
 318 struct lpfc_wcqe_release {
 319         uint32_t reserved0;
 320         uint32_t reserved1;
 321         uint32_t word2;
 322 #define lpfc_wcqe_r_wq_id_SHIFT         16
 323 #define lpfc_wcqe_r_wq_id_MASK          0x0000FFFF
 324 #define lpfc_wcqe_r_wq_id_WORD          word2
 325 #define lpfc_wcqe_r_wqe_index_SHIFT     0
 326 #define lpfc_wcqe_r_wqe_index_MASK      0x0000FFFF
 327 #define lpfc_wcqe_r_wqe_index_WORD      word2
 328         uint32_t word3;
 329 #define lpfc_wcqe_r_valid_SHIFT         lpfc_cqe_valid_SHIFT
 330 #define lpfc_wcqe_r_valid_MASK          lpfc_cqe_valid_MASK
 331 #define lpfc_wcqe_r_valid_WORD          lpfc_cqe_valid_WORD
 332 #define lpfc_wcqe_r_code_SHIFT          lpfc_cqe_code_SHIFT
 333 #define lpfc_wcqe_r_code_MASK           lpfc_cqe_code_MASK
 334 #define lpfc_wcqe_r_code_WORD           lpfc_cqe_code_WORD
 335 };
 336
 337 struct sli4_wcqe_xri_aborted {
 338         uint32_t word0;
 339 #define lpfc_wcqe_xa_status_SHIFT               8
 340 #define lpfc_wcqe_xa_status_MASK                0x000000FF
 341 #define lpfc_wcqe_xa_status_WORD                word0
 342         uint32_t parameter;
 343         uint32_t word2;
 344 #define lpfc_wcqe_xa_remote_xid_SHIFT   16
 345 #define lpfc_wcqe_xa_remote_xid_MASK    0x0000FFFF
 346 #define lpfc_wcqe_xa_remote_xid_WORD    word2
 347 #define lpfc_wcqe_xa_xri_SHIFT          0
 348 #define lpfc_wcqe_xa_xri_MASK           0x0000FFFF
 349 #define lpfc_wcqe_xa_xri_WORD           word2
 350         uint32_t word3;
 351 #define lpfc_wcqe_xa_valid_SHIFT        lpfc_cqe_valid_SHIFT
 352 #define lpfc_wcqe_xa_valid_MASK         lpfc_cqe_valid_MASK
 353 #define lpfc_wcqe_xa_valid_WORD         lpfc_cqe_valid_WORD
 354 #define lpfc_wcqe_xa_ia_SHIFT           30
 355 #define lpfc_wcqe_xa_ia_MASK            0x00000001
 356 #define lpfc_wcqe_xa_ia_WORD            word3
 357 #define CQE_XRI_ABORTED_IA_REMOTE       0
 358 #define CQE_XRI_ABORTED_IA_LOCAL        1
 359 #define lpfc_wcqe_xa_br_SHIFT           29
 360 #define lpfc_wcqe_xa_br_MASK            0x00000001
 361 #define lpfc_wcqe_xa_br_WORD            word3
 362 #define CQE_XRI_ABORTED_BR_BA_ACC       0
 363 #define CQE_XRI_ABORTED_BR_BA_RJT       1
 364 #define lpfc_wcqe_xa_eo_SHIFT           28
 365 #define lpfc_wcqe_xa_eo_MASK            0x00000001
 366 #define lpfc_wcqe_xa_eo_WORD            word3
 367 #define CQE_XRI_ABORTED_EO_REMOTE       0
 368 #define CQE_XRI_ABORTED_EO_LOCAL        1
 369 #define lpfc_wcqe_xa_code_SHIFT         lpfc_cqe_code_SHIFT
 370 #define lpfc_wcqe_xa_code_MASK          lpfc_cqe_code_MASK
 371 #define lpfc_wcqe_xa_code_WORD          lpfc_cqe_code_WORD
 372 };
 373
 374 /* completion queue entry structure for rqe completion */
 375 struct lpfc_rcqe {
 376         uint32_t word0;
 377 #define lpfc_rcqe_bindex_SHIFT          16
 378 #define lpfc_rcqe_bindex_MASK           0x0000FFF
 379 #define lpfc_rcqe_bindex_WORD           word0
 380 #define lpfc_rcqe_status_SHIFT          8
 381 #define lpfc_rcqe_status_MASK           0x000000FF
 382 #define lpfc_rcqe_status_WORD           word0
 383 #define FC_STATUS_RQ_SUCCESS            0x10 /* Async receive successful */
 384 #define FC_STATUS_RQ_BUF_LEN_EXCEEDED   0x11 /* payload truncated */
 385 #define FC_STATUS_INSUFF_BUF_NEED_BUF   0x12 /* Insufficient buffers */
 386 #define FC_STATUS_INSUFF_BUF_FRM_DISC   0x13 /* Frame Discard */
 387         uint32_t reserved1;
 388         uint32_t word2;
 389 #define lpfc_rcqe_length_SHIFT          16
 390 #define lpfc_rcqe_length_MASK           0x0000FFFF
 391 #define lpfc_rcqe_length_WORD           word2
 392 #define lpfc_rcqe_rq_id_SHIFT           6
 393 #define lpfc_rcqe_rq_id_MASK            0x000003FF
 394 #define lpfc_rcqe_rq_id_WORD            word2
 395 #define lpfc_rcqe_fcf_id_SHIFT          0
 396 #define lpfc_rcqe_fcf_id_MASK           0x0000003F
 397 #define lpfc_rcqe_fcf_id_WORD           word2
 398         uint32_t word3;
 399 #define lpfc_rcqe_valid_SHIFT           lpfc_cqe_valid_SHIFT
 400 #define lpfc_rcqe_valid_MASK            lpfc_cqe_valid_MASK
 401 #define lpfc_rcqe_valid_WORD            lpfc_cqe_valid_WORD
 402 #define lpfc_rcqe_port_SHIFT            30
 403 #define lpfc_rcqe_port_MASK             0x00000001
 404 #define lpfc_rcqe_port_WORD             word3
 405 #define lpfc_rcqe_hdr_length_SHIFT      24
 406 #define lpfc_rcqe_hdr_length_MASK       0x0000001F
 407 #define lpfc_rcqe_hdr_length_WORD       word3
 408 #define lpfc_rcqe_code_SHIFT            lpfc_cqe_code_SHIFT
 409 #define lpfc_rcqe_code_MASK             lpfc_cqe_code_MASK
 410 #define lpfc_rcqe_code_WORD             lpfc_cqe_code_WORD
 411 #define lpfc_rcqe_eof_SHIFT             8
 412 #define lpfc_rcqe_eof_MASK              0x000000FF
 413 #define lpfc_rcqe_eof_WORD              word3
 414 #define FCOE_EOFn       0x41
 415 #define FCOE_EOFt       0x42
 416 #define FCOE_EOFni      0x49
 417 #define FCOE_EOFa       0x50
 418 #define lpfc_rcqe_sof_SHIFT             0
 419 #define lpfc_rcqe_sof_MASK              0x000000FF
 420 #define lpfc_rcqe_sof_WORD              word3
 421 #define FCOE_SOFi2      0x2d
 422 #define FCOE_SOFi3      0x2e
 423 #define FCOE_SOFn2      0x35
 424 #define FCOE_SOFn3      0x36
 425 };
 426
 427 struct lpfc_rqe {
 428         uint32_t address_hi;
 429         uint32_t address_lo;
 430 };
 431
 432 /* buffer descriptors */
 433 struct lpfc_bde4 {
 434         uint32_t addr_hi;
 435         uint32_t addr_lo;
 436         uint32_t word2;
 437 #define lpfc_bde4_last_SHIFT            31
 438 #define lpfc_bde4_last_MASK             0x00000001
 439 #define lpfc_bde4_last_WORD             word2
 440 #define lpfc_bde4_sge_offset_SHIFT      0
 441 #define lpfc_bde4_sge_offset_MASK       0x000003FF
 442 #define lpfc_bde4_sge_offset_WORD       word2
 443         uint32_t word3;
 444 #define lpfc_bde4_length_SHIFT          0
 445 #define lpfc_bde4_length_MASK           0x000000FF
 446 #define lpfc_bde4_length_WORD           word3
 447 };
 448
 449 struct lpfc_register {
 450         uint32_t word0;
 451 };
 452
 453 #define LPFC_UERR_STATUS_HI             0x00A4
 454 #define LPFC_UERR_STATUS_LO             0x00A0
 455 #define LPFC_UE_MASK_HI                 0x00AC
 456 #define LPFC_UE_MASK_LO                 0x00A8
 457 #define LPFC_SLI_INTF                   0x0058
 458
 459 /* BAR0 Registers */
 460 #define LPFC_HST_STATE                  0x00AC
 461 #define lpfc_hst_state_perr_SHIFT       31
 462 #define lpfc_hst_state_perr_MASK        0x1
 463 #define lpfc_hst_state_perr_WORD        word0
 464 #define lpfc_hst_state_sfi_SHIFT        30
 465 #define lpfc_hst_state_sfi_MASK         0x1
 466 #define lpfc_hst_state_sfi_WORD         word0
 467 #define lpfc_hst_state_nip_SHIFT        29
 468 #define lpfc_hst_state_nip_MASK         0x1
 469 #define lpfc_hst_state_nip_WORD         word0
 470 #define lpfc_hst_state_ipc_SHIFT        28
 471 #define lpfc_hst_state_ipc_MASK         0x1
 472 #define lpfc_hst_state_ipc_WORD         word0
 473 #define lpfc_hst_state_xrom_SHIFT       27
 474 #define lpfc_hst_state_xrom_MASK        0x1
 475 #define lpfc_hst_state_xrom_WORD        word0
 476 #define lpfc_hst_state_dl_SHIFT         26
 477 #define lpfc_hst_state_dl_MASK          0x1
 478 #define lpfc_hst_state_dl_WORD          word0
 479 #define lpfc_hst_state_port_status_SHIFT        0
 480 #define lpfc_hst_state_port_status_MASK         0xFFFF
 481 #define lpfc_hst_state_port_status_WORD         word0
 482
 483 #define LPFC_POST_STAGE_POWER_ON_RESET                  0x0000
 484 #define LPFC_POST_STAGE_AWAITING_HOST_RDY               0x0001
 485 #define LPFC_POST_STAGE_HOST_RDY                        0x0002
 486 #define LPFC_POST_STAGE_BE_RESET                        0x0003
 487 #define LPFC_POST_STAGE_SEEPROM_CS_START                0x0100
 488 #define LPFC_POST_STAGE_SEEPROM_CS_DONE                 0x0101
 489 #define LPFC_POST_STAGE_DDR_CONFIG_START                0x0200
 490 #define LPFC_POST_STAGE_DDR_CONFIG_DONE                 0x0201
 491 #define LPFC_POST_STAGE_DDR_CALIBRATE_START             0x0300
 492 #define LPFC_POST_STAGE_DDR_CALIBRATE_DONE              0x0301
 493 #define LPFC_POST_STAGE_DDR_TEST_START                  0x0400
 494 #define LPFC_POST_STAGE_DDR_TEST_DONE                   0x0401
 495 #define LPFC_POST_STAGE_REDBOOT_INIT_START              0x0600
 496 #define LPFC_POST_STAGE_REDBOOT_INIT_DONE               0x0601
 497 #define LPFC_POST_STAGE_FW_IMAGE_LOAD_START             0x0700
 498 #define LPFC_POST_STAGE_FW_IMAGE_LOAD_DONE              0x0701
 499 #define LPFC_POST_STAGE_ARMFW_START                     0x0800
 500 #define LPFC_POST_STAGE_DHCP_QUERY_START                0x0900
 501 #define LPFC_POST_STAGE_DHCP_QUERY_DONE                 0x0901
 502 #define LPFC_POST_STAGE_BOOT_TARGET_DISCOVERY_START     0x0A00
 503 #define LPFC_POST_STAGE_BOOT_TARGET_DISCOVERY_DONE      0x0A01
 504 #define LPFC_POST_STAGE_RC_OPTION_SET                   0x0B00
 505 #define LPFC_POST_STAGE_SWITCH_LINK                     0x0B01
 506 #define LPFC_POST_STAGE_SEND_ICDS_MESSAGE               0x0B02
 507 #define LPFC_POST_STAGE_PERFROM_TFTP                    0x0B03
 508 #define LPFC_POST_STAGE_PARSE_XML                       0x0B04
 509 #define LPFC_POST_STAGE_DOWNLOAD_IMAGE                  0x0B05
 510 #define LPFC_POST_STAGE_FLASH_IMAGE                     0x0B06
 511 #define LPFC_POST_STAGE_RC_DONE                         0x0B07
 512 #define LPFC_POST_STAGE_REBOOT_SYSTEM                   0x0B08
 513 #define LPFC_POST_STAGE_MAC_ADDRESS                     0x0C00
 514 #define LPFC_POST_STAGE_ARMFW_READY                     0xC000
 515 #define LPFC_POST_STAGE_ARMFW_UE                        0xF000
 516
 517 /* BAR1 Registers */
 518 #define LPFC_IMR_MASK_ALL       0xFFFFFFFF
 519 #define LPFC_ISCR_CLEAR_ALL     0xFFFFFFFF
 520
 521 #define LPFC_HST_ISR0           0x0C18
 522 #define LPFC_HST_ISR1           0x0C1C
 523 #define LPFC_HST_ISR2           0x0C20
 524 #define LPFC_HST_ISR3           0x0C24
 525 #define LPFC_HST_ISR4           0x0C28
 526
 527 #define LPFC_HST_IMR0           0x0C48
 528 #define LPFC_HST_IMR1           0x0C4C
 529 #define LPFC_HST_IMR2           0x0C50
 530 #define LPFC_HST_IMR3           0x0C54
 531 #define LPFC_HST_IMR4           0x0C58
 532
 533 #define LPFC_HST_ISCR0          0x0C78
 534 #define LPFC_HST_ISCR1          0x0C7C
 535 #define LPFC_HST_ISCR2          0x0C80
 536 #define LPFC_HST_ISCR3          0x0C84
 537 #define LPFC_HST_ISCR4          0x0C88
 538
 539 #define LPFC_SLI4_INTR0                 BIT0
 540 #define LPFC_SLI4_INTR1                 BIT1
 541 #define LPFC_SLI4_INTR2                 BIT2
 542 #define LPFC_SLI4_INTR3                 BIT3
 543 #define LPFC_SLI4_INTR4                 BIT4
 544 #define LPFC_SLI4_INTR5                 BIT5
 545 #define LPFC_SLI4_INTR6                 BIT6
 546 #define LPFC_SLI4_INTR7                 BIT7
 547 #define LPFC_SLI4_INTR8                 BIT8
 548 #define LPFC_SLI4_INTR9                 BIT9
 549 #define LPFC_SLI4_INTR10                BIT10
 550 #define LPFC_SLI4_INTR11                BIT11
 551 #define LPFC_SLI4_INTR12                BIT12
 552 #define LPFC_SLI4_INTR13                BIT13
 553 #define LPFC_SLI4_INTR14                BIT14
 554 #define LPFC_SLI4_INTR15                BIT15
 555 #define LPFC_SLI4_INTR16                BIT16
 556 #define LPFC_SLI4_INTR17                BIT17
 557 #define LPFC_SLI4_INTR18                BIT18
 558 #define LPFC_SLI4_INTR19                BIT19
 559 #define LPFC_SLI4_INTR20                BIT20
 560 #define LPFC_SLI4_INTR21                BIT21
 561 #define LPFC_SLI4_INTR22                BIT22
 562 #define LPFC_SLI4_INTR23                BIT23
 563 #define LPFC_SLI4_INTR24                BIT24
 564 #define LPFC_SLI4_INTR25                BIT25
 565 #define LPFC_SLI4_INTR26                BIT26
 566 #define LPFC_SLI4_INTR27                BIT27
 567 #define LPFC_SLI4_INTR28                BIT28
 568 #define LPFC_SLI4_INTR29                BIT29
 569 #define LPFC_SLI4_INTR30                BIT30
 570 #define LPFC_SLI4_INTR31                BIT31
 571
 572 /* BAR2 Registers */
 573 #define LPFC_RQ_DOORBELL                0x00A0
 574 #define lpfc_rq_doorbell_num_posted_SHIFT       16
 575 #define lpfc_rq_doorbell_num_posted_MASK        0x3FFF
 576 #define lpfc_rq_doorbell_num_posted_WORD        word0
 577 #define LPFC_RQ_POST_BATCH              8       /* RQEs to post at one time */
 578 #define lpfc_rq_doorbell_id_SHIFT               0
 579 #define lpfc_rq_doorbell_id_MASK                0x03FF
 580 #define lpfc_rq_doorbell_id_WORD                word0
 581
 582 #define LPFC_WQ_DOORBELL                0x0040
 583 #define lpfc_wq_doorbell_num_posted_SHIFT       24
 584 #define lpfc_wq_doorbell_num_posted_MASK        0x00FF
 585 #define lpfc_wq_doorbell_num_posted_WORD        word0
 586 #define lpfc_wq_doorbell_index_SHIFT            16
 587 #define lpfc_wq_doorbell_index_MASK             0x00FF
 588 #define lpfc_wq_doorbell_index_WORD             word0
 589 #define lpfc_wq_doorbell_id_SHIFT               0
 590 #define lpfc_wq_doorbell_id_MASK                0xFFFF
 591 #define lpfc_wq_doorbell_id_WORD                word0
 592
 593 #define LPFC_EQCQ_DOORBELL              0x0120
 594 #define lpfc_eqcq_doorbell_arm_SHIFT            29
 595 #define lpfc_eqcq_doorbell_arm_MASK             0x0001
 596 #define lpfc_eqcq_doorbell_arm_WORD             word0
 597 #define lpfc_eqcq_doorbell_num_released_SHIFT   16
 598 #define lpfc_eqcq_doorbell_num_released_MASK    0x1FFF
 599 #define lpfc_eqcq_doorbell_num_released_WORD    word0
 600 #define lpfc_eqcq_doorbell_qt_SHIFT             10
 601 #define lpfc_eqcq_doorbell_qt_MASK              0x0001
 602 #define lpfc_eqcq_doorbell_qt_WORD              word0
 603 #define LPFC_QUEUE_TYPE_COMPLETION      0
 604 #define LPFC_QUEUE_TYPE_EVENT           1
 605 #define lpfc_eqcq_doorbell_eqci_SHIFT           9
 606 #define lpfc_eqcq_doorbell_eqci_MASK            0x0001
 607 #define lpfc_eqcq_doorbell_eqci_WORD            word0
 608 #define lpfc_eqcq_doorbell_cqid_SHIFT           0
 609 #define lpfc_eqcq_doorbell_cqid_MASK            0x03FF
 610 #define lpfc_eqcq_doorbell_cqid_WORD            word0
 611 #define lpfc_eqcq_doorbell_eqid_SHIFT           0
 612 #define lpfc_eqcq_doorbell_eqid_MASK            0x01FF
 613 #define lpfc_eqcq_doorbell_eqid_WORD            word0
 614
 615 #define LPFC_BMBX                       0x0160
 616 #define lpfc_bmbx_addr_SHIFT            2
 617 #define lpfc_bmbx_addr_MASK             0x3FFFFFFF
 618 #define lpfc_bmbx_addr_WORD             word0
 619 #define lpfc_bmbx_hi_SHIFT              1
 620 #define lpfc_bmbx_hi_MASK               0x0001
 621 #define lpfc_bmbx_hi_WORD               word0
 622 #define lpfc_bmbx_rdy_SHIFT             0
 623 #define lpfc_bmbx_rdy_MASK              0x0001
 624 #define lpfc_bmbx_rdy_WORD              word0
 625
 626 #define LPFC_MQ_DOORBELL                        0x0140
 627 #define lpfc_mq_doorbell_num_posted_SHIFT       16
 628 #define lpfc_mq_doorbell_num_posted_MASK        0x3FFF
 629 #define lpfc_mq_doorbell_num_posted_WORD        word0
 630 #define lpfc_mq_doorbell_id_SHIFT               0
 631 #define lpfc_mq_doorbell_id_MASK                0x03FF
 632 #define lpfc_mq_doorbell_id_WORD                word0
 633
 634 struct lpfc_sli4_cfg_mhdr {
 635         uint32_t word1;
 636 #define lpfc_mbox_hdr_emb_SHIFT         0
 637 #define lpfc_mbox_hdr_emb_MASK          0x00000001
 638 #define lpfc_mbox_hdr_emb_WORD          word1
 639 #define lpfc_mbox_hdr_sge_cnt_SHIFT     3
 640 #define lpfc_mbox_hdr_sge_cnt_MASK      0x0000001F
 641 #define lpfc_mbox_hdr_sge_cnt_WORD      word1
 642         uint32_t payload_length;
 643         uint32_t tag_lo;
 644         uint32_t tag_hi;
 645         uint32_t reserved5;
 646 };
 647
 648 union lpfc_sli4_cfg_shdr {
 649         struct {
 650                 uint32_t word6;
 651 #define lpfc_mbox_hdr_opcode_SHIFT              0
 652 #define lpfc_mbox_hdr_opcode_MASK               0x000000FF
 653 #define lpfc_mbox_hdr_opcode_WORD               word6
 654 #define lpfc_mbox_hdr_subsystem_SHIFT           8
 655 #define lpfc_mbox_hdr_subsystem_MASK            0x000000FF
 656 #define lpfc_mbox_hdr_subsystem_WORD            word6
 657 #define lpfc_mbox_hdr_port_number_SHIFT         16
 658 #define lpfc_mbox_hdr_port_number_MASK          0x000000FF
 659 #define lpfc_mbox_hdr_port_number_WORD          word6
 660 #define lpfc_mbox_hdr_domain_SHIFT              24
 661 #define lpfc_mbox_hdr_domain_MASK               0x000000FF
 662 #define lpfc_mbox_hdr_domain_WORD               word6
 663                 uint32_t timeout;
 664                 uint32_t request_length;
 665                 uint32_t reserved9;
 666         } request;
 667         struct {
 668                 uint32_t word6;
 669 #define lpfc_mbox_hdr_opcode_SHIFT              0
 670 #define lpfc_mbox_hdr_opcode_MASK               0x000000FF
 671 #define lpfc_mbox_hdr_opcode_WORD               word6
 672 #define lpfc_mbox_hdr_subsystem_SHIFT           8
 673 #define lpfc_mbox_hdr_subsystem_MASK            0x000000FF
 674 #define lpfc_mbox_hdr_subsystem_WORD            word6
 675 #define lpfc_mbox_hdr_domain_SHIFT              24
 676 #define lpfc_mbox_hdr_domain_MASK               0x000000FF
 677 #define lpfc_mbox_hdr_domain_WORD               word6
 678                 uint32_t word7;
 679 #define lpfc_mbox_hdr_status_SHIFT              0
 680 #define lpfc_mbox_hdr_status_MASK               0x000000FF
 681 #define lpfc_mbox_hdr_status_WORD               word7
 682 #define lpfc_mbox_hdr_add_status_SHIFT          8
 683 #define lpfc_mbox_hdr_add_status_MASK           0x000000FF
 684 #define lpfc_mbox_hdr_add_status_WORD           word7
 685                 uint32_t response_length;
 686                 uint32_t actual_response_length;
 687         } response;
 688 };
 689
 690 /* Mailbox structures */
 691 struct mbox_header {
 692         struct lpfc_sli4_cfg_mhdr cfg_mhdr;
 693         union  lpfc_sli4_cfg_shdr cfg_shdr;
 694 };
 695
 696 /* Subsystem Definitions */
 697 #define LPFC_MBOX_SUBSYSTEM_COMMON      0x1
 698 #define LPFC_MBOX_SUBSYSTEM_FCOE        0xC
 699
 700 /* Device Specific Definitions */
 701
 702 /* The HOST ENDIAN defines are in Big Endian format. */
 703 #define HOST_ENDIAN_LOW_WORD0   0xFF3412FF
 704 #define HOST_ENDIAN_HIGH_WORD1  0xFF7856FF
 705
 706 /* Common Opcodes */
 707 #define LPFC_MBOX_OPCODE_CQ_CREATE              0x0C
 708 #define LPFC_MBOX_OPCODE_EQ_CREATE              0x0D
 709 #define LPFC_MBOX_OPCODE_MQ_CREATE              0x15
 710 #define LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES    0x20
 711 #define LPFC_MBOX_OPCODE_NOP                    0x21
 712 #define LPFC_MBOX_OPCODE_MQ_DESTROY             0x35
 713 #define LPFC_MBOX_OPCODE_CQ_DESTROY             0x36
 714 #define LPFC_MBOX_OPCODE_EQ_DESTROY             0x37
 715 #define LPFC_MBOX_OPCODE_QUERY_FW_CFG           0x3A
 716 #define LPFC_MBOX_OPCODE_FUNCTION_RESET         0x3D
 717 #define LPFC_MBOX_OPCODE_MQ_CREATE_EXT          0x5A
 718
 719 /* FCoE Opcodes */
 720 #define LPFC_MBOX_OPCODE_FCOE_WQ_CREATE                 0x01
 721 #define LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY                0x02
 722 #define LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES            0x03
 723 #define LPFC_MBOX_OPCODE_FCOE_REMOVE_SGL_PAGES          0x04
 724 #define LPFC_MBOX_OPCODE_FCOE_RQ_CREATE                 0x05
 725 #define LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY                0x06
 726 #define LPFC_MBOX_OPCODE_FCOE_READ_FCF_TABLE            0x08
 727 #define LPFC_MBOX_OPCODE_FCOE_ADD_FCF                   0x09
 728 #define LPFC_MBOX_OPCODE_FCOE_DELETE_FCF                0x0A
 729 #define LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE         0x0B
 730 #define LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF            0x10
 731
 732 /* Mailbox command structures */
 733 struct eq_context {
 734         uint32_t word0;
 735 #define lpfc_eq_context_size_SHIFT      31
 736 #define lpfc_eq_context_size_MASK       0x00000001
 737 #define lpfc_eq_context_size_WORD       word0
 738 #define LPFC_EQE_SIZE_4                 0x0
 739 #define LPFC_EQE_SIZE_16                0x1
 740 #define lpfc_eq_context_valid_SHIFT     29
 741 #define lpfc_eq_context_valid_MASK      0x00000001
 742 #define lpfc_eq_context_valid_WORD      word0
 743         uint32_t word1;
 744 #define lpfc_eq_context_count_SHIFT     26
 745 #define lpfc_eq_context_count_MASK      0x00000003
 746 #define lpfc_eq_context_count_WORD      word1
 747 #define LPFC_EQ_CNT_256         0x0
 748 #define LPFC_EQ_CNT_512         0x1
 749 #define LPFC_EQ_CNT_1024        0x2
 750 #define LPFC_EQ_CNT_2048        0x3
 751 #define LPFC_EQ_CNT_4096        0x4
 752         uint32_t word2;
 753 #define lpfc_eq_context_delay_multi_SHIFT       13
 754 #define lpfc_eq_context_delay_multi_MASK        0x000003FF
 755 #define lpfc_eq_context_delay_multi_WORD        word2
 756         uint32_t reserved3;
 757 };
 758
 759 struct sgl_page_pairs {
 760         uint32_t sgl_pg0_addr_lo;
 761         uint32_t sgl_pg0_addr_hi;
 762         uint32_t sgl_pg1_addr_lo;
 763         uint32_t sgl_pg1_addr_hi;
 764 };
 765
 766 struct lpfc_mbx_post_sgl_pages {
 767         struct mbox_header header;
 768         uint32_t word0;
 769 #define lpfc_post_sgl_pages_xri_SHIFT   0
 770 #define lpfc_post_sgl_pages_xri_MASK    0x0000FFFF
 771 #define lpfc_post_sgl_pages_xri_WORD    word0
 772 #define lpfc_post_sgl_pages_xricnt_SHIFT        16
 773 #define lpfc_post_sgl_pages_xricnt_MASK 0x0000FFFF
 774 #define lpfc_post_sgl_pages_xricnt_WORD word0
 775         struct sgl_page_pairs  sgl_pg_pairs[1];
 776 };
 777
 778 /* word0 of page-1 struct shares the same SHIFT/MASK/WORD defines as above */
 779 struct lpfc_mbx_post_uembed_sgl_page1 {
 780         union  lpfc_sli4_cfg_shdr cfg_shdr;
 781         uint32_t word0;
 782         struct sgl_page_pairs sgl_pg_pairs;
 783 };
 784
 785 struct lpfc_mbx_sge {
 786         uint32_t pa_lo;
 787         uint32_t pa_hi;
 788         uint32_t length;
 789 };
 790
 791 struct lpfc_mbx_nembed_cmd {
 792         struct lpfc_sli4_cfg_mhdr cfg_mhdr;
 793 #define LPFC_SLI4_MBX_SGE_MAX_PAGES     19
 794         struct lpfc_mbx_sge sge[LPFC_SLI4_MBX_SGE_MAX_PAGES];
 795 };
 796
 797 struct lpfc_mbx_nembed_sge_virt {
 798         void *addr[LPFC_SLI4_MBX_SGE_MAX_PAGES];
 799 };
 800
 801 struct lpfc_mbx_eq_create {
 802         struct mbox_header header;
 803         union {
 804                 struct {
 805                         uint32_t word0;
 806 #define lpfc_mbx_eq_create_num_pages_SHIFT      0
 807 #define lpfc_mbx_eq_create_num_pages_MASK       0x0000FFFF
 808 #define lpfc_mbx_eq_create_num_pages_WORD       word0
 809                         struct eq_context context;
 810                         struct dma_address page[LPFC_MAX_EQ_PAGE];
 811                 } request;
 812                 struct {
 813                         uint32_t word0;
 814 #define lpfc_mbx_eq_create_q_id_SHIFT   0
 815 #define lpfc_mbx_eq_create_q_id_MASK    0x0000FFFF
 816 #define lpfc_mbx_eq_create_q_id_WORD    word0
 817                 } response;
 818         } u;
 819 };
 820
 821 struct lpfc_mbx_eq_destroy {
 822         struct mbox_header header;
 823         union {
 824                 struct {
 825                         uint32_t word0;
 826 #define lpfc_mbx_eq_destroy_q_id_SHIFT  0
 827 #define lpfc_mbx_eq_destroy_q_id_MASK   0x0000FFFF
 828 #define lpfc_mbx_eq_destroy_q_id_WORD   word0
 829                 } request;
 830                 struct {
 831                         uint32_t word0;
 832                 } response;
 833         } u;
 834 };
 835
 836 struct lpfc_mbx_nop {
 837         struct mbox_header header;
 838         uint32_t context[2];
 839 };
 840
 841 struct cq_context {
 842         uint32_t word0;
 843 #define lpfc_cq_context_event_SHIFT     31
 844 #define lpfc_cq_context_event_MASK      0x00000001
 845 #define lpfc_cq_context_event_WORD      word0
 846 #define lpfc_cq_context_valid_SHIFT     29
 847 #define lpfc_cq_context_valid_MASK      0x00000001
 848 #define lpfc_cq_context_valid_WORD      word0
 849 #define lpfc_cq_context_count_SHIFT     27
 850 #define lpfc_cq_context_count_MASK      0x00000003
 851 #define lpfc_cq_context_count_WORD      word0
 852 #define LPFC_CQ_CNT_256         0x0
 853 #define LPFC_CQ_CNT_512         0x1
 854 #define LPFC_CQ_CNT_1024        0x2
 855         uint32_t word1;
 856 #define lpfc_cq_eq_id_SHIFT             22
 857 #define lpfc_cq_eq_id_MASK              0x000000FF
 858 #define lpfc_cq_eq_id_WORD              word1
 859         uint32_t reserved0;
 860         uint32_t reserved1;
 861 };
 862
 863 struct lpfc_mbx_cq_create {
 864         struct mbox_header header;
 865         union {
 866                 struct {
 867                         uint32_t word0;
 868 #define lpfc_mbx_cq_create_num_pages_SHIFT      0
 869 #define lpfc_mbx_cq_create_num_pages_MASK       0x0000FFFF
 870 #define lpfc_mbx_cq_create_num_pages_WORD       word0
 871                         struct cq_context context;
 872                         struct dma_address page[LPFC_MAX_CQ_PAGE];
 873                 } request;
 874                 struct {
 875                         uint32_t word0;
 876 #define lpfc_mbx_cq_create_q_id_SHIFT   0
 877 #define lpfc_mbx_cq_create_q_id_MASK    0x0000FFFF
 878 #define lpfc_mbx_cq_create_q_id_WORD    word0
 879                 } response;
 880         } u;
 881 };
 882
 883 struct lpfc_mbx_cq_destroy {
 884         struct mbox_header header;
 885         union {
 886                 struct {
 887                         uint32_t word0;
 888 #define lpfc_mbx_cq_destroy_q_id_SHIFT  0
 889 #define lpfc_mbx_cq_destroy_q_id_MASK   0x0000FFFF
 890 #define lpfc_mbx_cq_destroy_q_id_WORD   word0
 891                 } request;
 892                 struct {
 893                         uint32_t word0;
 894                 } response;
 895         } u;
 896 };
 897
 898 struct wq_context {
 899         uint32_t reserved0;
 900         uint32_t reserved1;
 901         uint32_t reserved2;
 902         uint32_t reserved3;
 903 };
 904
 905 struct lpfc_mbx_wq_create {
 906         struct mbox_header header;
 907         union {
 908                 struct {
 909                         uint32_t word0;
 910 #define lpfc_mbx_wq_create_num_pages_SHIFT      0
 911 #define lpfc_mbx_wq_create_num_pages_MASK       0x0000FFFF
 912 #define lpfc_mbx_wq_create_num_pages_WORD       word0
 913 #define lpfc_mbx_wq_create_cq_id_SHIFT          16
 914 #define lpfc_mbx_wq_create_cq_id_MASK           0x0000FFFF
 915 #define lpfc_mbx_wq_create_cq_id_WORD           word0
 916                         struct dma_address page[LPFC_MAX_WQ_PAGE];
 917                 } request;
 918                 struct {
 919                         uint32_t word0;
 920 #define lpfc_mbx_wq_create_q_id_SHIFT   0
 921 #define lpfc_mbx_wq_create_q_id_MASK    0x0000FFFF
 922 #define lpfc_mbx_wq_create_q_id_WORD    word0
 923                 } response;
 924         } u;
 925 };
 926
 927 struct lpfc_mbx_wq_destroy {
 928         struct mbox_header header;
 929         union {
 930                 struct {
 931                         uint32_t word0;
 932 #define lpfc_mbx_wq_destroy_q_id_SHIFT  0
 933 #define lpfc_mbx_wq_destroy_q_id_MASK   0x0000FFFF
 934 #define lpfc_mbx_wq_destroy_q_id_WORD   word0
 935                 } request;
 936                 struct {
 937                         uint32_t word0;
 938                 } response;
 939         } u;
 940 };
 941
 942 #define LPFC_HDR_BUF_SIZE 128
 943 #define LPFC_DATA_BUF_SIZE 2048
 944 struct rq_context {
 945         uint32_t word0;
 946 #define lpfc_rq_context_rq_size_SHIFT   16
 947 #define lpfc_rq_context_rq_size_MASK    0x0000000F
 948 #define lpfc_rq_context_rq_size_WORD    word0
 949 #define LPFC_RQ_RING_SIZE_512           9       /* 512 entries */
 950 #define LPFC_RQ_RING_SIZE_1024          10      /* 1024 entries */
 951 #define LPFC_RQ_RING_SIZE_2048          11      /* 2048 entries */
 952 #define LPFC_RQ_RING_SIZE_4096          12      /* 4096 entries */
 953         uint32_t reserved1;
 954         uint32_t word2;
 955 #define lpfc_rq_context_cq_id_SHIFT     16
 956 #define lpfc_rq_context_cq_id_MASK      0x000003FF
 957 #define lpfc_rq_context_cq_id_WORD      word2
 958 #define lpfc_rq_context_buf_size_SHIFT  0
 959 #define lpfc_rq_context_buf_size_MASK   0x0000FFFF
 960 #define lpfc_rq_context_buf_size_WORD   word2
 961         uint32_t reserved3;
 962 };
 963
 964 struct lpfc_mbx_rq_create {
 965         struct mbox_header header;
 966         union {
 967                 struct {
 968                         uint32_t word0;
 969 #define lpfc_mbx_rq_create_num_pages_SHIFT      0
 970 #define lpfc_mbx_rq_create_num_pages_MASK       0x0000FFFF
 971 #define lpfc_mbx_rq_create_num_pages_WORD       word0
 972                         struct rq_context context;
 973                         struct dma_address page[LPFC_MAX_WQ_PAGE];
 974                 } request;
 975                 struct {
 976                         uint32_t word0;
 977 #define lpfc_mbx_rq_create_q_id_SHIFT   0
 978 #define lpfc_mbx_rq_create_q_id_MASK    0x0000FFFF
 979 #define lpfc_mbx_rq_create_q_id_WORD    word0
 980                 } response;
 981         } u;
 982 };
 983
 984 struct lpfc_mbx_rq_destroy {
 985         struct mbox_header header;
 986         union {
 987                 struct {
 988                         uint32_t word0;
 989 #define lpfc_mbx_rq_destroy_q_id_SHIFT  0
 990 #define lpfc_mbx_rq_destroy_q_id_MASK   0x0000FFFF
 991 #define lpfc_mbx_rq_destroy_q_id_WORD   word0
 992                 } request;
 993                 struct {
 994                         uint32_t word0;
 995                 } response;
 996         } u;
 997 };
 998
 999 struct mq_context {
1000         uint32_t word0;
1001 #define lpfc_mq_context_cq_id_SHIFT     22
1002 #define lpfc_mq_context_cq_id_MASK      0x000003FF
1003 #define lpfc_mq_context_cq_id_WORD      word0
1004 #define lpfc_mq_context_count_SHIFT     16
1005 #define lpfc_mq_context_count_MASK      0x0000000F
1006 #define lpfc_mq_context_count_WORD      word0
1007 #define LPFC_MQ_CNT_16          0x5
1008 #define LPFC_MQ_CNT_32          0x6
1009 #define LPFC_MQ_CNT_64          0x7
1010 #define LPFC_MQ_CNT_128         0x8
1011         uint32_t word1;
1012 #define lpfc_mq_context_valid_SHIFT     31
1013 #define lpfc_mq_context_valid_MASK      0x00000001
1014 #define lpfc_mq_context_valid_WORD      word1
1015         uint32_t reserved2;
1016         uint32_t reserved3;
1017 };
1018
1019 struct lpfc_mbx_mq_create {
1020         struct mbox_header header;
1021         union {
1022                 struct {
1023                         uint32_t word0;
1024 #define lpfc_mbx_mq_create_num_pages_SHIFT      0
1025 #define lpfc_mbx_mq_create_num_pages_MASK       0x0000FFFF
1026 #define lpfc_mbx_mq_create_num_pages_WORD       word0
1027                         struct mq_context context;
1028                         struct dma_address page[LPFC_MAX_MQ_PAGE];
1029                 } request;
1030                 struct {
1031                         uint32_t word0;
1032 #define lpfc_mbx_mq_create_q_id_SHIFT   0
1033 #define lpfc_mbx_mq_create_q_id_MASK    0x0000FFFF
1034 #define lpfc_mbx_mq_create_q_id_WORD    word0
1035                 } response;
1036         } u;
1037 };
1038
1039 struct lpfc_mbx_mq_create_ext {
1040         struct mbox_header header;
1041         union {
1042                 struct {
1043                         uint32_t word0;
1044 #define lpfc_mbx_mq_create_ext_num_pages_SHIFT          0
1045 #define lpfc_mbx_mq_create_ext_num_pages_MASK           0x0000FFFF
1046 #define lpfc_mbx_mq_create_ext_num_pages_WORD           word0
1047                         uint32_t async_evt_bmap;
1048 #define lpfc_mbx_mq_create_ext_async_evt_link_SHIFT     LPFC_TRAILER_CODE_LINK
1049 #define lpfc_mbx_mq_create_ext_async_evt_link_MASK      0x00000001
1050 #define lpfc_mbx_mq_create_ext_async_evt_link_WORD      async_evt_bmap
1051 #define lpfc_mbx_mq_create_ext_async_evt_fcfste_SHIFT   LPFC_TRAILER_CODE_FCOE
1052 #define lpfc_mbx_mq_create_ext_async_evt_fcfste_MASK    0x00000001
1053 #define lpfc_mbx_mq_create_ext_async_evt_fcfste_WORD    async_evt_bmap
1054 #define lpfc_mbx_mq_create_ext_async_evt_group5_SHIFT   LPFC_TRAILER_CODE_GRP5
1055 #define lpfc_mbx_mq_create_ext_async_evt_group5_MASK    0x00000001
1056 #define lpfc_mbx_mq_create_ext_async_evt_group5_WORD    async_evt_bmap
1057                         struct mq_context context;
1058                         struct dma_address page[LPFC_MAX_MQ_PAGE];
1059                 } request;
1060                 struct {
1061                         uint32_t word0;
1062 #define lpfc_mbx_mq_create_q_id_SHIFT   0
1063 #define lpfc_mbx_mq_create_q_id_MASK    0x0000FFFF
1064 #define lpfc_mbx_mq_create_q_id_WORD    word0
1065                 } response;
1066         } u;
1067 #define LPFC_ASYNC_EVENT_LINK_STATE     0x2
1068 #define LPFC_ASYNC_EVENT_FCF_STATE      0x4
1069 #define LPFC_ASYNC_EVENT_GROUP5         0x20
1070 };
1071
1072 struct lpfc_mbx_mq_destroy {
1073         struct mbox_header header;
1074         union {
1075                 struct {
1076                         uint32_t word0;
1077 #define lpfc_mbx_mq_destroy_q_id_SHIFT  0
1078 #define lpfc_mbx_mq_destroy_q_id_MASK   0x0000FFFF
1079 #define lpfc_mbx_mq_destroy_q_id_WORD   word0
1080                 } request;
1081                 struct {
1082                         uint32_t word0;
1083                 } response;
1084         } u;
1085 };
1086
1087 struct lpfc_mbx_post_hdr_tmpl {
1088         struct mbox_header header;
1089         uint32_t word10;
1090 #define lpfc_mbx_post_hdr_tmpl_rpi_offset_SHIFT  0
1091 #define lpfc_mbx_post_hdr_tmpl_rpi_offset_MASK   0x0000FFFF
1092 #define lpfc_mbx_post_hdr_tmpl_rpi_offset_WORD   word10
1093 #define lpfc_mbx_post_hdr_tmpl_page_cnt_SHIFT   16
1094 #define lpfc_mbx_post_hdr_tmpl_page_cnt_MASK    0x0000FFFF
1095 #define lpfc_mbx_post_hdr_tmpl_page_cnt_WORD    word10
1096         uint32_t rpi_paddr_lo;
1097         uint32_t rpi_paddr_hi;
1098 };
1099
1100 struct sli4_sge {       /* SLI-4 */
1101         uint32_t addr_hi;
1102         uint32_t addr_lo;
1103
1104         uint32_t word2;
1105 #define lpfc_sli4_sge_offset_SHIFT      0 /* Offset of buffer - Not used*/
1106 #define lpfc_sli4_sge_offset_MASK       0x00FFFFFF
1107 #define lpfc_sli4_sge_offset_WORD       word2
1108 #define lpfc_sli4_sge_last_SHIFT        31 /* Last SEG in the SGL sets
1109                                                 this  flag !! */
1110 #define lpfc_sli4_sge_last_MASK         0x00000001
1111 #define lpfc_sli4_sge_last_WORD         word2
1112         uint32_t sge_len;
1113 };
1114
1115 struct fcf_record {
1116         uint32_t max_rcv_size;
1117         uint32_t fka_adv_period;
1118         uint32_t fip_priority;
1119         uint32_t word3;
1120 #define lpfc_fcf_record_mac_0_SHIFT             0
1121 #define lpfc_fcf_record_mac_0_MASK              0x000000FF
1122 #define lpfc_fcf_record_mac_0_WORD              word3
1123 #define lpfc_fcf_record_mac_1_SHIFT             8
1124 #define lpfc_fcf_record_mac_1_MASK              0x000000FF
1125 #define lpfc_fcf_record_mac_1_WORD              word3
1126 #define lpfc_fcf_record_mac_2_SHIFT             16
1127 #define lpfc_fcf_record_mac_2_MASK              0x000000FF
1128 #define lpfc_fcf_record_mac_2_WORD              word3
1129 #define lpfc_fcf_record_mac_3_SHIFT             24
1130 #define lpfc_fcf_record_mac_3_MASK              0x000000FF
1131 #define lpfc_fcf_record_mac_3_WORD              word3
1132         uint32_t word4;
1133 #define lpfc_fcf_record_mac_4_SHIFT             0
1134 #define lpfc_fcf_record_mac_4_MASK              0x000000FF
1135 #define lpfc_fcf_record_mac_4_WORD              word4
1136 #define lpfc_fcf_record_mac_5_SHIFT             8
1137 #define lpfc_fcf_record_mac_5_MASK              0x000000FF
1138 #define lpfc_fcf_record_mac_5_WORD              word4
1139 #define lpfc_fcf_record_fcf_avail_SHIFT         16
1140 #define lpfc_fcf_record_fcf_avail_MASK          0x000000FF
1141 #define lpfc_fcf_record_fcf_avail_WORD          word4
1142 #define lpfc_fcf_record_mac_addr_prov_SHIFT     24
1143 #define lpfc_fcf_record_mac_addr_prov_MASK      0x000000FF
1144 #define lpfc_fcf_record_mac_addr_prov_WORD      word4
1145 #define LPFC_FCF_FPMA           1       /* Fabric Provided MAC Address */
1146 #define LPFC_FCF_SPMA           2       /* Server Provided MAC Address */
1147         uint32_t word5;
1148 #define lpfc_fcf_record_fab_name_0_SHIFT        0
1149 #define lpfc_fcf_record_fab_name_0_MASK         0x000000FF
1150 #define lpfc_fcf_record_fab_name_0_WORD         word5
1151 #define lpfc_fcf_record_fab_name_1_SHIFT        8
1152 #define lpfc_fcf_record_fab_name_1_MASK         0x000000FF
1153 #define lpfc_fcf_record_fab_name_1_WORD         word5
1154 #define lpfc_fcf_record_fab_name_2_SHIFT        16
1155 #define lpfc_fcf_record_fab_name_2_MASK         0x000000FF
1156 #define lpfc_fcf_record_fab_name_2_WORD         word5
1157 #define lpfc_fcf_record_fab_name_3_SHIFT        24
1158 #define lpfc_fcf_record_fab_name_3_MASK         0x000000FF
1159 #define lpfc_fcf_record_fab_name_3_WORD         word5
1160         uint32_t word6;
1161 #define lpfc_fcf_record_fab_name_4_SHIFT        0
1162 #define lpfc_fcf_record_fab_name_4_MASK         0x000000FF
1163 #define lpfc_fcf_record_fab_name_4_WORD         word6
1164 #define lpfc_fcf_record_fab_name_5_SHIFT        8
1165 #define lpfc_fcf_record_fab_name_5_MASK         0x000000FF
1166 #define lpfc_fcf_record_fab_name_5_WORD         word6
1167 #define lpfc_fcf_record_fab_name_6_SHIFT        16
1168 #define lpfc_fcf_record_fab_name_6_MASK         0x000000FF
1169 #define lpfc_fcf_record_fab_name_6_WORD         word6
1170 #define lpfc_fcf_record_fab_name_7_SHIFT        24
1171 #define lpfc_fcf_record_fab_name_7_MASK         0x000000FF
1172 #define lpfc_fcf_record_fab_name_7_WORD         word6
1173         uint32_t word7;
1174 #define lpfc_fcf_record_fc_map_0_SHIFT          0
1175 #define lpfc_fcf_record_fc_map_0_MASK           0x000000FF
1176 #define lpfc_fcf_record_fc_map_0_WORD           word7
1177 #define lpfc_fcf_record_fc_map_1_SHIFT          8
1178 #define lpfc_fcf_record_fc_map_1_MASK           0x000000FF
1179 #define lpfc_fcf_record_fc_map_1_WORD           word7
1180 #define lpfc_fcf_record_fc_map_2_SHIFT          16
1181 #define lpfc_fcf_record_fc_map_2_MASK           0x000000FF
1182 #define lpfc_fcf_record_fc_map_2_WORD           word7
1183 #define lpfc_fcf_record_fcf_valid_SHIFT         24
1184 #define lpfc_fcf_record_fcf_valid_MASK          0x000000FF
1185 #define lpfc_fcf_record_fcf_valid_WORD          word7
1186         uint32_t word8;
1187 #define lpfc_fcf_record_fcf_index_SHIFT         0
1188 #define lpfc_fcf_record_fcf_index_MASK          0x0000FFFF
1189 #define lpfc_fcf_record_fcf_index_WORD          word8
1190 #define lpfc_fcf_record_fcf_state_SHIFT         16
1191 #define lpfc_fcf_record_fcf_state_MASK          0x0000FFFF
1192 #define lpfc_fcf_record_fcf_state_WORD          word8
1193         uint8_t vlan_bitmap[512];
1194         uint32_t word137;
1195 #define lpfc_fcf_record_switch_name_0_SHIFT     0
1196 #define lpfc_fcf_record_switch_name_0_MASK      0x000000FF
1197 #define lpfc_fcf_record_switch_name_0_WORD      word137
1198 #define lpfc_fcf_record_switch_name_1_SHIFT     8
1199 #define lpfc_fcf_record_switch_name_1_MASK      0x000000FF
1200 #define lpfc_fcf_record_switch_name_1_WORD      word137
1201 #define lpfc_fcf_record_switch_name_2_SHIFT     16
1202 #define lpfc_fcf_record_switch_name_2_MASK      0x000000FF
1203 #define lpfc_fcf_record_switch_name_2_WORD      word137
1204 #define lpfc_fcf_record_switch_name_3_SHIFT     24
1205 #define lpfc_fcf_record_switch_name_3_MASK      0x000000FF
1206 #define lpfc_fcf_record_switch_name_3_WORD      word137
1207         uint32_t word138;
1208 #define lpfc_fcf_record_switch_name_4_SHIFT     0
1209 #define lpfc_fcf_record_switch_name_4_MASK      0x000000FF
1210 #define lpfc_fcf_record_switch_name_4_WORD      word138
1211 #define lpfc_fcf_record_switch_name_5_SHIFT     8
1212 #define lpfc_fcf_record_switch_name_5_MASK      0x000000FF
1213 #define lpfc_fcf_record_switch_name_5_WORD      word138
1214 #define lpfc_fcf_record_switch_name_6_SHIFT     16
1215 #define lpfc_fcf_record_switch_name_6_MASK      0x000000FF
1216 #define lpfc_fcf_record_switch_name_6_WORD      word138
1217 #define lpfc_fcf_record_switch_name_7_SHIFT     24
1218 #define lpfc_fcf_record_switch_name_7_MASK      0x000000FF
1219 #define lpfc_fcf_record_switch_name_7_WORD      word138
1220 };
1221
1222 struct lpfc_mbx_read_fcf_tbl {
1223         union lpfc_sli4_cfg_shdr cfg_shdr;
1224         union {
1225                 struct {
1226                         uint32_t word10;
1227 #define lpfc_mbx_read_fcf_tbl_indx_SHIFT        0
1228 #define lpfc_mbx_read_fcf_tbl_indx_MASK         0x0000FFFF
1229 #define lpfc_mbx_read_fcf_tbl_indx_WORD         word10
1230                 } request;
1231                 struct {
1232                         uint32_t eventag;
1233                 } response;
1234         } u;
1235         uint32_t word11;
1236 #define lpfc_mbx_read_fcf_tbl_nxt_vindx_SHIFT   0
1237 #define lpfc_mbx_read_fcf_tbl_nxt_vindx_MASK    0x0000FFFF
1238 #define lpfc_mbx_read_fcf_tbl_nxt_vindx_WORD    word11
1239 };
1240
1241 struct lpfc_mbx_add_fcf_tbl_entry {
1242         union lpfc_sli4_cfg_shdr cfg_shdr;
1243         uint32_t word10;
1244 #define lpfc_mbx_add_fcf_tbl_fcfi_SHIFT        0
1245 #define lpfc_mbx_add_fcf_tbl_fcfi_MASK         0x0000FFFF
1246 #define lpfc_mbx_add_fcf_tbl_fcfi_WORD         word10
1247         struct lpfc_mbx_sge fcf_sge;
1248 };
1249
1250 struct lpfc_mbx_del_fcf_tbl_entry {
1251         struct mbox_header header;
1252         uint32_t word10;
1253 #define lpfc_mbx_del_fcf_tbl_count_SHIFT        0
1254 #define lpfc_mbx_del_fcf_tbl_count_MASK         0x0000FFFF
1255 #define lpfc_mbx_del_fcf_tbl_count_WORD         word10
1256 #define lpfc_mbx_del_fcf_tbl_index_SHIFT        16
1257 #define lpfc_mbx_del_fcf_tbl_index_MASK         0x0000FFFF
1258 #define lpfc_mbx_del_fcf_tbl_index_WORD         word10
1259 };
1260
1261 struct lpfc_mbx_redisc_fcf_tbl {
1262         struct mbox_header header;
1263         uint32_t word10;
1264 #define lpfc_mbx_redisc_fcf_count_SHIFT         0
1265 #define lpfc_mbx_redisc_fcf_count_MASK          0x0000FFFF
1266 #define lpfc_mbx_redisc_fcf_count_WORD          word10
1267         uint32_t resvd;
1268         uint32_t word12;
1269 #define lpfc_mbx_redisc_fcf_index_SHIFT         0
1270 #define lpfc_mbx_redisc_fcf_index_MASK          0x0000FFFF
1271 #define lpfc_mbx_redisc_fcf_index_WORD          word12
1272 };
1273
1274 struct lpfc_mbx_query_fw_cfg {
1275         struct mbox_header header;
1276         uint32_t config_number;
1277         uint32_t asic_rev;
1278         uint32_t phys_port;
1279         uint32_t function_mode;
1280 /* firmware Function Mode */
1281 #define lpfc_function_mode_toe_SHIFT            0
1282 #define lpfc_function_mode_toe_MASK             0x00000001
1283 #define lpfc_function_mode_toe_WORD             function_mode
1284 #define lpfc_function_mode_nic_SHIFT            1
1285 #define lpfc_function_mode_nic_MASK             0x00000001
1286 #define lpfc_function_mode_nic_WORD             function_mode
1287 #define lpfc_function_mode_rdma_SHIFT           2
1288 #define lpfc_function_mode_rdma_MASK            0x00000001
1289 #define lpfc_function_mode_rdma_WORD            function_mode
1290 #define lpfc_function_mode_vm_SHIFT             3
1291 #define lpfc_function_mode_vm_MASK              0x00000001
1292 #define lpfc_function_mode_vm_WORD              function_mode
1293 #define lpfc_function_mode_iscsi_i_SHIFT        4
1294 #define lpfc_function_mode_iscsi_i_MASK         0x00000001
1295 #define lpfc_function_mode_iscsi_i_WORD         function_mode
1296 #define lpfc_function_mode_iscsi_t_SHIFT        5
1297 #define lpfc_function_mode_iscsi_t_MASK         0x00000001
1298 #define lpfc_function_mode_iscsi_t_WORD         function_mode
1299 #define lpfc_function_mode_fcoe_i_SHIFT         6
1300 #define lpfc_function_mode_fcoe_i_MASK          0x00000001
1301 #define lpfc_function_mode_fcoe_i_WORD          function_mode
1302 #define lpfc_function_mode_fcoe_t_SHIFT         7
1303 #define lpfc_function_mode_fcoe_t_MASK          0x00000001
1304 #define lpfc_function_mode_fcoe_t_WORD          function_mode
1305 #define lpfc_function_mode_dal_SHIFT            8
1306 #define lpfc_function_mode_dal_MASK             0x00000001
1307 #define lpfc_function_mode_dal_WORD             function_mode
1308 #define lpfc_function_mode_lro_SHIFT            9
1309 #define lpfc_function_mode_lro_MASK             0x00000001
1310 #define lpfc_function_mode_lro_WORD             function_mode9
1311 #define lpfc_function_mode_flex10_SHIFT         10
1312 #define lpfc_function_mode_flex10_MASK          0x00000001
1313 #define lpfc_function_mode_flex10_WORD          function_mode
1314 #define lpfc_function_mode_ncsi_SHIFT           11
1315 #define lpfc_function_mode_ncsi_MASK            0x00000001
1316 #define lpfc_function_mode_ncsi_WORD            function_mode
1317 };
1318
1319 /* Status field for embedded SLI_CONFIG mailbox command */
1320 #define STATUS_SUCCESS                                  0x0
1321 #define STATUS_FAILED                                   0x1
1322 #define STATUS_ILLEGAL_REQUEST                          0x2
1323 #define STATUS_ILLEGAL_FIELD                            0x3
1324 #define STATUS_INSUFFICIENT_BUFFER                      0x4
1325 #define STATUS_UNAUTHORIZED_REQUEST                     0x5
1326 #define STATUS_FLASHROM_SAVE_FAILED                     0x17
1327 #define STATUS_FLASHROM_RESTORE_FAILED                  0x18
1328 #define STATUS_ICCBINDEX_ALLOC_FAILED                   0x1a
1329 #define STATUS_IOCTLHANDLE_ALLOC_FAILED                 0x1b
1330 #define STATUS_INVALID_PHY_ADDR_FROM_OSM                0x1c
1331 #define STATUS_INVALID_PHY_ADDR_LEN_FROM_OSM            0x1d
1332 #define STATUS_ASSERT_FAILED                            0x1e
1333 #define STATUS_INVALID_SESSION                          0x1f
1334 #define STATUS_INVALID_CONNECTION                       0x20
1335 #define STATUS_BTL_PATH_EXCEEDS_OSM_LIMIT               0x21
1336 #define STATUS_BTL_NO_FREE_SLOT_PATH                    0x24
1337 #define STATUS_BTL_NO_FREE_SLOT_TGTID                   0x25
1338 #define STATUS_OSM_DEVSLOT_NOT_FOUND                    0x26
1339 #define STATUS_FLASHROM_READ_FAILED                     0x27
1340 #define STATUS_POLL_IOCTL_TIMEOUT                       0x28
1341 #define STATUS_ERROR_ACITMAIN                           0x2a
1342 #define STATUS_REBOOT_REQUIRED                          0x2c
1343 #define STATUS_FCF_IN_USE                               0x3a
1344 #define STATUS_FCF_TABLE_EMPTY                          0x43
1345
1346 struct lpfc_mbx_sli4_config {
1347         struct mbox_header header;
1348 };
1349
1350 struct lpfc_mbx_init_vfi {
1351         uint32_t word1;
1352 #define lpfc_init_vfi_vr_SHIFT          31
1353 #define lpfc_init_vfi_vr_MASK           0x00000001
1354 #define lpfc_init_vfi_vr_WORD           word1
1355 #define lpfc_init_vfi_vt_SHIFT          30
1356 #define lpfc_init_vfi_vt_MASK           0x00000001
1357 #define lpfc_init_vfi_vt_WORD           word1
1358 #define lpfc_init_vfi_vf_SHIFT          29
1359 #define lpfc_init_vfi_vf_MASK           0x00000001
1360 #define lpfc_init_vfi_vf_WORD           word1
1361 #define lpfc_init_vfi_vfi_SHIFT         0
1362 #define lpfc_init_vfi_vfi_MASK          0x0000FFFF
1363 #define lpfc_init_vfi_vfi_WORD          word1
1364         uint32_t word2;
1365 #define lpfc_init_vfi_fcfi_SHIFT        0
1366 #define lpfc_init_vfi_fcfi_MASK         0x0000FFFF
1367 #define lpfc_init_vfi_fcfi_WORD         word2
1368         uint32_t word3;
1369 #define lpfc_init_vfi_pri_SHIFT         13
1370 #define lpfc_init_vfi_pri_MASK          0x00000007
1371 #define lpfc_init_vfi_pri_WORD          word3
1372 #define lpfc_init_vfi_vf_id_SHIFT       1
1373 #define lpfc_init_vfi_vf_id_MASK        0x00000FFF
1374 #define lpfc_init_vfi_vf_id_WORD        word3
1375         uint32_t word4;
1376 #define lpfc_init_vfi_hop_count_SHIFT   24
1377 #define lpfc_init_vfi_hop_count_MASK    0x000000FF
1378 #define lpfc_init_vfi_hop_count_WORD    word4
1379 };
1380
1381 struct lpfc_mbx_reg_vfi {
1382         uint32_t word1;
1383 #define lpfc_reg_vfi_vp_SHIFT           28
1384 #define lpfc_reg_vfi_vp_MASK            0x00000001
1385 #define lpfc_reg_vfi_vp_WORD            word1
1386 #define lpfc_reg_vfi_vfi_SHIFT          0
1387 #define lpfc_reg_vfi_vfi_MASK           0x0000FFFF
1388 #define lpfc_reg_vfi_vfi_WORD           word1
1389         uint32_t word2;
1390 #define lpfc_reg_vfi_vpi_SHIFT          16
1391 #define lpfc_reg_vfi_vpi_MASK           0x0000FFFF
1392 #define lpfc_reg_vfi_vpi_WORD           word2
1393 #define lpfc_reg_vfi_fcfi_SHIFT         0
1394 #define lpfc_reg_vfi_fcfi_MASK          0x0000FFFF
1395 #define lpfc_reg_vfi_fcfi_WORD          word2
1396         uint32_t wwn[2];
1397         struct ulp_bde64 bde;
1398         uint32_t e_d_tov;
1399         uint32_t r_a_tov;
1400         uint32_t word10;
1401 #define lpfc_reg_vfi_nport_id_SHIFT             0
1402 #define lpfc_reg_vfi_nport_id_MASK              0x00FFFFFF
1403 #define lpfc_reg_vfi_nport_id_WORD              word10
1404 };
1405
1406 struct lpfc_mbx_init_vpi {
1407         uint32_t word1;
1408 #define lpfc_init_vpi_vfi_SHIFT         16
1409 #define lpfc_init_vpi_vfi_MASK          0x0000FFFF
1410 #define lpfc_init_vpi_vfi_WORD          word1
1411 #define lpfc_init_vpi_vpi_SHIFT         0
1412 #define lpfc_init_vpi_vpi_MASK          0x0000FFFF
1413 #define lpfc_init_vpi_vpi_WORD          word1
1414 };
1415
1416 struct lpfc_mbx_read_vpi {
1417         uint32_t word1_rsvd;
1418         uint32_t word2;
1419 #define lpfc_mbx_read_vpi_vnportid_SHIFT        0
1420 #define lpfc_mbx_read_vpi_vnportid_MASK         0x00FFFFFF
1421 #define lpfc_mbx_read_vpi_vnportid_WORD         word2
1422         uint32_t word3_rsvd;
1423         uint32_t word4;
1424 #define lpfc_mbx_read_vpi_acq_alpa_SHIFT        0
1425 #define lpfc_mbx_read_vpi_acq_alpa_MASK         0x000000FF
1426 #define lpfc_mbx_read_vpi_acq_alpa_WORD         word4
1427 #define lpfc_mbx_read_vpi_pb_SHIFT              15
1428 #define lpfc_mbx_read_vpi_pb_MASK               0x00000001
1429 #define lpfc_mbx_read_vpi_pb_WORD               word4
1430 #define lpfc_mbx_read_vpi_spec_alpa_SHIFT       16
1431 #define lpfc_mbx_read_vpi_spec_alpa_MASK        0x000000FF
1432 #define lpfc_mbx_read_vpi_spec_alpa_WORD        word4
1433 #define lpfc_mbx_read_vpi_ns_SHIFT              30
1434 #define lpfc_mbx_read_vpi_ns_MASK               0x00000001
1435 #define lpfc_mbx_read_vpi_ns_WORD               word4
1436 #define lpfc_mbx_read_vpi_hl_SHIFT              31
1437 #define lpfc_mbx_read_vpi_hl_MASK               0x00000001
1438 #define lpfc_mbx_read_vpi_hl_WORD               word4
1439         uint32_t word5_rsvd;
1440         uint32_t word6;
1441 #define lpfc_mbx_read_vpi_vpi_SHIFT             0
1442 #define lpfc_mbx_read_vpi_vpi_MASK              0x0000FFFF
1443 #define lpfc_mbx_read_vpi_vpi_WORD              word6
1444         uint32_t word7;
1445 #define lpfc_mbx_read_vpi_mac_0_SHIFT           0
1446 #define lpfc_mbx_read_vpi_mac_0_MASK            0x000000FF
1447 #define lpfc_mbx_read_vpi_mac_0_WORD            word7
1448 #define lpfc_mbx_read_vpi_mac_1_SHIFT           8
1449 #define lpfc_mbx_read_vpi_mac_1_MASK            0x000000FF
1450 #define lpfc_mbx_read_vpi_mac_1_WORD            word7
1451 #define lpfc_mbx_read_vpi_mac_2_SHIFT           16
1452 #define lpfc_mbx_read_vpi_mac_2_MASK            0x000000FF
1453 #define lpfc_mbx_read_vpi_mac_2_WORD            word7
1454 #define lpfc_mbx_read_vpi_mac_3_SHIFT           24
1455 #define lpfc_mbx_read_vpi_mac_3_MASK            0x000000FF
1456 #define lpfc_mbx_read_vpi_mac_3_WORD            word7
1457         uint32_t word8;
1458 #define lpfc_mbx_read_vpi_mac_4_SHIFT           0
1459 #define lpfc_mbx_read_vpi_mac_4_MASK            0x000000FF
1460 #define lpfc_mbx_read_vpi_mac_4_WORD            word8
1461 #define lpfc_mbx_read_vpi_mac_5_SHIFT           8
1462 #define lpfc_mbx_read_vpi_mac_5_MASK            0x000000FF
1463 #define lpfc_mbx_read_vpi_mac_5_WORD            word8
1464 #define lpfc_mbx_read_vpi_vlan_tag_SHIFT        16
1465 #define lpfc_mbx_read_vpi_vlan_tag_MASK         0x00000FFF
1466 #define lpfc_mbx_read_vpi_vlan_tag_WORD         word8
1467 #define lpfc_mbx_read_vpi_vv_SHIFT              28
1468 #define lpfc_mbx_read_vpi_vv_MASK               0x0000001
1469 #define lpfc_mbx_read_vpi_vv_WORD               word8
1470 };
1471
1472 struct lpfc_mbx_unreg_vfi {
1473         uint32_t word1_rsvd;
1474         uint32_t word2;
1475 #define lpfc_unreg_vfi_vfi_SHIFT        0
1476 #define lpfc_unreg_vfi_vfi_MASK         0x0000FFFF
1477 #define lpfc_unreg_vfi_vfi_WORD         word2
1478 };
1479
1480 struct lpfc_mbx_resume_rpi {
1481         uint32_t word1;
1482 #define lpfc_resume_rpi_index_SHIFT     0
1483 #define lpfc_resume_rpi_index_MASK      0x0000FFFF
1484 #define lpfc_resume_rpi_index_WORD      word1
1485 #define lpfc_resume_rpi_ii_SHIFT        30
1486 #define lpfc_resume_rpi_ii_MASK         0x00000003
1487 #define lpfc_resume_rpi_ii_WORD         word1
1488 #define RESUME_INDEX_RPI                0
1489 #define RESUME_INDEX_VPI                1
1490 #define RESUME_INDEX_VFI                2
1491 #define RESUME_INDEX_FCFI               3
1492         uint32_t event_tag;
1493 };
1494
1495 #define REG_FCF_INVALID_QID     0xFFFF
1496 struct lpfc_mbx_reg_fcfi {
1497         uint32_t word1;
1498 #define lpfc_reg_fcfi_info_index_SHIFT  0
1499 #define lpfc_reg_fcfi_info_index_MASK   0x0000FFFF
1500 #define lpfc_reg_fcfi_info_index_WORD   word1
1501 #define lpfc_reg_fcfi_fcfi_SHIFT        16
1502 #define lpfc_reg_fcfi_fcfi_MASK         0x0000FFFF
1503 #define lpfc_reg_fcfi_fcfi_WORD         word1
1504         uint32_t word2;
1505 #define lpfc_reg_fcfi_rq_id1_SHIFT      0
1506 #define lpfc_reg_fcfi_rq_id1_MASK       0x0000FFFF
1507 #define lpfc_reg_fcfi_rq_id1_WORD       word2
1508 #define lpfc_reg_fcfi_rq_id0_SHIFT      16
1509 #define lpfc_reg_fcfi_rq_id0_MASK       0x0000FFFF
1510 #define lpfc_reg_fcfi_rq_id0_WORD       word2
1511         uint32_t word3;
1512 #define lpfc_reg_fcfi_rq_id3_SHIFT      0
1513 #define lpfc_reg_fcfi_rq_id3_MASK       0x0000FFFF
1514 #define lpfc_reg_fcfi_rq_id3_WORD       word3
1515 #define lpfc_reg_fcfi_rq_id2_SHIFT      16
1516 #define lpfc_reg_fcfi_rq_id2_MASK       0x0000FFFF
1517 #define lpfc_reg_fcfi_rq_id2_WORD       word3
1518         uint32_t word4;
1519 #define lpfc_reg_fcfi_type_match0_SHIFT 24
1520 #define lpfc_reg_fcfi_type_match0_MASK  0x000000FF
1521 #define lpfc_reg_fcfi_type_match0_WORD  word4
1522 #define lpfc_reg_fcfi_type_mask0_SHIFT  16
1523 #define lpfc_reg_fcfi_type_mask0_MASK   0x000000FF
1524 #define lpfc_reg_fcfi_type_mask0_WORD   word4
1525 #define lpfc_reg_fcfi_rctl_match0_SHIFT 8
1526 #define lpfc_reg_fcfi_rctl_match0_MASK  0x000000FF
1527 #define lpfc_reg_fcfi_rctl_match0_WORD  word4
1528 #define lpfc_reg_fcfi_rctl_mask0_SHIFT  0
1529 #define lpfc_reg_fcfi_rctl_mask0_MASK   0x000000FF
1530 #define lpfc_reg_fcfi_rctl_mask0_WORD   word4
1531         uint32_t word5;
1532 #define lpfc_reg_fcfi_type_match1_SHIFT 24
1533 #define lpfc_reg_fcfi_type_match1_MASK  0x000000FF
1534 #define lpfc_reg_fcfi_type_match1_WORD  word5
1535 #define lpfc_reg_fcfi_type_mask1_SHIFT  16
1536 #define lpfc_reg_fcfi_type_mask1_MASK   0x000000FF
1537 #define lpfc_reg_fcfi_type_mask1_WORD   word5
1538 #define lpfc_reg_fcfi_rctl_match1_SHIFT 8
1539 #define lpfc_reg_fcfi_rctl_match1_MASK  0x000000FF
1540 #define lpfc_reg_fcfi_rctl_match1_WORD  word5
1541 #define lpfc_reg_fcfi_rctl_mask1_SHIFT  0
1542 #define lpfc_reg_fcfi_rctl_mask1_MASK   0x000000FF
1543 #define lpfc_reg_fcfi_rctl_mask1_WORD   word5
1544         uint32_t word6;
1545 #define lpfc_reg_fcfi_type_match2_SHIFT 24
1546 #define lpfc_reg_fcfi_type_match2_MASK  0x000000FF
1547 #define lpfc_reg_fcfi_type_match2_WORD  word6
1548 #define lpfc_reg_fcfi_type_mask2_SHIFT  16
1549 #define lpfc_reg_fcfi_type_mask2_MASK   0x000000FF
1550 #define lpfc_reg_fcfi_type_mask2_WORD   word6
1551 #define lpfc_reg_fcfi_rctl_match2_SHIFT 8
1552 #define lpfc_reg_fcfi_rctl_match2_MASK  0x000000FF
1553 #define lpfc_reg_fcfi_rctl_match2_WORD  word6
1554 #define lpfc_reg_fcfi_rctl_mask2_SHIFT  0
1555 #define lpfc_reg_fcfi_rctl_mask2_MASK   0x000000FF
1556 #define lpfc_reg_fcfi_rctl_mask2_WORD   word6
1557         uint32_t word7;
1558 #define lpfc_reg_fcfi_type_match3_SHIFT 24
1559 #define lpfc_reg_fcfi_type_match3_MASK  0x000000FF
1560 #define lpfc_reg_fcfi_type_match3_WORD  word7
1561 #define lpfc_reg_fcfi_type_mask3_SHIFT  16
1562 #define lpfc_reg_fcfi_type_mask3_MASK   0x000000FF
1563 #define lpfc_reg_fcfi_type_mask3_WORD   word7
1564 #define lpfc_reg_fcfi_rctl_match3_SHIFT 8
1565 #define lpfc_reg_fcfi_rctl_match3_MASK  0x000000FF
1566 #define lpfc_reg_fcfi_rctl_match3_WORD  word7
1567 #define lpfc_reg_fcfi_rctl_mask3_SHIFT  0
1568 #define lpfc_reg_fcfi_rctl_mask3_MASK   0x000000FF
1569 #define lpfc_reg_fcfi_rctl_mask3_WORD   word7
1570         uint32_t word8;
1571 #define lpfc_reg_fcfi_mam_SHIFT         13
1572 #define lpfc_reg_fcfi_mam_MASK          0x00000003
1573 #define lpfc_reg_fcfi_mam_WORD          word8
1574 #define LPFC_MAM_BOTH           0       /* Both SPMA and FPMA */
1575 #define LPFC_MAM_SPMA           1       /* Server Provided MAC Address */
1576 #define LPFC_MAM_FPMA           2       /* Fabric Provided MAC Address */
1577 #define lpfc_reg_fcfi_vv_SHIFT          12
1578 #define lpfc_reg_fcfi_vv_MASK           0x00000001
1579 #define lpfc_reg_fcfi_vv_WORD           word8
1580 #define lpfc_reg_fcfi_vlan_tag_SHIFT    0
1581 #define lpfc_reg_fcfi_vlan_tag_MASK     0x00000FFF
1582 #define lpfc_reg_fcfi_vlan_tag_WORD     word8
1583 };
1584
1585 struct lpfc_mbx_unreg_fcfi {
1586         uint32_t word1_rsv;
1587         uint32_t word2;
1588 #define lpfc_unreg_fcfi_SHIFT           0
1589 #define lpfc_unreg_fcfi_MASK            0x0000FFFF
1590 #define lpfc_unreg_fcfi_WORD            word2
1591 };
1592
1593 struct lpfc_mbx_read_rev {
1594         uint32_t word1;
1595 #define lpfc_mbx_rd_rev_sli_lvl_SHIFT           16
1596 #define lpfc_mbx_rd_rev_sli_lvl_MASK            0x0000000F
1597 #define lpfc_mbx_rd_rev_sli_lvl_WORD            word1
1598 #define lpfc_mbx_rd_rev_fcoe_SHIFT              20
1599 #define lpfc_mbx_rd_rev_fcoe_MASK               0x00000001
1600 #define lpfc_mbx_rd_rev_fcoe_WORD               word1
1601 #define lpfc_mbx_rd_rev_cee_ver_SHIFT           21
1602 #define lpfc_mbx_rd_rev_cee_ver_MASK            0x00000003
1603 #define lpfc_mbx_rd_rev_cee_ver_WORD            word1
1604 #define LPFC_PREDCBX_CEE_MODE   0
1605 #define LPFC_DCBX_CEE_MODE      1
1606 #define lpfc_mbx_rd_rev_vpd_SHIFT               29
1607 #define lpfc_mbx_rd_rev_vpd_MASK                0x00000001
1608 #define lpfc_mbx_rd_rev_vpd_WORD                word1
1609         uint32_t first_hw_rev;
1610         uint32_t second_hw_rev;
1611         uint32_t word4_rsvd;
1612         uint32_t third_hw_rev;
1613         uint32_t word6;
1614 #define lpfc_mbx_rd_rev_fcph_low_SHIFT          0
1615 #define lpfc_mbx_rd_rev_fcph_low_MASK           0x000000FF
1616 #define lpfc_mbx_rd_rev_fcph_low_WORD           word6
1617 #define lpfc_mbx_rd_rev_fcph_high_SHIFT         8
1618 #define lpfc_mbx_rd_rev_fcph_high_MASK          0x000000FF
1619 #define lpfc_mbx_rd_rev_fcph_high_WORD          word6
1620 #define lpfc_mbx_rd_rev_ftr_lvl_low_SHIFT       16
1621 #define lpfc_mbx_rd_rev_ftr_lvl_low_MASK        0x000000FF
1622 #define lpfc_mbx_rd_rev_ftr_lvl_low_WORD        word6
1623 #define lpfc_mbx_rd_rev_ftr_lvl_high_SHIFT      24
1624 #define lpfc_mbx_rd_rev_ftr_lvl_high_MASK       0x000000FF
1625 #define lpfc_mbx_rd_rev_ftr_lvl_high_WORD       word6
1626         uint32_t word7_rsvd;
1627         uint32_t fw_id_rev;
1628         uint8_t  fw_name[16];
1629         uint32_t ulp_fw_id_rev;
1630         uint8_t  ulp_fw_name[16];
1631         uint32_t word18_47_rsvd[30];
1632         uint32_t word48;
1633 #define lpfc_mbx_rd_rev_avail_len_SHIFT         0
1634 #define lpfc_mbx_rd_rev_avail_len_MASK          0x00FFFFFF
1635 #define lpfc_mbx_rd_rev_avail_len_WORD          word48
1636         uint32_t vpd_paddr_low;
1637         uint32_t vpd_paddr_high;
1638         uint32_t avail_vpd_len;
1639         uint32_t rsvd_52_63[12];
1640 };
1641
1642 struct lpfc_mbx_read_config {
1643         uint32_t word1;
1644 #define lpfc_mbx_rd_conf_max_bbc_SHIFT          0
1645 #define lpfc_mbx_rd_conf_max_bbc_MASK           0x000000FF
1646 #define lpfc_mbx_rd_conf_max_bbc_WORD           word1
1647 #define lpfc_mbx_rd_conf_init_bbc_SHIFT         8
1648 #define lpfc_mbx_rd_conf_init_bbc_MASK          0x000000FF
1649 #define lpfc_mbx_rd_conf_init_bbc_WORD          word1
1650         uint32_t word2;
1651 #define lpfc_mbx_rd_conf_nport_did_SHIFT        0
1652 #define lpfc_mbx_rd_conf_nport_did_MASK         0x00FFFFFF
1653 #define lpfc_mbx_rd_conf_nport_did_WORD         word2
1654 #define lpfc_mbx_rd_conf_topology_SHIFT         24
1655 #define lpfc_mbx_rd_conf_topology_MASK          0x000000FF
1656 #define lpfc_mbx_rd_conf_topology_WORD          word2
1657         uint32_t word3;
1658 #define lpfc_mbx_rd_conf_ao_SHIFT               0
1659 #define lpfc_mbx_rd_conf_ao_MASK                0x00000001
1660 #define lpfc_mbx_rd_conf_ao_WORD                word3
1661 #define lpfc_mbx_rd_conf_bb_scn_SHIFT           8
1662 #define lpfc_mbx_rd_conf_bb_scn_MASK            0x0000000F
1663 #define lpfc_mbx_rd_conf_bb_scn_WORD            word3
1664 #define lpfc_mbx_rd_conf_cbb_scn_SHIFT          12
1665 #define lpfc_mbx_rd_conf_cbb_scn_MASK           0x0000000F
1666 #define lpfc_mbx_rd_conf_cbb_scn_WORD           word3
1667 #define lpfc_mbx_rd_conf_mc_SHIFT               29
1668 #define lpfc_mbx_rd_conf_mc_MASK                0x00000001
1669 #define lpfc_mbx_rd_conf_mc_WORD                word3
1670         uint32_t word4;
1671 #define lpfc_mbx_rd_conf_e_d_tov_SHIFT          0
1672 #define lpfc_mbx_rd_conf_e_d_tov_MASK           0x0000FFFF
1673 #define lpfc_mbx_rd_conf_e_d_tov_WORD           word4
1674         uint32_t word5;
1675 #define lpfc_mbx_rd_conf_lp_tov_SHIFT           0
1676 #define lpfc_mbx_rd_conf_lp_tov_MASK            0x0000FFFF
1677 #define lpfc_mbx_rd_conf_lp_tov_WORD            word5
1678         uint32_t word6;
1679 #define lpfc_mbx_rd_conf_r_a_tov_SHIFT          0
1680 #define lpfc_mbx_rd_conf_r_a_tov_MASK           0x0000FFFF
1681 #define lpfc_mbx_rd_conf_r_a_tov_WORD           word6
1682         uint32_t word7;
1683 #define lpfc_mbx_rd_conf_r_t_tov_SHIFT          0
1684 #define lpfc_mbx_rd_conf_r_t_tov_MASK           0x000000FF
1685 #define lpfc_mbx_rd_conf_r_t_tov_WORD           word7
1686         uint32_t word8;
1687 #define lpfc_mbx_rd_conf_al_tov_SHIFT           0
1688 #define lpfc_mbx_rd_conf_al_tov_MASK            0x0000000F
1689 #define lpfc_mbx_rd_conf_al_tov_WORD            word8
1690         uint32_t word9;
1691 #define lpfc_mbx_rd_conf_lmt_SHIFT              0
1692 #define lpfc_mbx_rd_conf_lmt_MASK               0x0000FFFF
1693 #define lpfc_mbx_rd_conf_lmt_WORD               word9
1694         uint32_t word10;
1695 #define lpfc_mbx_rd_conf_max_alpa_SHIFT         0
1696 #define lpfc_mbx_rd_conf_max_alpa_MASK          0x000000FF
1697 #define lpfc_mbx_rd_conf_max_alpa_WORD          word10
1698         uint32_t word11_rsvd;
1699         uint32_t word12;
1700 #define lpfc_mbx_rd_conf_xri_base_SHIFT         0
1701 #define lpfc_mbx_rd_conf_xri_base_MASK          0x0000FFFF
1702 #define lpfc_mbx_rd_conf_xri_base_WORD          word12
1703 #define lpfc_mbx_rd_conf_xri_count_SHIFT        16
1704 #define lpfc_mbx_rd_conf_xri_count_MASK         0x0000FFFF
1705 #define lpfc_mbx_rd_conf_xri_count_WORD         word12
1706         uint32_t word13;
1707 #define lpfc_mbx_rd_conf_rpi_base_SHIFT         0
1708 #define lpfc_mbx_rd_conf_rpi_base_MASK          0x0000FFFF
1709 #define lpfc_mbx_rd_conf_rpi_base_WORD          word13
1710 #define lpfc_mbx_rd_conf_rpi_count_SHIFT        16
1711 #define lpfc_mbx_rd_conf_rpi_count_MASK         0x0000FFFF
1712 #define lpfc_mbx_rd_conf_rpi_count_WORD         word13
1713         uint32_t word14;
1714 #define lpfc_mbx_rd_conf_vpi_base_SHIFT         0
1715 #define lpfc_mbx_rd_conf_vpi_base_MASK          0x0000FFFF
1716 #define lpfc_mbx_rd_conf_vpi_base_WORD          word14
1717 #define lpfc_mbx_rd_conf_vpi_count_SHIFT        16
1718 #define lpfc_mbx_rd_conf_vpi_count_MASK         0x0000FFFF
1719 #define lpfc_mbx_rd_conf_vpi_count_WORD         word14
1720         uint32_t word15;
1721 #define lpfc_mbx_rd_conf_vfi_base_SHIFT         0
1722 #define lpfc_mbx_rd_conf_vfi_base_MASK          0x0000FFFF
1723 #define lpfc_mbx_rd_conf_vfi_base_WORD          word15
1724 #define lpfc_mbx_rd_conf_vfi_count_SHIFT        16
1725 #define lpfc_mbx_rd_conf_vfi_count_MASK         0x0000FFFF
1726 #define lpfc_mbx_rd_conf_vfi_count_WORD         word15
1727         uint32_t word16;
1728 #define lpfc_mbx_rd_conf_fcfi_base_SHIFT        0
1729 #define lpfc_mbx_rd_conf_fcfi_base_MASK         0x0000FFFF
1730 #define lpfc_mbx_rd_conf_fcfi_base_WORD         word16
1731 #define lpfc_mbx_rd_conf_fcfi_count_SHIFT       16
1732 #define lpfc_mbx_rd_conf_fcfi_count_MASK        0x0000FFFF
1733 #define lpfc_mbx_rd_conf_fcfi_count_WORD        word16
1734         uint32_t word17;
1735 #define lpfc_mbx_rd_conf_rq_count_SHIFT         0
1736 #define lpfc_mbx_rd_conf_rq_count_MASK          0x0000FFFF
1737 #define lpfc_mbx_rd_conf_rq_count_WORD          word17
1738 #define lpfc_mbx_rd_conf_eq_count_SHIFT         16
1739 #define lpfc_mbx_rd_conf_eq_count_MASK          0x0000FFFF
1740 #define lpfc_mbx_rd_conf_eq_count_WORD          word17
1741         uint32_t word18;
1742 #define lpfc_mbx_rd_conf_wq_count_SHIFT         0
1743 #define lpfc_mbx_rd_conf_wq_count_MASK          0x0000FFFF
1744 #define lpfc_mbx_rd_conf_wq_count_WORD          word18
1745 #define lpfc_mbx_rd_conf_cq_count_SHIFT         16
1746 #define lpfc_mbx_rd_conf_cq_count_MASK          0x0000FFFF
1747 #define lpfc_mbx_rd_conf_cq_count_WORD          word18
1748 };
1749
1750 struct lpfc_mbx_request_features {
1751         uint32_t word1;
1752 #define lpfc_mbx_rq_ftr_qry_SHIFT               0
1753 #define lpfc_mbx_rq_ftr_qry_MASK                0x00000001
1754 #define lpfc_mbx_rq_ftr_qry_WORD                word1
1755         uint32_t word2;
1756 #define lpfc_mbx_rq_ftr_rq_iaab_SHIFT           0
1757 #define lpfc_mbx_rq_ftr_rq_iaab_MASK            0x00000001
1758 #define lpfc_mbx_rq_ftr_rq_iaab_WORD            word2
1759 #define lpfc_mbx_rq_ftr_rq_npiv_SHIFT           1
1760 #define lpfc_mbx_rq_ftr_rq_npiv_MASK            0x00000001
1761 #define lpfc_mbx_rq_ftr_rq_npiv_WORD            word2
1762 #define lpfc_mbx_rq_ftr_rq_dif_SHIFT            2
1763 #define lpfc_mbx_rq_ftr_rq_dif_MASK             0x00000001
1764 #define lpfc_mbx_rq_ftr_rq_dif_WORD             word2
1765 #define lpfc_mbx_rq_ftr_rq_vf_SHIFT             3
1766 #define lpfc_mbx_rq_ftr_rq_vf_MASK              0x00000001
1767 #define lpfc_mbx_rq_ftr_rq_vf_WORD              word2
1768 #define lpfc_mbx_rq_ftr_rq_fcpi_SHIFT           4
1769 #define lpfc_mbx_rq_ftr_rq_fcpi_MASK            0x00000001
1770 #define lpfc_mbx_rq_ftr_rq_fcpi_WORD            word2
1771 #define lpfc_mbx_rq_ftr_rq_fcpt_SHIFT           5
1772 #define lpfc_mbx_rq_ftr_rq_fcpt_MASK            0x00000001
1773 #define lpfc_mbx_rq_ftr_rq_fcpt_WORD            word2
1774 #define lpfc_mbx_rq_ftr_rq_fcpc_SHIFT           6
1775 #define lpfc_mbx_rq_ftr_rq_fcpc_MASK            0x00000001
1776 #define lpfc_mbx_rq_ftr_rq_fcpc_WORD            word2
1777 #define lpfc_mbx_rq_ftr_rq_ifip_SHIFT           7
1778 #define lpfc_mbx_rq_ftr_rq_ifip_MASK            0x00000001
1779 #define lpfc_mbx_rq_ftr_rq_ifip_WORD            word2
1780         uint32_t word3;
1781 #define lpfc_mbx_rq_ftr_rsp_iaab_SHIFT          0
1782 #define lpfc_mbx_rq_ftr_rsp_iaab_MASK           0x00000001
1783 #define lpfc_mbx_rq_ftr_rsp_iaab_WORD           word3
1784 #define lpfc_mbx_rq_ftr_rsp_npiv_SHIFT          1
1785 #define lpfc_mbx_rq_ftr_rsp_npiv_MASK           0x00000001
1786 #define lpfc_mbx_rq_ftr_rsp_npiv_WORD           word3
1787 #define lpfc_mbx_rq_ftr_rsp_dif_SHIFT           2
1788 #define lpfc_mbx_rq_ftr_rsp_dif_MASK            0x00000001
1789 #define lpfc_mbx_rq_ftr_rsp_dif_WORD            word3
1790 #define lpfc_mbx_rq_ftr_rsp_vf_SHIFT            3
1791 #define lpfc_mbx_rq_ftr_rsp_vf__MASK            0x00000001
1792 #define lpfc_mbx_rq_ftr_rsp_vf_WORD             word3
1793 #define lpfc_mbx_rq_ftr_rsp_fcpi_SHIFT          4
1794 #define lpfc_mbx_rq_ftr_rsp_fcpi_MASK           0x00000001
1795 #define lpfc_mbx_rq_ftr_rsp_fcpi_WORD           word3
1796 #define lpfc_mbx_rq_ftr_rsp_fcpt_SHIFT          5
1797 #define lpfc_mbx_rq_ftr_rsp_fcpt_MASK           0x00000001
1798 #define lpfc_mbx_rq_ftr_rsp_fcpt_WORD           word3
1799 #define lpfc_mbx_rq_ftr_rsp_fcpc_SHIFT          6
1800 #define lpfc_mbx_rq_ftr_rsp_fcpc_MASK           0x00000001
1801 #define lpfc_mbx_rq_ftr_rsp_fcpc_WORD           word3
1802 #define lpfc_mbx_rq_ftr_rsp_ifip_SHIFT          7
1803 #define lpfc_mbx_rq_ftr_rsp_ifip_MASK           0x00000001
1804 #define lpfc_mbx_rq_ftr_rsp_ifip_WORD           word3
1805 };
1806
1807 struct lpfc_mbx_supp_pages {
1808         uint32_t word1;
1809 #define qs_SHIFT                                0
1810 #define qs_MASK                                 0x00000001
1811 #define qs_WORD                                 word1
1812 #define wr_SHIFT                                1
1813 #define wr_MASK                                 0x00000001
1814 #define wr_WORD                                 word1
1815 #define pf_SHIFT                                8
1816 #define pf_MASK                                 0x000000ff
1817 #define pf_WORD                                 word1
1818 #define cpn_SHIFT                               16
1819 #define cpn_MASK                                0x000000ff
1820 #define cpn_WORD                                word1
1821         uint32_t word2;
1822 #define list_offset_SHIFT                       0
1823 #define list_offset_MASK                        0x000000ff
1824 #define list_offset_WORD                        word2
1825 #define next_offset_SHIFT                       8
1826 #define next_offset_MASK                        0x000000ff
1827 #define next_offset_WORD                        word2
1828 #define elem_cnt_SHIFT                          16
1829 #define elem_cnt_MASK                           0x000000ff
1830 #define elem_cnt_WORD                           word2
1831         uint32_t word3;
1832 #define pn_0_SHIFT                              24
1833 #define pn_0_MASK                               0x000000ff
1834 #define pn_0_WORD                               word3
1835 #define pn_1_SHIFT                              16
1836 #define pn_1_MASK                               0x000000ff
1837 #define pn_1_WORD                               word3
1838 #define pn_2_SHIFT                              8
1839 #define pn_2_MASK                               0x000000ff
1840 #define pn_2_WORD                               word3
1841 #define pn_3_SHIFT                              0
1842 #define pn_3_MASK                               0x000000ff
1843 #define pn_3_WORD                               word3
1844         uint32_t word4;
1845 #define pn_4_SHIFT                              24
1846 #define pn_4_MASK                               0x000000ff
1847 #define pn_4_WORD                               word4
1848 #define pn_5_SHIFT                              16
1849 #define pn_5_MASK                               0x000000ff
1850 #define pn_5_WORD                               word4
1851 #define pn_6_SHIFT                              8
1852 #define pn_6_MASK                               0x000000ff
1853 #define pn_6_WORD                               word4
1854 #define pn_7_SHIFT                              0
1855 #define pn_7_MASK                               0x000000ff
1856 #define pn_7_WORD                               word4
1857         uint32_t rsvd[27];
1858 #define LPFC_SUPP_PAGES                 0
1859 #define LPFC_BLOCK_GUARD_PROFILES       1
1860 #define LPFC_SLI4_PARAMETERS            2
1861 };
1862
1863 struct lpfc_mbx_sli4_params {
1864         uint32_t word1;
1865 #define qs_SHIFT                                0
1866 #define qs_MASK                                 0x00000001
1867 #define qs_WORD                                 word1
1868 #define wr_SHIFT                                1
1869 #define wr_MASK                                 0x00000001
1870 #define wr_WORD                                 word1
1871 #define pf_SHIFT                                8
1872 #define pf_MASK                                 0x000000ff
1873 #define pf_WORD                                 word1
1874 #define cpn_SHIFT                               16
1875 #define cpn_MASK                                0x000000ff
1876 #define cpn_WORD                                word1
1877         uint32_t word2;
1878 #define if_type_SHIFT                           0
1879 #define if_type_MASK                            0x00000007
1880 #define if_type_WORD                            word2
1881 #define sli_rev_SHIFT                           4
1882 #define sli_rev_MASK                            0x0000000f
1883 #define sli_rev_WORD                            word2
1884 #define sli_family_SHIFT                        8
1885 #define sli_family_MASK                         0x000000ff
1886 #define sli_family_WORD                         word2
1887 #define featurelevel_1_SHIFT                    16
1888 #define featurelevel_1_MASK                     0x000000ff
1889 #define featurelevel_1_WORD                     word2
1890 #define featurelevel_2_SHIFT                    24
1891 #define featurelevel_2_MASK                     0x0000001f
1892 #define featurelevel_2_WORD                     word2
1893         uint32_t word3;
1894 #define fcoe_SHIFT                              0
1895 #define fcoe_MASK                               0x00000001
1896 #define fcoe_WORD                               word3
1897 #define fc_SHIFT                                1
1898 #define fc_MASK                                 0x00000001
1899 #define fc_WORD                                 word3
1900 #define nic_SHIFT                               2
1901 #define nic_MASK                                0x00000001
1902 #define nic_WORD                                word3
1903 #define iscsi_SHIFT                             3
1904 #define iscsi_MASK                              0x00000001
1905 #define iscsi_WORD                              word3
1906 #define rdma_SHIFT                              4
1907 #define rdma_MASK                               0x00000001
1908 #define rdma_WORD                               word3
1909         uint32_t sge_supp_len;
1910 #define SLI4_PAGE_SIZE 4096
1911         uint32_t word5;
1912 #define if_page_sz_SHIFT                        0
1913 #define if_page_sz_MASK                         0x0000ffff
1914 #define if_page_sz_WORD                         word5
1915 #define loopbk_scope_SHIFT                      24
1916 #define loopbk_scope_MASK                       0x0000000f
1917 #define loopbk_scope_WORD                       word5
1918 #define rq_db_window_SHIFT                      28
1919 #define rq_db_window_MASK                       0x0000000f
1920 #define rq_db_window_WORD                       word5
1921         uint32_t word6;
1922 #define eq_pages_SHIFT                          0
1923 #define eq_pages_MASK                           0x0000000f
1924 #define eq_pages_WORD                           word6
1925 #define eqe_size_SHIFT                          8
1926 #define eqe_size_MASK                           0x000000ff
1927 #define eqe_size_WORD                           word6
1928         uint32_t word7;
1929 #define cq_pages_SHIFT                          0
1930 #define cq_pages_MASK                           0x0000000f
1931 #define cq_pages_WORD                           word7
1932 #define cqe_size_SHIFT                          8
1933 #define cqe_size_MASK                           0x000000ff
1934 #define cqe_size_WORD                           word7
1935         uint32_t word8;
1936 #define mq_pages_SHIFT                          0
1937 #define mq_pages_MASK                           0x0000000f
1938 #define mq_pages_WORD                           word8
1939 #define mqe_size_SHIFT                          8
1940 #define mqe_size_MASK                           0x000000ff
1941 #define mqe_size_WORD                           word8
1942 #define mq_elem_cnt_SHIFT                       16
1943 #define mq_elem_cnt_MASK                        0x000000ff
1944 #define mq_elem_cnt_WORD                        word8
1945         uint32_t word9;
1946 #define wq_pages_SHIFT                          0
1947 #define wq_pages_MASK                           0x0000ffff
1948 #define wq_pages_WORD                           word9
1949 #define wqe_size_SHIFT                          8
1950 #define wqe_size_MASK                           0x000000ff
1951 #define wqe_size_WORD                           word9
1952         uint32_t word10;
1953 #define rq_pages_SHIFT                          0
1954 #define rq_pages_MASK                           0x0000ffff
1955 #define rq_pages_WORD                           word10
1956 #define rqe_size_SHIFT                          8
1957 #define rqe_size_MASK                           0x000000ff
1958 #define rqe_size_WORD                           word10
1959         uint32_t word11;
1960 #define hdr_pages_SHIFT                         0
1961 #define hdr_pages_MASK                          0x0000000f
1962 #define hdr_pages_WORD                          word11
1963 #define hdr_size_SHIFT                          8
1964 #define hdr_size_MASK                           0x0000000f
1965 #define hdr_size_WORD                           word11
1966 #define hdr_pp_align_SHIFT                      16
1967 #define hdr_pp_align_MASK                       0x0000ffff
1968 #define hdr_pp_align_WORD                       word11
1969         uint32_t word12;
1970 #define sgl_pages_SHIFT                         0
1971 #define sgl_pages_MASK                          0x0000000f
1972 #define sgl_pages_WORD                          word12
1973 #define sgl_pp_align_SHIFT                      16
1974 #define sgl_pp_align_MASK                       0x0000ffff
1975 #define sgl_pp_align_WORD                       word12
1976         uint32_t rsvd_13_63[51];
1977 };
1978
1979 /* Mailbox Completion Queue Error Messages */
1980 #define MB_CQE_STATUS_SUCCESS                   0x0
1981 #define MB_CQE_STATUS_INSUFFICIENT_PRIVILEGES   0x1
1982 #define MB_CQE_STATUS_INVALID_PARAMETER         0x2
1983 #define MB_CQE_STATUS_INSUFFICIENT_RESOURCES    0x3
1984 #define MB_CEQ_STATUS_QUEUE_FLUSHING            0x4
1985 #define MB_CQE_STATUS_DMA_FAILED                0x5
1986
1987 /* mailbox queue entry structure */
1988 struct lpfc_mqe {
1989         uint32_t word0;
1990 #define lpfc_mqe_status_SHIFT           16
1991 #define lpfc_mqe_status_MASK            0x0000FFFF
1992 #define lpfc_mqe_status_WORD            word0
1993 #define lpfc_mqe_command_SHIFT          8
1994 #define lpfc_mqe_command_MASK           0x000000FF
1995 #define lpfc_mqe_command_WORD           word0
1996         union {
1997                 uint32_t mb_words[LPFC_SLI4_MB_WORD_COUNT - 1];
1998                 /* sli4 mailbox commands */
1999                 struct lpfc_mbx_sli4_config sli4_config;
2000                 struct lpfc_mbx_init_vfi init_vfi;
2001                 struct lpfc_mbx_reg_vfi reg_vfi;
2002                 struct lpfc_mbx_reg_vfi unreg_vfi;
2003                 struct lpfc_mbx_init_vpi init_vpi;
2004                 struct lpfc_mbx_resume_rpi resume_rpi;
2005                 struct lpfc_mbx_read_fcf_tbl read_fcf_tbl;
2006                 struct lpfc_mbx_add_fcf_tbl_entry add_fcf_entry;
2007                 struct lpfc_mbx_del_fcf_tbl_entry del_fcf_entry;
2008                 struct lpfc_mbx_redisc_fcf_tbl redisc_fcf_tbl;
2009                 struct lpfc_mbx_reg_fcfi reg_fcfi;
2010                 struct lpfc_mbx_unreg_fcfi unreg_fcfi;
2011                 struct lpfc_mbx_mq_create mq_create;
2012                 struct lpfc_mbx_mq_create_ext mq_create_ext;
2013                 struct lpfc_mbx_eq_create eq_create;
2014                 struct lpfc_mbx_cq_create cq_create;
2015                 struct lpfc_mbx_wq_create wq_create;
2016                 struct lpfc_mbx_rq_create rq_create;
2017                 struct lpfc_mbx_mq_destroy mq_destroy;
2018                 struct lpfc_mbx_eq_destroy eq_destroy;
2019                 struct lpfc_mbx_cq_destroy cq_destroy;
2020                 struct lpfc_mbx_wq_destroy wq_destroy;
2021                 struct lpfc_mbx_rq_destroy rq_destroy;
2022                 struct lpfc_mbx_post_sgl_pages post_sgl_pages;
2023                 struct lpfc_mbx_nembed_cmd nembed_cmd;
2024                 struct lpfc_mbx_read_rev read_rev;
2025                 struct lpfc_mbx_read_vpi read_vpi;
2026                 struct lpfc_mbx_read_config rd_config;
2027                 struct lpfc_mbx_request_features req_ftrs;
2028                 struct lpfc_mbx_post_hdr_tmpl hdr_tmpl;
2029                 struct lpfc_mbx_query_fw_cfg query_fw_cfg;
2030                 struct lpfc_mbx_supp_pages supp_pages;
2031                 struct lpfc_mbx_sli4_params sli4_params;
2032                 struct lpfc_mbx_nop nop;
2033         } un;
2034 };
2035
2036 struct lpfc_mcqe {
2037         uint32_t word0;
2038 #define lpfc_mcqe_status_SHIFT          0
2039 #define lpfc_mcqe_status_MASK           0x0000FFFF
2040 #define lpfc_mcqe_status_WORD           word0
2041 #define lpfc_mcqe_ext_status_SHIFT      16
2042 #define lpfc_mcqe_ext_status_MASK       0x0000FFFF
2043 #define lpfc_mcqe_ext_status_WORD       word0
2044         uint32_t mcqe_tag0;
2045         uint32_t mcqe_tag1;
2046         uint32_t trailer;
2047 #define lpfc_trailer_valid_SHIFT        31
2048 #define lpfc_trailer_valid_MASK         0x00000001
2049 #define lpfc_trailer_valid_WORD         trailer
2050 #define lpfc_trailer_async_SHIFT        30
2051 #define lpfc_trailer_async_MASK         0x00000001
2052 #define lpfc_trailer_async_WORD         trailer
2053 #define lpfc_trailer_hpi_SHIFT          29
2054 #define lpfc_trailer_hpi_MASK           0x00000001
2055 #define lpfc_trailer_hpi_WORD           trailer
2056 #define lpfc_trailer_completed_SHIFT    28
2057 #define lpfc_trailer_completed_MASK     0x00000001
2058 #define lpfc_trailer_completed_WORD     trailer
2059 #define lpfc_trailer_consumed_SHIFT     27
2060 #define lpfc_trailer_consumed_MASK      0x00000001
2061 #define lpfc_trailer_consumed_WORD      trailer
2062 #define lpfc_trailer_type_SHIFT         16
2063 #define lpfc_trailer_type_MASK          0x000000FF
2064 #define lpfc_trailer_type_WORD          trailer
2065 #define lpfc_trailer_code_SHIFT         8
2066 #define lpfc_trailer_code_MASK          0x000000FF
2067 #define lpfc_trailer_code_WORD          trailer
2068 #define LPFC_TRAILER_CODE_LINK  0x1
2069 #define LPFC_TRAILER_CODE_FCOE  0x2
2070 #define LPFC_TRAILER_CODE_DCBX  0x3
2071 #define LPFC_TRAILER_CODE_GRP5  0x5
2072 };
2073
2074 struct lpfc_acqe_link {
2075         uint32_t word0;
2076 #define lpfc_acqe_link_speed_SHIFT              24
2077 #define lpfc_acqe_link_speed_MASK               0x000000FF
2078 #define lpfc_acqe_link_speed_WORD               word0
2079 #define LPFC_ASYNC_LINK_SPEED_ZERO              0x0
2080 #define LPFC_ASYNC_LINK_SPEED_10MBPS            0x1
2081 #define LPFC_ASYNC_LINK_SPEED_100MBPS           0x2
2082 #define LPFC_ASYNC_LINK_SPEED_1GBPS             0x3
2083 #define LPFC_ASYNC_LINK_SPEED_10GBPS            0x4
2084 #define lpfc_acqe_link_duplex_SHIFT             16
2085 #define lpfc_acqe_link_duplex_MASK              0x000000FF
2086 #define lpfc_acqe_link_duplex_WORD              word0
2087 #define LPFC_ASYNC_LINK_DUPLEX_NONE             0x0
2088 #define LPFC_ASYNC_LINK_DUPLEX_HALF             0x1
2089 #define LPFC_ASYNC_LINK_DUPLEX_FULL             0x2
2090 #define lpfc_acqe_link_status_SHIFT             8
2091 #define lpfc_acqe_link_status_MASK              0x000000FF
2092 #define lpfc_acqe_link_status_WORD              word0
2093 #define LPFC_ASYNC_LINK_STATUS_DOWN             0x0
2094 #define LPFC_ASYNC_LINK_STATUS_UP               0x1
2095 #define LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN     0x2
2096 #define LPFC_ASYNC_LINK_STATUS_LOGICAL_UP       0x3
2097 #define lpfc_acqe_link_physical_SHIFT           0
2098 #define lpfc_acqe_link_physical_MASK            0x000000FF
2099 #define lpfc_acqe_link_physical_WORD            word0
2100 #define LPFC_ASYNC_LINK_PORT_A                  0x0
2101 #define LPFC_ASYNC_LINK_PORT_B                  0x1
2102         uint32_t word1;
2103 #define lpfc_acqe_link_fault_SHIFT      0
2104 #define lpfc_acqe_link_fault_MASK       0x000000FF
2105 #define lpfc_acqe_link_fault_WORD       word1
2106 #define LPFC_ASYNC_LINK_FAULT_NONE      0x0
2107 #define LPFC_ASYNC_LINK_FAULT_LOCAL     0x1
2108 #define LPFC_ASYNC_LINK_FAULT_REMOTE    0x2
2109 #define lpfc_acqe_qos_link_speed_SHIFT  16
2110 #define lpfc_acqe_qos_link_speed_MASK   0x0000FFFF
2111 #define lpfc_acqe_qos_link_speed_WORD   word1
2112         uint32_t event_tag;
2113         uint32_t trailer;
2114 };
2115
2116 struct lpfc_acqe_fcoe {
2117         uint32_t index;
2118         uint32_t word1;
2119 #define lpfc_acqe_fcoe_fcf_count_SHIFT          0
2120 #define lpfc_acqe_fcoe_fcf_count_MASK           0x0000FFFF
2121 #define lpfc_acqe_fcoe_fcf_count_WORD           word1
2122 #define lpfc_acqe_fcoe_event_type_SHIFT         16
2123 #define lpfc_acqe_fcoe_event_type_MASK          0x0000FFFF
2124 #define lpfc_acqe_fcoe_event_type_WORD          word1
2125 #define LPFC_FCOE_EVENT_TYPE_NEW_FCF            0x1
2126 #define LPFC_FCOE_EVENT_TYPE_FCF_TABLE_FULL     0x2
2127 #define LPFC_FCOE_EVENT_TYPE_FCF_DEAD           0x3
2128 #define LPFC_FCOE_EVENT_TYPE_CVL                0x4
2129 #define LPFC_FCOE_EVENT_TYPE_FCF_PARAM_MOD      0x5
2130         uint32_t event_tag;
2131         uint32_t trailer;
2132 };
2133
2134 struct lpfc_acqe_dcbx {
2135         uint32_t tlv_ttl;
2136         uint32_t reserved;
2137         uint32_t event_tag;
2138         uint32_t trailer;
2139 };
2140
2141 struct lpfc_acqe_grp5 {
2142         uint32_t word0;
2143 #define lpfc_acqe_grp5_pport_SHIFT      0
2144 #define lpfc_acqe_grp5_pport_MASK       0x000000FF
2145 #define lpfc_acqe_grp5_pport_WORD       word0
2146         uint32_t word1;
2147 #define lpfc_acqe_grp5_llink_spd_SHIFT  16
2148 #define lpfc_acqe_grp5_llink_spd_MASK   0x0000FFFF
2149 #define lpfc_acqe_grp5_llink_spd_WORD   word1
2150         uint32_t event_tag;
2151         uint32_t trailer;
2152 };
2153
2154 /*
2155  * Define the bootstrap mailbox (bmbx) region used to communicate
2156  * mailbox command between the host and port. The mailbox consists
2157  * of a payload area of 256 bytes and a completion queue of length
2158  * 16 bytes.
2159  */
2160 struct lpfc_bmbx_create {
2161         struct lpfc_mqe mqe;
2162         struct lpfc_mcqe mcqe;
2163 };
2164
2165 #define SGL_ALIGN_SZ 64
2166 #define SGL_PAGE_SIZE 4096
2167 /* align SGL addr on a size boundary - adjust address up */
2168 #define NO_XRI  ((uint16_t)-1)
2169
2170 struct wqe_common {
2171         uint32_t word6;
2172 #define wqe_xri_tag_SHIFT     0
2173 #define wqe_xri_tag_MASK      0x0000FFFF
2174 #define wqe_xri_tag_WORD      word6
2175 #define wqe_ctxt_tag_SHIFT    16
2176 #define wqe_ctxt_tag_MASK     0x0000FFFF
2177 #define wqe_ctxt_tag_WORD     word6
2178         uint32_t word7;
2179 #define wqe_ct_SHIFT          2
2180 #define wqe_ct_MASK           0x00000003
2181 #define wqe_ct_WORD           word7
2182 #define wqe_status_SHIFT      4
2183 #define wqe_status_MASK       0x0000000f
2184 #define wqe_status_WORD       word7
2185 #define wqe_cmnd_SHIFT        8
2186 #define wqe_cmnd_MASK         0x000000ff
2187 #define wqe_cmnd_WORD         word7
2188 #define wqe_class_SHIFT       16
2189 #define wqe_class_MASK        0x00000007
2190 #define wqe_class_WORD        word7
2191 #define wqe_pu_SHIFT          20
2192 #define wqe_pu_MASK           0x00000003
2193 #define wqe_pu_WORD           word7
2194 #define wqe_erp_SHIFT         22
2195 #define wqe_erp_MASK          0x00000001
2196 #define wqe_erp_WORD          word7
2197 #define wqe_lnk_SHIFT         23
2198 #define wqe_lnk_MASK          0x00000001
2199 #define wqe_lnk_WORD          word7
2200 #define wqe_tmo_SHIFT         24
2201 #define wqe_tmo_MASK          0x000000ff
2202 #define wqe_tmo_WORD          word7
2203         uint32_t abort_tag; /* word 8 in WQE */
2204         uint32_t word9;
2205 #define wqe_reqtag_SHIFT      0
2206 #define wqe_reqtag_MASK       0x0000FFFF
2207 #define wqe_reqtag_WORD       word9
2208 #define wqe_rcvoxid_SHIFT     16
2209 #define wqe_rcvoxid_MASK      0x0000FFFF
2210 #define wqe_rcvoxid_WORD      word9
2211         uint32_t word10;
2212 #define wqe_ebde_cnt_SHIFT    0
2213 #define wqe_ebde_cnt_MASK     0x00000007
2214 #define wqe_ebde_cnt_WORD     word10
2215 #define wqe_lenloc_SHIFT      7
2216 #define wqe_lenloc_MASK       0x00000003
2217 #define wqe_lenloc_WORD       word10
2218 #define LPFC_WQE_LENLOC_NONE            0
2219 #define LPFC_WQE_LENLOC_WORD3   1
2220 #define LPFC_WQE_LENLOC_WORD12  2
2221 #define LPFC_WQE_LENLOC_WORD4   3
2222 #define wqe_qosd_SHIFT        9
2223 #define wqe_qosd_MASK         0x00000001
2224 #define wqe_qosd_WORD         word10
2225 #define wqe_xbl_SHIFT         11
2226 #define wqe_xbl_MASK          0x00000001
2227 #define wqe_xbl_WORD          word10
2228 #define wqe_iod_SHIFT         13
2229 #define wqe_iod_MASK          0x00000001
2230 #define wqe_iod_WORD          word10
2231 #define LPFC_WQE_IOD_WRITE      0
2232 #define LPFC_WQE_IOD_READ       1
2233 #define wqe_dbde_SHIFT        14
2234 #define wqe_dbde_MASK         0x00000001
2235 #define wqe_dbde_WORD         word10
2236 #define wqe_wqes_SHIFT        15
2237 #define wqe_wqes_MASK         0x00000001
2238 #define wqe_wqes_WORD         word10
2239 #define wqe_pri_SHIFT         16
2240 #define wqe_pri_MASK          0x00000007
2241 #define wqe_pri_WORD          word10
2242 #define wqe_pv_SHIFT          19
2243 #define wqe_pv_MASK           0x00000001
2244 #define wqe_pv_WORD           word10
2245 #define wqe_xc_SHIFT          21
2246 #define wqe_xc_MASK           0x00000001
2247 #define wqe_xc_WORD           word10
2248 #define wqe_ccpe_SHIFT        23
2249 #define wqe_ccpe_MASK         0x00000001
2250 #define wqe_ccpe_WORD         word10
2251 #define wqe_ccp_SHIFT         24
2252 #define wqe_ccp_MASK          0x000000ff
2253 #define wqe_ccp_WORD          word10
2254         uint32_t word11;
2255 #define wqe_cmd_type_SHIFT    0
2256 #define wqe_cmd_type_MASK     0x0000000f
2257 #define wqe_cmd_type_WORD     word11
2258 #define wqe_els_id_SHIFT      4
2259 #define wqe_els_id_MASK       0x00000003
2260 #define wqe_els_id_WORD       word11
2261 #define LPFC_ELS_ID_FLOGI       3
2262 #define LPFC_ELS_ID_FDISC       2
2263 #define LPFC_ELS_ID_LOGO        1
2264 #define LPFC_ELS_ID_DEFAULT     0
2265 #define wqe_wqec_SHIFT        7
2266 #define wqe_wqec_MASK         0x00000001
2267 #define wqe_wqec_WORD         word11
2268 #define wqe_cqid_SHIFT        16
2269 #define wqe_cqid_MASK         0x0000ffff
2270 #define wqe_cqid_WORD         word11
2271 #define LPFC_WQE_CQ_ID_DEFAULT  0xffff
2272 };
2273
2274 struct wqe_did {
2275         uint32_t word5;
2276 #define wqe_els_did_SHIFT         0
2277 #define wqe_els_did_MASK          0x00FFFFFF
2278 #define wqe_els_did_WORD          word5
2279 #define wqe_xmit_bls_pt_SHIFT         28
2280 #define wqe_xmit_bls_pt_MASK          0x00000003
2281 #define wqe_xmit_bls_pt_WORD          word5
2282 #define wqe_xmit_bls_ar_SHIFT         30
2283 #define wqe_xmit_bls_ar_MASK          0x00000001
2284 #define wqe_xmit_bls_ar_WORD          word5
2285 #define wqe_xmit_bls_xo_SHIFT         31
2286 #define wqe_xmit_bls_xo_MASK          0x00000001
2287 #define wqe_xmit_bls_xo_WORD          word5
2288 };
2289
2290 struct lpfc_wqe_generic{
2291         struct ulp_bde64 bde;
2292         uint32_t word3;
2293         uint32_t word4;
2294         uint32_t word5;
2295         struct wqe_common wqe_com;
2296         uint32_t payload[4];
2297 };
2298
2299 struct els_request64_wqe {
2300         struct ulp_bde64 bde;
2301         uint32_t payload_len;
2302         uint32_t word4;
2303 #define els_req64_sid_SHIFT         0
2304 #define els_req64_sid_MASK          0x00FFFFFF
2305 #define els_req64_sid_WORD          word4
2306 #define els_req64_sp_SHIFT          24
2307 #define els_req64_sp_MASK           0x00000001
2308 #define els_req64_sp_WORD           word4
2309 #define els_req64_vf_SHIFT          25
2310 #define els_req64_vf_MASK           0x00000001
2311 #define els_req64_vf_WORD           word4
2312         struct wqe_did  wqe_dest;
2313         struct wqe_common wqe_com; /* words 6-11 */
2314         uint32_t word12;
2315 #define els_req64_vfid_SHIFT        1
2316 #define els_req64_vfid_MASK         0x00000FFF
2317 #define els_req64_vfid_WORD         word12
2318 #define els_req64_pri_SHIFT         13
2319 #define els_req64_pri_MASK          0x00000007
2320 #define els_req64_pri_WORD          word12
2321         uint32_t word13;
2322 #define els_req64_hopcnt_SHIFT      24
2323 #define els_req64_hopcnt_MASK       0x000000ff
2324 #define els_req64_hopcnt_WORD       word13
2325         uint32_t reserved[2];
2326 };
2327
2328 struct xmit_els_rsp64_wqe {
2329         struct ulp_bde64 bde;
2330         uint32_t response_payload_len;
2331         uint32_t rsvd4;
2332         struct wqe_did wqe_dest;
2333         struct wqe_common wqe_com; /* words 6-11 */
2334         uint32_t rsvd_12_15[4];
2335 };
2336
2337 struct xmit_bls_rsp64_wqe {
2338         uint32_t payload0;
2339 /* Payload0 for BA_ACC */
2340 #define xmit_bls_rsp64_acc_seq_id_SHIFT        16
2341 #define xmit_bls_rsp64_acc_seq_id_MASK         0x000000ff
2342 #define xmit_bls_rsp64_acc_seq_id_WORD         payload0
2343 #define xmit_bls_rsp64_acc_seq_id_vald_SHIFT   24
2344 #define xmit_bls_rsp64_acc_seq_id_vald_MASK    0x000000ff
2345 #define xmit_bls_rsp64_acc_seq_id_vald_WORD    payload0
2346 /* Payload0 for BA_RJT */
2347 #define xmit_bls_rsp64_rjt_vspec_SHIFT   0
2348 #define xmit_bls_rsp64_rjt_vspec_MASK    0x000000ff
2349 #define xmit_bls_rsp64_rjt_vspec_WORD    payload0
2350 #define xmit_bls_rsp64_rjt_expc_SHIFT    8
2351 #define xmit_bls_rsp64_rjt_expc_MASK     0x000000ff
2352 #define xmit_bls_rsp64_rjt_expc_WORD     payload0
2353 #define xmit_bls_rsp64_rjt_rsnc_SHIFT    16
2354 #define xmit_bls_rsp64_rjt_rsnc_MASK     0x000000ff
2355 #define xmit_bls_rsp64_rjt_rsnc_WORD     payload0
2356         uint32_t word1;
2357 #define xmit_bls_rsp64_rxid_SHIFT  0
2358 #define xmit_bls_rsp64_rxid_MASK   0x0000ffff
2359 #define xmit_bls_rsp64_rxid_WORD   word1
2360 #define xmit_bls_rsp64_oxid_SHIFT  16
2361 #define xmit_bls_rsp64_oxid_MASK   0x0000ffff
2362 #define xmit_bls_rsp64_oxid_WORD   word1
2363         uint32_t word2;
2364 #define xmit_bls_rsp64_seqcnthi_SHIFT  0
2365 #define xmit_bls_rsp64_seqcnthi_MASK   0x0000ffff
2366 #define xmit_bls_rsp64_seqcnthi_WORD   word2
2367 #define xmit_bls_rsp64_seqcntlo_SHIFT  16
2368 #define xmit_bls_rsp64_seqcntlo_MASK   0x0000ffff
2369 #define xmit_bls_rsp64_seqcntlo_WORD   word2
2370         uint32_t rsrvd3;
2371         uint32_t rsrvd4;
2372         struct wqe_did  wqe_dest;
2373         struct wqe_common wqe_com; /* words 6-11 */
2374         uint32_t rsvd_12_15[4];
2375 };
2376
2377 struct wqe_rctl_dfctl {
2378         uint32_t word5;
2379 #define wqe_si_SHIFT 2
2380 #define wqe_si_MASK  0x000000001
2381 #define wqe_si_WORD  word5
2382 #define wqe_la_SHIFT 3
2383 #define wqe_la_MASK  0x000000001
2384 #define wqe_la_WORD  word5
2385 #define wqe_ls_SHIFT 7
2386 #define wqe_ls_MASK  0x000000001
2387 #define wqe_ls_WORD  word5
2388 #define wqe_dfctl_SHIFT 8
2389 #define wqe_dfctl_MASK  0x0000000ff
2390 #define wqe_dfctl_WORD  word5
2391 #define wqe_type_SHIFT 16
2392 #define wqe_type_MASK  0x0000000ff
2393 #define wqe_type_WORD  word5
2394 #define wqe_rctl_SHIFT 24
2395 #define wqe_rctl_MASK  0x0000000ff
2396 #define wqe_rctl_WORD  word5
2397 };
2398
2399 struct xmit_seq64_wqe {
2400         struct ulp_bde64 bde;
2401         uint32_t rsvd3;
2402         uint32_t relative_offset;
2403         struct wqe_rctl_dfctl wge_ctl;
2404         struct wqe_common wqe_com; /* words 6-11 */
2405         /* Note: word10 different REVISIT */
2406         uint32_t xmit_len;
2407         uint32_t rsvd_12_15[3];
2408 };
2409 struct xmit_bcast64_wqe {
2410         struct ulp_bde64 bde;
2411         uint32_t seq_payload_len;
2412         uint32_t rsvd4;
2413         struct wqe_rctl_dfctl wge_ctl; /* word 5 */
2414         struct wqe_common wqe_com;     /* words 6-11 */
2415         uint32_t rsvd_12_15[4];
2416 };
2417
2418 struct gen_req64_wqe {
2419         struct ulp_bde64 bde;
2420         uint32_t request_payload_len;
2421         uint32_t relative_offset;
2422         struct wqe_rctl_dfctl wge_ctl; /* word 5 */
2423         struct wqe_common wqe_com;     /* words 6-11 */
2424         uint32_t rsvd_12_15[4];
2425 };
2426
2427 struct create_xri_wqe {
2428         uint32_t rsrvd[5];           /* words 0-4 */
2429         struct wqe_did  wqe_dest;  /* word 5 */
2430         struct wqe_common wqe_com; /* words 6-11 */
2431         uint32_t rsvd_12_15[4];         /* word 12-15 */
2432 };
2433
2434 #define T_REQUEST_TAG 3
2435 #define T_XRI_TAG 1
2436
2437 struct abort_cmd_wqe {
2438         uint32_t rsrvd[3];
2439         uint32_t word3;
2440 #define abort_cmd_ia_SHIFT  0
2441 #define abort_cmd_ia_MASK  0x000000001
2442 #define abort_cmd_ia_WORD  word3
2443 #define abort_cmd_criteria_SHIFT  8
2444 #define abort_cmd_criteria_MASK  0x0000000ff
2445 #define abort_cmd_criteria_WORD  word3
2446         uint32_t rsrvd4;
2447         uint32_t rsrvd5;
2448         struct wqe_common wqe_com;     /* words 6-11 */
2449         uint32_t rsvd_12_15[4];         /* word 12-15 */
2450 };
2451
2452 struct fcp_iwrite64_wqe {
2453         struct ulp_bde64 bde;
2454         uint32_t payload_offset_len;
2455         uint32_t total_xfer_len;
2456         uint32_t initial_xfer_len;
2457         struct wqe_common wqe_com;     /* words 6-11 */
2458         uint32_t rsvd_12_15[4];         /* word 12-15 */
2459 };
2460
2461 struct fcp_iread64_wqe {
2462         struct ulp_bde64 bde;
2463         uint32_t payload_offset_len;   /* word 3 */
2464         uint32_t total_xfer_len;       /* word 4 */
2465         uint32_t rsrvd5;               /* word 5 */
2466         struct wqe_common wqe_com;     /* words 6-11 */
2467         uint32_t rsvd_12_15[4];         /* word 12-15 */
2468 };
2469
2470 struct fcp_icmnd64_wqe {
2471         struct ulp_bde64 bde;          /* words 0-2 */
2472         uint32_t rsrvd3;               /* word 3 */
2473         uint32_t rsrvd4;               /* word 4 */
2474         uint32_t rsrvd5;               /* word 5 */
2475         struct wqe_common wqe_com;     /* words 6-11 */
2476         uint32_t rsvd_12_15[4];        /* word 12-15 */
2477 };
2478
2479
2480 union lpfc_wqe {
2481         uint32_t words[16];
2482         struct lpfc_wqe_generic generic;
2483         struct fcp_icmnd64_wqe fcp_icmd;
2484         struct fcp_iread64_wqe fcp_iread;
2485         struct fcp_iwrite64_wqe fcp_iwrite;
2486         struct abort_cmd_wqe abort_cmd;
2487         struct create_xri_wqe create_xri;
2488         struct xmit_bcast64_wqe xmit_bcast64;
2489         struct xmit_seq64_wqe xmit_sequence;
2490         struct xmit_bls_rsp64_wqe xmit_bls_rsp;
2491         struct xmit_els_rsp64_wqe xmit_els_rsp;
2492         struct els_request64_wqe els_req;
2493         struct gen_req64_wqe gen_req;
2494 };
2495
2496 #define FCP_COMMAND 0x0
2497 #define FCP_COMMAND_DATA_OUT 0x1
2498 #define ELS_COMMAND_NON_FIP 0xC
2499 #define ELS_COMMAND_FIP 0xD
2500 #define OTHER_COMMAND 0x8
2501