drivers/net/wireless/rtl818x/rtl8180_dev.c

   1
   2 /*
   3  * Linux device driver for RTL8180 / RTL8185
   4  *
   5  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   6  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   7  *
   8  * Based on the r8180 driver, which is:
   9  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  10  *
  11  * Thanks to Realtek for their support!
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License version 2 as
  15  * published by the Free Software Foundation.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/pci.h>
  20 #include <linux/slab.h>
  21 #include <linux/delay.h>
  22 #include <linux/etherdevice.h>
  23 #include <linux/eeprom_93cx6.h>
  24 #include <net/mac80211.h>
  25
  26 #include "rtl8180.h"
  27 #include "rtl8180_rtl8225.h"
  28 #include "rtl8180_sa2400.h"
  29 #include "rtl8180_max2820.h"
  30 #include "rtl8180_grf5101.h"
  31
  32 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  33 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  34 MODULE_DESCRIPTION("RTL8180 / RTL8185 PCI wireless driver");
  35 MODULE_LICENSE("GPL");
  36
  37 static DEFINE_PCI_DEVICE_TABLE(rtl8180_table) = {
  38         /* rtl8185 */
  39         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) },
  40         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x700f) },
  41         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x701f) },
  42
  43         /* rtl8180 */
  44         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8180) },
  45         { PCI_DEVICE(0x1799, 0x6001) },
  46         { PCI_DEVICE(0x1799, 0x6020) },
  47         { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x3300) },
  48         { }
  49 };
  50
  51 MODULE_DEVICE_TABLE(pci, rtl8180_table);
  52
  53 static const struct ieee80211_rate rtl818x_rates[] = {
  54         { .bitrate = 10, .hw_value = 0, },
  55         { .bitrate = 20, .hw_value = 1, },
  56         { .bitrate = 55, .hw_value = 2, },
  57         { .bitrate = 110, .hw_value = 3, },
  58         { .bitrate = 60, .hw_value = 4, },
  59         { .bitrate = 90, .hw_value = 5, },
  60         { .bitrate = 120, .hw_value = 6, },
  61         { .bitrate = 180, .hw_value = 7, },
  62         { .bitrate = 240, .hw_value = 8, },
  63         { .bitrate = 360, .hw_value = 9, },
  64         { .bitrate = 480, .hw_value = 10, },
  65         { .bitrate = 540, .hw_value = 11, },
  66 };
  67
  68 static const struct ieee80211_channel rtl818x_channels[] = {
  69         { .center_freq = 2412 },
  70         { .center_freq = 2417 },
  71         { .center_freq = 2422 },
  72         { .center_freq = 2427 },
  73         { .center_freq = 2432 },
  74         { .center_freq = 2437 },
  75         { .center_freq = 2442 },
  76         { .center_freq = 2447 },
  77         { .center_freq = 2452 },
  78         { .center_freq = 2457 },
  79         { .center_freq = 2462 },
  80         { .center_freq = 2467 },
  81         { .center_freq = 2472 },
  82         { .center_freq = 2484 },
  83 };
  84
  85
  86 void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  87 {
  88         struct rtl8180_priv *priv = dev->priv;
  89         int i = 10;
  90         u32 buf;
  91
  92         buf = (data << 8) | addr;
  93
  94         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf | 0x80);
  95         while (i--) {
  96                 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf);
  97                 if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF))
  98                         return;
  99         }
 100 }
 101
 102 static void rtl8180_handle_rx(struct ieee80211_hw *dev)
 103 {
 104         struct rtl8180_priv *priv = dev->priv;
 105         unsigned int count = 32;
 106         u8 signal;
 107
 108         while (count--) {
 109                 struct rtl8180_rx_desc *entry = &priv->rx_ring[priv->rx_idx];
 110                 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];
 111                 u32 flags = le32_to_cpu(entry->flags);
 112
 113                 if (flags & RTL818X_RX_DESC_FLAG_OWN)
 114                         return;
 115
 116                 if (unlikely(flags & (RTL818X_RX_DESC_FLAG_DMA_FAIL |
 117                                       RTL818X_RX_DESC_FLAG_FOF |
 118                                       RTL818X_RX_DESC_FLAG_RX_ERR)))
 119                         goto done;
 120                 else {
 121                         u32 flags2 = le32_to_cpu(entry->flags2);
 122                         struct ieee80211_rx_status rx_status = {0};
 123                         struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_SIZE);
 124
 125                         if (unlikely(!new_skb))
 126                                 goto done;
 127
 128                         pci_unmap_single(priv->pdev,
 129                                          *((dma_addr_t *)skb->cb),
 130                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 131                         skb_put(skb, flags & 0xFFF);
 132
 133                         rx_status.antenna = (flags2 >> 15) & 1;
 134                         rx_status.rate_idx = (flags >> 20) & 0xF;
 135                         /* TODO: improve signal/rssi reporting for !rtl8185 */
 136                         signal = (flags2 >> 17) & 0x7F;
 137                         if (rx_status.rate_idx > 3)
 138                                 signal = 90 - clamp_t(u8, signal, 25, 90);
 139                         else
 140                                 signal = 95 - clamp_t(u8, signal, 30, 95);
 141                         rx_status.signal = signal;
 142                         rx_status.freq = dev->conf.channel->center_freq;
 143                         rx_status.band = dev->conf.channel->band;
 144                         rx_status.mactime = le64_to_cpu(entry->tsft);
 145                         rx_status.flag |= RX_FLAG_TSFT;
 146                         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
 147                                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 148
 149                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
 150                         ieee80211_rx_irqsafe(dev, skb);
 151
 152                         skb = new_skb;
 153                         priv->rx_buf[priv->rx_idx] = skb;
 154                         *((dma_addr_t *) skb->cb) =
 155                                 pci_map_single(priv->pdev, skb_tail_pointer(skb),
 156                                                MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 157                 }
 158
 159         done:
 160                 entry->rx_buf = cpu_to_le32(*((dma_addr_t *)skb->cb));
 161                 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
 162                                            MAX_RX_SIZE);
 163                 if (priv->rx_idx == 31)
 164                         entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
 165                 priv->rx_idx = (priv->rx_idx + 1) % 32;
 166         }
 167 }
 168
 169 static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio)
 170 {
 171         struct rtl8180_priv *priv = dev->priv;
 172         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 173
 174         while (skb_queue_len(&ring->queue)) {
 175                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 176                 struct sk_buff *skb;
 177                 struct ieee80211_tx_info *info;
 178                 u32 flags = le32_to_cpu(entry->flags);
 179
 180                 if (flags & RTL818X_TX_DESC_FLAG_OWN)
 181                         return;
 182
 183                 ring->idx = (ring->idx + 1) % ring->entries;
 184                 skb = __skb_dequeue(&ring->queue);
 185                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 186                                  skb->len, PCI_DMA_TODEVICE);
 187
 188                 info = IEEE80211_SKB_CB(skb);
 189                 ieee80211_tx_info_clear_status(info);
 190
 191                 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
 192                     (flags & RTL818X_TX_DESC_FLAG_TX_OK))
 193                         info->flags |= IEEE80211_TX_STAT_ACK;
 194
 195                 info->status.rates[0].count = (flags & 0xFF) + 1;
 196                 info->status.rates[1].idx = -1;
 197
 198                 ieee80211_tx_status_irqsafe(dev, skb);
 199                 if (ring->entries - skb_queue_len(&ring->queue) == 2)
 200                         ieee80211_wake_queue(dev, prio);
 201         }
 202 }
 203
 204 static irqreturn_t rtl8180_interrupt(int irq, void *dev_id)
 205 {
 206         struct ieee80211_hw *dev = dev_id;
 207         struct rtl8180_priv *priv = dev->priv;
 208         u16 reg;
 209
 210         spin_lock(&priv->lock);
 211         reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS);
 212         if (unlikely(reg == 0xFFFF)) {
 213                 spin_unlock(&priv->lock);
 214                 return IRQ_HANDLED;
 215         }
 216
 217         rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg);
 218
 219         if (reg & (RTL818X_INT_TXB_OK | RTL818X_INT_TXB_ERR))
 220                 rtl8180_handle_tx(dev, 3);
 221
 222         if (reg & (RTL818X_INT_TXH_OK | RTL818X_INT_TXH_ERR))
 223                 rtl8180_handle_tx(dev, 2);
 224
 225         if (reg & (RTL818X_INT_TXN_OK | RTL818X_INT_TXN_ERR))
 226                 rtl8180_handle_tx(dev, 1);
 227
 228         if (reg & (RTL818X_INT_TXL_OK | RTL818X_INT_TXL_ERR))
 229                 rtl8180_handle_tx(dev, 0);
 230
 231         if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR))
 232                 rtl8180_handle_rx(dev);
 233
 234         spin_unlock(&priv->lock);
 235
 236         return IRQ_HANDLED;
 237 }
 238
 239 static int rtl8180_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 240 {
 241         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 242         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
 243         struct rtl8180_priv *priv = dev->priv;
 244         struct rtl8180_tx_ring *ring;
 245         struct rtl8180_tx_desc *entry;
 246         unsigned long flags;
 247         unsigned int idx, prio;
 248         dma_addr_t mapping;
 249         u32 tx_flags;
 250         u8 rc_flags;
 251         u16 plcp_len = 0;
 252         __le16 rts_duration = 0;
 253
 254         prio = skb_get_queue_mapping(skb);
 255         ring = &priv->tx_ring[prio];
 256
 257         mapping = pci_map_single(priv->pdev, skb->data,
 258                                  skb->len, PCI_DMA_TODEVICE);
 259
 260         tx_flags = RTL818X_TX_DESC_FLAG_OWN | RTL818X_TX_DESC_FLAG_FS |
 261                    RTL818X_TX_DESC_FLAG_LS |
 262                    (ieee80211_get_tx_rate(dev, info)->hw_value << 24) |
 263                    skb->len;
 264
 265         if (priv->r8185)
 266                 tx_flags |= RTL818X_TX_DESC_FLAG_DMA |
 267                             RTL818X_TX_DESC_FLAG_NO_ENC;
 268
 269         rc_flags = info->control.rates[0].flags;
 270         if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 271                 tx_flags |= RTL818X_TX_DESC_FLAG_RTS;
 272                 tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 273         } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 274                 tx_flags |= RTL818X_TX_DESC_FLAG_CTS;
 275                 tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 276         }
 277
 278         if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
 279                 rts_duration = ieee80211_rts_duration(dev, priv->vif, skb->len,
 280                                                       info);
 281
 282         if (!priv->r8185) {
 283                 unsigned int remainder;
 284
 285                 plcp_len = DIV_ROUND_UP(16 * (skb->len + 4),
 286                                 (ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10);
 287                 remainder = (16 * (skb->len + 4)) %
 288                             ((ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10);
 289                 if (remainder <= 6)
 290                         plcp_len |= 1 << 15;
 291         }
 292
 293         spin_lock_irqsave(&priv->lock, flags);
 294
 295         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
 296                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
 297                         priv->seqno += 0x10;
 298                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
 299                 hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
 300         }
 301
 302         idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
 303         entry = &ring->desc[idx];
 304
 305         entry->rts_duration = rts_duration;
 306         entry->plcp_len = cpu_to_le16(plcp_len);
 307         entry->tx_buf = cpu_to_le32(mapping);
 308         entry->frame_len = cpu_to_le32(skb->len);
 309         entry->flags2 = info->control.rates[1].idx >= 0 ?
 310                 ieee80211_get_alt_retry_rate(dev, info, 0)->bitrate << 4 : 0;
 311         entry->retry_limit = info->control.rates[0].count;
 312         entry->flags = cpu_to_le32(tx_flags);
 313         __skb_queue_tail(&ring->queue, skb);
 314         if (ring->entries - skb_queue_len(&ring->queue) < 2)
 315                 ieee80211_stop_queue(dev, prio);
 316
 317         spin_unlock_irqrestore(&priv->lock, flags);
 318
 319         rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING, (1 << (prio + 4)));
 320
 321         return 0;
 322 }
 323
 324 void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
 325 {
 326         u8 reg;
 327
 328         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 329         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 330         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 331                  reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 332         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
 333         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 334                  reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 335         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 336 }
 337
 338 static int rtl8180_init_hw(struct ieee80211_hw *dev)
 339 {
 340         struct rtl8180_priv *priv = dev->priv;
 341         u16 reg;
 342
 343         rtl818x_iowrite8(priv, &priv->map->CMD, 0);
 344         rtl818x_ioread8(priv, &priv->map->CMD);
 345         msleep(10);
 346
 347         /* reset */
 348         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 349         rtl818x_ioread8(priv, &priv->map->CMD);
 350
 351         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 352         reg &= (1 << 1);
 353         reg |= RTL818X_CMD_RESET;
 354         rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET);
 355         rtl818x_ioread8(priv, &priv->map->CMD);
 356         msleep(200);
 357
 358         /* check success of reset */
 359         if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) {
 360                 printk(KERN_ERR "%s: reset timeout!\n", wiphy_name(dev->wiphy));
 361                 return -ETIMEDOUT;
 362         }
 363
 364         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 365         rtl818x_ioread8(priv, &priv->map->CMD);
 366         msleep(200);
 367
 368         if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) {
 369                 /* For cardbus */
 370                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 371                 reg |= 1 << 1;
 372                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 373                 reg = rtl818x_ioread16(priv, &priv->map->FEMR);
 374                 reg |= (1 << 15) | (1 << 14) | (1 << 4);
 375                 rtl818x_iowrite16(priv, &priv->map->FEMR, reg);
 376         }
 377
 378         rtl818x_iowrite8(priv, &priv->map->MSR, 0);
 379
 380         if (!priv->r8185)
 381                 rtl8180_set_anaparam(priv, priv->anaparam);
 382
 383         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 384         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 385         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 386         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 387         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 388
 389         /* TODO: necessary? specs indicate not */
 390         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 391         reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 392         rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3));
 393         if (priv->r8185) {
 394                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 395                 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4));
 396         }
 397         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 398
 399         /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */
 400
 401         /* TODO: turn off hw wep on rtl8180 */
 402
 403         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 404
 405         if (priv->r8185) {
 406                 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 407                 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
 408                 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 409
 410                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 411
 412                 /* TODO: set ClkRun enable? necessary? */
 413                 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
 414                 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
 415                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 416                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 417                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
 418                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 419         } else {
 420                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x1);
 421                 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
 422
 423                 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
 424                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
 425         }
 426
 427         priv->rf->init(dev);
 428         if (priv->r8185)
 429                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 430         return 0;
 431 }
 432
 433 static int rtl8180_init_rx_ring(struct ieee80211_hw *dev)
 434 {
 435         struct rtl8180_priv *priv = dev->priv;
 436         struct rtl8180_rx_desc *entry;
 437         int i;
 438
 439         priv->rx_ring = pci_alloc_consistent(priv->pdev,
 440                                              sizeof(*priv->rx_ring) * 32,
 441                                              &priv->rx_ring_dma);
 442
 443         if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
 444                 printk(KERN_ERR "%s: Cannot allocate RX ring\n",
 445                        wiphy_name(dev->wiphy));
 446                 return -ENOMEM;
 447         }
 448
 449         memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * 32);
 450         priv->rx_idx = 0;
 451
 452         for (i = 0; i < 32; i++) {
 453                 struct sk_buff *skb = dev_alloc_skb(MAX_RX_SIZE);
 454                 dma_addr_t *mapping;
 455                 entry = &priv->rx_ring[i];
 456                 if (!skb)
 457                         return 0;
 458
 459                 priv->rx_buf[i] = skb;
 460                 mapping = (dma_addr_t *)skb->cb;
 461                 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
 462                                           MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 463                 entry->rx_buf = cpu_to_le32(*mapping);
 464                 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
 465                                            MAX_RX_SIZE);
 466         }
 467         entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
 468         return 0;
 469 }
 470
 471 static void rtl8180_free_rx_ring(struct ieee80211_hw *dev)
 472 {
 473         struct rtl8180_priv *priv = dev->priv;
 474         int i;
 475
 476         for (i = 0; i < 32; i++) {
 477                 struct sk_buff *skb = priv->rx_buf[i];
 478                 if (!skb)
 479                         continue;
 480
 481                 pci_unmap_single(priv->pdev,
 482                                  *((dma_addr_t *)skb->cb),
 483                                  MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 484                 kfree_skb(skb);
 485         }
 486
 487         pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * 32,
 488                             priv->rx_ring, priv->rx_ring_dma);
 489         priv->rx_ring = NULL;
 490 }
 491
 492 static int rtl8180_init_tx_ring(struct ieee80211_hw *dev,
 493                                 unsigned int prio, unsigned int entries)
 494 {
 495         struct rtl8180_priv *priv = dev->priv;
 496         struct rtl8180_tx_desc *ring;
 497         dma_addr_t dma;
 498         int i;
 499
 500         ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
 501         if (!ring || (unsigned long)ring & 0xFF) {
 502                 printk(KERN_ERR "%s: Cannot allocate TX ring (prio = %d)\n",
 503                        wiphy_name(dev->wiphy), prio);
 504                 return -ENOMEM;
 505         }
 506
 507         memset(ring, 0, sizeof(*ring)*entries);
 508         priv->tx_ring[prio].desc = ring;
 509         priv->tx_ring[prio].dma = dma;
 510         priv->tx_ring[prio].idx = 0;
 511         priv->tx_ring[prio].entries = entries;
 512         skb_queue_head_init(&priv->tx_ring[prio].queue);
 513
 514         for (i = 0; i < entries; i++)
 515                 ring[i].next_tx_desc =
 516                         cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
 517
 518         return 0;
 519 }
 520
 521 static void rtl8180_free_tx_ring(struct ieee80211_hw *dev, unsigned int prio)
 522 {
 523         struct rtl8180_priv *priv = dev->priv;
 524         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 525
 526         while (skb_queue_len(&ring->queue)) {
 527                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 528                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
 529
 530                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 531                                  skb->len, PCI_DMA_TODEVICE);
 532                 kfree_skb(skb);
 533                 ring->idx = (ring->idx + 1) % ring->entries;
 534         }
 535
 536         pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
 537                             ring->desc, ring->dma);
 538         ring->desc = NULL;
 539 }
 540
 541 static int rtl8180_start(struct ieee80211_hw *dev)
 542 {
 543         struct rtl8180_priv *priv = dev->priv;
 544         int ret, i;
 545         u32 reg;
 546
 547         ret = rtl8180_init_rx_ring(dev);
 548         if (ret)
 549                 return ret;
 550
 551         for (i = 0; i < 4; i++)
 552                 if ((ret = rtl8180_init_tx_ring(dev, i, 16)))
 553                         goto err_free_rings;
 554
 555         ret = rtl8180_init_hw(dev);
 556         if (ret)
 557                 goto err_free_rings;
 558
 559         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 560         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 561         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 562         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 563         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 564
 565         ret = request_irq(priv->pdev->irq, rtl8180_interrupt,
 566                           IRQF_SHARED, KBUILD_MODNAME, dev);
 567         if (ret) {
 568                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 569                        wiphy_name(dev->wiphy));
 570                 goto err_free_rings;
 571         }
 572
 573         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 574
 575         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 576         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 577
 578         reg = RTL818X_RX_CONF_ONLYERLPKT |
 579               RTL818X_RX_CONF_RX_AUTORESETPHY |
 580               RTL818X_RX_CONF_MGMT |
 581               RTL818X_RX_CONF_DATA |
 582               (7 << 8 /* MAX RX DMA */) |
 583               RTL818X_RX_CONF_BROADCAST |
 584               RTL818X_RX_CONF_NICMAC;
 585
 586         if (priv->r8185)
 587                 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
 588         else {
 589                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
 590                         ? RTL818X_RX_CONF_CSDM1 : 0;
 591                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
 592                         ? RTL818X_RX_CONF_CSDM2 : 0;
 593         }
 594
 595         priv->rx_conf = reg;
 596         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 597
 598         if (priv->r8185) {
 599                 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 600                 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 601                 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 602                 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 603
 604                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 605                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 606                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 607                 reg |=  RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 608                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 609
 610                 /* disable early TX */
 611                 rtl818x_iowrite8(priv, (u8 __iomem *)priv->map + 0xec, 0x3f);
 612         }
 613
 614         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 615         reg |= (6 << 21 /* MAX TX DMA */) |
 616                RTL818X_TX_CONF_NO_ICV;
 617
 618         if (priv->r8185)
 619                 reg &= ~RTL818X_TX_CONF_PROBE_DTS;
 620         else
 621                 reg &= ~RTL818X_TX_CONF_HW_SEQNUM;
 622
 623         /* different meaning, same value on both rtl8185 and rtl8180 */
 624         reg &= ~RTL818X_TX_CONF_SAT_HWPLCP;
 625
 626         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 627
 628         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 629         reg |= RTL818X_CMD_RX_ENABLE;
 630         reg |= RTL818X_CMD_TX_ENABLE;
 631         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 632
 633         return 0;
 634
 635  err_free_rings:
 636         rtl8180_free_rx_ring(dev);
 637         for (i = 0; i < 4; i++)
 638                 if (priv->tx_ring[i].desc)
 639                         rtl8180_free_tx_ring(dev, i);
 640
 641         return ret;
 642 }
 643
 644 static void rtl8180_stop(struct ieee80211_hw *dev)
 645 {
 646         struct rtl8180_priv *priv = dev->priv;
 647         u8 reg;
 648         int i;
 649
 650         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 651
 652         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 653         reg &= ~RTL818X_CMD_TX_ENABLE;
 654         reg &= ~RTL818X_CMD_RX_ENABLE;
 655         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 656
 657         priv->rf->stop(dev);
 658
 659         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 660         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
 661         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
 662         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 663
 664         free_irq(priv->pdev->irq, dev);
 665
 666         rtl8180_free_rx_ring(dev);
 667         for (i = 0; i < 4; i++)
 668                 rtl8180_free_tx_ring(dev, i);
 669 }
 670
 671 static u64 rtl8180_get_tsf(struct ieee80211_hw *dev)
 672 {
 673         struct rtl8180_priv *priv = dev->priv;
 674
 675         return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
 676                (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
 677 }
 678
 679 static void rtl8180_beacon_work(struct work_struct *work)
 680 {
 681         struct rtl8180_vif *vif_priv =
 682                 container_of(work, struct rtl8180_vif, beacon_work.work);
 683         struct ieee80211_vif *vif =
 684                 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv);
 685         struct ieee80211_hw *dev = vif_priv->dev;
 686         struct ieee80211_mgmt *mgmt;
 687         struct sk_buff *skb;
 688         int err = 0;
 689
 690         /* don't overflow the tx ring */
 691         if (ieee80211_queue_stopped(dev, 0))
 692                 goto resched;
 693
 694         /* grab a fresh beacon */
 695         skb = ieee80211_beacon_get(dev, vif);
 696
 697         /*
 698          * update beacon timestamp w/ TSF value
 699          * TODO: make hardware update beacon timestamp
 700          */
 701         mgmt = (struct ieee80211_mgmt *)skb->data;
 702         mgmt->u.beacon.timestamp = cpu_to_le64(rtl8180_get_tsf(dev));
 703
 704         /* TODO: use actual beacon queue */
 705         skb_set_queue_mapping(skb, 0);
 706
 707         err = rtl8180_tx(dev, skb);
 708         WARN_ON(err);
 709
 710 resched:
 711         /*
 712          * schedule next beacon
 713          * TODO: use hardware support for beacon timing
 714          */
 715         schedule_delayed_work(&vif_priv->beacon_work,
 716                         usecs_to_jiffies(1024 * vif->bss_conf.beacon_int));
 717 }
 718
 719 static int rtl8180_add_interface(struct ieee80211_hw *dev,
 720                                  struct ieee80211_vif *vif)
 721 {
 722         struct rtl8180_priv *priv = dev->priv;
 723         struct rtl8180_vif *vif_priv;
 724
 725         /*
 726          * We only support one active interface at a time.
 727          */
 728         if (priv->vif)
 729                 return -EBUSY;
 730
 731         switch (vif->type) {
 732         case NL80211_IFTYPE_STATION:
 733         case NL80211_IFTYPE_ADHOC:
 734                 break;
 735         default:
 736                 return -EOPNOTSUPP;
 737         }
 738
 739         priv->vif = vif;
 740
 741         /* Initialize driver private area */
 742         vif_priv = (struct rtl8180_vif *)&vif->drv_priv;
 743         vif_priv->dev = dev;
 744         INIT_DELAYED_WORK(&vif_priv->beacon_work, rtl8180_beacon_work);
 745         vif_priv->enable_beacon = false;
 746
 747         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 748         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0],
 749                           le32_to_cpu(*(__le32 *)vif->addr));
 750         rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4],
 751                           le16_to_cpu(*(__le16 *)(vif->addr + 4)));
 752         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 753
 754         return 0;
 755 }
 756
 757 static void rtl8180_remove_interface(struct ieee80211_hw *dev,
 758                                      struct ieee80211_vif *vif)
 759 {
 760         struct rtl8180_priv *priv = dev->priv;
 761         priv->vif = NULL;
 762 }
 763
 764 static int rtl8180_config(struct ieee80211_hw *dev, u32 changed)
 765 {
 766         struct rtl8180_priv *priv = dev->priv;
 767         struct ieee80211_conf *conf = &dev->conf;
 768
 769         priv->rf->set_chan(dev, conf);
 770
 771         return 0;
 772 }
 773
 774 static void rtl8180_bss_info_changed(struct ieee80211_hw *dev,
 775                                      struct ieee80211_vif *vif,
 776                                      struct ieee80211_bss_conf *info,
 777                                      u32 changed)
 778 {
 779         struct rtl8180_priv *priv = dev->priv;
 780         struct rtl8180_vif *vif_priv;
 781         int i;
 782
 783         vif_priv = (struct rtl8180_vif *)&vif->drv_priv;
 784
 785         if (changed & BSS_CHANGED_BSSID) {
 786                 for (i = 0; i < ETH_ALEN; i++)
 787                         rtl818x_iowrite8(priv, &priv->map->BSSID[i],
 788                                          info->bssid[i]);
 789
 790                 if (is_valid_ether_addr(info->bssid))
 791                         rtl818x_iowrite8(priv, &priv->map->MSR,
 792                                          RTL818X_MSR_INFRA);
 793                 else
 794                         rtl818x_iowrite8(priv, &priv->map->MSR,
 795                                          RTL818X_MSR_NO_LINK);
 796         }
 797
 798         if (changed & BSS_CHANGED_ERP_SLOT && priv->rf->conf_erp)
 799                 priv->rf->conf_erp(dev, info);
 800
 801         if (changed & BSS_CHANGED_BEACON_ENABLED)
 802                 vif_priv->enable_beacon = info->enable_beacon;
 803
 804         if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) {
 805                 cancel_delayed_work_sync(&vif_priv->beacon_work);
 806                 if (vif_priv->enable_beacon)
 807                         schedule_work(&vif_priv->beacon_work.work);
 808         }
 809 }
 810
 811 static u64 rtl8180_prepare_multicast(struct ieee80211_hw *dev,
 812                                      struct netdev_hw_addr_list *mc_list)
 813 {
 814         return netdev_hw_addr_list_count(mc_list);
 815 }
 816
 817 static void rtl8180_configure_filter(struct ieee80211_hw *dev,
 818                                      unsigned int changed_flags,
 819                                      unsigned int *total_flags,
 820                                      u64 multicast)
 821 {
 822         struct rtl8180_priv *priv = dev->priv;
 823
 824         if (changed_flags & FIF_FCSFAIL)
 825                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
 826         if (changed_flags & FIF_CONTROL)
 827                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
 828         if (changed_flags & FIF_OTHER_BSS)
 829                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
 830         if (*total_flags & FIF_ALLMULTI || multicast > 0)
 831                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
 832         else
 833                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
 834
 835         *total_flags = 0;
 836
 837         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
 838                 *total_flags |= FIF_FCSFAIL;
 839         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
 840                 *total_flags |= FIF_CONTROL;
 841         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
 842                 *total_flags |= FIF_OTHER_BSS;
 843         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
 844                 *total_flags |= FIF_ALLMULTI;
 845
 846         rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf);
 847 }
 848
 849 static const struct ieee80211_ops rtl8180_ops = {
 850         .tx                     = rtl8180_tx,
 851         .start                  = rtl8180_start,
 852         .stop                   = rtl8180_stop,
 853         .add_interface          = rtl8180_add_interface,
 854         .remove_interface       = rtl8180_remove_interface,
 855         .config                 = rtl8180_config,
 856         .bss_info_changed       = rtl8180_bss_info_changed,
 857         .prepare_multicast      = rtl8180_prepare_multicast,
 858         .configure_filter       = rtl8180_configure_filter,
 859         .get_tsf                = rtl8180_get_tsf,
 860 };
 861
 862 static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom)
 863 {
 864         struct ieee80211_hw *dev = eeprom->data;
 865         struct rtl8180_priv *priv = dev->priv;
 866         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 867
 868         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
 869         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
 870         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
 871         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
 872 }
 873
 874 static void rtl8180_eeprom_register_write(struct eeprom_93cx6 *eeprom)
 875 {
 876         struct ieee80211_hw *dev = eeprom->data;
 877         struct rtl8180_priv *priv = dev->priv;
 878         u8 reg = 2 << 6;
 879
 880         if (eeprom->reg_data_in)
 881                 reg |= RTL818X_EEPROM_CMD_WRITE;
 882         if (eeprom->reg_data_out)
 883                 reg |= RTL818X_EEPROM_CMD_READ;
 884         if (eeprom->reg_data_clock)
 885                 reg |= RTL818X_EEPROM_CMD_CK;
 886         if (eeprom->reg_chip_select)
 887                 reg |= RTL818X_EEPROM_CMD_CS;
 888
 889         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
 890         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 891         udelay(10);
 892 }
 893
 894 static int __devinit rtl8180_probe(struct pci_dev *pdev,
 895                                    const struct pci_device_id *id)
 896 {
 897         struct ieee80211_hw *dev;
 898         struct rtl8180_priv *priv;
 899         unsigned long mem_addr, mem_len;
 900         unsigned int io_addr, io_len;
 901         int err, i;
 902         struct eeprom_93cx6 eeprom;
 903         const char *chip_name, *rf_name = NULL;
 904         u32 reg;
 905         u16 eeprom_val;
 906         u8 mac_addr[ETH_ALEN];
 907
 908         err = pci_enable_device(pdev);
 909         if (err) {
 910                 printk(KERN_ERR "%s (rtl8180): Cannot enable new PCI device\n",
 911                        pci_name(pdev));
 912                 return err;
 913         }
 914
 915         err = pci_request_regions(pdev, KBUILD_MODNAME);
 916         if (err) {
 917                 printk(KERN_ERR "%s (rtl8180): Cannot obtain PCI resources\n",
 918                        pci_name(pdev));
 919                 return err;
 920         }
 921
 922         io_addr = pci_resource_start(pdev, 0);
 923         io_len = pci_resource_len(pdev, 0);
 924         mem_addr = pci_resource_start(pdev, 1);
 925         mem_len = pci_resource_len(pdev, 1);
 926
 927         if (mem_len < sizeof(struct rtl818x_csr) ||
 928             io_len < sizeof(struct rtl818x_csr)) {
 929                 printk(KERN_ERR "%s (rtl8180): Too short PCI resources\n",
 930                        pci_name(pdev));
 931                 err = -ENOMEM;
 932                 goto err_free_reg;
 933         }
 934
 935         if ((err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) ||
 936             (err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))) {
 937                 printk(KERN_ERR "%s (rtl8180): No suitable DMA available\n",
 938                        pci_name(pdev));
 939                 goto err_free_reg;
 940         }
 941
 942         pci_set_master(pdev);
 943
 944         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8180_ops);
 945         if (!dev) {
 946                 printk(KERN_ERR "%s (rtl8180): ieee80211 alloc failed\n",
 947                        pci_name(pdev));
 948                 err = -ENOMEM;
 949                 goto err_free_reg;
 950         }
 951
 952         priv = dev->priv;
 953         priv->pdev = pdev;
 954
 955         dev->max_rates = 2;
 956         SET_IEEE80211_DEV(dev, &pdev->dev);
 957         pci_set_drvdata(pdev, dev);
 958
 959         priv->map = pci_iomap(pdev, 1, mem_len);
 960         if (!priv->map)
 961                 priv->map = pci_iomap(pdev, 0, io_len);
 962
 963         if (!priv->map) {
 964                 printk(KERN_ERR "%s (rtl8180): Cannot map device memory\n",
 965                        pci_name(pdev));
 966                 goto err_free_dev;
 967         }
 968
 969         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
 970         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
 971
 972         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
 973         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
 974
 975         priv->band.band = IEEE80211_BAND_2GHZ;
 976         priv->band.channels = priv->channels;
 977         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
 978         priv->band.bitrates = priv->rates;
 979         priv->band.n_bitrates = 4;
 980         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
 981
 982         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
 983                      IEEE80211_HW_RX_INCLUDES_FCS |
 984                      IEEE80211_HW_SIGNAL_UNSPEC;
 985         dev->vif_data_size = sizeof(struct rtl8180_vif);
 986         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
 987                                         BIT(NL80211_IFTYPE_ADHOC);
 988         dev->queues = 1;
 989         dev->max_signal = 65;
 990
 991         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 992         reg &= RTL818X_TX_CONF_HWVER_MASK;
 993         switch (reg) {
 994         case RTL818X_TX_CONF_R8180_ABCD:
 995                 chip_name = "RTL8180";
 996                 break;
 997         case RTL818X_TX_CONF_R8180_F:
 998                 chip_name = "RTL8180vF";
 999                 break;
1000         case RTL818X_TX_CONF_R8185_ABC:
1001                 chip_name = "RTL8185";
1002                 break;
1003         case RTL818X_TX_CONF_R8185_D:
1004                 chip_name = "RTL8185vD";
1005                 break;
1006         default:
1007                 printk(KERN_ERR "%s (rtl8180): Unknown chip! (0x%x)\n",
1008                        pci_name(pdev), reg >> 25);
1009                 goto err_iounmap;
1010         }
1011
1012         priv->r8185 = reg & RTL818X_TX_CONF_R8185_ABC;
1013         if (priv->r8185) {
1014                 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1015                 pci_try_set_mwi(pdev);
1016         }
1017
1018         eeprom.data = dev;
1019         eeprom.register_read = rtl8180_eeprom_register_read;
1020         eeprom.register_write = rtl8180_eeprom_register_write;
1021         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1022                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1023         else
1024                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1025
1026         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_PROGRAM);
1027         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1028         udelay(10);
1029
1030         eeprom_93cx6_read(&eeprom, 0x06, &eeprom_val);
1031         eeprom_val &= 0xFF;
1032         switch (eeprom_val) {
1033         case 1: rf_name = "Intersil";
1034                 break;
1035         case 2: rf_name = "RFMD";
1036                 break;
1037         case 3: priv->rf = &sa2400_rf_ops;
1038                 break;
1039         case 4: priv->rf = &max2820_rf_ops;
1040                 break;
1041         case 5: priv->rf = &grf5101_rf_ops;
1042                 break;
1043         case 9: priv->rf = rtl8180_detect_rf(dev);
1044                 break;
1045         case 10:
1046                 rf_name = "RTL8255";
1047                 break;
1048         default:
1049                 printk(KERN_ERR "%s (rtl8180): Unknown RF! (0x%x)\n",
1050                        pci_name(pdev), eeprom_val);
1051                 goto err_iounmap;
1052         }
1053
1054         if (!priv->rf) {
1055                 printk(KERN_ERR "%s (rtl8180): %s RF frontend not supported!\n",
1056                        pci_name(pdev), rf_name);
1057                 goto err_iounmap;
1058         }
1059
1060         eeprom_93cx6_read(&eeprom, 0x17, &eeprom_val);
1061         priv->csthreshold = eeprom_val >> 8;
1062         if (!priv->r8185) {
1063                 __le32 anaparam;
1064                 eeprom_93cx6_multiread(&eeprom, 0xD, (__le16 *)&anaparam, 2);
1065                 priv->anaparam = le32_to_cpu(anaparam);
1066                 eeprom_93cx6_read(&eeprom, 0x19, &priv->rfparam);
1067         }
1068
1069         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)mac_addr, 3);
1070         if (!is_valid_ether_addr(mac_addr)) {
1071                 printk(KERN_WARNING "%s (rtl8180): Invalid hwaddr! Using"
1072                        " randomly generated MAC addr\n", pci_name(pdev));
1073                 random_ether_addr(mac_addr);
1074         }
1075         SET_IEEE80211_PERM_ADDR(dev, mac_addr);
1076
1077         /* CCK TX power */
1078         for (i = 0; i < 14; i += 2) {
1079                 u16 txpwr;
1080                 eeprom_93cx6_read(&eeprom, 0x10 + (i >> 1), &txpwr);
1081                 priv->channels[i].hw_value = txpwr & 0xFF;
1082                 priv->channels[i + 1].hw_value = txpwr >> 8;
1083         }
1084
1085         /* OFDM TX power */
1086         if (priv->r8185) {
1087                 for (i = 0; i < 14; i += 2) {
1088                         u16 txpwr;
1089                         eeprom_93cx6_read(&eeprom, 0x20 + (i >> 1), &txpwr);
1090                         priv->channels[i].hw_value |= (txpwr & 0xFF) << 8;
1091                         priv->channels[i + 1].hw_value |= txpwr & 0xFF00;
1092                 }
1093         }
1094
1095         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1096
1097         spin_lock_init(&priv->lock);
1098
1099         err = ieee80211_register_hw(dev);
1100         if (err) {
1101                 printk(KERN_ERR "%s (rtl8180): Cannot register device\n",
1102                        pci_name(pdev));
1103                 goto err_iounmap;
1104         }
1105
1106         printk(KERN_INFO "%s: hwaddr %pM, %s + %s\n",
1107                wiphy_name(dev->wiphy), mac_addr,
1108                chip_name, priv->rf->name);
1109
1110         return 0;
1111
1112  err_iounmap:
1113         iounmap(priv->map);
1114
1115  err_free_dev:
1116         pci_set_drvdata(pdev, NULL);
1117         ieee80211_free_hw(dev);
1118
1119  err_free_reg:
1120         pci_release_regions(pdev);
1121         pci_disable_device(pdev);
1122         return err;
1123 }
1124
1125 static void __devexit rtl8180_remove(struct pci_dev *pdev)
1126 {
1127         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
1128         struct rtl8180_priv *priv;
1129
1130         if (!dev)
1131                 return;
1132
1133         ieee80211_unregister_hw(dev);
1134
1135         priv = dev->priv;
1136
1137         pci_iounmap(pdev, priv->map);
1138         pci_release_regions(pdev);
1139         pci_disable_device(pdev);
1140         ieee80211_free_hw(dev);
1141 }
1142
1143 #ifdef CONFIG_PM
1144 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
1145 {
1146         pci_save_state(pdev);
1147         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1148         return 0;
1149 }
1150
1151 static int rtl8180_resume(struct pci_dev *pdev)
1152 {
1153         pci_set_power_state(pdev, PCI_D0);
1154         pci_restore_state(pdev);
1155         return 0;
1156 }
1157
1158 #endif /* CONFIG_PM */
1159
1160 static struct pci_driver rtl8180_driver = {
1161         .name           = KBUILD_MODNAME,
1162         .id_table       = rtl8180_table,
1163         .probe          = rtl8180_probe,
1164         .remove         = __devexit_p(rtl8180_remove),
1165 #ifdef CONFIG_PM
1166         .suspend        = rtl8180_suspend,
1167         .resume         = rtl8180_resume,
1168 #endif /* CONFIG_PM */
1169 };
1170
1171 static int __init rtl8180_init(void)
1172 {
1173         return pci_register_driver(&rtl8180_driver);
1174 }
1175
1176 static void __exit rtl8180_exit(void)
1177 {
1178         pci_unregister_driver(&rtl8180_driver);
1179 }
1180
1181 module_init(rtl8180_init);
1182 module_exit(rtl8180_exit);