2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <linux/slab.h>
23 #include <net/mac80211.h>
24 #include <linux/moduleparam.h>
25 #include <linux/firmware.h>
26 #include <linux/workqueue.h>
28 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
29 #define MWL8K_NAME KBUILD_MODNAME
30 #define MWL8K_VERSION "0.12"
32 /* Register definitions */
33 #define MWL8K_HIU_GEN_PTR 0x00000c10
34 #define MWL8K_MODE_STA 0x0000005a
35 #define MWL8K_MODE_AP 0x000000a5
36 #define MWL8K_HIU_INT_CODE 0x00000c14
37 #define MWL8K_FWSTA_READY 0xf0f1f2f4
38 #define MWL8K_FWAP_READY 0xf1f2f4a5
39 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
40 #define MWL8K_HIU_SCRATCH 0x00000c40
42 /* Host->device communications */
43 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
44 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
45 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
46 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
47 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
48 #define MWL8K_H2A_INT_DUMMY (1 << 20)
49 #define MWL8K_H2A_INT_RESET (1 << 15)
50 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
51 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
53 /* Device->host communications */
54 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
55 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
56 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
57 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
58 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
59 #define MWL8K_A2H_INT_DUMMY (1 << 20)
60 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
61 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
62 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
63 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
64 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
65 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
66 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
67 #define MWL8K_A2H_INT_RX_READY (1 << 1)
68 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
70 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
71 MWL8K_A2H_INT_CHNL_SWITCHED | \
72 MWL8K_A2H_INT_QUEUE_EMPTY | \
73 MWL8K_A2H_INT_RADAR_DETECT | \
74 MWL8K_A2H_INT_RADIO_ON | \
75 MWL8K_A2H_INT_RADIO_OFF | \
76 MWL8K_A2H_INT_MAC_EVENT | \
77 MWL8K_A2H_INT_OPC_DONE | \
78 MWL8K_A2H_INT_RX_READY | \
79 MWL8K_A2H_INT_TX_DONE)
81 #define MWL8K_RX_QUEUES 1
82 #define MWL8K_TX_QUEUES 4
86 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
87 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
88 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
92 struct mwl8k_device_info {
96 struct rxd_ops *ap_rxd_ops;
99 struct mwl8k_rx_queue {
102 /* hw receives here */
105 /* refill descs here */
112 DEFINE_DMA_UNMAP_ADDR(dma);
116 struct mwl8k_tx_queue {
117 /* hw transmits here */
120 /* sw appends here */
124 struct mwl8k_tx_desc *txd;
126 struct sk_buff **skb;
130 struct ieee80211_hw *hw;
131 struct pci_dev *pdev;
133 struct mwl8k_device_info *device_info;
139 struct firmware *fw_helper;
140 struct firmware *fw_ucode;
142 /* hardware/firmware parameters */
144 struct rxd_ops *rxd_ops;
145 struct ieee80211_supported_band band_24;
146 struct ieee80211_channel channels_24[14];
147 struct ieee80211_rate rates_24[14];
148 struct ieee80211_supported_band band_50;
149 struct ieee80211_channel channels_50[4];
150 struct ieee80211_rate rates_50[9];
151 u32 ap_macids_supported;
152 u32 sta_macids_supported;
154 /* firmware access */
155 struct mutex fw_mutex;
156 struct task_struct *fw_mutex_owner;
158 struct completion *hostcmd_wait;
160 /* lock held over TX and TX reap */
163 /* TX quiesce completion, protected by fw_mutex and tx_lock */
164 struct completion *tx_wait;
166 /* List of interfaces. */
168 struct list_head vif_list;
170 /* power management status cookie from firmware */
172 dma_addr_t cookie_dma;
179 * Running count of TX packets in flight, to avoid
180 * iterating over the transmit rings each time.
184 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
185 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
188 bool radio_short_preamble;
189 bool sniffer_enabled;
192 /* XXX need to convert this to handle multiple interfaces */
194 u8 capture_bssid[ETH_ALEN];
195 struct sk_buff *beacon_skb;
198 * This FJ worker has to be global as it is scheduled from the
199 * RX handler. At this point we don't know which interface it
200 * belongs to until the list of bssids waiting to complete join
203 struct work_struct finalize_join_worker;
205 /* Tasklet to perform TX reclaim. */
206 struct tasklet_struct poll_tx_task;
208 /* Tasklet to perform RX. */
209 struct tasklet_struct poll_rx_task;
212 /* Per interface specific private data */
214 struct list_head list;
215 struct ieee80211_vif *vif;
217 /* Firmware macid for this vif. */
220 /* Non AMPDU sequence number assigned by driver. */
223 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
226 /* Index into station database. Returned by UPDATE_STADB. */
229 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
231 static const struct ieee80211_channel mwl8k_channels_24[] = {
232 { .center_freq = 2412, .hw_value = 1, },
233 { .center_freq = 2417, .hw_value = 2, },
234 { .center_freq = 2422, .hw_value = 3, },
235 { .center_freq = 2427, .hw_value = 4, },
236 { .center_freq = 2432, .hw_value = 5, },
237 { .center_freq = 2437, .hw_value = 6, },
238 { .center_freq = 2442, .hw_value = 7, },
239 { .center_freq = 2447, .hw_value = 8, },
240 { .center_freq = 2452, .hw_value = 9, },
241 { .center_freq = 2457, .hw_value = 10, },
242 { .center_freq = 2462, .hw_value = 11, },
243 { .center_freq = 2467, .hw_value = 12, },
244 { .center_freq = 2472, .hw_value = 13, },
245 { .center_freq = 2484, .hw_value = 14, },
248 static const struct ieee80211_rate mwl8k_rates_24[] = {
249 { .bitrate = 10, .hw_value = 2, },
250 { .bitrate = 20, .hw_value = 4, },
251 { .bitrate = 55, .hw_value = 11, },
252 { .bitrate = 110, .hw_value = 22, },
253 { .bitrate = 220, .hw_value = 44, },
254 { .bitrate = 60, .hw_value = 12, },
255 { .bitrate = 90, .hw_value = 18, },
256 { .bitrate = 120, .hw_value = 24, },
257 { .bitrate = 180, .hw_value = 36, },
258 { .bitrate = 240, .hw_value = 48, },
259 { .bitrate = 360, .hw_value = 72, },
260 { .bitrate = 480, .hw_value = 96, },
261 { .bitrate = 540, .hw_value = 108, },
262 { .bitrate = 720, .hw_value = 144, },
265 static const struct ieee80211_channel mwl8k_channels_50[] = {
266 { .center_freq = 5180, .hw_value = 36, },
267 { .center_freq = 5200, .hw_value = 40, },
268 { .center_freq = 5220, .hw_value = 44, },
269 { .center_freq = 5240, .hw_value = 48, },
272 static const struct ieee80211_rate mwl8k_rates_50[] = {
273 { .bitrate = 60, .hw_value = 12, },
274 { .bitrate = 90, .hw_value = 18, },
275 { .bitrate = 120, .hw_value = 24, },
276 { .bitrate = 180, .hw_value = 36, },
277 { .bitrate = 240, .hw_value = 48, },
278 { .bitrate = 360, .hw_value = 72, },
279 { .bitrate = 480, .hw_value = 96, },
280 { .bitrate = 540, .hw_value = 108, },
281 { .bitrate = 720, .hw_value = 144, },
284 /* Set or get info from Firmware */
285 #define MWL8K_CMD_SET 0x0001
286 #define MWL8K_CMD_GET 0x0000
288 /* Firmware command codes */
289 #define MWL8K_CMD_CODE_DNLD 0x0001
290 #define MWL8K_CMD_GET_HW_SPEC 0x0003
291 #define MWL8K_CMD_SET_HW_SPEC 0x0004
292 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
293 #define MWL8K_CMD_GET_STAT 0x0014
294 #define MWL8K_CMD_RADIO_CONTROL 0x001c
295 #define MWL8K_CMD_RF_TX_POWER 0x001e
296 #define MWL8K_CMD_RF_ANTENNA 0x0020
297 #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
298 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
299 #define MWL8K_CMD_SET_POST_SCAN 0x0108
300 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
301 #define MWL8K_CMD_SET_AID 0x010d
302 #define MWL8K_CMD_SET_RATE 0x0110
303 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
304 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
305 #define MWL8K_CMD_SET_SLOT 0x0114
306 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
307 #define MWL8K_CMD_SET_WMM_MODE 0x0123
308 #define MWL8K_CMD_MIMO_CONFIG 0x0125
309 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
310 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
311 #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
312 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
313 #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
314 #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
315 #define MWL8K_CMD_UPDATE_STADB 0x1123
317 static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
319 u16 command = le16_to_cpu(cmd);
321 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
322 snprintf(buf, bufsize, "%s", #x);\
325 switch (command & ~0x8000) {
326 MWL8K_CMDNAME(CODE_DNLD);
327 MWL8K_CMDNAME(GET_HW_SPEC);
328 MWL8K_CMDNAME(SET_HW_SPEC);
329 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
330 MWL8K_CMDNAME(GET_STAT);
331 MWL8K_CMDNAME(RADIO_CONTROL);
332 MWL8K_CMDNAME(RF_TX_POWER);
333 MWL8K_CMDNAME(RF_ANTENNA);
334 MWL8K_CMDNAME(SET_BEACON);
335 MWL8K_CMDNAME(SET_PRE_SCAN);
336 MWL8K_CMDNAME(SET_POST_SCAN);
337 MWL8K_CMDNAME(SET_RF_CHANNEL);
338 MWL8K_CMDNAME(SET_AID);
339 MWL8K_CMDNAME(SET_RATE);
340 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
341 MWL8K_CMDNAME(RTS_THRESHOLD);
342 MWL8K_CMDNAME(SET_SLOT);
343 MWL8K_CMDNAME(SET_EDCA_PARAMS);
344 MWL8K_CMDNAME(SET_WMM_MODE);
345 MWL8K_CMDNAME(MIMO_CONFIG);
346 MWL8K_CMDNAME(USE_FIXED_RATE);
347 MWL8K_CMDNAME(ENABLE_SNIFFER);
348 MWL8K_CMDNAME(SET_MAC_ADDR);
349 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
350 MWL8K_CMDNAME(BSS_START);
351 MWL8K_CMDNAME(SET_NEW_STN);
352 MWL8K_CMDNAME(UPDATE_STADB);
354 snprintf(buf, bufsize, "0x%x", cmd);
361 /* Hardware and firmware reset */
362 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
364 iowrite32(MWL8K_H2A_INT_RESET,
365 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
366 iowrite32(MWL8K_H2A_INT_RESET,
367 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
371 /* Release fw image */
372 static void mwl8k_release_fw(struct firmware **fw)
376 release_firmware(*fw);
380 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
382 mwl8k_release_fw(&priv->fw_ucode);
383 mwl8k_release_fw(&priv->fw_helper);
386 /* Request fw image */
387 static int mwl8k_request_fw(struct mwl8k_priv *priv,
388 const char *fname, struct firmware **fw)
390 /* release current image */
392 mwl8k_release_fw(fw);
394 return request_firmware((const struct firmware **)fw,
395 fname, &priv->pdev->dev);
398 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
400 struct mwl8k_device_info *di = priv->device_info;
403 if (di->helper_image != NULL) {
404 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
406 printk(KERN_ERR "%s: Error requesting helper "
407 "firmware file %s\n", pci_name(priv->pdev),
413 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
415 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
416 pci_name(priv->pdev), di->fw_image);
417 mwl8k_release_fw(&priv->fw_helper);
424 struct mwl8k_cmd_pkt {
437 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
439 void __iomem *regs = priv->regs;
443 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
444 if (pci_dma_mapping_error(priv->pdev, dma_addr))
447 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
448 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
449 iowrite32(MWL8K_H2A_INT_DOORBELL,
450 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
451 iowrite32(MWL8K_H2A_INT_DUMMY,
452 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
458 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
459 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
460 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
468 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
470 return loops ? 0 : -ETIMEDOUT;
473 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
474 const u8 *data, size_t length)
476 struct mwl8k_cmd_pkt *cmd;
480 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
484 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
491 int block_size = length > 256 ? 256 : length;
493 memcpy(cmd->payload, data + done, block_size);
494 cmd->length = cpu_to_le16(block_size);
496 rc = mwl8k_send_fw_load_cmd(priv, cmd,
497 sizeof(*cmd) + block_size);
502 length -= block_size;
507 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
515 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
516 const u8 *data, size_t length)
518 unsigned char *buffer;
519 int may_continue, rc = 0;
520 u32 done, prev_block_size;
522 buffer = kmalloc(1024, GFP_KERNEL);
529 while (may_continue > 0) {
532 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
533 if (block_size & 1) {
537 done += prev_block_size;
538 length -= prev_block_size;
541 if (block_size > 1024 || block_size > length) {
551 if (block_size == 0) {
558 prev_block_size = block_size;
559 memcpy(buffer, data + done, block_size);
561 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
566 if (!rc && length != 0)
574 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
576 struct mwl8k_priv *priv = hw->priv;
577 struct firmware *fw = priv->fw_ucode;
581 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
582 struct firmware *helper = priv->fw_helper;
584 if (helper == NULL) {
585 printk(KERN_ERR "%s: helper image needed but none "
586 "given\n", pci_name(priv->pdev));
590 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
592 printk(KERN_ERR "%s: unable to load firmware "
593 "helper image\n", pci_name(priv->pdev));
598 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
600 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
604 printk(KERN_ERR "%s: unable to load firmware image\n",
605 pci_name(priv->pdev));
609 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
615 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
616 if (ready_code == MWL8K_FWAP_READY) {
619 } else if (ready_code == MWL8K_FWSTA_READY) {
628 return loops ? 0 : -ETIMEDOUT;
632 /* DMA header used by firmware and hardware. */
633 struct mwl8k_dma_data {
635 struct ieee80211_hdr wh;
639 /* Routines to add/remove DMA header from skb. */
640 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
642 struct mwl8k_dma_data *tr;
645 tr = (struct mwl8k_dma_data *)skb->data;
646 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
648 if (hdrlen != sizeof(tr->wh)) {
649 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
650 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
651 *((__le16 *)(tr->data - 2)) = qos;
653 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
657 if (hdrlen != sizeof(*tr))
658 skb_pull(skb, sizeof(*tr) - hdrlen);
661 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
663 struct ieee80211_hdr *wh;
665 struct mwl8k_dma_data *tr;
668 * Add a firmware DMA header; the firmware requires that we
669 * present a 2-byte payload length followed by a 4-address
670 * header (without QoS field), followed (optionally) by any
671 * WEP/ExtIV header (but only filled in for CCMP).
673 wh = (struct ieee80211_hdr *)skb->data;
675 hdrlen = ieee80211_hdrlen(wh->frame_control);
676 if (hdrlen != sizeof(*tr))
677 skb_push(skb, sizeof(*tr) - hdrlen);
679 if (ieee80211_is_data_qos(wh->frame_control))
682 tr = (struct mwl8k_dma_data *)skb->data;
684 memmove(&tr->wh, wh, hdrlen);
685 if (hdrlen != sizeof(tr->wh))
686 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
689 * Firmware length is the length of the fully formed "802.11
690 * payload". That is, everything except for the 802.11 header.
691 * This includes all crypto material including the MIC.
693 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
698 * Packet reception for 88w8366 AP firmware.
700 struct mwl8k_rxd_8366_ap {
704 __le32 pkt_phys_addr;
705 __le32 next_rxd_phys_addr;
709 __le32 hw_noise_floor_info;
718 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
719 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
720 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
722 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
724 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
726 struct mwl8k_rxd_8366_ap *rxd = _rxd;
728 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
729 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
732 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
734 struct mwl8k_rxd_8366_ap *rxd = _rxd;
736 rxd->pkt_len = cpu_to_le16(len);
737 rxd->pkt_phys_addr = cpu_to_le32(addr);
743 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
746 struct mwl8k_rxd_8366_ap *rxd = _rxd;
748 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
752 memset(status, 0, sizeof(*status));
754 status->signal = -rxd->rssi;
756 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
757 status->flag |= RX_FLAG_HT;
758 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
759 status->flag |= RX_FLAG_40MHZ;
760 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
764 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
765 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
766 status->rate_idx = i;
772 if (rxd->channel > 14) {
773 status->band = IEEE80211_BAND_5GHZ;
774 if (!(status->flag & RX_FLAG_HT))
775 status->rate_idx -= 5;
777 status->band = IEEE80211_BAND_2GHZ;
779 status->freq = ieee80211_channel_to_frequency(rxd->channel);
781 *qos = rxd->qos_control;
783 return le16_to_cpu(rxd->pkt_len);
786 static struct rxd_ops rxd_8366_ap_ops = {
787 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
788 .rxd_init = mwl8k_rxd_8366_ap_init,
789 .rxd_refill = mwl8k_rxd_8366_ap_refill,
790 .rxd_process = mwl8k_rxd_8366_ap_process,
794 * Packet reception for STA firmware.
796 struct mwl8k_rxd_sta {
800 __le32 pkt_phys_addr;
801 __le32 next_rxd_phys_addr;
813 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
814 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
815 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
816 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
817 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
818 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
820 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
822 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
824 struct mwl8k_rxd_sta *rxd = _rxd;
826 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
827 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
830 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
832 struct mwl8k_rxd_sta *rxd = _rxd;
834 rxd->pkt_len = cpu_to_le16(len);
835 rxd->pkt_phys_addr = cpu_to_le32(addr);
841 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
844 struct mwl8k_rxd_sta *rxd = _rxd;
847 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
851 rate_info = le16_to_cpu(rxd->rate_info);
853 memset(status, 0, sizeof(*status));
855 status->signal = -rxd->rssi;
856 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
857 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
859 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
860 status->flag |= RX_FLAG_SHORTPRE;
861 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
862 status->flag |= RX_FLAG_40MHZ;
863 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
864 status->flag |= RX_FLAG_SHORT_GI;
865 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
866 status->flag |= RX_FLAG_HT;
868 if (rxd->channel > 14) {
869 status->band = IEEE80211_BAND_5GHZ;
870 if (!(status->flag & RX_FLAG_HT))
871 status->rate_idx -= 5;
873 status->band = IEEE80211_BAND_2GHZ;
875 status->freq = ieee80211_channel_to_frequency(rxd->channel);
877 *qos = rxd->qos_control;
879 return le16_to_cpu(rxd->pkt_len);
882 static struct rxd_ops rxd_sta_ops = {
883 .rxd_size = sizeof(struct mwl8k_rxd_sta),
884 .rxd_init = mwl8k_rxd_sta_init,
885 .rxd_refill = mwl8k_rxd_sta_refill,
886 .rxd_process = mwl8k_rxd_sta_process,
890 #define MWL8K_RX_DESCS 256
891 #define MWL8K_RX_MAXSZ 3800
893 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
895 struct mwl8k_priv *priv = hw->priv;
896 struct mwl8k_rx_queue *rxq = priv->rxq + index;
904 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
906 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
907 if (rxq->rxd == NULL) {
908 wiphy_err(hw->wiphy, "failed to alloc rx descriptors\n");
911 memset(rxq->rxd, 0, size);
913 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
914 if (rxq->buf == NULL) {
915 wiphy_err(hw->wiphy, "failed to alloc rx skbuff list\n");
916 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
919 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
921 for (i = 0; i < MWL8K_RX_DESCS; i++) {
925 dma_addr_t next_dma_addr;
927 desc_size = priv->rxd_ops->rxd_size;
928 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
931 if (nexti == MWL8K_RX_DESCS)
933 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
935 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
941 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
943 struct mwl8k_priv *priv = hw->priv;
944 struct mwl8k_rx_queue *rxq = priv->rxq + index;
948 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
954 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
958 addr = pci_map_single(priv->pdev, skb->data,
959 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
963 if (rxq->tail == MWL8K_RX_DESCS)
965 rxq->buf[rx].skb = skb;
966 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
968 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
969 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
977 /* Must be called only when the card's reception is completely halted */
978 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
980 struct mwl8k_priv *priv = hw->priv;
981 struct mwl8k_rx_queue *rxq = priv->rxq + index;
984 for (i = 0; i < MWL8K_RX_DESCS; i++) {
985 if (rxq->buf[i].skb != NULL) {
986 pci_unmap_single(priv->pdev,
987 dma_unmap_addr(&rxq->buf[i], dma),
988 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
989 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
991 kfree_skb(rxq->buf[i].skb);
992 rxq->buf[i].skb = NULL;
999 pci_free_consistent(priv->pdev,
1000 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
1001 rxq->rxd, rxq->rxd_dma);
1007 * Scan a list of BSSIDs to process for finalize join.
1008 * Allows for extension to process multiple BSSIDs.
1011 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1013 return priv->capture_beacon &&
1014 ieee80211_is_beacon(wh->frame_control) &&
1015 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1018 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1019 struct sk_buff *skb)
1021 struct mwl8k_priv *priv = hw->priv;
1023 priv->capture_beacon = false;
1024 memset(priv->capture_bssid, 0, ETH_ALEN);
1027 * Use GFP_ATOMIC as rxq_process is called from
1028 * the primary interrupt handler, memory allocation call
1031 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1032 if (priv->beacon_skb != NULL)
1033 ieee80211_queue_work(hw, &priv->finalize_join_worker);
1036 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1038 struct mwl8k_priv *priv = hw->priv;
1039 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1043 while (rxq->rxd_count && limit--) {
1044 struct sk_buff *skb;
1047 struct ieee80211_rx_status status;
1050 skb = rxq->buf[rxq->head].skb;
1054 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1056 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1060 rxq->buf[rxq->head].skb = NULL;
1062 pci_unmap_single(priv->pdev,
1063 dma_unmap_addr(&rxq->buf[rxq->head], dma),
1064 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1065 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1068 if (rxq->head == MWL8K_RX_DESCS)
1073 skb_put(skb, pkt_len);
1074 mwl8k_remove_dma_header(skb, qos);
1077 * Check for a pending join operation. Save a
1078 * copy of the beacon and schedule a tasklet to
1079 * send a FINALIZE_JOIN command to the firmware.
1081 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1082 mwl8k_save_beacon(hw, skb);
1084 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1085 ieee80211_rx_irqsafe(hw, skb);
1095 * Packet transmission.
1098 #define MWL8K_TXD_STATUS_OK 0x00000001
1099 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1100 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1101 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1102 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1104 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1105 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1106 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1107 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1108 #define MWL8K_QOS_EOSP 0x0010
1110 struct mwl8k_tx_desc {
1115 __le32 pkt_phys_addr;
1117 __u8 dest_MAC_addr[ETH_ALEN];
1118 __le32 next_txd_phys_addr;
1125 #define MWL8K_TX_DESCS 128
1127 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1129 struct mwl8k_priv *priv = hw->priv;
1130 struct mwl8k_tx_queue *txq = priv->txq + index;
1138 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1140 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1141 if (txq->txd == NULL) {
1142 wiphy_err(hw->wiphy, "failed to alloc tx descriptors\n");
1145 memset(txq->txd, 0, size);
1147 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1148 if (txq->skb == NULL) {
1149 wiphy_err(hw->wiphy, "failed to alloc tx skbuff list\n");
1150 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1153 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1155 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1156 struct mwl8k_tx_desc *tx_desc;
1159 tx_desc = txq->txd + i;
1160 nexti = (i + 1) % MWL8K_TX_DESCS;
1162 tx_desc->status = 0;
1163 tx_desc->next_txd_phys_addr =
1164 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1170 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1172 iowrite32(MWL8K_H2A_INT_PPA_READY,
1173 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1174 iowrite32(MWL8K_H2A_INT_DUMMY,
1175 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1176 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1179 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1181 struct mwl8k_priv *priv = hw->priv;
1184 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1185 struct mwl8k_tx_queue *txq = priv->txq + i;
1191 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1192 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1195 status = le32_to_cpu(tx_desc->status);
1196 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1201 if (tx_desc->pkt_len == 0)
1205 wiphy_err(hw->wiphy,
1206 "txq[%d] len=%d head=%d tail=%d "
1207 "fw_owned=%d drv_owned=%d unused=%d\n",
1209 txq->len, txq->head, txq->tail,
1210 fw_owned, drv_owned, unused);
1215 * Must be called with priv->fw_mutex held and tx queues stopped.
1217 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1219 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1221 struct mwl8k_priv *priv = hw->priv;
1222 DECLARE_COMPLETION_ONSTACK(tx_wait);
1229 * The TX queues are stopped at this point, so this test
1230 * doesn't need to take ->tx_lock.
1232 if (!priv->pending_tx_pkts)
1238 spin_lock_bh(&priv->tx_lock);
1239 priv->tx_wait = &tx_wait;
1242 unsigned long timeout;
1244 oldcount = priv->pending_tx_pkts;
1246 spin_unlock_bh(&priv->tx_lock);
1247 timeout = wait_for_completion_timeout(&tx_wait,
1248 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1249 spin_lock_bh(&priv->tx_lock);
1252 WARN_ON(priv->pending_tx_pkts);
1254 wiphy_notice(hw->wiphy, "tx rings drained\n");
1259 if (priv->pending_tx_pkts < oldcount) {
1260 wiphy_notice(hw->wiphy,
1261 "waiting for tx rings to drain (%d -> %d pkts)\n",
1262 oldcount, priv->pending_tx_pkts);
1267 priv->tx_wait = NULL;
1269 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1270 MWL8K_TX_WAIT_TIMEOUT_MS);
1271 mwl8k_dump_tx_rings(hw);
1275 spin_unlock_bh(&priv->tx_lock);
1280 #define MWL8K_TXD_SUCCESS(status) \
1281 ((status) & (MWL8K_TXD_STATUS_OK | \
1282 MWL8K_TXD_STATUS_OK_RETRY | \
1283 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1286 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1288 struct mwl8k_priv *priv = hw->priv;
1289 struct mwl8k_tx_queue *txq = priv->txq + index;
1293 while (txq->len > 0 && limit--) {
1295 struct mwl8k_tx_desc *tx_desc;
1298 struct sk_buff *skb;
1299 struct ieee80211_tx_info *info;
1303 tx_desc = txq->txd + tx;
1305 status = le32_to_cpu(tx_desc->status);
1307 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1311 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1314 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1315 BUG_ON(txq->len == 0);
1317 priv->pending_tx_pkts--;
1319 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1320 size = le16_to_cpu(tx_desc->pkt_len);
1322 txq->skb[tx] = NULL;
1324 BUG_ON(skb == NULL);
1325 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1327 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1329 /* Mark descriptor as unused */
1330 tx_desc->pkt_phys_addr = 0;
1331 tx_desc->pkt_len = 0;
1333 info = IEEE80211_SKB_CB(skb);
1334 ieee80211_tx_info_clear_status(info);
1335 if (MWL8K_TXD_SUCCESS(status))
1336 info->flags |= IEEE80211_TX_STAT_ACK;
1338 ieee80211_tx_status_irqsafe(hw, skb);
1343 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1344 ieee80211_wake_queue(hw, index);
1349 /* must be called only when the card's transmit is completely halted */
1350 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1352 struct mwl8k_priv *priv = hw->priv;
1353 struct mwl8k_tx_queue *txq = priv->txq + index;
1355 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1360 pci_free_consistent(priv->pdev,
1361 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1362 txq->txd, txq->txd_dma);
1367 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1369 struct mwl8k_priv *priv = hw->priv;
1370 struct ieee80211_tx_info *tx_info;
1371 struct mwl8k_vif *mwl8k_vif;
1372 struct ieee80211_hdr *wh;
1373 struct mwl8k_tx_queue *txq;
1374 struct mwl8k_tx_desc *tx;
1380 wh = (struct ieee80211_hdr *)skb->data;
1381 if (ieee80211_is_data_qos(wh->frame_control))
1382 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1386 mwl8k_add_dma_header(skb);
1387 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1389 tx_info = IEEE80211_SKB_CB(skb);
1390 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1392 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1393 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1394 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1395 mwl8k_vif->seqno += 0x10;
1398 /* Setup firmware control bit fields for each frame type. */
1401 if (ieee80211_is_mgmt(wh->frame_control) ||
1402 ieee80211_is_ctl(wh->frame_control)) {
1404 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1405 } else if (ieee80211_is_data(wh->frame_control)) {
1407 if (is_multicast_ether_addr(wh->addr1))
1408 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1410 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1411 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1412 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1414 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1417 dma = pci_map_single(priv->pdev, skb->data,
1418 skb->len, PCI_DMA_TODEVICE);
1420 if (pci_dma_mapping_error(priv->pdev, dma)) {
1421 wiphy_debug(hw->wiphy,
1422 "failed to dma map skb, dropping TX frame.\n");
1424 return NETDEV_TX_OK;
1427 spin_lock_bh(&priv->tx_lock);
1429 txq = priv->txq + index;
1431 BUG_ON(txq->skb[txq->tail] != NULL);
1432 txq->skb[txq->tail] = skb;
1434 tx = txq->txd + txq->tail;
1435 tx->data_rate = txdatarate;
1436 tx->tx_priority = index;
1437 tx->qos_control = cpu_to_le16(qos);
1438 tx->pkt_phys_addr = cpu_to_le32(dma);
1439 tx->pkt_len = cpu_to_le16(skb->len);
1441 if (!priv->ap_fw && tx_info->control.sta != NULL)
1442 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1446 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1449 priv->pending_tx_pkts++;
1452 if (txq->tail == MWL8K_TX_DESCS)
1455 if (txq->head == txq->tail)
1456 ieee80211_stop_queue(hw, index);
1458 mwl8k_tx_start(priv);
1460 spin_unlock_bh(&priv->tx_lock);
1462 return NETDEV_TX_OK;
1469 * We have the following requirements for issuing firmware commands:
1470 * - Some commands require that the packet transmit path is idle when
1471 * the command is issued. (For simplicity, we'll just quiesce the
1472 * transmit path for every command.)
1473 * - There are certain sequences of commands that need to be issued to
1474 * the hardware sequentially, with no other intervening commands.
1476 * This leads to an implementation of a "firmware lock" as a mutex that
1477 * can be taken recursively, and which is taken by both the low-level
1478 * command submission function (mwl8k_post_cmd) as well as any users of
1479 * that function that require issuing of an atomic sequence of commands,
1480 * and quiesces the transmit path whenever it's taken.
1482 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1484 struct mwl8k_priv *priv = hw->priv;
1486 if (priv->fw_mutex_owner != current) {
1489 mutex_lock(&priv->fw_mutex);
1490 ieee80211_stop_queues(hw);
1492 rc = mwl8k_tx_wait_empty(hw);
1494 ieee80211_wake_queues(hw);
1495 mutex_unlock(&priv->fw_mutex);
1500 priv->fw_mutex_owner = current;
1503 priv->fw_mutex_depth++;
1508 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1510 struct mwl8k_priv *priv = hw->priv;
1512 if (!--priv->fw_mutex_depth) {
1513 ieee80211_wake_queues(hw);
1514 priv->fw_mutex_owner = NULL;
1515 mutex_unlock(&priv->fw_mutex);
1521 * Command processing.
1524 /* Timeout firmware commands after 10s */
1525 #define MWL8K_CMD_TIMEOUT_MS 10000
1527 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1529 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1530 struct mwl8k_priv *priv = hw->priv;
1531 void __iomem *regs = priv->regs;
1532 dma_addr_t dma_addr;
1533 unsigned int dma_size;
1535 unsigned long timeout = 0;
1538 cmd->result = (__force __le16) 0xffff;
1539 dma_size = le16_to_cpu(cmd->length);
1540 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1541 PCI_DMA_BIDIRECTIONAL);
1542 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1545 rc = mwl8k_fw_lock(hw);
1547 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1548 PCI_DMA_BIDIRECTIONAL);
1552 priv->hostcmd_wait = &cmd_wait;
1553 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1554 iowrite32(MWL8K_H2A_INT_DOORBELL,
1555 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1556 iowrite32(MWL8K_H2A_INT_DUMMY,
1557 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1559 timeout = wait_for_completion_timeout(&cmd_wait,
1560 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1562 priv->hostcmd_wait = NULL;
1564 mwl8k_fw_unlock(hw);
1566 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1567 PCI_DMA_BIDIRECTIONAL);
1570 wiphy_err(hw->wiphy, "command %s timeout after %u ms\n",
1571 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1572 MWL8K_CMD_TIMEOUT_MS);
1577 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1579 rc = cmd->result ? -EINVAL : 0;
1581 wiphy_err(hw->wiphy, "command %s error 0x%x\n",
1582 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1583 le16_to_cpu(cmd->result));
1585 wiphy_notice(hw->wiphy, "command %s took %d ms\n",
1586 mwl8k_cmd_name(cmd->code,
1594 static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
1595 struct ieee80211_vif *vif,
1596 struct mwl8k_cmd_pkt *cmd)
1599 cmd->macid = MWL8K_VIF(vif)->macid;
1600 return mwl8k_post_cmd(hw, cmd);
1604 * Setup code shared between STA and AP firmware images.
1606 static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
1608 struct mwl8k_priv *priv = hw->priv;
1610 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
1611 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
1613 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
1614 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
1616 priv->band_24.band = IEEE80211_BAND_2GHZ;
1617 priv->band_24.channels = priv->channels_24;
1618 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
1619 priv->band_24.bitrates = priv->rates_24;
1620 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
1622 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
1625 static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
1627 struct mwl8k_priv *priv = hw->priv;
1629 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
1630 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
1632 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
1633 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
1635 priv->band_50.band = IEEE80211_BAND_5GHZ;
1636 priv->band_50.channels = priv->channels_50;
1637 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
1638 priv->band_50.bitrates = priv->rates_50;
1639 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
1641 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
1645 * CMD_GET_HW_SPEC (STA version).
1647 struct mwl8k_cmd_get_hw_spec_sta {
1648 struct mwl8k_cmd_pkt header;
1650 __u8 host_interface;
1652 __u8 perm_addr[ETH_ALEN];
1657 __u8 mcs_bitmap[16];
1658 __le32 rx_queue_ptr;
1659 __le32 num_tx_queues;
1660 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1662 __le32 num_tx_desc_per_queue;
1666 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1667 #define MWL8K_CAP_GREENFIELD 0x08000000
1668 #define MWL8K_CAP_AMPDU 0x04000000
1669 #define MWL8K_CAP_RX_STBC 0x01000000
1670 #define MWL8K_CAP_TX_STBC 0x00800000
1671 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1672 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1673 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1674 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1675 #define MWL8K_CAP_DELAY_BA 0x00003000
1676 #define MWL8K_CAP_MIMO 0x00000200
1677 #define MWL8K_CAP_40MHZ 0x00000100
1678 #define MWL8K_CAP_BAND_MASK 0x00000007
1679 #define MWL8K_CAP_5GHZ 0x00000004
1680 #define MWL8K_CAP_2GHZ4 0x00000001
1683 mwl8k_set_ht_caps(struct ieee80211_hw *hw,
1684 struct ieee80211_supported_band *band, u32 cap)
1689 band->ht_cap.ht_supported = 1;
1691 if (cap & MWL8K_CAP_MAX_AMSDU)
1692 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1693 if (cap & MWL8K_CAP_GREENFIELD)
1694 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1695 if (cap & MWL8K_CAP_AMPDU) {
1696 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1697 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1698 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
1700 if (cap & MWL8K_CAP_RX_STBC)
1701 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1702 if (cap & MWL8K_CAP_TX_STBC)
1703 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1704 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1705 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1706 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1707 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1708 if (cap & MWL8K_CAP_DELAY_BA)
1709 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1710 if (cap & MWL8K_CAP_40MHZ)
1711 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1713 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1714 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1716 band->ht_cap.mcs.rx_mask[0] = 0xff;
1717 if (rx_streams >= 2)
1718 band->ht_cap.mcs.rx_mask[1] = 0xff;
1719 if (rx_streams >= 3)
1720 band->ht_cap.mcs.rx_mask[2] = 0xff;
1721 band->ht_cap.mcs.rx_mask[4] = 0x01;
1722 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1724 if (rx_streams != tx_streams) {
1725 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1726 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1727 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1732 mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
1734 struct mwl8k_priv *priv = hw->priv;
1736 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
1737 mwl8k_setup_2ghz_band(hw);
1738 if (caps & MWL8K_CAP_MIMO)
1739 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
1742 if (caps & MWL8K_CAP_5GHZ) {
1743 mwl8k_setup_5ghz_band(hw);
1744 if (caps & MWL8K_CAP_MIMO)
1745 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
1749 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1751 struct mwl8k_priv *priv = hw->priv;
1752 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1756 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1760 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1761 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1763 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1764 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1765 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1766 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1767 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1768 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1769 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1770 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1772 rc = mwl8k_post_cmd(hw, &cmd->header);
1775 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1776 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1777 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1778 priv->hw_rev = cmd->hw_rev;
1779 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
1780 priv->ap_macids_supported = 0x00000000;
1781 priv->sta_macids_supported = 0x00000001;
1789 * CMD_GET_HW_SPEC (AP version).
1791 struct mwl8k_cmd_get_hw_spec_ap {
1792 struct mwl8k_cmd_pkt header;
1794 __u8 host_interface;
1797 __u8 perm_addr[ETH_ALEN];
1810 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1812 struct mwl8k_priv *priv = hw->priv;
1813 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1816 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1820 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1821 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1823 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1824 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1826 rc = mwl8k_post_cmd(hw, &cmd->header);
1831 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1832 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1833 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1834 priv->hw_rev = cmd->hw_rev;
1835 mwl8k_setup_2ghz_band(hw);
1836 priv->ap_macids_supported = 0x000000ff;
1837 priv->sta_macids_supported = 0x00000000;
1839 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1840 iowrite32(priv->txq[0].txd_dma, priv->sram + off);
1842 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1843 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
1845 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1846 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
1848 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1849 iowrite32(priv->txq[1].txd_dma, priv->sram + off);
1851 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1852 iowrite32(priv->txq[2].txd_dma, priv->sram + off);
1854 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1855 iowrite32(priv->txq[3].txd_dma, priv->sram + off);
1865 struct mwl8k_cmd_set_hw_spec {
1866 struct mwl8k_cmd_pkt header;
1868 __u8 host_interface;
1870 __u8 perm_addr[ETH_ALEN];
1875 __le32 rx_queue_ptr;
1876 __le32 num_tx_queues;
1877 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1879 __le32 num_tx_desc_per_queue;
1883 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1884 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1885 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1887 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1889 struct mwl8k_priv *priv = hw->priv;
1890 struct mwl8k_cmd_set_hw_spec *cmd;
1894 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1898 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1899 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1901 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1902 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1903 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1904 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1905 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1906 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1907 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1908 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1909 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1910 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1912 rc = mwl8k_post_cmd(hw, &cmd->header);
1919 * CMD_MAC_MULTICAST_ADR.
1921 struct mwl8k_cmd_mac_multicast_adr {
1922 struct mwl8k_cmd_pkt header;
1925 __u8 addr[0][ETH_ALEN];
1928 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1929 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1930 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1931 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1933 static struct mwl8k_cmd_pkt *
1934 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1935 struct netdev_hw_addr_list *mc_list)
1937 struct mwl8k_priv *priv = hw->priv;
1938 struct mwl8k_cmd_mac_multicast_adr *cmd;
1943 mc_count = netdev_hw_addr_list_count(mc_list);
1945 if (allmulti || mc_count > priv->num_mcaddrs) {
1950 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1952 cmd = kzalloc(size, GFP_ATOMIC);
1956 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1957 cmd->header.length = cpu_to_le16(size);
1958 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1959 MWL8K_ENABLE_RX_BROADCAST);
1962 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1963 } else if (mc_count) {
1964 struct netdev_hw_addr *ha;
1967 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1968 cmd->numaddr = cpu_to_le16(mc_count);
1969 netdev_hw_addr_list_for_each(ha, mc_list) {
1970 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
1974 return &cmd->header;
1980 struct mwl8k_cmd_get_stat {
1981 struct mwl8k_cmd_pkt header;
1985 #define MWL8K_STAT_ACK_FAILURE 9
1986 #define MWL8K_STAT_RTS_FAILURE 12
1987 #define MWL8K_STAT_FCS_ERROR 24
1988 #define MWL8K_STAT_RTS_SUCCESS 11
1990 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1991 struct ieee80211_low_level_stats *stats)
1993 struct mwl8k_cmd_get_stat *cmd;
1996 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2000 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2001 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2003 rc = mwl8k_post_cmd(hw, &cmd->header);
2005 stats->dot11ACKFailureCount =
2006 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2007 stats->dot11RTSFailureCount =
2008 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2009 stats->dot11FCSErrorCount =
2010 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2011 stats->dot11RTSSuccessCount =
2012 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2020 * CMD_RADIO_CONTROL.
2022 struct mwl8k_cmd_radio_control {
2023 struct mwl8k_cmd_pkt header;
2030 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
2032 struct mwl8k_priv *priv = hw->priv;
2033 struct mwl8k_cmd_radio_control *cmd;
2036 if (enable == priv->radio_on && !force)
2039 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2043 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2044 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2045 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2046 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
2047 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2049 rc = mwl8k_post_cmd(hw, &cmd->header);
2053 priv->radio_on = enable;
2058 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
2060 return mwl8k_cmd_radio_control(hw, 0, 0);
2063 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
2065 return mwl8k_cmd_radio_control(hw, 1, 0);
2069 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2071 struct mwl8k_priv *priv = hw->priv;
2073 priv->radio_short_preamble = short_preamble;
2075 return mwl8k_cmd_radio_control(hw, 1, 1);
2081 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
2083 struct mwl8k_cmd_rf_tx_power {
2084 struct mwl8k_cmd_pkt header;
2086 __le16 support_level;
2087 __le16 current_level;
2089 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2092 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
2094 struct mwl8k_cmd_rf_tx_power *cmd;
2097 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2101 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2102 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2103 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2104 cmd->support_level = cpu_to_le16(dBm);
2106 rc = mwl8k_post_cmd(hw, &cmd->header);
2115 struct mwl8k_cmd_rf_antenna {
2116 struct mwl8k_cmd_pkt header;
2121 #define MWL8K_RF_ANTENNA_RX 1
2122 #define MWL8K_RF_ANTENNA_TX 2
2125 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2127 struct mwl8k_cmd_rf_antenna *cmd;
2130 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2134 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2135 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2136 cmd->antenna = cpu_to_le16(antenna);
2137 cmd->mode = cpu_to_le16(mask);
2139 rc = mwl8k_post_cmd(hw, &cmd->header);
2148 struct mwl8k_cmd_set_beacon {
2149 struct mwl8k_cmd_pkt header;
2154 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2155 struct ieee80211_vif *vif, u8 *beacon, int len)
2157 struct mwl8k_cmd_set_beacon *cmd;
2160 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2164 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2165 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2166 cmd->beacon_len = cpu_to_le16(len);
2167 memcpy(cmd->beacon, beacon, len);
2169 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2178 struct mwl8k_cmd_set_pre_scan {
2179 struct mwl8k_cmd_pkt header;
2182 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2184 struct mwl8k_cmd_set_pre_scan *cmd;
2187 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2191 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2192 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2194 rc = mwl8k_post_cmd(hw, &cmd->header);
2201 * CMD_SET_POST_SCAN.
2203 struct mwl8k_cmd_set_post_scan {
2204 struct mwl8k_cmd_pkt header;
2206 __u8 bssid[ETH_ALEN];
2210 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2212 struct mwl8k_cmd_set_post_scan *cmd;
2215 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2219 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2220 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2222 memcpy(cmd->bssid, mac, ETH_ALEN);
2224 rc = mwl8k_post_cmd(hw, &cmd->header);
2231 * CMD_SET_RF_CHANNEL.
2233 struct mwl8k_cmd_set_rf_channel {
2234 struct mwl8k_cmd_pkt header;
2236 __u8 current_channel;
2237 __le32 channel_flags;
2240 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2241 struct ieee80211_conf *conf)
2243 struct ieee80211_channel *channel = conf->channel;
2244 struct mwl8k_cmd_set_rf_channel *cmd;
2247 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2251 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2252 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2253 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2254 cmd->current_channel = channel->hw_value;
2256 if (channel->band == IEEE80211_BAND_2GHZ)
2257 cmd->channel_flags |= cpu_to_le32(0x00000001);
2258 else if (channel->band == IEEE80211_BAND_5GHZ)
2259 cmd->channel_flags |= cpu_to_le32(0x00000004);
2261 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2262 conf->channel_type == NL80211_CHAN_HT20)
2263 cmd->channel_flags |= cpu_to_le32(0x00000080);
2264 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2265 cmd->channel_flags |= cpu_to_le32(0x000001900);
2266 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2267 cmd->channel_flags |= cpu_to_le32(0x000000900);
2269 rc = mwl8k_post_cmd(hw, &cmd->header);
2278 #define MWL8K_FRAME_PROT_DISABLED 0x00
2279 #define MWL8K_FRAME_PROT_11G 0x07
2280 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2281 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2283 struct mwl8k_cmd_update_set_aid {
2284 struct mwl8k_cmd_pkt header;
2287 /* AP's MAC address (BSSID) */
2288 __u8 bssid[ETH_ALEN];
2289 __le16 protection_mode;
2290 __u8 supp_rates[14];
2293 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2299 * Clear nonstandard rates 4 and 13.
2303 for (i = 0, j = 0; i < 14; i++) {
2304 if (mask & (1 << i))
2305 rates[j++] = mwl8k_rates_24[i].hw_value;
2310 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2311 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2313 struct mwl8k_cmd_update_set_aid *cmd;
2317 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2321 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2322 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2323 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2324 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2326 if (vif->bss_conf.use_cts_prot) {
2327 prot_mode = MWL8K_FRAME_PROT_11G;
2329 switch (vif->bss_conf.ht_operation_mode &
2330 IEEE80211_HT_OP_MODE_PROTECTION) {
2331 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2332 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2334 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2335 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2338 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2342 cmd->protection_mode = cpu_to_le16(prot_mode);
2344 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2346 rc = mwl8k_post_cmd(hw, &cmd->header);
2355 struct mwl8k_cmd_set_rate {
2356 struct mwl8k_cmd_pkt header;
2357 __u8 legacy_rates[14];
2359 /* Bitmap for supported MCS codes. */
2365 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2366 u32 legacy_rate_mask, u8 *mcs_rates)
2368 struct mwl8k_cmd_set_rate *cmd;
2371 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2375 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2376 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2377 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2378 memcpy(cmd->mcs_set, mcs_rates, 16);
2380 rc = mwl8k_post_cmd(hw, &cmd->header);
2387 * CMD_FINALIZE_JOIN.
2389 #define MWL8K_FJ_BEACON_MAXLEN 128
2391 struct mwl8k_cmd_finalize_join {
2392 struct mwl8k_cmd_pkt header;
2393 __le32 sleep_interval; /* Number of beacon periods to sleep */
2394 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2397 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2398 int framelen, int dtim)
2400 struct mwl8k_cmd_finalize_join *cmd;
2401 struct ieee80211_mgmt *payload = frame;
2405 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2409 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2410 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2411 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2413 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2414 if (payload_len < 0)
2416 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2417 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2419 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2421 rc = mwl8k_post_cmd(hw, &cmd->header);
2428 * CMD_SET_RTS_THRESHOLD.
2430 struct mwl8k_cmd_set_rts_threshold {
2431 struct mwl8k_cmd_pkt header;
2437 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2439 struct mwl8k_cmd_set_rts_threshold *cmd;
2442 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2446 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2447 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2448 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2449 cmd->threshold = cpu_to_le16(rts_thresh);
2451 rc = mwl8k_post_cmd(hw, &cmd->header);
2460 struct mwl8k_cmd_set_slot {
2461 struct mwl8k_cmd_pkt header;
2466 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2468 struct mwl8k_cmd_set_slot *cmd;
2471 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2475 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2476 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2477 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2478 cmd->short_slot = short_slot_time;
2480 rc = mwl8k_post_cmd(hw, &cmd->header);
2487 * CMD_SET_EDCA_PARAMS.
2489 struct mwl8k_cmd_set_edca_params {
2490 struct mwl8k_cmd_pkt header;
2492 /* See MWL8K_SET_EDCA_XXX below */
2495 /* TX opportunity in units of 32 us */
2500 /* Log exponent of max contention period: 0...15 */
2503 /* Log exponent of min contention period: 0...15 */
2506 /* Adaptive interframe spacing in units of 32us */
2509 /* TX queue to configure */
2513 /* Log exponent of max contention period: 0...15 */
2516 /* Log exponent of min contention period: 0...15 */
2519 /* Adaptive interframe spacing in units of 32us */
2522 /* TX queue to configure */
2528 #define MWL8K_SET_EDCA_CW 0x01
2529 #define MWL8K_SET_EDCA_TXOP 0x02
2530 #define MWL8K_SET_EDCA_AIFS 0x04
2532 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2533 MWL8K_SET_EDCA_TXOP | \
2534 MWL8K_SET_EDCA_AIFS)
2537 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2538 __u16 cw_min, __u16 cw_max,
2539 __u8 aifs, __u16 txop)
2541 struct mwl8k_priv *priv = hw->priv;
2542 struct mwl8k_cmd_set_edca_params *cmd;
2545 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2549 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2550 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2551 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2552 cmd->txop = cpu_to_le16(txop);
2554 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2555 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2556 cmd->ap.aifs = aifs;
2559 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2560 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2561 cmd->sta.aifs = aifs;
2562 cmd->sta.txq = qnum;
2565 rc = mwl8k_post_cmd(hw, &cmd->header);
2574 struct mwl8k_cmd_set_wmm_mode {
2575 struct mwl8k_cmd_pkt header;
2579 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2581 struct mwl8k_priv *priv = hw->priv;
2582 struct mwl8k_cmd_set_wmm_mode *cmd;
2585 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2589 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2590 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2591 cmd->action = cpu_to_le16(!!enable);
2593 rc = mwl8k_post_cmd(hw, &cmd->header);
2597 priv->wmm_enabled = enable;
2605 struct mwl8k_cmd_mimo_config {
2606 struct mwl8k_cmd_pkt header;
2608 __u8 rx_antenna_map;
2609 __u8 tx_antenna_map;
2612 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2614 struct mwl8k_cmd_mimo_config *cmd;
2617 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2621 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2622 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2623 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2624 cmd->rx_antenna_map = rx;
2625 cmd->tx_antenna_map = tx;
2627 rc = mwl8k_post_cmd(hw, &cmd->header);
2634 * CMD_USE_FIXED_RATE (STA version).
2636 struct mwl8k_cmd_use_fixed_rate_sta {
2637 struct mwl8k_cmd_pkt header;
2639 __le32 allow_rate_drop;
2643 __le32 enable_retry;
2652 #define MWL8K_USE_AUTO_RATE 0x0002
2653 #define MWL8K_UCAST_RATE 0
2655 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2657 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2660 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2664 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2665 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2666 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2667 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2669 rc = mwl8k_post_cmd(hw, &cmd->header);
2676 * CMD_USE_FIXED_RATE (AP version).
2678 struct mwl8k_cmd_use_fixed_rate_ap {
2679 struct mwl8k_cmd_pkt header;
2681 __le32 allow_rate_drop;
2683 struct mwl8k_rate_entry_ap {
2685 __le32 enable_retry;
2690 u8 multicast_rate_type;
2695 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2697 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2700 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2704 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2705 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2706 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2707 cmd->multicast_rate = mcast;
2708 cmd->management_rate = mgmt;
2710 rc = mwl8k_post_cmd(hw, &cmd->header);
2717 * CMD_ENABLE_SNIFFER.
2719 struct mwl8k_cmd_enable_sniffer {
2720 struct mwl8k_cmd_pkt header;
2724 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2726 struct mwl8k_cmd_enable_sniffer *cmd;
2729 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2733 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2734 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2735 cmd->action = cpu_to_le32(!!enable);
2737 rc = mwl8k_post_cmd(hw, &cmd->header);
2746 struct mwl8k_cmd_set_mac_addr {
2747 struct mwl8k_cmd_pkt header;
2751 __u8 mac_addr[ETH_ALEN];
2753 __u8 mac_addr[ETH_ALEN];
2757 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2758 #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
2759 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2760 #define MWL8K_MAC_TYPE_SECONDARY_AP 3
2762 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
2763 struct ieee80211_vif *vif, u8 *mac)
2765 struct mwl8k_priv *priv = hw->priv;
2766 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2767 struct mwl8k_cmd_set_mac_addr *cmd;
2771 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2772 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
2773 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
2774 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
2776 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
2777 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
2778 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
2779 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2781 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
2784 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2788 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2789 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2791 cmd->mbss.mac_type = cpu_to_le16(mac_type);
2792 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2794 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2797 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2804 * CMD_SET_RATEADAPT_MODE.
2806 struct mwl8k_cmd_set_rate_adapt_mode {
2807 struct mwl8k_cmd_pkt header;
2812 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2814 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2817 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2821 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2822 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2823 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2824 cmd->mode = cpu_to_le16(mode);
2826 rc = mwl8k_post_cmd(hw, &cmd->header);
2835 struct mwl8k_cmd_bss_start {
2836 struct mwl8k_cmd_pkt header;
2840 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
2841 struct ieee80211_vif *vif, int enable)
2843 struct mwl8k_cmd_bss_start *cmd;
2846 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2850 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2851 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2852 cmd->enable = cpu_to_le32(enable);
2854 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2863 struct mwl8k_cmd_set_new_stn {
2864 struct mwl8k_cmd_pkt header;
2870 __le32 legacy_rates;
2873 __le16 ht_capabilities_info;
2874 __u8 mac_ht_param_info;
2876 __u8 control_channel;
2885 #define MWL8K_STA_ACTION_ADD 0
2886 #define MWL8K_STA_ACTION_REMOVE 2
2888 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
2889 struct ieee80211_vif *vif,
2890 struct ieee80211_sta *sta)
2892 struct mwl8k_cmd_set_new_stn *cmd;
2896 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2900 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2901 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2902 cmd->aid = cpu_to_le16(sta->aid);
2903 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
2904 cmd->stn_id = cpu_to_le16(sta->aid);
2905 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
2906 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
2907 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
2909 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
2910 cmd->legacy_rates = cpu_to_le32(rates);
2911 if (sta->ht_cap.ht_supported) {
2912 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
2913 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
2914 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
2915 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
2916 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
2917 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
2918 ((sta->ht_cap.ampdu_density & 7) << 2);
2919 cmd->is_qos_sta = 1;
2922 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2928 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
2929 struct ieee80211_vif *vif)
2931 struct mwl8k_cmd_set_new_stn *cmd;
2934 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2938 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2939 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2940 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
2942 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2948 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
2949 struct ieee80211_vif *vif, u8 *addr)
2951 struct mwl8k_cmd_set_new_stn *cmd;
2954 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2958 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2959 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2960 memcpy(cmd->mac_addr, addr, ETH_ALEN);
2961 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
2963 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2972 struct ewc_ht_info {
2978 struct peer_capability_info {
2979 /* Peer type - AP vs. STA. */
2982 /* Basic 802.11 capabilities from assoc resp. */
2985 /* Set if peer supports 802.11n high throughput (HT). */
2988 /* Valid if HT is supported. */
2990 __u8 extended_ht_caps;
2991 struct ewc_ht_info ewc_info;
2993 /* Legacy rate table. Intersection of our rates and peer rates. */
2994 __u8 legacy_rates[12];
2996 /* HT rate table. Intersection of our rates and peer rates. */
3000 /* If set, interoperability mode, no proprietary extensions. */
3004 __le16 amsdu_enabled;
3007 struct mwl8k_cmd_update_stadb {
3008 struct mwl8k_cmd_pkt header;
3010 /* See STADB_ACTION_TYPE */
3013 /* Peer MAC address */
3014 __u8 peer_addr[ETH_ALEN];
3018 /* Peer info - valid during add/update. */
3019 struct peer_capability_info peer_info;
3022 #define MWL8K_STA_DB_MODIFY_ENTRY 1
3023 #define MWL8K_STA_DB_DEL_ENTRY 2
3025 /* Peer Entry flags - used to define the type of the peer node */
3026 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
3028 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
3029 struct ieee80211_vif *vif,
3030 struct ieee80211_sta *sta)
3032 struct mwl8k_cmd_update_stadb *cmd;
3033 struct peer_capability_info *p;
3037 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3041 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3042 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3043 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
3044 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
3046 p = &cmd->peer_info;
3047 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
3048 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
3049 p->ht_support = sta->ht_cap.ht_supported;
3050 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
3051 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
3052 ((sta->ht_cap.ampdu_density & 7) << 2);
3053 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3054 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3056 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3057 legacy_rate_mask_to_array(p->legacy_rates, rates);
3058 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
3060 p->amsdu_enabled = 0;
3062 rc = mwl8k_post_cmd(hw, &cmd->header);
3065 return rc ? rc : p->station_id;
3068 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
3069 struct ieee80211_vif *vif, u8 *addr)
3071 struct mwl8k_cmd_update_stadb *cmd;
3074 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3078 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3079 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3080 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
3081 memcpy(cmd->peer_addr, addr, ETH_ALEN);
3083 rc = mwl8k_post_cmd(hw, &cmd->header);
3091 * Interrupt handling.
3093 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
3095 struct ieee80211_hw *hw = dev_id;
3096 struct mwl8k_priv *priv = hw->priv;
3099 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3103 if (status & MWL8K_A2H_INT_TX_DONE) {
3104 status &= ~MWL8K_A2H_INT_TX_DONE;
3105 tasklet_schedule(&priv->poll_tx_task);
3108 if (status & MWL8K_A2H_INT_RX_READY) {
3109 status &= ~MWL8K_A2H_INT_RX_READY;
3110 tasklet_schedule(&priv->poll_rx_task);
3114 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3116 if (status & MWL8K_A2H_INT_OPC_DONE) {
3117 if (priv->hostcmd_wait != NULL)
3118 complete(priv->hostcmd_wait);
3121 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
3122 if (!mutex_is_locked(&priv->fw_mutex) &&
3123 priv->radio_on && priv->pending_tx_pkts)
3124 mwl8k_tx_start(priv);
3130 static void mwl8k_tx_poll(unsigned long data)
3132 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3133 struct mwl8k_priv *priv = hw->priv;
3139 spin_lock_bh(&priv->tx_lock);
3141 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3142 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3144 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3145 complete(priv->tx_wait);
3146 priv->tx_wait = NULL;
3149 spin_unlock_bh(&priv->tx_lock);
3152 writel(~MWL8K_A2H_INT_TX_DONE,
3153 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3155 tasklet_schedule(&priv->poll_tx_task);
3159 static void mwl8k_rx_poll(unsigned long data)
3161 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3162 struct mwl8k_priv *priv = hw->priv;
3166 limit -= rxq_process(hw, 0, limit);
3167 limit -= rxq_refill(hw, 0, limit);
3170 writel(~MWL8K_A2H_INT_RX_READY,
3171 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3173 tasklet_schedule(&priv->poll_rx_task);
3179 * Core driver operations.
3181 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3183 struct mwl8k_priv *priv = hw->priv;
3184 int index = skb_get_queue_mapping(skb);
3187 if (!priv->radio_on) {
3188 wiphy_debug(hw->wiphy,
3189 "dropped TX frame since radio disabled\n");
3191 return NETDEV_TX_OK;
3194 rc = mwl8k_txq_xmit(hw, index, skb);
3199 static int mwl8k_start(struct ieee80211_hw *hw)
3201 struct mwl8k_priv *priv = hw->priv;
3204 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3205 IRQF_SHARED, MWL8K_NAME, hw);
3207 wiphy_err(hw->wiphy, "failed to register irq handler\n");
3211 /* Enable TX reclaim and RX tasklets. */
3212 tasklet_enable(&priv->poll_tx_task);
3213 tasklet_enable(&priv->poll_rx_task);
3215 /* Enable interrupts */
3216 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3218 rc = mwl8k_fw_lock(hw);
3220 rc = mwl8k_cmd_radio_enable(hw);
3224 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3227 rc = mwl8k_cmd_set_pre_scan(hw);
3230 rc = mwl8k_cmd_set_post_scan(hw,
3231 "\x00\x00\x00\x00\x00\x00");
3235 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3238 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3240 mwl8k_fw_unlock(hw);
3244 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3245 free_irq(priv->pdev->irq, hw);
3246 tasklet_disable(&priv->poll_tx_task);
3247 tasklet_disable(&priv->poll_rx_task);
3253 static void mwl8k_stop(struct ieee80211_hw *hw)
3255 struct mwl8k_priv *priv = hw->priv;
3258 mwl8k_cmd_radio_disable(hw);
3260 ieee80211_stop_queues(hw);
3262 /* Disable interrupts */
3263 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3264 free_irq(priv->pdev->irq, hw);
3266 /* Stop finalize join worker */
3267 cancel_work_sync(&priv->finalize_join_worker);
3268 if (priv->beacon_skb != NULL)
3269 dev_kfree_skb(priv->beacon_skb);
3271 /* Stop TX reclaim and RX tasklets. */
3272 tasklet_disable(&priv->poll_tx_task);
3273 tasklet_disable(&priv->poll_rx_task);
3275 /* Return all skbs to mac80211 */
3276 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3277 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3280 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3281 struct ieee80211_vif *vif)
3283 struct mwl8k_priv *priv = hw->priv;
3284 struct mwl8k_vif *mwl8k_vif;
3285 u32 macids_supported;
3289 * Reject interface creation if sniffer mode is active, as
3290 * STA operation is mutually exclusive with hardware sniffer
3291 * mode. (Sniffer mode is only used on STA firmware.)
3293 if (priv->sniffer_enabled) {
3294 wiphy_info(hw->wiphy,
3295 "unable to create STA interface because sniffer mode is enabled\n");
3300 switch (vif->type) {
3301 case NL80211_IFTYPE_AP:
3302 macids_supported = priv->ap_macids_supported;
3304 case NL80211_IFTYPE_STATION:
3305 macids_supported = priv->sta_macids_supported;
3311 macid = ffs(macids_supported & ~priv->macids_used);
3315 /* Setup driver private area. */
3316 mwl8k_vif = MWL8K_VIF(vif);
3317 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3318 mwl8k_vif->vif = vif;
3319 mwl8k_vif->macid = macid;
3320 mwl8k_vif->seqno = 0;
3322 /* Set the mac address. */
3323 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
3326 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3328 priv->macids_used |= 1 << mwl8k_vif->macid;
3329 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
3334 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3335 struct ieee80211_vif *vif)
3337 struct mwl8k_priv *priv = hw->priv;
3338 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3341 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3343 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
3345 priv->macids_used &= ~(1 << mwl8k_vif->macid);
3346 list_del(&mwl8k_vif->list);
3349 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3351 struct ieee80211_conf *conf = &hw->conf;
3352 struct mwl8k_priv *priv = hw->priv;
3355 if (conf->flags & IEEE80211_CONF_IDLE) {
3356 mwl8k_cmd_radio_disable(hw);
3360 rc = mwl8k_fw_lock(hw);
3364 rc = mwl8k_cmd_radio_enable(hw);
3368 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3372 if (conf->power_level > 18)
3373 conf->power_level = 18;
3374 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3379 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3381 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3383 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3387 mwl8k_fw_unlock(hw);
3393 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3394 struct ieee80211_bss_conf *info, u32 changed)
3396 struct mwl8k_priv *priv = hw->priv;
3397 u32 ap_legacy_rates;
3398 u8 ap_mcs_rates[16];
3401 if (mwl8k_fw_lock(hw))
3405 * No need to capture a beacon if we're no longer associated.
3407 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3408 priv->capture_beacon = false;
3411 * Get the AP's legacy and MCS rates.
3413 if (vif->bss_conf.assoc) {
3414 struct ieee80211_sta *ap;
3418 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3424 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
3425 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3428 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3430 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3435 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3436 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3440 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3445 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3446 rc = mwl8k_set_radio_preamble(hw,
3447 vif->bss_conf.use_short_preamble);
3452 if (changed & BSS_CHANGED_ERP_SLOT) {
3453 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3458 if (vif->bss_conf.assoc &&
3459 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
3461 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3466 if (vif->bss_conf.assoc &&
3467 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3469 * Finalize the join. Tell rx handler to process
3470 * next beacon from our BSSID.
3472 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3473 priv->capture_beacon = true;
3477 mwl8k_fw_unlock(hw);
3481 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3482 struct ieee80211_bss_conf *info, u32 changed)
3486 if (mwl8k_fw_lock(hw))
3489 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3490 rc = mwl8k_set_radio_preamble(hw,
3491 vif->bss_conf.use_short_preamble);
3496 if (changed & BSS_CHANGED_BASIC_RATES) {
3501 * Use lowest supported basic rate for multicasts
3502 * and management frames (such as probe responses --
3503 * beacons will always go out at 1 Mb/s).
3505 idx = ffs(vif->bss_conf.basic_rates);
3509 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3510 rate = mwl8k_rates_24[idx].hw_value;
3512 rate = mwl8k_rates_50[idx].hw_value;
3514 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3517 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3518 struct sk_buff *skb;
3520 skb = ieee80211_beacon_get(hw, vif);
3522 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
3527 if (changed & BSS_CHANGED_BEACON_ENABLED)
3528 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
3531 mwl8k_fw_unlock(hw);
3535 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3536 struct ieee80211_bss_conf *info, u32 changed)
3538 struct mwl8k_priv *priv = hw->priv;
3541 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3543 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3546 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3547 struct netdev_hw_addr_list *mc_list)
3549 struct mwl8k_cmd_pkt *cmd;
3552 * Synthesize and return a command packet that programs the
3553 * hardware multicast address filter. At this point we don't
3554 * know whether FIF_ALLMULTI is being requested, but if it is,
3555 * we'll end up throwing this packet away and creating a new
3556 * one in mwl8k_configure_filter().
3558 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
3560 return (unsigned long)cmd;
3564 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3565 unsigned int changed_flags,
3566 unsigned int *total_flags)
3568 struct mwl8k_priv *priv = hw->priv;
3571 * Hardware sniffer mode is mutually exclusive with STA
3572 * operation, so refuse to enable sniffer mode if a STA
3573 * interface is active.
3575 if (!list_empty(&priv->vif_list)) {
3576 if (net_ratelimit())
3577 wiphy_info(hw->wiphy,
3578 "not enabling sniffer mode because STA interface is active\n");
3582 if (!priv->sniffer_enabled) {
3583 if (mwl8k_cmd_enable_sniffer(hw, 1))
3585 priv->sniffer_enabled = true;
3588 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3589 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3595 static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
3597 if (!list_empty(&priv->vif_list))
3598 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
3603 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3604 unsigned int changed_flags,
3605 unsigned int *total_flags,
3608 struct mwl8k_priv *priv = hw->priv;
3609 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3612 * AP firmware doesn't allow fine-grained control over
3613 * the receive filter.
3616 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3622 * Enable hardware sniffer mode if FIF_CONTROL or
3623 * FIF_OTHER_BSS is requested.
3625 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3626 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3631 /* Clear unsupported feature flags */
3632 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3634 if (mwl8k_fw_lock(hw)) {
3639 if (priv->sniffer_enabled) {
3640 mwl8k_cmd_enable_sniffer(hw, 0);
3641 priv->sniffer_enabled = false;
3644 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3645 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3647 * Disable the BSS filter.
3649 mwl8k_cmd_set_pre_scan(hw);
3651 struct mwl8k_vif *mwl8k_vif;
3655 * Enable the BSS filter.
3657 * If there is an active STA interface, use that
3658 * interface's BSSID, otherwise use a dummy one
3659 * (where the OUI part needs to be nonzero for
3660 * the BSSID to be accepted by POST_SCAN).
3662 mwl8k_vif = mwl8k_first_vif(priv);
3663 if (mwl8k_vif != NULL)
3664 bssid = mwl8k_vif->vif->bss_conf.bssid;
3666 bssid = "\x01\x00\x00\x00\x00\x00";
3668 mwl8k_cmd_set_post_scan(hw, bssid);
3673 * If FIF_ALLMULTI is being requested, throw away the command
3674 * packet that ->prepare_multicast() built and replace it with
3675 * a command packet that enables reception of all multicast
3678 if (*total_flags & FIF_ALLMULTI) {
3680 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
3684 mwl8k_post_cmd(hw, cmd);
3688 mwl8k_fw_unlock(hw);
3691 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3693 return mwl8k_cmd_set_rts_threshold(hw, value);
3696 static int mwl8k_sta_remove(struct ieee80211_hw *hw,
3697 struct ieee80211_vif *vif,
3698 struct ieee80211_sta *sta)
3700 struct mwl8k_priv *priv = hw->priv;
3703 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
3705 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
3708 static int mwl8k_sta_add(struct ieee80211_hw *hw,
3709 struct ieee80211_vif *vif,
3710 struct ieee80211_sta *sta)
3712 struct mwl8k_priv *priv = hw->priv;
3716 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
3718 MWL8K_STA(sta)->peer_id = ret;
3725 return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
3728 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3729 const struct ieee80211_tx_queue_params *params)
3731 struct mwl8k_priv *priv = hw->priv;
3734 rc = mwl8k_fw_lock(hw);
3736 if (!priv->wmm_enabled)
3737 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3740 rc = mwl8k_cmd_set_edca_params(hw, queue,
3746 mwl8k_fw_unlock(hw);
3752 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3753 struct ieee80211_low_level_stats *stats)
3755 return mwl8k_cmd_get_stat(hw, stats);
3759 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3760 enum ieee80211_ampdu_mlme_action action,
3761 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3764 case IEEE80211_AMPDU_RX_START:
3765 case IEEE80211_AMPDU_RX_STOP:
3766 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3774 static const struct ieee80211_ops mwl8k_ops = {
3776 .start = mwl8k_start,
3778 .add_interface = mwl8k_add_interface,
3779 .remove_interface = mwl8k_remove_interface,
3780 .config = mwl8k_config,
3781 .bss_info_changed = mwl8k_bss_info_changed,
3782 .prepare_multicast = mwl8k_prepare_multicast,
3783 .configure_filter = mwl8k_configure_filter,
3784 .set_rts_threshold = mwl8k_set_rts_threshold,
3785 .sta_add = mwl8k_sta_add,
3786 .sta_remove = mwl8k_sta_remove,
3787 .conf_tx = mwl8k_conf_tx,
3788 .get_stats = mwl8k_get_stats,
3789 .ampdu_action = mwl8k_ampdu_action,
3792 static void mwl8k_finalize_join_worker(struct work_struct *work)
3794 struct mwl8k_priv *priv =
3795 container_of(work, struct mwl8k_priv, finalize_join_worker);
3796 struct sk_buff *skb = priv->beacon_skb;
3797 struct ieee80211_mgmt *mgmt = (void *)skb->data;
3798 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
3799 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
3800 mgmt->u.beacon.variable, len);
3801 int dtim_period = 1;
3803 if (tim && tim[1] >= 2)
3804 dtim_period = tim[3];
3806 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
3809 priv->beacon_skb = NULL;
3818 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3820 .part_name = "88w8363",
3821 .helper_image = "mwl8k/helper_8363.fw",
3822 .fw_image = "mwl8k/fmimage_8363.fw",
3825 .part_name = "88w8687",
3826 .helper_image = "mwl8k/helper_8687.fw",
3827 .fw_image = "mwl8k/fmimage_8687.fw",
3830 .part_name = "88w8366",
3831 .helper_image = "mwl8k/helper_8366.fw",
3832 .fw_image = "mwl8k/fmimage_8366.fw",
3833 .ap_rxd_ops = &rxd_8366_ap_ops,
3837 MODULE_FIRMWARE("mwl8k/helper_8363.fw");
3838 MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
3839 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
3840 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
3841 MODULE_FIRMWARE("mwl8k/helper_8366.fw");
3842 MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
3844 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3845 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
3846 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3847 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3848 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3849 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3850 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3851 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
3854 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3856 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3857 const struct pci_device_id *id)
3859 static int printed_version = 0;
3860 struct ieee80211_hw *hw;
3861 struct mwl8k_priv *priv;
3865 if (!printed_version) {
3866 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3867 printed_version = 1;
3871 rc = pci_enable_device(pdev);
3873 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3878 rc = pci_request_regions(pdev, MWL8K_NAME);
3880 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3882 goto err_disable_device;
3885 pci_set_master(pdev);
3888 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3890 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3895 SET_IEEE80211_DEV(hw, &pdev->dev);
3896 pci_set_drvdata(pdev, hw);
3901 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3904 priv->sram = pci_iomap(pdev, 0, 0x10000);
3905 if (priv->sram == NULL) {
3906 wiphy_err(hw->wiphy, "cannot map device sram\n");
3911 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3912 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3914 priv->regs = pci_iomap(pdev, 1, 0x10000);
3915 if (priv->regs == NULL) {
3916 priv->regs = pci_iomap(pdev, 2, 0x10000);
3917 if (priv->regs == NULL) {
3918 wiphy_err(hw->wiphy, "cannot map device registers\n");
3924 /* Reset firmware and hardware */
3925 mwl8k_hw_reset(priv);
3927 /* Ask userland hotplug daemon for the device firmware */
3928 rc = mwl8k_request_firmware(priv);
3930 wiphy_err(hw->wiphy, "firmware files not found\n");
3931 goto err_stop_firmware;
3934 /* Load firmware into hardware */
3935 rc = mwl8k_load_firmware(hw);
3937 wiphy_err(hw->wiphy, "cannot start firmware\n");
3938 goto err_stop_firmware;
3941 /* Reclaim memory once firmware is successfully loaded */
3942 mwl8k_release_firmware(priv);
3946 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3947 if (priv->rxd_ops == NULL) {
3948 wiphy_err(hw->wiphy,
3949 "Driver does not have AP firmware image support for this hardware\n");
3950 goto err_stop_firmware;
3953 priv->rxd_ops = &rxd_sta_ops;
3956 priv->sniffer_enabled = false;
3957 priv->wmm_enabled = false;
3958 priv->pending_tx_pkts = 0;
3962 * Extra headroom is the size of the required DMA header
3963 * minus the size of the smallest 802.11 frame (CTS frame).
3965 hw->extra_tx_headroom =
3966 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3968 hw->channel_change_time = 10;
3970 hw->queues = MWL8K_TX_QUEUES;
3972 /* Set rssi values to dBm */
3973 hw->flags |= IEEE80211_HW_SIGNAL_DBM;
3974 hw->vif_data_size = sizeof(struct mwl8k_vif);
3975 hw->sta_data_size = sizeof(struct mwl8k_sta);
3977 priv->macids_used = 0;
3978 INIT_LIST_HEAD(&priv->vif_list);
3980 /* Set default radio state and preamble */
3982 priv->radio_short_preamble = 0;
3984 /* Finalize join worker */
3985 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3987 /* TX reclaim and RX tasklets. */
3988 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
3989 tasklet_disable(&priv->poll_tx_task);
3990 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
3991 tasklet_disable(&priv->poll_rx_task);
3993 /* Power management cookie */
3994 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3995 if (priv->cookie == NULL)
3996 goto err_stop_firmware;
3998 rc = mwl8k_rxq_init(hw, 0);
4000 goto err_free_cookie;
4001 rxq_refill(hw, 0, INT_MAX);
4003 mutex_init(&priv->fw_mutex);
4004 priv->fw_mutex_owner = NULL;
4005 priv->fw_mutex_depth = 0;
4006 priv->hostcmd_wait = NULL;
4008 spin_lock_init(&priv->tx_lock);
4010 priv->tx_wait = NULL;
4012 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4013 rc = mwl8k_txq_init(hw, i);
4015 goto err_free_queues;
4018 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4019 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4020 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
4021 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
4022 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
4024 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
4025 IRQF_SHARED, MWL8K_NAME, hw);
4027 wiphy_err(hw->wiphy, "failed to register irq handler\n");
4028 goto err_free_queues;
4032 * Temporarily enable interrupts. Initial firmware host
4033 * commands use interrupts and avoid polling. Disable
4034 * interrupts when done.
4036 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4038 /* Get config data, mac addrs etc */
4040 rc = mwl8k_cmd_get_hw_spec_ap(hw);
4042 rc = mwl8k_cmd_set_hw_spec(hw);
4044 rc = mwl8k_cmd_get_hw_spec_sta(hw);
4047 wiphy_err(hw->wiphy, "cannot initialise firmware\n");
4051 hw->wiphy->interface_modes = 0;
4052 if (priv->ap_macids_supported)
4053 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
4054 if (priv->sta_macids_supported)
4055 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
4058 /* Turn radio off */
4059 rc = mwl8k_cmd_radio_disable(hw);
4061 wiphy_err(hw->wiphy, "cannot disable\n");
4065 /* Clear MAC address */
4066 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
4068 wiphy_err(hw->wiphy, "cannot clear mac address\n");
4072 /* Disable interrupts */
4073 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4074 free_irq(priv->pdev->irq, hw);
4076 rc = ieee80211_register_hw(hw);
4078 wiphy_err(hw->wiphy, "cannot register device\n");
4079 goto err_free_queues;
4082 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
4083 priv->device_info->part_name,
4084 priv->hw_rev, hw->wiphy->perm_addr,
4085 priv->ap_fw ? "AP" : "STA",
4086 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
4087 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
4092 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4093 free_irq(priv->pdev->irq, hw);
4096 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4097 mwl8k_txq_deinit(hw, i);
4098 mwl8k_rxq_deinit(hw, 0);
4101 if (priv->cookie != NULL)
4102 pci_free_consistent(priv->pdev, 4,
4103 priv->cookie, priv->cookie_dma);
4106 mwl8k_hw_reset(priv);
4107 mwl8k_release_firmware(priv);
4110 if (priv->regs != NULL)
4111 pci_iounmap(pdev, priv->regs);
4113 if (priv->sram != NULL)
4114 pci_iounmap(pdev, priv->sram);
4116 pci_set_drvdata(pdev, NULL);
4117 ieee80211_free_hw(hw);
4120 pci_release_regions(pdev);
4123 pci_disable_device(pdev);
4128 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
4130 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4133 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4135 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4136 struct mwl8k_priv *priv;
4143 ieee80211_stop_queues(hw);
4145 ieee80211_unregister_hw(hw);
4147 /* Remove TX reclaim and RX tasklets. */
4148 tasklet_kill(&priv->poll_tx_task);
4149 tasklet_kill(&priv->poll_rx_task);
4152 mwl8k_hw_reset(priv);
4154 /* Return all skbs to mac80211 */
4155 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4156 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4158 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4159 mwl8k_txq_deinit(hw, i);
4161 mwl8k_rxq_deinit(hw, 0);
4163 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4165 pci_iounmap(pdev, priv->regs);
4166 pci_iounmap(pdev, priv->sram);
4167 pci_set_drvdata(pdev, NULL);
4168 ieee80211_free_hw(hw);
4169 pci_release_regions(pdev);
4170 pci_disable_device(pdev);
4173 static struct pci_driver mwl8k_driver = {
4175 .id_table = mwl8k_pci_id_table,
4176 .probe = mwl8k_probe,
4177 .remove = __devexit_p(mwl8k_remove),
4178 .shutdown = __devexit_p(mwl8k_shutdown),
4181 static int __init mwl8k_init(void)
4183 return pci_register_driver(&mwl8k_driver);
4186 static void __exit mwl8k_exit(void)
4188 pci_unregister_driver(&mwl8k_driver);
4191 module_init(mwl8k_init);
4192 module_exit(mwl8k_exit);
4194 MODULE_DESCRIPTION(MWL8K_DESC);
4195 MODULE_VERSION(MWL8K_VERSION);
4196 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4197 MODULE_LICENSE("GPL");