drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/pci.h>
  34 #include <linux/slab.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/delay.h>
  37 #include <linux/sched.h>
  38 #include <linux/skbuff.h>
  39 #include <linux/netdevice.h>
  40 #include <linux/wireless.h>
  41 #include <linux/firmware.h>
  42 #include <linux/etherdevice.h>
  43 #include <linux/if_arp.h>
  44
  45 #include <net/mac80211.h>
  46
  47 #include <asm/div64.h>
  48
  49 #define DRV_NAME        "iwlagn"
  50
  51 #include "iwl-eeprom.h"
  52 #include "iwl-dev.h"
  53 #include "iwl-core.h"
  54 #include "iwl-io.h"
  55 #include "iwl-helpers.h"
  56 #include "iwl-sta.h"
  57 #include "iwl-calib.h"
  58 #include "iwl-agn.h"
  59
  60
  61 /******************************************************************************
  62  *
  63  * module boiler plate
  64  *
  65  ******************************************************************************/
  66
  67 /*
  68  * module name, copyright, version, etc.
  69  */
  70 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  71
  72 #ifdef CONFIG_IWLWIFI_DEBUG
  73 #define VD "d"
  74 #else
  75 #define VD
  76 #endif
  77
  78 #define DRV_VERSION     IWLWIFI_VERSION VD
  79
  80
  81 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  82 MODULE_VERSION(DRV_VERSION);
  83 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  84 MODULE_LICENSE("GPL");
  85 MODULE_ALIAS("iwl4965");
  86
  87 /**
  88  * iwl_commit_rxon - commit staging_rxon to hardware
  89  *
  90  * The RXON command in staging_rxon is committed to the hardware and
  91  * the active_rxon structure is updated with the new data.  This
  92  * function correctly transitions out of the RXON_ASSOC_MSK state if
  93  * a HW tune is required based on the RXON structure changes.
  94  */
  95 int iwl_commit_rxon(struct iwl_priv *priv)
  96 {
  97         /* cast away the const for active_rxon in this function */
  98         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  99         int ret;
 100         bool new_assoc =
 101                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 102
 103         if (!iwl_is_alive(priv))
 104                 return -EBUSY;
 105
 106         /* always get timestamp with Rx frame */
 107         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 108
 109         ret = iwl_check_rxon_cmd(priv);
 110         if (ret) {
 111                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 112                 return -EINVAL;
 113         }
 114
 115         /*
 116          * receive commit_rxon request
 117          * abort any previous channel switch if still in process
 118          */
 119         if (priv->switch_rxon.switch_in_progress &&
 120             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 121                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 122                       le16_to_cpu(priv->switch_rxon.channel));
 123                 priv->switch_rxon.switch_in_progress = false;
 124         }
 125
 126         /* If we don't need to send a full RXON, we can use
 127          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 128          * and other flags for the current radio configuration. */
 129         if (!iwl_full_rxon_required(priv)) {
 130                 ret = iwl_send_rxon_assoc(priv);
 131                 if (ret) {
 132                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 133                         return ret;
 134                 }
 135
 136                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 137                 iwl_print_rx_config_cmd(priv);
 138                 return 0;
 139         }
 140
 141         /* If we are currently associated and the new config requires
 142          * an RXON_ASSOC and the new config wants the associated mask enabled,
 143          * we must clear the associated from the active configuration
 144          * before we apply the new config */
 145         if (iwl_is_associated(priv) && new_assoc) {
 146                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 147                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 148
 149                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 150                                       sizeof(struct iwl_rxon_cmd),
 151                                       &priv->active_rxon);
 152
 153                 /* If the mask clearing failed then we set
 154                  * active_rxon back to what it was previously */
 155                 if (ret) {
 156                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 157                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 158                         return ret;
 159                 }
 160                 iwl_clear_ucode_stations(priv);
 161                 iwl_restore_stations(priv);
 162                 ret = iwl_restore_default_wep_keys(priv);
 163                 if (ret) {
 164                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 165                         return ret;
 166                 }
 167         }
 168
 169         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 170                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 171                        "* channel = %d\n"
 172                        "* bssid = %pM\n",
 173                        (new_assoc ? "" : "out"),
 174                        le16_to_cpu(priv->staging_rxon.channel),
 175                        priv->staging_rxon.bssid_addr);
 176
 177         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 178
 179         /* Apply the new configuration
 180          * RXON unassoc clears the station table in uCode so restoration of
 181          * stations is needed after it (the RXON command) completes
 182          */
 183         if (!new_assoc) {
 184                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 185                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 186                 if (ret) {
 187                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 188                         return ret;
 189                 }
 190                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
 191                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 192                 iwl_clear_ucode_stations(priv);
 193                 iwl_restore_stations(priv);
 194                 ret = iwl_restore_default_wep_keys(priv);
 195                 if (ret) {
 196                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 197                         return ret;
 198                 }
 199         }
 200
 201         priv->start_calib = 0;
 202         if (new_assoc) {
 203                 /*
 204                  * allow CTS-to-self if possible for new association.
 205                  * this is relevant only for 5000 series and up,
 206                  * but will not damage 4965
 207                  */
 208                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 209
 210                 /* Apply the new configuration
 211                  * RXON assoc doesn't clear the station table in uCode,
 212                  */
 213                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 214                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 215                 if (ret) {
 216                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 217                         return ret;
 218                 }
 219                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 220         }
 221         iwl_print_rx_config_cmd(priv);
 222
 223         iwl_init_sensitivity(priv);
 224
 225         /* If we issue a new RXON command which required a tune then we must
 226          * send a new TXPOWER command or we won't be able to Tx any frames */
 227         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 228         if (ret) {
 229                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 230                 return ret;
 231         }
 232
 233         return 0;
 234 }
 235
 236 void iwl_update_chain_flags(struct iwl_priv *priv)
 237 {
 238
 239         if (priv->cfg->ops->hcmd->set_rxon_chain)
 240                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 241         iwlcore_commit_rxon(priv);
 242 }
 243
 244 static void iwl_clear_free_frames(struct iwl_priv *priv)
 245 {
 246         struct list_head *element;
 247
 248         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 249                        priv->frames_count);
 250
 251         while (!list_empty(&priv->free_frames)) {
 252                 element = priv->free_frames.next;
 253                 list_del(element);
 254                 kfree(list_entry(element, struct iwl_frame, list));
 255                 priv->frames_count--;
 256         }
 257
 258         if (priv->frames_count) {
 259                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 260                             priv->frames_count);
 261                 priv->frames_count = 0;
 262         }
 263 }
 264
 265 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 266 {
 267         struct iwl_frame *frame;
 268         struct list_head *element;
 269         if (list_empty(&priv->free_frames)) {
 270                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 271                 if (!frame) {
 272                         IWL_ERR(priv, "Could not allocate frame!\n");
 273                         return NULL;
 274                 }
 275
 276                 priv->frames_count++;
 277                 return frame;
 278         }
 279
 280         element = priv->free_frames.next;
 281         list_del(element);
 282         return list_entry(element, struct iwl_frame, list);
 283 }
 284
 285 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 286 {
 287         memset(frame, 0, sizeof(*frame));
 288         list_add(&frame->list, &priv->free_frames);
 289 }
 290
 291 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 292                                           struct ieee80211_hdr *hdr,
 293                                           int left)
 294 {
 295         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
 296             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
 297              (priv->iw_mode != NL80211_IFTYPE_AP)))
 298                 return 0;
 299
 300         if (priv->ibss_beacon->len > left)
 301                 return 0;
 302
 303         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 304
 305         return priv->ibss_beacon->len;
 306 }
 307
 308 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 309 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 310                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 311                 u8 *beacon, u32 frame_size)
 312 {
 313         u16 tim_idx;
 314         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 315
 316         /*
 317          * The index is relative to frame start but we start looking at the
 318          * variable-length part of the beacon.
 319          */
 320         tim_idx = mgmt->u.beacon.variable - beacon;
 321
 322         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 323         while ((tim_idx < (frame_size - 2)) &&
 324                         (beacon[tim_idx] != WLAN_EID_TIM))
 325                 tim_idx += beacon[tim_idx+1] + 2;
 326
 327         /* If TIM field was found, set variables */
 328         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 329                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 330                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 331         } else
 332                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 333 }
 334
 335 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 336                                        struct iwl_frame *frame)
 337 {
 338         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 339         u32 frame_size;
 340         u32 rate_flags;
 341         u32 rate;
 342         /*
 343          * We have to set up the TX command, the TX Beacon command, and the
 344          * beacon contents.
 345          */
 346
 347         /* Initialize memory */
 348         tx_beacon_cmd = &frame->u.beacon;
 349         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 350
 351         /* Set up TX beacon contents */
 352         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 353                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 354         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 355                 return 0;
 356
 357         /* Set up TX command fields */
 358         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 359         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 360         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 361         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 362                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 363
 364         /* Set up TX beacon command fields */
 365         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 366                         frame_size);
 367
 368         /* Set up packet rate and flags */
 369         rate = iwl_rate_get_lowest_plcp(priv);
 370         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
 371         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 372         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 373                 rate_flags |= RATE_MCS_CCK_MSK;
 374         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 375                         rate_flags);
 376
 377         return sizeof(*tx_beacon_cmd) + frame_size;
 378 }
 379 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 380 {
 381         struct iwl_frame *frame;
 382         unsigned int frame_size;
 383         int rc;
 384
 385         frame = iwl_get_free_frame(priv);
 386         if (!frame) {
 387                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 388                           "command.\n");
 389                 return -ENOMEM;
 390         }
 391
 392         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 393         if (!frame_size) {
 394                 IWL_ERR(priv, "Error configuring the beacon command\n");
 395                 iwl_free_frame(priv, frame);
 396                 return -EINVAL;
 397         }
 398
 399         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 400                               &frame->u.cmd[0]);
 401
 402         iwl_free_frame(priv, frame);
 403
 404         return rc;
 405 }
 406
 407 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 408 {
 409         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 410
 411         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 412         if (sizeof(dma_addr_t) > sizeof(u32))
 413                 addr |=
 414                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 415
 416         return addr;
 417 }
 418
 419 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 420 {
 421         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 422
 423         return le16_to_cpu(tb->hi_n_len) >> 4;
 424 }
 425
 426 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 427                                   dma_addr_t addr, u16 len)
 428 {
 429         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 430         u16 hi_n_len = len << 4;
 431
 432         put_unaligned_le32(addr, &tb->lo);
 433         if (sizeof(dma_addr_t) > sizeof(u32))
 434                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 435
 436         tb->hi_n_len = cpu_to_le16(hi_n_len);
 437
 438         tfd->num_tbs = idx + 1;
 439 }
 440
 441 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 442 {
 443         return tfd->num_tbs & 0x1f;
 444 }
 445
 446 /**
 447  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 448  * @priv - driver private data
 449  * @txq - tx queue
 450  *
 451  * Does NOT advance any TFD circular buffer read/write indexes
 452  * Does NOT free the TFD itself (which is within circular buffer)
 453  */
 454 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 455 {
 456         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 457         struct iwl_tfd *tfd;
 458         struct pci_dev *dev = priv->pci_dev;
 459         int index = txq->q.read_ptr;
 460         int i;
 461         int num_tbs;
 462
 463         tfd = &tfd_tmp[index];
 464
 465         /* Sanity check on number of chunks */
 466         num_tbs = iwl_tfd_get_num_tbs(tfd);
 467
 468         if (num_tbs >= IWL_NUM_OF_TBS) {
 469                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 470                 /* @todo issue fatal error, it is quite serious situation */
 471                 return;
 472         }
 473
 474         /* Unmap tx_cmd */
 475         if (num_tbs)
 476                 pci_unmap_single(dev,
 477                                 pci_unmap_addr(&txq->meta[index], mapping),
 478                                 pci_unmap_len(&txq->meta[index], len),
 479                                 PCI_DMA_BIDIRECTIONAL);
 480
 481         /* Unmap chunks, if any. */
 482         for (i = 1; i < num_tbs; i++) {
 483                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 484                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 485
 486                 if (txq->txb) {
 487                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
 488                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
 489                 }
 490         }
 491 }
 492
 493 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 494                                  struct iwl_tx_queue *txq,
 495                                  dma_addr_t addr, u16 len,
 496                                  u8 reset, u8 pad)
 497 {
 498         struct iwl_queue *q;
 499         struct iwl_tfd *tfd, *tfd_tmp;
 500         u32 num_tbs;
 501
 502         q = &txq->q;
 503         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 504         tfd = &tfd_tmp[q->write_ptr];
 505
 506         if (reset)
 507                 memset(tfd, 0, sizeof(*tfd));
 508
 509         num_tbs = iwl_tfd_get_num_tbs(tfd);
 510
 511         /* Each TFD can point to a maximum 20 Tx buffers */
 512         if (num_tbs >= IWL_NUM_OF_TBS) {
 513                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 514                           IWL_NUM_OF_TBS);
 515                 return -EINVAL;
 516         }
 517
 518         BUG_ON(addr & ~DMA_BIT_MASK(36));
 519         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 520                 IWL_ERR(priv, "Unaligned address = %llx\n",
 521                           (unsigned long long)addr);
 522
 523         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 524
 525         return 0;
 526 }
 527
 528 /*
 529  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 530  * given Tx queue, and enable the DMA channel used for that queue.
 531  *
 532  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 533  * channels supported in hardware.
 534  */
 535 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 536                          struct iwl_tx_queue *txq)
 537 {
 538         int txq_id = txq->q.id;
 539
 540         /* Circular buffer (TFD queue in DRAM) physical base address */
 541         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 542                              txq->q.dma_addr >> 8);
 543
 544         return 0;
 545 }
 546
 547 /******************************************************************************
 548  *
 549  * Generic RX handler implementations
 550  *
 551  ******************************************************************************/
 552 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 553                                 struct iwl_rx_mem_buffer *rxb)
 554 {
 555         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 556         struct iwl_alive_resp *palive;
 557         struct delayed_work *pwork;
 558
 559         palive = &pkt->u.alive_frame;
 560
 561         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 562                        "0x%01X 0x%01X\n",
 563                        palive->is_valid, palive->ver_type,
 564                        palive->ver_subtype);
 565
 566         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 567                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 568                 memcpy(&priv->card_alive_init,
 569                        &pkt->u.alive_frame,
 570                        sizeof(struct iwl_init_alive_resp));
 571                 pwork = &priv->init_alive_start;
 572         } else {
 573                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 574                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 575                        sizeof(struct iwl_alive_resp));
 576                 pwork = &priv->alive_start;
 577         }
 578
 579         /* We delay the ALIVE response by 5ms to
 580          * give the HW RF Kill time to activate... */
 581         if (palive->is_valid == UCODE_VALID_OK)
 582                 queue_delayed_work(priv->workqueue, pwork,
 583                                    msecs_to_jiffies(5));
 584         else
 585                 IWL_WARN(priv, "uCode did not respond OK.\n");
 586 }
 587
 588 static void iwl_bg_beacon_update(struct work_struct *work)
 589 {
 590         struct iwl_priv *priv =
 591                 container_of(work, struct iwl_priv, beacon_update);
 592         struct sk_buff *beacon;
 593
 594         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 595         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 596
 597         if (!beacon) {
 598                 IWL_ERR(priv, "update beacon failed\n");
 599                 return;
 600         }
 601
 602         mutex_lock(&priv->mutex);
 603         /* new beacon skb is allocated every time; dispose previous.*/
 604         if (priv->ibss_beacon)
 605                 dev_kfree_skb(priv->ibss_beacon);
 606
 607         priv->ibss_beacon = beacon;
 608         mutex_unlock(&priv->mutex);
 609
 610         iwl_send_beacon_cmd(priv);
 611 }
 612
 613 /**
 614  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 615  *
 616  * This callback is provided in order to send a statistics request.
 617  *
 618  * This timer function is continually reset to execute within
 619  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 620  * was received.  We need to ensure we receive the statistics in order
 621  * to update the temperature used for calibrating the TXPOWER.
 622  */
 623 static void iwl_bg_statistics_periodic(unsigned long data)
 624 {
 625         struct iwl_priv *priv = (struct iwl_priv *)data;
 626
 627         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 628                 return;
 629
 630         /* dont send host command if rf-kill is on */
 631         if (!iwl_is_ready_rf(priv))
 632                 return;
 633
 634         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 635 }
 636
 637
 638 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 639                                         u32 start_idx, u32 num_events,
 640                                         u32 mode)
 641 {
 642         u32 i;
 643         u32 ptr;        /* SRAM byte address of log data */
 644         u32 ev, time, data; /* event log data */
 645         unsigned long reg_flags;
 646
 647         if (mode == 0)
 648                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 649         else
 650                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 651
 652         /* Make sure device is powered up for SRAM reads */
 653         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 654         if (iwl_grab_nic_access(priv)) {
 655                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 656                 return;
 657         }
 658
 659         /* Set starting address; reads will auto-increment */
 660         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 661         rmb();
 662
 663         /*
 664          * "time" is actually "data" for mode 0 (no timestamp).
 665          * place event id # at far right for easier visual parsing.
 666          */
 667         for (i = 0; i < num_events; i++) {
 668                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 669                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 670                 if (mode == 0) {
 671                         trace_iwlwifi_dev_ucode_cont_event(priv,
 672                                                         0, time, ev);
 673                 } else {
 674                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 675                         trace_iwlwifi_dev_ucode_cont_event(priv,
 676                                                 time, data, ev);
 677                 }
 678         }
 679         /* Allow device to power down */
 680         iwl_release_nic_access(priv);
 681         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 682 }
 683
 684 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 685 {
 686         u32 capacity;   /* event log capacity in # entries */
 687         u32 base;       /* SRAM byte address of event log header */
 688         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 689         u32 num_wraps;  /* # times uCode wrapped to top of log */
 690         u32 next_entry; /* index of next entry to be written by uCode */
 691
 692         if (priv->ucode_type == UCODE_INIT)
 693                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 694         else
 695                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 696         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 697                 capacity = iwl_read_targ_mem(priv, base);
 698                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 699                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 700                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 701         } else
 702                 return;
 703
 704         if (num_wraps == priv->event_log.num_wraps) {
 705                 iwl_print_cont_event_trace(priv,
 706                                        base, priv->event_log.next_entry,
 707                                        next_entry - priv->event_log.next_entry,
 708                                        mode);
 709                 priv->event_log.non_wraps_count++;
 710         } else {
 711                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 712                         priv->event_log.wraps_more_count++;
 713                 else
 714                         priv->event_log.wraps_once_count++;
 715                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 716                                 num_wraps - priv->event_log.num_wraps,
 717                                 next_entry, priv->event_log.next_entry);
 718                 if (next_entry < priv->event_log.next_entry) {
 719                         iwl_print_cont_event_trace(priv, base,
 720                                priv->event_log.next_entry,
 721                                capacity - priv->event_log.next_entry,
 722                                mode);
 723
 724                         iwl_print_cont_event_trace(priv, base, 0,
 725                                 next_entry, mode);
 726                 } else {
 727                         iwl_print_cont_event_trace(priv, base,
 728                                next_entry, capacity - next_entry,
 729                                mode);
 730
 731                         iwl_print_cont_event_trace(priv, base, 0,
 732                                 next_entry, mode);
 733                 }
 734         }
 735         priv->event_log.num_wraps = num_wraps;
 736         priv->event_log.next_entry = next_entry;
 737 }
 738
 739 /**
 740  * iwl_bg_ucode_trace - Timer callback to log ucode event
 741  *
 742  * The timer is continually set to execute every
 743  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 744  * this function is to perform continuous uCode event logging operation
 745  * if enabled
 746  */
 747 static void iwl_bg_ucode_trace(unsigned long data)
 748 {
 749         struct iwl_priv *priv = (struct iwl_priv *)data;
 750
 751         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 752                 return;
 753
 754         if (priv->event_log.ucode_trace) {
 755                 iwl_continuous_event_trace(priv);
 756                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 757                 mod_timer(&priv->ucode_trace,
 758                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 759         }
 760 }
 761
 762 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 763                                 struct iwl_rx_mem_buffer *rxb)
 764 {
 765 #ifdef CONFIG_IWLWIFI_DEBUG
 766         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 767         struct iwl4965_beacon_notif *beacon =
 768                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 769         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 770
 771         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 772                 "tsf %d %d rate %d\n",
 773                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 774                 beacon->beacon_notify_hdr.failure_frame,
 775                 le32_to_cpu(beacon->ibss_mgr_status),
 776                 le32_to_cpu(beacon->high_tsf),
 777                 le32_to_cpu(beacon->low_tsf), rate);
 778 #endif
 779
 780         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 781             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 782                 queue_work(priv->workqueue, &priv->beacon_update);
 783 }
 784
 785 /* Handle notification from uCode that card's power state is changing
 786  * due to software, hardware, or critical temperature RFKILL */
 787 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 788                                     struct iwl_rx_mem_buffer *rxb)
 789 {
 790         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 791         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 792         unsigned long status = priv->status;
 793
 794         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 795                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 796                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 797                           (flags & CT_CARD_DISABLED) ?
 798                           "Reached" : "Not reached");
 799
 800         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 801                      CT_CARD_DISABLED)) {
 802
 803                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 804                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 805
 806                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 807                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 808
 809                 if (!(flags & RXON_CARD_DISABLED)) {
 810                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 811                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 812                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 813                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 814                 }
 815                 if (flags & CT_CARD_DISABLED)
 816                         iwl_tt_enter_ct_kill(priv);
 817         }
 818         if (!(flags & CT_CARD_DISABLED))
 819                 iwl_tt_exit_ct_kill(priv);
 820
 821         if (flags & HW_CARD_DISABLED)
 822                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 823         else
 824                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 825
 826
 827         if (!(flags & RXON_CARD_DISABLED))
 828                 iwl_scan_cancel(priv);
 829
 830         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 831              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 832                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 833                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 834         else
 835                 wake_up_interruptible(&priv->wait_command_queue);
 836 }
 837
 838 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 839 {
 840         if (src == IWL_PWR_SRC_VAUX) {
 841                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 842                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 843                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 844                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 845         } else {
 846                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 847                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 848                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 849         }
 850
 851         return 0;
 852 }
 853
 854 /**
 855  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 856  *
 857  * Setup the RX handlers for each of the reply types sent from the uCode
 858  * to the host.
 859  *
 860  * This function chains into the hardware specific files for them to setup
 861  * any hardware specific handlers as well.
 862  */
 863 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 864 {
 865         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 866         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 867         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 868         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 869                         iwl_rx_spectrum_measure_notif;
 870         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 871         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 872             iwl_rx_pm_debug_statistics_notif;
 873         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 874
 875         /*
 876          * The same handler is used for both the REPLY to a discrete
 877          * statistics request from the host as well as for the periodic
 878          * statistics notifications (after received beacons) from the uCode.
 879          */
 880         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 881         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 882
 883         iwl_setup_rx_scan_handlers(priv);
 884
 885         /* status change handler */
 886         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 887
 888         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 889             iwl_rx_missed_beacon_notif;
 890         /* Rx handlers */
 891         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 892         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 893         /* block ack */
 894         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 895         /* Set up hardware specific Rx handlers */
 896         priv->cfg->ops->lib->rx_handler_setup(priv);
 897 }
 898
 899 /**
 900  * iwl_rx_handle - Main entry function for receiving responses from uCode
 901  *
 902  * Uses the priv->rx_handlers callback function array to invoke
 903  * the appropriate handlers, including command responses,
 904  * frame-received notifications, and other notifications.
 905  */
 906 void iwl_rx_handle(struct iwl_priv *priv)
 907 {
 908         struct iwl_rx_mem_buffer *rxb;
 909         struct iwl_rx_packet *pkt;
 910         struct iwl_rx_queue *rxq = &priv->rxq;
 911         u32 r, i;
 912         int reclaim;
 913         unsigned long flags;
 914         u8 fill_rx = 0;
 915         u32 count = 8;
 916         int total_empty;
 917
 918         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 919          * buffer that the driver may process (last buffer filled by ucode). */
 920         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 921         i = rxq->read;
 922
 923         /* Rx interrupt, but nothing sent from uCode */
 924         if (i == r)
 925                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 926
 927         /* calculate total frames need to be restock after handling RX */
 928         total_empty = r - rxq->write_actual;
 929         if (total_empty < 0)
 930                 total_empty += RX_QUEUE_SIZE;
 931
 932         if (total_empty > (RX_QUEUE_SIZE / 2))
 933                 fill_rx = 1;
 934
 935         while (i != r) {
 936                 rxb = rxq->queue[i];
 937
 938                 /* If an RXB doesn't have a Rx queue slot associated with it,
 939                  * then a bug has been introduced in the queue refilling
 940                  * routines -- catch it here */
 941                 BUG_ON(rxb == NULL);
 942
 943                 rxq->queue[i] = NULL;
 944
 945                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 946                                PAGE_SIZE << priv->hw_params.rx_page_order,
 947                                PCI_DMA_FROMDEVICE);
 948                 pkt = rxb_addr(rxb);
 949
 950                 trace_iwlwifi_dev_rx(priv, pkt,
 951                         le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 952
 953                 /* Reclaim a command buffer only if this packet is a response
 954                  *   to a (driver-originated) command.
 955                  * If the packet (e.g. Rx frame) originated from uCode,
 956                  *   there is no command buffer to reclaim.
 957                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 958                  *   but apparently a few don't get set; catch them here. */
 959                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 960                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 961                         (pkt->hdr.cmd != REPLY_RX) &&
 962                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 963                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 964                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 965                         (pkt->hdr.cmd != REPLY_TX);
 966
 967                 /* Based on type of command response or notification,
 968                  *   handle those that need handling via function in
 969                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 970                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 971                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 972                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 973                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 974                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 975                 } else {
 976                         /* No handling needed */
 977                         IWL_DEBUG_RX(priv,
 978                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 979                                 r, i, get_cmd_string(pkt->hdr.cmd),
 980                                 pkt->hdr.cmd);
 981                 }
 982
 983                 /*
 984                  * XXX: After here, we should always check rxb->page
 985                  * against NULL before touching it or its virtual
 986                  * memory (pkt). Because some rx_handler might have
 987                  * already taken or freed the pages.
 988                  */
 989
 990                 if (reclaim) {
 991                         /* Invoke any callbacks, transfer the buffer to caller,
 992                          * and fire off the (possibly) blocking iwl_send_cmd()
 993                          * as we reclaim the driver command queue */
 994                         if (rxb->page)
 995                                 iwl_tx_cmd_complete(priv, rxb);
 996                         else
 997                                 IWL_WARN(priv, "Claim null rxb?\n");
 998                 }
 999
1000                 /* Reuse the page if possible. For notification packets and
1001                  * SKBs that fail to Rx correctly, add them back into the
1002                  * rx_free list for reuse later. */
1003                 spin_lock_irqsave(&rxq->lock, flags);
1004                 if (rxb->page != NULL) {
1005                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1006                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1007                                 PCI_DMA_FROMDEVICE);
1008                         list_add_tail(&rxb->list, &rxq->rx_free);
1009                         rxq->free_count++;
1010                 } else
1011                         list_add_tail(&rxb->list, &rxq->rx_used);
1012
1013                 spin_unlock_irqrestore(&rxq->lock, flags);
1014
1015                 i = (i + 1) & RX_QUEUE_MASK;
1016                 /* If there are a lot of unused frames,
1017                  * restock the Rx queue so ucode wont assert. */
1018                 if (fill_rx) {
1019                         count++;
1020                         if (count >= 8) {
1021                                 rxq->read = i;
1022                                 iwlagn_rx_replenish_now(priv);
1023                                 count = 0;
1024                         }
1025                 }
1026         }
1027
1028         /* Backtrack one entry */
1029         rxq->read = i;
1030         if (fill_rx)
1031                 iwlagn_rx_replenish_now(priv);
1032         else
1033                 iwlagn_rx_queue_restock(priv);
1034 }
1035
1036 /* call this function to flush any scheduled tasklet */
1037 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1038 {
1039         /* wait to make sure we flush pending tasklet*/
1040         synchronize_irq(priv->pci_dev->irq);
1041         tasklet_kill(&priv->irq_tasklet);
1042 }
1043
1044 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1045 {
1046         u32 inta, handled = 0;
1047         u32 inta_fh;
1048         unsigned long flags;
1049         u32 i;
1050 #ifdef CONFIG_IWLWIFI_DEBUG
1051         u32 inta_mask;
1052 #endif
1053
1054         spin_lock_irqsave(&priv->lock, flags);
1055
1056         /* Ack/clear/reset pending uCode interrupts.
1057          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1058          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1059         inta = iwl_read32(priv, CSR_INT);
1060         iwl_write32(priv, CSR_INT, inta);
1061
1062         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1063          * Any new interrupts that happen after this, either while we're
1064          * in this tasklet, or later, will show up in next ISR/tasklet. */
1065         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1066         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1067
1068 #ifdef CONFIG_IWLWIFI_DEBUG
1069         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1070                 /* just for debug */
1071                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1072                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1073                               inta, inta_mask, inta_fh);
1074         }
1075 #endif
1076
1077         spin_unlock_irqrestore(&priv->lock, flags);
1078
1079         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1080          * atomic, make sure that inta covers all the interrupts that
1081          * we've discovered, even if FH interrupt came in just after
1082          * reading CSR_INT. */
1083         if (inta_fh & CSR49_FH_INT_RX_MASK)
1084                 inta |= CSR_INT_BIT_FH_RX;
1085         if (inta_fh & CSR49_FH_INT_TX_MASK)
1086                 inta |= CSR_INT_BIT_FH_TX;
1087
1088         /* Now service all interrupt bits discovered above. */
1089         if (inta & CSR_INT_BIT_HW_ERR) {
1090                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1091
1092                 /* Tell the device to stop sending interrupts */
1093                 iwl_disable_interrupts(priv);
1094
1095                 priv->isr_stats.hw++;
1096                 iwl_irq_handle_error(priv);
1097
1098                 handled |= CSR_INT_BIT_HW_ERR;
1099
1100                 return;
1101         }
1102
1103 #ifdef CONFIG_IWLWIFI_DEBUG
1104         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1105                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1106                 if (inta & CSR_INT_BIT_SCD) {
1107                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1108                                       "the frame/frames.\n");
1109                         priv->isr_stats.sch++;
1110                 }
1111
1112                 /* Alive notification via Rx interrupt will do the real work */
1113                 if (inta & CSR_INT_BIT_ALIVE) {
1114                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1115                         priv->isr_stats.alive++;
1116                 }
1117         }
1118 #endif
1119         /* Safely ignore these bits for debug checks below */
1120         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1121
1122         /* HW RF KILL switch toggled */
1123         if (inta & CSR_INT_BIT_RF_KILL) {
1124                 int hw_rf_kill = 0;
1125                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1126                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1127                         hw_rf_kill = 1;
1128
1129                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1130                                 hw_rf_kill ? "disable radio" : "enable radio");
1131
1132                 priv->isr_stats.rfkill++;
1133
1134                 /* driver only loads ucode once setting the interface up.
1135                  * the driver allows loading the ucode even if the radio
1136                  * is killed. Hence update the killswitch state here. The
1137                  * rfkill handler will care about restarting if needed.
1138                  */
1139                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1140                         if (hw_rf_kill)
1141                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1142                         else
1143                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1144                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1145                 }
1146
1147                 handled |= CSR_INT_BIT_RF_KILL;
1148         }
1149
1150         /* Chip got too hot and stopped itself */
1151         if (inta & CSR_INT_BIT_CT_KILL) {
1152                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1153                 priv->isr_stats.ctkill++;
1154                 handled |= CSR_INT_BIT_CT_KILL;
1155         }
1156
1157         /* Error detected by uCode */
1158         if (inta & CSR_INT_BIT_SW_ERR) {
1159                 IWL_ERR(priv, "Microcode SW error detected. "
1160                         " Restarting 0x%X.\n", inta);
1161                 priv->isr_stats.sw++;
1162                 priv->isr_stats.sw_err = inta;
1163                 iwl_irq_handle_error(priv);
1164                 handled |= CSR_INT_BIT_SW_ERR;
1165         }
1166
1167         /*
1168          * uCode wakes up after power-down sleep.
1169          * Tell device about any new tx or host commands enqueued,
1170          * and about any Rx buffers made available while asleep.
1171          */
1172         if (inta & CSR_INT_BIT_WAKEUP) {
1173                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1174                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1175                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1176                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1177                 priv->isr_stats.wakeup++;
1178                 handled |= CSR_INT_BIT_WAKEUP;
1179         }
1180
1181         /* All uCode command responses, including Tx command responses,
1182          * Rx "responses" (frame-received notification), and other
1183          * notifications from uCode come through here*/
1184         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1185                 iwl_rx_handle(priv);
1186                 priv->isr_stats.rx++;
1187                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1188         }
1189
1190         /* This "Tx" DMA channel is used only for loading uCode */
1191         if (inta & CSR_INT_BIT_FH_TX) {
1192                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1193                 priv->isr_stats.tx++;
1194                 handled |= CSR_INT_BIT_FH_TX;
1195                 /* Wake up uCode load routine, now that load is complete */
1196                 priv->ucode_write_complete = 1;
1197                 wake_up_interruptible(&priv->wait_command_queue);
1198         }
1199
1200         if (inta & ~handled) {
1201                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1202                 priv->isr_stats.unhandled++;
1203         }
1204
1205         if (inta & ~(priv->inta_mask)) {
1206                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1207                          inta & ~priv->inta_mask);
1208                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1209         }
1210
1211         /* Re-enable all interrupts */
1212         /* only Re-enable if diabled by irq */
1213         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1214                 iwl_enable_interrupts(priv);
1215
1216 #ifdef CONFIG_IWLWIFI_DEBUG
1217         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1218                 inta = iwl_read32(priv, CSR_INT);
1219                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1220                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1221                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1222                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1223         }
1224 #endif
1225 }
1226
1227 /* tasklet for iwlagn interrupt */
1228 static void iwl_irq_tasklet(struct iwl_priv *priv)
1229 {
1230         u32 inta = 0;
1231         u32 handled = 0;
1232         unsigned long flags;
1233         u32 i;
1234 #ifdef CONFIG_IWLWIFI_DEBUG
1235         u32 inta_mask;
1236 #endif
1237
1238         spin_lock_irqsave(&priv->lock, flags);
1239
1240         /* Ack/clear/reset pending uCode interrupts.
1241          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1242          */
1243         /* There is a hardware bug in the interrupt mask function that some
1244          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1245          * they are disabled in the CSR_INT_MASK register. Furthermore the
1246          * ICT interrupt handling mechanism has another bug that might cause
1247          * these unmasked interrupts fail to be detected. We workaround the
1248          * hardware bugs here by ACKing all the possible interrupts so that
1249          * interrupt coalescing can still be achieved.
1250          */
1251         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1252
1253         inta = priv->_agn.inta;
1254
1255 #ifdef CONFIG_IWLWIFI_DEBUG
1256         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1257                 /* just for debug */
1258                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1259                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1260                                 inta, inta_mask);
1261         }
1262 #endif
1263
1264         spin_unlock_irqrestore(&priv->lock, flags);
1265
1266         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1267         priv->_agn.inta = 0;
1268
1269         /* Now service all interrupt bits discovered above. */
1270         if (inta & CSR_INT_BIT_HW_ERR) {
1271                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1272
1273                 /* Tell the device to stop sending interrupts */
1274                 iwl_disable_interrupts(priv);
1275
1276                 priv->isr_stats.hw++;
1277                 iwl_irq_handle_error(priv);
1278
1279                 handled |= CSR_INT_BIT_HW_ERR;
1280
1281                 return;
1282         }
1283
1284 #ifdef CONFIG_IWLWIFI_DEBUG
1285         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1286                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1287                 if (inta & CSR_INT_BIT_SCD) {
1288                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1289                                       "the frame/frames.\n");
1290                         priv->isr_stats.sch++;
1291                 }
1292
1293                 /* Alive notification via Rx interrupt will do the real work */
1294                 if (inta & CSR_INT_BIT_ALIVE) {
1295                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1296                         priv->isr_stats.alive++;
1297                 }
1298         }
1299 #endif
1300         /* Safely ignore these bits for debug checks below */
1301         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1302
1303         /* HW RF KILL switch toggled */
1304         if (inta & CSR_INT_BIT_RF_KILL) {
1305                 int hw_rf_kill = 0;
1306                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1307                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1308                         hw_rf_kill = 1;
1309
1310                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1311                                 hw_rf_kill ? "disable radio" : "enable radio");
1312
1313                 priv->isr_stats.rfkill++;
1314
1315                 /* driver only loads ucode once setting the interface up.
1316                  * the driver allows loading the ucode even if the radio
1317                  * is killed. Hence update the killswitch state here. The
1318                  * rfkill handler will care about restarting if needed.
1319                  */
1320                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1321                         if (hw_rf_kill)
1322                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1323                         else
1324                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1325                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1326                 }
1327
1328                 handled |= CSR_INT_BIT_RF_KILL;
1329         }
1330
1331         /* Chip got too hot and stopped itself */
1332         if (inta & CSR_INT_BIT_CT_KILL) {
1333                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1334                 priv->isr_stats.ctkill++;
1335                 handled |= CSR_INT_BIT_CT_KILL;
1336         }
1337
1338         /* Error detected by uCode */
1339         if (inta & CSR_INT_BIT_SW_ERR) {
1340                 IWL_ERR(priv, "Microcode SW error detected. "
1341                         " Restarting 0x%X.\n", inta);
1342                 priv->isr_stats.sw++;
1343                 priv->isr_stats.sw_err = inta;
1344                 iwl_irq_handle_error(priv);
1345                 handled |= CSR_INT_BIT_SW_ERR;
1346         }
1347
1348         /* uCode wakes up after power-down sleep */
1349         if (inta & CSR_INT_BIT_WAKEUP) {
1350                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1351                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1352                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1353                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1354
1355                 priv->isr_stats.wakeup++;
1356
1357                 handled |= CSR_INT_BIT_WAKEUP;
1358         }
1359
1360         /* All uCode command responses, including Tx command responses,
1361          * Rx "responses" (frame-received notification), and other
1362          * notifications from uCode come through here*/
1363         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1364                         CSR_INT_BIT_RX_PERIODIC)) {
1365                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1366                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1367                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1368                         iwl_write32(priv, CSR_FH_INT_STATUS,
1369                                         CSR49_FH_INT_RX_MASK);
1370                 }
1371                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1372                         handled |= CSR_INT_BIT_RX_PERIODIC;
1373                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1374                 }
1375                 /* Sending RX interrupt require many steps to be done in the
1376                  * the device:
1377                  * 1- write interrupt to current index in ICT table.
1378                  * 2- dma RX frame.
1379                  * 3- update RX shared data to indicate last write index.
1380                  * 4- send interrupt.
1381                  * This could lead to RX race, driver could receive RX interrupt
1382                  * but the shared data changes does not reflect this;
1383                  * periodic interrupt will detect any dangling Rx activity.
1384                  */
1385
1386                 /* Disable periodic interrupt; we use it as just a one-shot. */
1387                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1388                             CSR_INT_PERIODIC_DIS);
1389                 iwl_rx_handle(priv);
1390
1391                 /*
1392                  * Enable periodic interrupt in 8 msec only if we received
1393                  * real RX interrupt (instead of just periodic int), to catch
1394                  * any dangling Rx interrupt.  If it was just the periodic
1395                  * interrupt, there was no dangling Rx activity, and no need
1396                  * to extend the periodic interrupt; one-shot is enough.
1397                  */
1398                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1399                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1400                                     CSR_INT_PERIODIC_ENA);
1401
1402                 priv->isr_stats.rx++;
1403         }
1404
1405         /* This "Tx" DMA channel is used only for loading uCode */
1406         if (inta & CSR_INT_BIT_FH_TX) {
1407                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1408                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1409                 priv->isr_stats.tx++;
1410                 handled |= CSR_INT_BIT_FH_TX;
1411                 /* Wake up uCode load routine, now that load is complete */
1412                 priv->ucode_write_complete = 1;
1413                 wake_up_interruptible(&priv->wait_command_queue);
1414         }
1415
1416         if (inta & ~handled) {
1417                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1418                 priv->isr_stats.unhandled++;
1419         }
1420
1421         if (inta & ~(priv->inta_mask)) {
1422                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1423                          inta & ~priv->inta_mask);
1424         }
1425
1426         /* Re-enable all interrupts */
1427         /* only Re-enable if diabled by irq */
1428         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1429                 iwl_enable_interrupts(priv);
1430 }
1431
1432 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1433 #define ACK_CNT_RATIO (50)
1434 #define BA_TIMEOUT_CNT (5)
1435 #define BA_TIMEOUT_MAX (16)
1436
1437 /**
1438  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1439  *
1440  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1441  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1442  * operation state.
1443  */
1444 bool iwl_good_ack_health(struct iwl_priv *priv,
1445                                 struct iwl_rx_packet *pkt)
1446 {
1447         bool rc = true;
1448         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1449         int ba_timeout_delta;
1450
1451         actual_ack_cnt_delta =
1452                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1453                 le32_to_cpu(priv->statistics.tx.actual_ack_cnt);
1454         expected_ack_cnt_delta =
1455                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1456                 le32_to_cpu(priv->statistics.tx.expected_ack_cnt);
1457         ba_timeout_delta =
1458                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1459                 le32_to_cpu(priv->statistics.tx.agg.ba_timeout);
1460         if ((priv->_agn.agg_tids_count > 0) &&
1461             (expected_ack_cnt_delta > 0) &&
1462             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1463                 < ACK_CNT_RATIO) &&
1464             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1465                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1466                                 " expected_ack_cnt = %d\n",
1467                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1468
1469 #ifdef CONFIG_IWLWIFI_DEBUG
1470                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1471                                 priv->delta_statistics.tx.rx_detected_cnt);
1472                 IWL_DEBUG_RADIO(priv,
1473                                 "ack_or_ba_timeout_collision delta = %d\n",
1474                                 priv->delta_statistics.tx.
1475                                 ack_or_ba_timeout_collision);
1476 #endif
1477                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1478                                 ba_timeout_delta);
1479                 if (!actual_ack_cnt_delta &&
1480                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1481                         rc = false;
1482         }
1483         return rc;
1484 }
1485
1486
1487 /******************************************************************************
1488  *
1489  * uCode download functions
1490  *
1491  ******************************************************************************/
1492
1493 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1494 {
1495         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1496         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1497         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1498         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1499         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1500         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1501 }
1502
1503 static void iwl_nic_start(struct iwl_priv *priv)
1504 {
1505         /* Remove all resets to allow NIC to operate */
1506         iwl_write32(priv, CSR_RESET, 0);
1507 }
1508
1509 struct iwlagn_ucode_capabilities {
1510         u32 max_probe_length;
1511 };
1512
1513 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1514 static int iwl_mac_setup_register(struct iwl_priv *priv,
1515                                   struct iwlagn_ucode_capabilities *capa);
1516
1517 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1518 {
1519         const char *name_pre = priv->cfg->fw_name_pre;
1520
1521         if (first)
1522                 priv->fw_index = priv->cfg->ucode_api_max;
1523         else
1524                 priv->fw_index--;
1525
1526         if (priv->fw_index < priv->cfg->ucode_api_min) {
1527                 IWL_ERR(priv, "no suitable firmware found!\n");
1528                 return -ENOENT;
1529         }
1530
1531         sprintf(priv->firmware_name, "%s%d%s",
1532                 name_pre, priv->fw_index, ".ucode");
1533
1534         IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1535                        priv->firmware_name);
1536
1537         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1538                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1539                                        iwl_ucode_callback);
1540 }
1541
1542 struct iwlagn_firmware_pieces {
1543         const void *inst, *data, *init, *init_data, *boot;
1544         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1545
1546         u32 build;
1547 };
1548
1549 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1550                                        const struct firmware *ucode_raw,
1551                                        struct iwlagn_firmware_pieces *pieces)
1552 {
1553         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1554         u32 api_ver, hdr_size;
1555         const u8 *src;
1556
1557         priv->ucode_ver = le32_to_cpu(ucode->ver);
1558         api_ver = IWL_UCODE_API(priv->ucode_ver);
1559
1560         switch (api_ver) {
1561         default:
1562                 /*
1563                  * 4965 doesn't revision the firmware file format
1564                  * along with the API version, it always uses v1
1565                  * file format.
1566                  */
1567                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1568                                 CSR_HW_REV_TYPE_4965) {
1569                         hdr_size = 28;
1570                         if (ucode_raw->size < hdr_size) {
1571                                 IWL_ERR(priv, "File size too small!\n");
1572                                 return -EINVAL;
1573                         }
1574                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1575                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1576                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1577                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1578                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1579                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1580                         src = ucode->u.v2.data;
1581                         break;
1582                 }
1583                 /* fall through for 4965 */
1584         case 0:
1585         case 1:
1586         case 2:
1587                 hdr_size = 24;
1588                 if (ucode_raw->size < hdr_size) {
1589                         IWL_ERR(priv, "File size too small!\n");
1590                         return -EINVAL;
1591                 }
1592                 pieces->build = 0;
1593                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1594                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1595                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1596                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1597                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1598                 src = ucode->u.v1.data;
1599                 break;
1600         }
1601
1602         /* Verify size of file vs. image size info in file's header */
1603         if (ucode_raw->size != hdr_size + pieces->inst_size +
1604                                 pieces->data_size + pieces->init_size +
1605                                 pieces->init_data_size + pieces->boot_size) {
1606
1607                 IWL_ERR(priv,
1608                         "uCode file size %d does not match expected size\n",
1609                         (int)ucode_raw->size);
1610                 return -EINVAL;
1611         }
1612
1613         pieces->inst = src;
1614         src += pieces->inst_size;
1615         pieces->data = src;
1616         src += pieces->data_size;
1617         pieces->init = src;
1618         src += pieces->init_size;
1619         pieces->init_data = src;
1620         src += pieces->init_data_size;
1621         pieces->boot = src;
1622         src += pieces->boot_size;
1623
1624         return 0;
1625 }
1626
1627 static int iwlagn_wanted_ucode_alternative = 1;
1628
1629 static int iwlagn_load_firmware(struct iwl_priv *priv,
1630                                 const struct firmware *ucode_raw,
1631                                 struct iwlagn_firmware_pieces *pieces,
1632                                 struct iwlagn_ucode_capabilities *capa)
1633 {
1634         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1635         struct iwl_ucode_tlv *tlv;
1636         size_t len = ucode_raw->size;
1637         const u8 *data;
1638         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1639         u64 alternatives;
1640
1641         if (len < sizeof(*ucode))
1642                 return -EINVAL;
1643
1644         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC))
1645                 return -EINVAL;
1646
1647         /*
1648          * Check which alternatives are present, and "downgrade"
1649          * when the chosen alternative is not present, warning
1650          * the user when that happens. Some files may not have
1651          * any alternatives, so don't warn in that case.
1652          */
1653         alternatives = le64_to_cpu(ucode->alternatives);
1654         tmp = wanted_alternative;
1655         if (wanted_alternative > 63)
1656                 wanted_alternative = 63;
1657         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1658                 wanted_alternative--;
1659         if (wanted_alternative && wanted_alternative != tmp)
1660                 IWL_WARN(priv,
1661                          "uCode alternative %d not available, choosing %d\n",
1662                          tmp, wanted_alternative);
1663
1664         priv->ucode_ver = le32_to_cpu(ucode->ver);
1665         pieces->build = le32_to_cpu(ucode->build);
1666         data = ucode->data;
1667
1668         len -= sizeof(*ucode);
1669
1670         while (len >= sizeof(*tlv)) {
1671                 u32 tlv_len;
1672                 enum iwl_ucode_tlv_type tlv_type;
1673                 u16 tlv_alt;
1674                 const u8 *tlv_data;
1675
1676                 len -= sizeof(*tlv);
1677                 tlv = (void *)data;
1678
1679                 tlv_len = le32_to_cpu(tlv->length);
1680                 tlv_type = le16_to_cpu(tlv->type);
1681                 tlv_alt = le16_to_cpu(tlv->alternative);
1682                 tlv_data = tlv->data;
1683
1684                 if (len < tlv_len)
1685                         return -EINVAL;
1686                 len -= ALIGN(tlv_len, 4);
1687                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1688
1689                 /*
1690                  * Alternative 0 is always valid.
1691                  *
1692                  * Skip alternative TLVs that are not selected.
1693                  */
1694                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1695                         continue;
1696
1697                 switch (tlv_type) {
1698                 case IWL_UCODE_TLV_INST:
1699                         pieces->inst = tlv_data;
1700                         pieces->inst_size = tlv_len;
1701                         break;
1702                 case IWL_UCODE_TLV_DATA:
1703                         pieces->data = tlv_data;
1704                         pieces->data_size = tlv_len;
1705                         break;
1706                 case IWL_UCODE_TLV_INIT:
1707                         pieces->init = tlv_data;
1708                         pieces->init_size = tlv_len;
1709                         break;
1710                 case IWL_UCODE_TLV_INIT_DATA:
1711                         pieces->init_data = tlv_data;
1712                         pieces->init_data_size = tlv_len;
1713                         break;
1714                 case IWL_UCODE_TLV_BOOT:
1715                         pieces->boot = tlv_data;
1716                         pieces->boot_size = tlv_len;
1717                         break;
1718                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1719                         if (tlv_len != 4)
1720                                 return -EINVAL;
1721                         capa->max_probe_length =
1722                                 le32_to_cpup((__le32 *)tlv_data);
1723                         break;
1724                 default:
1725                         break;
1726                 }
1727         }
1728
1729         if (len)
1730                 return -EINVAL;
1731
1732         return 0;
1733 }
1734
1735 /**
1736  * iwl_ucode_callback - callback when firmware was loaded
1737  *
1738  * If loaded successfully, copies the firmware into buffers
1739  * for the card to fetch (via DMA).
1740  */
1741 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1742 {
1743         struct iwl_priv *priv = context;
1744         struct iwl_ucode_header *ucode;
1745         int err;
1746         struct iwlagn_firmware_pieces pieces;
1747         const unsigned int api_max = priv->cfg->ucode_api_max;
1748         const unsigned int api_min = priv->cfg->ucode_api_min;
1749         u32 api_ver;
1750         char buildstr[25];
1751         u32 build;
1752         struct iwlagn_ucode_capabilities ucode_capa = {
1753                 .max_probe_length = 200,
1754         };
1755
1756         memset(&pieces, 0, sizeof(pieces));
1757
1758         if (!ucode_raw) {
1759                 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1760                         priv->firmware_name);
1761                 goto try_again;
1762         }
1763
1764         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1765                        priv->firmware_name, ucode_raw->size);
1766
1767         /* Make sure that we got at least the API version number */
1768         if (ucode_raw->size < 4) {
1769                 IWL_ERR(priv, "File size way too small!\n");
1770                 goto try_again;
1771         }
1772
1773         /* Data from ucode file:  header followed by uCode images */
1774         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1775
1776         if (ucode->ver)
1777                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
1778         else
1779                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
1780                                            &ucode_capa);
1781
1782         if (err)
1783                 goto try_again;
1784
1785         api_ver = IWL_UCODE_API(priv->ucode_ver);
1786         build = pieces.build;
1787
1788         /*
1789          * api_ver should match the api version forming part of the
1790          * firmware filename ... but we don't check for that and only rely
1791          * on the API version read from firmware header from here on forward
1792          */
1793         if (api_ver < api_min || api_ver > api_max) {
1794                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1795                           "Driver supports v%u, firmware is v%u.\n",
1796                           api_max, api_ver);
1797                 goto try_again;
1798         }
1799
1800         if (api_ver != api_max)
1801                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1802                           "got v%u. New firmware can be obtained "
1803                           "from http://www.intellinuxwireless.org.\n",
1804                           api_max, api_ver);
1805
1806         if (build)
1807                 sprintf(buildstr, " build %u", build);
1808         else
1809                 buildstr[0] = '\0';
1810
1811         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
1812                  IWL_UCODE_MAJOR(priv->ucode_ver),
1813                  IWL_UCODE_MINOR(priv->ucode_ver),
1814                  IWL_UCODE_API(priv->ucode_ver),
1815                  IWL_UCODE_SERIAL(priv->ucode_ver),
1816                  buildstr);
1817
1818         snprintf(priv->hw->wiphy->fw_version,
1819                  sizeof(priv->hw->wiphy->fw_version),
1820                  "%u.%u.%u.%u%s",
1821                  IWL_UCODE_MAJOR(priv->ucode_ver),
1822                  IWL_UCODE_MINOR(priv->ucode_ver),
1823                  IWL_UCODE_API(priv->ucode_ver),
1824                  IWL_UCODE_SERIAL(priv->ucode_ver),
1825                  buildstr);
1826
1827         /*
1828          * For any of the failures below (before allocating pci memory)
1829          * we will try to load a version with a smaller API -- maybe the
1830          * user just got a corrupted version of the latest API.
1831          */
1832
1833         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1834                        priv->ucode_ver);
1835         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
1836                        pieces.inst_size);
1837         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
1838                        pieces.data_size);
1839         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
1840                        pieces.init_size);
1841         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
1842                        pieces.init_data_size);
1843         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
1844                        pieces.boot_size);
1845
1846         /* Verify that uCode images will fit in card's SRAM */
1847         if (pieces.inst_size > priv->hw_params.max_inst_size) {
1848                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
1849                         pieces.inst_size);
1850                 goto try_again;
1851         }
1852
1853         if (pieces.data_size > priv->hw_params.max_data_size) {
1854                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
1855                         pieces.data_size);
1856                 goto try_again;
1857         }
1858
1859         if (pieces.init_size > priv->hw_params.max_inst_size) {
1860                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
1861                         pieces.init_size);
1862                 goto try_again;
1863         }
1864
1865         if (pieces.init_data_size > priv->hw_params.max_data_size) {
1866                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
1867                         pieces.init_data_size);
1868                 goto try_again;
1869         }
1870
1871         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
1872                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
1873                         pieces.boot_size);
1874                 goto try_again;
1875         }
1876
1877         /* Allocate ucode buffers for card's bus-master loading ... */
1878
1879         /* Runtime instructions and 2 copies of data:
1880          * 1) unmodified from disk
1881          * 2) backup cache for save/restore during power-downs */
1882         priv->ucode_code.len = pieces.inst_size;
1883         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1884
1885         priv->ucode_data.len = pieces.data_size;
1886         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1887
1888         priv->ucode_data_backup.len = pieces.data_size;
1889         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1890
1891         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1892             !priv->ucode_data_backup.v_addr)
1893                 goto err_pci_alloc;
1894
1895         /* Initialization instructions and data */
1896         if (pieces.init_size && pieces.init_data_size) {
1897                 priv->ucode_init.len = pieces.init_size;
1898                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1899
1900                 priv->ucode_init_data.len = pieces.init_data_size;
1901                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1902
1903                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1904                         goto err_pci_alloc;
1905         }
1906
1907         /* Bootstrap (instructions only, no data) */
1908         if (pieces.boot_size) {
1909                 priv->ucode_boot.len = pieces.boot_size;
1910                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1911
1912                 if (!priv->ucode_boot.v_addr)
1913                         goto err_pci_alloc;
1914         }
1915
1916         /* Copy images into buffers for card's bus-master reads ... */
1917
1918         /* Runtime instructions (first block of data in file) */
1919         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
1920                         pieces.inst_size);
1921         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
1922
1923         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1924                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1925
1926         /*
1927          * Runtime data
1928          * NOTE:  Copy into backup buffer will be done in iwl_up()
1929          */
1930         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
1931                         pieces.data_size);
1932         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
1933         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
1934
1935         /* Initialization instructions */
1936         if (pieces.init_size) {
1937                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1938                                 pieces.init_size);
1939                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
1940         }
1941
1942         /* Initialization data */
1943         if (pieces.init_data_size) {
1944                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1945                                pieces.init_data_size);
1946                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
1947                        pieces.init_data_size);
1948         }
1949
1950         /* Bootstrap instructions */
1951         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
1952                         pieces.boot_size);
1953         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
1954
1955         /**************************************************
1956          * This is still part of probe() in a sense...
1957          *
1958          * 9. Setup and register with mac80211 and debugfs
1959          **************************************************/
1960         err = iwl_mac_setup_register(priv, &ucode_capa);
1961         if (err)
1962                 goto out_unbind;
1963
1964         err = iwl_dbgfs_register(priv, DRV_NAME);
1965         if (err)
1966                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1967
1968         /* We have our copies now, allow OS release its copies */
1969         release_firmware(ucode_raw);
1970         complete(&priv->_agn.firmware_loading_complete);
1971         return;
1972
1973  try_again:
1974         /* try next, if any */
1975         if (iwl_request_firmware(priv, false))
1976                 goto out_unbind;
1977         release_firmware(ucode_raw);
1978         return;
1979
1980  err_pci_alloc:
1981         IWL_ERR(priv, "failed to allocate pci memory\n");
1982         iwl_dealloc_ucode_pci(priv);
1983  out_unbind:
1984         complete(&priv->_agn.firmware_loading_complete);
1985         device_release_driver(&priv->pci_dev->dev);
1986         release_firmware(ucode_raw);
1987 }
1988
1989 static const char *desc_lookup_text[] = {
1990         "OK",
1991         "FAIL",
1992         "BAD_PARAM",
1993         "BAD_CHECKSUM",
1994         "NMI_INTERRUPT_WDG",
1995         "SYSASSERT",
1996         "FATAL_ERROR",
1997         "BAD_COMMAND",
1998         "HW_ERROR_TUNE_LOCK",
1999         "HW_ERROR_TEMPERATURE",
2000         "ILLEGAL_CHAN_FREQ",
2001         "VCC_NOT_STABLE",
2002         "FH_ERROR",
2003         "NMI_INTERRUPT_HOST",
2004         "NMI_INTERRUPT_ACTION_PT",
2005         "NMI_INTERRUPT_UNKNOWN",
2006         "UCODE_VERSION_MISMATCH",
2007         "HW_ERROR_ABS_LOCK",
2008         "HW_ERROR_CAL_LOCK_FAIL",
2009         "NMI_INTERRUPT_INST_ACTION_PT",
2010         "NMI_INTERRUPT_DATA_ACTION_PT",
2011         "NMI_TRM_HW_ER",
2012         "NMI_INTERRUPT_TRM",
2013         "NMI_INTERRUPT_BREAK_POINT"
2014         "DEBUG_0",
2015         "DEBUG_1",
2016         "DEBUG_2",
2017         "DEBUG_3",
2018         "ADVANCED SYSASSERT"
2019 };
2020
2021 static const char *desc_lookup(int i)
2022 {
2023         int max = ARRAY_SIZE(desc_lookup_text) - 1;
2024
2025         if (i < 0 || i > max)
2026                 i = max;
2027
2028         return desc_lookup_text[i];
2029 }
2030
2031 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2032 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2033
2034 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2035 {
2036         u32 data2, line;
2037         u32 desc, time, count, base, data1;
2038         u32 blink1, blink2, ilink1, ilink2;
2039         u32 pc, hcmd;
2040
2041         if (priv->ucode_type == UCODE_INIT)
2042                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2043         else
2044                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2045
2046         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2047                 IWL_ERR(priv,
2048                         "Not valid error log pointer 0x%08X for %s uCode\n",
2049                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2050                 return;
2051         }
2052
2053         count = iwl_read_targ_mem(priv, base);
2054
2055         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2056                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2057                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2058                         priv->status, count);
2059         }
2060
2061         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2062         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2063         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2064         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2065         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2066         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2067         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2068         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2069         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2070         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2071         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2072
2073         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2074                                       blink1, blink2, ilink1, ilink2);
2075
2076         IWL_ERR(priv, "Desc                               Time       "
2077                 "data1      data2      line\n");
2078         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
2079                 desc_lookup(desc), desc, time, data1, data2, line);
2080         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2081         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2082                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2083 }
2084
2085 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2086
2087 /**
2088  * iwl_print_event_log - Dump error event log to syslog
2089  *
2090  */
2091 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2092                                u32 num_events, u32 mode,
2093                                int pos, char **buf, size_t bufsz)
2094 {
2095         u32 i;
2096         u32 base;       /* SRAM byte address of event log header */
2097         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2098         u32 ptr;        /* SRAM byte address of log data */
2099         u32 ev, time, data; /* event log data */
2100         unsigned long reg_flags;
2101
2102         if (num_events == 0)
2103                 return pos;
2104         if (priv->ucode_type == UCODE_INIT)
2105                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2106         else
2107                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2108
2109         if (mode == 0)
2110                 event_size = 2 * sizeof(u32);
2111         else
2112                 event_size = 3 * sizeof(u32);
2113
2114         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2115
2116         /* Make sure device is powered up for SRAM reads */
2117         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2118         iwl_grab_nic_access(priv);
2119
2120         /* Set starting address; reads will auto-increment */
2121         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2122         rmb();
2123
2124         /* "time" is actually "data" for mode 0 (no timestamp).
2125         * place event id # at far right for easier visual parsing. */
2126         for (i = 0; i < num_events; i++) {
2127                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2128                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2129                 if (mode == 0) {
2130                         /* data, ev */
2131                         if (bufsz) {
2132                                 pos += scnprintf(*buf + pos, bufsz - pos,
2133                                                 "EVT_LOG:0x%08x:%04u\n",
2134                                                 time, ev);
2135                         } else {
2136                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2137                                         time, ev);
2138                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2139                                         time, ev);
2140                         }
2141                 } else {
2142                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2143                         if (bufsz) {
2144                                 pos += scnprintf(*buf + pos, bufsz - pos,
2145                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2146                                                  time, data, ev);
2147                         } else {
2148                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2149                                         time, data, ev);
2150                                 trace_iwlwifi_dev_ucode_event(priv, time,
2151                                         data, ev);
2152                         }
2153                 }
2154         }
2155
2156         /* Allow device to power down */
2157         iwl_release_nic_access(priv);
2158         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2159         return pos;
2160 }
2161
2162 /**
2163  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2164  */
2165 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2166                                     u32 num_wraps, u32 next_entry,
2167                                     u32 size, u32 mode,
2168                                     int pos, char **buf, size_t bufsz)
2169 {
2170         /*
2171          * display the newest DEFAULT_LOG_ENTRIES entries
2172          * i.e the entries just before the next ont that uCode would fill.
2173          */
2174         if (num_wraps) {
2175                 if (next_entry < size) {
2176                         pos = iwl_print_event_log(priv,
2177                                                 capacity - (size - next_entry),
2178                                                 size - next_entry, mode,
2179                                                 pos, buf, bufsz);
2180                         pos = iwl_print_event_log(priv, 0,
2181                                                   next_entry, mode,
2182                                                   pos, buf, bufsz);
2183                 } else
2184                         pos = iwl_print_event_log(priv, next_entry - size,
2185                                                   size, mode, pos, buf, bufsz);
2186         } else {
2187                 if (next_entry < size) {
2188                         pos = iwl_print_event_log(priv, 0, next_entry,
2189                                                   mode, pos, buf, bufsz);
2190                 } else {
2191                         pos = iwl_print_event_log(priv, next_entry - size,
2192                                                   size, mode, pos, buf, bufsz);
2193                 }
2194         }
2195         return pos;
2196 }
2197
2198 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2199
2200 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2201                             char **buf, bool display)
2202 {
2203         u32 base;       /* SRAM byte address of event log header */
2204         u32 capacity;   /* event log capacity in # entries */
2205         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2206         u32 num_wraps;  /* # times uCode wrapped to top of log */
2207         u32 next_entry; /* index of next entry to be written by uCode */
2208         u32 size;       /* # entries that we'll print */
2209         int pos = 0;
2210         size_t bufsz = 0;
2211
2212         if (priv->ucode_type == UCODE_INIT)
2213                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2214         else
2215                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2216
2217         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2218                 IWL_ERR(priv,
2219                         "Invalid event log pointer 0x%08X for %s uCode\n",
2220                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2221                 return -EINVAL;
2222         }
2223
2224         /* event log header */
2225         capacity = iwl_read_targ_mem(priv, base);
2226         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2227         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2228         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2229
2230         if (capacity > priv->cfg->max_event_log_size) {
2231                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2232                         capacity, priv->cfg->max_event_log_size);
2233                 capacity = priv->cfg->max_event_log_size;
2234         }
2235
2236         if (next_entry > priv->cfg->max_event_log_size) {
2237                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2238                         next_entry, priv->cfg->max_event_log_size);
2239                 next_entry = priv->cfg->max_event_log_size;
2240         }
2241
2242         size = num_wraps ? capacity : next_entry;
2243
2244         /* bail out if nothing in log */
2245         if (size == 0) {
2246                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2247                 return pos;
2248         }
2249
2250 #ifdef CONFIG_IWLWIFI_DEBUG
2251         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2252                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2253                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2254 #else
2255         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2256                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2257 #endif
2258         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2259                 size);
2260
2261 #ifdef CONFIG_IWLWIFI_DEBUG
2262         if (display) {
2263                 if (full_log)
2264                         bufsz = capacity * 48;
2265                 else
2266                         bufsz = size * 48;
2267                 *buf = kmalloc(bufsz, GFP_KERNEL);
2268                 if (!*buf)
2269                         return -ENOMEM;
2270         }
2271         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2272                 /*
2273                  * if uCode has wrapped back to top of log,
2274                  * start at the oldest entry,
2275                  * i.e the next one that uCode would fill.
2276                  */
2277                 if (num_wraps)
2278                         pos = iwl_print_event_log(priv, next_entry,
2279                                                 capacity - next_entry, mode,
2280                                                 pos, buf, bufsz);
2281                 /* (then/else) start at top of log */
2282                 pos = iwl_print_event_log(priv, 0,
2283                                           next_entry, mode, pos, buf, bufsz);
2284         } else
2285                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2286                                                 next_entry, size, mode,
2287                                                 pos, buf, bufsz);
2288 #else
2289         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2290                                         next_entry, size, mode,
2291                                         pos, buf, bufsz);
2292 #endif
2293         return pos;
2294 }
2295
2296 /**
2297  * iwl_alive_start - called after REPLY_ALIVE notification received
2298  *                   from protocol/runtime uCode (initialization uCode's
2299  *                   Alive gets handled by iwl_init_alive_start()).
2300  */
2301 static void iwl_alive_start(struct iwl_priv *priv)
2302 {
2303         int ret = 0;
2304
2305         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2306
2307         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2308                 /* We had an error bringing up the hardware, so take it
2309                  * all the way back down so we can try again */
2310                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2311                 goto restart;
2312         }
2313
2314         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2315          * This is a paranoid check, because we would not have gotten the
2316          * "runtime" alive if code weren't properly loaded.  */
2317         if (iwl_verify_ucode(priv)) {
2318                 /* Runtime instruction load was bad;
2319                  * take it all the way back down so we can try again */
2320                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2321                 goto restart;
2322         }
2323
2324         ret = priv->cfg->ops->lib->alive_notify(priv);
2325         if (ret) {
2326                 IWL_WARN(priv,
2327                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2328                 goto restart;
2329         }
2330
2331         /* After the ALIVE response, we can send host commands to the uCode */
2332         set_bit(STATUS_ALIVE, &priv->status);
2333
2334         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2335                 /* Enable timer to monitor the driver queues */
2336                 mod_timer(&priv->monitor_recover,
2337                         jiffies +
2338                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2339         }
2340
2341         if (iwl_is_rfkill(priv))
2342                 return;
2343
2344         ieee80211_wake_queues(priv->hw);
2345
2346         priv->active_rate = IWL_RATES_MASK;
2347
2348         /* Configure Tx antenna selection based on H/W config */
2349         if (priv->cfg->ops->hcmd->set_tx_ant)
2350                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2351
2352         if (iwl_is_associated(priv)) {
2353                 struct iwl_rxon_cmd *active_rxon =
2354                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2355                 /* apply any changes in staging */
2356                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2357                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2358         } else {
2359                 /* Initialize our rx_config data */
2360                 iwl_connection_init_rx_config(priv, NULL);
2361
2362                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2363                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2364
2365                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2366         }
2367
2368         /* Configure Bluetooth device coexistence support */
2369         priv->cfg->ops->hcmd->send_bt_config(priv);
2370
2371         iwl_reset_run_time_calib(priv);
2372
2373         /* Configure the adapter for unassociated operation */
2374         iwlcore_commit_rxon(priv);
2375
2376         /* At this point, the NIC is initialized and operational */
2377         iwl_rf_kill_ct_config(priv);
2378
2379         iwl_leds_init(priv);
2380
2381         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2382         set_bit(STATUS_READY, &priv->status);
2383         wake_up_interruptible(&priv->wait_command_queue);
2384
2385         iwl_power_update_mode(priv, true);
2386         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2387
2388
2389         return;
2390
2391  restart:
2392         queue_work(priv->workqueue, &priv->restart);
2393 }
2394
2395 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2396
2397 static void __iwl_down(struct iwl_priv *priv)
2398 {
2399         unsigned long flags;
2400         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2401
2402         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2403
2404         if (!exit_pending)
2405                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2406
2407         iwl_clear_ucode_stations(priv);
2408         iwl_dealloc_bcast_station(priv);
2409         iwl_clear_driver_stations(priv);
2410
2411         /* Unblock any waiting calls */
2412         wake_up_interruptible_all(&priv->wait_command_queue);
2413
2414         /* Wipe out the EXIT_PENDING status bit if we are not actually
2415          * exiting the module */
2416         if (!exit_pending)
2417                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2418
2419         /* stop and reset the on-board processor */
2420         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2421
2422         /* tell the device to stop sending interrupts */
2423         spin_lock_irqsave(&priv->lock, flags);
2424         iwl_disable_interrupts(priv);
2425         spin_unlock_irqrestore(&priv->lock, flags);
2426         iwl_synchronize_irq(priv);
2427
2428         if (priv->mac80211_registered)
2429                 ieee80211_stop_queues(priv->hw);
2430
2431         /* If we have not previously called iwl_init() then
2432          * clear all bits but the RF Kill bit and return */
2433         if (!iwl_is_init(priv)) {
2434                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2435                                         STATUS_RF_KILL_HW |
2436                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2437                                         STATUS_GEO_CONFIGURED |
2438                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2439                                         STATUS_EXIT_PENDING;
2440                 goto exit;
2441         }
2442
2443         /* ...otherwise clear out all the status bits but the RF Kill
2444          * bit and continue taking the NIC down. */
2445         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2446                                 STATUS_RF_KILL_HW |
2447                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2448                                 STATUS_GEO_CONFIGURED |
2449                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2450                                 STATUS_FW_ERROR |
2451                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2452                                 STATUS_EXIT_PENDING;
2453
2454         /* device going down, Stop using ICT table */
2455         iwl_disable_ict(priv);
2456
2457         iwlagn_txq_ctx_stop(priv);
2458         iwlagn_rxq_stop(priv);
2459
2460         /* Power-down device's busmaster DMA clocks */
2461         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2462         udelay(5);
2463
2464         /* Make sure (redundant) we've released our request to stay awake */
2465         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2466
2467         /* Stop the device, and put it in low power state */
2468         priv->cfg->ops->lib->apm_ops.stop(priv);
2469
2470  exit:
2471         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2472
2473         if (priv->ibss_beacon)
2474                 dev_kfree_skb(priv->ibss_beacon);
2475         priv->ibss_beacon = NULL;
2476
2477         /* clear out any free frames */
2478         iwl_clear_free_frames(priv);
2479 }
2480
2481 static void iwl_down(struct iwl_priv *priv)
2482 {
2483         mutex_lock(&priv->mutex);
2484         __iwl_down(priv);
2485         mutex_unlock(&priv->mutex);
2486
2487         iwl_cancel_deferred_work(priv);
2488 }
2489
2490 #define HW_READY_TIMEOUT (50)
2491
2492 static int iwl_set_hw_ready(struct iwl_priv *priv)
2493 {
2494         int ret = 0;
2495
2496         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2497                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2498
2499         /* See if we got it */
2500         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2501                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2502                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2503                                 HW_READY_TIMEOUT);
2504         if (ret != -ETIMEDOUT)
2505                 priv->hw_ready = true;
2506         else
2507                 priv->hw_ready = false;
2508
2509         IWL_DEBUG_INFO(priv, "hardware %s\n",
2510                       (priv->hw_ready == 1) ? "ready" : "not ready");
2511         return ret;
2512 }
2513
2514 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2515 {
2516         int ret = 0;
2517
2518         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2519
2520         ret = iwl_set_hw_ready(priv);
2521         if (priv->hw_ready)
2522                 return ret;
2523
2524         /* If HW is not ready, prepare the conditions to check again */
2525         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2526                         CSR_HW_IF_CONFIG_REG_PREPARE);
2527
2528         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2529                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2530                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2531
2532         /* HW should be ready by now, check again. */
2533         if (ret != -ETIMEDOUT)
2534                 iwl_set_hw_ready(priv);
2535
2536         return ret;
2537 }
2538
2539 #define MAX_HW_RESTARTS 5
2540
2541 static int __iwl_up(struct iwl_priv *priv)
2542 {
2543         int i;
2544         int ret;
2545
2546         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2547                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2548                 return -EIO;
2549         }
2550
2551         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2552                 IWL_ERR(priv, "ucode not available for device bringup\n");
2553                 return -EIO;
2554         }
2555
2556         ret = iwl_alloc_bcast_station(priv, true);
2557         if (ret)
2558                 return ret;
2559
2560         iwl_prepare_card_hw(priv);
2561
2562         if (!priv->hw_ready) {
2563                 IWL_WARN(priv, "Exit HW not ready\n");
2564                 return -EIO;
2565         }
2566
2567         /* If platform's RF_KILL switch is NOT set to KILL */
2568         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2569                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2570         else
2571                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2572
2573         if (iwl_is_rfkill(priv)) {
2574                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2575
2576                 iwl_enable_interrupts(priv);
2577                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2578                 return 0;
2579         }
2580
2581         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2582
2583         ret = iwlagn_hw_nic_init(priv);
2584         if (ret) {
2585                 IWL_ERR(priv, "Unable to init nic\n");
2586                 return ret;
2587         }
2588
2589         /* make sure rfkill handshake bits are cleared */
2590         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2591         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2592                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2593
2594         /* clear (again), then enable host interrupts */
2595         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2596         iwl_enable_interrupts(priv);
2597
2598         /* really make sure rfkill handshake bits are cleared */
2599         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2600         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2601
2602         /* Copy original ucode data image from disk into backup cache.
2603          * This will be used to initialize the on-board processor's
2604          * data SRAM for a clean start when the runtime program first loads. */
2605         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2606                priv->ucode_data.len);
2607
2608         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2609
2610                 /* load bootstrap state machine,
2611                  * load bootstrap program into processor's memory,
2612                  * prepare to load the "initialize" uCode */
2613                 ret = priv->cfg->ops->lib->load_ucode(priv);
2614
2615                 if (ret) {
2616                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2617                                 ret);
2618                         continue;
2619                 }
2620
2621                 /* start card; "initialize" will load runtime ucode */
2622                 iwl_nic_start(priv);
2623
2624                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2625
2626                 return 0;
2627         }
2628
2629         set_bit(STATUS_EXIT_PENDING, &priv->status);
2630         __iwl_down(priv);
2631         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2632
2633         /* tried to restart and config the device for as long as our
2634          * patience could withstand */
2635         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2636         return -EIO;
2637 }
2638
2639
2640 /*****************************************************************************
2641  *
2642  * Workqueue callbacks
2643  *
2644  *****************************************************************************/
2645
2646 static void iwl_bg_init_alive_start(struct work_struct *data)
2647 {
2648         struct iwl_priv *priv =
2649             container_of(data, struct iwl_priv, init_alive_start.work);
2650
2651         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2652                 return;
2653
2654         mutex_lock(&priv->mutex);
2655         priv->cfg->ops->lib->init_alive_start(priv);
2656         mutex_unlock(&priv->mutex);
2657 }
2658
2659 static void iwl_bg_alive_start(struct work_struct *data)
2660 {
2661         struct iwl_priv *priv =
2662             container_of(data, struct iwl_priv, alive_start.work);
2663
2664         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2665                 return;
2666
2667         /* enable dram interrupt */
2668         iwl_reset_ict(priv);
2669
2670         mutex_lock(&priv->mutex);
2671         iwl_alive_start(priv);
2672         mutex_unlock(&priv->mutex);
2673 }
2674
2675 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2676 {
2677         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2678                         run_time_calib_work);
2679
2680         mutex_lock(&priv->mutex);
2681
2682         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2683             test_bit(STATUS_SCANNING, &priv->status)) {
2684                 mutex_unlock(&priv->mutex);
2685                 return;
2686         }
2687
2688         if (priv->start_calib) {
2689                 iwl_chain_noise_calibration(priv, &priv->statistics);
2690
2691                 iwl_sensitivity_calibration(priv, &priv->statistics);
2692         }
2693
2694         mutex_unlock(&priv->mutex);
2695 }
2696
2697 static void iwl_bg_restart(struct work_struct *data)
2698 {
2699         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2700
2701         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2702                 return;
2703
2704         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2705                 mutex_lock(&priv->mutex);
2706                 priv->vif = NULL;
2707                 priv->is_open = 0;
2708                 mutex_unlock(&priv->mutex);
2709                 iwl_down(priv);
2710                 ieee80211_restart_hw(priv->hw);
2711         } else {
2712                 iwl_down(priv);
2713
2714                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2715                         return;
2716
2717                 mutex_lock(&priv->mutex);
2718                 __iwl_up(priv);
2719                 mutex_unlock(&priv->mutex);
2720         }
2721 }
2722
2723 static void iwl_bg_rx_replenish(struct work_struct *data)
2724 {
2725         struct iwl_priv *priv =
2726             container_of(data, struct iwl_priv, rx_replenish);
2727
2728         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2729                 return;
2730
2731         mutex_lock(&priv->mutex);
2732         iwlagn_rx_replenish(priv);
2733         mutex_unlock(&priv->mutex);
2734 }
2735
2736 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2737
2738 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
2739 {
2740         struct ieee80211_conf *conf = NULL;
2741         int ret = 0;
2742
2743         if (!vif || !priv->is_open)
2744                 return;
2745
2746         if (vif->type == NL80211_IFTYPE_AP) {
2747                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2748                 return;
2749         }
2750
2751         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2752                 return;
2753
2754         iwl_scan_cancel_timeout(priv, 200);
2755
2756         conf = ieee80211_get_hw_conf(priv->hw);
2757
2758         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2759         iwlcore_commit_rxon(priv);
2760
2761         iwl_setup_rxon_timing(priv, vif);
2762         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2763                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2764         if (ret)
2765                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2766                             "Attempting to continue.\n");
2767
2768         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2769
2770         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2771
2772         if (priv->cfg->ops->hcmd->set_rxon_chain)
2773                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2774
2775         priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
2776
2777         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2778                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
2779
2780         if (vif->bss_conf.assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2781                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2782         else
2783                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2784
2785         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2786                 if (vif->bss_conf.assoc_capability &
2787                                         WLAN_CAPABILITY_SHORT_SLOT_TIME)
2788                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2789                 else
2790                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2791
2792                 if (vif->type == NL80211_IFTYPE_ADHOC)
2793                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2794         }
2795
2796         iwlcore_commit_rxon(priv);
2797
2798         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2799                         vif->bss_conf.aid, priv->active_rxon.bssid_addr);
2800
2801         switch (vif->type) {
2802         case NL80211_IFTYPE_STATION:
2803                 break;
2804         case NL80211_IFTYPE_ADHOC:
2805                 iwl_send_beacon_cmd(priv);
2806                 break;
2807         default:
2808                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2809                           __func__, vif->type);
2810                 break;
2811         }
2812
2813         /* the chain noise calibration will enabled PM upon completion
2814          * If chain noise has already been run, then we need to enable
2815          * power management here */
2816         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2817                 iwl_power_update_mode(priv, false);
2818
2819         /* Enable Rx differential gain and sensitivity calibrations */
2820         iwl_chain_noise_reset(priv);
2821         priv->start_calib = 1;
2822
2823 }
2824
2825 /*****************************************************************************
2826  *
2827  * mac80211 entry point functions
2828  *
2829  *****************************************************************************/
2830
2831 #define UCODE_READY_TIMEOUT     (4 * HZ)
2832
2833 /*
2834  * Not a mac80211 entry point function, but it fits in with all the
2835  * other mac80211 functions grouped here.
2836  */
2837 static int iwl_mac_setup_register(struct iwl_priv *priv,
2838                                   struct iwlagn_ucode_capabilities *capa)
2839 {
2840         int ret;
2841         struct ieee80211_hw *hw = priv->hw;
2842         hw->rate_control_algorithm = "iwl-agn-rs";
2843
2844         /* Tell mac80211 our characteristics */
2845         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2846                     IEEE80211_HW_AMPDU_AGGREGATION |
2847                     IEEE80211_HW_SPECTRUM_MGMT;
2848
2849         if (!priv->cfg->broken_powersave)
2850                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2851                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2852
2853         if (priv->cfg->sku & IWL_SKU_N)
2854                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2855                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2856
2857         hw->sta_data_size = sizeof(struct iwl_station_priv);
2858         hw->vif_data_size = sizeof(struct iwl_vif_priv);
2859
2860         hw->wiphy->interface_modes =
2861                 BIT(NL80211_IFTYPE_STATION) |
2862                 BIT(NL80211_IFTYPE_ADHOC);
2863
2864         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2865                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
2866
2867         /*
2868          * For now, disable PS by default because it affects
2869          * RX performance significantly.
2870          */
2871         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2872
2873         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2874         /* we create the 802.11 header and a zero-length SSID element */
2875         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
2876
2877         /* Default value; 4 EDCA QOS priorities */
2878         hw->queues = 4;
2879
2880         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2881
2882         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2883                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2884                         &priv->bands[IEEE80211_BAND_2GHZ];
2885         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2886                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2887                         &priv->bands[IEEE80211_BAND_5GHZ];
2888
2889         ret = ieee80211_register_hw(priv->hw);
2890         if (ret) {
2891                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2892                 return ret;
2893         }
2894         priv->mac80211_registered = 1;
2895
2896         return 0;
2897 }
2898
2899
2900 static int iwl_mac_start(struct ieee80211_hw *hw)
2901 {
2902         struct iwl_priv *priv = hw->priv;
2903         int ret;
2904
2905         IWL_DEBUG_MAC80211(priv, "enter\n");
2906
2907         /* we should be verifying the device is ready to be opened */
2908         mutex_lock(&priv->mutex);
2909         ret = __iwl_up(priv);
2910         mutex_unlock(&priv->mutex);
2911
2912         if (ret)
2913                 return ret;
2914
2915         if (iwl_is_rfkill(priv))
2916                 goto out;
2917
2918         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2919
2920         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2921          * mac80211 will not be run successfully. */
2922         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2923                         test_bit(STATUS_READY, &priv->status),
2924                         UCODE_READY_TIMEOUT);
2925         if (!ret) {
2926                 if (!test_bit(STATUS_READY, &priv->status)) {
2927                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2928                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2929                         return -ETIMEDOUT;
2930                 }
2931         }
2932
2933         iwl_led_start(priv);
2934
2935 out:
2936         priv->is_open = 1;
2937         IWL_DEBUG_MAC80211(priv, "leave\n");
2938         return 0;
2939 }
2940
2941 static void iwl_mac_stop(struct ieee80211_hw *hw)
2942 {
2943         struct iwl_priv *priv = hw->priv;
2944
2945         IWL_DEBUG_MAC80211(priv, "enter\n");
2946
2947         if (!priv->is_open)
2948                 return;
2949
2950         priv->is_open = 0;
2951
2952         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2953                 /* stop mac, cancel any scan request and clear
2954                  * RXON_FILTER_ASSOC_MSK BIT
2955                  */
2956                 mutex_lock(&priv->mutex);
2957                 iwl_scan_cancel_timeout(priv, 100);
2958                 mutex_unlock(&priv->mutex);
2959         }
2960
2961         iwl_down(priv);
2962
2963         flush_workqueue(priv->workqueue);
2964
2965         /* enable interrupts again in order to receive rfkill changes */
2966         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2967         iwl_enable_interrupts(priv);
2968
2969         IWL_DEBUG_MAC80211(priv, "leave\n");
2970 }
2971
2972 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2973 {
2974         struct iwl_priv *priv = hw->priv;
2975
2976         IWL_DEBUG_MACDUMP(priv, "enter\n");
2977
2978         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2979                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2980
2981         if (iwlagn_tx_skb(priv, skb))
2982                 dev_kfree_skb_any(skb);
2983
2984         IWL_DEBUG_MACDUMP(priv, "leave\n");
2985         return NETDEV_TX_OK;
2986 }
2987
2988 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
2989 {
2990         int ret = 0;
2991
2992         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2993                 return;
2994
2995         /* The following should be done only at AP bring up */
2996         if (!iwl_is_associated(priv)) {
2997
2998                 /* RXON - unassoc (to set timing command) */
2999                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3000                 iwlcore_commit_rxon(priv);
3001
3002                 /* RXON Timing */
3003                 iwl_setup_rxon_timing(priv, vif);
3004                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3005                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
3006                 if (ret)
3007                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3008                                         "Attempting to continue.\n");
3009
3010                 /* AP has all antennas */
3011                 priv->chain_noise_data.active_chains =
3012                         priv->hw_params.valid_rx_ant;
3013                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3014                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3015                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
3016
3017                 priv->staging_rxon.assoc_id = 0;
3018
3019                 if (vif->bss_conf.assoc_capability &
3020                                                 WLAN_CAPABILITY_SHORT_PREAMBLE)
3021                         priv->staging_rxon.flags |=
3022                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3023                 else
3024                         priv->staging_rxon.flags &=
3025                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3026
3027                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3028                         if (vif->bss_conf.assoc_capability &
3029                                                 WLAN_CAPABILITY_SHORT_SLOT_TIME)
3030                                 priv->staging_rxon.flags |=
3031                                         RXON_FLG_SHORT_SLOT_MSK;
3032                         else
3033                                 priv->staging_rxon.flags &=
3034                                         ~RXON_FLG_SHORT_SLOT_MSK;
3035
3036                         if (vif->type == NL80211_IFTYPE_ADHOC)
3037                                 priv->staging_rxon.flags &=
3038                                         ~RXON_FLG_SHORT_SLOT_MSK;
3039                 }
3040                 /* restore RXON assoc */
3041                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3042                 iwlcore_commit_rxon(priv);
3043         }
3044         iwl_send_beacon_cmd(priv);
3045
3046         /* FIXME - we need to add code here to detect a totally new
3047          * configuration, reset the AP, unassoc, rxon timing, assoc,
3048          * clear sta table, add BCAST sta... */
3049 }
3050
3051 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3052                                     struct ieee80211_vif *vif,
3053                                     struct ieee80211_key_conf *keyconf,
3054                                     struct ieee80211_sta *sta,
3055                                     u32 iv32, u16 *phase1key)
3056 {
3057
3058         struct iwl_priv *priv = hw->priv;
3059         IWL_DEBUG_MAC80211(priv, "enter\n");
3060
3061         iwl_update_tkip_key(priv, keyconf, sta,
3062                             iv32, phase1key);
3063
3064         IWL_DEBUG_MAC80211(priv, "leave\n");
3065 }
3066
3067 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3068                            struct ieee80211_vif *vif,
3069                            struct ieee80211_sta *sta,
3070                            struct ieee80211_key_conf *key)
3071 {
3072         struct iwl_priv *priv = hw->priv;
3073         int ret;
3074         u8 sta_id;
3075         bool is_default_wep_key = false;
3076
3077         IWL_DEBUG_MAC80211(priv, "enter\n");
3078
3079         if (priv->cfg->mod_params->sw_crypto) {
3080                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3081                 return -EOPNOTSUPP;
3082         }
3083
3084         if (sta) {
3085                 sta_id = iwl_sta_id(sta);
3086
3087                 if (sta_id == IWL_INVALID_STATION) {
3088                         IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
3089                                            sta->addr);
3090                         return -EINVAL;
3091                 }
3092         } else {
3093                 sta_id = priv->hw_params.bcast_sta_id;
3094         }
3095
3096         mutex_lock(&priv->mutex);
3097         iwl_scan_cancel_timeout(priv, 100);
3098
3099         /*
3100          * If we are getting WEP group key and we didn't receive any key mapping
3101          * so far, we are in legacy wep mode (group key only), otherwise we are
3102          * in 1X mode.
3103          * In legacy wep mode, we use another host command to the uCode.
3104          */
3105         if (key->alg == ALG_WEP && !sta && vif->type != NL80211_IFTYPE_AP) {
3106                 if (cmd == SET_KEY)
3107                         is_default_wep_key = !priv->key_mapping_key;
3108                 else
3109                         is_default_wep_key =
3110                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3111         }
3112
3113         switch (cmd) {
3114         case SET_KEY:
3115                 if (is_default_wep_key)
3116                         ret = iwl_set_default_wep_key(priv, key);
3117                 else
3118                         ret = iwl_set_dynamic_key(priv, key, sta_id);
3119
3120                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3121                 break;
3122         case DISABLE_KEY:
3123                 if (is_default_wep_key)
3124                         ret = iwl_remove_default_wep_key(priv, key);
3125                 else
3126                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
3127
3128                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3129                 break;
3130         default:
3131                 ret = -EINVAL;
3132         }
3133
3134         mutex_unlock(&priv->mutex);
3135         IWL_DEBUG_MAC80211(priv, "leave\n");
3136
3137         return ret;
3138 }
3139
3140 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3141                                 struct ieee80211_vif *vif,
3142                                 enum ieee80211_ampdu_mlme_action action,
3143                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3144 {
3145         struct iwl_priv *priv = hw->priv;
3146         int ret;
3147
3148         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3149                      sta->addr, tid);
3150
3151         if (!(priv->cfg->sku & IWL_SKU_N))
3152                 return -EACCES;
3153
3154         switch (action) {
3155         case IEEE80211_AMPDU_RX_START:
3156                 IWL_DEBUG_HT(priv, "start Rx\n");
3157                 return iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3158         case IEEE80211_AMPDU_RX_STOP:
3159                 IWL_DEBUG_HT(priv, "stop Rx\n");
3160                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3161                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3162                         return 0;
3163                 else
3164                         return ret;
3165         case IEEE80211_AMPDU_TX_START:
3166                 IWL_DEBUG_HT(priv, "start Tx\n");
3167                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3168                 if (ret == 0) {
3169                         priv->_agn.agg_tids_count++;
3170                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3171                                      priv->_agn.agg_tids_count);
3172                 }
3173                 return ret;
3174         case IEEE80211_AMPDU_TX_STOP:
3175                 IWL_DEBUG_HT(priv, "stop Tx\n");
3176                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3177                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3178                         priv->_agn.agg_tids_count--;
3179                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3180                                      priv->_agn.agg_tids_count);
3181                 }
3182                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3183                         return 0;
3184                 else
3185                         return ret;
3186         case IEEE80211_AMPDU_TX_OPERATIONAL:
3187                 /* do nothing */
3188                 return -EOPNOTSUPP;
3189         default:
3190                 IWL_DEBUG_HT(priv, "unknown\n");
3191                 return -EINVAL;
3192                 break;
3193         }
3194         return 0;
3195 }
3196
3197 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3198                                struct ieee80211_vif *vif,
3199                                enum sta_notify_cmd cmd,
3200                                struct ieee80211_sta *sta)
3201 {
3202         struct iwl_priv *priv = hw->priv;
3203         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3204         int sta_id;
3205
3206         switch (cmd) {
3207         case STA_NOTIFY_SLEEP:
3208                 WARN_ON(!sta_priv->client);
3209                 sta_priv->asleep = true;
3210                 if (atomic_read(&sta_priv->pending_frames) > 0)
3211                         ieee80211_sta_block_awake(hw, sta, true);
3212                 break;
3213         case STA_NOTIFY_AWAKE:
3214                 WARN_ON(!sta_priv->client);
3215                 if (!sta_priv->asleep)
3216                         break;
3217                 sta_priv->asleep = false;
3218                 sta_id = iwl_sta_id(sta);
3219                 if (sta_id != IWL_INVALID_STATION)
3220                         iwl_sta_modify_ps_wake(priv, sta_id);
3221                 break;
3222         default:
3223                 break;
3224         }
3225 }
3226
3227 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3228                               struct ieee80211_vif *vif,
3229                               struct ieee80211_sta *sta)
3230 {
3231         struct iwl_priv *priv = hw->priv;
3232         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3233         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3234         int ret;
3235         u8 sta_id;
3236
3237         sta_priv->common.sta_id = IWL_INVALID_STATION;
3238
3239         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3240                         sta->addr);
3241
3242         atomic_set(&sta_priv->pending_frames, 0);
3243         if (vif->type == NL80211_IFTYPE_AP)
3244                 sta_priv->client = true;
3245
3246         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3247                                      &sta_id);
3248         if (ret) {
3249                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3250                         sta->addr, ret);
3251                 /* Should we return success if return code is EEXIST ? */
3252                 return ret;
3253         }
3254
3255         sta_priv->common.sta_id = sta_id;
3256
3257         /* Initialize rate scaling */
3258         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3259                        sta->addr);
3260         iwl_rs_rate_init(priv, sta, sta_id);
3261
3262         return 0;
3263 }
3264
3265 /*****************************************************************************
3266  *
3267  * sysfs attributes
3268  *
3269  *****************************************************************************/
3270
3271 #ifdef CONFIG_IWLWIFI_DEBUG
3272
3273 /*
3274  * The following adds a new attribute to the sysfs representation
3275  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3276  * used for controlling the debug level.
3277  *
3278  * See the level definitions in iwl for details.
3279  *
3280  * The debug_level being managed using sysfs below is a per device debug
3281  * level that is used instead of the global debug level if it (the per
3282  * device debug level) is set.
3283  */
3284 static ssize_t show_debug_level(struct device *d,
3285                                 struct device_attribute *attr, char *buf)
3286 {
3287         struct iwl_priv *priv = dev_get_drvdata(d);
3288         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3289 }
3290 static ssize_t store_debug_level(struct device *d,
3291                                 struct device_attribute *attr,
3292                                  const char *buf, size_t count)
3293 {
3294         struct iwl_priv *priv = dev_get_drvdata(d);
3295         unsigned long val;
3296         int ret;
3297
3298         ret = strict_strtoul(buf, 0, &val);
3299         if (ret)
3300                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3301         else {
3302                 priv->debug_level = val;
3303                 if (iwl_alloc_traffic_mem(priv))
3304                         IWL_ERR(priv,
3305                                 "Not enough memory to generate traffic log\n");
3306         }
3307         return strnlen(buf, count);
3308 }
3309
3310 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3311                         show_debug_level, store_debug_level);
3312
3313
3314 #endif /* CONFIG_IWLWIFI_DEBUG */
3315
3316
3317 static ssize_t show_temperature(struct device *d,
3318                                 struct device_attribute *attr, char *buf)
3319 {
3320         struct iwl_priv *priv = dev_get_drvdata(d);
3321
3322         if (!iwl_is_alive(priv))
3323                 return -EAGAIN;
3324
3325         return sprintf(buf, "%d\n", priv->temperature);
3326 }
3327
3328 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3329
3330 static ssize_t show_tx_power(struct device *d,
3331                              struct device_attribute *attr, char *buf)
3332 {
3333         struct iwl_priv *priv = dev_get_drvdata(d);
3334
3335         if (!iwl_is_ready_rf(priv))
3336                 return sprintf(buf, "off\n");
3337         else
3338                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3339 }
3340
3341 static ssize_t store_tx_power(struct device *d,
3342                               struct device_attribute *attr,
3343                               const char *buf, size_t count)
3344 {
3345         struct iwl_priv *priv = dev_get_drvdata(d);
3346         unsigned long val;
3347         int ret;
3348
3349         ret = strict_strtoul(buf, 10, &val);
3350         if (ret)
3351                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3352         else {
3353                 ret = iwl_set_tx_power(priv, val, false);
3354                 if (ret)
3355                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3356                                 ret);
3357                 else
3358                         ret = count;
3359         }
3360         return ret;
3361 }
3362
3363 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3364
3365 static ssize_t show_rts_ht_protection(struct device *d,
3366                              struct device_attribute *attr, char *buf)
3367 {
3368         struct iwl_priv *priv = dev_get_drvdata(d);
3369
3370         return sprintf(buf, "%s\n",
3371                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3372 }
3373
3374 static ssize_t store_rts_ht_protection(struct device *d,
3375                               struct device_attribute *attr,
3376                               const char *buf, size_t count)
3377 {
3378         struct iwl_priv *priv = dev_get_drvdata(d);
3379         unsigned long val;
3380         int ret;
3381
3382         ret = strict_strtoul(buf, 10, &val);
3383         if (ret)
3384                 IWL_INFO(priv, "Input is not in decimal form.\n");
3385         else {
3386                 if (!iwl_is_associated(priv))
3387                         priv->cfg->use_rts_for_ht = val ? true : false;
3388                 else
3389                         IWL_ERR(priv, "Sta associated with AP - "
3390                                 "Change protection mechanism is not allowed\n");
3391                 ret = count;
3392         }
3393         return ret;
3394 }
3395
3396 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3397                         show_rts_ht_protection, store_rts_ht_protection);
3398
3399
3400 /*****************************************************************************
3401  *
3402  * driver setup and teardown
3403  *
3404  *****************************************************************************/
3405
3406 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3407 {
3408         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3409
3410         init_waitqueue_head(&priv->wait_command_queue);
3411
3412         INIT_WORK(&priv->restart, iwl_bg_restart);
3413         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3414         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3415         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3416         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3417         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3418
3419         iwl_setup_scan_deferred_work(priv);
3420
3421         if (priv->cfg->ops->lib->setup_deferred_work)
3422                 priv->cfg->ops->lib->setup_deferred_work(priv);
3423
3424         init_timer(&priv->statistics_periodic);
3425         priv->statistics_periodic.data = (unsigned long)priv;
3426         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3427
3428         init_timer(&priv->ucode_trace);
3429         priv->ucode_trace.data = (unsigned long)priv;
3430         priv->ucode_trace.function = iwl_bg_ucode_trace;
3431
3432         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3433                 init_timer(&priv->monitor_recover);
3434                 priv->monitor_recover.data = (unsigned long)priv;
3435                 priv->monitor_recover.function =
3436                         priv->cfg->ops->lib->recover_from_tx_stall;
3437         }
3438
3439         if (!priv->cfg->use_isr_legacy)
3440                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3441                         iwl_irq_tasklet, (unsigned long)priv);
3442         else
3443                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3444                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3445 }
3446
3447 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3448 {
3449         if (priv->cfg->ops->lib->cancel_deferred_work)
3450                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3451
3452         cancel_delayed_work_sync(&priv->init_alive_start);
3453         cancel_delayed_work(&priv->scan_check);
3454         cancel_work_sync(&priv->start_internal_scan);
3455         cancel_delayed_work(&priv->alive_start);
3456         cancel_work_sync(&priv->beacon_update);
3457         del_timer_sync(&priv->statistics_periodic);
3458         del_timer_sync(&priv->ucode_trace);
3459         if (priv->cfg->ops->lib->recover_from_tx_stall)
3460                 del_timer_sync(&priv->monitor_recover);
3461 }
3462
3463 static void iwl_init_hw_rates(struct iwl_priv *priv,
3464                               struct ieee80211_rate *rates)
3465 {
3466         int i;
3467
3468         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3469                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3470                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3471                 rates[i].hw_value_short = i;
3472                 rates[i].flags = 0;
3473                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3474                         /*
3475                          * If CCK != 1M then set short preamble rate flag.
3476                          */
3477                         rates[i].flags |=
3478                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3479                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3480                 }
3481         }
3482 }
3483
3484 static int iwl_init_drv(struct iwl_priv *priv)
3485 {
3486         int ret;
3487
3488         priv->ibss_beacon = NULL;
3489
3490         spin_lock_init(&priv->sta_lock);
3491         spin_lock_init(&priv->hcmd_lock);
3492
3493         INIT_LIST_HEAD(&priv->free_frames);
3494
3495         mutex_init(&priv->mutex);
3496         mutex_init(&priv->sync_cmd_mutex);
3497
3498         priv->ieee_channels = NULL;
3499         priv->ieee_rates = NULL;
3500         priv->band = IEEE80211_BAND_2GHZ;
3501
3502         priv->iw_mode = NL80211_IFTYPE_STATION;
3503         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3504         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3505         priv->_agn.agg_tids_count = 0;
3506
3507         /* initialize force reset */
3508         priv->force_reset[IWL_RF_RESET].reset_duration =
3509                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3510         priv->force_reset[IWL_FW_RESET].reset_duration =
3511                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3512
3513         /* Choose which receivers/antennas to use */
3514         if (priv->cfg->ops->hcmd->set_rxon_chain)
3515                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3516
3517         iwl_init_scan_params(priv);
3518
3519         /* Set the tx_power_user_lmt to the lowest power level
3520          * this value will get overwritten by channel max power avg
3521          * from eeprom */
3522         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3523
3524         ret = iwl_init_channel_map(priv);
3525         if (ret) {
3526                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3527                 goto err;
3528         }
3529
3530         ret = iwlcore_init_geos(priv);
3531         if (ret) {
3532                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3533                 goto err_free_channel_map;
3534         }
3535         iwl_init_hw_rates(priv, priv->ieee_rates);
3536
3537         return 0;
3538
3539 err_free_channel_map:
3540         iwl_free_channel_map(priv);
3541 err:
3542         return ret;
3543 }
3544
3545 static void iwl_uninit_drv(struct iwl_priv *priv)
3546 {
3547         iwl_calib_free_results(priv);
3548         iwlcore_free_geos(priv);
3549         iwl_free_channel_map(priv);
3550         kfree(priv->scan_cmd);
3551 }
3552
3553 static struct attribute *iwl_sysfs_entries[] = {
3554         &dev_attr_temperature.attr,
3555         &dev_attr_tx_power.attr,
3556         &dev_attr_rts_ht_protection.attr,
3557 #ifdef CONFIG_IWLWIFI_DEBUG
3558         &dev_attr_debug_level.attr,
3559 #endif
3560         NULL
3561 };
3562
3563 static struct attribute_group iwl_attribute_group = {
3564         .name = NULL,           /* put in device directory */
3565         .attrs = iwl_sysfs_entries,
3566 };
3567
3568 static struct ieee80211_ops iwl_hw_ops = {
3569         .tx = iwl_mac_tx,
3570         .start = iwl_mac_start,
3571         .stop = iwl_mac_stop,
3572         .add_interface = iwl_mac_add_interface,
3573         .remove_interface = iwl_mac_remove_interface,
3574         .config = iwl_mac_config,
3575         .configure_filter = iwl_configure_filter,
3576         .set_key = iwl_mac_set_key,
3577         .update_tkip_key = iwl_mac_update_tkip_key,
3578         .conf_tx = iwl_mac_conf_tx,
3579         .reset_tsf = iwl_mac_reset_tsf,
3580         .bss_info_changed = iwl_bss_info_changed,
3581         .ampdu_action = iwl_mac_ampdu_action,
3582         .hw_scan = iwl_mac_hw_scan,
3583         .sta_notify = iwl_mac_sta_notify,
3584         .sta_add = iwlagn_mac_sta_add,
3585         .sta_remove = iwl_mac_sta_remove,
3586 };
3587
3588 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3589 {
3590         int err = 0;
3591         struct iwl_priv *priv;
3592         struct ieee80211_hw *hw;
3593         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3594         unsigned long flags;
3595         u16 pci_cmd;
3596
3597         /************************
3598          * 1. Allocating HW data
3599          ************************/
3600
3601         /* Disabling hardware scan means that mac80211 will perform scans
3602          * "the hard way", rather than using device's scan. */
3603         if (cfg->mod_params->disable_hw_scan) {
3604                 if (iwl_debug_level & IWL_DL_INFO)
3605                         dev_printk(KERN_DEBUG, &(pdev->dev),
3606                                    "Disabling hw_scan\n");
3607                 iwl_hw_ops.hw_scan = NULL;
3608         }
3609
3610         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3611         if (!hw) {
3612                 err = -ENOMEM;
3613                 goto out;
3614         }
3615         priv = hw->priv;
3616         /* At this point both hw and priv are allocated. */
3617
3618         SET_IEEE80211_DEV(hw, &pdev->dev);
3619
3620         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3621         priv->cfg = cfg;
3622         priv->pci_dev = pdev;
3623         priv->inta_mask = CSR_INI_SET_MASK;
3624
3625 #ifdef CONFIG_IWLWIFI_DEBUG
3626         atomic_set(&priv->restrict_refcnt, 0);
3627 #endif
3628         if (iwl_alloc_traffic_mem(priv))
3629                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3630
3631         /**************************
3632          * 2. Initializing PCI bus
3633          **************************/
3634         if (pci_enable_device(pdev)) {
3635                 err = -ENODEV;
3636                 goto out_ieee80211_free_hw;
3637         }
3638
3639         pci_set_master(pdev);
3640
3641         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3642         if (!err)
3643                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3644         if (err) {
3645                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3646                 if (!err)
3647                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3648                 /* both attempts failed: */
3649                 if (err) {
3650                         IWL_WARN(priv, "No suitable DMA available.\n");
3651                         goto out_pci_disable_device;
3652                 }
3653         }
3654
3655         err = pci_request_regions(pdev, DRV_NAME);
3656         if (err)
3657                 goto out_pci_disable_device;
3658
3659         pci_set_drvdata(pdev, priv);
3660
3661
3662         /***********************
3663          * 3. Read REV register
3664          ***********************/
3665         priv->hw_base = pci_iomap(pdev, 0, 0);
3666         if (!priv->hw_base) {
3667                 err = -ENODEV;
3668                 goto out_pci_release_regions;
3669         }
3670
3671         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3672                 (unsigned long long) pci_resource_len(pdev, 0));
3673         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3674
3675         /* these spin locks will be used in apm_ops.init and EEPROM access
3676          * we should init now
3677          */
3678         spin_lock_init(&priv->reg_lock);
3679         spin_lock_init(&priv->lock);
3680
3681         /*
3682          * stop and reset the on-board processor just in case it is in a
3683          * strange state ... like being left stranded by a primary kernel
3684          * and this is now the kdump kernel trying to start up
3685          */
3686         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3687
3688         iwl_hw_detect(priv);
3689         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3690                 priv->cfg->name, priv->hw_rev);
3691
3692         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3693          * PCI Tx retries from interfering with C3 CPU state */
3694         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3695
3696         iwl_prepare_card_hw(priv);
3697         if (!priv->hw_ready) {
3698                 IWL_WARN(priv, "Failed, HW not ready\n");
3699                 goto out_iounmap;
3700         }
3701
3702         /*****************
3703          * 4. Read EEPROM
3704          *****************/
3705         /* Read the EEPROM */
3706         err = iwl_eeprom_init(priv);
3707         if (err) {
3708                 IWL_ERR(priv, "Unable to init EEPROM\n");
3709                 goto out_iounmap;
3710         }
3711         err = iwl_eeprom_check_version(priv);
3712         if (err)
3713                 goto out_free_eeprom;
3714
3715         /* extract MAC Address */
3716         iwl_eeprom_get_mac(priv, priv->mac_addr);
3717         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3718         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3719
3720         /************************
3721          * 5. Setup HW constants
3722          ************************/
3723         if (iwl_set_hw_params(priv)) {
3724                 IWL_ERR(priv, "failed to set hw parameters\n");
3725                 goto out_free_eeprom;
3726         }
3727
3728         /*******************
3729          * 6. Setup priv
3730          *******************/
3731
3732         err = iwl_init_drv(priv);
3733         if (err)
3734                 goto out_free_eeprom;
3735         /* At this point both hw and priv are initialized. */
3736
3737         /********************
3738          * 7. Setup services
3739          ********************/
3740         spin_lock_irqsave(&priv->lock, flags);
3741         iwl_disable_interrupts(priv);
3742         spin_unlock_irqrestore(&priv->lock, flags);
3743
3744         pci_enable_msi(priv->pci_dev);
3745
3746         iwl_alloc_isr_ict(priv);
3747         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3748                           IRQF_SHARED, DRV_NAME, priv);
3749         if (err) {
3750                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3751                 goto out_disable_msi;
3752         }
3753         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3754         if (err) {
3755                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3756                 goto out_free_irq;
3757         }
3758
3759         iwl_setup_deferred_work(priv);
3760         iwl_setup_rx_handlers(priv);
3761
3762         /*********************************************
3763          * 8. Enable interrupts and read RFKILL state
3764          *********************************************/
3765
3766         /* enable interrupts if needed: hw bug w/a */
3767         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3768         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3769                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3770                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3771         }
3772
3773         iwl_enable_interrupts(priv);
3774
3775         /* If platform's RF_KILL switch is NOT set to KILL */
3776         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3777                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3778         else
3779                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3780
3781         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3782                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3783
3784         iwl_power_initialize(priv);
3785         iwl_tt_initialize(priv);
3786
3787         init_completion(&priv->_agn.firmware_loading_complete);
3788
3789         err = iwl_request_firmware(priv, true);
3790         if (err)
3791                 goto out_remove_sysfs;
3792
3793         return 0;
3794
3795  out_remove_sysfs:
3796         destroy_workqueue(priv->workqueue);
3797         priv->workqueue = NULL;
3798         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3799  out_free_irq:
3800         free_irq(priv->pci_dev->irq, priv);
3801         iwl_free_isr_ict(priv);
3802  out_disable_msi:
3803         pci_disable_msi(priv->pci_dev);
3804         iwl_uninit_drv(priv);
3805  out_free_eeprom:
3806         iwl_eeprom_free(priv);
3807  out_iounmap:
3808         pci_iounmap(pdev, priv->hw_base);
3809  out_pci_release_regions:
3810         pci_set_drvdata(pdev, NULL);
3811         pci_release_regions(pdev);
3812  out_pci_disable_device:
3813         pci_disable_device(pdev);
3814  out_ieee80211_free_hw:
3815         iwl_free_traffic_mem(priv);
3816         ieee80211_free_hw(priv->hw);
3817  out:
3818         return err;
3819 }
3820
3821 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3822 {
3823         struct iwl_priv *priv = pci_get_drvdata(pdev);
3824         unsigned long flags;
3825
3826         if (!priv)
3827                 return;
3828
3829         wait_for_completion(&priv->_agn.firmware_loading_complete);
3830
3831         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3832
3833         iwl_dbgfs_unregister(priv);
3834         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3835
3836         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3837          * to be called and iwl_down since we are removing the device
3838          * we need to set STATUS_EXIT_PENDING bit.
3839          */
3840         set_bit(STATUS_EXIT_PENDING, &priv->status);
3841         if (priv->mac80211_registered) {
3842                 ieee80211_unregister_hw(priv->hw);
3843                 priv->mac80211_registered = 0;
3844         } else {
3845                 iwl_down(priv);
3846         }
3847
3848         /*
3849          * Make sure device is reset to low power before unloading driver.
3850          * This may be redundant with iwl_down(), but there are paths to
3851          * run iwl_down() without calling apm_ops.stop(), and there are
3852          * paths to avoid running iwl_down() at all before leaving driver.
3853          * This (inexpensive) call *makes sure* device is reset.
3854          */
3855         priv->cfg->ops->lib->apm_ops.stop(priv);
3856
3857         iwl_tt_exit(priv);
3858
3859         /* make sure we flush any pending irq or
3860          * tasklet for the driver
3861          */
3862         spin_lock_irqsave(&priv->lock, flags);
3863         iwl_disable_interrupts(priv);
3864         spin_unlock_irqrestore(&priv->lock, flags);
3865
3866         iwl_synchronize_irq(priv);
3867
3868         iwl_dealloc_ucode_pci(priv);
3869
3870         if (priv->rxq.bd)
3871                 iwlagn_rx_queue_free(priv, &priv->rxq);
3872         iwlagn_hw_txq_ctx_free(priv);
3873
3874         iwl_eeprom_free(priv);
3875
3876
3877         /*netif_stop_queue(dev); */
3878         flush_workqueue(priv->workqueue);
3879
3880         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3881          * priv->workqueue... so we can't take down the workqueue
3882          * until now... */
3883         destroy_workqueue(priv->workqueue);
3884         priv->workqueue = NULL;
3885         iwl_free_traffic_mem(priv);
3886
3887         free_irq(priv->pci_dev->irq, priv);
3888         pci_disable_msi(priv->pci_dev);
3889         pci_iounmap(pdev, priv->hw_base);
3890         pci_release_regions(pdev);
3891         pci_disable_device(pdev);
3892         pci_set_drvdata(pdev, NULL);
3893
3894         iwl_uninit_drv(priv);
3895
3896         iwl_free_isr_ict(priv);
3897
3898         if (priv->ibss_beacon)
3899                 dev_kfree_skb(priv->ibss_beacon);
3900
3901         ieee80211_free_hw(priv->hw);
3902 }
3903
3904
3905 /*****************************************************************************
3906  *
3907  * driver and module entry point
3908  *
3909  *****************************************************************************/
3910
3911 /* Hardware specific file defines the PCI IDs table for that hardware module */
3912 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3913 #ifdef CONFIG_IWL4965
3914         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3915         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3916 #endif /* CONFIG_IWL4965 */
3917 #ifdef CONFIG_IWL5000
3918 /* 5100 Series WiFi */
3919         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3920         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3921         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3922         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3923         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3924         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3925         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3926         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3927         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3928         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3929         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3930         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3931         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3932         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3933         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3934         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3935         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3936         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3937         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3938         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3939         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3940         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3941         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3942         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3943
3944 /* 5300 Series WiFi */
3945         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3946         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3947         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3948         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3949         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3950         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3951         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3952         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3953         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3954         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3955         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3956         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3957
3958 /* 5350 Series WiFi/WiMax */
3959         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3960         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3961         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3962
3963 /* 5150 Series Wifi/WiMax */
3964         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3965         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3966         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3967         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3968         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3969         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3970
3971         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3972         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3973         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3974         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3975
3976 /* 6x00 Series */
3977         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3978         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3979         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3980         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3981         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3982         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3983         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3984         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3985         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3986         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3987
3988 /* 6x00 Series Gen2a */
3989         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
3990         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
3991         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
3992
3993 /* 6x50 WiFi/WiMax Series */
3994         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3995         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3996         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3997         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3998         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3999         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4000
4001 /* 1000 Series WiFi */
4002         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4003         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4004         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4005         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4006         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4007         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4008         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4009         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4010         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4011         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4012         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4013         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4014 #endif /* CONFIG_IWL5000 */
4015
4016         {0}
4017 };
4018 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4019
4020 static struct pci_driver iwl_driver = {
4021         .name = DRV_NAME,
4022         .id_table = iwl_hw_card_ids,
4023         .probe = iwl_pci_probe,
4024         .remove = __devexit_p(iwl_pci_remove),
4025 #ifdef CONFIG_PM
4026         .suspend = iwl_pci_suspend,
4027         .resume = iwl_pci_resume,
4028 #endif
4029 };
4030
4031 static int __init iwl_init(void)
4032 {
4033
4034         int ret;
4035         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4036         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
4037
4038         ret = iwlagn_rate_control_register();
4039         if (ret) {
4040                 printk(KERN_ERR DRV_NAME
4041                        "Unable to register rate control algorithm: %d\n", ret);
4042                 return ret;
4043         }
4044
4045         ret = pci_register_driver(&iwl_driver);
4046         if (ret) {
4047                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
4048                 goto error_register;
4049         }
4050
4051         return ret;
4052
4053 error_register:
4054         iwlagn_rate_control_unregister();
4055         return ret;
4056 }
4057
4058 static void __exit iwl_exit(void)
4059 {
4060         pci_unregister_driver(&iwl_driver);
4061         iwlagn_rate_control_unregister();
4062 }
4063
4064 module_exit(iwl_exit);
4065 module_init(iwl_init);
4066
4067 #ifdef CONFIG_IWLWIFI_DEBUG
4068 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4069 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4070 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4071 MODULE_PARM_DESC(debug, "debug output mask");
4072 #endif
4073
4074 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4075 MODULE_PARM_DESC(swcrypto50,
4076                  "using crypto in software (default 0 [hardware]) (deprecated)");
4077 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4078 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4079 module_param_named(queues_num50,
4080                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4081 MODULE_PARM_DESC(queues_num50,
4082                  "number of hw queues in 50xx series (deprecated)");
4083 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4084 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4085 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4086 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4087 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4088 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4089 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4090                    int, S_IRUGO);
4091 MODULE_PARM_DESC(amsdu_size_8K50,
4092                  "enable 8K amsdu size in 50XX series (deprecated)");
4093 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4094                    int, S_IRUGO);
4095 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4096 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4097 MODULE_PARM_DESC(fw_restart50,
4098                  "restart firmware in case of error (deprecated)");
4099 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4100 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4101 module_param_named(
4102         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4103 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4104
4105 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4106                    S_IRUGO);
4107 MODULE_PARM_DESC(ucode_alternative,
4108                  "specify ucode alternative to use from ucode file");