drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/pci.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/delay.h>
  36 #include <linux/sched.h>
  37 #include <linux/skbuff.h>
  38 #include <linux/netdevice.h>
  39 #include <linux/wireless.h>
  40 #include <linux/firmware.h>
  41 #include <linux/etherdevice.h>
  42 #include <linux/if_arp.h>
  43
  44 #include <net/mac80211.h>
  45
  46 #include <asm/div64.h>
  47
  48 #define DRV_NAME        "iwlagn"
  49
  50 #include "iwl-eeprom.h"
  51 #include "iwl-dev.h"
  52 #include "iwl-core.h"
  53 #include "iwl-io.h"
  54 #include "iwl-helpers.h"
  55 #include "iwl-sta.h"
  56 #include "iwl-calib.h"
  57 #include "iwl-agn.h"
  58
  59
  60 /******************************************************************************
  61  *
  62  * module boiler plate
  63  *
  64  ******************************************************************************/
  65
  66 /*
  67  * module name, copyright, version, etc.
  68  */
  69 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  70
  71 #ifdef CONFIG_IWLWIFI_DEBUG
  72 #define VD "d"
  73 #else
  74 #define VD
  75 #endif
  76
  77 #define DRV_VERSION     IWLWIFI_VERSION VD
  78
  79
  80 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  81 MODULE_VERSION(DRV_VERSION);
  82 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  83 MODULE_LICENSE("GPL");
  84 MODULE_ALIAS("iwl4965");
  85
  86 /*************** STATION TABLE MANAGEMENT ****
  87  * mac80211 should be examined to determine if sta_info is duplicating
  88  * the functionality provided here
  89  */
  90
  91 /**************************************************************/
  92
  93 /**
  94  * iwl_commit_rxon - commit staging_rxon to hardware
  95  *
  96  * The RXON command in staging_rxon is committed to the hardware and
  97  * the active_rxon structure is updated with the new data.  This
  98  * function correctly transitions out of the RXON_ASSOC_MSK state if
  99  * a HW tune is required based on the RXON structure changes.
 100  */
 101 int iwl_commit_rxon(struct iwl_priv *priv)
 102 {
 103         /* cast away the const for active_rxon in this function */
 104         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
 105         int ret;
 106         bool new_assoc =
 107                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 108
 109         if (!iwl_is_alive(priv))
 110                 return -EBUSY;
 111
 112         /* always get timestamp with Rx frame */
 113         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 114
 115         ret = iwl_check_rxon_cmd(priv);
 116         if (ret) {
 117                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 118                 return -EINVAL;
 119         }
 120
 121         /*
 122          * receive commit_rxon request
 123          * abort any previous channel switch if still in process
 124          */
 125         if (priv->switch_rxon.switch_in_progress &&
 126             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 127                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 128                       le16_to_cpu(priv->switch_rxon.channel));
 129                 priv->switch_rxon.switch_in_progress = false;
 130         }
 131
 132         /* If we don't need to send a full RXON, we can use
 133          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 134          * and other flags for the current radio configuration. */
 135         if (!iwl_full_rxon_required(priv)) {
 136                 ret = iwl_send_rxon_assoc(priv);
 137                 if (ret) {
 138                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 139                         return ret;
 140                 }
 141
 142                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 143                 iwl_print_rx_config_cmd(priv);
 144                 return 0;
 145         }
 146
 147         /* If we are currently associated and the new config requires
 148          * an RXON_ASSOC and the new config wants the associated mask enabled,
 149          * we must clear the associated from the active configuration
 150          * before we apply the new config */
 151         if (iwl_is_associated(priv) && new_assoc) {
 152                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 153                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 154
 155                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 156                                       sizeof(struct iwl_rxon_cmd),
 157                                       &priv->active_rxon);
 158
 159                 /* If the mask clearing failed then we set
 160                  * active_rxon back to what it was previously */
 161                 if (ret) {
 162                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 163                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 164                         return ret;
 165                 }
 166                 iwl_clear_ucode_stations(priv, false);
 167                 iwl_restore_stations(priv);
 168         }
 169
 170         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 171                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 172                        "* channel = %d\n"
 173                        "* bssid = %pM\n",
 174                        (new_assoc ? "" : "out"),
 175                        le16_to_cpu(priv->staging_rxon.channel),
 176                        priv->staging_rxon.bssid_addr);
 177
 178         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 179
 180         /* Apply the new configuration
 181          * RXON unassoc clears the station table in uCode so restoration of
 182          * stations is needed after it (the RXON command) completes
 183          */
 184         if (!new_assoc) {
 185                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 186                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 187                 if (ret) {
 188                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 189                         return ret;
 190                 }
 191                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON. \n");
 192                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 193                 iwl_clear_ucode_stations(priv, false);
 194                 iwl_restore_stations(priv);
 195         }
 196
 197         priv->start_calib = 0;
 198         if (new_assoc) {
 199                 /*
 200                  * allow CTS-to-self if possible for new association.
 201                  * this is relevant only for 5000 series and up,
 202                  * but will not damage 4965
 203                  */
 204                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 205
 206                 /* Apply the new configuration
 207                  * RXON assoc doesn't clear the station table in uCode,
 208                  */
 209                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 210                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 211                 if (ret) {
 212                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 213                         return ret;
 214                 }
 215                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 216         }
 217         iwl_print_rx_config_cmd(priv);
 218
 219         iwl_init_sensitivity(priv);
 220
 221         /* If we issue a new RXON command which required a tune then we must
 222          * send a new TXPOWER command or we won't be able to Tx any frames */
 223         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 224         if (ret) {
 225                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 226                 return ret;
 227         }
 228
 229         return 0;
 230 }
 231
 232 void iwl_update_chain_flags(struct iwl_priv *priv)
 233 {
 234
 235         if (priv->cfg->ops->hcmd->set_rxon_chain)
 236                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 237         iwlcore_commit_rxon(priv);
 238 }
 239
 240 static void iwl_clear_free_frames(struct iwl_priv *priv)
 241 {
 242         struct list_head *element;
 243
 244         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 245                        priv->frames_count);
 246
 247         while (!list_empty(&priv->free_frames)) {
 248                 element = priv->free_frames.next;
 249                 list_del(element);
 250                 kfree(list_entry(element, struct iwl_frame, list));
 251                 priv->frames_count--;
 252         }
 253
 254         if (priv->frames_count) {
 255                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 256                             priv->frames_count);
 257                 priv->frames_count = 0;
 258         }
 259 }
 260
 261 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 262 {
 263         struct iwl_frame *frame;
 264         struct list_head *element;
 265         if (list_empty(&priv->free_frames)) {
 266                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 267                 if (!frame) {
 268                         IWL_ERR(priv, "Could not allocate frame!\n");
 269                         return NULL;
 270                 }
 271
 272                 priv->frames_count++;
 273                 return frame;
 274         }
 275
 276         element = priv->free_frames.next;
 277         list_del(element);
 278         return list_entry(element, struct iwl_frame, list);
 279 }
 280
 281 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 282 {
 283         memset(frame, 0, sizeof(*frame));
 284         list_add(&frame->list, &priv->free_frames);
 285 }
 286
 287 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 288                                           struct ieee80211_hdr *hdr,
 289                                           int left)
 290 {
 291         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
 292             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
 293              (priv->iw_mode != NL80211_IFTYPE_AP)))
 294                 return 0;
 295
 296         if (priv->ibss_beacon->len > left)
 297                 return 0;
 298
 299         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 300
 301         return priv->ibss_beacon->len;
 302 }
 303
 304 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 305 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 306                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 307                 u8 *beacon, u32 frame_size)
 308 {
 309         u16 tim_idx;
 310         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 311
 312         /*
 313          * The index is relative to frame start but we start looking at the
 314          * variable-length part of the beacon.
 315          */
 316         tim_idx = mgmt->u.beacon.variable - beacon;
 317
 318         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 319         while ((tim_idx < (frame_size - 2)) &&
 320                         (beacon[tim_idx] != WLAN_EID_TIM))
 321                 tim_idx += beacon[tim_idx+1] + 2;
 322
 323         /* If TIM field was found, set variables */
 324         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 325                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 326                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 327         } else
 328                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 329 }
 330
 331 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 332                                        struct iwl_frame *frame)
 333 {
 334         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 335         u32 frame_size;
 336         u32 rate_flags;
 337         u32 rate;
 338         /*
 339          * We have to set up the TX command, the TX Beacon command, and the
 340          * beacon contents.
 341          */
 342
 343         /* Initialize memory */
 344         tx_beacon_cmd = &frame->u.beacon;
 345         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 346
 347         /* Set up TX beacon contents */
 348         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 349                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 350         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 351                 return 0;
 352
 353         /* Set up TX command fields */
 354         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 355         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 356         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 357         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 358                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 359
 360         /* Set up TX beacon command fields */
 361         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 362                         frame_size);
 363
 364         /* Set up packet rate and flags */
 365         rate = iwl_rate_get_lowest_plcp(priv);
 366         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
 367         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 368         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 369                 rate_flags |= RATE_MCS_CCK_MSK;
 370         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 371                         rate_flags);
 372
 373         return sizeof(*tx_beacon_cmd) + frame_size;
 374 }
 375 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 376 {
 377         struct iwl_frame *frame;
 378         unsigned int frame_size;
 379         int rc;
 380
 381         frame = iwl_get_free_frame(priv);
 382         if (!frame) {
 383                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 384                           "command.\n");
 385                 return -ENOMEM;
 386         }
 387
 388         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 389         if (!frame_size) {
 390                 IWL_ERR(priv, "Error configuring the beacon command\n");
 391                 iwl_free_frame(priv, frame);
 392                 return -EINVAL;
 393         }
 394
 395         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 396                               &frame->u.cmd[0]);
 397
 398         iwl_free_frame(priv, frame);
 399
 400         return rc;
 401 }
 402
 403 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 404 {
 405         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 406
 407         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 408         if (sizeof(dma_addr_t) > sizeof(u32))
 409                 addr |=
 410                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 411
 412         return addr;
 413 }
 414
 415 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 416 {
 417         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 418
 419         return le16_to_cpu(tb->hi_n_len) >> 4;
 420 }
 421
 422 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 423                                   dma_addr_t addr, u16 len)
 424 {
 425         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 426         u16 hi_n_len = len << 4;
 427
 428         put_unaligned_le32(addr, &tb->lo);
 429         if (sizeof(dma_addr_t) > sizeof(u32))
 430                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 431
 432         tb->hi_n_len = cpu_to_le16(hi_n_len);
 433
 434         tfd->num_tbs = idx + 1;
 435 }
 436
 437 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 438 {
 439         return tfd->num_tbs & 0x1f;
 440 }
 441
 442 /**
 443  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 444  * @priv - driver private data
 445  * @txq - tx queue
 446  *
 447  * Does NOT advance any TFD circular buffer read/write indexes
 448  * Does NOT free the TFD itself (which is within circular buffer)
 449  */
 450 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 451 {
 452         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 453         struct iwl_tfd *tfd;
 454         struct pci_dev *dev = priv->pci_dev;
 455         int index = txq->q.read_ptr;
 456         int i;
 457         int num_tbs;
 458
 459         tfd = &tfd_tmp[index];
 460
 461         /* Sanity check on number of chunks */
 462         num_tbs = iwl_tfd_get_num_tbs(tfd);
 463
 464         if (num_tbs >= IWL_NUM_OF_TBS) {
 465                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 466                 /* @todo issue fatal error, it is quite serious situation */
 467                 return;
 468         }
 469
 470         /* Unmap tx_cmd */
 471         if (num_tbs)
 472                 pci_unmap_single(dev,
 473                                 pci_unmap_addr(&txq->meta[index], mapping),
 474                                 pci_unmap_len(&txq->meta[index], len),
 475                                 PCI_DMA_BIDIRECTIONAL);
 476
 477         /* Unmap chunks, if any. */
 478         for (i = 1; i < num_tbs; i++) {
 479                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 480                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 481
 482                 if (txq->txb) {
 483                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
 484                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
 485                 }
 486         }
 487 }
 488
 489 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 490                                  struct iwl_tx_queue *txq,
 491                                  dma_addr_t addr, u16 len,
 492                                  u8 reset, u8 pad)
 493 {
 494         struct iwl_queue *q;
 495         struct iwl_tfd *tfd, *tfd_tmp;
 496         u32 num_tbs;
 497
 498         q = &txq->q;
 499         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 500         tfd = &tfd_tmp[q->write_ptr];
 501
 502         if (reset)
 503                 memset(tfd, 0, sizeof(*tfd));
 504
 505         num_tbs = iwl_tfd_get_num_tbs(tfd);
 506
 507         /* Each TFD can point to a maximum 20 Tx buffers */
 508         if (num_tbs >= IWL_NUM_OF_TBS) {
 509                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 510                           IWL_NUM_OF_TBS);
 511                 return -EINVAL;
 512         }
 513
 514         BUG_ON(addr & ~DMA_BIT_MASK(36));
 515         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 516                 IWL_ERR(priv, "Unaligned address = %llx\n",
 517                           (unsigned long long)addr);
 518
 519         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 520
 521         return 0;
 522 }
 523
 524 /*
 525  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 526  * given Tx queue, and enable the DMA channel used for that queue.
 527  *
 528  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 529  * channels supported in hardware.
 530  */
 531 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 532                          struct iwl_tx_queue *txq)
 533 {
 534         int txq_id = txq->q.id;
 535
 536         /* Circular buffer (TFD queue in DRAM) physical base address */
 537         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 538                              txq->q.dma_addr >> 8);
 539
 540         return 0;
 541 }
 542
 543 /******************************************************************************
 544  *
 545  * Generic RX handler implementations
 546  *
 547  ******************************************************************************/
 548 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 549                                 struct iwl_rx_mem_buffer *rxb)
 550 {
 551         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 552         struct iwl_alive_resp *palive;
 553         struct delayed_work *pwork;
 554
 555         palive = &pkt->u.alive_frame;
 556
 557         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 558                        "0x%01X 0x%01X\n",
 559                        palive->is_valid, palive->ver_type,
 560                        palive->ver_subtype);
 561
 562         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 563                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 564                 memcpy(&priv->card_alive_init,
 565                        &pkt->u.alive_frame,
 566                        sizeof(struct iwl_init_alive_resp));
 567                 pwork = &priv->init_alive_start;
 568         } else {
 569                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 570                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 571                        sizeof(struct iwl_alive_resp));
 572                 pwork = &priv->alive_start;
 573         }
 574
 575         /* We delay the ALIVE response by 5ms to
 576          * give the HW RF Kill time to activate... */
 577         if (palive->is_valid == UCODE_VALID_OK)
 578                 queue_delayed_work(priv->workqueue, pwork,
 579                                    msecs_to_jiffies(5));
 580         else
 581                 IWL_WARN(priv, "uCode did not respond OK.\n");
 582 }
 583
 584 static void iwl_bg_beacon_update(struct work_struct *work)
 585 {
 586         struct iwl_priv *priv =
 587                 container_of(work, struct iwl_priv, beacon_update);
 588         struct sk_buff *beacon;
 589
 590         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 591         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 592
 593         if (!beacon) {
 594                 IWL_ERR(priv, "update beacon failed\n");
 595                 return;
 596         }
 597
 598         mutex_lock(&priv->mutex);
 599         /* new beacon skb is allocated every time; dispose previous.*/
 600         if (priv->ibss_beacon)
 601                 dev_kfree_skb(priv->ibss_beacon);
 602
 603         priv->ibss_beacon = beacon;
 604         mutex_unlock(&priv->mutex);
 605
 606         iwl_send_beacon_cmd(priv);
 607 }
 608
 609 /**
 610  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 611  *
 612  * This callback is provided in order to send a statistics request.
 613  *
 614  * This timer function is continually reset to execute within
 615  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 616  * was received.  We need to ensure we receive the statistics in order
 617  * to update the temperature used for calibrating the TXPOWER.
 618  */
 619 static void iwl_bg_statistics_periodic(unsigned long data)
 620 {
 621         struct iwl_priv *priv = (struct iwl_priv *)data;
 622
 623         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 624                 return;
 625
 626         /* dont send host command if rf-kill is on */
 627         if (!iwl_is_ready_rf(priv))
 628                 return;
 629
 630         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 631 }
 632
 633
 634 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 635                                         u32 start_idx, u32 num_events,
 636                                         u32 mode)
 637 {
 638         u32 i;
 639         u32 ptr;        /* SRAM byte address of log data */
 640         u32 ev, time, data; /* event log data */
 641         unsigned long reg_flags;
 642
 643         if (mode == 0)
 644                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 645         else
 646                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 647
 648         /* Make sure device is powered up for SRAM reads */
 649         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 650         if (iwl_grab_nic_access(priv)) {
 651                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 652                 return;
 653         }
 654
 655         /* Set starting address; reads will auto-increment */
 656         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 657         rmb();
 658
 659         /*
 660          * "time" is actually "data" for mode 0 (no timestamp).
 661          * place event id # at far right for easier visual parsing.
 662          */
 663         for (i = 0; i < num_events; i++) {
 664                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 665                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 666                 if (mode == 0) {
 667                         trace_iwlwifi_dev_ucode_cont_event(priv,
 668                                                         0, time, ev);
 669                 } else {
 670                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 671                         trace_iwlwifi_dev_ucode_cont_event(priv,
 672                                                 time, data, ev);
 673                 }
 674         }
 675         /* Allow device to power down */
 676         iwl_release_nic_access(priv);
 677         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 678 }
 679
 680 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 681 {
 682         u32 capacity;   /* event log capacity in # entries */
 683         u32 base;       /* SRAM byte address of event log header */
 684         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 685         u32 num_wraps;  /* # times uCode wrapped to top of log */
 686         u32 next_entry; /* index of next entry to be written by uCode */
 687
 688         if (priv->ucode_type == UCODE_INIT)
 689                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 690         else
 691                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 692         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 693                 capacity = iwl_read_targ_mem(priv, base);
 694                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 695                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 696                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 697         } else
 698                 return;
 699
 700         if (num_wraps == priv->event_log.num_wraps) {
 701                 iwl_print_cont_event_trace(priv,
 702                                        base, priv->event_log.next_entry,
 703                                        next_entry - priv->event_log.next_entry,
 704                                        mode);
 705                 priv->event_log.non_wraps_count++;
 706         } else {
 707                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 708                         priv->event_log.wraps_more_count++;
 709                 else
 710                         priv->event_log.wraps_once_count++;
 711                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 712                                 num_wraps - priv->event_log.num_wraps,
 713                                 next_entry, priv->event_log.next_entry);
 714                 if (next_entry < priv->event_log.next_entry) {
 715                         iwl_print_cont_event_trace(priv, base,
 716                                priv->event_log.next_entry,
 717                                capacity - priv->event_log.next_entry,
 718                                mode);
 719
 720                         iwl_print_cont_event_trace(priv, base, 0,
 721                                 next_entry, mode);
 722                 } else {
 723                         iwl_print_cont_event_trace(priv, base,
 724                                next_entry, capacity - next_entry,
 725                                mode);
 726
 727                         iwl_print_cont_event_trace(priv, base, 0,
 728                                 next_entry, mode);
 729                 }
 730         }
 731         priv->event_log.num_wraps = num_wraps;
 732         priv->event_log.next_entry = next_entry;
 733 }
 734
 735 /**
 736  * iwl_bg_ucode_trace - Timer callback to log ucode event
 737  *
 738  * The timer is continually set to execute every
 739  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 740  * this function is to perform continuous uCode event logging operation
 741  * if enabled
 742  */
 743 static void iwl_bg_ucode_trace(unsigned long data)
 744 {
 745         struct iwl_priv *priv = (struct iwl_priv *)data;
 746
 747         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 748                 return;
 749
 750         if (priv->event_log.ucode_trace) {
 751                 iwl_continuous_event_trace(priv);
 752                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 753                 mod_timer(&priv->ucode_trace,
 754                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 755         }
 756 }
 757
 758 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 759                                 struct iwl_rx_mem_buffer *rxb)
 760 {
 761 #ifdef CONFIG_IWLWIFI_DEBUG
 762         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 763         struct iwl4965_beacon_notif *beacon =
 764                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 765         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 766
 767         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 768                 "tsf %d %d rate %d\n",
 769                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 770                 beacon->beacon_notify_hdr.failure_frame,
 771                 le32_to_cpu(beacon->ibss_mgr_status),
 772                 le32_to_cpu(beacon->high_tsf),
 773                 le32_to_cpu(beacon->low_tsf), rate);
 774 #endif
 775
 776         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 777             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 778                 queue_work(priv->workqueue, &priv->beacon_update);
 779 }
 780
 781 /* Handle notification from uCode that card's power state is changing
 782  * due to software, hardware, or critical temperature RFKILL */
 783 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 784                                     struct iwl_rx_mem_buffer *rxb)
 785 {
 786         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 787         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 788         unsigned long status = priv->status;
 789
 790         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 791                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 792                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 793                           (flags & CT_CARD_DISABLED) ?
 794                           "Reached" : "Not reached");
 795
 796         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 797                      CT_CARD_DISABLED)) {
 798
 799                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 800                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 801
 802                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 803                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 804
 805                 if (!(flags & RXON_CARD_DISABLED)) {
 806                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 807                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 808                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 809                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 810                 }
 811                 if (flags & CT_CARD_DISABLED)
 812                         iwl_tt_enter_ct_kill(priv);
 813         }
 814         if (!(flags & CT_CARD_DISABLED))
 815                 iwl_tt_exit_ct_kill(priv);
 816
 817         if (flags & HW_CARD_DISABLED)
 818                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 819         else
 820                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 821
 822
 823         if (!(flags & RXON_CARD_DISABLED))
 824                 iwl_scan_cancel(priv);
 825
 826         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 827              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 828                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 829                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 830         else
 831                 wake_up_interruptible(&priv->wait_command_queue);
 832 }
 833
 834 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 835 {
 836         if (src == IWL_PWR_SRC_VAUX) {
 837                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 838                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 839                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 840                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 841         } else {
 842                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 843                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 844                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 845         }
 846
 847         return 0;
 848 }
 849
 850 /**
 851  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 852  *
 853  * Setup the RX handlers for each of the reply types sent from the uCode
 854  * to the host.
 855  *
 856  * This function chains into the hardware specific files for them to setup
 857  * any hardware specific handlers as well.
 858  */
 859 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 860 {
 861         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 862         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 863         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 864         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 865                         iwl_rx_spectrum_measure_notif;
 866         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 867         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 868             iwl_rx_pm_debug_statistics_notif;
 869         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 870
 871         /*
 872          * The same handler is used for both the REPLY to a discrete
 873          * statistics request from the host as well as for the periodic
 874          * statistics notifications (after received beacons) from the uCode.
 875          */
 876         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 877         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 878
 879         iwl_setup_rx_scan_handlers(priv);
 880
 881         /* status change handler */
 882         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 883
 884         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 885             iwl_rx_missed_beacon_notif;
 886         /* Rx handlers */
 887         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 888         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 889         /* block ack */
 890         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 891         /* Set up hardware specific Rx handlers */
 892         priv->cfg->ops->lib->rx_handler_setup(priv);
 893 }
 894
 895 /**
 896  * iwl_rx_handle - Main entry function for receiving responses from uCode
 897  *
 898  * Uses the priv->rx_handlers callback function array to invoke
 899  * the appropriate handlers, including command responses,
 900  * frame-received notifications, and other notifications.
 901  */
 902 void iwl_rx_handle(struct iwl_priv *priv)
 903 {
 904         struct iwl_rx_mem_buffer *rxb;
 905         struct iwl_rx_packet *pkt;
 906         struct iwl_rx_queue *rxq = &priv->rxq;
 907         u32 r, i;
 908         int reclaim;
 909         unsigned long flags;
 910         u8 fill_rx = 0;
 911         u32 count = 8;
 912         int total_empty;
 913
 914         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 915          * buffer that the driver may process (last buffer filled by ucode). */
 916         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 917         i = rxq->read;
 918
 919         /* Rx interrupt, but nothing sent from uCode */
 920         if (i == r)
 921                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 922
 923         /* calculate total frames need to be restock after handling RX */
 924         total_empty = r - rxq->write_actual;
 925         if (total_empty < 0)
 926                 total_empty += RX_QUEUE_SIZE;
 927
 928         if (total_empty > (RX_QUEUE_SIZE / 2))
 929                 fill_rx = 1;
 930
 931         while (i != r) {
 932                 rxb = rxq->queue[i];
 933
 934                 /* If an RXB doesn't have a Rx queue slot associated with it,
 935                  * then a bug has been introduced in the queue refilling
 936                  * routines -- catch it here */
 937                 BUG_ON(rxb == NULL);
 938
 939                 rxq->queue[i] = NULL;
 940
 941                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 942                                PAGE_SIZE << priv->hw_params.rx_page_order,
 943                                PCI_DMA_FROMDEVICE);
 944                 pkt = rxb_addr(rxb);
 945
 946                 trace_iwlwifi_dev_rx(priv, pkt,
 947                         le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 948
 949                 /* Reclaim a command buffer only if this packet is a response
 950                  *   to a (driver-originated) command.
 951                  * If the packet (e.g. Rx frame) originated from uCode,
 952                  *   there is no command buffer to reclaim.
 953                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 954                  *   but apparently a few don't get set; catch them here. */
 955                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 956                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 957                         (pkt->hdr.cmd != REPLY_RX) &&
 958                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 959                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 960                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 961                         (pkt->hdr.cmd != REPLY_TX);
 962
 963                 /* Based on type of command response or notification,
 964                  *   handle those that need handling via function in
 965                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 966                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 967                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 968                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 969                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 970                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 971                 } else {
 972                         /* No handling needed */
 973                         IWL_DEBUG_RX(priv,
 974                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 975                                 r, i, get_cmd_string(pkt->hdr.cmd),
 976                                 pkt->hdr.cmd);
 977                 }
 978
 979                 /*
 980                  * XXX: After here, we should always check rxb->page
 981                  * against NULL before touching it or its virtual
 982                  * memory (pkt). Because some rx_handler might have
 983                  * already taken or freed the pages.
 984                  */
 985
 986                 if (reclaim) {
 987                         /* Invoke any callbacks, transfer the buffer to caller,
 988                          * and fire off the (possibly) blocking iwl_send_cmd()
 989                          * as we reclaim the driver command queue */
 990                         if (rxb->page)
 991                                 iwl_tx_cmd_complete(priv, rxb);
 992                         else
 993                                 IWL_WARN(priv, "Claim null rxb?\n");
 994                 }
 995
 996                 /* Reuse the page if possible. For notification packets and
 997                  * SKBs that fail to Rx correctly, add them back into the
 998                  * rx_free list for reuse later. */
 999                 spin_lock_irqsave(&rxq->lock, flags);
1000                 if (rxb->page != NULL) {
1001                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1002                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1003                                 PCI_DMA_FROMDEVICE);
1004                         list_add_tail(&rxb->list, &rxq->rx_free);
1005                         rxq->free_count++;
1006                 } else
1007                         list_add_tail(&rxb->list, &rxq->rx_used);
1008
1009                 spin_unlock_irqrestore(&rxq->lock, flags);
1010
1011                 i = (i + 1) & RX_QUEUE_MASK;
1012                 /* If there are a lot of unused frames,
1013                  * restock the Rx queue so ucode wont assert. */
1014                 if (fill_rx) {
1015                         count++;
1016                         if (count >= 8) {
1017                                 rxq->read = i;
1018                                 iwlagn_rx_replenish_now(priv);
1019                                 count = 0;
1020                         }
1021                 }
1022         }
1023
1024         /* Backtrack one entry */
1025         rxq->read = i;
1026         if (fill_rx)
1027                 iwlagn_rx_replenish_now(priv);
1028         else
1029                 iwlagn_rx_queue_restock(priv);
1030 }
1031
1032 /* call this function to flush any scheduled tasklet */
1033 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1034 {
1035         /* wait to make sure we flush pending tasklet*/
1036         synchronize_irq(priv->pci_dev->irq);
1037         tasklet_kill(&priv->irq_tasklet);
1038 }
1039
1040 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1041 {
1042         u32 inta, handled = 0;
1043         u32 inta_fh;
1044         unsigned long flags;
1045         u32 i;
1046 #ifdef CONFIG_IWLWIFI_DEBUG
1047         u32 inta_mask;
1048 #endif
1049
1050         spin_lock_irqsave(&priv->lock, flags);
1051
1052         /* Ack/clear/reset pending uCode interrupts.
1053          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1054          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1055         inta = iwl_read32(priv, CSR_INT);
1056         iwl_write32(priv, CSR_INT, inta);
1057
1058         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1059          * Any new interrupts that happen after this, either while we're
1060          * in this tasklet, or later, will show up in next ISR/tasklet. */
1061         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1062         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1063
1064 #ifdef CONFIG_IWLWIFI_DEBUG
1065         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1066                 /* just for debug */
1067                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1068                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1069                               inta, inta_mask, inta_fh);
1070         }
1071 #endif
1072
1073         spin_unlock_irqrestore(&priv->lock, flags);
1074
1075         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1076          * atomic, make sure that inta covers all the interrupts that
1077          * we've discovered, even if FH interrupt came in just after
1078          * reading CSR_INT. */
1079         if (inta_fh & CSR49_FH_INT_RX_MASK)
1080                 inta |= CSR_INT_BIT_FH_RX;
1081         if (inta_fh & CSR49_FH_INT_TX_MASK)
1082                 inta |= CSR_INT_BIT_FH_TX;
1083
1084         /* Now service all interrupt bits discovered above. */
1085         if (inta & CSR_INT_BIT_HW_ERR) {
1086                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1087
1088                 /* Tell the device to stop sending interrupts */
1089                 iwl_disable_interrupts(priv);
1090
1091                 priv->isr_stats.hw++;
1092                 iwl_irq_handle_error(priv);
1093
1094                 handled |= CSR_INT_BIT_HW_ERR;
1095
1096                 return;
1097         }
1098
1099 #ifdef CONFIG_IWLWIFI_DEBUG
1100         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1101                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1102                 if (inta & CSR_INT_BIT_SCD) {
1103                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1104                                       "the frame/frames.\n");
1105                         priv->isr_stats.sch++;
1106                 }
1107
1108                 /* Alive notification via Rx interrupt will do the real work */
1109                 if (inta & CSR_INT_BIT_ALIVE) {
1110                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1111                         priv->isr_stats.alive++;
1112                 }
1113         }
1114 #endif
1115         /* Safely ignore these bits for debug checks below */
1116         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1117
1118         /* HW RF KILL switch toggled */
1119         if (inta & CSR_INT_BIT_RF_KILL) {
1120                 int hw_rf_kill = 0;
1121                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1122                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1123                         hw_rf_kill = 1;
1124
1125                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1126                                 hw_rf_kill ? "disable radio" : "enable radio");
1127
1128                 priv->isr_stats.rfkill++;
1129
1130                 /* driver only loads ucode once setting the interface up.
1131                  * the driver allows loading the ucode even if the radio
1132                  * is killed. Hence update the killswitch state here. The
1133                  * rfkill handler will care about restarting if needed.
1134                  */
1135                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1136                         if (hw_rf_kill)
1137                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1138                         else
1139                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1140                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1141                 }
1142
1143                 handled |= CSR_INT_BIT_RF_KILL;
1144         }
1145
1146         /* Chip got too hot and stopped itself */
1147         if (inta & CSR_INT_BIT_CT_KILL) {
1148                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1149                 priv->isr_stats.ctkill++;
1150                 handled |= CSR_INT_BIT_CT_KILL;
1151         }
1152
1153         /* Error detected by uCode */
1154         if (inta & CSR_INT_BIT_SW_ERR) {
1155                 IWL_ERR(priv, "Microcode SW error detected. "
1156                         " Restarting 0x%X.\n", inta);
1157                 priv->isr_stats.sw++;
1158                 priv->isr_stats.sw_err = inta;
1159                 iwl_irq_handle_error(priv);
1160                 handled |= CSR_INT_BIT_SW_ERR;
1161         }
1162
1163         /*
1164          * uCode wakes up after power-down sleep.
1165          * Tell device about any new tx or host commands enqueued,
1166          * and about any Rx buffers made available while asleep.
1167          */
1168         if (inta & CSR_INT_BIT_WAKEUP) {
1169                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1170                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1171                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1172                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1173                 priv->isr_stats.wakeup++;
1174                 handled |= CSR_INT_BIT_WAKEUP;
1175         }
1176
1177         /* All uCode command responses, including Tx command responses,
1178          * Rx "responses" (frame-received notification), and other
1179          * notifications from uCode come through here*/
1180         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1181                 iwl_rx_handle(priv);
1182                 priv->isr_stats.rx++;
1183                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1184         }
1185
1186         /* This "Tx" DMA channel is used only for loading uCode */
1187         if (inta & CSR_INT_BIT_FH_TX) {
1188                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1189                 priv->isr_stats.tx++;
1190                 handled |= CSR_INT_BIT_FH_TX;
1191                 /* Wake up uCode load routine, now that load is complete */
1192                 priv->ucode_write_complete = 1;
1193                 wake_up_interruptible(&priv->wait_command_queue);
1194         }
1195
1196         if (inta & ~handled) {
1197                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1198                 priv->isr_stats.unhandled++;
1199         }
1200
1201         if (inta & ~(priv->inta_mask)) {
1202                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1203                          inta & ~priv->inta_mask);
1204                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1205         }
1206
1207         /* Re-enable all interrupts */
1208         /* only Re-enable if diabled by irq */
1209         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1210                 iwl_enable_interrupts(priv);
1211
1212 #ifdef CONFIG_IWLWIFI_DEBUG
1213         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1214                 inta = iwl_read32(priv, CSR_INT);
1215                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1216                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1217                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1218                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1219         }
1220 #endif
1221 }
1222
1223 /* tasklet for iwlagn interrupt */
1224 static void iwl_irq_tasklet(struct iwl_priv *priv)
1225 {
1226         u32 inta = 0;
1227         u32 handled = 0;
1228         unsigned long flags;
1229         u32 i;
1230 #ifdef CONFIG_IWLWIFI_DEBUG
1231         u32 inta_mask;
1232 #endif
1233
1234         spin_lock_irqsave(&priv->lock, flags);
1235
1236         /* Ack/clear/reset pending uCode interrupts.
1237          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1238          */
1239         iwl_write32(priv, CSR_INT, priv->_agn.inta);
1240
1241         inta = priv->_agn.inta;
1242
1243 #ifdef CONFIG_IWLWIFI_DEBUG
1244         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1245                 /* just for debug */
1246                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1247                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1248                                 inta, inta_mask);
1249         }
1250 #endif
1251
1252         spin_unlock_irqrestore(&priv->lock, flags);
1253
1254         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1255         priv->_agn.inta = 0;
1256
1257         /* Now service all interrupt bits discovered above. */
1258         if (inta & CSR_INT_BIT_HW_ERR) {
1259                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1260
1261                 /* Tell the device to stop sending interrupts */
1262                 iwl_disable_interrupts(priv);
1263
1264                 priv->isr_stats.hw++;
1265                 iwl_irq_handle_error(priv);
1266
1267                 handled |= CSR_INT_BIT_HW_ERR;
1268
1269                 return;
1270         }
1271
1272 #ifdef CONFIG_IWLWIFI_DEBUG
1273         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1274                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1275                 if (inta & CSR_INT_BIT_SCD) {
1276                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1277                                       "the frame/frames.\n");
1278                         priv->isr_stats.sch++;
1279                 }
1280
1281                 /* Alive notification via Rx interrupt will do the real work */
1282                 if (inta & CSR_INT_BIT_ALIVE) {
1283                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1284                         priv->isr_stats.alive++;
1285                 }
1286         }
1287 #endif
1288         /* Safely ignore these bits for debug checks below */
1289         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1290
1291         /* HW RF KILL switch toggled */
1292         if (inta & CSR_INT_BIT_RF_KILL) {
1293                 int hw_rf_kill = 0;
1294                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1295                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1296                         hw_rf_kill = 1;
1297
1298                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1299                                 hw_rf_kill ? "disable radio" : "enable radio");
1300
1301                 priv->isr_stats.rfkill++;
1302
1303                 /* driver only loads ucode once setting the interface up.
1304                  * the driver allows loading the ucode even if the radio
1305                  * is killed. Hence update the killswitch state here. The
1306                  * rfkill handler will care about restarting if needed.
1307                  */
1308                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1309                         if (hw_rf_kill)
1310                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1311                         else
1312                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1313                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1314                 }
1315
1316                 handled |= CSR_INT_BIT_RF_KILL;
1317         }
1318
1319         /* Chip got too hot and stopped itself */
1320         if (inta & CSR_INT_BIT_CT_KILL) {
1321                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1322                 priv->isr_stats.ctkill++;
1323                 handled |= CSR_INT_BIT_CT_KILL;
1324         }
1325
1326         /* Error detected by uCode */
1327         if (inta & CSR_INT_BIT_SW_ERR) {
1328                 IWL_ERR(priv, "Microcode SW error detected. "
1329                         " Restarting 0x%X.\n", inta);
1330                 priv->isr_stats.sw++;
1331                 priv->isr_stats.sw_err = inta;
1332                 iwl_irq_handle_error(priv);
1333                 handled |= CSR_INT_BIT_SW_ERR;
1334         }
1335
1336         /* uCode wakes up after power-down sleep */
1337         if (inta & CSR_INT_BIT_WAKEUP) {
1338                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1339                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1340                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1341                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1342
1343                 priv->isr_stats.wakeup++;
1344
1345                 handled |= CSR_INT_BIT_WAKEUP;
1346         }
1347
1348         /* All uCode command responses, including Tx command responses,
1349          * Rx "responses" (frame-received notification), and other
1350          * notifications from uCode come through here*/
1351         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1352                         CSR_INT_BIT_RX_PERIODIC)) {
1353                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1354                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1355                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1356                         iwl_write32(priv, CSR_FH_INT_STATUS,
1357                                         CSR49_FH_INT_RX_MASK);
1358                 }
1359                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1360                         handled |= CSR_INT_BIT_RX_PERIODIC;
1361                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1362                 }
1363                 /* Sending RX interrupt require many steps to be done in the
1364                  * the device:
1365                  * 1- write interrupt to current index in ICT table.
1366                  * 2- dma RX frame.
1367                  * 3- update RX shared data to indicate last write index.
1368                  * 4- send interrupt.
1369                  * This could lead to RX race, driver could receive RX interrupt
1370                  * but the shared data changes does not reflect this;
1371                  * periodic interrupt will detect any dangling Rx activity.
1372                  */
1373
1374                 /* Disable periodic interrupt; we use it as just a one-shot. */
1375                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1376                             CSR_INT_PERIODIC_DIS);
1377                 iwl_rx_handle(priv);
1378
1379                 /*
1380                  * Enable periodic interrupt in 8 msec only if we received
1381                  * real RX interrupt (instead of just periodic int), to catch
1382                  * any dangling Rx interrupt.  If it was just the periodic
1383                  * interrupt, there was no dangling Rx activity, and no need
1384                  * to extend the periodic interrupt; one-shot is enough.
1385                  */
1386                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1387                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1388                                     CSR_INT_PERIODIC_ENA);
1389
1390                 priv->isr_stats.rx++;
1391         }
1392
1393         /* This "Tx" DMA channel is used only for loading uCode */
1394         if (inta & CSR_INT_BIT_FH_TX) {
1395                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1396                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1397                 priv->isr_stats.tx++;
1398                 handled |= CSR_INT_BIT_FH_TX;
1399                 /* Wake up uCode load routine, now that load is complete */
1400                 priv->ucode_write_complete = 1;
1401                 wake_up_interruptible(&priv->wait_command_queue);
1402         }
1403
1404         if (inta & ~handled) {
1405                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1406                 priv->isr_stats.unhandled++;
1407         }
1408
1409         if (inta & ~(priv->inta_mask)) {
1410                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1411                          inta & ~priv->inta_mask);
1412         }
1413
1414         /* Re-enable all interrupts */
1415         /* only Re-enable if diabled by irq */
1416         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1417                 iwl_enable_interrupts(priv);
1418 }
1419
1420 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1421 #define ACK_CNT_RATIO (50)
1422 #define BA_TIMEOUT_CNT (5)
1423 #define BA_TIMEOUT_MAX (16)
1424
1425 /**
1426  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1427  *
1428  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1429  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1430  * operation state.
1431  */
1432 bool iwl_good_ack_health(struct iwl_priv *priv,
1433                                 struct iwl_rx_packet *pkt)
1434 {
1435         bool rc = true;
1436         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1437         int ba_timeout_delta;
1438
1439         actual_ack_cnt_delta =
1440                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1441                 le32_to_cpu(priv->statistics.tx.actual_ack_cnt);
1442         expected_ack_cnt_delta =
1443                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1444                 le32_to_cpu(priv->statistics.tx.expected_ack_cnt);
1445         ba_timeout_delta =
1446                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1447                 le32_to_cpu(priv->statistics.tx.agg.ba_timeout);
1448         if ((priv->_agn.agg_tids_count > 0) &&
1449             (expected_ack_cnt_delta > 0) &&
1450             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1451                 < ACK_CNT_RATIO) &&
1452             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1453                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1454                                 " expected_ack_cnt = %d\n",
1455                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1456
1457 #ifdef CONFIG_IWLWIFI_DEBUG
1458                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1459                                 priv->delta_statistics.tx.rx_detected_cnt);
1460                 IWL_DEBUG_RADIO(priv,
1461                                 "ack_or_ba_timeout_collision delta = %d\n",
1462                                 priv->delta_statistics.tx.
1463                                 ack_or_ba_timeout_collision);
1464 #endif
1465                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1466                                 ba_timeout_delta);
1467                 if (!actual_ack_cnt_delta &&
1468                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1469                         rc = false;
1470         }
1471         return rc;
1472 }
1473
1474
1475 /******************************************************************************
1476  *
1477  * uCode download functions
1478  *
1479  ******************************************************************************/
1480
1481 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1482 {
1483         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1484         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1485         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1486         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1487         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1488         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1489 }
1490
1491 static void iwl_nic_start(struct iwl_priv *priv)
1492 {
1493         /* Remove all resets to allow NIC to operate */
1494         iwl_write32(priv, CSR_RESET, 0);
1495 }
1496
1497
1498 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1499 static int iwl_mac_setup_register(struct iwl_priv *priv);
1500
1501 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1502 {
1503         const char *name_pre = priv->cfg->fw_name_pre;
1504
1505         if (first)
1506                 priv->fw_index = priv->cfg->ucode_api_max;
1507         else
1508                 priv->fw_index--;
1509
1510         if (priv->fw_index < priv->cfg->ucode_api_min) {
1511                 IWL_ERR(priv, "no suitable firmware found!\n");
1512                 return -ENOENT;
1513         }
1514
1515         sprintf(priv->firmware_name, "%s%d%s",
1516                 name_pre, priv->fw_index, ".ucode");
1517
1518         IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1519                        priv->firmware_name);
1520
1521         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1522                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1523                                        iwl_ucode_callback);
1524 }
1525
1526 /**
1527  * iwl_ucode_callback - callback when firmware was loaded
1528  *
1529  * If loaded successfully, copies the firmware into buffers
1530  * for the card to fetch (via DMA).
1531  */
1532 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1533 {
1534         struct iwl_priv *priv = context;
1535         struct iwl_ucode_header *ucode;
1536         const unsigned int api_max = priv->cfg->ucode_api_max;
1537         const unsigned int api_min = priv->cfg->ucode_api_min;
1538         u8 *src;
1539         size_t len;
1540         u32 api_ver, build;
1541         u32 inst_size, data_size, init_size, init_data_size, boot_size;
1542         int err;
1543         u16 eeprom_ver;
1544
1545         if (!ucode_raw) {
1546                 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1547                         priv->firmware_name);
1548                 goto try_again;
1549         }
1550
1551         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1552                        priv->firmware_name, ucode_raw->size);
1553
1554         /* Make sure that we got at least the v1 header! */
1555         if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1556                 IWL_ERR(priv, "File size way too small!\n");
1557                 goto try_again;
1558         }
1559
1560         /* Data from ucode file:  header followed by uCode images */
1561         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1562
1563         priv->ucode_ver = le32_to_cpu(ucode->ver);
1564         api_ver = IWL_UCODE_API(priv->ucode_ver);
1565         build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1566         inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1567         data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1568         init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1569         init_data_size =
1570                 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1571         boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1572         src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1573
1574         /* api_ver should match the api version forming part of the
1575          * firmware filename ... but we don't check for that and only rely
1576          * on the API version read from firmware header from here on forward */
1577
1578         if (api_ver < api_min || api_ver > api_max) {
1579                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1580                           "Driver supports v%u, firmware is v%u.\n",
1581                           api_max, api_ver);
1582                 goto try_again;
1583         }
1584
1585         if (api_ver != api_max)
1586                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1587                           "got v%u. New firmware can be obtained "
1588                           "from http://www.intellinuxwireless.org.\n",
1589                           api_max, api_ver);
1590
1591         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1592                IWL_UCODE_MAJOR(priv->ucode_ver),
1593                IWL_UCODE_MINOR(priv->ucode_ver),
1594                IWL_UCODE_API(priv->ucode_ver),
1595                IWL_UCODE_SERIAL(priv->ucode_ver));
1596
1597         snprintf(priv->hw->wiphy->fw_version,
1598                  sizeof(priv->hw->wiphy->fw_version),
1599                  "%u.%u.%u.%u",
1600                  IWL_UCODE_MAJOR(priv->ucode_ver),
1601                  IWL_UCODE_MINOR(priv->ucode_ver),
1602                  IWL_UCODE_API(priv->ucode_ver),
1603                  IWL_UCODE_SERIAL(priv->ucode_ver));
1604
1605         if (build)
1606                 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1607
1608         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1609         IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1610                        (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1611                        ? "OTP" : "EEPROM", eeprom_ver);
1612
1613         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1614                        priv->ucode_ver);
1615         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1616                        inst_size);
1617         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1618                        data_size);
1619         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1620                        init_size);
1621         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1622                        init_data_size);
1623         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1624                        boot_size);
1625
1626         /*
1627          * For any of the failures below (before allocating pci memory)
1628          * we will try to load a version with a smaller API -- maybe the
1629          * user just got a corrupted version of the latest API.
1630          */
1631
1632         /* Verify size of file vs. image size info in file's header */
1633         if (ucode_raw->size !=
1634                 priv->cfg->ops->ucode->get_header_size(api_ver) +
1635                 inst_size + data_size + init_size +
1636                 init_data_size + boot_size) {
1637
1638                 IWL_DEBUG_INFO(priv,
1639                         "uCode file size %d does not match expected size\n",
1640                         (int)ucode_raw->size);
1641                 goto try_again;
1642         }
1643
1644         /* Verify that uCode images will fit in card's SRAM */
1645         if (inst_size > priv->hw_params.max_inst_size) {
1646                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1647                                inst_size);
1648                 goto try_again;
1649         }
1650
1651         if (data_size > priv->hw_params.max_data_size) {
1652                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1653                                 data_size);
1654                 goto try_again;
1655         }
1656         if (init_size > priv->hw_params.max_inst_size) {
1657                 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1658                         init_size);
1659                 goto try_again;
1660         }
1661         if (init_data_size > priv->hw_params.max_data_size) {
1662                 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1663                       init_data_size);
1664                 goto try_again;
1665         }
1666         if (boot_size > priv->hw_params.max_bsm_size) {
1667                 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1668                         boot_size);
1669                 goto try_again;
1670         }
1671
1672         /* Allocate ucode buffers for card's bus-master loading ... */
1673
1674         /* Runtime instructions and 2 copies of data:
1675          * 1) unmodified from disk
1676          * 2) backup cache for save/restore during power-downs */
1677         priv->ucode_code.len = inst_size;
1678         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1679
1680         priv->ucode_data.len = data_size;
1681         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1682
1683         priv->ucode_data_backup.len = data_size;
1684         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1685
1686         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1687             !priv->ucode_data_backup.v_addr)
1688                 goto err_pci_alloc;
1689
1690         /* Initialization instructions and data */
1691         if (init_size && init_data_size) {
1692                 priv->ucode_init.len = init_size;
1693                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1694
1695                 priv->ucode_init_data.len = init_data_size;
1696                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1697
1698                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1699                         goto err_pci_alloc;
1700         }
1701
1702         /* Bootstrap (instructions only, no data) */
1703         if (boot_size) {
1704                 priv->ucode_boot.len = boot_size;
1705                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1706
1707                 if (!priv->ucode_boot.v_addr)
1708                         goto err_pci_alloc;
1709         }
1710
1711         /* Copy images into buffers for card's bus-master reads ... */
1712
1713         /* Runtime instructions (first block of data in file) */
1714         len = inst_size;
1715         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1716         memcpy(priv->ucode_code.v_addr, src, len);
1717         src += len;
1718
1719         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1720                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1721
1722         /* Runtime data (2nd block)
1723          * NOTE:  Copy into backup buffer will be done in iwl_up()  */
1724         len = data_size;
1725         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1726         memcpy(priv->ucode_data.v_addr, src, len);
1727         memcpy(priv->ucode_data_backup.v_addr, src, len);
1728         src += len;
1729
1730         /* Initialization instructions (3rd block) */
1731         if (init_size) {
1732                 len = init_size;
1733                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1734                                 len);
1735                 memcpy(priv->ucode_init.v_addr, src, len);
1736                 src += len;
1737         }
1738
1739         /* Initialization data (4th block) */
1740         if (init_data_size) {
1741                 len = init_data_size;
1742                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1743                                len);
1744                 memcpy(priv->ucode_init_data.v_addr, src, len);
1745                 src += len;
1746         }
1747
1748         /* Bootstrap instructions (5th block) */
1749         len = boot_size;
1750         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1751         memcpy(priv->ucode_boot.v_addr, src, len);
1752
1753         /**************************************************
1754          * This is still part of probe() in a sense...
1755          *
1756          * 9. Setup and register with mac80211 and debugfs
1757          **************************************************/
1758         err = iwl_mac_setup_register(priv);
1759         if (err)
1760                 goto out_unbind;
1761
1762         err = iwl_dbgfs_register(priv, DRV_NAME);
1763         if (err)
1764                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1765
1766         /* We have our copies now, allow OS release its copies */
1767         release_firmware(ucode_raw);
1768         return;
1769
1770  try_again:
1771         /* try next, if any */
1772         if (iwl_request_firmware(priv, false))
1773                 goto out_unbind;
1774         release_firmware(ucode_raw);
1775         return;
1776
1777  err_pci_alloc:
1778         IWL_ERR(priv, "failed to allocate pci memory\n");
1779         iwl_dealloc_ucode_pci(priv);
1780  out_unbind:
1781         device_release_driver(&priv->pci_dev->dev);
1782         release_firmware(ucode_raw);
1783 }
1784
1785 static const char *desc_lookup_text[] = {
1786         "OK",
1787         "FAIL",
1788         "BAD_PARAM",
1789         "BAD_CHECKSUM",
1790         "NMI_INTERRUPT_WDG",
1791         "SYSASSERT",
1792         "FATAL_ERROR",
1793         "BAD_COMMAND",
1794         "HW_ERROR_TUNE_LOCK",
1795         "HW_ERROR_TEMPERATURE",
1796         "ILLEGAL_CHAN_FREQ",
1797         "VCC_NOT_STABLE",
1798         "FH_ERROR",
1799         "NMI_INTERRUPT_HOST",
1800         "NMI_INTERRUPT_ACTION_PT",
1801         "NMI_INTERRUPT_UNKNOWN",
1802         "UCODE_VERSION_MISMATCH",
1803         "HW_ERROR_ABS_LOCK",
1804         "HW_ERROR_CAL_LOCK_FAIL",
1805         "NMI_INTERRUPT_INST_ACTION_PT",
1806         "NMI_INTERRUPT_DATA_ACTION_PT",
1807         "NMI_TRM_HW_ER",
1808         "NMI_INTERRUPT_TRM",
1809         "NMI_INTERRUPT_BREAK_POINT"
1810         "DEBUG_0",
1811         "DEBUG_1",
1812         "DEBUG_2",
1813         "DEBUG_3",
1814         "ADVANCED SYSASSERT"
1815 };
1816
1817 static const char *desc_lookup(int i)
1818 {
1819         int max = ARRAY_SIZE(desc_lookup_text) - 1;
1820
1821         if (i < 0 || i > max)
1822                 i = max;
1823
1824         return desc_lookup_text[i];
1825 }
1826
1827 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1828 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1829
1830 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1831 {
1832         u32 data2, line;
1833         u32 desc, time, count, base, data1;
1834         u32 blink1, blink2, ilink1, ilink2;
1835
1836         if (priv->ucode_type == UCODE_INIT)
1837                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1838         else
1839                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1840
1841         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1842                 IWL_ERR(priv,
1843                         "Not valid error log pointer 0x%08X for %s uCode\n",
1844                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1845                 return;
1846         }
1847
1848         count = iwl_read_targ_mem(priv, base);
1849
1850         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1851                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1852                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1853                         priv->status, count);
1854         }
1855
1856         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1857         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1858         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1859         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1860         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1861         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1862         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1863         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1864         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1865
1866         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1867                                       blink1, blink2, ilink1, ilink2);
1868
1869         IWL_ERR(priv, "Desc                               Time       "
1870                 "data1      data2      line\n");
1871         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1872                 desc_lookup(desc), desc, time, data1, data2, line);
1873         IWL_ERR(priv, "blink1  blink2  ilink1  ilink2\n");
1874         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1875                 ilink1, ilink2);
1876
1877 }
1878
1879 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1880
1881 /**
1882  * iwl_print_event_log - Dump error event log to syslog
1883  *
1884  */
1885 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1886                                u32 num_events, u32 mode,
1887                                int pos, char **buf, size_t bufsz)
1888 {
1889         u32 i;
1890         u32 base;       /* SRAM byte address of event log header */
1891         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1892         u32 ptr;        /* SRAM byte address of log data */
1893         u32 ev, time, data; /* event log data */
1894         unsigned long reg_flags;
1895
1896         if (num_events == 0)
1897                 return pos;
1898         if (priv->ucode_type == UCODE_INIT)
1899                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1900         else
1901                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1902
1903         if (mode == 0)
1904                 event_size = 2 * sizeof(u32);
1905         else
1906                 event_size = 3 * sizeof(u32);
1907
1908         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1909
1910         /* Make sure device is powered up for SRAM reads */
1911         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1912         iwl_grab_nic_access(priv);
1913
1914         /* Set starting address; reads will auto-increment */
1915         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1916         rmb();
1917
1918         /* "time" is actually "data" for mode 0 (no timestamp).
1919         * place event id # at far right for easier visual parsing. */
1920         for (i = 0; i < num_events; i++) {
1921                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1922                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1923                 if (mode == 0) {
1924                         /* data, ev */
1925                         if (bufsz) {
1926                                 pos += scnprintf(*buf + pos, bufsz - pos,
1927                                                 "EVT_LOG:0x%08x:%04u\n",
1928                                                 time, ev);
1929                         } else {
1930                                 trace_iwlwifi_dev_ucode_event(priv, 0,
1931                                         time, ev);
1932                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1933                                         time, ev);
1934                         }
1935                 } else {
1936                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1937                         if (bufsz) {
1938                                 pos += scnprintf(*buf + pos, bufsz - pos,
1939                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
1940                                                  time, data, ev);
1941                         } else {
1942                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1943                                         time, data, ev);
1944                                 trace_iwlwifi_dev_ucode_event(priv, time,
1945                                         data, ev);
1946                         }
1947                 }
1948         }
1949
1950         /* Allow device to power down */
1951         iwl_release_nic_access(priv);
1952         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1953         return pos;
1954 }
1955
1956 /**
1957  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1958  */
1959 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1960                                     u32 num_wraps, u32 next_entry,
1961                                     u32 size, u32 mode,
1962                                     int pos, char **buf, size_t bufsz)
1963 {
1964         /*
1965          * display the newest DEFAULT_LOG_ENTRIES entries
1966          * i.e the entries just before the next ont that uCode would fill.
1967          */
1968         if (num_wraps) {
1969                 if (next_entry < size) {
1970                         pos = iwl_print_event_log(priv,
1971                                                 capacity - (size - next_entry),
1972                                                 size - next_entry, mode,
1973                                                 pos, buf, bufsz);
1974                         pos = iwl_print_event_log(priv, 0,
1975                                                   next_entry, mode,
1976                                                   pos, buf, bufsz);
1977                 } else
1978                         pos = iwl_print_event_log(priv, next_entry - size,
1979                                                   size, mode, pos, buf, bufsz);
1980         } else {
1981                 if (next_entry < size) {
1982                         pos = iwl_print_event_log(priv, 0, next_entry,
1983                                                   mode, pos, buf, bufsz);
1984                 } else {
1985                         pos = iwl_print_event_log(priv, next_entry - size,
1986                                                   size, mode, pos, buf, bufsz);
1987                 }
1988         }
1989         return pos;
1990 }
1991
1992 /* For sanity check only.  Actual size is determined by uCode, typ. 512 */
1993 #define MAX_EVENT_LOG_SIZE (512)
1994
1995 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1996
1997 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1998                             char **buf, bool display)
1999 {
2000         u32 base;       /* SRAM byte address of event log header */
2001         u32 capacity;   /* event log capacity in # entries */
2002         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2003         u32 num_wraps;  /* # times uCode wrapped to top of log */
2004         u32 next_entry; /* index of next entry to be written by uCode */
2005         u32 size;       /* # entries that we'll print */
2006         int pos = 0;
2007         size_t bufsz = 0;
2008
2009         if (priv->ucode_type == UCODE_INIT)
2010                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2011         else
2012                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2013
2014         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2015                 IWL_ERR(priv,
2016                         "Invalid event log pointer 0x%08X for %s uCode\n",
2017                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2018                 return -EINVAL;
2019         }
2020
2021         /* event log header */
2022         capacity = iwl_read_targ_mem(priv, base);
2023         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2024         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2025         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2026
2027         if (capacity > MAX_EVENT_LOG_SIZE) {
2028                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2029                         capacity, MAX_EVENT_LOG_SIZE);
2030                 capacity = MAX_EVENT_LOG_SIZE;
2031         }
2032
2033         if (next_entry > MAX_EVENT_LOG_SIZE) {
2034                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2035                         next_entry, MAX_EVENT_LOG_SIZE);
2036                 next_entry = MAX_EVENT_LOG_SIZE;
2037         }
2038
2039         size = num_wraps ? capacity : next_entry;
2040
2041         /* bail out if nothing in log */
2042         if (size == 0) {
2043                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2044                 return pos;
2045         }
2046
2047 #ifdef CONFIG_IWLWIFI_DEBUG
2048         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2049                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2050                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2051 #else
2052         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2053                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2054 #endif
2055         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2056                 size);
2057
2058 #ifdef CONFIG_IWLWIFI_DEBUG
2059         if (display) {
2060                 if (full_log)
2061                         bufsz = capacity * 48;
2062                 else
2063                         bufsz = size * 48;
2064                 *buf = kmalloc(bufsz, GFP_KERNEL);
2065                 if (!*buf)
2066                         return -ENOMEM;
2067         }
2068         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2069                 /*
2070                  * if uCode has wrapped back to top of log,
2071                  * start at the oldest entry,
2072                  * i.e the next one that uCode would fill.
2073                  */
2074                 if (num_wraps)
2075                         pos = iwl_print_event_log(priv, next_entry,
2076                                                 capacity - next_entry, mode,
2077                                                 pos, buf, bufsz);
2078                 /* (then/else) start at top of log */
2079                 pos = iwl_print_event_log(priv, 0,
2080                                           next_entry, mode, pos, buf, bufsz);
2081         } else
2082                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2083                                                 next_entry, size, mode,
2084                                                 pos, buf, bufsz);
2085 #else
2086         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2087                                         next_entry, size, mode,
2088                                         pos, buf, bufsz);
2089 #endif
2090         return pos;
2091 }
2092
2093 /**
2094  * iwl_alive_start - called after REPLY_ALIVE notification received
2095  *                   from protocol/runtime uCode (initialization uCode's
2096  *                   Alive gets handled by iwl_init_alive_start()).
2097  */
2098 static void iwl_alive_start(struct iwl_priv *priv)
2099 {
2100         int ret = 0;
2101
2102         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2103
2104         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2105                 /* We had an error bringing up the hardware, so take it
2106                  * all the way back down so we can try again */
2107                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2108                 goto restart;
2109         }
2110
2111         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2112          * This is a paranoid check, because we would not have gotten the
2113          * "runtime" alive if code weren't properly loaded.  */
2114         if (iwl_verify_ucode(priv)) {
2115                 /* Runtime instruction load was bad;
2116                  * take it all the way back down so we can try again */
2117                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2118                 goto restart;
2119         }
2120
2121         ret = priv->cfg->ops->lib->alive_notify(priv);
2122         if (ret) {
2123                 IWL_WARN(priv,
2124                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2125                 goto restart;
2126         }
2127
2128         /* After the ALIVE response, we can send host commands to the uCode */
2129         set_bit(STATUS_ALIVE, &priv->status);
2130
2131         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2132                 /* Enable timer to monitor the driver queues */
2133                 mod_timer(&priv->monitor_recover,
2134                         jiffies +
2135                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2136         }
2137
2138         if (iwl_is_rfkill(priv))
2139                 return;
2140
2141         ieee80211_wake_queues(priv->hw);
2142
2143         priv->active_rate = IWL_RATES_MASK;
2144
2145         /* Configure Tx antenna selection based on H/W config */
2146         if (priv->cfg->ops->hcmd->set_tx_ant)
2147                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2148
2149         if (iwl_is_associated(priv)) {
2150                 struct iwl_rxon_cmd *active_rxon =
2151                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2152                 /* apply any changes in staging */
2153                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2154                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2155         } else {
2156                 /* Initialize our rx_config data */
2157                 iwl_connection_init_rx_config(priv, priv->iw_mode);
2158
2159                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2160                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2161
2162                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2163         }
2164
2165         /* Configure Bluetooth device coexistence support */
2166         iwl_send_bt_config(priv);
2167
2168         iwl_reset_run_time_calib(priv);
2169
2170         /* Configure the adapter for unassociated operation */
2171         iwlcore_commit_rxon(priv);
2172
2173         /* At this point, the NIC is initialized and operational */
2174         iwl_rf_kill_ct_config(priv);
2175
2176         iwl_leds_init(priv);
2177
2178         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2179         set_bit(STATUS_READY, &priv->status);
2180         wake_up_interruptible(&priv->wait_command_queue);
2181
2182         iwl_power_update_mode(priv, true);
2183         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2184
2185
2186         return;
2187
2188  restart:
2189         queue_work(priv->workqueue, &priv->restart);
2190 }
2191
2192 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2193
2194 static void __iwl_down(struct iwl_priv *priv)
2195 {
2196         unsigned long flags;
2197         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2198
2199         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2200
2201         if (!exit_pending)
2202                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2203
2204         iwl_clear_ucode_stations(priv, true);
2205
2206         /* Unblock any waiting calls */
2207         wake_up_interruptible_all(&priv->wait_command_queue);
2208
2209         /* Wipe out the EXIT_PENDING status bit if we are not actually
2210          * exiting the module */
2211         if (!exit_pending)
2212                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2213
2214         /* stop and reset the on-board processor */
2215         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2216
2217         /* tell the device to stop sending interrupts */
2218         spin_lock_irqsave(&priv->lock, flags);
2219         iwl_disable_interrupts(priv);
2220         spin_unlock_irqrestore(&priv->lock, flags);
2221         iwl_synchronize_irq(priv);
2222
2223         if (priv->mac80211_registered)
2224                 ieee80211_stop_queues(priv->hw);
2225
2226         /* If we have not previously called iwl_init() then
2227          * clear all bits but the RF Kill bit and return */
2228         if (!iwl_is_init(priv)) {
2229                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2230                                         STATUS_RF_KILL_HW |
2231                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2232                                         STATUS_GEO_CONFIGURED |
2233                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2234                                         STATUS_EXIT_PENDING;
2235                 goto exit;
2236         }
2237
2238         /* ...otherwise clear out all the status bits but the RF Kill
2239          * bit and continue taking the NIC down. */
2240         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2241                                 STATUS_RF_KILL_HW |
2242                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2243                                 STATUS_GEO_CONFIGURED |
2244                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2245                                 STATUS_FW_ERROR |
2246                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2247                                 STATUS_EXIT_PENDING;
2248
2249         /* device going down, Stop using ICT table */
2250         iwl_disable_ict(priv);
2251
2252         iwlagn_txq_ctx_stop(priv);
2253         iwlagn_rxq_stop(priv);
2254
2255         /* Power-down device's busmaster DMA clocks */
2256         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2257         udelay(5);
2258
2259         /* Make sure (redundant) we've released our request to stay awake */
2260         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2261
2262         /* Stop the device, and put it in low power state */
2263         priv->cfg->ops->lib->apm_ops.stop(priv);
2264
2265  exit:
2266         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2267
2268         if (priv->ibss_beacon)
2269                 dev_kfree_skb(priv->ibss_beacon);
2270         priv->ibss_beacon = NULL;
2271
2272         /* clear out any free frames */
2273         iwl_clear_free_frames(priv);
2274 }
2275
2276 static void iwl_down(struct iwl_priv *priv)
2277 {
2278         mutex_lock(&priv->mutex);
2279         __iwl_down(priv);
2280         mutex_unlock(&priv->mutex);
2281
2282         iwl_cancel_deferred_work(priv);
2283 }
2284
2285 #define HW_READY_TIMEOUT (50)
2286
2287 static int iwl_set_hw_ready(struct iwl_priv *priv)
2288 {
2289         int ret = 0;
2290
2291         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2292                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2293
2294         /* See if we got it */
2295         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2296                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2297                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2298                                 HW_READY_TIMEOUT);
2299         if (ret != -ETIMEDOUT)
2300                 priv->hw_ready = true;
2301         else
2302                 priv->hw_ready = false;
2303
2304         IWL_DEBUG_INFO(priv, "hardware %s\n",
2305                       (priv->hw_ready == 1) ? "ready" : "not ready");
2306         return ret;
2307 }
2308
2309 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2310 {
2311         int ret = 0;
2312
2313         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
2314
2315         ret = iwl_set_hw_ready(priv);
2316         if (priv->hw_ready)
2317                 return ret;
2318
2319         /* If HW is not ready, prepare the conditions to check again */
2320         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2321                         CSR_HW_IF_CONFIG_REG_PREPARE);
2322
2323         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2324                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2325                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2326
2327         /* HW should be ready by now, check again. */
2328         if (ret != -ETIMEDOUT)
2329                 iwl_set_hw_ready(priv);
2330
2331         return ret;
2332 }
2333
2334 #define MAX_HW_RESTARTS 5
2335
2336 static int __iwl_up(struct iwl_priv *priv)
2337 {
2338         int i;
2339         int ret;
2340
2341         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2342                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2343                 return -EIO;
2344         }
2345
2346         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2347                 IWL_ERR(priv, "ucode not available for device bringup\n");
2348                 return -EIO;
2349         }
2350
2351         iwl_prepare_card_hw(priv);
2352
2353         if (!priv->hw_ready) {
2354                 IWL_WARN(priv, "Exit HW not ready\n");
2355                 return -EIO;
2356         }
2357
2358         /* If platform's RF_KILL switch is NOT set to KILL */
2359         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2360                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2361         else
2362                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2363
2364         if (iwl_is_rfkill(priv)) {
2365                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2366
2367                 iwl_enable_interrupts(priv);
2368                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2369                 return 0;
2370         }
2371
2372         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2373
2374         ret = iwlagn_hw_nic_init(priv);
2375         if (ret) {
2376                 IWL_ERR(priv, "Unable to init nic\n");
2377                 return ret;
2378         }
2379
2380         /* make sure rfkill handshake bits are cleared */
2381         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2382         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2383                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2384
2385         /* clear (again), then enable host interrupts */
2386         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2387         iwl_enable_interrupts(priv);
2388
2389         /* really make sure rfkill handshake bits are cleared */
2390         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2391         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2392
2393         /* Copy original ucode data image from disk into backup cache.
2394          * This will be used to initialize the on-board processor's
2395          * data SRAM for a clean start when the runtime program first loads. */
2396         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2397                priv->ucode_data.len);
2398
2399         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2400
2401                 /* load bootstrap state machine,
2402                  * load bootstrap program into processor's memory,
2403                  * prepare to load the "initialize" uCode */
2404                 ret = priv->cfg->ops->lib->load_ucode(priv);
2405
2406                 if (ret) {
2407                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2408                                 ret);
2409                         continue;
2410                 }
2411
2412                 /* start card; "initialize" will load runtime ucode */
2413                 iwl_nic_start(priv);
2414
2415                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2416
2417                 return 0;
2418         }
2419
2420         set_bit(STATUS_EXIT_PENDING, &priv->status);
2421         __iwl_down(priv);
2422         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2423
2424         /* tried to restart and config the device for as long as our
2425          * patience could withstand */
2426         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2427         return -EIO;
2428 }
2429
2430
2431 /*****************************************************************************
2432  *
2433  * Workqueue callbacks
2434  *
2435  *****************************************************************************/
2436
2437 static void iwl_bg_init_alive_start(struct work_struct *data)
2438 {
2439         struct iwl_priv *priv =
2440             container_of(data, struct iwl_priv, init_alive_start.work);
2441
2442         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2443                 return;
2444
2445         mutex_lock(&priv->mutex);
2446         priv->cfg->ops->lib->init_alive_start(priv);
2447         mutex_unlock(&priv->mutex);
2448 }
2449
2450 static void iwl_bg_alive_start(struct work_struct *data)
2451 {
2452         struct iwl_priv *priv =
2453             container_of(data, struct iwl_priv, alive_start.work);
2454
2455         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2456                 return;
2457
2458         /* enable dram interrupt */
2459         iwl_reset_ict(priv);
2460
2461         mutex_lock(&priv->mutex);
2462         iwl_alive_start(priv);
2463         mutex_unlock(&priv->mutex);
2464 }
2465
2466 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2467 {
2468         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2469                         run_time_calib_work);
2470
2471         mutex_lock(&priv->mutex);
2472
2473         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2474             test_bit(STATUS_SCANNING, &priv->status)) {
2475                 mutex_unlock(&priv->mutex);
2476                 return;
2477         }
2478
2479         if (priv->start_calib) {
2480                 iwl_chain_noise_calibration(priv, &priv->statistics);
2481
2482                 iwl_sensitivity_calibration(priv, &priv->statistics);
2483         }
2484
2485         mutex_unlock(&priv->mutex);
2486         return;
2487 }
2488
2489 static void iwl_bg_restart(struct work_struct *data)
2490 {
2491         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2492
2493         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2494                 return;
2495
2496         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2497                 mutex_lock(&priv->mutex);
2498                 priv->vif = NULL;
2499                 priv->is_open = 0;
2500                 mutex_unlock(&priv->mutex);
2501                 iwl_down(priv);
2502                 ieee80211_restart_hw(priv->hw);
2503         } else {
2504                 iwl_down(priv);
2505
2506                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2507                         return;
2508
2509                 mutex_lock(&priv->mutex);
2510                 __iwl_up(priv);
2511                 mutex_unlock(&priv->mutex);
2512         }
2513 }
2514
2515 static void iwl_bg_rx_replenish(struct work_struct *data)
2516 {
2517         struct iwl_priv *priv =
2518             container_of(data, struct iwl_priv, rx_replenish);
2519
2520         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2521                 return;
2522
2523         mutex_lock(&priv->mutex);
2524         iwlagn_rx_replenish(priv);
2525         mutex_unlock(&priv->mutex);
2526 }
2527
2528 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2529
2530 void iwl_post_associate(struct iwl_priv *priv)
2531 {
2532         struct ieee80211_conf *conf = NULL;
2533         int ret = 0;
2534         unsigned long flags;
2535
2536         if (priv->iw_mode == NL80211_IFTYPE_AP) {
2537                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2538                 return;
2539         }
2540
2541         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2542                 return;
2543
2544
2545         if (!priv->vif || !priv->is_open)
2546                 return;
2547
2548         iwl_scan_cancel_timeout(priv, 200);
2549
2550         conf = ieee80211_get_hw_conf(priv->hw);
2551
2552         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2553         iwlcore_commit_rxon(priv);
2554
2555         iwl_setup_rxon_timing(priv);
2556         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2557                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2558         if (ret)
2559                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2560                             "Attempting to continue.\n");
2561
2562         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2563
2564         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2565
2566         if (priv->cfg->ops->hcmd->set_rxon_chain)
2567                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2568
2569         priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2570
2571         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2572                         priv->assoc_id, priv->beacon_int);
2573
2574         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2575                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2576         else
2577                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2578
2579         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2580                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2581                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2582                 else
2583                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2584
2585                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2586                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2587
2588         }
2589
2590         iwlcore_commit_rxon(priv);
2591
2592         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2593                         priv->assoc_id, priv->active_rxon.bssid_addr);
2594
2595         switch (priv->iw_mode) {
2596         case NL80211_IFTYPE_STATION:
2597                 break;
2598
2599         case NL80211_IFTYPE_ADHOC:
2600
2601                 /* assume default assoc id */
2602                 priv->assoc_id = 1;
2603
2604                 iwl_add_local_station(priv, priv->bssid, true);
2605                 iwl_send_beacon_cmd(priv);
2606
2607                 break;
2608
2609         default:
2610                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2611                           __func__, priv->iw_mode);
2612                 break;
2613         }
2614
2615         spin_lock_irqsave(&priv->lock, flags);
2616         iwl_activate_qos(priv, 0);
2617         spin_unlock_irqrestore(&priv->lock, flags);
2618
2619         /* the chain noise calibration will enabled PM upon completion
2620          * If chain noise has already been run, then we need to enable
2621          * power management here */
2622         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2623                 iwl_power_update_mode(priv, false);
2624
2625         /* Enable Rx differential gain and sensitivity calibrations */
2626         iwl_chain_noise_reset(priv);
2627         priv->start_calib = 1;
2628
2629 }
2630
2631 /*****************************************************************************
2632  *
2633  * mac80211 entry point functions
2634  *
2635  *****************************************************************************/
2636
2637 #define UCODE_READY_TIMEOUT     (4 * HZ)
2638
2639 /*
2640  * Not a mac80211 entry point function, but it fits in with all the
2641  * other mac80211 functions grouped here.
2642  */
2643 static int iwl_mac_setup_register(struct iwl_priv *priv)
2644 {
2645         int ret;
2646         struct ieee80211_hw *hw = priv->hw;
2647         hw->rate_control_algorithm = "iwl-agn-rs";
2648
2649         /* Tell mac80211 our characteristics */
2650         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2651                     IEEE80211_HW_NOISE_DBM |
2652                     IEEE80211_HW_AMPDU_AGGREGATION |
2653                     IEEE80211_HW_SPECTRUM_MGMT;
2654
2655         if (!priv->cfg->broken_powersave)
2656                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2657                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2658
2659         if (priv->cfg->sku & IWL_SKU_N)
2660                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2661                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2662
2663         hw->sta_data_size = sizeof(struct iwl_station_priv);
2664         hw->wiphy->interface_modes =
2665                 BIT(NL80211_IFTYPE_STATION) |
2666                 BIT(NL80211_IFTYPE_ADHOC);
2667
2668         hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY |
2669                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
2670
2671         /*
2672          * For now, disable PS by default because it affects
2673          * RX performance significantly.
2674          */
2675         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2676
2677         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX + 1;
2678         /* we create the 802.11 header and a zero-length SSID element */
2679         hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2680
2681         /* Default value; 4 EDCA QOS priorities */
2682         hw->queues = 4;
2683
2684         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2685
2686         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2687                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2688                         &priv->bands[IEEE80211_BAND_2GHZ];
2689         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2690                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2691                         &priv->bands[IEEE80211_BAND_5GHZ];
2692
2693         ret = ieee80211_register_hw(priv->hw);
2694         if (ret) {
2695                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2696                 return ret;
2697         }
2698         priv->mac80211_registered = 1;
2699
2700         return 0;
2701 }
2702
2703
2704 static int iwl_mac_start(struct ieee80211_hw *hw)
2705 {
2706         struct iwl_priv *priv = hw->priv;
2707         int ret;
2708
2709         IWL_DEBUG_MAC80211(priv, "enter\n");
2710
2711         /* we should be verifying the device is ready to be opened */
2712         mutex_lock(&priv->mutex);
2713         ret = __iwl_up(priv);
2714         mutex_unlock(&priv->mutex);
2715
2716         if (ret)
2717                 return ret;
2718
2719         if (iwl_is_rfkill(priv))
2720                 goto out;
2721
2722         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2723
2724         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2725          * mac80211 will not be run successfully. */
2726         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2727                         test_bit(STATUS_READY, &priv->status),
2728                         UCODE_READY_TIMEOUT);
2729         if (!ret) {
2730                 if (!test_bit(STATUS_READY, &priv->status)) {
2731                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2732                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2733                         return -ETIMEDOUT;
2734                 }
2735         }
2736
2737         iwl_led_start(priv);
2738
2739 out:
2740         priv->is_open = 1;
2741         IWL_DEBUG_MAC80211(priv, "leave\n");
2742         return 0;
2743 }
2744
2745 static void iwl_mac_stop(struct ieee80211_hw *hw)
2746 {
2747         struct iwl_priv *priv = hw->priv;
2748
2749         IWL_DEBUG_MAC80211(priv, "enter\n");
2750
2751         if (!priv->is_open)
2752                 return;
2753
2754         priv->is_open = 0;
2755
2756         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2757                 /* stop mac, cancel any scan request and clear
2758                  * RXON_FILTER_ASSOC_MSK BIT
2759                  */
2760                 mutex_lock(&priv->mutex);
2761                 iwl_scan_cancel_timeout(priv, 100);
2762                 mutex_unlock(&priv->mutex);
2763         }
2764
2765         iwl_down(priv);
2766
2767         flush_workqueue(priv->workqueue);
2768
2769         /* enable interrupts again in order to receive rfkill changes */
2770         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2771         iwl_enable_interrupts(priv);
2772
2773         IWL_DEBUG_MAC80211(priv, "leave\n");
2774 }
2775
2776 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2777 {
2778         struct iwl_priv *priv = hw->priv;
2779
2780         IWL_DEBUG_MACDUMP(priv, "enter\n");
2781
2782         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2783                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2784
2785         if (iwlagn_tx_skb(priv, skb))
2786                 dev_kfree_skb_any(skb);
2787
2788         IWL_DEBUG_MACDUMP(priv, "leave\n");
2789         return NETDEV_TX_OK;
2790 }
2791
2792 void iwl_config_ap(struct iwl_priv *priv)
2793 {
2794         int ret = 0;
2795         unsigned long flags;
2796
2797         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2798                 return;
2799
2800         /* The following should be done only at AP bring up */
2801         if (!iwl_is_associated(priv)) {
2802
2803                 /* RXON - unassoc (to set timing command) */
2804                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2805                 iwlcore_commit_rxon(priv);
2806
2807                 /* RXON Timing */
2808                 iwl_setup_rxon_timing(priv);
2809                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2810                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
2811                 if (ret)
2812                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2813                                         "Attempting to continue.\n");
2814
2815                 /* AP has all antennas */
2816                 priv->chain_noise_data.active_chains =
2817                         priv->hw_params.valid_rx_ant;
2818                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2819                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2820                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2821
2822                 /* FIXME: what should be the assoc_id for AP? */
2823                 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2824                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2825                         priv->staging_rxon.flags |=
2826                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2827                 else
2828                         priv->staging_rxon.flags &=
2829                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2830
2831                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2832                         if (priv->assoc_capability &
2833                                 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2834                                 priv->staging_rxon.flags |=
2835                                         RXON_FLG_SHORT_SLOT_MSK;
2836                         else
2837                                 priv->staging_rxon.flags &=
2838                                         ~RXON_FLG_SHORT_SLOT_MSK;
2839
2840                         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2841                                 priv->staging_rxon.flags &=
2842                                         ~RXON_FLG_SHORT_SLOT_MSK;
2843                 }
2844                 /* restore RXON assoc */
2845                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2846                 iwlcore_commit_rxon(priv);
2847                 iwl_reset_qos(priv);
2848                 spin_lock_irqsave(&priv->lock, flags);
2849                 iwl_activate_qos(priv, 1);
2850                 spin_unlock_irqrestore(&priv->lock, flags);
2851                 iwl_add_bcast_station(priv);
2852         }
2853         iwl_send_beacon_cmd(priv);
2854
2855         /* FIXME - we need to add code here to detect a totally new
2856          * configuration, reset the AP, unassoc, rxon timing, assoc,
2857          * clear sta table, add BCAST sta... */
2858 }
2859
2860 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2861                                     struct ieee80211_vif *vif,
2862                                     struct ieee80211_key_conf *keyconf,
2863                                     struct ieee80211_sta *sta,
2864                                     u32 iv32, u16 *phase1key)
2865 {
2866
2867         struct iwl_priv *priv = hw->priv;
2868         IWL_DEBUG_MAC80211(priv, "enter\n");
2869
2870         iwl_update_tkip_key(priv, keyconf,
2871                             sta ? sta->addr : iwl_bcast_addr,
2872                             iv32, phase1key);
2873
2874         IWL_DEBUG_MAC80211(priv, "leave\n");
2875 }
2876
2877 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2878                            struct ieee80211_vif *vif,
2879                            struct ieee80211_sta *sta,
2880                            struct ieee80211_key_conf *key)
2881 {
2882         struct iwl_priv *priv = hw->priv;
2883         const u8 *addr;
2884         int ret;
2885         u8 sta_id;
2886         bool is_default_wep_key = false;
2887
2888         IWL_DEBUG_MAC80211(priv, "enter\n");
2889
2890         if (priv->cfg->mod_params->sw_crypto) {
2891                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2892                 return -EOPNOTSUPP;
2893         }
2894         addr = sta ? sta->addr : iwl_bcast_addr;
2895         sta_id = iwl_find_station(priv, addr);
2896         if (sta_id == IWL_INVALID_STATION) {
2897                 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2898                                    addr);
2899                 return -EINVAL;
2900
2901         }
2902
2903         mutex_lock(&priv->mutex);
2904         iwl_scan_cancel_timeout(priv, 100);
2905
2906         /* If we are getting WEP group key and we didn't receive any key mapping
2907          * so far, we are in legacy wep mode (group key only), otherwise we are
2908          * in 1X mode.
2909          * In legacy wep mode, we use another host command to the uCode */
2910         if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2911                 priv->iw_mode != NL80211_IFTYPE_AP) {
2912                 if (cmd == SET_KEY)
2913                         is_default_wep_key = !priv->key_mapping_key;
2914                 else
2915                         is_default_wep_key =
2916                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2917         }
2918
2919         switch (cmd) {
2920         case SET_KEY:
2921                 if (is_default_wep_key)
2922                         ret = iwl_set_default_wep_key(priv, key);
2923                 else
2924                         ret = iwl_set_dynamic_key(priv, key, sta_id);
2925
2926                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2927                 break;
2928         case DISABLE_KEY:
2929                 if (is_default_wep_key)
2930                         ret = iwl_remove_default_wep_key(priv, key);
2931                 else
2932                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
2933
2934                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2935                 break;
2936         default:
2937                 ret = -EINVAL;
2938         }
2939
2940         mutex_unlock(&priv->mutex);
2941         IWL_DEBUG_MAC80211(priv, "leave\n");
2942
2943         return ret;
2944 }
2945
2946 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2947                                 struct ieee80211_vif *vif,
2948                              enum ieee80211_ampdu_mlme_action action,
2949                              struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2950 {
2951         struct iwl_priv *priv = hw->priv;
2952         int ret;
2953
2954         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2955                      sta->addr, tid);
2956
2957         if (!(priv->cfg->sku & IWL_SKU_N))
2958                 return -EACCES;
2959
2960         switch (action) {
2961         case IEEE80211_AMPDU_RX_START:
2962                 IWL_DEBUG_HT(priv, "start Rx\n");
2963                 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2964         case IEEE80211_AMPDU_RX_STOP:
2965                 IWL_DEBUG_HT(priv, "stop Rx\n");
2966                 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2967                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2968                         return 0;
2969                 else
2970                         return ret;
2971         case IEEE80211_AMPDU_TX_START:
2972                 IWL_DEBUG_HT(priv, "start Tx\n");
2973                 ret = iwlagn_tx_agg_start(priv, sta->addr, tid, ssn);
2974                 if (ret == 0) {
2975                         priv->_agn.agg_tids_count++;
2976                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2977                                      priv->_agn.agg_tids_count);
2978                 }
2979                 return ret;
2980         case IEEE80211_AMPDU_TX_STOP:
2981                 IWL_DEBUG_HT(priv, "stop Tx\n");
2982                 ret = iwlagn_tx_agg_stop(priv, sta->addr, tid);
2983                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
2984                         priv->_agn.agg_tids_count--;
2985                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2986                                      priv->_agn.agg_tids_count);
2987                 }
2988                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2989                         return 0;
2990                 else
2991                         return ret;
2992         case IEEE80211_AMPDU_TX_OPERATIONAL:
2993                 /* do nothing */
2994                 return -EOPNOTSUPP;
2995         default:
2996                 IWL_DEBUG_HT(priv, "unknown\n");
2997                 return -EINVAL;
2998                 break;
2999         }
3000         return 0;
3001 }
3002
3003 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
3004                              struct ieee80211_low_level_stats *stats)
3005 {
3006         struct iwl_priv *priv = hw->priv;
3007
3008         priv = hw->priv;
3009         IWL_DEBUG_MAC80211(priv, "enter\n");
3010         IWL_DEBUG_MAC80211(priv, "leave\n");
3011
3012         return 0;
3013 }
3014
3015 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3016                                struct ieee80211_vif *vif,
3017                                enum sta_notify_cmd cmd,
3018                                struct ieee80211_sta *sta)
3019 {
3020         struct iwl_priv *priv = hw->priv;
3021         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3022         int sta_id;
3023
3024         switch (cmd) {
3025         case STA_NOTIFY_SLEEP:
3026                 WARN_ON(!sta_priv->client);
3027                 sta_priv->asleep = true;
3028                 if (atomic_read(&sta_priv->pending_frames) > 0)
3029                         ieee80211_sta_block_awake(hw, sta, true);
3030                 break;
3031         case STA_NOTIFY_AWAKE:
3032                 WARN_ON(!sta_priv->client);
3033                 if (!sta_priv->asleep)
3034                         break;
3035                 sta_priv->asleep = false;
3036                 sta_id = iwl_find_station(priv, sta->addr);
3037                 if (sta_id != IWL_INVALID_STATION)
3038                         iwl_sta_modify_ps_wake(priv, sta_id);
3039                 break;
3040         default:
3041                 break;
3042         }
3043 }
3044
3045 /**
3046  * iwl_restore_wepkeys - Restore WEP keys to device
3047  */
3048 static void iwl_restore_wepkeys(struct iwl_priv *priv)
3049 {
3050         mutex_lock(&priv->mutex);
3051         if (priv->iw_mode == NL80211_IFTYPE_STATION &&
3052             priv->default_wep_key &&
3053             iwl_send_static_wepkey_cmd(priv, 0))
3054                 IWL_ERR(priv, "Could not send WEP static key\n");
3055         mutex_unlock(&priv->mutex);
3056 }
3057
3058 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3059                               struct ieee80211_vif *vif,
3060                               struct ieee80211_sta *sta)
3061 {
3062         struct iwl_priv *priv = hw->priv;
3063         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3064         bool is_ap = priv->iw_mode == NL80211_IFTYPE_STATION;
3065         int ret;
3066         u8 sta_id;
3067
3068         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3069                         sta->addr);
3070
3071         atomic_set(&sta_priv->pending_frames, 0);
3072         if (vif->type == NL80211_IFTYPE_AP)
3073                 sta_priv->client = true;
3074
3075         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3076                                      &sta_id);
3077         if (ret) {
3078                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3079                         sta->addr, ret);
3080                 /* Should we return success if return code is EEXIST ? */
3081                 return ret;
3082         }
3083
3084         iwl_restore_wepkeys(priv);
3085
3086         /* Initialize rate scaling */
3087         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM \n",
3088                        sta->addr);
3089         iwl_rs_rate_init(priv, sta, sta_id);
3090
3091         return ret;
3092 }
3093
3094 /*****************************************************************************
3095  *
3096  * sysfs attributes
3097  *
3098  *****************************************************************************/
3099
3100 #ifdef CONFIG_IWLWIFI_DEBUG
3101
3102 /*
3103  * The following adds a new attribute to the sysfs representation
3104  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3105  * used for controlling the debug level.
3106  *
3107  * See the level definitions in iwl for details.
3108  *
3109  * The debug_level being managed using sysfs below is a per device debug
3110  * level that is used instead of the global debug level if it (the per
3111  * device debug level) is set.
3112  */
3113 static ssize_t show_debug_level(struct device *d,
3114                                 struct device_attribute *attr, char *buf)
3115 {
3116         struct iwl_priv *priv = dev_get_drvdata(d);
3117         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3118 }
3119 static ssize_t store_debug_level(struct device *d,
3120                                 struct device_attribute *attr,
3121                                  const char *buf, size_t count)
3122 {
3123         struct iwl_priv *priv = dev_get_drvdata(d);
3124         unsigned long val;
3125         int ret;
3126
3127         ret = strict_strtoul(buf, 0, &val);
3128         if (ret)
3129                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3130         else {
3131                 priv->debug_level = val;
3132                 if (iwl_alloc_traffic_mem(priv))
3133                         IWL_ERR(priv,
3134                                 "Not enough memory to generate traffic log\n");
3135         }
3136         return strnlen(buf, count);
3137 }
3138
3139 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3140                         show_debug_level, store_debug_level);
3141
3142
3143 #endif /* CONFIG_IWLWIFI_DEBUG */
3144
3145
3146 static ssize_t show_temperature(struct device *d,
3147                                 struct device_attribute *attr, char *buf)
3148 {
3149         struct iwl_priv *priv = dev_get_drvdata(d);
3150
3151         if (!iwl_is_alive(priv))
3152                 return -EAGAIN;
3153
3154         return sprintf(buf, "%d\n", priv->temperature);
3155 }
3156
3157 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3158
3159 static ssize_t show_tx_power(struct device *d,
3160                              struct device_attribute *attr, char *buf)
3161 {
3162         struct iwl_priv *priv = dev_get_drvdata(d);
3163
3164         if (!iwl_is_ready_rf(priv))
3165                 return sprintf(buf, "off\n");
3166         else
3167                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3168 }
3169
3170 static ssize_t store_tx_power(struct device *d,
3171                               struct device_attribute *attr,
3172                               const char *buf, size_t count)
3173 {
3174         struct iwl_priv *priv = dev_get_drvdata(d);
3175         unsigned long val;
3176         int ret;
3177
3178         ret = strict_strtoul(buf, 10, &val);
3179         if (ret)
3180                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3181         else {
3182                 ret = iwl_set_tx_power(priv, val, false);
3183                 if (ret)
3184                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3185                                 ret);
3186                 else
3187                         ret = count;
3188         }
3189         return ret;
3190 }
3191
3192 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3193
3194 static ssize_t show_statistics(struct device *d,
3195                                struct device_attribute *attr, char *buf)
3196 {
3197         struct iwl_priv *priv = dev_get_drvdata(d);
3198         u32 size = sizeof(struct iwl_notif_statistics);
3199         u32 len = 0, ofs = 0;
3200         u8 *data = (u8 *)&priv->statistics;
3201         int rc = 0;
3202
3203         if (!iwl_is_alive(priv))
3204                 return -EAGAIN;
3205
3206         mutex_lock(&priv->mutex);
3207         rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
3208         mutex_unlock(&priv->mutex);
3209
3210         if (rc) {
3211                 len = sprintf(buf,
3212                               "Error sending statistics request: 0x%08X\n", rc);
3213                 return len;
3214         }
3215
3216         while (size && (PAGE_SIZE - len)) {
3217                 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3218                                    PAGE_SIZE - len, 1);
3219                 len = strlen(buf);
3220                 if (PAGE_SIZE - len)
3221                         buf[len++] = '\n';
3222
3223                 ofs += 16;
3224                 size -= min(size, 16U);
3225         }
3226
3227         return len;
3228 }
3229
3230 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3231
3232 static ssize_t show_rts_ht_protection(struct device *d,
3233                              struct device_attribute *attr, char *buf)
3234 {
3235         struct iwl_priv *priv = dev_get_drvdata(d);
3236
3237         return sprintf(buf, "%s\n",
3238                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3239 }
3240
3241 static ssize_t store_rts_ht_protection(struct device *d,
3242                               struct device_attribute *attr,
3243                               const char *buf, size_t count)
3244 {
3245         struct iwl_priv *priv = dev_get_drvdata(d);
3246         unsigned long val;
3247         int ret;
3248
3249         ret = strict_strtoul(buf, 10, &val);
3250         if (ret)
3251                 IWL_INFO(priv, "Input is not in decimal form.\n");
3252         else {
3253                 if (!iwl_is_associated(priv))
3254                         priv->cfg->use_rts_for_ht = val ? true : false;
3255                 else
3256                         IWL_ERR(priv, "Sta associated with AP - "
3257                                 "Change protection mechanism is not allowed\n");
3258                 ret = count;
3259         }
3260         return ret;
3261 }
3262
3263 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3264                         show_rts_ht_protection, store_rts_ht_protection);
3265
3266
3267 /*****************************************************************************
3268  *
3269  * driver setup and teardown
3270  *
3271  *****************************************************************************/
3272
3273 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3274 {
3275         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3276
3277         init_waitqueue_head(&priv->wait_command_queue);
3278
3279         INIT_WORK(&priv->restart, iwl_bg_restart);
3280         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3281         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3282         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3283         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3284         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3285
3286         iwl_setup_scan_deferred_work(priv);
3287
3288         if (priv->cfg->ops->lib->setup_deferred_work)
3289                 priv->cfg->ops->lib->setup_deferred_work(priv);
3290
3291         init_timer(&priv->statistics_periodic);
3292         priv->statistics_periodic.data = (unsigned long)priv;
3293         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3294
3295         init_timer(&priv->ucode_trace);
3296         priv->ucode_trace.data = (unsigned long)priv;
3297         priv->ucode_trace.function = iwl_bg_ucode_trace;
3298
3299         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3300                 init_timer(&priv->monitor_recover);
3301                 priv->monitor_recover.data = (unsigned long)priv;
3302                 priv->monitor_recover.function =
3303                         priv->cfg->ops->lib->recover_from_tx_stall;
3304         }
3305
3306         if (!priv->cfg->use_isr_legacy)
3307                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3308                         iwl_irq_tasklet, (unsigned long)priv);
3309         else
3310                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3311                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3312 }
3313
3314 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3315 {
3316         if (priv->cfg->ops->lib->cancel_deferred_work)
3317                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3318
3319         cancel_delayed_work_sync(&priv->init_alive_start);
3320         cancel_delayed_work(&priv->scan_check);
3321         cancel_delayed_work(&priv->alive_start);
3322         cancel_work_sync(&priv->beacon_update);
3323         del_timer_sync(&priv->statistics_periodic);
3324         del_timer_sync(&priv->ucode_trace);
3325         if (priv->cfg->ops->lib->recover_from_tx_stall)
3326                 del_timer_sync(&priv->monitor_recover);
3327 }
3328
3329 static void iwl_init_hw_rates(struct iwl_priv *priv,
3330                               struct ieee80211_rate *rates)
3331 {
3332         int i;
3333
3334         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3335                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3336                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3337                 rates[i].hw_value_short = i;
3338                 rates[i].flags = 0;
3339                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3340                         /*
3341                          * If CCK != 1M then set short preamble rate flag.
3342                          */
3343                         rates[i].flags |=
3344                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3345                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3346                 }
3347         }
3348 }
3349
3350 static int iwl_init_drv(struct iwl_priv *priv)
3351 {
3352         int ret;
3353
3354         priv->ibss_beacon = NULL;
3355
3356         spin_lock_init(&priv->sta_lock);
3357         spin_lock_init(&priv->hcmd_lock);
3358
3359         INIT_LIST_HEAD(&priv->free_frames);
3360
3361         mutex_init(&priv->mutex);
3362         mutex_init(&priv->sync_cmd_mutex);
3363
3364         priv->ieee_channels = NULL;
3365         priv->ieee_rates = NULL;
3366         priv->band = IEEE80211_BAND_2GHZ;
3367
3368         priv->iw_mode = NL80211_IFTYPE_STATION;
3369         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3370         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3371         priv->_agn.agg_tids_count = 0;
3372
3373         /* initialize force reset */
3374         priv->force_reset[IWL_RF_RESET].reset_duration =
3375                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3376         priv->force_reset[IWL_FW_RESET].reset_duration =
3377                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3378
3379         /* Choose which receivers/antennas to use */
3380         if (priv->cfg->ops->hcmd->set_rxon_chain)
3381                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3382
3383         iwl_init_scan_params(priv);
3384
3385         iwl_reset_qos(priv);
3386
3387         priv->qos_data.qos_active = 0;
3388         priv->qos_data.qos_cap.val = 0;
3389
3390         /* Set the tx_power_user_lmt to the lowest power level
3391          * this value will get overwritten by channel max power avg
3392          * from eeprom */
3393         priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3394
3395         ret = iwl_init_channel_map(priv);
3396         if (ret) {
3397                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3398                 goto err;
3399         }
3400
3401         ret = iwlcore_init_geos(priv);
3402         if (ret) {
3403                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3404                 goto err_free_channel_map;
3405         }
3406         iwl_init_hw_rates(priv, priv->ieee_rates);
3407
3408         return 0;
3409
3410 err_free_channel_map:
3411         iwl_free_channel_map(priv);
3412 err:
3413         return ret;
3414 }
3415
3416 static void iwl_uninit_drv(struct iwl_priv *priv)
3417 {
3418         iwl_calib_free_results(priv);
3419         iwlcore_free_geos(priv);
3420         iwl_free_channel_map(priv);
3421         kfree(priv->scan);
3422 }
3423
3424 static struct attribute *iwl_sysfs_entries[] = {
3425         &dev_attr_statistics.attr,
3426         &dev_attr_temperature.attr,
3427         &dev_attr_tx_power.attr,
3428         &dev_attr_rts_ht_protection.attr,
3429 #ifdef CONFIG_IWLWIFI_DEBUG
3430         &dev_attr_debug_level.attr,
3431 #endif
3432         NULL
3433 };
3434
3435 static struct attribute_group iwl_attribute_group = {
3436         .name = NULL,           /* put in device directory */
3437         .attrs = iwl_sysfs_entries,
3438 };
3439
3440 static struct ieee80211_ops iwl_hw_ops = {
3441         .tx = iwl_mac_tx,
3442         .start = iwl_mac_start,
3443         .stop = iwl_mac_stop,
3444         .add_interface = iwl_mac_add_interface,
3445         .remove_interface = iwl_mac_remove_interface,
3446         .config = iwl_mac_config,
3447         .configure_filter = iwl_configure_filter,
3448         .set_key = iwl_mac_set_key,
3449         .update_tkip_key = iwl_mac_update_tkip_key,
3450         .get_stats = iwl_mac_get_stats,
3451         .conf_tx = iwl_mac_conf_tx,
3452         .reset_tsf = iwl_mac_reset_tsf,
3453         .bss_info_changed = iwl_bss_info_changed,
3454         .ampdu_action = iwl_mac_ampdu_action,
3455         .hw_scan = iwl_mac_hw_scan,
3456         .sta_notify = iwl_mac_sta_notify,
3457         .sta_add = iwlagn_mac_sta_add,
3458         .sta_remove = iwl_mac_sta_remove,
3459 };
3460
3461 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3462 {
3463         int err = 0;
3464         struct iwl_priv *priv;
3465         struct ieee80211_hw *hw;
3466         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3467         unsigned long flags;
3468         u16 pci_cmd;
3469
3470         /************************
3471          * 1. Allocating HW data
3472          ************************/
3473
3474         /* Disabling hardware scan means that mac80211 will perform scans
3475          * "the hard way", rather than using device's scan. */
3476         if (cfg->mod_params->disable_hw_scan) {
3477                 if (iwl_debug_level & IWL_DL_INFO)
3478                         dev_printk(KERN_DEBUG, &(pdev->dev),
3479                                    "Disabling hw_scan\n");
3480                 iwl_hw_ops.hw_scan = NULL;
3481         }
3482
3483         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3484         if (!hw) {
3485                 err = -ENOMEM;
3486                 goto out;
3487         }
3488         priv = hw->priv;
3489         /* At this point both hw and priv are allocated. */
3490
3491         SET_IEEE80211_DEV(hw, &pdev->dev);
3492
3493         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3494         priv->cfg = cfg;
3495         priv->pci_dev = pdev;
3496         priv->inta_mask = CSR_INI_SET_MASK;
3497
3498 #ifdef CONFIG_IWLWIFI_DEBUG
3499         atomic_set(&priv->restrict_refcnt, 0);
3500 #endif
3501         if (iwl_alloc_traffic_mem(priv))
3502                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3503
3504         /**************************
3505          * 2. Initializing PCI bus
3506          **************************/
3507         if (pci_enable_device(pdev)) {
3508                 err = -ENODEV;
3509                 goto out_ieee80211_free_hw;
3510         }
3511
3512         pci_set_master(pdev);
3513
3514         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3515         if (!err)
3516                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3517         if (err) {
3518                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3519                 if (!err)
3520                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3521                 /* both attempts failed: */
3522                 if (err) {
3523                         IWL_WARN(priv, "No suitable DMA available.\n");
3524                         goto out_pci_disable_device;
3525                 }
3526         }
3527
3528         err = pci_request_regions(pdev, DRV_NAME);
3529         if (err)
3530                 goto out_pci_disable_device;
3531
3532         pci_set_drvdata(pdev, priv);
3533
3534
3535         /***********************
3536          * 3. Read REV register
3537          ***********************/
3538         priv->hw_base = pci_iomap(pdev, 0, 0);
3539         if (!priv->hw_base) {
3540                 err = -ENODEV;
3541                 goto out_pci_release_regions;
3542         }
3543
3544         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3545                 (unsigned long long) pci_resource_len(pdev, 0));
3546         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3547
3548         /* these spin locks will be used in apm_ops.init and EEPROM access
3549          * we should init now
3550          */
3551         spin_lock_init(&priv->reg_lock);
3552         spin_lock_init(&priv->lock);
3553
3554         /*
3555          * stop and reset the on-board processor just in case it is in a
3556          * strange state ... like being left stranded by a primary kernel
3557          * and this is now the kdump kernel trying to start up
3558          */
3559         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3560
3561         iwl_hw_detect(priv);
3562         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3563                 priv->cfg->name, priv->hw_rev);
3564
3565         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3566          * PCI Tx retries from interfering with C3 CPU state */
3567         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3568
3569         iwl_prepare_card_hw(priv);
3570         if (!priv->hw_ready) {
3571                 IWL_WARN(priv, "Failed, HW not ready\n");
3572                 goto out_iounmap;
3573         }
3574
3575         /*****************
3576          * 4. Read EEPROM
3577          *****************/
3578         /* Read the EEPROM */
3579         err = iwl_eeprom_init(priv);
3580         if (err) {
3581                 IWL_ERR(priv, "Unable to init EEPROM\n");
3582                 goto out_iounmap;
3583         }
3584         err = iwl_eeprom_check_version(priv);
3585         if (err)
3586                 goto out_free_eeprom;
3587
3588         /* extract MAC Address */
3589         iwl_eeprom_get_mac(priv, priv->mac_addr);
3590         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3591         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3592
3593         /************************
3594          * 5. Setup HW constants
3595          ************************/
3596         if (iwl_set_hw_params(priv)) {
3597                 IWL_ERR(priv, "failed to set hw parameters\n");
3598                 goto out_free_eeprom;
3599         }
3600
3601         /*******************
3602          * 6. Setup priv
3603          *******************/
3604
3605         err = iwl_init_drv(priv);
3606         if (err)
3607                 goto out_free_eeprom;
3608         /* At this point both hw and priv are initialized. */
3609
3610         /********************
3611          * 7. Setup services
3612          ********************/
3613         spin_lock_irqsave(&priv->lock, flags);
3614         iwl_disable_interrupts(priv);
3615         spin_unlock_irqrestore(&priv->lock, flags);
3616
3617         pci_enable_msi(priv->pci_dev);
3618
3619         iwl_alloc_isr_ict(priv);
3620         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3621                           IRQF_SHARED, DRV_NAME, priv);
3622         if (err) {
3623                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3624                 goto out_disable_msi;
3625         }
3626         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3627         if (err) {
3628                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3629                 goto out_free_irq;
3630         }
3631
3632         iwl_setup_deferred_work(priv);
3633         iwl_setup_rx_handlers(priv);
3634
3635         /*********************************************
3636          * 8. Enable interrupts and read RFKILL state
3637          *********************************************/
3638
3639         /* enable interrupts if needed: hw bug w/a */
3640         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3641         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3642                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3643                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3644         }
3645
3646         iwl_enable_interrupts(priv);
3647
3648         /* If platform's RF_KILL switch is NOT set to KILL */
3649         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3650                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3651         else
3652                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3653
3654         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3655                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3656
3657         iwl_power_initialize(priv);
3658         iwl_tt_initialize(priv);
3659
3660         err = iwl_request_firmware(priv, true);
3661         if (err)
3662                 goto out_remove_sysfs;
3663
3664         return 0;
3665
3666  out_remove_sysfs:
3667         destroy_workqueue(priv->workqueue);
3668         priv->workqueue = NULL;
3669         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3670  out_free_irq:
3671         free_irq(priv->pci_dev->irq, priv);
3672         iwl_free_isr_ict(priv);
3673  out_disable_msi:
3674         pci_disable_msi(priv->pci_dev);
3675         iwl_uninit_drv(priv);
3676  out_free_eeprom:
3677         iwl_eeprom_free(priv);
3678  out_iounmap:
3679         pci_iounmap(pdev, priv->hw_base);
3680  out_pci_release_regions:
3681         pci_set_drvdata(pdev, NULL);
3682         pci_release_regions(pdev);
3683  out_pci_disable_device:
3684         pci_disable_device(pdev);
3685  out_ieee80211_free_hw:
3686         iwl_free_traffic_mem(priv);
3687         ieee80211_free_hw(priv->hw);
3688  out:
3689         return err;
3690 }
3691
3692 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3693 {
3694         struct iwl_priv *priv = pci_get_drvdata(pdev);
3695         unsigned long flags;
3696
3697         if (!priv)
3698                 return;
3699
3700         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3701
3702         iwl_dbgfs_unregister(priv);
3703         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3704
3705         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3706          * to be called and iwl_down since we are removing the device
3707          * we need to set STATUS_EXIT_PENDING bit.
3708          */
3709         set_bit(STATUS_EXIT_PENDING, &priv->status);
3710         if (priv->mac80211_registered) {
3711                 ieee80211_unregister_hw(priv->hw);
3712                 priv->mac80211_registered = 0;
3713         } else {
3714                 iwl_down(priv);
3715         }
3716
3717         /*
3718          * Make sure device is reset to low power before unloading driver.
3719          * This may be redundant with iwl_down(), but there are paths to
3720          * run iwl_down() without calling apm_ops.stop(), and there are
3721          * paths to avoid running iwl_down() at all before leaving driver.
3722          * This (inexpensive) call *makes sure* device is reset.
3723          */
3724         priv->cfg->ops->lib->apm_ops.stop(priv);
3725
3726         iwl_tt_exit(priv);
3727
3728         /* make sure we flush any pending irq or
3729          * tasklet for the driver
3730          */
3731         spin_lock_irqsave(&priv->lock, flags);
3732         iwl_disable_interrupts(priv);
3733         spin_unlock_irqrestore(&priv->lock, flags);
3734
3735         iwl_synchronize_irq(priv);
3736
3737         iwl_dealloc_ucode_pci(priv);
3738
3739         if (priv->rxq.bd)
3740                 iwlagn_rx_queue_free(priv, &priv->rxq);
3741         iwlagn_hw_txq_ctx_free(priv);
3742
3743         iwl_eeprom_free(priv);
3744
3745
3746         /*netif_stop_queue(dev); */
3747         flush_workqueue(priv->workqueue);
3748
3749         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3750          * priv->workqueue... so we can't take down the workqueue
3751          * until now... */
3752         destroy_workqueue(priv->workqueue);
3753         priv->workqueue = NULL;
3754         iwl_free_traffic_mem(priv);
3755
3756         free_irq(priv->pci_dev->irq, priv);
3757         pci_disable_msi(priv->pci_dev);
3758         pci_iounmap(pdev, priv->hw_base);
3759         pci_release_regions(pdev);
3760         pci_disable_device(pdev);
3761         pci_set_drvdata(pdev, NULL);
3762
3763         iwl_uninit_drv(priv);
3764
3765         iwl_free_isr_ict(priv);
3766
3767         if (priv->ibss_beacon)
3768                 dev_kfree_skb(priv->ibss_beacon);
3769
3770         ieee80211_free_hw(priv->hw);
3771 }
3772
3773
3774 /*****************************************************************************
3775  *
3776  * driver and module entry point
3777  *
3778  *****************************************************************************/
3779
3780 /* Hardware specific file defines the PCI IDs table for that hardware module */
3781 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3782 #ifdef CONFIG_IWL4965
3783         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3784         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3785 #endif /* CONFIG_IWL4965 */
3786 #ifdef CONFIG_IWL5000
3787 /* 5100 Series WiFi */
3788         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3789         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3790         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3791         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3792         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3793         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3794         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3795         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3796         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3797         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3798         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3799         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3800         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3801         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3802         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3803         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3804         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3805         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3806         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3807         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3808         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3809         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3810         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3811         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3812
3813 /* 5300 Series WiFi */
3814         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3815         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3816         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3817         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3818         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3819         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3820         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3821         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3822         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3823         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3824         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3825         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3826
3827 /* 5350 Series WiFi/WiMax */
3828         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3829         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3830         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3831
3832 /* 5150 Series Wifi/WiMax */
3833         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3834         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3835         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3836         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3837         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3838         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3839
3840         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3841         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3842         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3843         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3844
3845 /* 6x00 Series */
3846         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3847         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3848         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3849         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3850         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3851         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3852         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3853         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3854         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3855         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3856         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000i_g2_2agn_cfg)},
3857
3858 /* 6x50 WiFi/WiMax Series */
3859         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3860         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3861         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3862         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3863         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3864         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3865
3866 /* 1000 Series WiFi */
3867         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3868         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3869         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3870         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3871         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3872         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3873         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3874         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3875         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3876         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3877         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3878         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3879 #endif /* CONFIG_IWL5000 */
3880
3881         {0}
3882 };
3883 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3884
3885 static struct pci_driver iwl_driver = {
3886         .name = DRV_NAME,
3887         .id_table = iwl_hw_card_ids,
3888         .probe = iwl_pci_probe,
3889         .remove = __devexit_p(iwl_pci_remove),
3890 #ifdef CONFIG_PM
3891         .suspend = iwl_pci_suspend,
3892         .resume = iwl_pci_resume,
3893 #endif
3894 };
3895
3896 static int __init iwl_init(void)
3897 {
3898
3899         int ret;
3900         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3901         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3902
3903         ret = iwlagn_rate_control_register();
3904         if (ret) {
3905                 printk(KERN_ERR DRV_NAME
3906                        "Unable to register rate control algorithm: %d\n", ret);
3907                 return ret;
3908         }
3909
3910         ret = pci_register_driver(&iwl_driver);
3911         if (ret) {
3912                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3913                 goto error_register;
3914         }
3915
3916         return ret;
3917
3918 error_register:
3919         iwlagn_rate_control_unregister();
3920         return ret;
3921 }
3922
3923 static void __exit iwl_exit(void)
3924 {
3925         pci_unregister_driver(&iwl_driver);
3926         iwlagn_rate_control_unregister();
3927 }
3928
3929 module_exit(iwl_exit);
3930 module_init(iwl_init);
3931
3932 #ifdef CONFIG_IWLWIFI_DEBUG
3933 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3934 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3935 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3936 MODULE_PARM_DESC(debug, "debug output mask");
3937 #endif
3938