drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/init.h>
  35 #include <linux/pci.h>
  36 #include <linux/slab.h>
  37 #include <linux/dma-mapping.h>
  38 #include <linux/delay.h>
  39 #include <linux/sched.h>
  40 #include <linux/skbuff.h>
  41 #include <linux/netdevice.h>
  42 #include <linux/wireless.h>
  43 #include <linux/firmware.h>
  44 #include <linux/etherdevice.h>
  45 #include <linux/if_arp.h>
  46
  47 #include <net/mac80211.h>
  48
  49 #include <asm/div64.h>
  50
  51 #define DRV_NAME        "iwlagn"
  52
  53 #include "iwl-eeprom.h"
  54 #include "iwl-dev.h"
  55 #include "iwl-core.h"
  56 #include "iwl-io.h"
  57 #include "iwl-helpers.h"
  58 #include "iwl-sta.h"
  59 #include "iwl-calib.h"
  60 #include "iwl-agn.h"
  61
  62
  63 /******************************************************************************
  64  *
  65  * module boiler plate
  66  *
  67  ******************************************************************************/
  68
  69 /*
  70  * module name, copyright, version, etc.
  71  */
  72 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  73
  74 #ifdef CONFIG_IWLWIFI_DEBUG
  75 #define VD "d"
  76 #else
  77 #define VD
  78 #endif
  79
  80 #define DRV_VERSION     IWLWIFI_VERSION VD
  81
  82
  83 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  84 MODULE_VERSION(DRV_VERSION);
  85 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  86 MODULE_LICENSE("GPL");
  87 MODULE_ALIAS("iwl4965");
  88
  89 /**
  90  * iwl_commit_rxon - commit staging_rxon to hardware
  91  *
  92  * The RXON command in staging_rxon is committed to the hardware and
  93  * the active_rxon structure is updated with the new data.  This
  94  * function correctly transitions out of the RXON_ASSOC_MSK state if
  95  * a HW tune is required based on the RXON structure changes.
  96  */
  97 int iwl_commit_rxon(struct iwl_priv *priv)
  98 {
  99         /* cast away the const for active_rxon in this function */
 100         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
 101         int ret;
 102         bool new_assoc =
 103                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 104
 105         if (!iwl_is_alive(priv))
 106                 return -EBUSY;
 107
 108         /* always get timestamp with Rx frame */
 109         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 110
 111         ret = iwl_check_rxon_cmd(priv);
 112         if (ret) {
 113                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 114                 return -EINVAL;
 115         }
 116
 117         /*
 118          * receive commit_rxon request
 119          * abort any previous channel switch if still in process
 120          */
 121         if (priv->switch_rxon.switch_in_progress &&
 122             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 123                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 124                       le16_to_cpu(priv->switch_rxon.channel));
 125                 iwl_chswitch_done(priv, false);
 126         }
 127
 128         /* If we don't need to send a full RXON, we can use
 129          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 130          * and other flags for the current radio configuration. */
 131         if (!iwl_full_rxon_required(priv)) {
 132                 ret = iwl_send_rxon_assoc(priv);
 133                 if (ret) {
 134                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 135                         return ret;
 136                 }
 137
 138                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 139                 iwl_print_rx_config_cmd(priv);
 140                 return 0;
 141         }
 142
 143         /* If we are currently associated and the new config requires
 144          * an RXON_ASSOC and the new config wants the associated mask enabled,
 145          * we must clear the associated from the active configuration
 146          * before we apply the new config */
 147         if (iwl_is_associated(priv) && new_assoc) {
 148                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 149                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 150
 151                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 152                                       sizeof(struct iwl_rxon_cmd),
 153                                       &priv->active_rxon);
 154
 155                 /* If the mask clearing failed then we set
 156                  * active_rxon back to what it was previously */
 157                 if (ret) {
 158                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 159                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 160                         return ret;
 161                 }
 162                 iwl_clear_ucode_stations(priv);
 163                 iwl_restore_stations(priv);
 164                 ret = iwl_restore_default_wep_keys(priv);
 165                 if (ret) {
 166                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 167                         return ret;
 168                 }
 169         }
 170
 171         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 172                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 173                        "* channel = %d\n"
 174                        "* bssid = %pM\n",
 175                        (new_assoc ? "" : "out"),
 176                        le16_to_cpu(priv->staging_rxon.channel),
 177                        priv->staging_rxon.bssid_addr);
 178
 179         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 180
 181         /* Apply the new configuration
 182          * RXON unassoc clears the station table in uCode so restoration of
 183          * stations is needed after it (the RXON command) completes
 184          */
 185         if (!new_assoc) {
 186                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 187                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 188                 if (ret) {
 189                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 190                         return ret;
 191                 }
 192                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
 193                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 194                 iwl_clear_ucode_stations(priv);
 195                 iwl_restore_stations(priv);
 196                 ret = iwl_restore_default_wep_keys(priv);
 197                 if (ret) {
 198                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 199                         return ret;
 200                 }
 201         }
 202
 203         priv->start_calib = 0;
 204         if (new_assoc) {
 205                 /*
 206                  * allow CTS-to-self if possible for new association.
 207                  * this is relevant only for 5000 series and up,
 208                  * but will not damage 4965
 209                  */
 210                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 211
 212                 /* Apply the new configuration
 213                  * RXON assoc doesn't clear the station table in uCode,
 214                  */
 215                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 216                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 217                 if (ret) {
 218                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 219                         return ret;
 220                 }
 221                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 222         }
 223         iwl_print_rx_config_cmd(priv);
 224
 225         iwl_init_sensitivity(priv);
 226
 227         /* If we issue a new RXON command which required a tune then we must
 228          * send a new TXPOWER command or we won't be able to Tx any frames */
 229         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 230         if (ret) {
 231                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 232                 return ret;
 233         }
 234
 235         return 0;
 236 }
 237
 238 void iwl_update_chain_flags(struct iwl_priv *priv)
 239 {
 240
 241         if (priv->cfg->ops->hcmd->set_rxon_chain)
 242                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 243         iwlcore_commit_rxon(priv);
 244 }
 245
 246 static void iwl_clear_free_frames(struct iwl_priv *priv)
 247 {
 248         struct list_head *element;
 249
 250         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 251                        priv->frames_count);
 252
 253         while (!list_empty(&priv->free_frames)) {
 254                 element = priv->free_frames.next;
 255                 list_del(element);
 256                 kfree(list_entry(element, struct iwl_frame, list));
 257                 priv->frames_count--;
 258         }
 259
 260         if (priv->frames_count) {
 261                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 262                             priv->frames_count);
 263                 priv->frames_count = 0;
 264         }
 265 }
 266
 267 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 268 {
 269         struct iwl_frame *frame;
 270         struct list_head *element;
 271         if (list_empty(&priv->free_frames)) {
 272                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 273                 if (!frame) {
 274                         IWL_ERR(priv, "Could not allocate frame!\n");
 275                         return NULL;
 276                 }
 277
 278                 priv->frames_count++;
 279                 return frame;
 280         }
 281
 282         element = priv->free_frames.next;
 283         list_del(element);
 284         return list_entry(element, struct iwl_frame, list);
 285 }
 286
 287 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 288 {
 289         memset(frame, 0, sizeof(*frame));
 290         list_add(&frame->list, &priv->free_frames);
 291 }
 292
 293 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 294                                           struct ieee80211_hdr *hdr,
 295                                           int left)
 296 {
 297         if (!priv->ibss_beacon)
 298                 return 0;
 299
 300         if (priv->ibss_beacon->len > left)
 301                 return 0;
 302
 303         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 304
 305         return priv->ibss_beacon->len;
 306 }
 307
 308 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 309 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 310                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 311                 u8 *beacon, u32 frame_size)
 312 {
 313         u16 tim_idx;
 314         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 315
 316         /*
 317          * The index is relative to frame start but we start looking at the
 318          * variable-length part of the beacon.
 319          */
 320         tim_idx = mgmt->u.beacon.variable - beacon;
 321
 322         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 323         while ((tim_idx < (frame_size - 2)) &&
 324                         (beacon[tim_idx] != WLAN_EID_TIM))
 325                 tim_idx += beacon[tim_idx+1] + 2;
 326
 327         /* If TIM field was found, set variables */
 328         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 329                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 330                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 331         } else
 332                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 333 }
 334
 335 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 336                                        struct iwl_frame *frame)
 337 {
 338         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 339         u32 frame_size;
 340         u32 rate_flags;
 341         u32 rate;
 342         /*
 343          * We have to set up the TX command, the TX Beacon command, and the
 344          * beacon contents.
 345          */
 346
 347         /* Initialize memory */
 348         tx_beacon_cmd = &frame->u.beacon;
 349         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 350
 351         /* Set up TX beacon contents */
 352         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 353                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 354         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 355                 return 0;
 356
 357         /* Set up TX command fields */
 358         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 359         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 360         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 361         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 362                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 363
 364         /* Set up TX beacon command fields */
 365         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 366                         frame_size);
 367
 368         /* Set up packet rate and flags */
 369         rate = iwl_rate_get_lowest_plcp(priv);
 370         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
 371                                               priv->hw_params.valid_tx_ant);
 372         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 373         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 374                 rate_flags |= RATE_MCS_CCK_MSK;
 375         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 376                         rate_flags);
 377
 378         return sizeof(*tx_beacon_cmd) + frame_size;
 379 }
 380 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 381 {
 382         struct iwl_frame *frame;
 383         unsigned int frame_size;
 384         int rc;
 385
 386         frame = iwl_get_free_frame(priv);
 387         if (!frame) {
 388                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 389                           "command.\n");
 390                 return -ENOMEM;
 391         }
 392
 393         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 394         if (!frame_size) {
 395                 IWL_ERR(priv, "Error configuring the beacon command\n");
 396                 iwl_free_frame(priv, frame);
 397                 return -EINVAL;
 398         }
 399
 400         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 401                               &frame->u.cmd[0]);
 402
 403         iwl_free_frame(priv, frame);
 404
 405         return rc;
 406 }
 407
 408 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 409 {
 410         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 411
 412         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 413         if (sizeof(dma_addr_t) > sizeof(u32))
 414                 addr |=
 415                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 416
 417         return addr;
 418 }
 419
 420 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 421 {
 422         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 423
 424         return le16_to_cpu(tb->hi_n_len) >> 4;
 425 }
 426
 427 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 428                                   dma_addr_t addr, u16 len)
 429 {
 430         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 431         u16 hi_n_len = len << 4;
 432
 433         put_unaligned_le32(addr, &tb->lo);
 434         if (sizeof(dma_addr_t) > sizeof(u32))
 435                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 436
 437         tb->hi_n_len = cpu_to_le16(hi_n_len);
 438
 439         tfd->num_tbs = idx + 1;
 440 }
 441
 442 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 443 {
 444         return tfd->num_tbs & 0x1f;
 445 }
 446
 447 /**
 448  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 449  * @priv - driver private data
 450  * @txq - tx queue
 451  *
 452  * Does NOT advance any TFD circular buffer read/write indexes
 453  * Does NOT free the TFD itself (which is within circular buffer)
 454  */
 455 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 456 {
 457         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 458         struct iwl_tfd *tfd;
 459         struct pci_dev *dev = priv->pci_dev;
 460         int index = txq->q.read_ptr;
 461         int i;
 462         int num_tbs;
 463
 464         tfd = &tfd_tmp[index];
 465
 466         /* Sanity check on number of chunks */
 467         num_tbs = iwl_tfd_get_num_tbs(tfd);
 468
 469         if (num_tbs >= IWL_NUM_OF_TBS) {
 470                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 471                 /* @todo issue fatal error, it is quite serious situation */
 472                 return;
 473         }
 474
 475         /* Unmap tx_cmd */
 476         if (num_tbs)
 477                 pci_unmap_single(dev,
 478                                 dma_unmap_addr(&txq->meta[index], mapping),
 479                                 dma_unmap_len(&txq->meta[index], len),
 480                                 PCI_DMA_BIDIRECTIONAL);
 481
 482         /* Unmap chunks, if any. */
 483         for (i = 1; i < num_tbs; i++)
 484                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 485                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 486
 487         /* free SKB */
 488         if (txq->txb) {
 489                 struct sk_buff *skb;
 490
 491                 skb = txq->txb[txq->q.read_ptr].skb;
 492
 493                 /* can be called from irqs-disabled context */
 494                 if (skb) {
 495                         dev_kfree_skb_any(skb);
 496                         txq->txb[txq->q.read_ptr].skb = NULL;
 497                 }
 498         }
 499 }
 500
 501 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 502                                  struct iwl_tx_queue *txq,
 503                                  dma_addr_t addr, u16 len,
 504                                  u8 reset, u8 pad)
 505 {
 506         struct iwl_queue *q;
 507         struct iwl_tfd *tfd, *tfd_tmp;
 508         u32 num_tbs;
 509
 510         q = &txq->q;
 511         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 512         tfd = &tfd_tmp[q->write_ptr];
 513
 514         if (reset)
 515                 memset(tfd, 0, sizeof(*tfd));
 516
 517         num_tbs = iwl_tfd_get_num_tbs(tfd);
 518
 519         /* Each TFD can point to a maximum 20 Tx buffers */
 520         if (num_tbs >= IWL_NUM_OF_TBS) {
 521                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 522                           IWL_NUM_OF_TBS);
 523                 return -EINVAL;
 524         }
 525
 526         BUG_ON(addr & ~DMA_BIT_MASK(36));
 527         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 528                 IWL_ERR(priv, "Unaligned address = %llx\n",
 529                           (unsigned long long)addr);
 530
 531         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 532
 533         return 0;
 534 }
 535
 536 /*
 537  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 538  * given Tx queue, and enable the DMA channel used for that queue.
 539  *
 540  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 541  * channels supported in hardware.
 542  */
 543 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 544                          struct iwl_tx_queue *txq)
 545 {
 546         int txq_id = txq->q.id;
 547
 548         /* Circular buffer (TFD queue in DRAM) physical base address */
 549         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 550                              txq->q.dma_addr >> 8);
 551
 552         return 0;
 553 }
 554
 555 /******************************************************************************
 556  *
 557  * Generic RX handler implementations
 558  *
 559  ******************************************************************************/
 560 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 561                                 struct iwl_rx_mem_buffer *rxb)
 562 {
 563         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 564         struct iwl_alive_resp *palive;
 565         struct delayed_work *pwork;
 566
 567         palive = &pkt->u.alive_frame;
 568
 569         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 570                        "0x%01X 0x%01X\n",
 571                        palive->is_valid, palive->ver_type,
 572                        palive->ver_subtype);
 573
 574         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 575                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 576                 memcpy(&priv->card_alive_init,
 577                        &pkt->u.alive_frame,
 578                        sizeof(struct iwl_init_alive_resp));
 579                 pwork = &priv->init_alive_start;
 580         } else {
 581                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 582                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 583                        sizeof(struct iwl_alive_resp));
 584                 pwork = &priv->alive_start;
 585         }
 586
 587         /* We delay the ALIVE response by 5ms to
 588          * give the HW RF Kill time to activate... */
 589         if (palive->is_valid == UCODE_VALID_OK)
 590                 queue_delayed_work(priv->workqueue, pwork,
 591                                    msecs_to_jiffies(5));
 592         else
 593                 IWL_WARN(priv, "uCode did not respond OK.\n");
 594 }
 595
 596 static void iwl_bg_beacon_update(struct work_struct *work)
 597 {
 598         struct iwl_priv *priv =
 599                 container_of(work, struct iwl_priv, beacon_update);
 600         struct sk_buff *beacon;
 601
 602         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 603         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 604
 605         if (!beacon) {
 606                 IWL_ERR(priv, "update beacon failed\n");
 607                 return;
 608         }
 609
 610         mutex_lock(&priv->mutex);
 611         /* new beacon skb is allocated every time; dispose previous.*/
 612         if (priv->ibss_beacon)
 613                 dev_kfree_skb(priv->ibss_beacon);
 614
 615         priv->ibss_beacon = beacon;
 616         mutex_unlock(&priv->mutex);
 617
 618         iwl_send_beacon_cmd(priv);
 619 }
 620
 621 /**
 622  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 623  *
 624  * This callback is provided in order to send a statistics request.
 625  *
 626  * This timer function is continually reset to execute within
 627  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 628  * was received.  We need to ensure we receive the statistics in order
 629  * to update the temperature used for calibrating the TXPOWER.
 630  */
 631 static void iwl_bg_statistics_periodic(unsigned long data)
 632 {
 633         struct iwl_priv *priv = (struct iwl_priv *)data;
 634
 635         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 636                 return;
 637
 638         /* dont send host command if rf-kill is on */
 639         if (!iwl_is_ready_rf(priv))
 640                 return;
 641
 642         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 643 }
 644
 645
 646 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 647                                         u32 start_idx, u32 num_events,
 648                                         u32 mode)
 649 {
 650         u32 i;
 651         u32 ptr;        /* SRAM byte address of log data */
 652         u32 ev, time, data; /* event log data */
 653         unsigned long reg_flags;
 654
 655         if (mode == 0)
 656                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 657         else
 658                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 659
 660         /* Make sure device is powered up for SRAM reads */
 661         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 662         if (iwl_grab_nic_access(priv)) {
 663                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 664                 return;
 665         }
 666
 667         /* Set starting address; reads will auto-increment */
 668         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 669         rmb();
 670
 671         /*
 672          * "time" is actually "data" for mode 0 (no timestamp).
 673          * place event id # at far right for easier visual parsing.
 674          */
 675         for (i = 0; i < num_events; i++) {
 676                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 677                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 678                 if (mode == 0) {
 679                         trace_iwlwifi_dev_ucode_cont_event(priv,
 680                                                         0, time, ev);
 681                 } else {
 682                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 683                         trace_iwlwifi_dev_ucode_cont_event(priv,
 684                                                 time, data, ev);
 685                 }
 686         }
 687         /* Allow device to power down */
 688         iwl_release_nic_access(priv);
 689         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 690 }
 691
 692 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 693 {
 694         u32 capacity;   /* event log capacity in # entries */
 695         u32 base;       /* SRAM byte address of event log header */
 696         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 697         u32 num_wraps;  /* # times uCode wrapped to top of log */
 698         u32 next_entry; /* index of next entry to be written by uCode */
 699
 700         if (priv->ucode_type == UCODE_INIT)
 701                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 702         else
 703                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 704         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 705                 capacity = iwl_read_targ_mem(priv, base);
 706                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 707                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 708                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 709         } else
 710                 return;
 711
 712         if (num_wraps == priv->event_log.num_wraps) {
 713                 iwl_print_cont_event_trace(priv,
 714                                        base, priv->event_log.next_entry,
 715                                        next_entry - priv->event_log.next_entry,
 716                                        mode);
 717                 priv->event_log.non_wraps_count++;
 718         } else {
 719                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 720                         priv->event_log.wraps_more_count++;
 721                 else
 722                         priv->event_log.wraps_once_count++;
 723                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 724                                 num_wraps - priv->event_log.num_wraps,
 725                                 next_entry, priv->event_log.next_entry);
 726                 if (next_entry < priv->event_log.next_entry) {
 727                         iwl_print_cont_event_trace(priv, base,
 728                                priv->event_log.next_entry,
 729                                capacity - priv->event_log.next_entry,
 730                                mode);
 731
 732                         iwl_print_cont_event_trace(priv, base, 0,
 733                                 next_entry, mode);
 734                 } else {
 735                         iwl_print_cont_event_trace(priv, base,
 736                                next_entry, capacity - next_entry,
 737                                mode);
 738
 739                         iwl_print_cont_event_trace(priv, base, 0,
 740                                 next_entry, mode);
 741                 }
 742         }
 743         priv->event_log.num_wraps = num_wraps;
 744         priv->event_log.next_entry = next_entry;
 745 }
 746
 747 /**
 748  * iwl_bg_ucode_trace - Timer callback to log ucode event
 749  *
 750  * The timer is continually set to execute every
 751  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 752  * this function is to perform continuous uCode event logging operation
 753  * if enabled
 754  */
 755 static void iwl_bg_ucode_trace(unsigned long data)
 756 {
 757         struct iwl_priv *priv = (struct iwl_priv *)data;
 758
 759         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 760                 return;
 761
 762         if (priv->event_log.ucode_trace) {
 763                 iwl_continuous_event_trace(priv);
 764                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 765                 mod_timer(&priv->ucode_trace,
 766                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 767         }
 768 }
 769
 770 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 771                                 struct iwl_rx_mem_buffer *rxb)
 772 {
 773 #ifdef CONFIG_IWLWIFI_DEBUG
 774         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 775         struct iwl4965_beacon_notif *beacon =
 776                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 777         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 778
 779         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 780                 "tsf %d %d rate %d\n",
 781                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 782                 beacon->beacon_notify_hdr.failure_frame,
 783                 le32_to_cpu(beacon->ibss_mgr_status),
 784                 le32_to_cpu(beacon->high_tsf),
 785                 le32_to_cpu(beacon->low_tsf), rate);
 786 #endif
 787
 788         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 789             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 790                 queue_work(priv->workqueue, &priv->beacon_update);
 791 }
 792
 793 /* Handle notification from uCode that card's power state is changing
 794  * due to software, hardware, or critical temperature RFKILL */
 795 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 796                                     struct iwl_rx_mem_buffer *rxb)
 797 {
 798         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 799         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 800         unsigned long status = priv->status;
 801
 802         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 803                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 804                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 805                           (flags & CT_CARD_DISABLED) ?
 806                           "Reached" : "Not reached");
 807
 808         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 809                      CT_CARD_DISABLED)) {
 810
 811                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 812                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 813
 814                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 815                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 816
 817                 if (!(flags & RXON_CARD_DISABLED)) {
 818                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 819                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 820                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 821                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 822                 }
 823                 if (flags & CT_CARD_DISABLED)
 824                         iwl_tt_enter_ct_kill(priv);
 825         }
 826         if (!(flags & CT_CARD_DISABLED))
 827                 iwl_tt_exit_ct_kill(priv);
 828
 829         if (flags & HW_CARD_DISABLED)
 830                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 831         else
 832                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 833
 834
 835         if (!(flags & RXON_CARD_DISABLED))
 836                 iwl_scan_cancel(priv);
 837
 838         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 839              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 840                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 841                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 842         else
 843                 wake_up_interruptible(&priv->wait_command_queue);
 844 }
 845
 846 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 847 {
 848         if (src == IWL_PWR_SRC_VAUX) {
 849                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 850                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 851                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 852                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 853         } else {
 854                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 855                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 856                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 857         }
 858
 859         return 0;
 860 }
 861
 862 static void iwl_bg_tx_flush(struct work_struct *work)
 863 {
 864         struct iwl_priv *priv =
 865                 container_of(work, struct iwl_priv, tx_flush);
 866
 867         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 868                 return;
 869
 870         /* do nothing if rf-kill is on */
 871         if (!iwl_is_ready_rf(priv))
 872                 return;
 873
 874         if (priv->cfg->ops->lib->txfifo_flush) {
 875                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
 876                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
 877         }
 878 }
 879
 880 /**
 881  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 882  *
 883  * Setup the RX handlers for each of the reply types sent from the uCode
 884  * to the host.
 885  *
 886  * This function chains into the hardware specific files for them to setup
 887  * any hardware specific handlers as well.
 888  */
 889 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 890 {
 891         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 892         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 893         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 894         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 895                         iwl_rx_spectrum_measure_notif;
 896         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 897         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 898             iwl_rx_pm_debug_statistics_notif;
 899         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 900
 901         /*
 902          * The same handler is used for both the REPLY to a discrete
 903          * statistics request from the host as well as for the periodic
 904          * statistics notifications (after received beacons) from the uCode.
 905          */
 906         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 907         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 908
 909         iwl_setup_rx_scan_handlers(priv);
 910
 911         /* status change handler */
 912         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 913
 914         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 915             iwl_rx_missed_beacon_notif;
 916         /* Rx handlers */
 917         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 918         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 919         /* block ack */
 920         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 921         /* Set up hardware specific Rx handlers */
 922         priv->cfg->ops->lib->rx_handler_setup(priv);
 923 }
 924
 925 /**
 926  * iwl_rx_handle - Main entry function for receiving responses from uCode
 927  *
 928  * Uses the priv->rx_handlers callback function array to invoke
 929  * the appropriate handlers, including command responses,
 930  * frame-received notifications, and other notifications.
 931  */
 932 void iwl_rx_handle(struct iwl_priv *priv)
 933 {
 934         struct iwl_rx_mem_buffer *rxb;
 935         struct iwl_rx_packet *pkt;
 936         struct iwl_rx_queue *rxq = &priv->rxq;
 937         u32 r, i;
 938         int reclaim;
 939         unsigned long flags;
 940         u8 fill_rx = 0;
 941         u32 count = 8;
 942         int total_empty;
 943
 944         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 945          * buffer that the driver may process (last buffer filled by ucode). */
 946         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 947         i = rxq->read;
 948
 949         /* Rx interrupt, but nothing sent from uCode */
 950         if (i == r)
 951                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 952
 953         /* calculate total frames need to be restock after handling RX */
 954         total_empty = r - rxq->write_actual;
 955         if (total_empty < 0)
 956                 total_empty += RX_QUEUE_SIZE;
 957
 958         if (total_empty > (RX_QUEUE_SIZE / 2))
 959                 fill_rx = 1;
 960
 961         while (i != r) {
 962                 int len;
 963
 964                 rxb = rxq->queue[i];
 965
 966                 /* If an RXB doesn't have a Rx queue slot associated with it,
 967                  * then a bug has been introduced in the queue refilling
 968                  * routines -- catch it here */
 969                 BUG_ON(rxb == NULL);
 970
 971                 rxq->queue[i] = NULL;
 972
 973                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 974                                PAGE_SIZE << priv->hw_params.rx_page_order,
 975                                PCI_DMA_FROMDEVICE);
 976                 pkt = rxb_addr(rxb);
 977
 978                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 979                 len += sizeof(u32); /* account for status word */
 980                 trace_iwlwifi_dev_rx(priv, pkt, len);
 981
 982                 /* Reclaim a command buffer only if this packet is a response
 983                  *   to a (driver-originated) command.
 984                  * If the packet (e.g. Rx frame) originated from uCode,
 985                  *   there is no command buffer to reclaim.
 986                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 987                  *   but apparently a few don't get set; catch them here. */
 988                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 989                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 990                         (pkt->hdr.cmd != REPLY_RX) &&
 991                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 992                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 993                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 994                         (pkt->hdr.cmd != REPLY_TX);
 995
 996                 /* Based on type of command response or notification,
 997                  *   handle those that need handling via function in
 998                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 999                 if (priv->rx_handlers[pkt->hdr.cmd]) {
1000                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
1001                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1002                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1003                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1004                 } else {
1005                         /* No handling needed */
1006                         IWL_DEBUG_RX(priv,
1007                                 "r %d i %d No handler needed for %s, 0x%02x\n",
1008                                 r, i, get_cmd_string(pkt->hdr.cmd),
1009                                 pkt->hdr.cmd);
1010                 }
1011
1012                 /*
1013                  * XXX: After here, we should always check rxb->page
1014                  * against NULL before touching it or its virtual
1015                  * memory (pkt). Because some rx_handler might have
1016                  * already taken or freed the pages.
1017                  */
1018
1019                 if (reclaim) {
1020                         /* Invoke any callbacks, transfer the buffer to caller,
1021                          * and fire off the (possibly) blocking iwl_send_cmd()
1022                          * as we reclaim the driver command queue */
1023                         if (rxb->page)
1024                                 iwl_tx_cmd_complete(priv, rxb);
1025                         else
1026                                 IWL_WARN(priv, "Claim null rxb?\n");
1027                 }
1028
1029                 /* Reuse the page if possible. For notification packets and
1030                  * SKBs that fail to Rx correctly, add them back into the
1031                  * rx_free list for reuse later. */
1032                 spin_lock_irqsave(&rxq->lock, flags);
1033                 if (rxb->page != NULL) {
1034                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1035                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1036                                 PCI_DMA_FROMDEVICE);
1037                         list_add_tail(&rxb->list, &rxq->rx_free);
1038                         rxq->free_count++;
1039                 } else
1040                         list_add_tail(&rxb->list, &rxq->rx_used);
1041
1042                 spin_unlock_irqrestore(&rxq->lock, flags);
1043
1044                 i = (i + 1) & RX_QUEUE_MASK;
1045                 /* If there are a lot of unused frames,
1046                  * restock the Rx queue so ucode wont assert. */
1047                 if (fill_rx) {
1048                         count++;
1049                         if (count >= 8) {
1050                                 rxq->read = i;
1051                                 iwlagn_rx_replenish_now(priv);
1052                                 count = 0;
1053                         }
1054                 }
1055         }
1056
1057         /* Backtrack one entry */
1058         rxq->read = i;
1059         if (fill_rx)
1060                 iwlagn_rx_replenish_now(priv);
1061         else
1062                 iwlagn_rx_queue_restock(priv);
1063 }
1064
1065 /* call this function to flush any scheduled tasklet */
1066 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1067 {
1068         /* wait to make sure we flush pending tasklet*/
1069         synchronize_irq(priv->pci_dev->irq);
1070         tasklet_kill(&priv->irq_tasklet);
1071 }
1072
1073 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1074 {
1075         u32 inta, handled = 0;
1076         u32 inta_fh;
1077         unsigned long flags;
1078         u32 i;
1079 #ifdef CONFIG_IWLWIFI_DEBUG
1080         u32 inta_mask;
1081 #endif
1082
1083         spin_lock_irqsave(&priv->lock, flags);
1084
1085         /* Ack/clear/reset pending uCode interrupts.
1086          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1087          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1088         inta = iwl_read32(priv, CSR_INT);
1089         iwl_write32(priv, CSR_INT, inta);
1090
1091         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1092          * Any new interrupts that happen after this, either while we're
1093          * in this tasklet, or later, will show up in next ISR/tasklet. */
1094         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1095         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1096
1097 #ifdef CONFIG_IWLWIFI_DEBUG
1098         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1099                 /* just for debug */
1100                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1101                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1102                               inta, inta_mask, inta_fh);
1103         }
1104 #endif
1105
1106         spin_unlock_irqrestore(&priv->lock, flags);
1107
1108         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1109          * atomic, make sure that inta covers all the interrupts that
1110          * we've discovered, even if FH interrupt came in just after
1111          * reading CSR_INT. */
1112         if (inta_fh & CSR49_FH_INT_RX_MASK)
1113                 inta |= CSR_INT_BIT_FH_RX;
1114         if (inta_fh & CSR49_FH_INT_TX_MASK)
1115                 inta |= CSR_INT_BIT_FH_TX;
1116
1117         /* Now service all interrupt bits discovered above. */
1118         if (inta & CSR_INT_BIT_HW_ERR) {
1119                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1120
1121                 /* Tell the device to stop sending interrupts */
1122                 iwl_disable_interrupts(priv);
1123
1124                 priv->isr_stats.hw++;
1125                 iwl_irq_handle_error(priv);
1126
1127                 handled |= CSR_INT_BIT_HW_ERR;
1128
1129                 return;
1130         }
1131
1132 #ifdef CONFIG_IWLWIFI_DEBUG
1133         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1134                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1135                 if (inta & CSR_INT_BIT_SCD) {
1136                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1137                                       "the frame/frames.\n");
1138                         priv->isr_stats.sch++;
1139                 }
1140
1141                 /* Alive notification via Rx interrupt will do the real work */
1142                 if (inta & CSR_INT_BIT_ALIVE) {
1143                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1144                         priv->isr_stats.alive++;
1145                 }
1146         }
1147 #endif
1148         /* Safely ignore these bits for debug checks below */
1149         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1150
1151         /* HW RF KILL switch toggled */
1152         if (inta & CSR_INT_BIT_RF_KILL) {
1153                 int hw_rf_kill = 0;
1154                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1155                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1156                         hw_rf_kill = 1;
1157
1158                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1159                                 hw_rf_kill ? "disable radio" : "enable radio");
1160
1161                 priv->isr_stats.rfkill++;
1162
1163                 /* driver only loads ucode once setting the interface up.
1164                  * the driver allows loading the ucode even if the radio
1165                  * is killed. Hence update the killswitch state here. The
1166                  * rfkill handler will care about restarting if needed.
1167                  */
1168                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1169                         if (hw_rf_kill)
1170                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1171                         else
1172                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1173                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1174                 }
1175
1176                 handled |= CSR_INT_BIT_RF_KILL;
1177         }
1178
1179         /* Chip got too hot and stopped itself */
1180         if (inta & CSR_INT_BIT_CT_KILL) {
1181                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1182                 priv->isr_stats.ctkill++;
1183                 handled |= CSR_INT_BIT_CT_KILL;
1184         }
1185
1186         /* Error detected by uCode */
1187         if (inta & CSR_INT_BIT_SW_ERR) {
1188                 IWL_ERR(priv, "Microcode SW error detected. "
1189                         " Restarting 0x%X.\n", inta);
1190                 priv->isr_stats.sw++;
1191                 priv->isr_stats.sw_err = inta;
1192                 iwl_irq_handle_error(priv);
1193                 handled |= CSR_INT_BIT_SW_ERR;
1194         }
1195
1196         /*
1197          * uCode wakes up after power-down sleep.
1198          * Tell device about any new tx or host commands enqueued,
1199          * and about any Rx buffers made available while asleep.
1200          */
1201         if (inta & CSR_INT_BIT_WAKEUP) {
1202                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1203                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1204                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1205                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1206                 priv->isr_stats.wakeup++;
1207                 handled |= CSR_INT_BIT_WAKEUP;
1208         }
1209
1210         /* All uCode command responses, including Tx command responses,
1211          * Rx "responses" (frame-received notification), and other
1212          * notifications from uCode come through here*/
1213         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1214                 iwl_rx_handle(priv);
1215                 priv->isr_stats.rx++;
1216                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1217         }
1218
1219         /* This "Tx" DMA channel is used only for loading uCode */
1220         if (inta & CSR_INT_BIT_FH_TX) {
1221                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1222                 priv->isr_stats.tx++;
1223                 handled |= CSR_INT_BIT_FH_TX;
1224                 /* Wake up uCode load routine, now that load is complete */
1225                 priv->ucode_write_complete = 1;
1226                 wake_up_interruptible(&priv->wait_command_queue);
1227         }
1228
1229         if (inta & ~handled) {
1230                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1231                 priv->isr_stats.unhandled++;
1232         }
1233
1234         if (inta & ~(priv->inta_mask)) {
1235                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1236                          inta & ~priv->inta_mask);
1237                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1238         }
1239
1240         /* Re-enable all interrupts */
1241         /* only Re-enable if diabled by irq */
1242         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1243                 iwl_enable_interrupts(priv);
1244
1245 #ifdef CONFIG_IWLWIFI_DEBUG
1246         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1247                 inta = iwl_read32(priv, CSR_INT);
1248                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1249                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1250                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1251                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1252         }
1253 #endif
1254 }
1255
1256 /* tasklet for iwlagn interrupt */
1257 static void iwl_irq_tasklet(struct iwl_priv *priv)
1258 {
1259         u32 inta = 0;
1260         u32 handled = 0;
1261         unsigned long flags;
1262         u32 i;
1263 #ifdef CONFIG_IWLWIFI_DEBUG
1264         u32 inta_mask;
1265 #endif
1266
1267         spin_lock_irqsave(&priv->lock, flags);
1268
1269         /* Ack/clear/reset pending uCode interrupts.
1270          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1271          */
1272         /* There is a hardware bug in the interrupt mask function that some
1273          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1274          * they are disabled in the CSR_INT_MASK register. Furthermore the
1275          * ICT interrupt handling mechanism has another bug that might cause
1276          * these unmasked interrupts fail to be detected. We workaround the
1277          * hardware bugs here by ACKing all the possible interrupts so that
1278          * interrupt coalescing can still be achieved.
1279          */
1280         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1281
1282         inta = priv->_agn.inta;
1283
1284 #ifdef CONFIG_IWLWIFI_DEBUG
1285         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1286                 /* just for debug */
1287                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1288                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1289                                 inta, inta_mask);
1290         }
1291 #endif
1292
1293         spin_unlock_irqrestore(&priv->lock, flags);
1294
1295         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1296         priv->_agn.inta = 0;
1297
1298         /* Now service all interrupt bits discovered above. */
1299         if (inta & CSR_INT_BIT_HW_ERR) {
1300                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1301
1302                 /* Tell the device to stop sending interrupts */
1303                 iwl_disable_interrupts(priv);
1304
1305                 priv->isr_stats.hw++;
1306                 iwl_irq_handle_error(priv);
1307
1308                 handled |= CSR_INT_BIT_HW_ERR;
1309
1310                 return;
1311         }
1312
1313 #ifdef CONFIG_IWLWIFI_DEBUG
1314         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1315                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1316                 if (inta & CSR_INT_BIT_SCD) {
1317                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1318                                       "the frame/frames.\n");
1319                         priv->isr_stats.sch++;
1320                 }
1321
1322                 /* Alive notification via Rx interrupt will do the real work */
1323                 if (inta & CSR_INT_BIT_ALIVE) {
1324                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1325                         priv->isr_stats.alive++;
1326                 }
1327         }
1328 #endif
1329         /* Safely ignore these bits for debug checks below */
1330         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1331
1332         /* HW RF KILL switch toggled */
1333         if (inta & CSR_INT_BIT_RF_KILL) {
1334                 int hw_rf_kill = 0;
1335                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1336                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1337                         hw_rf_kill = 1;
1338
1339                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1340                                 hw_rf_kill ? "disable radio" : "enable radio");
1341
1342                 priv->isr_stats.rfkill++;
1343
1344                 /* driver only loads ucode once setting the interface up.
1345                  * the driver allows loading the ucode even if the radio
1346                  * is killed. Hence update the killswitch state here. The
1347                  * rfkill handler will care about restarting if needed.
1348                  */
1349                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1350                         if (hw_rf_kill)
1351                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1352                         else
1353                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1354                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1355                 }
1356
1357                 handled |= CSR_INT_BIT_RF_KILL;
1358         }
1359
1360         /* Chip got too hot and stopped itself */
1361         if (inta & CSR_INT_BIT_CT_KILL) {
1362                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1363                 priv->isr_stats.ctkill++;
1364                 handled |= CSR_INT_BIT_CT_KILL;
1365         }
1366
1367         /* Error detected by uCode */
1368         if (inta & CSR_INT_BIT_SW_ERR) {
1369                 IWL_ERR(priv, "Microcode SW error detected. "
1370                         " Restarting 0x%X.\n", inta);
1371                 priv->isr_stats.sw++;
1372                 priv->isr_stats.sw_err = inta;
1373                 iwl_irq_handle_error(priv);
1374                 handled |= CSR_INT_BIT_SW_ERR;
1375         }
1376
1377         /* uCode wakes up after power-down sleep */
1378         if (inta & CSR_INT_BIT_WAKEUP) {
1379                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1380                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1381                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1382                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1383
1384                 priv->isr_stats.wakeup++;
1385
1386                 handled |= CSR_INT_BIT_WAKEUP;
1387         }
1388
1389         /* All uCode command responses, including Tx command responses,
1390          * Rx "responses" (frame-received notification), and other
1391          * notifications from uCode come through here*/
1392         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1393                         CSR_INT_BIT_RX_PERIODIC)) {
1394                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1395                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1396                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1397                         iwl_write32(priv, CSR_FH_INT_STATUS,
1398                                         CSR49_FH_INT_RX_MASK);
1399                 }
1400                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1401                         handled |= CSR_INT_BIT_RX_PERIODIC;
1402                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1403                 }
1404                 /* Sending RX interrupt require many steps to be done in the
1405                  * the device:
1406                  * 1- write interrupt to current index in ICT table.
1407                  * 2- dma RX frame.
1408                  * 3- update RX shared data to indicate last write index.
1409                  * 4- send interrupt.
1410                  * This could lead to RX race, driver could receive RX interrupt
1411                  * but the shared data changes does not reflect this;
1412                  * periodic interrupt will detect any dangling Rx activity.
1413                  */
1414
1415                 /* Disable periodic interrupt; we use it as just a one-shot. */
1416                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1417                             CSR_INT_PERIODIC_DIS);
1418                 iwl_rx_handle(priv);
1419
1420                 /*
1421                  * Enable periodic interrupt in 8 msec only if we received
1422                  * real RX interrupt (instead of just periodic int), to catch
1423                  * any dangling Rx interrupt.  If it was just the periodic
1424                  * interrupt, there was no dangling Rx activity, and no need
1425                  * to extend the periodic interrupt; one-shot is enough.
1426                  */
1427                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1428                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1429                                     CSR_INT_PERIODIC_ENA);
1430
1431                 priv->isr_stats.rx++;
1432         }
1433
1434         /* This "Tx" DMA channel is used only for loading uCode */
1435         if (inta & CSR_INT_BIT_FH_TX) {
1436                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1437                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1438                 priv->isr_stats.tx++;
1439                 handled |= CSR_INT_BIT_FH_TX;
1440                 /* Wake up uCode load routine, now that load is complete */
1441                 priv->ucode_write_complete = 1;
1442                 wake_up_interruptible(&priv->wait_command_queue);
1443         }
1444
1445         if (inta & ~handled) {
1446                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1447                 priv->isr_stats.unhandled++;
1448         }
1449
1450         if (inta & ~(priv->inta_mask)) {
1451                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1452                          inta & ~priv->inta_mask);
1453         }
1454
1455         /* Re-enable all interrupts */
1456         /* only Re-enable if diabled by irq */
1457         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1458                 iwl_enable_interrupts(priv);
1459 }
1460
1461 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1462 #define ACK_CNT_RATIO (50)
1463 #define BA_TIMEOUT_CNT (5)
1464 #define BA_TIMEOUT_MAX (16)
1465
1466 /**
1467  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1468  *
1469  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1470  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1471  * operation state.
1472  */
1473 bool iwl_good_ack_health(struct iwl_priv *priv,
1474                                 struct iwl_rx_packet *pkt)
1475 {
1476         bool rc = true;
1477         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1478         int ba_timeout_delta;
1479
1480         actual_ack_cnt_delta =
1481                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1482                 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1483         expected_ack_cnt_delta =
1484                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1485                 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1486         ba_timeout_delta =
1487                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1488                 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1489         if ((priv->_agn.agg_tids_count > 0) &&
1490             (expected_ack_cnt_delta > 0) &&
1491             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1492                 < ACK_CNT_RATIO) &&
1493             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1494                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1495                                 " expected_ack_cnt = %d\n",
1496                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1497
1498 #ifdef CONFIG_IWLWIFI_DEBUGFS
1499                 /*
1500                  * This is ifdef'ed on DEBUGFS because otherwise the
1501                  * statistics aren't available. If DEBUGFS is set but
1502                  * DEBUG is not, these will just compile out.
1503                  */
1504                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1505                                 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1506                 IWL_DEBUG_RADIO(priv,
1507                                 "ack_or_ba_timeout_collision delta = %d\n",
1508                                 priv->_agn.delta_statistics.tx.
1509                                 ack_or_ba_timeout_collision);
1510 #endif
1511                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1512                                 ba_timeout_delta);
1513                 if (!actual_ack_cnt_delta &&
1514                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1515                         rc = false;
1516         }
1517         return rc;
1518 }
1519
1520
1521 /*****************************************************************************
1522  *
1523  * sysfs attributes
1524  *
1525  *****************************************************************************/
1526
1527 #ifdef CONFIG_IWLWIFI_DEBUG
1528
1529 /*
1530  * The following adds a new attribute to the sysfs representation
1531  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1532  * used for controlling the debug level.
1533  *
1534  * See the level definitions in iwl for details.
1535  *
1536  * The debug_level being managed using sysfs below is a per device debug
1537  * level that is used instead of the global debug level if it (the per
1538  * device debug level) is set.
1539  */
1540 static ssize_t show_debug_level(struct device *d,
1541                                 struct device_attribute *attr, char *buf)
1542 {
1543         struct iwl_priv *priv = dev_get_drvdata(d);
1544         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1545 }
1546 static ssize_t store_debug_level(struct device *d,
1547                                 struct device_attribute *attr,
1548                                  const char *buf, size_t count)
1549 {
1550         struct iwl_priv *priv = dev_get_drvdata(d);
1551         unsigned long val;
1552         int ret;
1553
1554         ret = strict_strtoul(buf, 0, &val);
1555         if (ret)
1556                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1557         else {
1558                 priv->debug_level = val;
1559                 if (iwl_alloc_traffic_mem(priv))
1560                         IWL_ERR(priv,
1561                                 "Not enough memory to generate traffic log\n");
1562         }
1563         return strnlen(buf, count);
1564 }
1565
1566 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1567                         show_debug_level, store_debug_level);
1568
1569
1570 #endif /* CONFIG_IWLWIFI_DEBUG */
1571
1572
1573 static ssize_t show_temperature(struct device *d,
1574                                 struct device_attribute *attr, char *buf)
1575 {
1576         struct iwl_priv *priv = dev_get_drvdata(d);
1577
1578         if (!iwl_is_alive(priv))
1579                 return -EAGAIN;
1580
1581         return sprintf(buf, "%d\n", priv->temperature);
1582 }
1583
1584 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1585
1586 static ssize_t show_tx_power(struct device *d,
1587                              struct device_attribute *attr, char *buf)
1588 {
1589         struct iwl_priv *priv = dev_get_drvdata(d);
1590
1591         if (!iwl_is_ready_rf(priv))
1592                 return sprintf(buf, "off\n");
1593         else
1594                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1595 }
1596
1597 static ssize_t store_tx_power(struct device *d,
1598                               struct device_attribute *attr,
1599                               const char *buf, size_t count)
1600 {
1601         struct iwl_priv *priv = dev_get_drvdata(d);
1602         unsigned long val;
1603         int ret;
1604
1605         ret = strict_strtoul(buf, 10, &val);
1606         if (ret)
1607                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1608         else {
1609                 ret = iwl_set_tx_power(priv, val, false);
1610                 if (ret)
1611                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1612                                 ret);
1613                 else
1614                         ret = count;
1615         }
1616         return ret;
1617 }
1618
1619 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1620
1621 static ssize_t show_rts_ht_protection(struct device *d,
1622                              struct device_attribute *attr, char *buf)
1623 {
1624         struct iwl_priv *priv = dev_get_drvdata(d);
1625
1626         return sprintf(buf, "%s\n",
1627                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
1628 }
1629
1630 static ssize_t store_rts_ht_protection(struct device *d,
1631                               struct device_attribute *attr,
1632                               const char *buf, size_t count)
1633 {
1634         struct iwl_priv *priv = dev_get_drvdata(d);
1635         unsigned long val;
1636         int ret;
1637
1638         ret = strict_strtoul(buf, 10, &val);
1639         if (ret)
1640                 IWL_INFO(priv, "Input is not in decimal form.\n");
1641         else {
1642                 if (!iwl_is_associated(priv))
1643                         priv->cfg->use_rts_for_ht = val ? true : false;
1644                 else
1645                         IWL_ERR(priv, "Sta associated with AP - "
1646                                 "Change protection mechanism is not allowed\n");
1647                 ret = count;
1648         }
1649         return ret;
1650 }
1651
1652 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
1653                         show_rts_ht_protection, store_rts_ht_protection);
1654
1655
1656 static struct attribute *iwl_sysfs_entries[] = {
1657         &dev_attr_temperature.attr,
1658         &dev_attr_tx_power.attr,
1659         &dev_attr_rts_ht_protection.attr,
1660 #ifdef CONFIG_IWLWIFI_DEBUG
1661         &dev_attr_debug_level.attr,
1662 #endif
1663         NULL
1664 };
1665
1666 static struct attribute_group iwl_attribute_group = {
1667         .name = NULL,           /* put in device directory */
1668         .attrs = iwl_sysfs_entries,
1669 };
1670
1671 /******************************************************************************
1672  *
1673  * uCode download functions
1674  *
1675  ******************************************************************************/
1676
1677 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1678 {
1679         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1680         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1681         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1682         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1683         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1684         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1685 }
1686
1687 static void iwl_nic_start(struct iwl_priv *priv)
1688 {
1689         /* Remove all resets to allow NIC to operate */
1690         iwl_write32(priv, CSR_RESET, 0);
1691 }
1692
1693 struct iwlagn_ucode_capabilities {
1694         u32 max_probe_length;
1695         u32 standard_phy_calibration_size;
1696 };
1697
1698 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1699 static int iwl_mac_setup_register(struct iwl_priv *priv,
1700                                   struct iwlagn_ucode_capabilities *capa);
1701
1702 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1703 {
1704         const char *name_pre = priv->cfg->fw_name_pre;
1705
1706         if (first)
1707                 priv->fw_index = priv->cfg->ucode_api_max;
1708         else
1709                 priv->fw_index--;
1710
1711         if (priv->fw_index < priv->cfg->ucode_api_min) {
1712                 IWL_ERR(priv, "no suitable firmware found!\n");
1713                 return -ENOENT;
1714         }
1715
1716         sprintf(priv->firmware_name, "%s%d%s",
1717                 name_pre, priv->fw_index, ".ucode");
1718
1719         IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1720                        priv->firmware_name);
1721
1722         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1723                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1724                                        iwl_ucode_callback);
1725 }
1726
1727 struct iwlagn_firmware_pieces {
1728         const void *inst, *data, *init, *init_data, *boot;
1729         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1730
1731         u32 build;
1732
1733         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1734         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1735 };
1736
1737 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1738                                        const struct firmware *ucode_raw,
1739                                        struct iwlagn_firmware_pieces *pieces)
1740 {
1741         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1742         u32 api_ver, hdr_size;
1743         const u8 *src;
1744
1745         priv->ucode_ver = le32_to_cpu(ucode->ver);
1746         api_ver = IWL_UCODE_API(priv->ucode_ver);
1747
1748         switch (api_ver) {
1749         default:
1750                 /*
1751                  * 4965 doesn't revision the firmware file format
1752                  * along with the API version, it always uses v1
1753                  * file format.
1754                  */
1755                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1756                                 CSR_HW_REV_TYPE_4965) {
1757                         hdr_size = 28;
1758                         if (ucode_raw->size < hdr_size) {
1759                                 IWL_ERR(priv, "File size too small!\n");
1760                                 return -EINVAL;
1761                         }
1762                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1763                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1764                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1765                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1766                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1767                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1768                         src = ucode->u.v2.data;
1769                         break;
1770                 }
1771                 /* fall through for 4965 */
1772         case 0:
1773         case 1:
1774         case 2:
1775                 hdr_size = 24;
1776                 if (ucode_raw->size < hdr_size) {
1777                         IWL_ERR(priv, "File size too small!\n");
1778                         return -EINVAL;
1779                 }
1780                 pieces->build = 0;
1781                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1782                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1783                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1784                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1785                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1786                 src = ucode->u.v1.data;
1787                 break;
1788         }
1789
1790         /* Verify size of file vs. image size info in file's header */
1791         if (ucode_raw->size != hdr_size + pieces->inst_size +
1792                                 pieces->data_size + pieces->init_size +
1793                                 pieces->init_data_size + pieces->boot_size) {
1794
1795                 IWL_ERR(priv,
1796                         "uCode file size %d does not match expected size\n",
1797                         (int)ucode_raw->size);
1798                 return -EINVAL;
1799         }
1800
1801         pieces->inst = src;
1802         src += pieces->inst_size;
1803         pieces->data = src;
1804         src += pieces->data_size;
1805         pieces->init = src;
1806         src += pieces->init_size;
1807         pieces->init_data = src;
1808         src += pieces->init_data_size;
1809         pieces->boot = src;
1810         src += pieces->boot_size;
1811
1812         return 0;
1813 }
1814
1815 static int iwlagn_wanted_ucode_alternative = 1;
1816
1817 static int iwlagn_load_firmware(struct iwl_priv *priv,
1818                                 const struct firmware *ucode_raw,
1819                                 struct iwlagn_firmware_pieces *pieces,
1820                                 struct iwlagn_ucode_capabilities *capa)
1821 {
1822         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1823         struct iwl_ucode_tlv *tlv;
1824         size_t len = ucode_raw->size;
1825         const u8 *data;
1826         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1827         u64 alternatives;
1828         u32 tlv_len;
1829         enum iwl_ucode_tlv_type tlv_type;
1830         const u8 *tlv_data;
1831
1832         if (len < sizeof(*ucode)) {
1833                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1834                 return -EINVAL;
1835         }
1836
1837         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1838                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1839                         le32_to_cpu(ucode->magic));
1840                 return -EINVAL;
1841         }
1842
1843         /*
1844          * Check which alternatives are present, and "downgrade"
1845          * when the chosen alternative is not present, warning
1846          * the user when that happens. Some files may not have
1847          * any alternatives, so don't warn in that case.
1848          */
1849         alternatives = le64_to_cpu(ucode->alternatives);
1850         tmp = wanted_alternative;
1851         if (wanted_alternative > 63)
1852                 wanted_alternative = 63;
1853         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1854                 wanted_alternative--;
1855         if (wanted_alternative && wanted_alternative != tmp)
1856                 IWL_WARN(priv,
1857                          "uCode alternative %d not available, choosing %d\n",
1858                          tmp, wanted_alternative);
1859
1860         priv->ucode_ver = le32_to_cpu(ucode->ver);
1861         pieces->build = le32_to_cpu(ucode->build);
1862         data = ucode->data;
1863
1864         len -= sizeof(*ucode);
1865
1866         while (len >= sizeof(*tlv)) {
1867                 u16 tlv_alt;
1868
1869                 len -= sizeof(*tlv);
1870                 tlv = (void *)data;
1871
1872                 tlv_len = le32_to_cpu(tlv->length);
1873                 tlv_type = le16_to_cpu(tlv->type);
1874                 tlv_alt = le16_to_cpu(tlv->alternative);
1875                 tlv_data = tlv->data;
1876
1877                 if (len < tlv_len) {
1878                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1879                                 len, tlv_len);
1880                         return -EINVAL;
1881                 }
1882                 len -= ALIGN(tlv_len, 4);
1883                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1884
1885                 /*
1886                  * Alternative 0 is always valid.
1887                  *
1888                  * Skip alternative TLVs that are not selected.
1889                  */
1890                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1891                         continue;
1892
1893                 switch (tlv_type) {
1894                 case IWL_UCODE_TLV_INST:
1895                         pieces->inst = tlv_data;
1896                         pieces->inst_size = tlv_len;
1897                         break;
1898                 case IWL_UCODE_TLV_DATA:
1899                         pieces->data = tlv_data;
1900                         pieces->data_size = tlv_len;
1901                         break;
1902                 case IWL_UCODE_TLV_INIT:
1903                         pieces->init = tlv_data;
1904                         pieces->init_size = tlv_len;
1905                         break;
1906                 case IWL_UCODE_TLV_INIT_DATA:
1907                         pieces->init_data = tlv_data;
1908                         pieces->init_data_size = tlv_len;
1909                         break;
1910                 case IWL_UCODE_TLV_BOOT:
1911                         pieces->boot = tlv_data;
1912                         pieces->boot_size = tlv_len;
1913                         break;
1914                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1915                         if (tlv_len != sizeof(u32))
1916                                 goto invalid_tlv_len;
1917                         capa->max_probe_length =
1918                                         le32_to_cpup((__le32 *)tlv_data);
1919                         break;
1920                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1921                         if (tlv_len != sizeof(u32))
1922                                 goto invalid_tlv_len;
1923                         pieces->init_evtlog_ptr =
1924                                         le32_to_cpup((__le32 *)tlv_data);
1925                         break;
1926                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1927                         if (tlv_len != sizeof(u32))
1928                                 goto invalid_tlv_len;
1929                         pieces->init_evtlog_size =
1930                                         le32_to_cpup((__le32 *)tlv_data);
1931                         break;
1932                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1933                         if (tlv_len != sizeof(u32))
1934                                 goto invalid_tlv_len;
1935                         pieces->init_errlog_ptr =
1936                                         le32_to_cpup((__le32 *)tlv_data);
1937                         break;
1938                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1939                         if (tlv_len != sizeof(u32))
1940                                 goto invalid_tlv_len;
1941                         pieces->inst_evtlog_ptr =
1942                                         le32_to_cpup((__le32 *)tlv_data);
1943                         break;
1944                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1945                         if (tlv_len != sizeof(u32))
1946                                 goto invalid_tlv_len;
1947                         pieces->inst_evtlog_size =
1948                                         le32_to_cpup((__le32 *)tlv_data);
1949                         break;
1950                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1951                         if (tlv_len != sizeof(u32))
1952                                 goto invalid_tlv_len;
1953                         pieces->inst_errlog_ptr =
1954                                         le32_to_cpup((__le32 *)tlv_data);
1955                         break;
1956                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1957                         if (tlv_len)
1958                                 goto invalid_tlv_len;
1959                         priv->enhance_sensitivity_table = true;
1960                         break;
1961                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1962                         if (tlv_len != sizeof(u32))
1963                                 goto invalid_tlv_len;
1964                         capa->standard_phy_calibration_size =
1965                                         le32_to_cpup((__le32 *)tlv_data);
1966                         break;
1967                 default:
1968                         IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
1969                         break;
1970                 }
1971         }
1972
1973         if (len) {
1974                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1975                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1976                 return -EINVAL;
1977         }
1978
1979         return 0;
1980
1981  invalid_tlv_len:
1982         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
1983         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
1984
1985         return -EINVAL;
1986 }
1987
1988 /**
1989  * iwl_ucode_callback - callback when firmware was loaded
1990  *
1991  * If loaded successfully, copies the firmware into buffers
1992  * for the card to fetch (via DMA).
1993  */
1994 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1995 {
1996         struct iwl_priv *priv = context;
1997         struct iwl_ucode_header *ucode;
1998         int err;
1999         struct iwlagn_firmware_pieces pieces;
2000         const unsigned int api_max = priv->cfg->ucode_api_max;
2001         const unsigned int api_min = priv->cfg->ucode_api_min;
2002         u32 api_ver;
2003         char buildstr[25];
2004         u32 build;
2005         struct iwlagn_ucode_capabilities ucode_capa = {
2006                 .max_probe_length = 200,
2007                 .standard_phy_calibration_size =
2008                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE,
2009         };
2010
2011         memset(&pieces, 0, sizeof(pieces));
2012
2013         if (!ucode_raw) {
2014                 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
2015                         priv->firmware_name);
2016                 goto try_again;
2017         }
2018
2019         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
2020                        priv->firmware_name, ucode_raw->size);
2021
2022         /* Make sure that we got at least the API version number */
2023         if (ucode_raw->size < 4) {
2024                 IWL_ERR(priv, "File size way too small!\n");
2025                 goto try_again;
2026         }
2027
2028         /* Data from ucode file:  header followed by uCode images */
2029         ucode = (struct iwl_ucode_header *)ucode_raw->data;
2030
2031         if (ucode->ver)
2032                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
2033         else
2034                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
2035                                            &ucode_capa);
2036
2037         if (err)
2038                 goto try_again;
2039
2040         api_ver = IWL_UCODE_API(priv->ucode_ver);
2041         build = pieces.build;
2042
2043         /*
2044          * api_ver should match the api version forming part of the
2045          * firmware filename ... but we don't check for that and only rely
2046          * on the API version read from firmware header from here on forward
2047          */
2048         if (api_ver < api_min || api_ver > api_max) {
2049                 IWL_ERR(priv, "Driver unable to support your firmware API. "
2050                           "Driver supports v%u, firmware is v%u.\n",
2051                           api_max, api_ver);
2052                 goto try_again;
2053         }
2054
2055         if (api_ver != api_max)
2056                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
2057                           "got v%u. New firmware can be obtained "
2058                           "from http://www.intellinuxwireless.org.\n",
2059                           api_max, api_ver);
2060
2061         if (build)
2062                 sprintf(buildstr, " build %u", build);
2063         else
2064                 buildstr[0] = '\0';
2065
2066         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
2067                  IWL_UCODE_MAJOR(priv->ucode_ver),
2068                  IWL_UCODE_MINOR(priv->ucode_ver),
2069                  IWL_UCODE_API(priv->ucode_ver),
2070                  IWL_UCODE_SERIAL(priv->ucode_ver),
2071                  buildstr);
2072
2073         snprintf(priv->hw->wiphy->fw_version,
2074                  sizeof(priv->hw->wiphy->fw_version),
2075                  "%u.%u.%u.%u%s",
2076                  IWL_UCODE_MAJOR(priv->ucode_ver),
2077                  IWL_UCODE_MINOR(priv->ucode_ver),
2078                  IWL_UCODE_API(priv->ucode_ver),
2079                  IWL_UCODE_SERIAL(priv->ucode_ver),
2080                  buildstr);
2081
2082         /*
2083          * For any of the failures below (before allocating pci memory)
2084          * we will try to load a version with a smaller API -- maybe the
2085          * user just got a corrupted version of the latest API.
2086          */
2087
2088         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2089                        priv->ucode_ver);
2090         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
2091                        pieces.inst_size);
2092         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
2093                        pieces.data_size);
2094         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
2095                        pieces.init_size);
2096         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2097                        pieces.init_data_size);
2098         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2099                        pieces.boot_size);
2100
2101         /* Verify that uCode images will fit in card's SRAM */
2102         if (pieces.inst_size > priv->hw_params.max_inst_size) {
2103                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
2104                         pieces.inst_size);
2105                 goto try_again;
2106         }
2107
2108         if (pieces.data_size > priv->hw_params.max_data_size) {
2109                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
2110                         pieces.data_size);
2111                 goto try_again;
2112         }
2113
2114         if (pieces.init_size > priv->hw_params.max_inst_size) {
2115                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
2116                         pieces.init_size);
2117                 goto try_again;
2118         }
2119
2120         if (pieces.init_data_size > priv->hw_params.max_data_size) {
2121                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
2122                         pieces.init_data_size);
2123                 goto try_again;
2124         }
2125
2126         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2127                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2128                         pieces.boot_size);
2129                 goto try_again;
2130         }
2131
2132         /* Allocate ucode buffers for card's bus-master loading ... */
2133
2134         /* Runtime instructions and 2 copies of data:
2135          * 1) unmodified from disk
2136          * 2) backup cache for save/restore during power-downs */
2137         priv->ucode_code.len = pieces.inst_size;
2138         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2139
2140         priv->ucode_data.len = pieces.data_size;
2141         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2142
2143         priv->ucode_data_backup.len = pieces.data_size;
2144         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2145
2146         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2147             !priv->ucode_data_backup.v_addr)
2148                 goto err_pci_alloc;
2149
2150         /* Initialization instructions and data */
2151         if (pieces.init_size && pieces.init_data_size) {
2152                 priv->ucode_init.len = pieces.init_size;
2153                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2154
2155                 priv->ucode_init_data.len = pieces.init_data_size;
2156                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2157
2158                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2159                         goto err_pci_alloc;
2160         }
2161
2162         /* Bootstrap (instructions only, no data) */
2163         if (pieces.boot_size) {
2164                 priv->ucode_boot.len = pieces.boot_size;
2165                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2166
2167                 if (!priv->ucode_boot.v_addr)
2168                         goto err_pci_alloc;
2169         }
2170
2171         /* Now that we can no longer fail, copy information */
2172
2173         /*
2174          * The (size - 16) / 12 formula is based on the information recorded
2175          * for each event, which is of mode 1 (including timestamp) for all
2176          * new microcodes that include this information.
2177          */
2178         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
2179         if (pieces.init_evtlog_size)
2180                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2181         else
2182                 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
2183         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2184         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2185         if (pieces.inst_evtlog_size)
2186                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2187         else
2188                 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
2189         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2190
2191         /* Copy images into buffers for card's bus-master reads ... */
2192
2193         /* Runtime instructions (first block of data in file) */
2194         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2195                         pieces.inst_size);
2196         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2197
2198         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2199                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2200
2201         /*
2202          * Runtime data
2203          * NOTE:  Copy into backup buffer will be done in iwl_up()
2204          */
2205         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2206                         pieces.data_size);
2207         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2208         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2209
2210         /* Initialization instructions */
2211         if (pieces.init_size) {
2212                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2213                                 pieces.init_size);
2214                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2215         }
2216
2217         /* Initialization data */
2218         if (pieces.init_data_size) {
2219                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2220                                pieces.init_data_size);
2221                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2222                        pieces.init_data_size);
2223         }
2224
2225         /* Bootstrap instructions */
2226         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2227                         pieces.boot_size);
2228         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2229
2230         /*
2231          * figure out the offset of chain noise reset and gain commands
2232          * base on the size of standard phy calibration commands table size
2233          */
2234         if (ucode_capa.standard_phy_calibration_size >
2235             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
2236                 ucode_capa.standard_phy_calibration_size =
2237                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
2238
2239         priv->_agn.phy_calib_chain_noise_reset_cmd =
2240                 ucode_capa.standard_phy_calibration_size;
2241         priv->_agn.phy_calib_chain_noise_gain_cmd =
2242                 ucode_capa.standard_phy_calibration_size + 1;
2243
2244         /**************************************************
2245          * This is still part of probe() in a sense...
2246          *
2247          * 9. Setup and register with mac80211 and debugfs
2248          **************************************************/
2249         err = iwl_mac_setup_register(priv, &ucode_capa);
2250         if (err)
2251                 goto out_unbind;
2252
2253         err = iwl_dbgfs_register(priv, DRV_NAME);
2254         if (err)
2255                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2256
2257         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
2258                                         &iwl_attribute_group);
2259         if (err) {
2260                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2261                 goto out_unbind;
2262         }
2263
2264         /* We have our copies now, allow OS release its copies */
2265         release_firmware(ucode_raw);
2266         complete(&priv->_agn.firmware_loading_complete);
2267         return;
2268
2269  try_again:
2270         /* try next, if any */
2271         if (iwl_request_firmware(priv, false))
2272                 goto out_unbind;
2273         release_firmware(ucode_raw);
2274         return;
2275
2276  err_pci_alloc:
2277         IWL_ERR(priv, "failed to allocate pci memory\n");
2278         iwl_dealloc_ucode_pci(priv);
2279  out_unbind:
2280         complete(&priv->_agn.firmware_loading_complete);
2281         device_release_driver(&priv->pci_dev->dev);
2282         release_firmware(ucode_raw);
2283 }
2284
2285 static const char *desc_lookup_text[] = {
2286         "OK",
2287         "FAIL",
2288         "BAD_PARAM",
2289         "BAD_CHECKSUM",
2290         "NMI_INTERRUPT_WDG",
2291         "SYSASSERT",
2292         "FATAL_ERROR",
2293         "BAD_COMMAND",
2294         "HW_ERROR_TUNE_LOCK",
2295         "HW_ERROR_TEMPERATURE",
2296         "ILLEGAL_CHAN_FREQ",
2297         "VCC_NOT_STABLE",
2298         "FH_ERROR",
2299         "NMI_INTERRUPT_HOST",
2300         "NMI_INTERRUPT_ACTION_PT",
2301         "NMI_INTERRUPT_UNKNOWN",
2302         "UCODE_VERSION_MISMATCH",
2303         "HW_ERROR_ABS_LOCK",
2304         "HW_ERROR_CAL_LOCK_FAIL",
2305         "NMI_INTERRUPT_INST_ACTION_PT",
2306         "NMI_INTERRUPT_DATA_ACTION_PT",
2307         "NMI_TRM_HW_ER",
2308         "NMI_INTERRUPT_TRM",
2309         "NMI_INTERRUPT_BREAK_POINT"
2310         "DEBUG_0",
2311         "DEBUG_1",
2312         "DEBUG_2",
2313         "DEBUG_3",
2314 };
2315
2316 static struct { char *name; u8 num; } advanced_lookup[] = {
2317         { "NMI_INTERRUPT_WDG", 0x34 },
2318         { "SYSASSERT", 0x35 },
2319         { "UCODE_VERSION_MISMATCH", 0x37 },
2320         { "BAD_COMMAND", 0x38 },
2321         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
2322         { "FATAL_ERROR", 0x3D },
2323         { "NMI_TRM_HW_ERR", 0x46 },
2324         { "NMI_INTERRUPT_TRM", 0x4C },
2325         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
2326         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
2327         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
2328         { "NMI_INTERRUPT_HOST", 0x66 },
2329         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
2330         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
2331         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
2332         { "ADVANCED_SYSASSERT", 0 },
2333 };
2334
2335 static const char *desc_lookup(u32 num)
2336 {
2337         int i;
2338         int max = ARRAY_SIZE(desc_lookup_text);
2339
2340         if (num < max)
2341                 return desc_lookup_text[num];
2342
2343         max = ARRAY_SIZE(advanced_lookup) - 1;
2344         for (i = 0; i < max; i++) {
2345                 if (advanced_lookup[i].num == num)
2346                         break;;
2347         }
2348         return advanced_lookup[i].name;
2349 }
2350
2351 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2352 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2353
2354 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2355 {
2356         u32 data2, line;
2357         u32 desc, time, count, base, data1;
2358         u32 blink1, blink2, ilink1, ilink2;
2359         u32 pc, hcmd;
2360
2361         if (priv->ucode_type == UCODE_INIT) {
2362                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2363                 if (!base)
2364                         base = priv->_agn.init_errlog_ptr;
2365         } else {
2366                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2367                 if (!base)
2368                         base = priv->_agn.inst_errlog_ptr;
2369         }
2370
2371         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2372                 IWL_ERR(priv,
2373                         "Not valid error log pointer 0x%08X for %s uCode\n",
2374                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2375                 return;
2376         }
2377
2378         count = iwl_read_targ_mem(priv, base);
2379
2380         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2381                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2382                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2383                         priv->status, count);
2384         }
2385
2386         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2387         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2388         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2389         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2390         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2391         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2392         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2393         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2394         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2395         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2396         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2397
2398         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2399                                       blink1, blink2, ilink1, ilink2);
2400
2401         IWL_ERR(priv, "Desc                                  Time       "
2402                 "data1      data2      line\n");
2403         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
2404                 desc_lookup(desc), desc, time, data1, data2, line);
2405         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2406         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2407                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2408 }
2409
2410 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2411
2412 /**
2413  * iwl_print_event_log - Dump error event log to syslog
2414  *
2415  */
2416 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2417                                u32 num_events, u32 mode,
2418                                int pos, char **buf, size_t bufsz)
2419 {
2420         u32 i;
2421         u32 base;       /* SRAM byte address of event log header */
2422         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2423         u32 ptr;        /* SRAM byte address of log data */
2424         u32 ev, time, data; /* event log data */
2425         unsigned long reg_flags;
2426
2427         if (num_events == 0)
2428                 return pos;
2429
2430         if (priv->ucode_type == UCODE_INIT) {
2431                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2432                 if (!base)
2433                         base = priv->_agn.init_evtlog_ptr;
2434         } else {
2435                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2436                 if (!base)
2437                         base = priv->_agn.inst_evtlog_ptr;
2438         }
2439
2440         if (mode == 0)
2441                 event_size = 2 * sizeof(u32);
2442         else
2443                 event_size = 3 * sizeof(u32);
2444
2445         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2446
2447         /* Make sure device is powered up for SRAM reads */
2448         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2449         iwl_grab_nic_access(priv);
2450
2451         /* Set starting address; reads will auto-increment */
2452         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2453         rmb();
2454
2455         /* "time" is actually "data" for mode 0 (no timestamp).
2456         * place event id # at far right for easier visual parsing. */
2457         for (i = 0; i < num_events; i++) {
2458                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2459                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2460                 if (mode == 0) {
2461                         /* data, ev */
2462                         if (bufsz) {
2463                                 pos += scnprintf(*buf + pos, bufsz - pos,
2464                                                 "EVT_LOG:0x%08x:%04u\n",
2465                                                 time, ev);
2466                         } else {
2467                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2468                                         time, ev);
2469                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2470                                         time, ev);
2471                         }
2472                 } else {
2473                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2474                         if (bufsz) {
2475                                 pos += scnprintf(*buf + pos, bufsz - pos,
2476                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2477                                                  time, data, ev);
2478                         } else {
2479                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2480                                         time, data, ev);
2481                                 trace_iwlwifi_dev_ucode_event(priv, time,
2482                                         data, ev);
2483                         }
2484                 }
2485         }
2486
2487         /* Allow device to power down */
2488         iwl_release_nic_access(priv);
2489         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2490         return pos;
2491 }
2492
2493 /**
2494  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2495  */
2496 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2497                                     u32 num_wraps, u32 next_entry,
2498                                     u32 size, u32 mode,
2499                                     int pos, char **buf, size_t bufsz)
2500 {
2501         /*
2502          * display the newest DEFAULT_LOG_ENTRIES entries
2503          * i.e the entries just before the next ont that uCode would fill.
2504          */
2505         if (num_wraps) {
2506                 if (next_entry < size) {
2507                         pos = iwl_print_event_log(priv,
2508                                                 capacity - (size - next_entry),
2509                                                 size - next_entry, mode,
2510                                                 pos, buf, bufsz);
2511                         pos = iwl_print_event_log(priv, 0,
2512                                                   next_entry, mode,
2513                                                   pos, buf, bufsz);
2514                 } else
2515                         pos = iwl_print_event_log(priv, next_entry - size,
2516                                                   size, mode, pos, buf, bufsz);
2517         } else {
2518                 if (next_entry < size) {
2519                         pos = iwl_print_event_log(priv, 0, next_entry,
2520                                                   mode, pos, buf, bufsz);
2521                 } else {
2522                         pos = iwl_print_event_log(priv, next_entry - size,
2523                                                   size, mode, pos, buf, bufsz);
2524                 }
2525         }
2526         return pos;
2527 }
2528
2529 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2530
2531 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2532                             char **buf, bool display)
2533 {
2534         u32 base;       /* SRAM byte address of event log header */
2535         u32 capacity;   /* event log capacity in # entries */
2536         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2537         u32 num_wraps;  /* # times uCode wrapped to top of log */
2538         u32 next_entry; /* index of next entry to be written by uCode */
2539         u32 size;       /* # entries that we'll print */
2540         u32 logsize;
2541         int pos = 0;
2542         size_t bufsz = 0;
2543
2544         if (priv->ucode_type == UCODE_INIT) {
2545                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2546                 logsize = priv->_agn.init_evtlog_size;
2547                 if (!base)
2548                         base = priv->_agn.init_evtlog_ptr;
2549         } else {
2550                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2551                 logsize = priv->_agn.inst_evtlog_size;
2552                 if (!base)
2553                         base = priv->_agn.inst_evtlog_ptr;
2554         }
2555
2556         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2557                 IWL_ERR(priv,
2558                         "Invalid event log pointer 0x%08X for %s uCode\n",
2559                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2560                 return -EINVAL;
2561         }
2562
2563         /* event log header */
2564         capacity = iwl_read_targ_mem(priv, base);
2565         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2566         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2567         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2568
2569         if (capacity > logsize) {
2570                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2571                         capacity, logsize);
2572                 capacity = logsize;
2573         }
2574
2575         if (next_entry > logsize) {
2576                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2577                         next_entry, logsize);
2578                 next_entry = logsize;
2579         }
2580
2581         size = num_wraps ? capacity : next_entry;
2582
2583         /* bail out if nothing in log */
2584         if (size == 0) {
2585                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2586                 return pos;
2587         }
2588
2589 #ifdef CONFIG_IWLWIFI_DEBUG
2590         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2591                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2592                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2593 #else
2594         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2595                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2596 #endif
2597         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2598                 size);
2599
2600 #ifdef CONFIG_IWLWIFI_DEBUG
2601         if (display) {
2602                 if (full_log)
2603                         bufsz = capacity * 48;
2604                 else
2605                         bufsz = size * 48;
2606                 *buf = kmalloc(bufsz, GFP_KERNEL);
2607                 if (!*buf)
2608                         return -ENOMEM;
2609         }
2610         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2611                 /*
2612                  * if uCode has wrapped back to top of log,
2613                  * start at the oldest entry,
2614                  * i.e the next one that uCode would fill.
2615                  */
2616                 if (num_wraps)
2617                         pos = iwl_print_event_log(priv, next_entry,
2618                                                 capacity - next_entry, mode,
2619                                                 pos, buf, bufsz);
2620                 /* (then/else) start at top of log */
2621                 pos = iwl_print_event_log(priv, 0,
2622                                           next_entry, mode, pos, buf, bufsz);
2623         } else
2624                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2625                                                 next_entry, size, mode,
2626                                                 pos, buf, bufsz);
2627 #else
2628         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2629                                         next_entry, size, mode,
2630                                         pos, buf, bufsz);
2631 #endif
2632         return pos;
2633 }
2634
2635 /**
2636  * iwl_alive_start - called after REPLY_ALIVE notification received
2637  *                   from protocol/runtime uCode (initialization uCode's
2638  *                   Alive gets handled by iwl_init_alive_start()).
2639  */
2640 static void iwl_alive_start(struct iwl_priv *priv)
2641 {
2642         int ret = 0;
2643
2644         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2645
2646         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2647                 /* We had an error bringing up the hardware, so take it
2648                  * all the way back down so we can try again */
2649                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2650                 goto restart;
2651         }
2652
2653         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2654          * This is a paranoid check, because we would not have gotten the
2655          * "runtime" alive if code weren't properly loaded.  */
2656         if (iwl_verify_ucode(priv)) {
2657                 /* Runtime instruction load was bad;
2658                  * take it all the way back down so we can try again */
2659                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2660                 goto restart;
2661         }
2662
2663         ret = priv->cfg->ops->lib->alive_notify(priv);
2664         if (ret) {
2665                 IWL_WARN(priv,
2666                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2667                 goto restart;
2668         }
2669
2670         /* After the ALIVE response, we can send host commands to the uCode */
2671         set_bit(STATUS_ALIVE, &priv->status);
2672
2673         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2674                 /* Enable timer to monitor the driver queues */
2675                 mod_timer(&priv->monitor_recover,
2676                         jiffies +
2677                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2678         }
2679
2680         if (iwl_is_rfkill(priv))
2681                 return;
2682
2683         ieee80211_wake_queues(priv->hw);
2684
2685         priv->active_rate = IWL_RATES_MASK;
2686
2687         /* Configure Tx antenna selection based on H/W config */
2688         if (priv->cfg->ops->hcmd->set_tx_ant)
2689                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2690
2691         if (iwl_is_associated(priv)) {
2692                 struct iwl_rxon_cmd *active_rxon =
2693                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2694                 /* apply any changes in staging */
2695                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2696                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2697         } else {
2698                 /* Initialize our rx_config data */
2699                 iwl_connection_init_rx_config(priv, NULL);
2700
2701                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2702                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2703         }
2704
2705         /* Configure Bluetooth device coexistence support */
2706         priv->cfg->ops->hcmd->send_bt_config(priv);
2707
2708         iwl_reset_run_time_calib(priv);
2709
2710         /* Configure the adapter for unassociated operation */
2711         iwlcore_commit_rxon(priv);
2712
2713         /* At this point, the NIC is initialized and operational */
2714         iwl_rf_kill_ct_config(priv);
2715
2716         iwl_leds_init(priv);
2717
2718         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2719         set_bit(STATUS_READY, &priv->status);
2720         wake_up_interruptible(&priv->wait_command_queue);
2721
2722         iwl_power_update_mode(priv, true);
2723         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2724
2725
2726         return;
2727
2728  restart:
2729         queue_work(priv->workqueue, &priv->restart);
2730 }
2731
2732 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2733
2734 static void __iwl_down(struct iwl_priv *priv)
2735 {
2736         unsigned long flags;
2737         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2738
2739         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2740
2741         if (!exit_pending)
2742                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2743
2744         iwl_clear_ucode_stations(priv);
2745         iwl_dealloc_bcast_station(priv);
2746         iwl_clear_driver_stations(priv);
2747
2748         /* Unblock any waiting calls */
2749         wake_up_interruptible_all(&priv->wait_command_queue);
2750
2751         /* Wipe out the EXIT_PENDING status bit if we are not actually
2752          * exiting the module */
2753         if (!exit_pending)
2754                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2755
2756         /* stop and reset the on-board processor */
2757         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2758
2759         /* tell the device to stop sending interrupts */
2760         spin_lock_irqsave(&priv->lock, flags);
2761         iwl_disable_interrupts(priv);
2762         spin_unlock_irqrestore(&priv->lock, flags);
2763         iwl_synchronize_irq(priv);
2764
2765         if (priv->mac80211_registered)
2766                 ieee80211_stop_queues(priv->hw);
2767
2768         /* If we have not previously called iwl_init() then
2769          * clear all bits but the RF Kill bit and return */
2770         if (!iwl_is_init(priv)) {
2771                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2772                                         STATUS_RF_KILL_HW |
2773                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2774                                         STATUS_GEO_CONFIGURED |
2775                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2776                                         STATUS_EXIT_PENDING;
2777                 goto exit;
2778         }
2779
2780         /* ...otherwise clear out all the status bits but the RF Kill
2781          * bit and continue taking the NIC down. */
2782         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2783                                 STATUS_RF_KILL_HW |
2784                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2785                                 STATUS_GEO_CONFIGURED |
2786                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2787                                 STATUS_FW_ERROR |
2788                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2789                                 STATUS_EXIT_PENDING;
2790
2791         /* device going down, Stop using ICT table */
2792         iwl_disable_ict(priv);
2793
2794         iwlagn_txq_ctx_stop(priv);
2795         iwlagn_rxq_stop(priv);
2796
2797         /* Power-down device's busmaster DMA clocks */
2798         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2799         udelay(5);
2800
2801         /* Make sure (redundant) we've released our request to stay awake */
2802         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2803
2804         /* Stop the device, and put it in low power state */
2805         priv->cfg->ops->lib->apm_ops.stop(priv);
2806
2807  exit:
2808         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2809
2810         if (priv->ibss_beacon)
2811                 dev_kfree_skb(priv->ibss_beacon);
2812         priv->ibss_beacon = NULL;
2813
2814         /* clear out any free frames */
2815         iwl_clear_free_frames(priv);
2816 }
2817
2818 static void iwl_down(struct iwl_priv *priv)
2819 {
2820         mutex_lock(&priv->mutex);
2821         __iwl_down(priv);
2822         mutex_unlock(&priv->mutex);
2823
2824         iwl_cancel_deferred_work(priv);
2825 }
2826
2827 #define HW_READY_TIMEOUT (50)
2828
2829 static int iwl_set_hw_ready(struct iwl_priv *priv)
2830 {
2831         int ret = 0;
2832
2833         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2834                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2835
2836         /* See if we got it */
2837         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2838                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2839                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2840                                 HW_READY_TIMEOUT);
2841         if (ret != -ETIMEDOUT)
2842                 priv->hw_ready = true;
2843         else
2844                 priv->hw_ready = false;
2845
2846         IWL_DEBUG_INFO(priv, "hardware %s\n",
2847                       (priv->hw_ready == 1) ? "ready" : "not ready");
2848         return ret;
2849 }
2850
2851 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2852 {
2853         int ret = 0;
2854
2855         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2856
2857         ret = iwl_set_hw_ready(priv);
2858         if (priv->hw_ready)
2859                 return ret;
2860
2861         /* If HW is not ready, prepare the conditions to check again */
2862         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2863                         CSR_HW_IF_CONFIG_REG_PREPARE);
2864
2865         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2866                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2867                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2868
2869         /* HW should be ready by now, check again. */
2870         if (ret != -ETIMEDOUT)
2871                 iwl_set_hw_ready(priv);
2872
2873         return ret;
2874 }
2875
2876 #define MAX_HW_RESTARTS 5
2877
2878 static int __iwl_up(struct iwl_priv *priv)
2879 {
2880         int i;
2881         int ret;
2882
2883         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2884                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2885                 return -EIO;
2886         }
2887
2888         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2889                 IWL_ERR(priv, "ucode not available for device bringup\n");
2890                 return -EIO;
2891         }
2892
2893         ret = iwl_alloc_bcast_station(priv, true);
2894         if (ret)
2895                 return ret;
2896
2897         iwl_prepare_card_hw(priv);
2898
2899         if (!priv->hw_ready) {
2900                 IWL_WARN(priv, "Exit HW not ready\n");
2901                 return -EIO;
2902         }
2903
2904         /* If platform's RF_KILL switch is NOT set to KILL */
2905         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2906                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2907         else
2908                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2909
2910         if (iwl_is_rfkill(priv)) {
2911                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2912
2913                 iwl_enable_interrupts(priv);
2914                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2915                 return 0;
2916         }
2917
2918         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2919
2920         ret = iwlagn_hw_nic_init(priv);
2921         if (ret) {
2922                 IWL_ERR(priv, "Unable to init nic\n");
2923                 return ret;
2924         }
2925
2926         /* make sure rfkill handshake bits are cleared */
2927         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2928         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2929                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2930
2931         /* clear (again), then enable host interrupts */
2932         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2933         iwl_enable_interrupts(priv);
2934
2935         /* really make sure rfkill handshake bits are cleared */
2936         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2937         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2938
2939         /* Copy original ucode data image from disk into backup cache.
2940          * This will be used to initialize the on-board processor's
2941          * data SRAM for a clean start when the runtime program first loads. */
2942         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2943                priv->ucode_data.len);
2944
2945         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2946
2947                 /* load bootstrap state machine,
2948                  * load bootstrap program into processor's memory,
2949                  * prepare to load the "initialize" uCode */
2950                 ret = priv->cfg->ops->lib->load_ucode(priv);
2951
2952                 if (ret) {
2953                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2954                                 ret);
2955                         continue;
2956                 }
2957
2958                 /* start card; "initialize" will load runtime ucode */
2959                 iwl_nic_start(priv);
2960
2961                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2962
2963                 return 0;
2964         }
2965
2966         set_bit(STATUS_EXIT_PENDING, &priv->status);
2967         __iwl_down(priv);
2968         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2969
2970         /* tried to restart and config the device for as long as our
2971          * patience could withstand */
2972         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2973         return -EIO;
2974 }
2975
2976
2977 /*****************************************************************************
2978  *
2979  * Workqueue callbacks
2980  *
2981  *****************************************************************************/
2982
2983 static void iwl_bg_init_alive_start(struct work_struct *data)
2984 {
2985         struct iwl_priv *priv =
2986             container_of(data, struct iwl_priv, init_alive_start.work);
2987
2988         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2989                 return;
2990
2991         mutex_lock(&priv->mutex);
2992         priv->cfg->ops->lib->init_alive_start(priv);
2993         mutex_unlock(&priv->mutex);
2994 }
2995
2996 static void iwl_bg_alive_start(struct work_struct *data)
2997 {
2998         struct iwl_priv *priv =
2999             container_of(data, struct iwl_priv, alive_start.work);
3000
3001         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3002                 return;
3003
3004         /* enable dram interrupt */
3005         iwl_reset_ict(priv);
3006
3007         mutex_lock(&priv->mutex);
3008         iwl_alive_start(priv);
3009         mutex_unlock(&priv->mutex);
3010 }
3011
3012 static void iwl_bg_run_time_calib_work(struct work_struct *work)
3013 {
3014         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3015                         run_time_calib_work);
3016
3017         mutex_lock(&priv->mutex);
3018
3019         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3020             test_bit(STATUS_SCANNING, &priv->status)) {
3021                 mutex_unlock(&priv->mutex);
3022                 return;
3023         }
3024
3025         if (priv->start_calib) {
3026                 if (priv->cfg->bt_statistics) {
3027                         iwl_chain_noise_calibration(priv,
3028                                         (void *)&priv->_agn.statistics_bt);
3029                         iwl_sensitivity_calibration(priv,
3030                                         (void *)&priv->_agn.statistics_bt);
3031                 } else {
3032                         iwl_chain_noise_calibration(priv,
3033                                         (void *)&priv->_agn.statistics);
3034                         iwl_sensitivity_calibration(priv,
3035                                         (void *)&priv->_agn.statistics);
3036                 }
3037         }
3038
3039         mutex_unlock(&priv->mutex);
3040 }
3041
3042 static void iwl_bg_restart(struct work_struct *data)
3043 {
3044         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3045
3046         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3047                 return;
3048
3049         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3050                 mutex_lock(&priv->mutex);
3051                 priv->vif = NULL;
3052                 priv->is_open = 0;
3053                 mutex_unlock(&priv->mutex);
3054                 iwl_down(priv);
3055                 ieee80211_restart_hw(priv->hw);
3056         } else {
3057                 iwl_down(priv);
3058
3059                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3060                         return;
3061
3062                 mutex_lock(&priv->mutex);
3063                 __iwl_up(priv);
3064                 mutex_unlock(&priv->mutex);
3065         }
3066 }
3067
3068 static void iwl_bg_rx_replenish(struct work_struct *data)
3069 {
3070         struct iwl_priv *priv =
3071             container_of(data, struct iwl_priv, rx_replenish);
3072
3073         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3074                 return;
3075
3076         mutex_lock(&priv->mutex);
3077         iwlagn_rx_replenish(priv);
3078         mutex_unlock(&priv->mutex);
3079 }
3080
3081 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3082
3083 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3084 {
3085         struct ieee80211_conf *conf = NULL;
3086         int ret = 0;
3087
3088         if (!vif || !priv->is_open)
3089                 return;
3090
3091         if (vif->type == NL80211_IFTYPE_AP) {
3092                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3093                 return;
3094         }
3095
3096         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3097                 return;
3098
3099         iwl_scan_cancel_timeout(priv, 200);
3100
3101         conf = ieee80211_get_hw_conf(priv->hw);
3102
3103         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3104         iwlcore_commit_rxon(priv);
3105
3106         iwl_setup_rxon_timing(priv, vif);
3107         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3108                               sizeof(priv->rxon_timing), &priv->rxon_timing);
3109         if (ret)
3110                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3111                             "Attempting to continue.\n");
3112
3113         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3114
3115         iwl_set_rxon_ht(priv, &priv->current_ht_config);
3116
3117         if (priv->cfg->ops->hcmd->set_rxon_chain)
3118                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3119
3120         priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3121
3122         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3123                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
3124
3125         if (vif->bss_conf.use_short_preamble)
3126                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3127         else
3128                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3129
3130         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3131                 if (vif->bss_conf.use_short_slot)
3132                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3133                 else
3134                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3135         }
3136
3137         iwlcore_commit_rxon(priv);
3138
3139         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3140                         vif->bss_conf.aid, priv->active_rxon.bssid_addr);
3141
3142         switch (vif->type) {
3143         case NL80211_IFTYPE_STATION:
3144                 break;
3145         case NL80211_IFTYPE_ADHOC:
3146                 iwl_send_beacon_cmd(priv);
3147                 break;
3148         default:
3149                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3150                           __func__, vif->type);
3151                 break;
3152         }
3153
3154         /* the chain noise calibration will enabled PM upon completion
3155          * If chain noise has already been run, then we need to enable
3156          * power management here */
3157         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
3158                 iwl_power_update_mode(priv, false);
3159
3160         /* Enable Rx differential gain and sensitivity calibrations */
3161         iwl_chain_noise_reset(priv);
3162         priv->start_calib = 1;
3163
3164 }
3165
3166 /*****************************************************************************
3167  *
3168  * mac80211 entry point functions
3169  *
3170  *****************************************************************************/
3171
3172 #define UCODE_READY_TIMEOUT     (4 * HZ)
3173
3174 /*
3175  * Not a mac80211 entry point function, but it fits in with all the
3176  * other mac80211 functions grouped here.
3177  */
3178 static int iwl_mac_setup_register(struct iwl_priv *priv,
3179                                   struct iwlagn_ucode_capabilities *capa)
3180 {
3181         int ret;
3182         struct ieee80211_hw *hw = priv->hw;
3183         hw->rate_control_algorithm = "iwl-agn-rs";
3184
3185         /* Tell mac80211 our characteristics */
3186         hw->flags = IEEE80211_HW_SIGNAL_DBM |
3187                     IEEE80211_HW_AMPDU_AGGREGATION |
3188                     IEEE80211_HW_SPECTRUM_MGMT;
3189
3190         if (!priv->cfg->broken_powersave)
3191                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3192                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3193
3194         if (priv->cfg->sku & IWL_SKU_N)
3195                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3196                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3197
3198         hw->sta_data_size = sizeof(struct iwl_station_priv);
3199         hw->vif_data_size = sizeof(struct iwl_vif_priv);
3200
3201         hw->wiphy->interface_modes =
3202                 BIT(NL80211_IFTYPE_STATION) |
3203                 BIT(NL80211_IFTYPE_ADHOC);
3204
3205         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3206                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
3207
3208         /*
3209          * For now, disable PS by default because it affects
3210          * RX performance significantly.
3211          */
3212         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3213
3214         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
3215         /* we create the 802.11 header and a zero-length SSID element */
3216         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
3217
3218         /* Default value; 4 EDCA QOS priorities */
3219         hw->queues = 4;
3220
3221         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
3222
3223         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3224                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3225                         &priv->bands[IEEE80211_BAND_2GHZ];
3226         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3227                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3228                         &priv->bands[IEEE80211_BAND_5GHZ];
3229
3230         ret = ieee80211_register_hw(priv->hw);
3231         if (ret) {
3232                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3233                 return ret;
3234         }
3235         priv->mac80211_registered = 1;
3236
3237         return 0;
3238 }
3239
3240
3241 static int iwl_mac_start(struct ieee80211_hw *hw)
3242 {
3243         struct iwl_priv *priv = hw->priv;
3244         int ret;
3245
3246         IWL_DEBUG_MAC80211(priv, "enter\n");
3247
3248         /* we should be verifying the device is ready to be opened */
3249         mutex_lock(&priv->mutex);
3250         ret = __iwl_up(priv);
3251         mutex_unlock(&priv->mutex);
3252
3253         if (ret)
3254                 return ret;
3255
3256         if (iwl_is_rfkill(priv))
3257                 goto out;
3258
3259         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3260
3261         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3262          * mac80211 will not be run successfully. */
3263         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3264                         test_bit(STATUS_READY, &priv->status),
3265                         UCODE_READY_TIMEOUT);
3266         if (!ret) {
3267                 if (!test_bit(STATUS_READY, &priv->status)) {
3268                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3269                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3270                         return -ETIMEDOUT;
3271                 }
3272         }
3273
3274         iwl_led_start(priv);
3275
3276 out:
3277         priv->is_open = 1;
3278         IWL_DEBUG_MAC80211(priv, "leave\n");
3279         return 0;
3280 }
3281
3282 static void iwl_mac_stop(struct ieee80211_hw *hw)
3283 {
3284         struct iwl_priv *priv = hw->priv;
3285
3286         IWL_DEBUG_MAC80211(priv, "enter\n");
3287
3288         if (!priv->is_open)
3289                 return;
3290
3291         priv->is_open = 0;
3292
3293         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3294                 /* stop mac, cancel any scan request and clear
3295                  * RXON_FILTER_ASSOC_MSK BIT
3296                  */
3297                 mutex_lock(&priv->mutex);
3298                 iwl_scan_cancel_timeout(priv, 100);
3299                 mutex_unlock(&priv->mutex);
3300         }
3301
3302         iwl_down(priv);
3303
3304         flush_workqueue(priv->workqueue);
3305
3306         /* enable interrupts again in order to receive rfkill changes */
3307         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3308         iwl_enable_interrupts(priv);
3309
3310         IWL_DEBUG_MAC80211(priv, "leave\n");
3311 }
3312
3313 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3314 {
3315         struct iwl_priv *priv = hw->priv;
3316
3317         IWL_DEBUG_MACDUMP(priv, "enter\n");
3318
3319         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3320                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3321
3322         if (iwlagn_tx_skb(priv, skb))
3323                 dev_kfree_skb_any(skb);
3324
3325         IWL_DEBUG_MACDUMP(priv, "leave\n");
3326         return NETDEV_TX_OK;
3327 }
3328
3329 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3330 {
3331         int ret = 0;
3332
3333         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3334                 return;
3335
3336         /* The following should be done only at AP bring up */
3337         if (!iwl_is_associated(priv)) {
3338
3339                 /* RXON - unassoc (to set timing command) */
3340                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3341                 iwlcore_commit_rxon(priv);
3342
3343                 /* RXON Timing */
3344                 iwl_setup_rxon_timing(priv, vif);
3345                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3346                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
3347                 if (ret)
3348                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3349                                         "Attempting to continue.\n");
3350
3351                 /* AP has all antennas */
3352                 priv->chain_noise_data.active_chains =
3353                         priv->hw_params.valid_rx_ant;
3354                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3355                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3356                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
3357
3358                 priv->staging_rxon.assoc_id = 0;
3359
3360                 if (vif->bss_conf.use_short_preamble)
3361                         priv->staging_rxon.flags |=
3362                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3363                 else
3364                         priv->staging_rxon.flags &=
3365                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3366
3367                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3368                         if (vif->bss_conf.use_short_slot)
3369                                 priv->staging_rxon.flags |=
3370                                         RXON_FLG_SHORT_SLOT_MSK;
3371                         else
3372                                 priv->staging_rxon.flags &=
3373                                         ~RXON_FLG_SHORT_SLOT_MSK;
3374                 }
3375                 /* restore RXON assoc */
3376                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3377                 iwlcore_commit_rxon(priv);
3378         }
3379         iwl_send_beacon_cmd(priv);
3380
3381         /* FIXME - we need to add code here to detect a totally new
3382          * configuration, reset the AP, unassoc, rxon timing, assoc,
3383          * clear sta table, add BCAST sta... */
3384 }
3385
3386 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3387                                     struct ieee80211_vif *vif,
3388                                     struct ieee80211_key_conf *keyconf,
3389                                     struct ieee80211_sta *sta,
3390                                     u32 iv32, u16 *phase1key)
3391 {
3392
3393         struct iwl_priv *priv = hw->priv;
3394         IWL_DEBUG_MAC80211(priv, "enter\n");
3395
3396         iwl_update_tkip_key(priv, keyconf, sta,
3397                             iv32, phase1key);
3398
3399         IWL_DEBUG_MAC80211(priv, "leave\n");
3400 }
3401
3402 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3403                            struct ieee80211_vif *vif,
3404                            struct ieee80211_sta *sta,
3405                            struct ieee80211_key_conf *key)
3406 {
3407         struct iwl_priv *priv = hw->priv;
3408         int ret;
3409         u8 sta_id;
3410         bool is_default_wep_key = false;
3411
3412         IWL_DEBUG_MAC80211(priv, "enter\n");
3413
3414         if (priv->cfg->mod_params->sw_crypto) {
3415                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3416                 return -EOPNOTSUPP;
3417         }
3418
3419         sta_id = iwl_sta_id_or_broadcast(priv, sta);
3420         if (sta_id == IWL_INVALID_STATION)
3421                 return -EINVAL;
3422
3423         mutex_lock(&priv->mutex);
3424         iwl_scan_cancel_timeout(priv, 100);
3425
3426         /*
3427          * If we are getting WEP group key and we didn't receive any key mapping
3428          * so far, we are in legacy wep mode (group key only), otherwise we are
3429          * in 1X mode.
3430          * In legacy wep mode, we use another host command to the uCode.
3431          */
3432         if (key->alg == ALG_WEP && !sta && vif->type != NL80211_IFTYPE_AP) {
3433                 if (cmd == SET_KEY)
3434                         is_default_wep_key = !priv->key_mapping_key;
3435                 else
3436                         is_default_wep_key =
3437                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3438         }
3439
3440         switch (cmd) {
3441         case SET_KEY:
3442                 if (is_default_wep_key)
3443                         ret = iwl_set_default_wep_key(priv, key);
3444                 else
3445                         ret = iwl_set_dynamic_key(priv, key, sta_id);
3446
3447                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3448                 break;
3449         case DISABLE_KEY:
3450                 if (is_default_wep_key)
3451                         ret = iwl_remove_default_wep_key(priv, key);
3452                 else
3453                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
3454
3455                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3456                 break;
3457         default:
3458                 ret = -EINVAL;
3459         }
3460
3461         mutex_unlock(&priv->mutex);
3462         IWL_DEBUG_MAC80211(priv, "leave\n");
3463
3464         return ret;
3465 }
3466
3467 /*
3468  * switch to RTS/CTS for TX
3469  */
3470 static void iwl_enable_rts_cts(struct iwl_priv *priv)
3471 {
3472
3473         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3474                 return;
3475
3476         priv->staging_rxon.flags &= ~RXON_FLG_SELF_CTS_EN;
3477         if (!test_bit(STATUS_SCANNING, &priv->status)) {
3478                 IWL_DEBUG_INFO(priv, "use RTS/CTS protection\n");
3479                 iwlcore_commit_rxon(priv);
3480         } else {
3481                 /* scanning, defer the request until scan completed */
3482                 IWL_DEBUG_INFO(priv, "defer setting RTS/CTS protection\n");
3483         }
3484 }
3485
3486 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3487                                 struct ieee80211_vif *vif,
3488                                 enum ieee80211_ampdu_mlme_action action,
3489                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3490 {
3491         struct iwl_priv *priv = hw->priv;
3492         int ret = -EINVAL;
3493
3494         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3495                      sta->addr, tid);
3496
3497         if (!(priv->cfg->sku & IWL_SKU_N))
3498                 return -EACCES;
3499
3500         mutex_lock(&priv->mutex);
3501
3502         switch (action) {
3503         case IEEE80211_AMPDU_RX_START:
3504                 IWL_DEBUG_HT(priv, "start Rx\n");
3505                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3506                 break;
3507         case IEEE80211_AMPDU_RX_STOP:
3508                 IWL_DEBUG_HT(priv, "stop Rx\n");
3509                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3510                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3511                         ret = 0;
3512                 break;
3513         case IEEE80211_AMPDU_TX_START:
3514                 IWL_DEBUG_HT(priv, "start Tx\n");
3515                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3516                 if (ret == 0) {
3517                         priv->_agn.agg_tids_count++;
3518                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3519                                      priv->_agn.agg_tids_count);
3520                 }
3521                 break;
3522         case IEEE80211_AMPDU_TX_STOP:
3523                 IWL_DEBUG_HT(priv, "stop Tx\n");
3524                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3525                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3526                         priv->_agn.agg_tids_count--;
3527                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3528                                      priv->_agn.agg_tids_count);
3529                 }
3530                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3531                         ret = 0;
3532                 break;
3533         case IEEE80211_AMPDU_TX_OPERATIONAL:
3534                 if (priv->cfg->use_rts_for_ht) {
3535                         /*
3536                          * switch to RTS/CTS if it is the prefer protection
3537                          * method for HT traffic
3538                          */
3539                         iwl_enable_rts_cts(priv);
3540                 }
3541                 ret = 0;
3542                 break;
3543         }
3544         mutex_unlock(&priv->mutex);
3545
3546         return ret;
3547 }
3548
3549 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3550                                struct ieee80211_vif *vif,
3551                                enum sta_notify_cmd cmd,
3552                                struct ieee80211_sta *sta)
3553 {
3554         struct iwl_priv *priv = hw->priv;
3555         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3556         int sta_id;
3557
3558         switch (cmd) {
3559         case STA_NOTIFY_SLEEP:
3560                 WARN_ON(!sta_priv->client);
3561                 sta_priv->asleep = true;
3562                 if (atomic_read(&sta_priv->pending_frames) > 0)
3563                         ieee80211_sta_block_awake(hw, sta, true);
3564                 break;
3565         case STA_NOTIFY_AWAKE:
3566                 WARN_ON(!sta_priv->client);
3567                 if (!sta_priv->asleep)
3568                         break;
3569                 sta_priv->asleep = false;
3570                 sta_id = iwl_sta_id(sta);
3571                 if (sta_id != IWL_INVALID_STATION)
3572                         iwl_sta_modify_ps_wake(priv, sta_id);
3573                 break;
3574         default:
3575                 break;
3576         }
3577 }
3578
3579 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3580                               struct ieee80211_vif *vif,
3581                               struct ieee80211_sta *sta)
3582 {
3583         struct iwl_priv *priv = hw->priv;
3584         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3585         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3586         int ret;
3587         u8 sta_id;
3588
3589         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3590                         sta->addr);
3591         mutex_lock(&priv->mutex);
3592         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3593                         sta->addr);
3594         sta_priv->common.sta_id = IWL_INVALID_STATION;
3595
3596         atomic_set(&sta_priv->pending_frames, 0);
3597         if (vif->type == NL80211_IFTYPE_AP)
3598                 sta_priv->client = true;
3599
3600         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3601                                      &sta_id);
3602         if (ret) {
3603                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3604                         sta->addr, ret);
3605                 /* Should we return success if return code is EEXIST ? */
3606                 mutex_unlock(&priv->mutex);
3607                 return ret;
3608         }
3609
3610         sta_priv->common.sta_id = sta_id;
3611
3612         /* Initialize rate scaling */
3613         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3614                        sta->addr);
3615         iwl_rs_rate_init(priv, sta, sta_id);
3616         mutex_unlock(&priv->mutex);
3617
3618         return 0;
3619 }
3620
3621 static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3622                                    struct ieee80211_channel_switch *ch_switch)
3623 {
3624         struct iwl_priv *priv = hw->priv;
3625         const struct iwl_channel_info *ch_info;
3626         struct ieee80211_conf *conf = &hw->conf;
3627         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3628         u16 ch;
3629         unsigned long flags = 0;
3630
3631         IWL_DEBUG_MAC80211(priv, "enter\n");
3632
3633         if (iwl_is_rfkill(priv))
3634                 goto out_exit;
3635
3636         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3637             test_bit(STATUS_SCANNING, &priv->status))
3638                 goto out_exit;
3639
3640         if (!iwl_is_associated(priv))
3641                 goto out_exit;
3642
3643         /* channel switch in progress */
3644         if (priv->switch_rxon.switch_in_progress == true)
3645                 goto out_exit;
3646
3647         mutex_lock(&priv->mutex);
3648         if (priv->cfg->ops->lib->set_channel_switch) {
3649
3650                 ch = ieee80211_frequency_to_channel(
3651                         ch_switch->channel->center_freq);
3652                 if (le16_to_cpu(priv->active_rxon.channel) != ch) {
3653                         ch_info = iwl_get_channel_info(priv,
3654                                                        conf->channel->band,
3655                                                        ch);
3656                         if (!is_channel_valid(ch_info)) {
3657                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3658                                 goto out;
3659                         }
3660                         spin_lock_irqsave(&priv->lock, flags);
3661
3662                         priv->current_ht_config.smps = conf->smps_mode;
3663
3664                         /* Configure HT40 channels */
3665                         ht_conf->is_ht = conf_is_ht(conf);
3666                         if (ht_conf->is_ht) {
3667                                 if (conf_is_ht40_minus(conf)) {
3668                                         ht_conf->extension_chan_offset =
3669                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3670                                         ht_conf->is_40mhz = true;
3671                                 } else if (conf_is_ht40_plus(conf)) {
3672                                         ht_conf->extension_chan_offset =
3673                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3674                                         ht_conf->is_40mhz = true;
3675                                 } else {
3676                                         ht_conf->extension_chan_offset =
3677                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3678                                         ht_conf->is_40mhz = false;
3679                                 }
3680                         } else
3681                                 ht_conf->is_40mhz = false;
3682
3683                         /* if we are switching from ht to 2.4 clear flags
3684                          * from any ht related info since 2.4 does not
3685                          * support ht */
3686                         if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
3687                                 priv->staging_rxon.flags = 0;
3688
3689                         iwl_set_rxon_channel(priv, conf->channel);
3690                         iwl_set_rxon_ht(priv, ht_conf);
3691                         iwl_set_flags_for_band(priv, conf->channel->band,
3692                                                priv->vif);
3693                         spin_unlock_irqrestore(&priv->lock, flags);
3694
3695                         iwl_set_rate(priv);
3696                         /*
3697                          * at this point, staging_rxon has the
3698                          * configuration for channel switch
3699                          */
3700                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3701                                                                     ch_switch))
3702                                 priv->switch_rxon.switch_in_progress = false;
3703                 }
3704         }
3705 out:
3706         mutex_unlock(&priv->mutex);
3707 out_exit:
3708         if (!priv->switch_rxon.switch_in_progress)
3709                 ieee80211_chswitch_done(priv->vif, false);
3710         IWL_DEBUG_MAC80211(priv, "leave\n");
3711 }
3712
3713 static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop)
3714 {
3715         struct iwl_priv *priv = hw->priv;
3716
3717         mutex_lock(&priv->mutex);
3718         IWL_DEBUG_MAC80211(priv, "enter\n");
3719
3720         /* do not support "flush" */
3721         if (!priv->cfg->ops->lib->txfifo_flush)
3722                 goto done;
3723
3724         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3725                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3726                 goto done;
3727         }
3728         if (iwl_is_rfkill(priv)) {
3729                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3730                 goto done;
3731         }
3732
3733         /*
3734          * mac80211 will not push any more frames for transmit
3735          * until the flush is completed
3736          */
3737         if (drop) {
3738                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3739                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3740                         IWL_ERR(priv, "flush request fail\n");
3741                         goto done;
3742                 }
3743         }
3744         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3745         iwlagn_wait_tx_queue_empty(priv);
3746 done:
3747         mutex_unlock(&priv->mutex);
3748         IWL_DEBUG_MAC80211(priv, "leave\n");
3749 }
3750
3751 /*****************************************************************************
3752  *
3753  * driver setup and teardown
3754  *
3755  *****************************************************************************/
3756
3757 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3758 {
3759         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3760
3761         init_waitqueue_head(&priv->wait_command_queue);
3762
3763         INIT_WORK(&priv->restart, iwl_bg_restart);
3764         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3765         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3766         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3767         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3768         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3769         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3770
3771         iwl_setup_scan_deferred_work(priv);
3772
3773         if (priv->cfg->ops->lib->setup_deferred_work)
3774                 priv->cfg->ops->lib->setup_deferred_work(priv);
3775
3776         init_timer(&priv->statistics_periodic);
3777         priv->statistics_periodic.data = (unsigned long)priv;
3778         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3779
3780         init_timer(&priv->ucode_trace);
3781         priv->ucode_trace.data = (unsigned long)priv;
3782         priv->ucode_trace.function = iwl_bg_ucode_trace;
3783
3784         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3785                 init_timer(&priv->monitor_recover);
3786                 priv->monitor_recover.data = (unsigned long)priv;
3787                 priv->monitor_recover.function =
3788                         priv->cfg->ops->lib->recover_from_tx_stall;
3789         }
3790
3791         if (!priv->cfg->use_isr_legacy)
3792                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3793                         iwl_irq_tasklet, (unsigned long)priv);
3794         else
3795                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3796                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3797 }
3798
3799 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3800 {
3801         if (priv->cfg->ops->lib->cancel_deferred_work)
3802                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3803
3804         cancel_delayed_work_sync(&priv->init_alive_start);
3805         cancel_delayed_work(&priv->scan_check);
3806         cancel_work_sync(&priv->start_internal_scan);
3807         cancel_delayed_work(&priv->alive_start);
3808         cancel_work_sync(&priv->run_time_calib_work);
3809         cancel_work_sync(&priv->beacon_update);
3810         del_timer_sync(&priv->statistics_periodic);
3811         del_timer_sync(&priv->ucode_trace);
3812         if (priv->cfg->ops->lib->recover_from_tx_stall)
3813                 del_timer_sync(&priv->monitor_recover);
3814 }
3815
3816 static void iwl_init_hw_rates(struct iwl_priv *priv,
3817                               struct ieee80211_rate *rates)
3818 {
3819         int i;
3820
3821         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3822                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3823                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3824                 rates[i].hw_value_short = i;
3825                 rates[i].flags = 0;
3826                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3827                         /*
3828                          * If CCK != 1M then set short preamble rate flag.
3829                          */
3830                         rates[i].flags |=
3831                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3832                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3833                 }
3834         }
3835 }
3836
3837 static int iwl_init_drv(struct iwl_priv *priv)
3838 {
3839         int ret;
3840
3841         priv->ibss_beacon = NULL;
3842
3843         spin_lock_init(&priv->sta_lock);
3844         spin_lock_init(&priv->hcmd_lock);
3845
3846         INIT_LIST_HEAD(&priv->free_frames);
3847
3848         mutex_init(&priv->mutex);
3849         mutex_init(&priv->sync_cmd_mutex);
3850
3851         priv->ieee_channels = NULL;
3852         priv->ieee_rates = NULL;
3853         priv->band = IEEE80211_BAND_2GHZ;
3854
3855         priv->iw_mode = NL80211_IFTYPE_STATION;
3856         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3857         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3858         priv->_agn.agg_tids_count = 0;
3859
3860         /* initialize force reset */
3861         priv->force_reset[IWL_RF_RESET].reset_duration =
3862                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3863         priv->force_reset[IWL_FW_RESET].reset_duration =
3864                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3865
3866         /* Choose which receivers/antennas to use */
3867         if (priv->cfg->ops->hcmd->set_rxon_chain)
3868                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3869
3870         iwl_init_scan_params(priv);
3871
3872         /* Set the tx_power_user_lmt to the lowest power level
3873          * this value will get overwritten by channel max power avg
3874          * from eeprom */
3875         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3876
3877         ret = iwl_init_channel_map(priv);
3878         if (ret) {
3879                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3880                 goto err;
3881         }
3882
3883         ret = iwlcore_init_geos(priv);
3884         if (ret) {
3885                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3886                 goto err_free_channel_map;
3887         }
3888         iwl_init_hw_rates(priv, priv->ieee_rates);
3889
3890         return 0;
3891
3892 err_free_channel_map:
3893         iwl_free_channel_map(priv);
3894 err:
3895         return ret;
3896 }
3897
3898 static void iwl_uninit_drv(struct iwl_priv *priv)
3899 {
3900         iwl_calib_free_results(priv);
3901         iwlcore_free_geos(priv);
3902         iwl_free_channel_map(priv);
3903         kfree(priv->scan_cmd);
3904 }
3905
3906 static struct ieee80211_ops iwl_hw_ops = {
3907         .tx = iwl_mac_tx,
3908         .start = iwl_mac_start,
3909         .stop = iwl_mac_stop,
3910         .add_interface = iwl_mac_add_interface,
3911         .remove_interface = iwl_mac_remove_interface,
3912         .config = iwl_mac_config,
3913         .configure_filter = iwl_configure_filter,
3914         .set_key = iwl_mac_set_key,
3915         .update_tkip_key = iwl_mac_update_tkip_key,
3916         .conf_tx = iwl_mac_conf_tx,
3917         .reset_tsf = iwl_mac_reset_tsf,
3918         .bss_info_changed = iwl_bss_info_changed,
3919         .ampdu_action = iwl_mac_ampdu_action,
3920         .hw_scan = iwl_mac_hw_scan,
3921         .sta_notify = iwl_mac_sta_notify,
3922         .sta_add = iwlagn_mac_sta_add,
3923         .sta_remove = iwl_mac_sta_remove,
3924         .channel_switch = iwl_mac_channel_switch,
3925         .flush = iwl_mac_flush,
3926 };
3927
3928 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3929 {
3930         int err = 0;
3931         struct iwl_priv *priv;
3932         struct ieee80211_hw *hw;
3933         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3934         unsigned long flags;
3935         u16 pci_cmd, num_mac;
3936
3937         /************************
3938          * 1. Allocating HW data
3939          ************************/
3940
3941         /* Disabling hardware scan means that mac80211 will perform scans
3942          * "the hard way", rather than using device's scan. */
3943         if (cfg->mod_params->disable_hw_scan) {
3944                 if (iwl_debug_level & IWL_DL_INFO)
3945                         dev_printk(KERN_DEBUG, &(pdev->dev),
3946                                    "Disabling hw_scan\n");
3947                 iwl_hw_ops.hw_scan = NULL;
3948         }
3949
3950         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3951         if (!hw) {
3952                 err = -ENOMEM;
3953                 goto out;
3954         }
3955         priv = hw->priv;
3956         /* At this point both hw and priv are allocated. */
3957
3958         SET_IEEE80211_DEV(hw, &pdev->dev);
3959
3960         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3961         priv->cfg = cfg;
3962         priv->pci_dev = pdev;
3963         priv->inta_mask = CSR_INI_SET_MASK;
3964
3965         if (iwl_alloc_traffic_mem(priv))
3966                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3967
3968         /**************************
3969          * 2. Initializing PCI bus
3970          **************************/
3971         if (pci_enable_device(pdev)) {
3972                 err = -ENODEV;
3973                 goto out_ieee80211_free_hw;
3974         }
3975
3976         pci_set_master(pdev);
3977
3978         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3979         if (!err)
3980                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3981         if (err) {
3982                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3983                 if (!err)
3984                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3985                 /* both attempts failed: */
3986                 if (err) {
3987                         IWL_WARN(priv, "No suitable DMA available.\n");
3988                         goto out_pci_disable_device;
3989                 }
3990         }
3991
3992         err = pci_request_regions(pdev, DRV_NAME);
3993         if (err)
3994                 goto out_pci_disable_device;
3995
3996         pci_set_drvdata(pdev, priv);
3997
3998
3999         /***********************
4000          * 3. Read REV register
4001          ***********************/
4002         priv->hw_base = pci_iomap(pdev, 0, 0);
4003         if (!priv->hw_base) {
4004                 err = -ENODEV;
4005                 goto out_pci_release_regions;
4006         }
4007
4008         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4009                 (unsigned long long) pci_resource_len(pdev, 0));
4010         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4011
4012         /* these spin locks will be used in apm_ops.init and EEPROM access
4013          * we should init now
4014          */
4015         spin_lock_init(&priv->reg_lock);
4016         spin_lock_init(&priv->lock);
4017
4018         /*
4019          * stop and reset the on-board processor just in case it is in a
4020          * strange state ... like being left stranded by a primary kernel
4021          * and this is now the kdump kernel trying to start up
4022          */
4023         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4024
4025         iwl_hw_detect(priv);
4026         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
4027                 priv->cfg->name, priv->hw_rev);
4028
4029         /* We disable the RETRY_TIMEOUT register (0x41) to keep
4030          * PCI Tx retries from interfering with C3 CPU state */
4031         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4032
4033         iwl_prepare_card_hw(priv);
4034         if (!priv->hw_ready) {
4035                 IWL_WARN(priv, "Failed, HW not ready\n");
4036                 goto out_iounmap;
4037         }
4038
4039         /*****************
4040          * 4. Read EEPROM
4041          *****************/
4042         /* Read the EEPROM */
4043         err = iwl_eeprom_init(priv);
4044         if (err) {
4045                 IWL_ERR(priv, "Unable to init EEPROM\n");
4046                 goto out_iounmap;
4047         }
4048         err = iwl_eeprom_check_version(priv);
4049         if (err)
4050                 goto out_free_eeprom;
4051
4052         /* extract MAC Address */
4053         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
4054         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
4055         priv->hw->wiphy->addresses = priv->addresses;
4056         priv->hw->wiphy->n_addresses = 1;
4057         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
4058         if (num_mac > 1) {
4059                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
4060                        ETH_ALEN);
4061                 priv->addresses[1].addr[5]++;
4062                 priv->hw->wiphy->n_addresses++;
4063         }
4064
4065         /************************
4066          * 5. Setup HW constants
4067          ************************/
4068         if (iwl_set_hw_params(priv)) {
4069                 IWL_ERR(priv, "failed to set hw parameters\n");
4070                 goto out_free_eeprom;
4071         }
4072
4073         /*******************
4074          * 6. Setup priv
4075          *******************/
4076
4077         err = iwl_init_drv(priv);
4078         if (err)
4079                 goto out_free_eeprom;
4080         /* At this point both hw and priv are initialized. */
4081
4082         /********************
4083          * 7. Setup services
4084          ********************/
4085         spin_lock_irqsave(&priv->lock, flags);
4086         iwl_disable_interrupts(priv);
4087         spin_unlock_irqrestore(&priv->lock, flags);
4088
4089         pci_enable_msi(priv->pci_dev);
4090
4091         iwl_alloc_isr_ict(priv);
4092         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4093                           IRQF_SHARED, DRV_NAME, priv);
4094         if (err) {
4095                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4096                 goto out_disable_msi;
4097         }
4098
4099         iwl_setup_deferred_work(priv);
4100         iwl_setup_rx_handlers(priv);
4101
4102         /*********************************************
4103          * 8. Enable interrupts and read RFKILL state
4104          *********************************************/
4105
4106         /* enable interrupts if needed: hw bug w/a */
4107         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4108         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4109                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4110                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4111         }
4112
4113         iwl_enable_interrupts(priv);
4114
4115         /* If platform's RF_KILL switch is NOT set to KILL */
4116         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
4117                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4118         else
4119                 set_bit(STATUS_RF_KILL_HW, &priv->status);
4120
4121         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
4122                 test_bit(STATUS_RF_KILL_HW, &priv->status));
4123
4124         iwl_power_initialize(priv);
4125         iwl_tt_initialize(priv);
4126
4127         init_completion(&priv->_agn.firmware_loading_complete);
4128
4129         err = iwl_request_firmware(priv, true);
4130         if (err)
4131                 goto out_destroy_workqueue;
4132
4133         return 0;
4134
4135  out_destroy_workqueue:
4136         destroy_workqueue(priv->workqueue);
4137         priv->workqueue = NULL;
4138         free_irq(priv->pci_dev->irq, priv);
4139         iwl_free_isr_ict(priv);
4140  out_disable_msi:
4141         pci_disable_msi(priv->pci_dev);
4142         iwl_uninit_drv(priv);
4143  out_free_eeprom:
4144         iwl_eeprom_free(priv);
4145  out_iounmap:
4146         pci_iounmap(pdev, priv->hw_base);
4147  out_pci_release_regions:
4148         pci_set_drvdata(pdev, NULL);
4149         pci_release_regions(pdev);
4150  out_pci_disable_device:
4151         pci_disable_device(pdev);
4152  out_ieee80211_free_hw:
4153         iwl_free_traffic_mem(priv);
4154         ieee80211_free_hw(priv->hw);
4155  out:
4156         return err;
4157 }
4158
4159 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4160 {
4161         struct iwl_priv *priv = pci_get_drvdata(pdev);
4162         unsigned long flags;
4163
4164         if (!priv)
4165                 return;
4166
4167         wait_for_completion(&priv->_agn.firmware_loading_complete);
4168
4169         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4170
4171         iwl_dbgfs_unregister(priv);
4172         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4173
4174         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4175          * to be called and iwl_down since we are removing the device
4176          * we need to set STATUS_EXIT_PENDING bit.
4177          */
4178         set_bit(STATUS_EXIT_PENDING, &priv->status);
4179         if (priv->mac80211_registered) {
4180                 ieee80211_unregister_hw(priv->hw);
4181                 priv->mac80211_registered = 0;
4182         } else {
4183                 iwl_down(priv);
4184         }
4185
4186         /*
4187          * Make sure device is reset to low power before unloading driver.
4188          * This may be redundant with iwl_down(), but there are paths to
4189          * run iwl_down() without calling apm_ops.stop(), and there are
4190          * paths to avoid running iwl_down() at all before leaving driver.
4191          * This (inexpensive) call *makes sure* device is reset.
4192          */
4193         priv->cfg->ops->lib->apm_ops.stop(priv);
4194
4195         iwl_tt_exit(priv);
4196
4197         /* make sure we flush any pending irq or
4198          * tasklet for the driver
4199          */
4200         spin_lock_irqsave(&priv->lock, flags);
4201         iwl_disable_interrupts(priv);
4202         spin_unlock_irqrestore(&priv->lock, flags);
4203
4204         iwl_synchronize_irq(priv);
4205
4206         iwl_dealloc_ucode_pci(priv);
4207
4208         if (priv->rxq.bd)
4209                 iwlagn_rx_queue_free(priv, &priv->rxq);
4210         iwlagn_hw_txq_ctx_free(priv);
4211
4212         iwl_eeprom_free(priv);
4213
4214
4215         /*netif_stop_queue(dev); */
4216         flush_workqueue(priv->workqueue);
4217
4218         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4219          * priv->workqueue... so we can't take down the workqueue
4220          * until now... */
4221         destroy_workqueue(priv->workqueue);
4222         priv->workqueue = NULL;
4223         iwl_free_traffic_mem(priv);
4224
4225         free_irq(priv->pci_dev->irq, priv);
4226         pci_disable_msi(priv->pci_dev);
4227         pci_iounmap(pdev, priv->hw_base);
4228         pci_release_regions(pdev);
4229         pci_disable_device(pdev);
4230         pci_set_drvdata(pdev, NULL);
4231
4232         iwl_uninit_drv(priv);
4233
4234         iwl_free_isr_ict(priv);
4235
4236         if (priv->ibss_beacon)
4237                 dev_kfree_skb(priv->ibss_beacon);
4238
4239         ieee80211_free_hw(priv->hw);
4240 }
4241
4242
4243 /*****************************************************************************
4244  *
4245  * driver and module entry point
4246  *
4247  *****************************************************************************/
4248
4249 /* Hardware specific file defines the PCI IDs table for that hardware module */
4250 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4251 #ifdef CONFIG_IWL4965
4252         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4253         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4254 #endif /* CONFIG_IWL4965 */
4255 #ifdef CONFIG_IWL5000
4256 /* 5100 Series WiFi */
4257         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4258         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4259         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4260         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4261         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4262         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4263         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4264         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4265         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4266         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4267         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4268         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4269         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4270         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4271         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4272         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4273         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4274         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4275         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4276         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4277         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4278         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4279         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4280         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4281
4282 /* 5300 Series WiFi */
4283         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4284         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4285         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4286         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4287         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4288         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4289         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4290         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4291         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4292         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4293         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4294         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4295
4296 /* 5350 Series WiFi/WiMax */
4297         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4298         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4299         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4300
4301 /* 5150 Series Wifi/WiMax */
4302         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4303         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4304         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4305         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4306         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4307         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4308
4309         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4310         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4311         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4312         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4313
4314 /* 6x00 Series */
4315         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4316         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4317         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4318         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4319         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4320         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4321         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4322         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4323         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4324         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4325
4326 /* 6x00 Series Gen2a */
4327         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4328         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4329         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4330         {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4331         {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4332         {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4333         {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4334         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4335         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4336         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4337         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4338         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4339         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4340         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4341
4342 /* 6x00 Series Gen2b */
4343         {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4344         {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4345         {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4346         {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4347         {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4348         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4349         {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4350         {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4351         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4352         {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4353         {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4354         {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4355         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4356         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4357         {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4358         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4359         {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4360         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4361         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4362         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4363         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4364         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4365         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4366         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4367         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4368         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4369         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4370         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4371
4372 /* 6x50 WiFi/WiMax Series */
4373         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4374         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4375         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4376         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4377         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4378         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4379
4380 /* 6x50 WiFi/WiMax Series Gen2 */
4381         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6050g2_bgn_cfg)},
4382         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6050g2_bgn_cfg)},
4383         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6050g2_bgn_cfg)},
4384         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6050g2_bgn_cfg)},
4385         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6050g2_bgn_cfg)},
4386         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6050g2_bgn_cfg)},
4387
4388 /* 1000 Series WiFi */
4389         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4390         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4391         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4392         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4393         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4394         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4395         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4396         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4397         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4398         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4399         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4400         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4401 #endif /* CONFIG_IWL5000 */
4402
4403         {0}
4404 };
4405 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4406
4407 static struct pci_driver iwl_driver = {
4408         .name = DRV_NAME,
4409         .id_table = iwl_hw_card_ids,
4410         .probe = iwl_pci_probe,
4411         .remove = __devexit_p(iwl_pci_remove),
4412 #ifdef CONFIG_PM
4413         .suspend = iwl_pci_suspend,
4414         .resume = iwl_pci_resume,
4415 #endif
4416 };
4417
4418 static int __init iwl_init(void)
4419 {
4420
4421         int ret;
4422         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4423         pr_info(DRV_COPYRIGHT "\n");
4424
4425         ret = iwlagn_rate_control_register();
4426         if (ret) {
4427                 pr_err("Unable to register rate control algorithm: %d\n", ret);
4428                 return ret;
4429         }
4430
4431         ret = pci_register_driver(&iwl_driver);
4432         if (ret) {
4433                 pr_err("Unable to initialize PCI module\n");
4434                 goto error_register;
4435         }
4436
4437         return ret;
4438
4439 error_register:
4440         iwlagn_rate_control_unregister();
4441         return ret;
4442 }
4443
4444 static void __exit iwl_exit(void)
4445 {
4446         pci_unregister_driver(&iwl_driver);
4447         iwlagn_rate_control_unregister();
4448 }
4449
4450 module_exit(iwl_exit);
4451 module_init(iwl_init);
4452
4453 #ifdef CONFIG_IWLWIFI_DEBUG
4454 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4455 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4456 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4457 MODULE_PARM_DESC(debug, "debug output mask");
4458 #endif
4459
4460 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4461 MODULE_PARM_DESC(swcrypto50,
4462                  "using crypto in software (default 0 [hardware]) (deprecated)");
4463 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4464 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4465 module_param_named(queues_num50,
4466                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4467 MODULE_PARM_DESC(queues_num50,
4468                  "number of hw queues in 50xx series (deprecated)");
4469 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4470 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4471 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4472 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4473 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4474 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4475 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4476                    int, S_IRUGO);
4477 MODULE_PARM_DESC(amsdu_size_8K50,
4478                  "enable 8K amsdu size in 50XX series (deprecated)");
4479 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4480                    int, S_IRUGO);
4481 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4482 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4483 MODULE_PARM_DESC(fw_restart50,
4484                  "restart firmware in case of error (deprecated)");
4485 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4486 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4487 module_param_named(
4488         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4489 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4490
4491 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4492                    S_IRUGO);
4493 MODULE_PARM_DESC(ucode_alternative,
4494                  "specify ucode alternative to use from ucode file");