drivers/net/atlx/atl1.c

   1 /*
   2  * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
   3  * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
   4  * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
   5  *
   6  * Derived from Intel e1000 driver
   7  * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms of the GNU General Public License as published by the Free
  11  * Software Foundation; either version 2 of the License, or (at your option)
  12  * any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful, but WITHOUT
  15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  17  * more details.
  18  *
  19  * You should have received a copy of the GNU General Public License along with
  20  * this program; if not, write to the Free Software Foundation, Inc., 59
  21  * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  22  *
  23  * The full GNU General Public License is included in this distribution in the
  24  * file called COPYING.
  25  *
  26  * Contact Information:
  27  * Xiong Huang <xiong_huang@attansic.com>
  28  * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
  29  * Xinzhu  302, TAIWAN, REPUBLIC OF CHINA
  30  *
  31  * Chris Snook <csnook@redhat.com>
  32  * Jay Cliburn <jcliburn@gmail.com>
  33  *
  34  * This version is adapted from the Attansic reference driver for
  35  * inclusion in the Linux kernel.  It is currently under heavy development.
  36  * A very incomplete list of things that need to be dealt with:
  37  *
  38  * TODO:
  39  * Wake on LAN.
  40  * Add more ethtool functions.
  41  * Fix abstruse irq enable/disable condition described here:
  42  *      http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
  43  *
  44  * NEEDS TESTING:
  45  * VLAN
  46  * multicast
  47  * promiscuous mode
  48  * interrupt coalescing
  49  * SMP torture testing
  50  */
  51
  52 #include <asm/atomic.h>
  53 #include <asm/byteorder.h>
  54
  55 #include <linux/compiler.h>
  56 #include <linux/crc32.h>
  57 #include <linux/delay.h>
  58 #include <linux/dma-mapping.h>
  59 #include <linux/etherdevice.h>
  60 #include <linux/hardirq.h>
  61 #include <linux/if_ether.h>
  62 #include <linux/if_vlan.h>
  63 #include <linux/in.h>
  64 #include <linux/interrupt.h>
  65 #include <linux/ip.h>
  66 #include <linux/irqflags.h>
  67 #include <linux/irqreturn.h>
  68 #include <linux/jiffies.h>
  69 #include <linux/mii.h>
  70 #include <linux/module.h>
  71 #include <linux/moduleparam.h>
  72 #include <linux/net.h>
  73 #include <linux/netdevice.h>
  74 #include <linux/pci.h>
  75 #include <linux/pci_ids.h>
  76 #include <linux/pm.h>
  77 #include <linux/skbuff.h>
  78 #include <linux/slab.h>
  79 #include <linux/spinlock.h>
  80 #include <linux/string.h>
  81 #include <linux/tcp.h>
  82 #include <linux/timer.h>
  83 #include <linux/types.h>
  84 #include <linux/workqueue.h>
  85
  86 #include <net/checksum.h>
  87
  88 #include "atl1.h"
  89
  90 /* Temporary hack for merging atl1 and atl2 */
  91 #include "atlx.c"
  92
  93 /*
  94  * atl1_pci_tbl - PCI Device ID Table
  95  */
  96 static const struct pci_device_id atl1_pci_tbl[] = {
  97         {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
  98         /* required last entry */
  99         {0,}
 100 };
 101 MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
 102
 103 static const u32 atl1_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
 104         NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
 105
 106 static int debug = -1;
 107 module_param(debug, int, 0);
 108 MODULE_PARM_DESC(debug, "Message level (0=none,...,16=all)");
 109
 110 /*
 111  * Reset the transmit and receive units; mask and clear all interrupts.
 112  * hw - Struct containing variables accessed by shared code
 113  * return : 0  or  idle status (if error)
 114  */
 115 static s32 atl1_reset_hw(struct atl1_hw *hw)
 116 {
 117         struct pci_dev *pdev = hw->back->pdev;
 118         struct atl1_adapter *adapter = hw->back;
 119         u32 icr;
 120         int i;
 121
 122         /*
 123          * Clear Interrupt mask to stop board from generating
 124          * interrupts & Clear any pending interrupt events
 125          */
 126         /*
 127          * iowrite32(0, hw->hw_addr + REG_IMR);
 128          * iowrite32(0xffffffff, hw->hw_addr + REG_ISR);
 129          */
 130
 131         /*
 132          * Issue Soft Reset to the MAC.  This will reset the chip's
 133          * transmit, receive, DMA.  It will not effect
 134          * the current PCI configuration.  The global reset bit is self-
 135          * clearing, and should clear within a microsecond.
 136          */
 137         iowrite32(MASTER_CTRL_SOFT_RST, hw->hw_addr + REG_MASTER_CTRL);
 138         ioread32(hw->hw_addr + REG_MASTER_CTRL);
 139
 140         iowrite16(1, hw->hw_addr + REG_PHY_ENABLE);
 141         ioread16(hw->hw_addr + REG_PHY_ENABLE);
 142
 143         /* delay about 1ms */
 144         msleep(1);
 145
 146         /* Wait at least 10ms for All module to be Idle */
 147         for (i = 0; i < 10; i++) {
 148                 icr = ioread32(hw->hw_addr + REG_IDLE_STATUS);
 149                 if (!icr)
 150                         break;
 151                 /* delay 1 ms */
 152                 msleep(1);
 153                 /* FIXME: still the right way to do this? */
 154                 cpu_relax();
 155         }
 156
 157         if (icr) {
 158                 if (netif_msg_hw(adapter))
 159                         dev_dbg(&pdev->dev, "ICR = 0x%x\n", icr);
 160                 return icr;
 161         }
 162
 163         return 0;
 164 }
 165
 166 /* function about EEPROM
 167  *
 168  * check_eeprom_exist
 169  * return 0 if eeprom exist
 170  */
 171 static int atl1_check_eeprom_exist(struct atl1_hw *hw)
 172 {
 173         u32 value;
 174         value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 175         if (value & SPI_FLASH_CTRL_EN_VPD) {
 176                 value &= ~SPI_FLASH_CTRL_EN_VPD;
 177                 iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 178         }
 179
 180         value = ioread16(hw->hw_addr + REG_PCIE_CAP_LIST);
 181         return ((value & 0xFF00) == 0x6C00) ? 0 : 1;
 182 }
 183
 184 static bool atl1_read_eeprom(struct atl1_hw *hw, u32 offset, u32 *p_value)
 185 {
 186         int i;
 187         u32 control;
 188
 189         if (offset & 3)
 190                 /* address do not align */
 191                 return false;
 192
 193         iowrite32(0, hw->hw_addr + REG_VPD_DATA);
 194         control = (offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
 195         iowrite32(control, hw->hw_addr + REG_VPD_CAP);
 196         ioread32(hw->hw_addr + REG_VPD_CAP);
 197
 198         for (i = 0; i < 10; i++) {
 199                 msleep(2);
 200                 control = ioread32(hw->hw_addr + REG_VPD_CAP);
 201                 if (control & VPD_CAP_VPD_FLAG)
 202                         break;
 203         }
 204         if (control & VPD_CAP_VPD_FLAG) {
 205                 *p_value = ioread32(hw->hw_addr + REG_VPD_DATA);
 206                 return true;
 207         }
 208         /* timeout */
 209         return false;
 210 }
 211
 212 /*
 213  * Reads the value from a PHY register
 214  * hw - Struct containing variables accessed by shared code
 215  * reg_addr - address of the PHY register to read
 216  */
 217 s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data)
 218 {
 219         u32 val;
 220         int i;
 221
 222         val = ((u32) (reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
 223                 MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW | MDIO_CLK_25_4 <<
 224                 MDIO_CLK_SEL_SHIFT;
 225         iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
 226         ioread32(hw->hw_addr + REG_MDIO_CTRL);
 227
 228         for (i = 0; i < MDIO_WAIT_TIMES; i++) {
 229                 udelay(2);
 230                 val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 231                 if (!(val & (MDIO_START | MDIO_BUSY)))
 232                         break;
 233         }
 234         if (!(val & (MDIO_START | MDIO_BUSY))) {
 235                 *phy_data = (u16) val;
 236                 return 0;
 237         }
 238         return ATLX_ERR_PHY;
 239 }
 240
 241 #define CUSTOM_SPI_CS_SETUP     2
 242 #define CUSTOM_SPI_CLK_HI       2
 243 #define CUSTOM_SPI_CLK_LO       2
 244 #define CUSTOM_SPI_CS_HOLD      2
 245 #define CUSTOM_SPI_CS_HI        3
 246
 247 static bool atl1_spi_read(struct atl1_hw *hw, u32 addr, u32 *buf)
 248 {
 249         int i;
 250         u32 value;
 251
 252         iowrite32(0, hw->hw_addr + REG_SPI_DATA);
 253         iowrite32(addr, hw->hw_addr + REG_SPI_ADDR);
 254
 255         value = SPI_FLASH_CTRL_WAIT_READY |
 256             (CUSTOM_SPI_CS_SETUP & SPI_FLASH_CTRL_CS_SETUP_MASK) <<
 257             SPI_FLASH_CTRL_CS_SETUP_SHIFT | (CUSTOM_SPI_CLK_HI &
 258                                              SPI_FLASH_CTRL_CLK_HI_MASK) <<
 259             SPI_FLASH_CTRL_CLK_HI_SHIFT | (CUSTOM_SPI_CLK_LO &
 260                                            SPI_FLASH_CTRL_CLK_LO_MASK) <<
 261             SPI_FLASH_CTRL_CLK_LO_SHIFT | (CUSTOM_SPI_CS_HOLD &
 262                                            SPI_FLASH_CTRL_CS_HOLD_MASK) <<
 263             SPI_FLASH_CTRL_CS_HOLD_SHIFT | (CUSTOM_SPI_CS_HI &
 264                                             SPI_FLASH_CTRL_CS_HI_MASK) <<
 265             SPI_FLASH_CTRL_CS_HI_SHIFT | (1 & SPI_FLASH_CTRL_INS_MASK) <<
 266             SPI_FLASH_CTRL_INS_SHIFT;
 267
 268         iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 269
 270         value |= SPI_FLASH_CTRL_START;
 271         iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 272         ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 273
 274         for (i = 0; i < 10; i++) {
 275                 msleep(1);
 276                 value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 277                 if (!(value & SPI_FLASH_CTRL_START))
 278                         break;
 279         }
 280
 281         if (value & SPI_FLASH_CTRL_START)
 282                 return false;
 283
 284         *buf = ioread32(hw->hw_addr + REG_SPI_DATA);
 285
 286         return true;
 287 }
 288
 289 /*
 290  * get_permanent_address
 291  * return 0 if get valid mac address,
 292  */
 293 static int atl1_get_permanent_address(struct atl1_hw *hw)
 294 {
 295         u32 addr[2];
 296         u32 i, control;
 297         u16 reg;
 298         u8 eth_addr[ETH_ALEN];
 299         bool key_valid;
 300
 301         if (is_valid_ether_addr(hw->perm_mac_addr))
 302                 return 0;
 303
 304         /* init */
 305         addr[0] = addr[1] = 0;
 306
 307         if (!atl1_check_eeprom_exist(hw)) {
 308                 reg = 0;
 309                 key_valid = false;
 310                 /* Read out all EEPROM content */
 311                 i = 0;
 312                 while (1) {
 313                         if (atl1_read_eeprom(hw, i + 0x100, &control)) {
 314                                 if (key_valid) {
 315                                         if (reg == REG_MAC_STA_ADDR)
 316                                                 addr[0] = control;
 317                                         else if (reg == (REG_MAC_STA_ADDR + 4))
 318                                                 addr[1] = control;
 319                                         key_valid = false;
 320                                 } else if ((control & 0xff) == 0x5A) {
 321                                         key_valid = true;
 322                                         reg = (u16) (control >> 16);
 323                                 } else
 324                                         break;
 325                         } else
 326                                 /* read error */
 327                                 break;
 328                         i += 4;
 329                 }
 330
 331                 *(u32 *) &eth_addr[2] = swab32(addr[0]);
 332                 *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 333                 if (is_valid_ether_addr(eth_addr)) {
 334                         memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 335                         return 0;
 336                 }
 337                 return 1;
 338         }
 339
 340         /* see if SPI FLAGS exist ? */
 341         addr[0] = addr[1] = 0;
 342         reg = 0;
 343         key_valid = false;
 344         i = 0;
 345         while (1) {
 346                 if (atl1_spi_read(hw, i + 0x1f000, &control)) {
 347                         if (key_valid) {
 348                                 if (reg == REG_MAC_STA_ADDR)
 349                                         addr[0] = control;
 350                                 else if (reg == (REG_MAC_STA_ADDR + 4))
 351                                         addr[1] = control;
 352                                 key_valid = false;
 353                         } else if ((control & 0xff) == 0x5A) {
 354                                 key_valid = true;
 355                                 reg = (u16) (control >> 16);
 356                         } else
 357                                 /* data end */
 358                                 break;
 359                 } else
 360                         /* read error */
 361                         break;
 362                 i += 4;
 363         }
 364
 365         *(u32 *) &eth_addr[2] = swab32(addr[0]);
 366         *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 367         if (is_valid_ether_addr(eth_addr)) {
 368                 memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 369                 return 0;
 370         }
 371
 372         /*
 373          * On some motherboards, the MAC address is written by the
 374          * BIOS directly to the MAC register during POST, and is
 375          * not stored in eeprom.  If all else thus far has failed
 376          * to fetch the permanent MAC address, try reading it directly.
 377          */
 378         addr[0] = ioread32(hw->hw_addr + REG_MAC_STA_ADDR);
 379         addr[1] = ioread16(hw->hw_addr + (REG_MAC_STA_ADDR + 4));
 380         *(u32 *) &eth_addr[2] = swab32(addr[0]);
 381         *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 382         if (is_valid_ether_addr(eth_addr)) {
 383                 memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 384                 return 0;
 385         }
 386
 387         return 1;
 388 }
 389
 390 /*
 391  * Reads the adapter's MAC address from the EEPROM
 392  * hw - Struct containing variables accessed by shared code
 393  */
 394 s32 atl1_read_mac_addr(struct atl1_hw *hw)
 395 {
 396         u16 i;
 397
 398         if (atl1_get_permanent_address(hw))
 399                 random_ether_addr(hw->perm_mac_addr);
 400
 401         for (i = 0; i < ETH_ALEN; i++)
 402                 hw->mac_addr[i] = hw->perm_mac_addr[i];
 403         return 0;
 404 }
 405
 406 /*
 407  * Hashes an address to determine its location in the multicast table
 408  * hw - Struct containing variables accessed by shared code
 409  * mc_addr - the multicast address to hash
 410  *
 411  * atl1_hash_mc_addr
 412  *  purpose
 413  *      set hash value for a multicast address
 414  *      hash calcu processing :
 415  *          1. calcu 32bit CRC for multicast address
 416  *          2. reverse crc with MSB to LSB
 417  */
 418 u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr)
 419 {
 420         u32 crc32, value = 0;
 421         int i;
 422
 423         crc32 = ether_crc_le(6, mc_addr);
 424         for (i = 0; i < 32; i++)
 425                 value |= (((crc32 >> i) & 1) << (31 - i));
 426
 427         return value;
 428 }
 429
 430 /*
 431  * Sets the bit in the multicast table corresponding to the hash value.
 432  * hw - Struct containing variables accessed by shared code
 433  * hash_value - Multicast address hash value
 434  */
 435 void atl1_hash_set(struct atl1_hw *hw, u32 hash_value)
 436 {
 437         u32 hash_bit, hash_reg;
 438         u32 mta;
 439
 440         /*
 441          * The HASH Table  is a register array of 2 32-bit registers.
 442          * It is treated like an array of 64 bits.  We want to set
 443          * bit BitArray[hash_value]. So we figure out what register
 444          * the bit is in, read it, OR in the new bit, then write
 445          * back the new value.  The register is determined by the
 446          * upper 7 bits of the hash value and the bit within that
 447          * register are determined by the lower 5 bits of the value.
 448          */
 449         hash_reg = (hash_value >> 31) & 0x1;
 450         hash_bit = (hash_value >> 26) & 0x1F;
 451         mta = ioread32((hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
 452         mta |= (1 << hash_bit);
 453         iowrite32(mta, (hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
 454 }
 455
 456 /*
 457  * Writes a value to a PHY register
 458  * hw - Struct containing variables accessed by shared code
 459  * reg_addr - address of the PHY register to write
 460  * data - data to write to the PHY
 461  */
 462 static s32 atl1_write_phy_reg(struct atl1_hw *hw, u32 reg_addr, u16 phy_data)
 463 {
 464         int i;
 465         u32 val;
 466
 467         val = ((u32) (phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |
 468             (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
 469             MDIO_SUP_PREAMBLE |
 470             MDIO_START | MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
 471         iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
 472         ioread32(hw->hw_addr + REG_MDIO_CTRL);
 473
 474         for (i = 0; i < MDIO_WAIT_TIMES; i++) {
 475                 udelay(2);
 476                 val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 477                 if (!(val & (MDIO_START | MDIO_BUSY)))
 478                         break;
 479         }
 480
 481         if (!(val & (MDIO_START | MDIO_BUSY)))
 482                 return 0;
 483
 484         return ATLX_ERR_PHY;
 485 }
 486
 487 /*
 488  * Make L001's PHY out of Power Saving State (bug)
 489  * hw - Struct containing variables accessed by shared code
 490  * when power on, L001's PHY always on Power saving State
 491  * (Gigabit Link forbidden)
 492  */
 493 static s32 atl1_phy_leave_power_saving(struct atl1_hw *hw)
 494 {
 495         s32 ret;
 496         ret = atl1_write_phy_reg(hw, 29, 0x0029);
 497         if (ret)
 498                 return ret;
 499         return atl1_write_phy_reg(hw, 30, 0);
 500 }
 501
 502 /*
 503  *TODO: do something or get rid of this
 504  */
 505 #ifdef CONFIG_PM
 506 static s32 atl1_phy_enter_power_saving(struct atl1_hw *hw)
 507 {
 508 /*    s32 ret_val;
 509  *    u16 phy_data;
 510  */
 511
 512 /*
 513     ret_val = atl1_write_phy_reg(hw, ...);
 514     ret_val = atl1_write_phy_reg(hw, ...);
 515     ....
 516 */
 517         return 0;
 518 }
 519 #endif
 520
 521 /*
 522  * Resets the PHY and make all config validate
 523  * hw - Struct containing variables accessed by shared code
 524  *
 525  * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
 526  */
 527 static s32 atl1_phy_reset(struct atl1_hw *hw)
 528 {
 529         struct pci_dev *pdev = hw->back->pdev;
 530         struct atl1_adapter *adapter = hw->back;
 531         s32 ret_val;
 532         u16 phy_data;
 533
 534         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
 535             hw->media_type == MEDIA_TYPE_1000M_FULL)
 536                 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
 537         else {
 538                 switch (hw->media_type) {
 539                 case MEDIA_TYPE_100M_FULL:
 540                         phy_data =
 541                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
 542                             MII_CR_RESET;
 543                         break;
 544                 case MEDIA_TYPE_100M_HALF:
 545                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
 546                         break;
 547                 case MEDIA_TYPE_10M_FULL:
 548                         phy_data =
 549                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
 550                         break;
 551                 default:
 552                         /* MEDIA_TYPE_10M_HALF: */
 553                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
 554                         break;
 555                 }
 556         }
 557
 558         ret_val = atl1_write_phy_reg(hw, MII_BMCR, phy_data);
 559         if (ret_val) {
 560                 u32 val;
 561                 int i;
 562                 /* pcie serdes link may be down! */
 563                 if (netif_msg_hw(adapter))
 564                         dev_dbg(&pdev->dev, "pcie phy link down\n");
 565
 566                 for (i = 0; i < 25; i++) {
 567                         msleep(1);
 568                         val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 569                         if (!(val & (MDIO_START | MDIO_BUSY)))
 570                                 break;
 571                 }
 572
 573                 if ((val & (MDIO_START | MDIO_BUSY)) != 0) {
 574                         if (netif_msg_hw(adapter))
 575                                 dev_warn(&pdev->dev,
 576                                         "pcie link down at least 25ms\n");
 577                         return ret_val;
 578                 }
 579         }
 580         return 0;
 581 }
 582
 583 /*
 584  * Configures PHY autoneg and flow control advertisement settings
 585  * hw - Struct containing variables accessed by shared code
 586  */
 587 static s32 atl1_phy_setup_autoneg_adv(struct atl1_hw *hw)
 588 {
 589         s32 ret_val;
 590         s16 mii_autoneg_adv_reg;
 591         s16 mii_1000t_ctrl_reg;
 592
 593         /* Read the MII Auto-Neg Advertisement Register (Address 4). */
 594         mii_autoneg_adv_reg = MII_AR_DEFAULT_CAP_MASK;
 595
 596         /* Read the MII 1000Base-T Control Register (Address 9). */
 597         mii_1000t_ctrl_reg = MII_ATLX_CR_1000T_DEFAULT_CAP_MASK;
 598
 599         /*
 600          * First we clear all the 10/100 mb speed bits in the Auto-Neg
 601          * Advertisement Register (Address 4) and the 1000 mb speed bits in
 602          * the  1000Base-T Control Register (Address 9).
 603          */
 604         mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK;
 605         mii_1000t_ctrl_reg &= ~MII_ATLX_CR_1000T_SPEED_MASK;
 606
 607         /*
 608          * Need to parse media_type  and set up
 609          * the appropriate PHY registers.
 610          */
 611         switch (hw->media_type) {
 612         case MEDIA_TYPE_AUTO_SENSOR:
 613                 mii_autoneg_adv_reg |= (MII_AR_10T_HD_CAPS |
 614                                         MII_AR_10T_FD_CAPS |
 615                                         MII_AR_100TX_HD_CAPS |
 616                                         MII_AR_100TX_FD_CAPS);
 617                 mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
 618                 break;
 619
 620         case MEDIA_TYPE_1000M_FULL:
 621                 mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
 622                 break;
 623
 624         case MEDIA_TYPE_100M_FULL:
 625                 mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS;
 626                 break;
 627
 628         case MEDIA_TYPE_100M_HALF:
 629                 mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS;
 630                 break;
 631
 632         case MEDIA_TYPE_10M_FULL:
 633                 mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS;
 634                 break;
 635
 636         default:
 637                 mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS;
 638                 break;
 639         }
 640
 641         /* flow control fixed to enable all */
 642         mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE);
 643
 644         hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg;
 645         hw->mii_1000t_ctrl_reg = mii_1000t_ctrl_reg;
 646
 647         ret_val = atl1_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
 648         if (ret_val)
 649                 return ret_val;
 650
 651         ret_val = atl1_write_phy_reg(hw, MII_ATLX_CR, mii_1000t_ctrl_reg);
 652         if (ret_val)
 653                 return ret_val;
 654
 655         return 0;
 656 }
 657
 658 /*
 659  * Configures link settings.
 660  * hw - Struct containing variables accessed by shared code
 661  * Assumes the hardware has previously been reset and the
 662  * transmitter and receiver are not enabled.
 663  */
 664 static s32 atl1_setup_link(struct atl1_hw *hw)
 665 {
 666         struct pci_dev *pdev = hw->back->pdev;
 667         struct atl1_adapter *adapter = hw->back;
 668         s32 ret_val;
 669
 670         /*
 671          * Options:
 672          *  PHY will advertise value(s) parsed from
 673          *  autoneg_advertised and fc
 674          *  no matter what autoneg is , We will not wait link result.
 675          */
 676         ret_val = atl1_phy_setup_autoneg_adv(hw);
 677         if (ret_val) {
 678                 if (netif_msg_link(adapter))
 679                         dev_dbg(&pdev->dev,
 680                                 "error setting up autonegotiation\n");
 681                 return ret_val;
 682         }
 683         /* SW.Reset , En-Auto-Neg if needed */
 684         ret_val = atl1_phy_reset(hw);
 685         if (ret_val) {
 686                 if (netif_msg_link(adapter))
 687                         dev_dbg(&pdev->dev, "error resetting phy\n");
 688                 return ret_val;
 689         }
 690         hw->phy_configured = true;
 691         return ret_val;
 692 }
 693
 694 static void atl1_init_flash_opcode(struct atl1_hw *hw)
 695 {
 696         if (hw->flash_vendor >= ARRAY_SIZE(flash_table))
 697                 /* Atmel */
 698                 hw->flash_vendor = 0;
 699
 700         /* Init OP table */
 701         iowrite8(flash_table[hw->flash_vendor].cmd_program,
 702                 hw->hw_addr + REG_SPI_FLASH_OP_PROGRAM);
 703         iowrite8(flash_table[hw->flash_vendor].cmd_sector_erase,
 704                 hw->hw_addr + REG_SPI_FLASH_OP_SC_ERASE);
 705         iowrite8(flash_table[hw->flash_vendor].cmd_chip_erase,
 706                 hw->hw_addr + REG_SPI_FLASH_OP_CHIP_ERASE);
 707         iowrite8(flash_table[hw->flash_vendor].cmd_rdid,
 708                 hw->hw_addr + REG_SPI_FLASH_OP_RDID);
 709         iowrite8(flash_table[hw->flash_vendor].cmd_wren,
 710                 hw->hw_addr + REG_SPI_FLASH_OP_WREN);
 711         iowrite8(flash_table[hw->flash_vendor].cmd_rdsr,
 712                 hw->hw_addr + REG_SPI_FLASH_OP_RDSR);
 713         iowrite8(flash_table[hw->flash_vendor].cmd_wrsr,
 714                 hw->hw_addr + REG_SPI_FLASH_OP_WRSR);
 715         iowrite8(flash_table[hw->flash_vendor].cmd_read,
 716                 hw->hw_addr + REG_SPI_FLASH_OP_READ);
 717 }
 718
 719 /*
 720  * Performs basic configuration of the adapter.
 721  * hw - Struct containing variables accessed by shared code
 722  * Assumes that the controller has previously been reset and is in a
 723  * post-reset uninitialized state. Initializes multicast table,
 724  * and  Calls routines to setup link
 725  * Leaves the transmit and receive units disabled and uninitialized.
 726  */
 727 static s32 atl1_init_hw(struct atl1_hw *hw)
 728 {
 729         u32 ret_val = 0;
 730
 731         /* Zero out the Multicast HASH table */
 732         iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
 733         /* clear the old settings from the multicast hash table */
 734         iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
 735
 736         atl1_init_flash_opcode(hw);
 737
 738         if (!hw->phy_configured) {
 739                 /* enable GPHY LinkChange Interrrupt */
 740                 ret_val = atl1_write_phy_reg(hw, 18, 0xC00);
 741                 if (ret_val)
 742                         return ret_val;
 743                 /* make PHY out of power-saving state */
 744                 ret_val = atl1_phy_leave_power_saving(hw);
 745                 if (ret_val)
 746                         return ret_val;
 747                 /* Call a subroutine to configure the link */
 748                 ret_val = atl1_setup_link(hw);
 749         }
 750         return ret_val;
 751 }
 752
 753 /*
 754  * Detects the current speed and duplex settings of the hardware.
 755  * hw - Struct containing variables accessed by shared code
 756  * speed - Speed of the connection
 757  * duplex - Duplex setting of the connection
 758  */
 759 static s32 atl1_get_speed_and_duplex(struct atl1_hw *hw, u16 *speed, u16 *duplex)
 760 {
 761         struct pci_dev *pdev = hw->back->pdev;
 762         struct atl1_adapter *adapter = hw->back;
 763         s32 ret_val;
 764         u16 phy_data;
 765
 766         /* ; --- Read   PHY Specific Status Register (17) */
 767         ret_val = atl1_read_phy_reg(hw, MII_ATLX_PSSR, &phy_data);
 768         if (ret_val)
 769                 return ret_val;
 770
 771         if (!(phy_data & MII_ATLX_PSSR_SPD_DPLX_RESOLVED))
 772                 return ATLX_ERR_PHY_RES;
 773
 774         switch (phy_data & MII_ATLX_PSSR_SPEED) {
 775         case MII_ATLX_PSSR_1000MBS:
 776                 *speed = SPEED_1000;
 777                 break;
 778         case MII_ATLX_PSSR_100MBS:
 779                 *speed = SPEED_100;
 780                 break;
 781         case MII_ATLX_PSSR_10MBS:
 782                 *speed = SPEED_10;
 783                 break;
 784         default:
 785                 if (netif_msg_hw(adapter))
 786                         dev_dbg(&pdev->dev, "error getting speed\n");
 787                 return ATLX_ERR_PHY_SPEED;
 788                 break;
 789         }
 790         if (phy_data & MII_ATLX_PSSR_DPLX)
 791                 *duplex = FULL_DUPLEX;
 792         else
 793                 *duplex = HALF_DUPLEX;
 794
 795         return 0;
 796 }
 797
 798 void atl1_set_mac_addr(struct atl1_hw *hw)
 799 {
 800         u32 value;
 801         /*
 802          * 00-0B-6A-F6-00-DC
 803          * 0:  6AF600DC   1: 000B
 804          * low dword
 805          */
 806         value = (((u32) hw->mac_addr[2]) << 24) |
 807             (((u32) hw->mac_addr[3]) << 16) |
 808             (((u32) hw->mac_addr[4]) << 8) | (((u32) hw->mac_addr[5]));
 809         iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
 810         /* high dword */
 811         value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
 812         iowrite32(value, (hw->hw_addr + REG_MAC_STA_ADDR) + (1 << 2));
 813 }
 814
 815 /*
 816  * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
 817  * @adapter: board private structure to initialize
 818  *
 819  * atl1_sw_init initializes the Adapter private data structure.
 820  * Fields are initialized based on PCI device information and
 821  * OS network device settings (MTU size).
 822  */
 823 static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
 824 {
 825         struct atl1_hw *hw = &adapter->hw;
 826         struct net_device *netdev = adapter->netdev;
 827
 828         hw->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
 829         hw->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
 830
 831         adapter->wol = 0;
 832         adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
 833         adapter->ict = 50000;           /* 100ms */
 834         adapter->link_speed = SPEED_0;  /* hardware init */
 835         adapter->link_duplex = FULL_DUPLEX;
 836
 837         hw->phy_configured = false;
 838         hw->preamble_len = 7;
 839         hw->ipgt = 0x60;
 840         hw->min_ifg = 0x50;
 841         hw->ipgr1 = 0x40;
 842         hw->ipgr2 = 0x60;
 843         hw->max_retry = 0xf;
 844         hw->lcol = 0x37;
 845         hw->jam_ipg = 7;
 846         hw->rfd_burst = 8;
 847         hw->rrd_burst = 8;
 848         hw->rfd_fetch_gap = 1;
 849         hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
 850         hw->rx_jumbo_lkah = 1;
 851         hw->rrd_ret_timer = 16;
 852         hw->tpd_burst = 4;
 853         hw->tpd_fetch_th = 16;
 854         hw->txf_burst = 0x100;
 855         hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
 856         hw->tpd_fetch_gap = 1;
 857         hw->rcb_value = atl1_rcb_64;
 858         hw->dma_ord = atl1_dma_ord_enh;
 859         hw->dmar_block = atl1_dma_req_256;
 860         hw->dmaw_block = atl1_dma_req_256;
 861         hw->cmb_rrd = 4;
 862         hw->cmb_tpd = 4;
 863         hw->cmb_rx_timer = 1;   /* about 2us */
 864         hw->cmb_tx_timer = 1;   /* about 2us */
 865         hw->smb_timer = 100000; /* about 200ms */
 866
 867         spin_lock_init(&adapter->lock);
 868         spin_lock_init(&adapter->mb_lock);
 869
 870         return 0;
 871 }
 872
 873 static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
 874 {
 875         struct atl1_adapter *adapter = netdev_priv(netdev);
 876         u16 result;
 877
 878         atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
 879
 880         return result;
 881 }
 882
 883 static void mdio_write(struct net_device *netdev, int phy_id, int reg_num,
 884         int val)
 885 {
 886         struct atl1_adapter *adapter = netdev_priv(netdev);
 887
 888         atl1_write_phy_reg(&adapter->hw, reg_num, val);
 889 }
 890
 891 /*
 892  * atl1_mii_ioctl -
 893  * @netdev:
 894  * @ifreq:
 895  * @cmd:
 896  */
 897 static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
 898 {
 899         struct atl1_adapter *adapter = netdev_priv(netdev);
 900         unsigned long flags;
 901         int retval;
 902
 903         if (!netif_running(netdev))
 904                 return -EINVAL;
 905
 906         spin_lock_irqsave(&adapter->lock, flags);
 907         retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
 908         spin_unlock_irqrestore(&adapter->lock, flags);
 909
 910         return retval;
 911 }
 912
 913 /*
 914  * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
 915  * @adapter: board private structure
 916  *
 917  * Return 0 on success, negative on failure
 918  */
 919 static s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
 920 {
 921         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
 922         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
 923         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
 924         struct atl1_ring_header *ring_header = &adapter->ring_header;
 925         struct pci_dev *pdev = adapter->pdev;
 926         int size;
 927         u8 offset = 0;
 928
 929         size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
 930         tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
 931         if (unlikely(!tpd_ring->buffer_info)) {
 932                 if (netif_msg_drv(adapter))
 933                         dev_err(&pdev->dev, "kzalloc failed , size = D%d\n",
 934                                 size);
 935                 goto err_nomem;
 936         }
 937         rfd_ring->buffer_info =
 938                 (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
 939
 940         /*
 941          * real ring DMA buffer
 942          * each ring/block may need up to 8 bytes for alignment, hence the
 943          * additional 40 bytes tacked onto the end.
 944          */
 945         ring_header->size = size =
 946                 sizeof(struct tx_packet_desc) * tpd_ring->count
 947                 + sizeof(struct rx_free_desc) * rfd_ring->count
 948                 + sizeof(struct rx_return_desc) * rrd_ring->count
 949                 + sizeof(struct coals_msg_block)
 950                 + sizeof(struct stats_msg_block)
 951                 + 40;
 952
 953         ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
 954                 &ring_header->dma);
 955         if (unlikely(!ring_header->desc)) {
 956                 if (netif_msg_drv(adapter))
 957                         dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
 958                 goto err_nomem;
 959         }
 960
 961         memset(ring_header->desc, 0, ring_header->size);
 962
 963         /* init TPD ring */
 964         tpd_ring->dma = ring_header->dma;
 965         offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
 966         tpd_ring->dma += offset;
 967         tpd_ring->desc = (u8 *) ring_header->desc + offset;
 968         tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
 969
 970         /* init RFD ring */
 971         rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
 972         offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
 973         rfd_ring->dma += offset;
 974         rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
 975         rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
 976
 977
 978         /* init RRD ring */
 979         rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
 980         offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
 981         rrd_ring->dma += offset;
 982         rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
 983         rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
 984
 985
 986         /* init CMB */
 987         adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
 988         offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
 989         adapter->cmb.dma += offset;
 990         adapter->cmb.cmb = (struct coals_msg_block *)
 991                 ((u8 *) rrd_ring->desc + (rrd_ring->size + offset));
 992
 993         /* init SMB */
 994         adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
 995         offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
 996         adapter->smb.dma += offset;
 997         adapter->smb.smb = (struct stats_msg_block *)
 998                 ((u8 *) adapter->cmb.cmb +
 999                 (sizeof(struct coals_msg_block) + offset));
1000
1001         return 0;
1002
1003 err_nomem:
1004         kfree(tpd_ring->buffer_info);
1005         return -ENOMEM;
1006 }
1007
1008 static void atl1_init_ring_ptrs(struct atl1_adapter *adapter)
1009 {
1010         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1011         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1012         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1013
1014         atomic_set(&tpd_ring->next_to_use, 0);
1015         atomic_set(&tpd_ring->next_to_clean, 0);
1016
1017         rfd_ring->next_to_clean = 0;
1018         atomic_set(&rfd_ring->next_to_use, 0);
1019
1020         rrd_ring->next_to_use = 0;
1021         atomic_set(&rrd_ring->next_to_clean, 0);
1022 }
1023
1024 /*
1025  * atl1_clean_rx_ring - Free RFD Buffers
1026  * @adapter: board private structure
1027  */
1028 static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
1029 {
1030         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1031         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1032         struct atl1_buffer *buffer_info;
1033         struct pci_dev *pdev = adapter->pdev;
1034         unsigned long size;
1035         unsigned int i;
1036
1037         /* Free all the Rx ring sk_buffs */
1038         for (i = 0; i < rfd_ring->count; i++) {
1039                 buffer_info = &rfd_ring->buffer_info[i];
1040                 if (buffer_info->dma) {
1041                         pci_unmap_page(pdev, buffer_info->dma,
1042                                 buffer_info->length, PCI_DMA_FROMDEVICE);
1043                         buffer_info->dma = 0;
1044                 }
1045                 if (buffer_info->skb) {
1046                         dev_kfree_skb(buffer_info->skb);
1047                         buffer_info->skb = NULL;
1048                 }
1049         }
1050
1051         size = sizeof(struct atl1_buffer) * rfd_ring->count;
1052         memset(rfd_ring->buffer_info, 0, size);
1053
1054         /* Zero out the descriptor ring */
1055         memset(rfd_ring->desc, 0, rfd_ring->size);
1056
1057         rfd_ring->next_to_clean = 0;
1058         atomic_set(&rfd_ring->next_to_use, 0);
1059
1060         rrd_ring->next_to_use = 0;
1061         atomic_set(&rrd_ring->next_to_clean, 0);
1062 }
1063
1064 /*
1065  * atl1_clean_tx_ring - Free Tx Buffers
1066  * @adapter: board private structure
1067  */
1068 static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
1069 {
1070         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1071         struct atl1_buffer *buffer_info;
1072         struct pci_dev *pdev = adapter->pdev;
1073         unsigned long size;
1074         unsigned int i;
1075
1076         /* Free all the Tx ring sk_buffs */
1077         for (i = 0; i < tpd_ring->count; i++) {
1078                 buffer_info = &tpd_ring->buffer_info[i];
1079                 if (buffer_info->dma) {
1080                         pci_unmap_page(pdev, buffer_info->dma,
1081                                 buffer_info->length, PCI_DMA_TODEVICE);
1082                         buffer_info->dma = 0;
1083                 }
1084         }
1085
1086         for (i = 0; i < tpd_ring->count; i++) {
1087                 buffer_info = &tpd_ring->buffer_info[i];
1088                 if (buffer_info->skb) {
1089                         dev_kfree_skb_any(buffer_info->skb);
1090                         buffer_info->skb = NULL;
1091                 }
1092         }
1093
1094         size = sizeof(struct atl1_buffer) * tpd_ring->count;
1095         memset(tpd_ring->buffer_info, 0, size);
1096
1097         /* Zero out the descriptor ring */
1098         memset(tpd_ring->desc, 0, tpd_ring->size);
1099
1100         atomic_set(&tpd_ring->next_to_use, 0);
1101         atomic_set(&tpd_ring->next_to_clean, 0);
1102 }
1103
1104 /*
1105  * atl1_free_ring_resources - Free Tx / RX descriptor Resources
1106  * @adapter: board private structure
1107  *
1108  * Free all transmit software resources
1109  */
1110 static void atl1_free_ring_resources(struct atl1_adapter *adapter)
1111 {
1112         struct pci_dev *pdev = adapter->pdev;
1113         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1114         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1115         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1116         struct atl1_ring_header *ring_header = &adapter->ring_header;
1117
1118         atl1_clean_tx_ring(adapter);
1119         atl1_clean_rx_ring(adapter);
1120
1121         kfree(tpd_ring->buffer_info);
1122         pci_free_consistent(pdev, ring_header->size, ring_header->desc,
1123                 ring_header->dma);
1124
1125         tpd_ring->buffer_info = NULL;
1126         tpd_ring->desc = NULL;
1127         tpd_ring->dma = 0;
1128
1129         rfd_ring->buffer_info = NULL;
1130         rfd_ring->desc = NULL;
1131         rfd_ring->dma = 0;
1132
1133         rrd_ring->desc = NULL;
1134         rrd_ring->dma = 0;
1135 }
1136
1137 static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
1138 {
1139         u32 value;
1140         struct atl1_hw *hw = &adapter->hw;
1141         struct net_device *netdev = adapter->netdev;
1142         /* Config MAC CTRL Register */
1143         value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1144         /* duplex */
1145         if (FULL_DUPLEX == adapter->link_duplex)
1146                 value |= MAC_CTRL_DUPLX;
1147         /* speed */
1148         value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
1149                          MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1150                   MAC_CTRL_SPEED_SHIFT);
1151         /* flow control */
1152         value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1153         /* PAD & CRC */
1154         value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1155         /* preamble length */
1156         value |= (((u32) adapter->hw.preamble_len
1157                    & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1158         /* vlan */
1159         if (adapter->vlgrp)
1160                 value |= MAC_CTRL_RMV_VLAN;
1161         /* rx checksum
1162            if (adapter->rx_csum)
1163            value |= MAC_CTRL_RX_CHKSUM_EN;
1164          */
1165         /* filter mode */
1166         value |= MAC_CTRL_BC_EN;
1167         if (netdev->flags & IFF_PROMISC)
1168                 value |= MAC_CTRL_PROMIS_EN;
1169         else if (netdev->flags & IFF_ALLMULTI)
1170                 value |= MAC_CTRL_MC_ALL_EN;
1171         /* value |= MAC_CTRL_LOOPBACK; */
1172         iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
1173 }
1174
1175 static u32 atl1_check_link(struct atl1_adapter *adapter)
1176 {
1177         struct atl1_hw *hw = &adapter->hw;
1178         struct net_device *netdev = adapter->netdev;
1179         u32 ret_val;
1180         u16 speed, duplex, phy_data;
1181         int reconfig = 0;
1182
1183         /* MII_BMSR must read twice */
1184         atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1185         atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1186         if (!(phy_data & BMSR_LSTATUS)) {
1187                 /* link down */
1188                 if (netif_carrier_ok(netdev)) {
1189                         /* old link state: Up */
1190                         if (netif_msg_link(adapter))
1191                                 dev_info(&adapter->pdev->dev, "link is down\n");
1192                         adapter->link_speed = SPEED_0;
1193                         netif_carrier_off(netdev);
1194                         netif_stop_queue(netdev);
1195                 }
1196                 return 0;
1197         }
1198
1199         /* Link Up */
1200         ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
1201         if (ret_val)
1202                 return ret_val;
1203
1204         switch (hw->media_type) {
1205         case MEDIA_TYPE_1000M_FULL:
1206                 if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
1207                         reconfig = 1;
1208                 break;
1209         case MEDIA_TYPE_100M_FULL:
1210                 if (speed != SPEED_100 || duplex != FULL_DUPLEX)
1211                         reconfig = 1;
1212                 break;
1213         case MEDIA_TYPE_100M_HALF:
1214                 if (speed != SPEED_100 || duplex != HALF_DUPLEX)
1215                         reconfig = 1;
1216                 break;
1217         case MEDIA_TYPE_10M_FULL:
1218                 if (speed != SPEED_10 || duplex != FULL_DUPLEX)
1219                         reconfig = 1;
1220                 break;
1221         case MEDIA_TYPE_10M_HALF:
1222                 if (speed != SPEED_10 || duplex != HALF_DUPLEX)
1223                         reconfig = 1;
1224                 break;
1225         }
1226
1227         /* link result is our setting */
1228         if (!reconfig) {
1229                 if (adapter->link_speed != speed
1230                     || adapter->link_duplex != duplex) {
1231                         adapter->link_speed = speed;
1232                         adapter->link_duplex = duplex;
1233                         atl1_setup_mac_ctrl(adapter);
1234                         if (netif_msg_link(adapter))
1235                                 dev_info(&adapter->pdev->dev,
1236                                         "%s link is up %d Mbps %s\n",
1237                                         netdev->name, adapter->link_speed,
1238                                         adapter->link_duplex == FULL_DUPLEX ?
1239                                         "full duplex" : "half duplex");
1240                 }
1241                 if (!netif_carrier_ok(netdev)) {
1242                         /* Link down -> Up */
1243                         netif_carrier_on(netdev);
1244                         netif_wake_queue(netdev);
1245                 }
1246                 return 0;
1247         }
1248
1249         /* change original link status */
1250         if (netif_carrier_ok(netdev)) {
1251                 adapter->link_speed = SPEED_0;
1252                 netif_carrier_off(netdev);
1253                 netif_stop_queue(netdev);
1254         }
1255
1256         if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
1257             hw->media_type != MEDIA_TYPE_1000M_FULL) {
1258                 switch (hw->media_type) {
1259                 case MEDIA_TYPE_100M_FULL:
1260                         phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
1261                                    MII_CR_RESET;
1262                         break;
1263                 case MEDIA_TYPE_100M_HALF:
1264                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
1265                         break;
1266                 case MEDIA_TYPE_10M_FULL:
1267                         phy_data =
1268                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
1269                         break;
1270                 default:
1271                         /* MEDIA_TYPE_10M_HALF: */
1272                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
1273                         break;
1274                 }
1275                 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
1276                 return 0;
1277         }
1278
1279         /* auto-neg, insert timer to re-config phy */
1280         if (!adapter->phy_timer_pending) {
1281                 adapter->phy_timer_pending = true;
1282                 mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
1283         }
1284
1285         return 0;
1286 }
1287
1288 static void set_flow_ctrl_old(struct atl1_adapter *adapter)
1289 {
1290         u32 hi, lo, value;
1291
1292         /* RFD Flow Control */
1293         value = adapter->rfd_ring.count;
1294         hi = value / 16;
1295         if (hi < 2)
1296                 hi = 2;
1297         lo = value * 7 / 8;
1298
1299         value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1300                 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1301         iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1302
1303         /* RRD Flow Control */
1304         value = adapter->rrd_ring.count;
1305         lo = value / 16;
1306         hi = value * 7 / 8;
1307         if (lo < 2)
1308                 lo = 2;
1309         value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1310                 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1311         iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1312 }
1313
1314 static void set_flow_ctrl_new(struct atl1_hw *hw)
1315 {
1316         u32 hi, lo, value;
1317
1318         /* RXF Flow Control */
1319         value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
1320         lo = value / 16;
1321         if (lo < 192)
1322                 lo = 192;
1323         hi = value * 7 / 8;
1324         if (hi < lo)
1325                 hi = lo + 16;
1326         value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1327                 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1328         iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1329
1330         /* RRD Flow Control */
1331         value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
1332         lo = value / 8;
1333         hi = value * 7 / 8;
1334         if (lo < 2)
1335                 lo = 2;
1336         if (hi < lo)
1337                 hi = lo + 3;
1338         value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1339                 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1340         iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1341 }
1342
1343 /*
1344  * atl1_configure - Configure Transmit&Receive Unit after Reset
1345  * @adapter: board private structure
1346  *
1347  * Configure the Tx /Rx unit of the MAC after a reset.
1348  */
1349 static u32 atl1_configure(struct atl1_adapter *adapter)
1350 {
1351         struct atl1_hw *hw = &adapter->hw;
1352         u32 value;
1353
1354         /* clear interrupt status */
1355         iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
1356
1357         /* set MAC Address */
1358         value = (((u32) hw->mac_addr[2]) << 24) |
1359                 (((u32) hw->mac_addr[3]) << 16) |
1360                 (((u32) hw->mac_addr[4]) << 8) |
1361                 (((u32) hw->mac_addr[5]));
1362         iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
1363         value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
1364         iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
1365
1366         /* tx / rx ring */
1367
1368         /* HI base address */
1369         iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
1370                 hw->hw_addr + REG_DESC_BASE_ADDR_HI);
1371         /* LO base address */
1372         iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
1373                 hw->hw_addr + REG_DESC_RFD_ADDR_LO);
1374         iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
1375                 hw->hw_addr + REG_DESC_RRD_ADDR_LO);
1376         iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
1377                 hw->hw_addr + REG_DESC_TPD_ADDR_LO);
1378         iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
1379                 hw->hw_addr + REG_DESC_CMB_ADDR_LO);
1380         iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
1381                 hw->hw_addr + REG_DESC_SMB_ADDR_LO);
1382
1383         /* element count */
1384         value = adapter->rrd_ring.count;
1385         value <<= 16;
1386         value += adapter->rfd_ring.count;
1387         iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
1388         iowrite32(adapter->tpd_ring.count, hw->hw_addr +
1389                 REG_DESC_TPD_RING_SIZE);
1390
1391         /* Load Ptr */
1392         iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
1393
1394         /* config Mailbox */
1395         value = ((atomic_read(&adapter->tpd_ring.next_to_use)
1396                   & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
1397                 ((atomic_read(&adapter->rrd_ring.next_to_clean)
1398                 & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
1399                 ((atomic_read(&adapter->rfd_ring.next_to_use)
1400                 & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
1401         iowrite32(value, hw->hw_addr + REG_MAILBOX);
1402
1403         /* config IPG/IFG */
1404         value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
1405                  << MAC_IPG_IFG_IPGT_SHIFT) |
1406                 (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
1407                 << MAC_IPG_IFG_MIFG_SHIFT) |
1408                 (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
1409                 << MAC_IPG_IFG_IPGR1_SHIFT) |
1410                 (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
1411                 << MAC_IPG_IFG_IPGR2_SHIFT);
1412         iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
1413
1414         /* config  Half-Duplex Control */
1415         value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
1416                 (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
1417                 << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
1418                 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
1419                 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
1420                 (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
1421                 << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
1422         iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
1423
1424         /* set Interrupt Moderator Timer */
1425         iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
1426         iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
1427
1428         /* set Interrupt Clear Timer */
1429         iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
1430
1431         /* set max frame size hw will accept */
1432         iowrite32(hw->max_frame_size, hw->hw_addr + REG_MTU);
1433
1434         /* jumbo size & rrd retirement timer */
1435         value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
1436                  << RXQ_JMBOSZ_TH_SHIFT) |
1437                 (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
1438                 << RXQ_JMBO_LKAH_SHIFT) |
1439                 (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
1440                 << RXQ_RRD_TIMER_SHIFT);
1441         iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
1442
1443         /* Flow Control */
1444         switch (hw->dev_rev) {
1445         case 0x8001:
1446         case 0x9001:
1447         case 0x9002:
1448         case 0x9003:
1449                 set_flow_ctrl_old(adapter);
1450                 break;
1451         default:
1452                 set_flow_ctrl_new(hw);
1453                 break;
1454         }
1455
1456         /* config TXQ */
1457         value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
1458                  << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
1459                 (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
1460                 << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
1461                 (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
1462                 << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE |
1463                 TXQ_CTRL_EN;
1464         iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
1465
1466         /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
1467         value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
1468                 << TX_JUMBO_TASK_TH_SHIFT) |
1469                 (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
1470                 << TX_TPD_MIN_IPG_SHIFT);
1471         iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
1472
1473         /* config RXQ */
1474         value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
1475                 << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
1476                 (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
1477                 << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
1478                 (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
1479                 << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) | RXQ_CTRL_CUT_THRU_EN |
1480                 RXQ_CTRL_EN;
1481         iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
1482
1483         /* config DMA Engine */
1484         value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1485                 << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
1486                 ((((u32) hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1487                 << DMA_CTRL_DMAW_BURST_LEN_SHIFT) | DMA_CTRL_DMAR_EN |
1488                 DMA_CTRL_DMAW_EN;
1489         value |= (u32) hw->dma_ord;
1490         if (atl1_rcb_128 == hw->rcb_value)
1491                 value |= DMA_CTRL_RCB_VALUE;
1492         iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
1493
1494         /* config CMB / SMB */
1495         value = (hw->cmb_tpd > adapter->tpd_ring.count) ?
1496                 hw->cmb_tpd : adapter->tpd_ring.count;
1497         value <<= 16;
1498         value |= hw->cmb_rrd;
1499         iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
1500         value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
1501         iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
1502         iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
1503
1504         /* --- enable CMB / SMB */
1505         value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
1506         iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
1507
1508         value = ioread32(adapter->hw.hw_addr + REG_ISR);
1509         if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
1510                 value = 1;      /* config failed */
1511         else
1512                 value = 0;
1513
1514         /* clear all interrupt status */
1515         iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
1516         iowrite32(0, adapter->hw.hw_addr + REG_ISR);
1517         return value;
1518 }
1519
1520 /*
1521  * atl1_pcie_patch - Patch for PCIE module
1522  */
1523 static void atl1_pcie_patch(struct atl1_adapter *adapter)
1524 {
1525         u32 value;
1526
1527         /* much vendor magic here */
1528         value = 0x6500;
1529         iowrite32(value, adapter->hw.hw_addr + 0x12FC);
1530         /* pcie flow control mode change */
1531         value = ioread32(adapter->hw.hw_addr + 0x1008);
1532         value |= 0x8000;
1533         iowrite32(value, adapter->hw.hw_addr + 0x1008);
1534 }
1535
1536 /*
1537  * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
1538  * on PCI Command register is disable.
1539  * The function enable this bit.
1540  * Brackett, 2006/03/15
1541  */
1542 static void atl1_via_workaround(struct atl1_adapter *adapter)
1543 {
1544         unsigned long value;
1545
1546         value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
1547         if (value & PCI_COMMAND_INTX_DISABLE)
1548                 value &= ~PCI_COMMAND_INTX_DISABLE;
1549         iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
1550 }
1551
1552 static void atl1_inc_smb(struct atl1_adapter *adapter)
1553 {
1554         struct stats_msg_block *smb = adapter->smb.smb;
1555
1556         /* Fill out the OS statistics structure */
1557         adapter->soft_stats.rx_packets += smb->rx_ok;
1558         adapter->soft_stats.tx_packets += smb->tx_ok;
1559         adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
1560         adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
1561         adapter->soft_stats.multicast += smb->rx_mcast;
1562         adapter->soft_stats.collisions += (smb->tx_1_col + smb->tx_2_col * 2 +
1563                 smb->tx_late_col + smb->tx_abort_col * adapter->hw.max_retry);
1564
1565         /* Rx Errors */
1566         adapter->soft_stats.rx_errors += (smb->rx_frag + smb->rx_fcs_err +
1567                 smb->rx_len_err + smb->rx_sz_ov + smb->rx_rxf_ov +
1568                 smb->rx_rrd_ov + smb->rx_align_err);
1569         adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
1570         adapter->soft_stats.rx_length_errors += smb->rx_len_err;
1571         adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
1572         adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
1573         adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
1574                 smb->rx_rxf_ov);
1575
1576         adapter->soft_stats.rx_pause += smb->rx_pause;
1577         adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
1578         adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
1579
1580         /* Tx Errors */
1581         adapter->soft_stats.tx_errors += (smb->tx_late_col +
1582                 smb->tx_abort_col + smb->tx_underrun + smb->tx_trunc);
1583         adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
1584         adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
1585         adapter->soft_stats.tx_window_errors += smb->tx_late_col;
1586
1587         adapter->soft_stats.excecol += smb->tx_abort_col;
1588         adapter->soft_stats.deffer += smb->tx_defer;
1589         adapter->soft_stats.scc += smb->tx_1_col;
1590         adapter->soft_stats.mcc += smb->tx_2_col;
1591         adapter->soft_stats.latecol += smb->tx_late_col;
1592         adapter->soft_stats.tx_underun += smb->tx_underrun;
1593         adapter->soft_stats.tx_trunc += smb->tx_trunc;
1594         adapter->soft_stats.tx_pause += smb->tx_pause;
1595
1596         adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
1597         adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
1598         adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
1599         adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
1600         adapter->net_stats.multicast = adapter->soft_stats.multicast;
1601         adapter->net_stats.collisions = adapter->soft_stats.collisions;
1602         adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
1603         adapter->net_stats.rx_over_errors =
1604                 adapter->soft_stats.rx_missed_errors;
1605         adapter->net_stats.rx_length_errors =
1606                 adapter->soft_stats.rx_length_errors;
1607         adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
1608         adapter->net_stats.rx_frame_errors =
1609                 adapter->soft_stats.rx_frame_errors;
1610         adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
1611         adapter->net_stats.rx_missed_errors =
1612                 adapter->soft_stats.rx_missed_errors;
1613         adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
1614         adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
1615         adapter->net_stats.tx_aborted_errors =
1616                 adapter->soft_stats.tx_aborted_errors;
1617         adapter->net_stats.tx_window_errors =
1618                 adapter->soft_stats.tx_window_errors;
1619         adapter->net_stats.tx_carrier_errors =
1620                 adapter->soft_stats.tx_carrier_errors;
1621 }
1622
1623 static void atl1_update_mailbox(struct atl1_adapter *adapter)
1624 {
1625         unsigned long flags;
1626         u32 tpd_next_to_use;
1627         u32 rfd_next_to_use;
1628         u32 rrd_next_to_clean;
1629         u32 value;
1630
1631         spin_lock_irqsave(&adapter->mb_lock, flags);
1632
1633         tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1634         rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
1635         rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
1636
1637         value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1638                 MB_RFD_PROD_INDX_SHIFT) |
1639                 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1640                 MB_RRD_CONS_INDX_SHIFT) |
1641                 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1642                 MB_TPD_PROD_INDX_SHIFT);
1643         iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1644
1645         spin_unlock_irqrestore(&adapter->mb_lock, flags);
1646 }
1647
1648 static void atl1_clean_alloc_flag(struct atl1_adapter *adapter,
1649         struct rx_return_desc *rrd, u16 offset)
1650 {
1651         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1652
1653         while (rfd_ring->next_to_clean != (rrd->buf_indx + offset)) {
1654                 rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced = 0;
1655                 if (++rfd_ring->next_to_clean == rfd_ring->count) {
1656                         rfd_ring->next_to_clean = 0;
1657                 }
1658         }
1659 }
1660
1661 static void atl1_update_rfd_index(struct atl1_adapter *adapter,
1662         struct rx_return_desc *rrd)
1663 {
1664         u16 num_buf;
1665
1666         num_buf = (rrd->xsz.xsum_sz.pkt_size + adapter->rx_buffer_len - 1) /
1667                 adapter->rx_buffer_len;
1668         if (rrd->num_buf == num_buf)
1669                 /* clean alloc flag for bad rrd */
1670                 atl1_clean_alloc_flag(adapter, rrd, num_buf);
1671 }
1672
1673 static void atl1_rx_checksum(struct atl1_adapter *adapter,
1674         struct rx_return_desc *rrd, struct sk_buff *skb)
1675 {
1676         struct pci_dev *pdev = adapter->pdev;
1677
1678         skb->ip_summed = CHECKSUM_NONE;
1679
1680         if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1681                 if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
1682                                         ERR_FLAG_CODE | ERR_FLAG_OV)) {
1683                         adapter->hw_csum_err++;
1684                         if (netif_msg_rx_err(adapter))
1685                                 dev_printk(KERN_DEBUG, &pdev->dev,
1686                                         "rx checksum error\n");
1687                         return;
1688                 }
1689         }
1690
1691         /* not IPv4 */
1692         if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
1693                 /* checksum is invalid, but it's not an IPv4 pkt, so ok */
1694                 return;
1695
1696         /* IPv4 packet */
1697         if (likely(!(rrd->err_flg &
1698                 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
1699                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1700                 adapter->hw_csum_good++;
1701                 return;
1702         }
1703
1704         /* IPv4, but hardware thinks its checksum is wrong */
1705         if (netif_msg_rx_err(adapter))
1706                 dev_printk(KERN_DEBUG, &pdev->dev,
1707                         "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
1708                         rrd->pkt_flg, rrd->err_flg);
1709         skb->ip_summed = CHECKSUM_COMPLETE;
1710         skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
1711         adapter->hw_csum_err++;
1712         return;
1713 }
1714
1715 /*
1716  * atl1_alloc_rx_buffers - Replace used receive buffers
1717  * @adapter: address of board private structure
1718  */
1719 static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
1720 {
1721         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1722         struct pci_dev *pdev = adapter->pdev;
1723         struct page *page;
1724         unsigned long offset;
1725         struct atl1_buffer *buffer_info, *next_info;
1726         struct sk_buff *skb;
1727         u16 num_alloc = 0;
1728         u16 rfd_next_to_use, next_next;
1729         struct rx_free_desc *rfd_desc;
1730
1731         next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
1732         if (++next_next == rfd_ring->count)
1733                 next_next = 0;
1734         buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1735         next_info = &rfd_ring->buffer_info[next_next];
1736
1737         while (!buffer_info->alloced && !next_info->alloced) {
1738                 if (buffer_info->skb) {
1739                         buffer_info->alloced = 1;
1740                         goto next;
1741                 }
1742
1743                 rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
1744
1745                 skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
1746                 if (unlikely(!skb)) {
1747                         /* Better luck next round */
1748                         adapter->net_stats.rx_dropped++;
1749                         break;
1750                 }
1751
1752                 /*
1753                  * Make buffer alignment 2 beyond a 16 byte boundary
1754                  * this will result in a 16 byte aligned IP header after
1755                  * the 14 byte MAC header is removed
1756                  */
1757                 skb_reserve(skb, NET_IP_ALIGN);
1758
1759                 buffer_info->alloced = 1;
1760                 buffer_info->skb = skb;
1761                 buffer_info->length = (u16) adapter->rx_buffer_len;
1762                 page = virt_to_page(skb->data);
1763                 offset = (unsigned long)skb->data & ~PAGE_MASK;
1764                 buffer_info->dma = pci_map_page(pdev, page, offset,
1765                                                 adapter->rx_buffer_len,
1766                                                 PCI_DMA_FROMDEVICE);
1767                 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1768                 rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
1769                 rfd_desc->coalese = 0;
1770
1771 next:
1772                 rfd_next_to_use = next_next;
1773                 if (unlikely(++next_next == rfd_ring->count))
1774                         next_next = 0;
1775
1776                 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1777                 next_info = &rfd_ring->buffer_info[next_next];
1778                 num_alloc++;
1779         }
1780
1781         if (num_alloc) {
1782                 /*
1783                  * Force memory writes to complete before letting h/w
1784                  * know there are new descriptors to fetch.  (Only
1785                  * applicable for weak-ordered memory model archs,
1786                  * such as IA-64).
1787                  */
1788                 wmb();
1789                 atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
1790         }
1791         return num_alloc;
1792 }
1793
1794 static void atl1_intr_rx(struct atl1_adapter *adapter)
1795 {
1796         int i, count;
1797         u16 length;
1798         u16 rrd_next_to_clean;
1799         u32 value;
1800         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1801         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1802         struct atl1_buffer *buffer_info;
1803         struct rx_return_desc *rrd;
1804         struct sk_buff *skb;
1805
1806         count = 0;
1807
1808         rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
1809
1810         while (1) {
1811                 rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
1812                 i = 1;
1813                 if (likely(rrd->xsz.valid)) {   /* packet valid */
1814 chk_rrd:
1815                         /* check rrd status */
1816                         if (likely(rrd->num_buf == 1))
1817                                 goto rrd_ok;
1818                         else if (netif_msg_rx_err(adapter)) {
1819                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1820                                         "unexpected RRD buffer count\n");
1821                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1822                                         "rx_buf_len = %d\n",
1823                                         adapter->rx_buffer_len);
1824                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1825                                         "RRD num_buf = %d\n",
1826                                         rrd->num_buf);
1827                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1828                                         "RRD pkt_len = %d\n",
1829                                         rrd->xsz.xsum_sz.pkt_size);
1830                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1831                                         "RRD pkt_flg = 0x%08X\n",
1832                                         rrd->pkt_flg);
1833                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1834                                         "RRD err_flg = 0x%08X\n",
1835                                         rrd->err_flg);
1836                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1837                                         "RRD vlan_tag = 0x%08X\n",
1838                                         rrd->vlan_tag);
1839                         }
1840
1841                         /* rrd seems to be bad */
1842                         if (unlikely(i-- > 0)) {
1843                                 /* rrd may not be DMAed completely */
1844                                 udelay(1);
1845                                 goto chk_rrd;
1846                         }
1847                         /* bad rrd */
1848                         if (netif_msg_rx_err(adapter))
1849                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1850                                         "bad RRD\n");
1851                         /* see if update RFD index */
1852                         if (rrd->num_buf > 1)
1853                                 atl1_update_rfd_index(adapter, rrd);
1854
1855                         /* update rrd */
1856                         rrd->xsz.valid = 0;
1857                         if (++rrd_next_to_clean == rrd_ring->count)
1858                                 rrd_next_to_clean = 0;
1859                         count++;
1860                         continue;
1861                 } else {        /* current rrd still not be updated */
1862
1863                         break;
1864                 }
1865 rrd_ok:
1866                 /* clean alloc flag for bad rrd */
1867                 atl1_clean_alloc_flag(adapter, rrd, 0);
1868
1869                 buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
1870                 if (++rfd_ring->next_to_clean == rfd_ring->count)
1871                         rfd_ring->next_to_clean = 0;
1872
1873                 /* update rrd next to clean */
1874                 if (++rrd_next_to_clean == rrd_ring->count)
1875                         rrd_next_to_clean = 0;
1876                 count++;
1877
1878                 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1879                         if (!(rrd->err_flg &
1880                                 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
1881                                 | ERR_FLAG_LEN))) {
1882                                 /* packet error, don't need upstream */
1883                                 buffer_info->alloced = 0;
1884                                 rrd->xsz.valid = 0;
1885                                 continue;
1886                         }
1887                 }
1888
1889                 /* Good Receive */
1890                 pci_unmap_page(adapter->pdev, buffer_info->dma,
1891                                buffer_info->length, PCI_DMA_FROMDEVICE);
1892                 skb = buffer_info->skb;
1893                 length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
1894
1895                 skb_put(skb, length - ETH_FCS_LEN);
1896
1897                 /* Receive Checksum Offload */
1898                 atl1_rx_checksum(adapter, rrd, skb);
1899                 skb->protocol = eth_type_trans(skb, adapter->netdev);
1900
1901                 if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
1902                         u16 vlan_tag = (rrd->vlan_tag >> 4) |
1903                                         ((rrd->vlan_tag & 7) << 13) |
1904                                         ((rrd->vlan_tag & 8) << 9);
1905                         vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
1906                 } else
1907                         netif_rx(skb);
1908
1909                 /* let protocol layer free skb */
1910                 buffer_info->skb = NULL;
1911                 buffer_info->alloced = 0;
1912                 rrd->xsz.valid = 0;
1913
1914                 adapter->netdev->last_rx = jiffies;
1915         }
1916
1917         atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
1918
1919         atl1_alloc_rx_buffers(adapter);
1920
1921         /* update mailbox ? */
1922         if (count) {
1923                 u32 tpd_next_to_use;
1924                 u32 rfd_next_to_use;
1925
1926                 spin_lock(&adapter->mb_lock);
1927
1928                 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1929                 rfd_next_to_use =
1930                     atomic_read(&adapter->rfd_ring.next_to_use);
1931                 rrd_next_to_clean =
1932                     atomic_read(&adapter->rrd_ring.next_to_clean);
1933                 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1934                         MB_RFD_PROD_INDX_SHIFT) |
1935                         ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1936                         MB_RRD_CONS_INDX_SHIFT) |
1937                         ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1938                         MB_TPD_PROD_INDX_SHIFT);
1939                 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1940                 spin_unlock(&adapter->mb_lock);
1941         }
1942 }
1943
1944 static void atl1_intr_tx(struct atl1_adapter *adapter)
1945 {
1946         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1947         struct atl1_buffer *buffer_info;
1948         u16 sw_tpd_next_to_clean;
1949         u16 cmb_tpd_next_to_clean;
1950
1951         sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1952         cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
1953
1954         while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
1955                 struct tx_packet_desc *tpd;
1956
1957                 tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
1958                 buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
1959                 if (buffer_info->dma) {
1960                         pci_unmap_page(adapter->pdev, buffer_info->dma,
1961                                        buffer_info->length, PCI_DMA_TODEVICE);
1962                         buffer_info->dma = 0;
1963                 }
1964
1965                 if (buffer_info->skb) {
1966                         dev_kfree_skb_irq(buffer_info->skb);
1967                         buffer_info->skb = NULL;
1968                 }
1969
1970                 if (++sw_tpd_next_to_clean == tpd_ring->count)
1971                         sw_tpd_next_to_clean = 0;
1972         }
1973         atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
1974
1975         if (netif_queue_stopped(adapter->netdev)
1976             && netif_carrier_ok(adapter->netdev))
1977                 netif_wake_queue(adapter->netdev);
1978 }
1979
1980 static u16 atl1_tpd_avail(struct atl1_tpd_ring *tpd_ring)
1981 {
1982         u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1983         u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
1984         return ((next_to_clean > next_to_use) ?
1985                 next_to_clean - next_to_use - 1 :
1986                 tpd_ring->count + next_to_clean - next_to_use - 1);
1987 }
1988
1989 static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
1990         struct tx_packet_desc *ptpd)
1991 {
1992         /* spinlock held */
1993         u8 hdr_len, ip_off;
1994         u32 real_len;
1995         int err;
1996
1997         if (skb_shinfo(skb)->gso_size) {
1998                 if (skb_header_cloned(skb)) {
1999                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2000                         if (unlikely(err))
2001                                 return -1;
2002                 }
2003
2004                 if (skb->protocol == ntohs(ETH_P_IP)) {
2005                         struct iphdr *iph = ip_hdr(skb);
2006
2007                         real_len = (((unsigned char *)iph - skb->data) +
2008                                 ntohs(iph->tot_len));
2009                         if (real_len < skb->len)
2010                                 pskb_trim(skb, real_len);
2011                         hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2012                         if (skb->len == hdr_len) {
2013                                 iph->check = 0;
2014                                 tcp_hdr(skb)->check =
2015                                         ~csum_tcpudp_magic(iph->saddr,
2016                                         iph->daddr, tcp_hdrlen(skb),
2017                                         IPPROTO_TCP, 0);
2018                                 ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2019                                         TPD_IPHL_SHIFT;
2020                                 ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2021                                         TPD_TCPHDRLEN_MASK) <<
2022                                         TPD_TCPHDRLEN_SHIFT;
2023                                 ptpd->word3 |= 1 << TPD_IP_CSUM_SHIFT;
2024                                 ptpd->word3 |= 1 << TPD_TCP_CSUM_SHIFT;
2025                                 return 1;
2026                         }
2027
2028                         iph->check = 0;
2029                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2030                                         iph->daddr, 0, IPPROTO_TCP, 0);
2031                         ip_off = (unsigned char *)iph -
2032                                 (unsigned char *) skb_network_header(skb);
2033                         if (ip_off == 8) /* 802.3-SNAP frame */
2034                                 ptpd->word3 |= 1 << TPD_ETHTYPE_SHIFT;
2035                         else if (ip_off != 0)
2036                                 return -2;
2037
2038                         ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2039                                 TPD_IPHL_SHIFT;
2040                         ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2041                                 TPD_TCPHDRLEN_MASK) << TPD_TCPHDRLEN_SHIFT;
2042                         ptpd->word3 |= (skb_shinfo(skb)->gso_size &
2043                                 TPD_MSS_MASK) << TPD_MSS_SHIFT;
2044                         ptpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
2045                         return 3;
2046                 }
2047         }
2048         return false;
2049 }
2050
2051 static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
2052         struct tx_packet_desc *ptpd)
2053 {
2054         u8 css, cso;
2055
2056         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2057                 css = (u8) (skb->csum_start - skb_headroom(skb));
2058                 cso = css + (u8) skb->csum_offset;
2059                 if (unlikely(css & 0x1)) {
2060                         /* L1 hardware requires an even number here */
2061                         if (netif_msg_tx_err(adapter))
2062                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2063                                         "payload offset not an even number\n");
2064                         return -1;
2065                 }
2066                 ptpd->word3 |= (css & TPD_PLOADOFFSET_MASK) <<
2067                         TPD_PLOADOFFSET_SHIFT;
2068                 ptpd->word3 |= (cso & TPD_CCSUMOFFSET_MASK) <<
2069                         TPD_CCSUMOFFSET_SHIFT;
2070                 ptpd->word3 |= 1 << TPD_CUST_CSUM_EN_SHIFT;
2071                 return true;
2072         }
2073         return 0;
2074 }
2075
2076 static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
2077         struct tx_packet_desc *ptpd)
2078 {
2079         /* spinlock held */
2080         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2081         struct atl1_buffer *buffer_info;
2082         u16 buf_len = skb->len;
2083         struct page *page;
2084         unsigned long offset;
2085         unsigned int nr_frags;
2086         unsigned int f;
2087         int retval;
2088         u16 next_to_use;
2089         u16 data_len;
2090         u8 hdr_len;
2091
2092         buf_len -= skb->data_len;
2093         nr_frags = skb_shinfo(skb)->nr_frags;
2094         next_to_use = atomic_read(&tpd_ring->next_to_use);
2095         buffer_info = &tpd_ring->buffer_info[next_to_use];
2096         if (unlikely(buffer_info->skb))
2097                 BUG();
2098         /* put skb in last TPD */
2099         buffer_info->skb = NULL;
2100
2101         retval = (ptpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
2102         if (retval) {
2103                 /* TSO */
2104                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2105                 buffer_info->length = hdr_len;
2106                 page = virt_to_page(skb->data);
2107                 offset = (unsigned long)skb->data & ~PAGE_MASK;
2108                 buffer_info->dma = pci_map_page(adapter->pdev, page,
2109                                                 offset, hdr_len,
2110                                                 PCI_DMA_TODEVICE);
2111
2112                 if (++next_to_use == tpd_ring->count)
2113                         next_to_use = 0;
2114
2115                 if (buf_len > hdr_len) {
2116                         int i, nseg;
2117
2118                         data_len = buf_len - hdr_len;
2119                         nseg = (data_len + ATL1_MAX_TX_BUF_LEN - 1) /
2120                                 ATL1_MAX_TX_BUF_LEN;
2121                         for (i = 0; i < nseg; i++) {
2122                                 buffer_info =
2123                                     &tpd_ring->buffer_info[next_to_use];
2124                                 buffer_info->skb = NULL;
2125                                 buffer_info->length =
2126                                     (ATL1_MAX_TX_BUF_LEN >=
2127                                      data_len) ? ATL1_MAX_TX_BUF_LEN : data_len;
2128                                 data_len -= buffer_info->length;
2129                                 page = virt_to_page(skb->data +
2130                                         (hdr_len + i * ATL1_MAX_TX_BUF_LEN));
2131                                 offset = (unsigned long)(skb->data +
2132                                         (hdr_len + i * ATL1_MAX_TX_BUF_LEN)) &
2133                                         ~PAGE_MASK;
2134                                 buffer_info->dma = pci_map_page(adapter->pdev,
2135                                         page, offset, buffer_info->length,
2136                                         PCI_DMA_TODEVICE);
2137                                 if (++next_to_use == tpd_ring->count)
2138                                         next_to_use = 0;
2139                         }
2140                 }
2141         } else {
2142                 /* not TSO */
2143                 buffer_info->length = buf_len;
2144                 page = virt_to_page(skb->data);
2145                 offset = (unsigned long)skb->data & ~PAGE_MASK;
2146                 buffer_info->dma = pci_map_page(adapter->pdev, page,
2147                         offset, buf_len, PCI_DMA_TODEVICE);
2148                 if (++next_to_use == tpd_ring->count)
2149                         next_to_use = 0;
2150         }
2151
2152         for (f = 0; f < nr_frags; f++) {
2153                 struct skb_frag_struct *frag;
2154                 u16 i, nseg;
2155
2156                 frag = &skb_shinfo(skb)->frags[f];
2157                 buf_len = frag->size;
2158
2159                 nseg = (buf_len + ATL1_MAX_TX_BUF_LEN - 1) /
2160                         ATL1_MAX_TX_BUF_LEN;
2161                 for (i = 0; i < nseg; i++) {
2162                         buffer_info = &tpd_ring->buffer_info[next_to_use];
2163                         if (unlikely(buffer_info->skb))
2164                                 BUG();
2165                         buffer_info->skb = NULL;
2166                         buffer_info->length = (buf_len > ATL1_MAX_TX_BUF_LEN) ?
2167                                 ATL1_MAX_TX_BUF_LEN : buf_len;
2168                         buf_len -= buffer_info->length;
2169                         buffer_info->dma = pci_map_page(adapter->pdev,
2170                                 frag->page,
2171                                 frag->page_offset + (i * ATL1_MAX_TX_BUF_LEN),
2172                                 buffer_info->length, PCI_DMA_TODEVICE);
2173
2174                         if (++next_to_use == tpd_ring->count)
2175                                 next_to_use = 0;
2176                 }
2177         }
2178
2179         /* last tpd's buffer-info */
2180         buffer_info->skb = skb;
2181 }
2182
2183 static void atl1_tx_queue(struct atl1_adapter *adapter, u16 count,
2184        struct tx_packet_desc *ptpd)
2185 {
2186         /* spinlock held */
2187         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2188         struct atl1_buffer *buffer_info;
2189         struct tx_packet_desc *tpd;
2190         u16 j;
2191         u32 val;
2192         u16 next_to_use = (u16) atomic_read(&tpd_ring->next_to_use);
2193
2194         for (j = 0; j < count; j++) {
2195                 buffer_info = &tpd_ring->buffer_info[next_to_use];
2196                 tpd = ATL1_TPD_DESC(&adapter->tpd_ring, next_to_use);
2197                 if (tpd != ptpd)
2198                         memcpy(tpd, ptpd, sizeof(struct tx_packet_desc));
2199                 tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2200                 tpd->word2 = (cpu_to_le16(buffer_info->length) &
2201                         TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT;
2202
2203                 /*
2204                  * if this is the first packet in a TSO chain, set
2205                  * TPD_HDRFLAG, otherwise, clear it.
2206                  */
2207                 val = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) &
2208                         TPD_SEGMENT_EN_MASK;
2209                 if (val) {
2210                         if (!j)
2211                                 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
2212                         else
2213                                 tpd->word3 &= ~(1 << TPD_HDRFLAG_SHIFT);
2214                 }
2215
2216                 if (j == (count - 1))
2217                         tpd->word3 |= 1 << TPD_EOP_SHIFT;
2218
2219                 if (++next_to_use == tpd_ring->count)
2220                         next_to_use = 0;
2221         }
2222         /*
2223          * Force memory writes to complete before letting h/w
2224          * know there are new descriptors to fetch.  (Only
2225          * applicable for weak-ordered memory model archs,
2226          * such as IA-64).
2227          */
2228         wmb();
2229
2230         atomic_set(&tpd_ring->next_to_use, next_to_use);
2231 }
2232
2233 static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2234 {
2235         struct atl1_adapter *adapter = netdev_priv(netdev);
2236         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2237         int len = skb->len;
2238         int tso;
2239         int count = 1;
2240         int ret_val;
2241         struct tx_packet_desc *ptpd;
2242         u16 frag_size;
2243         u16 vlan_tag;
2244         unsigned long flags;
2245         unsigned int nr_frags = 0;
2246         unsigned int mss = 0;
2247         unsigned int f;
2248         unsigned int proto_hdr_len;
2249
2250         len -= skb->data_len;
2251
2252         if (unlikely(skb->len <= 0)) {
2253                 dev_kfree_skb_any(skb);
2254                 return NETDEV_TX_OK;
2255         }
2256
2257         nr_frags = skb_shinfo(skb)->nr_frags;
2258         for (f = 0; f < nr_frags; f++) {
2259                 frag_size = skb_shinfo(skb)->frags[f].size;
2260                 if (frag_size)
2261                         count += (frag_size + ATL1_MAX_TX_BUF_LEN - 1) /
2262                                 ATL1_MAX_TX_BUF_LEN;
2263         }
2264
2265         mss = skb_shinfo(skb)->gso_size;
2266         if (mss) {
2267                 if (skb->protocol == ntohs(ETH_P_IP)) {
2268                         proto_hdr_len = (skb_transport_offset(skb) +
2269                                          tcp_hdrlen(skb));
2270                         if (unlikely(proto_hdr_len > len)) {
2271                                 dev_kfree_skb_any(skb);
2272                                 return NETDEV_TX_OK;
2273                         }
2274                         /* need additional TPD ? */
2275                         if (proto_hdr_len != len)
2276                                 count += (len - proto_hdr_len +
2277                                         ATL1_MAX_TX_BUF_LEN - 1) /
2278                                         ATL1_MAX_TX_BUF_LEN;
2279                 }
2280         }
2281
2282         if (!spin_trylock_irqsave(&adapter->lock, flags)) {
2283                 /* Can't get lock - tell upper layer to requeue */
2284                 if (netif_msg_tx_queued(adapter))
2285                         dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2286                                 "tx locked\n");
2287                 return NETDEV_TX_LOCKED;
2288         }
2289
2290         if (atl1_tpd_avail(&adapter->tpd_ring) < count) {
2291                 /* not enough descriptors */
2292                 netif_stop_queue(netdev);
2293                 spin_unlock_irqrestore(&adapter->lock, flags);
2294                 if (netif_msg_tx_queued(adapter))
2295                         dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2296                                 "tx busy\n");
2297                 return NETDEV_TX_BUSY;
2298         }
2299
2300         ptpd = ATL1_TPD_DESC(tpd_ring,
2301                 (u16) atomic_read(&tpd_ring->next_to_use));
2302         memset(ptpd, 0, sizeof(struct tx_packet_desc));
2303
2304         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2305                 vlan_tag = vlan_tx_tag_get(skb);
2306                 vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
2307                         ((vlan_tag >> 9) & 0x8);
2308                 ptpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
2309                 ptpd->word3 |= (vlan_tag & TPD_VL_TAGGED_MASK) <<
2310                         TPD_VL_TAGGED_SHIFT;
2311         }
2312
2313         tso = atl1_tso(adapter, skb, ptpd);
2314         if (tso < 0) {
2315                 spin_unlock_irqrestore(&adapter->lock, flags);
2316                 dev_kfree_skb_any(skb);
2317                 return NETDEV_TX_OK;
2318         }
2319
2320         if (!tso) {
2321                 ret_val = atl1_tx_csum(adapter, skb, ptpd);
2322                 if (ret_val < 0) {
2323                         spin_unlock_irqrestore(&adapter->lock, flags);
2324                         dev_kfree_skb_any(skb);
2325                         return NETDEV_TX_OK;
2326                 }
2327         }
2328
2329         atl1_tx_map(adapter, skb, ptpd);
2330         atl1_tx_queue(adapter, count, ptpd);
2331         atl1_update_mailbox(adapter);
2332         spin_unlock_irqrestore(&adapter->lock, flags);
2333         netdev->trans_start = jiffies;
2334         return NETDEV_TX_OK;
2335 }
2336
2337 /*
2338  * atl1_intr - Interrupt Handler
2339  * @irq: interrupt number
2340  * @data: pointer to a network interface device structure
2341  * @pt_regs: CPU registers structure
2342  */
2343 static irqreturn_t atl1_intr(int irq, void *data)
2344 {
2345         struct atl1_adapter *adapter = netdev_priv(data);
2346         u32 status;
2347         int max_ints = 10;
2348
2349         status = adapter->cmb.cmb->int_stats;
2350         if (!status)
2351                 return IRQ_NONE;
2352
2353         do {
2354                 /* clear CMB interrupt status at once */
2355                 adapter->cmb.cmb->int_stats = 0;
2356
2357                 if (status & ISR_GPHY)  /* clear phy status */
2358                         atlx_clear_phy_int(adapter);
2359
2360                 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
2361                 iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
2362
2363                 /* check if SMB intr */
2364                 if (status & ISR_SMB)
2365                         atl1_inc_smb(adapter);
2366
2367                 /* check if PCIE PHY Link down */
2368                 if (status & ISR_PHY_LINKDOWN) {
2369                         if (netif_msg_intr(adapter))
2370                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2371                                         "pcie phy link down %x\n", status);
2372                         if (netif_running(adapter->netdev)) {   /* reset MAC */
2373                                 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
2374                                 schedule_work(&adapter->pcie_dma_to_rst_task);
2375                                 return IRQ_HANDLED;
2376                         }
2377                 }
2378
2379                 /* check if DMA read/write error ? */
2380                 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
2381                         if (netif_msg_intr(adapter))
2382                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2383                                         "pcie DMA r/w error (status = 0x%x)\n",
2384                                         status);
2385                         iowrite32(0, adapter->hw.hw_addr + REG_IMR);
2386                         schedule_work(&adapter->pcie_dma_to_rst_task);
2387                         return IRQ_HANDLED;
2388                 }
2389
2390                 /* link event */
2391                 if (status & ISR_GPHY) {
2392                         adapter->soft_stats.tx_carrier_errors++;
2393                         atl1_check_for_link(adapter);
2394                 }
2395
2396                 /* transmit event */
2397                 if (status & ISR_CMB_TX)
2398                         atl1_intr_tx(adapter);
2399
2400                 /* rx exception */
2401                 if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
2402                         ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
2403                         ISR_HOST_RRD_OV | ISR_CMB_RX))) {
2404                         if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
2405                                 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
2406                                 ISR_HOST_RRD_OV))
2407                                 if (netif_msg_intr(adapter))
2408                                         dev_printk(KERN_DEBUG,
2409                                                 &adapter->pdev->dev,
2410                                                 "rx exception, ISR = 0x%x\n",
2411                                                 status);
2412                         atl1_intr_rx(adapter);
2413                 }
2414
2415                 if (--max_ints < 0)
2416                         break;
2417
2418         } while ((status = adapter->cmb.cmb->int_stats));
2419
2420         /* re-enable Interrupt */
2421         iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
2422         return IRQ_HANDLED;
2423 }
2424
2425 /*
2426  * atl1_watchdog - Timer Call-back
2427  * @data: pointer to netdev cast into an unsigned long
2428  */
2429 static void atl1_watchdog(unsigned long data)
2430 {
2431         struct atl1_adapter *adapter = (struct atl1_adapter *)data;
2432
2433         /* Reset the timer */
2434         mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2435 }
2436
2437 /*
2438  * atl1_phy_config - Timer Call-back
2439  * @data: pointer to netdev cast into an unsigned long
2440  */
2441 static void atl1_phy_config(unsigned long data)
2442 {
2443         struct atl1_adapter *adapter = (struct atl1_adapter *)data;
2444         struct atl1_hw *hw = &adapter->hw;
2445         unsigned long flags;
2446
2447         spin_lock_irqsave(&adapter->lock, flags);
2448         adapter->phy_timer_pending = false;
2449         atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
2450         atl1_write_phy_reg(hw, MII_ATLX_CR, hw->mii_1000t_ctrl_reg);
2451         atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
2452         spin_unlock_irqrestore(&adapter->lock, flags);
2453 }
2454
2455 /*
2456  * Orphaned vendor comment left intact here:
2457  * <vendor comment>
2458  * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
2459  * will assert. We do soft reset <0x1400=1> according
2460  * with the SPEC. BUT, it seemes that PCIE or DMA
2461  * state-machine will not be reset. DMAR_TO_INT will
2462  * assert again and again.
2463  * </vendor comment>
2464  */
2465
2466 static int atl1_reset(struct atl1_adapter *adapter)
2467 {
2468         int ret;
2469         ret = atl1_reset_hw(&adapter->hw);
2470         if (ret)
2471                 return ret;
2472         return atl1_init_hw(&adapter->hw);
2473 }
2474
2475 static s32 atl1_up(struct atl1_adapter *adapter)
2476 {
2477         struct net_device *netdev = adapter->netdev;
2478         int err;
2479         int irq_flags = IRQF_SAMPLE_RANDOM;
2480
2481         /* hardware has been reset, we need to reload some things */
2482         atlx_set_multi(netdev);
2483         atl1_init_ring_ptrs(adapter);
2484         atlx_restore_vlan(adapter);
2485         err = atl1_alloc_rx_buffers(adapter);
2486         if (unlikely(!err))
2487                 /* no RX BUFFER allocated */
2488                 return -ENOMEM;
2489
2490         if (unlikely(atl1_configure(adapter))) {
2491                 err = -EIO;
2492                 goto err_up;
2493         }
2494
2495         err = pci_enable_msi(adapter->pdev);
2496         if (err) {
2497                 if (netif_msg_ifup(adapter))
2498                         dev_info(&adapter->pdev->dev,
2499                                 "Unable to enable MSI: %d\n", err);
2500                 irq_flags |= IRQF_SHARED;
2501         }
2502
2503         err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
2504                         netdev->name, netdev);
2505         if (unlikely(err))
2506                 goto err_up;
2507
2508         mod_timer(&adapter->watchdog_timer, jiffies);
2509         atlx_irq_enable(adapter);
2510         atl1_check_link(adapter);
2511         return 0;
2512
2513 err_up:
2514         pci_disable_msi(adapter->pdev);
2515         /* free rx_buffers */
2516         atl1_clean_rx_ring(adapter);
2517         return err;
2518 }
2519
2520 static void atl1_down(struct atl1_adapter *adapter)
2521 {
2522         struct net_device *netdev = adapter->netdev;
2523
2524         del_timer_sync(&adapter->watchdog_timer);
2525         del_timer_sync(&adapter->phy_config_timer);
2526         adapter->phy_timer_pending = false;
2527
2528         atlx_irq_disable(adapter);
2529         free_irq(adapter->pdev->irq, netdev);
2530         pci_disable_msi(adapter->pdev);
2531         atl1_reset_hw(&adapter->hw);
2532         adapter->cmb.cmb->int_stats = 0;
2533
2534         adapter->link_speed = SPEED_0;
2535         adapter->link_duplex = -1;
2536         netif_carrier_off(netdev);
2537         netif_stop_queue(netdev);
2538
2539         atl1_clean_tx_ring(adapter);
2540         atl1_clean_rx_ring(adapter);
2541 }
2542
2543 static void atl1_tx_timeout_task(struct work_struct *work)
2544 {
2545         struct atl1_adapter *adapter =
2546                 container_of(work, struct atl1_adapter, tx_timeout_task);
2547         struct net_device *netdev = adapter->netdev;
2548
2549         netif_device_detach(netdev);
2550         atl1_down(adapter);
2551         atl1_up(adapter);
2552         netif_device_attach(netdev);
2553 }
2554
2555 /*
2556  * atl1_change_mtu - Change the Maximum Transfer Unit
2557  * @netdev: network interface device structure
2558  * @new_mtu: new value for maximum frame size
2559  *
2560  * Returns 0 on success, negative on failure
2561  */
2562 static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
2563 {
2564         struct atl1_adapter *adapter = netdev_priv(netdev);
2565         int old_mtu = netdev->mtu;
2566         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2567
2568         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
2569             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2570                 if (netif_msg_link(adapter))
2571                         dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
2572                 return -EINVAL;
2573         }
2574
2575         adapter->hw.max_frame_size = max_frame;
2576         adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
2577         adapter->rx_buffer_len = (max_frame + 7) & ~7;
2578         adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
2579
2580         netdev->mtu = new_mtu;
2581         if ((old_mtu != new_mtu) && netif_running(netdev)) {
2582                 atl1_down(adapter);
2583                 atl1_up(adapter);
2584         }
2585
2586         return 0;
2587 }
2588
2589 /*
2590  * atl1_open - Called when a network interface is made active
2591  * @netdev: network interface device structure
2592  *
2593  * Returns 0 on success, negative value on failure
2594  *
2595  * The open entry point is called when a network interface is made
2596  * active by the system (IFF_UP).  At this point all resources needed
2597  * for transmit and receive operations are allocated, the interrupt
2598  * handler is registered with the OS, the watchdog timer is started,
2599  * and the stack is notified that the interface is ready.
2600  */
2601 static int atl1_open(struct net_device *netdev)
2602 {
2603         struct atl1_adapter *adapter = netdev_priv(netdev);
2604         int err;
2605
2606         /* allocate transmit descriptors */
2607         err = atl1_setup_ring_resources(adapter);
2608         if (err)
2609                 return err;
2610
2611         err = atl1_up(adapter);
2612         if (err)
2613                 goto err_up;
2614
2615         return 0;
2616
2617 err_up:
2618         atl1_reset(adapter);
2619         return err;
2620 }
2621
2622 /*
2623  * atl1_close - Disables a network interface
2624  * @netdev: network interface device structure
2625  *
2626  * Returns 0, this is not allowed to fail
2627  *
2628  * The close entry point is called when an interface is de-activated
2629  * by the OS.  The hardware is still under the drivers control, but
2630  * needs to be disabled.  A global MAC reset is issued to stop the
2631  * hardware, and all transmit and receive resources are freed.
2632  */
2633 static int atl1_close(struct net_device *netdev)
2634 {
2635         struct atl1_adapter *adapter = netdev_priv(netdev);
2636         atl1_down(adapter);
2637         atl1_free_ring_resources(adapter);
2638         return 0;
2639 }
2640
2641 #ifdef CONFIG_PM
2642 static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
2643 {
2644         struct net_device *netdev = pci_get_drvdata(pdev);
2645         struct atl1_adapter *adapter = netdev_priv(netdev);
2646         struct atl1_hw *hw = &adapter->hw;
2647         u32 ctrl = 0;
2648         u32 wufc = adapter->wol;
2649
2650         netif_device_detach(netdev);
2651         if (netif_running(netdev))
2652                 atl1_down(adapter);
2653
2654         atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2655         atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2656         if (ctrl & BMSR_LSTATUS)
2657                 wufc &= ~ATLX_WUFC_LNKC;
2658
2659         /* reduce speed to 10/100M */
2660         if (wufc) {
2661                 atl1_phy_enter_power_saving(hw);
2662                 /* if resume, let driver to re- setup link */
2663                 hw->phy_configured = false;
2664                 atl1_set_mac_addr(hw);
2665                 atlx_set_multi(netdev);
2666
2667                 ctrl = 0;
2668                 /* turn on magic packet wol */
2669                 if (wufc & ATLX_WUFC_MAG)
2670                         ctrl = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2671
2672                 /* turn on Link change WOL */
2673                 if (wufc & ATLX_WUFC_LNKC)
2674                         ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
2675                 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2676
2677                 /* turn on all-multi mode if wake on multicast is enabled */
2678                 ctrl = ioread32(hw->hw_addr + REG_MAC_CTRL);
2679                 ctrl &= ~MAC_CTRL_DBG;
2680                 ctrl &= ~MAC_CTRL_PROMIS_EN;
2681                 if (wufc & ATLX_WUFC_MC)
2682                         ctrl |= MAC_CTRL_MC_ALL_EN;
2683                 else
2684                         ctrl &= ~MAC_CTRL_MC_ALL_EN;
2685
2686                 /* turn on broadcast mode if wake on-BC is enabled */
2687                 if (wufc & ATLX_WUFC_BC)
2688                         ctrl |= MAC_CTRL_BC_EN;
2689                 else
2690                         ctrl &= ~MAC_CTRL_BC_EN;
2691
2692                 /* enable RX */
2693                 ctrl |= MAC_CTRL_RX_EN;
2694                 iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
2695                 pci_enable_wake(pdev, PCI_D3hot, 1);
2696                 pci_enable_wake(pdev, PCI_D3cold, 1);
2697         } else {
2698                 iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
2699                 pci_enable_wake(pdev, PCI_D3hot, 0);
2700                 pci_enable_wake(pdev, PCI_D3cold, 0);
2701         }
2702
2703         pci_save_state(pdev);
2704         pci_disable_device(pdev);
2705
2706         pci_set_power_state(pdev, PCI_D3hot);
2707
2708         return 0;
2709 }
2710
2711 static int atl1_resume(struct pci_dev *pdev)
2712 {
2713         struct net_device *netdev = pci_get_drvdata(pdev);
2714         struct atl1_adapter *adapter = netdev_priv(netdev);
2715         u32 err;
2716
2717         pci_set_power_state(pdev, PCI_D0);
2718         pci_restore_state(pdev);
2719
2720         /* FIXME: check and handle */
2721         err = pci_enable_device(pdev);
2722         pci_enable_wake(pdev, PCI_D3hot, 0);
2723         pci_enable_wake(pdev, PCI_D3cold, 0);
2724
2725         iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
2726         atl1_reset(adapter);
2727
2728         if (netif_running(netdev))
2729                 atl1_up(adapter);
2730         netif_device_attach(netdev);
2731
2732         atl1_via_workaround(adapter);
2733
2734         return 0;
2735 }
2736 #else
2737 #define atl1_suspend NULL
2738 #define atl1_resume NULL
2739 #endif
2740
2741 #ifdef CONFIG_NET_POLL_CONTROLLER
2742 static void atl1_poll_controller(struct net_device *netdev)
2743 {
2744         disable_irq(netdev->irq);
2745         atl1_intr(netdev->irq, netdev);
2746         enable_irq(netdev->irq);
2747 }
2748 #endif
2749
2750 /*
2751  * atl1_probe - Device Initialization Routine
2752  * @pdev: PCI device information struct
2753  * @ent: entry in atl1_pci_tbl
2754  *
2755  * Returns 0 on success, negative on failure
2756  *
2757  * atl1_probe initializes an adapter identified by a pci_dev structure.
2758  * The OS initialization, configuring of the adapter private structure,
2759  * and a hardware reset occur.
2760  */
2761 static int __devinit atl1_probe(struct pci_dev *pdev,
2762         const struct pci_device_id *ent)
2763 {
2764         struct net_device *netdev;
2765         struct atl1_adapter *adapter;
2766         static int cards_found = 0;
2767         int err;
2768
2769         err = pci_enable_device(pdev);
2770         if (err)
2771                 return err;
2772
2773         /*
2774          * The atl1 chip can DMA to 64-bit addresses, but it uses a single
2775          * shared register for the high 32 bits, so only a single, aligned,
2776          * 4 GB physical address range can be used at a time.
2777          *
2778          * Supporting 64-bit DMA on this hardware is more trouble than it's
2779          * worth.  It is far easier to limit to 32-bit DMA than update
2780          * various kernel subsystems to support the mechanics required by a
2781          * fixed-high-32-bit system.
2782          */
2783         err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2784         if (err) {
2785                 dev_err(&pdev->dev, "no usable DMA configuration\n");
2786                 goto err_dma;
2787         }
2788         /*
2789          * Mark all PCI regions associated with PCI device
2790          * pdev as being reserved by owner atl1_driver_name
2791          */
2792         err = pci_request_regions(pdev, ATLX_DRIVER_NAME);
2793         if (err)
2794                 goto err_request_regions;
2795
2796         /*
2797          * Enables bus-mastering on the device and calls
2798          * pcibios_set_master to do the needed arch specific settings
2799          */
2800         pci_set_master(pdev);
2801
2802         netdev = alloc_etherdev(sizeof(struct atl1_adapter));
2803         if (!netdev) {
2804                 err = -ENOMEM;
2805                 goto err_alloc_etherdev;
2806         }
2807         SET_NETDEV_DEV(netdev, &pdev->dev);
2808
2809         pci_set_drvdata(pdev, netdev);
2810         adapter = netdev_priv(netdev);
2811         adapter->netdev = netdev;
2812         adapter->pdev = pdev;
2813         adapter->hw.back = adapter;
2814         adapter->msg_enable = netif_msg_init(debug, atl1_default_msg);
2815
2816         adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
2817         if (!adapter->hw.hw_addr) {
2818                 err = -EIO;
2819                 goto err_pci_iomap;
2820         }
2821         /* get device revision number */
2822         adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
2823                 (REG_MASTER_CTRL + 2));
2824         if (netif_msg_probe(adapter))
2825                 dev_info(&pdev->dev, "version %s\n", ATLX_DRIVER_VERSION);
2826
2827         /* set default ring resource counts */
2828         adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
2829         adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
2830
2831         adapter->mii.dev = netdev;
2832         adapter->mii.mdio_read = mdio_read;
2833         adapter->mii.mdio_write = mdio_write;
2834         adapter->mii.phy_id_mask = 0x1f;
2835         adapter->mii.reg_num_mask = 0x1f;
2836
2837         netdev->open = &atl1_open;
2838         netdev->stop = &atl1_close;
2839         netdev->hard_start_xmit = &atl1_xmit_frame;
2840         netdev->get_stats = &atlx_get_stats;
2841         netdev->set_multicast_list = &atlx_set_multi;
2842         netdev->set_mac_address = &atl1_set_mac;
2843         netdev->change_mtu = &atl1_change_mtu;
2844         netdev->do_ioctl = &atlx_ioctl;
2845         netdev->tx_timeout = &atlx_tx_timeout;
2846         netdev->watchdog_timeo = 5 * HZ;
2847 #ifdef CONFIG_NET_POLL_CONTROLLER
2848         netdev->poll_controller = atl1_poll_controller;
2849 #endif
2850         netdev->vlan_rx_register = atlx_vlan_rx_register;
2851
2852         netdev->ethtool_ops = &atl1_ethtool_ops;
2853         adapter->bd_number = cards_found;
2854
2855         /* setup the private structure */
2856         err = atl1_sw_init(adapter);
2857         if (err)
2858                 goto err_common;
2859
2860         netdev->features = NETIF_F_HW_CSUM;
2861         netdev->features |= NETIF_F_SG;
2862         netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
2863         netdev->features |= NETIF_F_TSO;
2864         netdev->features |= NETIF_F_LLTX;
2865
2866         /*
2867          * patch for some L1 of old version,
2868          * the final version of L1 may not need these
2869          * patches
2870          */
2871         /* atl1_pcie_patch(adapter); */
2872
2873         /* really reset GPHY core */
2874         iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
2875
2876         /*
2877          * reset the controller to
2878          * put the device in a known good starting state
2879          */
2880         if (atl1_reset_hw(&adapter->hw)) {
2881                 err = -EIO;
2882                 goto err_common;
2883         }
2884
2885         /* copy the MAC address out of the EEPROM */
2886         atl1_read_mac_addr(&adapter->hw);
2887         memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2888
2889         if (!is_valid_ether_addr(netdev->dev_addr)) {
2890                 err = -EIO;
2891                 goto err_common;
2892         }
2893
2894         atl1_check_options(adapter);
2895
2896         /* pre-init the MAC, and setup link */
2897         err = atl1_init_hw(&adapter->hw);
2898         if (err) {
2899                 err = -EIO;
2900                 goto err_common;
2901         }
2902
2903         atl1_pcie_patch(adapter);
2904         /* assume we have no link for now */
2905         netif_carrier_off(netdev);
2906         netif_stop_queue(netdev);
2907
2908         init_timer(&adapter->watchdog_timer);
2909         adapter->watchdog_timer.function = &atl1_watchdog;
2910         adapter->watchdog_timer.data = (unsigned long)adapter;
2911
2912         init_timer(&adapter->phy_config_timer);
2913         adapter->phy_config_timer.function = &atl1_phy_config;
2914         adapter->phy_config_timer.data = (unsigned long)adapter;
2915         adapter->phy_timer_pending = false;
2916
2917         INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
2918
2919         INIT_WORK(&adapter->link_chg_task, atlx_link_chg_task);
2920
2921         INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
2922
2923         err = register_netdev(netdev);
2924         if (err)
2925                 goto err_common;
2926
2927         cards_found++;
2928         atl1_via_workaround(adapter);
2929         return 0;
2930
2931 err_common:
2932         pci_iounmap(pdev, adapter->hw.hw_addr);
2933 err_pci_iomap:
2934         free_netdev(netdev);
2935 err_alloc_etherdev:
2936         pci_release_regions(pdev);
2937 err_dma:
2938 err_request_regions:
2939         pci_disable_device(pdev);
2940         return err;
2941 }
2942
2943 /*
2944  * atl1_remove - Device Removal Routine
2945  * @pdev: PCI device information struct
2946  *
2947  * atl1_remove is called by the PCI subsystem to alert the driver
2948  * that it should release a PCI device.  The could be caused by a
2949  * Hot-Plug event, or because the driver is going to be removed from
2950  * memory.
2951  */
2952 static void __devexit atl1_remove(struct pci_dev *pdev)
2953 {
2954         struct net_device *netdev = pci_get_drvdata(pdev);
2955         struct atl1_adapter *adapter;
2956         /* Device not available. Return. */
2957         if (!netdev)
2958                 return;
2959
2960         adapter = netdev_priv(netdev);
2961
2962         /*
2963          * Some atl1 boards lack persistent storage for their MAC, and get it
2964          * from the BIOS during POST.  If we've been messing with the MAC
2965          * address, we need to save the permanent one.
2966          */
2967         if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
2968                 memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr,
2969                         ETH_ALEN);
2970                 atl1_set_mac_addr(&adapter->hw);
2971         }
2972
2973         iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
2974         unregister_netdev(netdev);
2975         pci_iounmap(pdev, adapter->hw.hw_addr);
2976         pci_release_regions(pdev);
2977         free_netdev(netdev);
2978         pci_disable_device(pdev);
2979 }
2980
2981 static struct pci_driver atl1_driver = {
2982         .name = ATLX_DRIVER_NAME,
2983         .id_table = atl1_pci_tbl,
2984         .probe = atl1_probe,
2985         .remove = __devexit_p(atl1_remove),
2986         .suspend = atl1_suspend,
2987         .resume = atl1_resume
2988 };
2989
2990 /*
2991  * atl1_exit_module - Driver Exit Cleanup Routine
2992  *
2993  * atl1_exit_module is called just before the driver is removed
2994  * from memory.
2995  */
2996 static void __exit atl1_exit_module(void)
2997 {
2998         pci_unregister_driver(&atl1_driver);
2999 }
3000
3001 /*
3002  * atl1_init_module - Driver Registration Routine
3003  *
3004  * atl1_init_module is the first routine called when the driver is
3005  * loaded. All it does is register with the PCI subsystem.
3006  */
3007 static int __init atl1_init_module(void)
3008 {
3009         return pci_register_driver(&atl1_driver);
3010 }
3011
3012 module_init(atl1_init_module);
3013 module_exit(atl1_exit_module);
3014
3015 struct atl1_stats {
3016         char stat_string[ETH_GSTRING_LEN];
3017         int sizeof_stat;
3018         int stat_offset;
3019 };
3020
3021 #define ATL1_STAT(m) \
3022         sizeof(((struct atl1_adapter *)0)->m), offsetof(struct atl1_adapter, m)
3023
3024 static struct atl1_stats atl1_gstrings_stats[] = {
3025         {"rx_packets", ATL1_STAT(soft_stats.rx_packets)},
3026         {"tx_packets", ATL1_STAT(soft_stats.tx_packets)},
3027         {"rx_bytes", ATL1_STAT(soft_stats.rx_bytes)},
3028         {"tx_bytes", ATL1_STAT(soft_stats.tx_bytes)},
3029         {"rx_errors", ATL1_STAT(soft_stats.rx_errors)},
3030         {"tx_errors", ATL1_STAT(soft_stats.tx_errors)},
3031         {"rx_dropped", ATL1_STAT(net_stats.rx_dropped)},
3032         {"tx_dropped", ATL1_STAT(net_stats.tx_dropped)},
3033         {"multicast", ATL1_STAT(soft_stats.multicast)},
3034         {"collisions", ATL1_STAT(soft_stats.collisions)},
3035         {"rx_length_errors", ATL1_STAT(soft_stats.rx_length_errors)},
3036         {"rx_over_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3037         {"rx_crc_errors", ATL1_STAT(soft_stats.rx_crc_errors)},
3038         {"rx_frame_errors", ATL1_STAT(soft_stats.rx_frame_errors)},
3039         {"rx_fifo_errors", ATL1_STAT(soft_stats.rx_fifo_errors)},
3040         {"rx_missed_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3041         {"tx_aborted_errors", ATL1_STAT(soft_stats.tx_aborted_errors)},
3042         {"tx_carrier_errors", ATL1_STAT(soft_stats.tx_carrier_errors)},
3043         {"tx_fifo_errors", ATL1_STAT(soft_stats.tx_fifo_errors)},
3044         {"tx_window_errors", ATL1_STAT(soft_stats.tx_window_errors)},
3045         {"tx_abort_exce_coll", ATL1_STAT(soft_stats.excecol)},
3046         {"tx_abort_late_coll", ATL1_STAT(soft_stats.latecol)},
3047         {"tx_deferred_ok", ATL1_STAT(soft_stats.deffer)},
3048         {"tx_single_coll_ok", ATL1_STAT(soft_stats.scc)},
3049         {"tx_multi_coll_ok", ATL1_STAT(soft_stats.mcc)},
3050         {"tx_underun", ATL1_STAT(soft_stats.tx_underun)},
3051         {"tx_trunc", ATL1_STAT(soft_stats.tx_trunc)},
3052         {"tx_pause", ATL1_STAT(soft_stats.tx_pause)},
3053         {"rx_pause", ATL1_STAT(soft_stats.rx_pause)},
3054         {"rx_rrd_ov", ATL1_STAT(soft_stats.rx_rrd_ov)},
3055         {"rx_trunc", ATL1_STAT(soft_stats.rx_trunc)}
3056 };
3057
3058 static void atl1_get_ethtool_stats(struct net_device *netdev,
3059         struct ethtool_stats *stats, u64 *data)
3060 {
3061         struct atl1_adapter *adapter = netdev_priv(netdev);
3062         int i;
3063         char *p;
3064
3065         for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3066                 p = (char *)adapter+atl1_gstrings_stats[i].stat_offset;
3067                 data[i] = (atl1_gstrings_stats[i].sizeof_stat ==
3068                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
3069         }
3070
3071 }
3072
3073 static int atl1_get_sset_count(struct net_device *netdev, int sset)
3074 {
3075         switch (sset) {
3076         case ETH_SS_STATS:
3077                 return ARRAY_SIZE(atl1_gstrings_stats);
3078         default:
3079                 return -EOPNOTSUPP;
3080         }
3081 }
3082
3083 static int atl1_get_settings(struct net_device *netdev,
3084         struct ethtool_cmd *ecmd)
3085 {
3086         struct atl1_adapter *adapter = netdev_priv(netdev);
3087         struct atl1_hw *hw = &adapter->hw;
3088
3089         ecmd->supported = (SUPPORTED_10baseT_Half |
3090                            SUPPORTED_10baseT_Full |
3091                            SUPPORTED_100baseT_Half |
3092                            SUPPORTED_100baseT_Full |
3093                            SUPPORTED_1000baseT_Full |
3094                            SUPPORTED_Autoneg | SUPPORTED_TP);
3095         ecmd->advertising = ADVERTISED_TP;
3096         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3097             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3098                 ecmd->advertising |= ADVERTISED_Autoneg;
3099                 if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR) {
3100                         ecmd->advertising |= ADVERTISED_Autoneg;
3101                         ecmd->advertising |=
3102                             (ADVERTISED_10baseT_Half |
3103                              ADVERTISED_10baseT_Full |
3104                              ADVERTISED_100baseT_Half |
3105                              ADVERTISED_100baseT_Full |
3106                              ADVERTISED_1000baseT_Full);
3107                 } else
3108                         ecmd->advertising |= (ADVERTISED_1000baseT_Full);
3109         }
3110         ecmd->port = PORT_TP;
3111         ecmd->phy_address = 0;
3112         ecmd->transceiver = XCVR_INTERNAL;
3113
3114         if (netif_carrier_ok(adapter->netdev)) {
3115                 u16 link_speed, link_duplex;
3116                 atl1_get_speed_and_duplex(hw, &link_speed, &link_duplex);
3117                 ecmd->speed = link_speed;
3118                 if (link_duplex == FULL_DUPLEX)
3119                         ecmd->duplex = DUPLEX_FULL;
3120                 else
3121                         ecmd->duplex = DUPLEX_HALF;
3122         } else {
3123                 ecmd->speed = -1;
3124                 ecmd->duplex = -1;
3125         }
3126         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3127             hw->media_type == MEDIA_TYPE_1000M_FULL)
3128                 ecmd->autoneg = AUTONEG_ENABLE;
3129         else
3130                 ecmd->autoneg = AUTONEG_DISABLE;
3131
3132         return 0;
3133 }
3134
3135 static int atl1_set_settings(struct net_device *netdev,
3136         struct ethtool_cmd *ecmd)
3137 {
3138         struct atl1_adapter *adapter = netdev_priv(netdev);
3139         struct atl1_hw *hw = &adapter->hw;
3140         u16 phy_data;
3141         int ret_val = 0;
3142         u16 old_media_type = hw->media_type;
3143
3144         if (netif_running(adapter->netdev)) {
3145                 if (netif_msg_link(adapter))
3146                         dev_dbg(&adapter->pdev->dev,
3147                                 "ethtool shutting down adapter\n");
3148                 atl1_down(adapter);
3149         }
3150
3151         if (ecmd->autoneg == AUTONEG_ENABLE)
3152                 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
3153         else {
3154                 if (ecmd->speed == SPEED_1000) {
3155                         if (ecmd->duplex != DUPLEX_FULL) {
3156                                 if (netif_msg_link(adapter))
3157                                         dev_warn(&adapter->pdev->dev,
3158                                                 "1000M half is invalid\n");
3159                                 ret_val = -EINVAL;
3160                                 goto exit_sset;
3161                         }
3162                         hw->media_type = MEDIA_TYPE_1000M_FULL;
3163                 } else if (ecmd->speed == SPEED_100) {
3164                         if (ecmd->duplex == DUPLEX_FULL)
3165                                 hw->media_type = MEDIA_TYPE_100M_FULL;
3166                         else
3167                                 hw->media_type = MEDIA_TYPE_100M_HALF;
3168                 } else {
3169                         if (ecmd->duplex == DUPLEX_FULL)
3170                                 hw->media_type = MEDIA_TYPE_10M_FULL;
3171                         else
3172                                 hw->media_type = MEDIA_TYPE_10M_HALF;
3173                 }
3174         }
3175         switch (hw->media_type) {
3176         case MEDIA_TYPE_AUTO_SENSOR:
3177                 ecmd->advertising =
3178                     ADVERTISED_10baseT_Half |
3179                     ADVERTISED_10baseT_Full |
3180                     ADVERTISED_100baseT_Half |
3181                     ADVERTISED_100baseT_Full |
3182                     ADVERTISED_1000baseT_Full |
3183                     ADVERTISED_Autoneg | ADVERTISED_TP;
3184                 break;
3185         case MEDIA_TYPE_1000M_FULL:
3186                 ecmd->advertising =
3187                     ADVERTISED_1000baseT_Full |
3188                     ADVERTISED_Autoneg | ADVERTISED_TP;
3189                 break;
3190         default:
3191                 ecmd->advertising = 0;
3192                 break;
3193         }
3194         if (atl1_phy_setup_autoneg_adv(hw)) {
3195                 ret_val = -EINVAL;
3196                 if (netif_msg_link(adapter))
3197                         dev_warn(&adapter->pdev->dev,
3198                                 "invalid ethtool speed/duplex setting\n");
3199                 goto exit_sset;
3200         }
3201         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3202             hw->media_type == MEDIA_TYPE_1000M_FULL)
3203                 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3204         else {
3205                 switch (hw->media_type) {
3206                 case MEDIA_TYPE_100M_FULL:
3207                         phy_data =
3208                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
3209                             MII_CR_RESET;
3210                         break;
3211                 case MEDIA_TYPE_100M_HALF:
3212                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3213                         break;
3214                 case MEDIA_TYPE_10M_FULL:
3215                         phy_data =
3216                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
3217                         break;
3218                 default:
3219                         /* MEDIA_TYPE_10M_HALF: */
3220                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3221                         break;
3222                 }
3223         }
3224         atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3225 exit_sset:
3226         if (ret_val)
3227                 hw->media_type = old_media_type;
3228
3229         if (netif_running(adapter->netdev)) {
3230                 if (netif_msg_link(adapter))
3231                         dev_dbg(&adapter->pdev->dev,
3232                                 "ethtool starting adapter\n");
3233                 atl1_up(adapter);
3234         } else if (!ret_val) {
3235                 if (netif_msg_link(adapter))
3236                         dev_dbg(&adapter->pdev->dev,
3237                                 "ethtool resetting adapter\n");
3238                 atl1_reset(adapter);
3239         }
3240         return ret_val;
3241 }
3242
3243 static void atl1_get_drvinfo(struct net_device *netdev,
3244         struct ethtool_drvinfo *drvinfo)
3245 {
3246         struct atl1_adapter *adapter = netdev_priv(netdev);
3247
3248         strncpy(drvinfo->driver, ATLX_DRIVER_NAME, sizeof(drvinfo->driver));
3249         strncpy(drvinfo->version, ATLX_DRIVER_VERSION,
3250                 sizeof(drvinfo->version));
3251         strncpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
3252         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
3253                 sizeof(drvinfo->bus_info));
3254         drvinfo->eedump_len = ATL1_EEDUMP_LEN;
3255 }
3256
3257 static void atl1_get_wol(struct net_device *netdev,
3258         struct ethtool_wolinfo *wol)
3259 {
3260         struct atl1_adapter *adapter = netdev_priv(netdev);
3261
3262         wol->supported = WAKE_UCAST | WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
3263         wol->wolopts = 0;
3264         if (adapter->wol & ATLX_WUFC_EX)
3265                 wol->wolopts |= WAKE_UCAST;
3266         if (adapter->wol & ATLX_WUFC_MC)
3267                 wol->wolopts |= WAKE_MCAST;
3268         if (adapter->wol & ATLX_WUFC_BC)
3269                 wol->wolopts |= WAKE_BCAST;
3270         if (adapter->wol & ATLX_WUFC_MAG)
3271                 wol->wolopts |= WAKE_MAGIC;
3272         return;
3273 }
3274
3275 static int atl1_set_wol(struct net_device *netdev,
3276         struct ethtool_wolinfo *wol)
3277 {
3278         struct atl1_adapter *adapter = netdev_priv(netdev);
3279
3280         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
3281                 return -EOPNOTSUPP;
3282         adapter->wol = 0;
3283         if (wol->wolopts & WAKE_UCAST)
3284                 adapter->wol |= ATLX_WUFC_EX;
3285         if (wol->wolopts & WAKE_MCAST)
3286                 adapter->wol |= ATLX_WUFC_MC;
3287         if (wol->wolopts & WAKE_BCAST)
3288                 adapter->wol |= ATLX_WUFC_BC;
3289         if (wol->wolopts & WAKE_MAGIC)
3290                 adapter->wol |= ATLX_WUFC_MAG;
3291         return 0;
3292 }
3293
3294 static u32 atl1_get_msglevel(struct net_device *netdev)
3295 {
3296         struct atl1_adapter *adapter = netdev_priv(netdev);
3297         return adapter->msg_enable;
3298 }
3299
3300 static void atl1_set_msglevel(struct net_device *netdev, u32 value)
3301 {
3302         struct atl1_adapter *adapter = netdev_priv(netdev);
3303         adapter->msg_enable = value;
3304 }
3305
3306 static int atl1_get_regs_len(struct net_device *netdev)
3307 {
3308         return ATL1_REG_COUNT * sizeof(u32);
3309 }
3310
3311 static void atl1_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
3312         void *p)
3313 {
3314         struct atl1_adapter *adapter = netdev_priv(netdev);
3315         struct atl1_hw *hw = &adapter->hw;
3316         unsigned int i;
3317         u32 *regbuf = p;
3318
3319         for (i = 0; i < ATL1_REG_COUNT; i++) {
3320                 /*
3321                  * This switch statement avoids reserved regions
3322                  * of register space.
3323                  */
3324                 switch (i) {
3325                 case 6 ... 9:
3326                 case 14:
3327                 case 29 ... 31:
3328                 case 34 ... 63:
3329                 case 75 ... 127:
3330                 case 136 ... 1023:
3331                 case 1027 ... 1087:
3332                 case 1091 ... 1151:
3333                 case 1194 ... 1195:
3334                 case 1200 ... 1201:
3335                 case 1206 ... 1213:
3336                 case 1216 ... 1279:
3337                 case 1290 ... 1311:
3338                 case 1323 ... 1343:
3339                 case 1358 ... 1359:
3340                 case 1368 ... 1375:
3341                 case 1378 ... 1383:
3342                 case 1388 ... 1391:
3343                 case 1393 ... 1395:
3344                 case 1402 ... 1403:
3345                 case 1410 ... 1471:
3346                 case 1522 ... 1535:
3347                         /* reserved region; don't read it */
3348                         regbuf[i] = 0;
3349                         break;
3350                 default:
3351                         /* unreserved region */
3352                         regbuf[i] = ioread32(hw->hw_addr + (i * sizeof(u32)));
3353                 }
3354         }
3355 }
3356
3357 static void atl1_get_ringparam(struct net_device *netdev,
3358         struct ethtool_ringparam *ring)
3359 {
3360         struct atl1_adapter *adapter = netdev_priv(netdev);
3361         struct atl1_tpd_ring *txdr = &adapter->tpd_ring;
3362         struct atl1_rfd_ring *rxdr = &adapter->rfd_ring;
3363
3364         ring->rx_max_pending = ATL1_MAX_RFD;
3365         ring->tx_max_pending = ATL1_MAX_TPD;
3366         ring->rx_mini_max_pending = 0;
3367         ring->rx_jumbo_max_pending = 0;
3368         ring->rx_pending = rxdr->count;
3369         ring->tx_pending = txdr->count;
3370         ring->rx_mini_pending = 0;
3371         ring->rx_jumbo_pending = 0;
3372 }
3373
3374 static int atl1_set_ringparam(struct net_device *netdev,
3375         struct ethtool_ringparam *ring)
3376 {
3377         struct atl1_adapter *adapter = netdev_priv(netdev);
3378         struct atl1_tpd_ring *tpdr = &adapter->tpd_ring;
3379         struct atl1_rrd_ring *rrdr = &adapter->rrd_ring;
3380         struct atl1_rfd_ring *rfdr = &adapter->rfd_ring;
3381
3382         struct atl1_tpd_ring tpd_old, tpd_new;
3383         struct atl1_rfd_ring rfd_old, rfd_new;
3384         struct atl1_rrd_ring rrd_old, rrd_new;
3385         struct atl1_ring_header rhdr_old, rhdr_new;
3386         int err;
3387
3388         tpd_old = adapter->tpd_ring;
3389         rfd_old = adapter->rfd_ring;
3390         rrd_old = adapter->rrd_ring;
3391         rhdr_old = adapter->ring_header;
3392
3393         if (netif_running(adapter->netdev))
3394                 atl1_down(adapter);
3395
3396         rfdr->count = (u16) max(ring->rx_pending, (u32) ATL1_MIN_RFD);
3397         rfdr->count = rfdr->count > ATL1_MAX_RFD ? ATL1_MAX_RFD :
3398                         rfdr->count;
3399         rfdr->count = (rfdr->count + 3) & ~3;
3400         rrdr->count = rfdr->count;
3401
3402         tpdr->count = (u16) max(ring->tx_pending, (u32) ATL1_MIN_TPD);
3403         tpdr->count = tpdr->count > ATL1_MAX_TPD ? ATL1_MAX_TPD :
3404                         tpdr->count;
3405         tpdr->count = (tpdr->count + 3) & ~3;
3406
3407         if (netif_running(adapter->netdev)) {
3408                 /* try to get new resources before deleting old */
3409                 err = atl1_setup_ring_resources(adapter);
3410                 if (err)
3411                         goto err_setup_ring;
3412
3413                 /*
3414                  * save the new, restore the old in order to free it,
3415                  * then restore the new back again
3416                  */
3417
3418                 rfd_new = adapter->rfd_ring;
3419                 rrd_new = adapter->rrd_ring;
3420                 tpd_new = adapter->tpd_ring;
3421                 rhdr_new = adapter->ring_header;
3422                 adapter->rfd_ring = rfd_old;
3423                 adapter->rrd_ring = rrd_old;
3424                 adapter->tpd_ring = tpd_old;
3425                 adapter->ring_header = rhdr_old;
3426                 atl1_free_ring_resources(adapter);
3427                 adapter->rfd_ring = rfd_new;
3428                 adapter->rrd_ring = rrd_new;
3429                 adapter->tpd_ring = tpd_new;
3430                 adapter->ring_header = rhdr_new;
3431
3432                 err = atl1_up(adapter);
3433                 if (err)
3434                         return err;
3435         }
3436         return 0;
3437
3438 err_setup_ring:
3439         adapter->rfd_ring = rfd_old;
3440         adapter->rrd_ring = rrd_old;
3441         adapter->tpd_ring = tpd_old;
3442         adapter->ring_header = rhdr_old;
3443         atl1_up(adapter);
3444         return err;
3445 }
3446
3447 static void atl1_get_pauseparam(struct net_device *netdev,
3448         struct ethtool_pauseparam *epause)
3449 {
3450         struct atl1_adapter *adapter = netdev_priv(netdev);
3451         struct atl1_hw *hw = &adapter->hw;
3452
3453         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3454             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3455                 epause->autoneg = AUTONEG_ENABLE;
3456         } else {
3457                 epause->autoneg = AUTONEG_DISABLE;
3458         }
3459         epause->rx_pause = 1;
3460         epause->tx_pause = 1;
3461 }
3462
3463 static int atl1_set_pauseparam(struct net_device *netdev,
3464         struct ethtool_pauseparam *epause)
3465 {
3466         struct atl1_adapter *adapter = netdev_priv(netdev);
3467         struct atl1_hw *hw = &adapter->hw;
3468
3469         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3470             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3471                 epause->autoneg = AUTONEG_ENABLE;
3472         } else {
3473                 epause->autoneg = AUTONEG_DISABLE;
3474         }
3475
3476         epause->rx_pause = 1;
3477         epause->tx_pause = 1;
3478
3479         return 0;
3480 }
3481
3482 /* FIXME: is this right? -- CHS */
3483 static u32 atl1_get_rx_csum(struct net_device *netdev)
3484 {
3485         return 1;
3486 }
3487
3488 static void atl1_get_strings(struct net_device *netdev, u32 stringset,
3489         u8 *data)
3490 {
3491         u8 *p = data;
3492         int i;
3493
3494         switch (stringset) {
3495         case ETH_SS_STATS:
3496                 for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3497                         memcpy(p, atl1_gstrings_stats[i].stat_string,
3498                                 ETH_GSTRING_LEN);
3499                         p += ETH_GSTRING_LEN;
3500                 }
3501                 break;
3502         }
3503 }
3504
3505 static int atl1_nway_reset(struct net_device *netdev)
3506 {
3507         struct atl1_adapter *adapter = netdev_priv(netdev);
3508         struct atl1_hw *hw = &adapter->hw;
3509
3510         if (netif_running(netdev)) {
3511                 u16 phy_data;
3512                 atl1_down(adapter);
3513
3514                 if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3515                         hw->media_type == MEDIA_TYPE_1000M_FULL) {
3516                         phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3517                 } else {
3518                         switch (hw->media_type) {
3519                         case MEDIA_TYPE_100M_FULL:
3520                                 phy_data = MII_CR_FULL_DUPLEX |
3521                                         MII_CR_SPEED_100 | MII_CR_RESET;
3522                                 break;
3523                         case MEDIA_TYPE_100M_HALF:
3524                                 phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3525                                 break;
3526                         case MEDIA_TYPE_10M_FULL:
3527                                 phy_data = MII_CR_FULL_DUPLEX |
3528                                         MII_CR_SPEED_10 | MII_CR_RESET;
3529                                 break;
3530                         default:
3531                                 /* MEDIA_TYPE_10M_HALF */
3532                                 phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3533                         }
3534                 }
3535                 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3536                 atl1_up(adapter);
3537         }
3538         return 0;
3539 }
3540
3541 const struct ethtool_ops atl1_ethtool_ops = {
3542         .get_settings           = atl1_get_settings,
3543         .set_settings           = atl1_set_settings,
3544         .get_drvinfo            = atl1_get_drvinfo,
3545         .get_wol                = atl1_get_wol,
3546         .set_wol                = atl1_set_wol,
3547         .get_msglevel           = atl1_get_msglevel,
3548         .set_msglevel           = atl1_set_msglevel,
3549         .get_regs_len           = atl1_get_regs_len,
3550         .get_regs               = atl1_get_regs,
3551         .get_ringparam          = atl1_get_ringparam,
3552         .set_ringparam          = atl1_set_ringparam,
3553         .get_pauseparam         = atl1_get_pauseparam,
3554         .set_pauseparam         = atl1_set_pauseparam,
3555         .get_rx_csum            = atl1_get_rx_csum,
3556         .set_tx_csum            = ethtool_op_set_tx_hw_csum,
3557         .get_link               = ethtool_op_get_link,
3558         .set_sg                 = ethtool_op_set_sg,
3559         .get_strings            = atl1_get_strings,
3560         .nway_reset             = atl1_nway_reset,
3561         .get_ethtool_stats      = atl1_get_ethtool_stats,
3562         .get_sset_count         = atl1_get_sset_count,
3563         .set_tso                = ethtool_op_set_tso,
3564 };