drivers/mtd/onenand/onenand_base.c

   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005-2007 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  *  Credits:
   8  *      Adrian Hunter <ext-adrian.hunter@nokia.com>:
   9  *      auto-placement support, read-while load support, various fixes
  10  *      Copyright (C) Nokia Corporation, 2007
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/init.h>
  20 #include <linux/sched.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/jiffies.h>
  23 #include <linux/mtd/mtd.h>
  24 #include <linux/mtd/onenand.h>
  25 #include <linux/mtd/partitions.h>
  26
  27 #include <asm/io.h>
  28
  29 /**
  30  * onenand_oob_64 - oob info for large (2KB) page
  31  */
  32 static struct nand_ecclayout onenand_oob_64 = {
  33         .eccbytes       = 20,
  34         .eccpos         = {
  35                 8, 9, 10, 11, 12,
  36                 24, 25, 26, 27, 28,
  37                 40, 41, 42, 43, 44,
  38                 56, 57, 58, 59, 60,
  39                 },
  40         .oobfree        = {
  41                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
  42                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
  43         }
  44 };
  45
  46 /**
  47  * onenand_oob_32 - oob info for middle (1KB) page
  48  */
  49 static struct nand_ecclayout onenand_oob_32 = {
  50         .eccbytes       = 10,
  51         .eccpos         = {
  52                 8, 9, 10, 11, 12,
  53                 24, 25, 26, 27, 28,
  54                 },
  55         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  56 };
  57
  58 static const unsigned char ffchars[] = {
  59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  62         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  63         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  64         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  65         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  66         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  67 };
  68
  69 /**
  70  * onenand_readw - [OneNAND Interface] Read OneNAND register
  71  * @param addr          address to read
  72  *
  73  * Read OneNAND register
  74  */
  75 static unsigned short onenand_readw(void __iomem *addr)
  76 {
  77         return readw(addr);
  78 }
  79
  80 /**
  81  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  82  * @param value         value to write
  83  * @param addr          address to write
  84  *
  85  * Write OneNAND register with value
  86  */
  87 static void onenand_writew(unsigned short value, void __iomem *addr)
  88 {
  89         writew(value, addr);
  90 }
  91
  92 /**
  93  * onenand_block_address - [DEFAULT] Get block address
  94  * @param this          onenand chip data structure
  95  * @param block         the block
  96  * @return              translated block address if DDP, otherwise same
  97  *
  98  * Setup Start Address 1 Register (F100h)
  99  */
 100 static int onenand_block_address(struct onenand_chip *this, int block)
 101 {
 102         /* Device Flash Core select, NAND Flash Block Address */
 103         if (block & this->density_mask)
 104                 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
 105
 106         return block;
 107 }
 108
 109 /**
 110  * onenand_bufferram_address - [DEFAULT] Get bufferram address
 111  * @param this          onenand chip data structure
 112  * @param block         the block
 113  * @return              set DBS value if DDP, otherwise 0
 114  *
 115  * Setup Start Address 2 Register (F101h) for DDP
 116  */
 117 static int onenand_bufferram_address(struct onenand_chip *this, int block)
 118 {
 119         /* Device BufferRAM Select */
 120         if (block & this->density_mask)
 121                 return ONENAND_DDP_CHIP1;
 122
 123         return ONENAND_DDP_CHIP0;
 124 }
 125
 126 /**
 127  * onenand_page_address - [DEFAULT] Get page address
 128  * @param page          the page address
 129  * @param sector        the sector address
 130  * @return              combined page and sector address
 131  *
 132  * Setup Start Address 8 Register (F107h)
 133  */
 134 static int onenand_page_address(int page, int sector)
 135 {
 136         /* Flash Page Address, Flash Sector Address */
 137         int fpa, fsa;
 138
 139         fpa = page & ONENAND_FPA_MASK;
 140         fsa = sector & ONENAND_FSA_MASK;
 141
 142         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 143 }
 144
 145 /**
 146  * onenand_buffer_address - [DEFAULT] Get buffer address
 147  * @param dataram1      DataRAM index
 148  * @param sectors       the sector address
 149  * @param count         the number of sectors
 150  * @return              the start buffer value
 151  *
 152  * Setup Start Buffer Register (F200h)
 153  */
 154 static int onenand_buffer_address(int dataram1, int sectors, int count)
 155 {
 156         int bsa, bsc;
 157
 158         /* BufferRAM Sector Address */
 159         bsa = sectors & ONENAND_BSA_MASK;
 160
 161         if (dataram1)
 162                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 163         else
 164                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 165
 166         /* BufferRAM Sector Count */
 167         bsc = count & ONENAND_BSC_MASK;
 168
 169         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 170 }
 171
 172 /**
 173  * onenand_command - [DEFAULT] Send command to OneNAND device
 174  * @param mtd           MTD device structure
 175  * @param cmd           the command to be sent
 176  * @param addr          offset to read from or write to
 177  * @param len           number of bytes to read or write
 178  *
 179  * Send command to OneNAND device. This function is used for middle/large page
 180  * devices (1KB/2KB Bytes per page)
 181  */
 182 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
 183 {
 184         struct onenand_chip *this = mtd->priv;
 185         int value, readcmd = 0, block_cmd = 0;
 186         int block, page;
 187
 188         /* Address translation */
 189         switch (cmd) {
 190         case ONENAND_CMD_UNLOCK:
 191         case ONENAND_CMD_LOCK:
 192         case ONENAND_CMD_LOCK_TIGHT:
 193         case ONENAND_CMD_UNLOCK_ALL:
 194                 block = -1;
 195                 page = -1;
 196                 break;
 197
 198         case ONENAND_CMD_ERASE:
 199         case ONENAND_CMD_BUFFERRAM:
 200         case ONENAND_CMD_OTP_ACCESS:
 201                 block_cmd = 1;
 202                 block = (int) (addr >> this->erase_shift);
 203                 page = -1;
 204                 break;
 205
 206         default:
 207                 block = (int) (addr >> this->erase_shift);
 208                 page = (int) (addr >> this->page_shift);
 209
 210                 if (ONENAND_IS_2PLANE(this)) {
 211                         /* Make the even block number */
 212                         block &= ~1;
 213                         /* Is it the odd plane? */
 214                         if (addr & this->writesize)
 215                                 block++;
 216                         page >>= 1;
 217                 }
 218                 page &= this->page_mask;
 219                 break;
 220         }
 221
 222         /* NOTE: The setting order of the registers is very important! */
 223         if (cmd == ONENAND_CMD_BUFFERRAM) {
 224                 /* Select DataRAM for DDP */
 225                 value = onenand_bufferram_address(this, block);
 226                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 227
 228                 if (ONENAND_IS_2PLANE(this))
 229                         /* It is always BufferRAM0 */
 230                         ONENAND_SET_BUFFERRAM0(this);
 231                 else
 232                         /* Switch to the next data buffer */
 233                         ONENAND_SET_NEXT_BUFFERRAM(this);
 234
 235                 return 0;
 236         }
 237
 238         if (block != -1) {
 239                 /* Write 'DFS, FBA' of Flash */
 240                 value = onenand_block_address(this, block);
 241                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
 242
 243                 if (block_cmd) {
 244                         /* Select DataRAM for DDP */
 245                         value = onenand_bufferram_address(this, block);
 246                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 247                 }
 248         }
 249
 250         if (page != -1) {
 251                 /* Now we use page size operation */
 252                 int sectors = 4, count = 4;
 253                 int dataram;
 254
 255                 switch (cmd) {
 256                 case ONENAND_CMD_READ:
 257                 case ONENAND_CMD_READOOB:
 258                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 259                         readcmd = 1;
 260                         break;
 261
 262                 default:
 263                         if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
 264                                 cmd = ONENAND_CMD_2X_PROG;
 265                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 266                         break;
 267                 }
 268
 269                 /* Write 'FPA, FSA' of Flash */
 270                 value = onenand_page_address(page, sectors);
 271                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
 272
 273                 /* Write 'BSA, BSC' of DataRAM */
 274                 value = onenand_buffer_address(dataram, sectors, count);
 275                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 276
 277                 if (readcmd) {
 278                         /* Select DataRAM for DDP */
 279                         value = onenand_bufferram_address(this, block);
 280                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 281                 }
 282         }
 283
 284         /* Interrupt clear */
 285         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 286
 287         /* Write command */
 288         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 289
 290         return 0;
 291 }
 292
 293 /**
 294  * onenand_wait - [DEFAULT] wait until the command is done
 295  * @param mtd           MTD device structure
 296  * @param state         state to select the max. timeout value
 297  *
 298  * Wait for command done. This applies to all OneNAND command
 299  * Read can take up to 30us, erase up to 2ms and program up to 350us
 300  * according to general OneNAND specs
 301  */
 302 static int onenand_wait(struct mtd_info *mtd, int state)
 303 {
 304         struct onenand_chip * this = mtd->priv;
 305         unsigned long timeout;
 306         unsigned int flags = ONENAND_INT_MASTER;
 307         unsigned int interrupt = 0;
 308         unsigned int ctrl;
 309
 310         /* The 20 msec is enough */
 311         timeout = jiffies + msecs_to_jiffies(20);
 312         while (time_before(jiffies, timeout)) {
 313                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 314
 315                 if (interrupt & flags)
 316                         break;
 317
 318                 if (state != FL_READING)
 319                         cond_resched();
 320         }
 321         /* To get correct interrupt status in timeout case */
 322         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 323
 324         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 325
 326         if (ctrl & ONENAND_CTRL_ERROR) {
 327                 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
 328                 if (ctrl & ONENAND_CTRL_LOCK)
 329                         printk(KERN_ERR "onenand_wait: it's locked error.\n");
 330                 return ctrl;
 331         }
 332
 333         if (interrupt & ONENAND_INT_READ) {
 334                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 335                 if (ecc) {
 336                         printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
 337                         if (ecc & ONENAND_ECC_2BIT_ALL) {
 338                                 mtd->ecc_stats.failed++;
 339                                 return ecc;
 340                         } else if (ecc & ONENAND_ECC_1BIT_ALL)
 341                                 mtd->ecc_stats.corrected++;
 342                 }
 343         } else if (state == FL_READING) {
 344                 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
 345                 return -EIO;
 346         }
 347
 348         return 0;
 349 }
 350
 351 /*
 352  * onenand_interrupt - [DEFAULT] onenand interrupt handler
 353  * @param irq           onenand interrupt number
 354  * @param dev_id        interrupt data
 355  *
 356  * complete the work
 357  */
 358 static irqreturn_t onenand_interrupt(int irq, void *data)
 359 {
 360         struct onenand_chip *this = (struct onenand_chip *) data;
 361
 362         /* To handle shared interrupt */
 363         if (!this->complete.done)
 364                 complete(&this->complete);
 365
 366         return IRQ_HANDLED;
 367 }
 368
 369 /*
 370  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
 371  * @param mtd           MTD device structure
 372  * @param state         state to select the max. timeout value
 373  *
 374  * Wait for command done.
 375  */
 376 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
 377 {
 378         struct onenand_chip *this = mtd->priv;
 379
 380         wait_for_completion(&this->complete);
 381
 382         return onenand_wait(mtd, state);
 383 }
 384
 385 /*
 386  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
 387  * @param mtd           MTD device structure
 388  * @param state         state to select the max. timeout value
 389  *
 390  * Try interrupt based wait (It is used one-time)
 391  */
 392 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
 393 {
 394         struct onenand_chip *this = mtd->priv;
 395         unsigned long remain, timeout;
 396
 397         /* We use interrupt wait first */
 398         this->wait = onenand_interrupt_wait;
 399
 400         timeout = msecs_to_jiffies(100);
 401         remain = wait_for_completion_timeout(&this->complete, timeout);
 402         if (!remain) {
 403                 printk(KERN_INFO "OneNAND: There's no interrupt. "
 404                                 "We use the normal wait\n");
 405
 406                 /* Release the irq */
 407                 free_irq(this->irq, this);
 408
 409                 this->wait = onenand_wait;
 410         }
 411
 412         return onenand_wait(mtd, state);
 413 }
 414
 415 /*
 416  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
 417  * @param mtd           MTD device structure
 418  *
 419  * There's two method to wait onenand work
 420  * 1. polling - read interrupt status register
 421  * 2. interrupt - use the kernel interrupt method
 422  */
 423 static void onenand_setup_wait(struct mtd_info *mtd)
 424 {
 425         struct onenand_chip *this = mtd->priv;
 426         int syscfg;
 427
 428         init_completion(&this->complete);
 429
 430         if (this->irq <= 0) {
 431                 this->wait = onenand_wait;
 432                 return;
 433         }
 434
 435         if (request_irq(this->irq, &onenand_interrupt,
 436                                 IRQF_SHARED, "onenand", this)) {
 437                 /* If we can't get irq, use the normal wait */
 438                 this->wait = onenand_wait;
 439                 return;
 440         }
 441
 442         /* Enable interrupt */
 443         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
 444         syscfg |= ONENAND_SYS_CFG1_IOBE;
 445         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
 446
 447         this->wait = onenand_try_interrupt_wait;
 448 }
 449
 450 /**
 451  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 452  * @param mtd           MTD data structure
 453  * @param area          BufferRAM area
 454  * @return              offset given area
 455  *
 456  * Return BufferRAM offset given area
 457  */
 458 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 459 {
 460         struct onenand_chip *this = mtd->priv;
 461
 462         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 463                 /* Note: the 'this->writesize' is a real page size */
 464                 if (area == ONENAND_DATARAM)
 465                         return this->writesize;
 466                 if (area == ONENAND_SPARERAM)
 467                         return mtd->oobsize;
 468         }
 469
 470         return 0;
 471 }
 472
 473 /**
 474  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 475  * @param mtd           MTD data structure
 476  * @param area          BufferRAM area
 477  * @param buffer        the databuffer to put/get data
 478  * @param offset        offset to read from or write to
 479  * @param count         number of bytes to read/write
 480  *
 481  * Read the BufferRAM area
 482  */
 483 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 484                 unsigned char *buffer, int offset, size_t count)
 485 {
 486         struct onenand_chip *this = mtd->priv;
 487         void __iomem *bufferram;
 488
 489         bufferram = this->base + area;
 490
 491         bufferram += onenand_bufferram_offset(mtd, area);
 492
 493         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 494                 unsigned short word;
 495
 496                 /* Align with word(16-bit) size */
 497                 count--;
 498
 499                 /* Read word and save byte */
 500                 word = this->read_word(bufferram + offset + count);
 501                 buffer[count] = (word & 0xff);
 502         }
 503
 504         memcpy(buffer, bufferram + offset, count);
 505
 506         return 0;
 507 }
 508
 509 /**
 510  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 511  * @param mtd           MTD data structure
 512  * @param area          BufferRAM area
 513  * @param buffer        the databuffer to put/get data
 514  * @param offset        offset to read from or write to
 515  * @param count         number of bytes to read/write
 516  *
 517  * Read the BufferRAM area with Sync. Burst Mode
 518  */
 519 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 520                 unsigned char *buffer, int offset, size_t count)
 521 {
 522         struct onenand_chip *this = mtd->priv;
 523         void __iomem *bufferram;
 524
 525         bufferram = this->base + area;
 526
 527         bufferram += onenand_bufferram_offset(mtd, area);
 528
 529         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 530
 531         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 532                 unsigned short word;
 533
 534                 /* Align with word(16-bit) size */
 535                 count--;
 536
 537                 /* Read word and save byte */
 538                 word = this->read_word(bufferram + offset + count);
 539                 buffer[count] = (word & 0xff);
 540         }
 541
 542         memcpy(buffer, bufferram + offset, count);
 543
 544         this->mmcontrol(mtd, 0);
 545
 546         return 0;
 547 }
 548
 549 /**
 550  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 551  * @param mtd           MTD data structure
 552  * @param area          BufferRAM area
 553  * @param buffer        the databuffer to put/get data
 554  * @param offset        offset to read from or write to
 555  * @param count         number of bytes to read/write
 556  *
 557  * Write the BufferRAM area
 558  */
 559 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 560                 const unsigned char *buffer, int offset, size_t count)
 561 {
 562         struct onenand_chip *this = mtd->priv;
 563         void __iomem *bufferram;
 564
 565         bufferram = this->base + area;
 566
 567         bufferram += onenand_bufferram_offset(mtd, area);
 568
 569         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 570                 unsigned short word;
 571                 int byte_offset;
 572
 573                 /* Align with word(16-bit) size */
 574                 count--;
 575
 576                 /* Calculate byte access offset */
 577                 byte_offset = offset + count;
 578
 579                 /* Read word and save byte */
 580                 word = this->read_word(bufferram + byte_offset);
 581                 word = (word & ~0xff) | buffer[count];
 582                 this->write_word(word, bufferram + byte_offset);
 583         }
 584
 585         memcpy(bufferram + offset, buffer, count);
 586
 587         return 0;
 588 }
 589
 590 /**
 591  * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
 592  * @param mtd           MTD data structure
 593  * @param addr          address to check
 594  * @return              blockpage address
 595  *
 596  * Get blockpage address at 2x program mode
 597  */
 598 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
 599 {
 600         struct onenand_chip *this = mtd->priv;
 601         int blockpage, block, page;
 602
 603         /* Calculate the even block number */
 604         block = (int) (addr >> this->erase_shift) & ~1;
 605         /* Is it the odd plane? */
 606         if (addr & this->writesize)
 607                 block++;
 608         page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
 609         blockpage = (block << 7) | page;
 610
 611         return blockpage;
 612 }
 613
 614 /**
 615  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 616  * @param mtd           MTD data structure
 617  * @param addr          address to check
 618  * @return              1 if there are valid data, otherwise 0
 619  *
 620  * Check bufferram if there is data we required
 621  */
 622 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 623 {
 624         struct onenand_chip *this = mtd->priv;
 625         int blockpage, found = 0;
 626         unsigned int i;
 627
 628         if (ONENAND_IS_2PLANE(this))
 629                 blockpage = onenand_get_2x_blockpage(mtd, addr);
 630         else
 631                 blockpage = (int) (addr >> this->page_shift);
 632
 633         /* Is there valid data? */
 634         i = ONENAND_CURRENT_BUFFERRAM(this);
 635         if (this->bufferram[i].blockpage == blockpage)
 636                 found = 1;
 637         else {
 638                 /* Check another BufferRAM */
 639                 i = ONENAND_NEXT_BUFFERRAM(this);
 640                 if (this->bufferram[i].blockpage == blockpage) {
 641                         ONENAND_SET_NEXT_BUFFERRAM(this);
 642                         found = 1;
 643                 }
 644         }
 645
 646         if (found && ONENAND_IS_DDP(this)) {
 647                 /* Select DataRAM for DDP */
 648                 int block = (int) (addr >> this->erase_shift);
 649                 int value = onenand_bufferram_address(this, block);
 650                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 651         }
 652
 653         return found;
 654 }
 655
 656 /**
 657  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 658  * @param mtd           MTD data structure
 659  * @param addr          address to update
 660  * @param valid         valid flag
 661  *
 662  * Update BufferRAM information
 663  */
 664 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 665                 int valid)
 666 {
 667         struct onenand_chip *this = mtd->priv;
 668         int blockpage;
 669         unsigned int i;
 670
 671         if (ONENAND_IS_2PLANE(this))
 672                 blockpage = onenand_get_2x_blockpage(mtd, addr);
 673         else
 674                 blockpage = (int) (addr >> this->page_shift);
 675
 676         /* Invalidate another BufferRAM */
 677         i = ONENAND_NEXT_BUFFERRAM(this);
 678         if (this->bufferram[i].blockpage == blockpage)
 679                 this->bufferram[i].blockpage = -1;
 680
 681         /* Update BufferRAM */
 682         i = ONENAND_CURRENT_BUFFERRAM(this);
 683         if (valid)
 684                 this->bufferram[i].blockpage = blockpage;
 685         else
 686                 this->bufferram[i].blockpage = -1;
 687 }
 688
 689 /**
 690  * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
 691  * @param mtd           MTD data structure
 692  * @param addr          start address to invalidate
 693  * @param len           length to invalidate
 694  *
 695  * Invalidate BufferRAM information
 696  */
 697 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
 698                 unsigned int len)
 699 {
 700         struct onenand_chip *this = mtd->priv;
 701         int i;
 702         loff_t end_addr = addr + len;
 703
 704         /* Invalidate BufferRAM */
 705         for (i = 0; i < MAX_BUFFERRAM; i++) {
 706                 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
 707                 if (buf_addr >= addr && buf_addr < end_addr)
 708                         this->bufferram[i].blockpage = -1;
 709         }
 710 }
 711
 712 /**
 713  * onenand_get_device - [GENERIC] Get chip for selected access
 714  * @param mtd           MTD device structure
 715  * @param new_state     the state which is requested
 716  *
 717  * Get the device and lock it for exclusive access
 718  */
 719 static int onenand_get_device(struct mtd_info *mtd, int new_state)
 720 {
 721         struct onenand_chip *this = mtd->priv;
 722         DECLARE_WAITQUEUE(wait, current);
 723
 724         /*
 725          * Grab the lock and see if the device is available
 726          */
 727         while (1) {
 728                 spin_lock(&this->chip_lock);
 729                 if (this->state == FL_READY) {
 730                         this->state = new_state;
 731                         spin_unlock(&this->chip_lock);
 732                         break;
 733                 }
 734                 if (new_state == FL_PM_SUSPENDED) {
 735                         spin_unlock(&this->chip_lock);
 736                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
 737                 }
 738                 set_current_state(TASK_UNINTERRUPTIBLE);
 739                 add_wait_queue(&this->wq, &wait);
 740                 spin_unlock(&this->chip_lock);
 741                 schedule();
 742                 remove_wait_queue(&this->wq, &wait);
 743         }
 744
 745         return 0;
 746 }
 747
 748 /**
 749  * onenand_release_device - [GENERIC] release chip
 750  * @param mtd           MTD device structure
 751  *
 752  * Deselect, release chip lock and wake up anyone waiting on the device
 753  */
 754 static void onenand_release_device(struct mtd_info *mtd)
 755 {
 756         struct onenand_chip *this = mtd->priv;
 757
 758         /* Release the chip */
 759         spin_lock(&this->chip_lock);
 760         this->state = FL_READY;
 761         wake_up(&this->wq);
 762         spin_unlock(&this->chip_lock);
 763 }
 764
 765 /**
 766  * onenand_read - [MTD Interface] Read data from flash
 767  * @param mtd           MTD device structure
 768  * @param from          offset to read from
 769  * @param len           number of bytes to read
 770  * @param retlen        pointer to variable to store the number of read bytes
 771  * @param buf           the databuffer to put data
 772  *
 773  * Read with ecc
 774 */
 775 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
 776         size_t *retlen, u_char *buf)
 777 {
 778         struct onenand_chip *this = mtd->priv;
 779         struct mtd_ecc_stats stats;
 780         int read = 0, column;
 781         int thislen;
 782         int ret = 0, boundary = 0;
 783         int writesize = this->writesize;
 784
 785         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 786
 787         /* Do not allow reads past end of device */
 788         if ((from + len) > mtd->size) {
 789                 printk(KERN_ERR "onenand_read: Attempt read beyond end of device\n");
 790                 *retlen = 0;
 791                 return -EINVAL;
 792         }
 793
 794         /* Grab the lock and see if the device is available */
 795         onenand_get_device(mtd, FL_READING);
 796
 797         stats = mtd->ecc_stats;
 798
 799         /* Read-while-load method */
 800
 801         /* Do first load to bufferRAM */
 802         if (read < len) {
 803                 if (!onenand_check_bufferram(mtd, from)) {
 804                         this->command(mtd, ONENAND_CMD_READ, from, writesize);
 805                         ret = this->wait(mtd, FL_READING);
 806                         onenand_update_bufferram(mtd, from, !ret);
 807                 }
 808         }
 809
 810         thislen = min_t(int, writesize, len - read);
 811         column = from & (writesize - 1);
 812         if (column + thislen > writesize)
 813                 thislen = writesize - column;
 814
 815         while (!ret) {
 816                 /* If there is more to load then start next load */
 817                 from += thislen;
 818                 if (read + thislen < len) {
 819                         this->command(mtd, ONENAND_CMD_READ, from, writesize);
 820                         /*
 821                          * Chip boundary handling in DDP
 822                          * Now we issued chip 1 read and pointed chip 1
 823                          * bufferam so we have to point chip 0 bufferam.
 824                          */
 825                         if (ONENAND_IS_DDP(this) &&
 826                             unlikely(from == (this->chipsize >> 1))) {
 827                                 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
 828                                 boundary = 1;
 829                         } else
 830                                 boundary = 0;
 831                         ONENAND_SET_PREV_BUFFERRAM(this);
 832                 }
 833                 /* While load is going, read from last bufferRAM */
 834                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
 835                 /* See if we are done */
 836                 read += thislen;
 837                 if (read == len)
 838                         break;
 839                 /* Set up for next read from bufferRAM */
 840                 if (unlikely(boundary))
 841                         this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
 842                 ONENAND_SET_NEXT_BUFFERRAM(this);
 843                 buf += thislen;
 844                 thislen = min_t(int, writesize, len - read);
 845                 column = 0;
 846                 cond_resched();
 847                 /* Now wait for load */
 848                 ret = this->wait(mtd, FL_READING);
 849                 onenand_update_bufferram(mtd, from, !ret);
 850         }
 851
 852         /* Deselect and wake up anyone waiting on the device */
 853         onenand_release_device(mtd);
 854
 855         /*
 856          * Return success, if no ECC failures, else -EBADMSG
 857          * fs driver will take care of that, because
 858          * retlen == desired len and result == -EBADMSG
 859          */
 860         *retlen = read;
 861
 862         if (mtd->ecc_stats.failed - stats.failed)
 863                 return -EBADMSG;
 864
 865         if (ret)
 866                 return ret;
 867
 868         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
 869 }
 870
 871 /**
 872  * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
 873  * @param mtd           MTD device structure
 874  * @param buf           destination address
 875  * @param column        oob offset to read from
 876  * @param thislen       oob length to read
 877  */
 878 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
 879                                 int thislen)
 880 {
 881         struct onenand_chip *this = mtd->priv;
 882         struct nand_oobfree *free;
 883         int readcol = column;
 884         int readend = column + thislen;
 885         int lastgap = 0;
 886         unsigned int i;
 887         uint8_t *oob_buf = this->oob_buf;
 888
 889         free = this->ecclayout->oobfree;
 890         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
 891                 if (readcol >= lastgap)
 892                         readcol += free->offset - lastgap;
 893                 if (readend >= lastgap)
 894                         readend += free->offset - lastgap;
 895                 lastgap = free->offset + free->length;
 896         }
 897         this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
 898         free = this->ecclayout->oobfree;
 899         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
 900                 int free_end = free->offset + free->length;
 901                 if (free->offset < readend && free_end > readcol) {
 902                         int st = max_t(int,free->offset,readcol);
 903                         int ed = min_t(int,free_end,readend);
 904                         int n = ed - st;
 905                         memcpy(buf, oob_buf + st, n);
 906                         buf += n;
 907                 } else if (column == 0)
 908                         break;
 909         }
 910         return 0;
 911 }
 912
 913 /**
 914  * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
 915  * @param mtd           MTD device structure
 916  * @param from          offset to read from
 917  * @param len           number of bytes to read
 918  * @param retlen        pointer to variable to store the number of read bytes
 919  * @param buf           the databuffer to put data
 920  * @param mode          operation mode
 921  *
 922  * OneNAND read out-of-band data from the spare area
 923  */
 924 static int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
 925                         size_t *retlen, u_char *buf, mtd_oob_mode_t mode)
 926 {
 927         struct onenand_chip *this = mtd->priv;
 928         int read = 0, thislen, column, oobsize;
 929         int ret = 0;
 930
 931         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 932
 933         /* Initialize return length value */
 934         *retlen = 0;
 935
 936         if (mode == MTD_OOB_AUTO)
 937                 oobsize = this->ecclayout->oobavail;
 938         else
 939                 oobsize = mtd->oobsize;
 940
 941         column = from & (mtd->oobsize - 1);
 942
 943         if (unlikely(column >= oobsize)) {
 944                 printk(KERN_ERR "onenand_read_oob: Attempted to start read outside oob\n");
 945                 return -EINVAL;
 946         }
 947
 948         /* Do not allow reads past end of device */
 949         if (unlikely(from >= mtd->size ||
 950                      column + len > ((mtd->size >> this->page_shift) -
 951                                      (from >> this->page_shift)) * oobsize)) {
 952                 printk(KERN_ERR "onenand_read_oob: Attempted to read beyond end of device\n");
 953                 return -EINVAL;
 954         }
 955
 956         /* Grab the lock and see if the device is available */
 957         onenand_get_device(mtd, FL_READING);
 958
 959         while (read < len) {
 960                 cond_resched();
 961
 962                 thislen = oobsize - column;
 963                 thislen = min_t(int, thislen, len);
 964
 965                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
 966
 967                 onenand_update_bufferram(mtd, from, 0);
 968
 969                 ret = this->wait(mtd, FL_READING);
 970                 /* First copy data and check return value for ECC handling */
 971
 972                 if (mode == MTD_OOB_AUTO)
 973                         onenand_transfer_auto_oob(mtd, buf, column, thislen);
 974                 else
 975                         this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
 976
 977                 if (ret) {
 978                         printk(KERN_ERR "onenand_read_oob: read failed = 0x%x\n", ret);
 979                         break;
 980                 }
 981
 982                 read += thislen;
 983
 984                 if (read == len)
 985                         break;
 986
 987                 buf += thislen;
 988
 989                 /* Read more? */
 990                 if (read < len) {
 991                         /* Page size */
 992                         from += mtd->writesize;
 993                         column = 0;
 994                 }
 995         }
 996
 997         /* Deselect and wake up anyone waiting on the device */
 998         onenand_release_device(mtd);
 999
1000         *retlen = read;
1001         return ret;
1002 }
1003
1004 /**
1005  * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
1006  * @param mtd:          MTD device structure
1007  * @param from:         offset to read from
1008  * @param ops:          oob operation description structure
1009  */
1010 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1011                             struct mtd_oob_ops *ops)
1012 {
1013         switch (ops->mode) {
1014         case MTD_OOB_PLACE:
1015         case MTD_OOB_AUTO:
1016                 break;
1017         case MTD_OOB_RAW:
1018                 /* Not implemented yet */
1019         default:
1020                 return -EINVAL;
1021         }
1022         return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
1023                                    &ops->oobretlen, ops->oobbuf, ops->mode);
1024 }
1025
1026 /**
1027  * onenand_bbt_wait - [DEFAULT] wait until the command is done
1028  * @param mtd           MTD device structure
1029  * @param state         state to select the max. timeout value
1030  *
1031  * Wait for command done.
1032  */
1033 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1034 {
1035         struct onenand_chip *this = mtd->priv;
1036         unsigned long timeout;
1037         unsigned int interrupt;
1038         unsigned int ctrl;
1039
1040         /* The 20 msec is enough */
1041         timeout = jiffies + msecs_to_jiffies(20);
1042         while (time_before(jiffies, timeout)) {
1043                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1044                 if (interrupt & ONENAND_INT_MASTER)
1045                         break;
1046         }
1047         /* To get correct interrupt status in timeout case */
1048         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1049         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1050
1051         if (ctrl & ONENAND_CTRL_ERROR) {
1052                 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
1053                 /* Initial bad block case */
1054                 if (ctrl & ONENAND_CTRL_LOAD)
1055                         return ONENAND_BBT_READ_ERROR;
1056                 return ONENAND_BBT_READ_FATAL_ERROR;
1057         }
1058
1059         if (interrupt & ONENAND_INT_READ) {
1060                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1061                 if (ecc & ONENAND_ECC_2BIT_ALL)
1062                         return ONENAND_BBT_READ_ERROR;
1063         } else {
1064                 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1065                         "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1066                 return ONENAND_BBT_READ_FATAL_ERROR;
1067         }
1068
1069         return 0;
1070 }
1071
1072 /**
1073  * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1074  * @param mtd           MTD device structure
1075  * @param from          offset to read from
1076  * @param ops           oob operation description structure
1077  *
1078  * OneNAND read out-of-band data from the spare area for bbt scan
1079  */
1080 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1081                             struct mtd_oob_ops *ops)
1082 {
1083         struct onenand_chip *this = mtd->priv;
1084         int read = 0, thislen, column;
1085         int ret = 0;
1086         size_t len = ops->ooblen;
1087         u_char *buf = ops->oobbuf;
1088
1089         DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1090
1091         /* Initialize return value */
1092         ops->oobretlen = 0;
1093
1094         /* Do not allow reads past end of device */
1095         if (unlikely((from + len) > mtd->size)) {
1096                 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1097                 return ONENAND_BBT_READ_FATAL_ERROR;
1098         }
1099
1100         /* Grab the lock and see if the device is available */
1101         onenand_get_device(mtd, FL_READING);
1102
1103         column = from & (mtd->oobsize - 1);
1104
1105         while (read < len) {
1106                 cond_resched();
1107
1108                 thislen = mtd->oobsize - column;
1109                 thislen = min_t(int, thislen, len);
1110
1111                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1112
1113                 onenand_update_bufferram(mtd, from, 0);
1114
1115                 ret = onenand_bbt_wait(mtd, FL_READING);
1116                 if (ret)
1117                         break;
1118
1119                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1120                 read += thislen;
1121                 if (read == len)
1122                         break;
1123
1124                 buf += thislen;
1125
1126                 /* Read more? */
1127                 if (read < len) {
1128                         /* Update Page size */
1129                         from += this->writesize;
1130                         column = 0;
1131                 }
1132         }
1133
1134         /* Deselect and wake up anyone waiting on the device */
1135         onenand_release_device(mtd);
1136
1137         ops->oobretlen = read;
1138         return ret;
1139 }
1140
1141 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1142 /**
1143  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1144  * @param mtd           MTD device structure
1145  * @param buf           the databuffer to verify
1146  * @param to            offset to read from
1147  *
1148  */
1149 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1150 {
1151         struct onenand_chip *this = mtd->priv;
1152         char oobbuf[64];
1153         int status, i;
1154
1155         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1156         onenand_update_bufferram(mtd, to, 0);
1157         status = this->wait(mtd, FL_READING);
1158         if (status)
1159                 return status;
1160
1161         this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1162         for (i = 0; i < mtd->oobsize; i++)
1163                 if (buf[i] != 0xFF && buf[i] != oobbuf[i])
1164                         return -EBADMSG;
1165
1166         return 0;
1167 }
1168
1169 /**
1170  * onenand_verify - [GENERIC] verify the chip contents after a write
1171  * @param mtd          MTD device structure
1172  * @param buf          the databuffer to verify
1173  * @param addr         offset to read from
1174  * @param len          number of bytes to read and compare
1175  *
1176  */
1177 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1178 {
1179         struct onenand_chip *this = mtd->priv;
1180         void __iomem *dataram;
1181         int ret = 0;
1182         int thislen, column;
1183
1184         while (len != 0) {
1185                 thislen = min_t(int, this->writesize, len);
1186                 column = addr & (this->writesize - 1);
1187                 if (column + thislen > this->writesize)
1188                         thislen = this->writesize - column;
1189
1190                 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1191
1192                 onenand_update_bufferram(mtd, addr, 0);
1193
1194                 ret = this->wait(mtd, FL_READING);
1195                 if (ret)
1196                         return ret;
1197
1198                 onenand_update_bufferram(mtd, addr, 1);
1199
1200                 dataram = this->base + ONENAND_DATARAM;
1201                 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1202
1203                 if (memcmp(buf, dataram + column, thislen))
1204                         return -EBADMSG;
1205
1206                 len -= thislen;
1207                 buf += thislen;
1208                 addr += thislen;
1209         }
1210
1211         return 0;
1212 }
1213 #else
1214 #define onenand_verify(...)             (0)
1215 #define onenand_verify_oob(...)         (0)
1216 #endif
1217
1218 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
1219
1220 /**
1221  * onenand_write - [MTD Interface] write buffer to FLASH
1222  * @param mtd           MTD device structure
1223  * @param to            offset to write to
1224  * @param len           number of bytes to write
1225  * @param retlen        pointer to variable to store the number of written bytes
1226  * @param buf           the data to write
1227  *
1228  * Write with ECC
1229  */
1230 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1231         size_t *retlen, const u_char *buf)
1232 {
1233         struct onenand_chip *this = mtd->priv;
1234         int written = 0;
1235         int ret = 0;
1236         int column, subpage;
1237
1238         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1239
1240         /* Initialize retlen, in case of early exit */
1241         *retlen = 0;
1242
1243         /* Do not allow writes past end of device */
1244         if (unlikely((to + len) > mtd->size)) {
1245                 printk(KERN_ERR "onenand_write: Attempt write to past end of device\n");
1246                 return -EINVAL;
1247         }
1248
1249         /* Reject writes, which are not page aligned */
1250         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1251                 printk(KERN_ERR "onenand_write: Attempt to write not page aligned data\n");
1252                 return -EINVAL;
1253         }
1254
1255         column = to & (mtd->writesize - 1);
1256
1257         /* Grab the lock and see if the device is available */
1258         onenand_get_device(mtd, FL_WRITING);
1259
1260         /* Loop until all data write */
1261         while (written < len) {
1262                 int thislen = min_t(int, mtd->writesize - column, len - written);
1263                 u_char *wbuf = (u_char *) buf;
1264
1265                 cond_resched();
1266
1267                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1268
1269                 /* Partial page write */
1270                 subpage = thislen < mtd->writesize;
1271                 if (subpage) {
1272                         memset(this->page_buf, 0xff, mtd->writesize);
1273                         memcpy(this->page_buf + column, buf, thislen);
1274                         wbuf = this->page_buf;
1275                 }
1276
1277                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1278                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1279
1280                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1281
1282                 ret = this->wait(mtd, FL_WRITING);
1283
1284                 /* In partial page write we don't update bufferram */
1285                 onenand_update_bufferram(mtd, to, !ret && !subpage);
1286                 if (ONENAND_IS_2PLANE(this)) {
1287                         ONENAND_SET_BUFFERRAM1(this);
1288                         onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1289                 }
1290
1291                 if (ret) {
1292                         printk(KERN_ERR "onenand_write: write filaed %d\n", ret);
1293                         break;
1294                 }
1295
1296                 /* Only check verify write turn on */
1297                 ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen);
1298                 if (ret) {
1299                         printk(KERN_ERR "onenand_write: verify failed %d\n", ret);
1300                         break;
1301                 }
1302
1303                 written += thislen;
1304
1305                 if (written == len)
1306                         break;
1307
1308                 column = 0;
1309                 to += thislen;
1310                 buf += thislen;
1311         }
1312
1313         /* Deselect and wake up anyone waiting on the device */
1314         onenand_release_device(mtd);
1315
1316         *retlen = written;
1317
1318         return ret;
1319 }
1320
1321 /**
1322  * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1323  * @param mtd           MTD device structure
1324  * @param oob_buf       oob buffer
1325  * @param buf           source address
1326  * @param column        oob offset to write to
1327  * @param thislen       oob length to write
1328  */
1329 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1330                                   const u_char *buf, int column, int thislen)
1331 {
1332         struct onenand_chip *this = mtd->priv;
1333         struct nand_oobfree *free;
1334         int writecol = column;
1335         int writeend = column + thislen;
1336         int lastgap = 0;
1337         unsigned int i;
1338
1339         free = this->ecclayout->oobfree;
1340         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1341                 if (writecol >= lastgap)
1342                         writecol += free->offset - lastgap;
1343                 if (writeend >= lastgap)
1344                         writeend += free->offset - lastgap;
1345                 lastgap = free->offset + free->length;
1346         }
1347         free = this->ecclayout->oobfree;
1348         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1349                 int free_end = free->offset + free->length;
1350                 if (free->offset < writeend && free_end > writecol) {
1351                         int st = max_t(int,free->offset,writecol);
1352                         int ed = min_t(int,free_end,writeend);
1353                         int n = ed - st;
1354                         memcpy(oob_buf + st, buf, n);
1355                         buf += n;
1356                 } else if (column == 0)
1357                         break;
1358         }
1359         return 0;
1360 }
1361
1362 /**
1363  * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1364  * @param mtd           MTD device structure
1365  * @param to            offset to write to
1366  * @param len           number of bytes to write
1367  * @param retlen        pointer to variable to store the number of written bytes
1368  * @param buf           the data to write
1369  * @param mode          operation mode
1370  *
1371  * OneNAND write out-of-band
1372  */
1373 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1374                                 size_t *retlen, const u_char *buf, mtd_oob_mode_t mode)
1375 {
1376         struct onenand_chip *this = mtd->priv;
1377         int column, ret = 0, oobsize;
1378         int written = 0;
1379         u_char *oobbuf;
1380
1381         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1382
1383         /* Initialize retlen, in case of early exit */
1384         *retlen = 0;
1385
1386         if (mode == MTD_OOB_AUTO)
1387                 oobsize = this->ecclayout->oobavail;
1388         else
1389                 oobsize = mtd->oobsize;
1390
1391         column = to & (mtd->oobsize - 1);
1392
1393         if (unlikely(column >= oobsize)) {
1394                 printk(KERN_ERR "onenand_write_oob: Attempted to start write outside oob\n");
1395                 return -EINVAL;
1396         }
1397
1398         /* For compatibility with NAND: Do not allow write past end of page */
1399         if (unlikely(column + len > oobsize)) {
1400                 printk(KERN_ERR "onenand_write_oob: "
1401                       "Attempt to write past end of page\n");
1402                 return -EINVAL;
1403         }
1404
1405         /* Do not allow reads past end of device */
1406         if (unlikely(to >= mtd->size ||
1407                      column + len > ((mtd->size >> this->page_shift) -
1408                                      (to >> this->page_shift)) * oobsize)) {
1409                 printk(KERN_ERR "onenand_write_oob: Attempted to write past end of device\n");
1410                 return -EINVAL;
1411         }
1412
1413         /* Grab the lock and see if the device is available */
1414         onenand_get_device(mtd, FL_WRITING);
1415
1416         oobbuf = this->oob_buf;
1417
1418         /* Loop until all data write */
1419         while (written < len) {
1420                 int thislen = min_t(int, oobsize, len - written);
1421
1422                 cond_resched();
1423
1424                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1425
1426                 /* We send data to spare ram with oobsize
1427                  * to prevent byte access */
1428                 memset(oobbuf, 0xff, mtd->oobsize);
1429                 if (mode == MTD_OOB_AUTO)
1430                         onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1431                 else
1432                         memcpy(oobbuf + column, buf, thislen);
1433                 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1434
1435                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1436
1437                 onenand_update_bufferram(mtd, to, 0);
1438                 if (ONENAND_IS_2PLANE(this)) {
1439                         ONENAND_SET_BUFFERRAM1(this);
1440                         onenand_update_bufferram(mtd, to + this->writesize, 0);
1441                 }
1442
1443                 ret = this->wait(mtd, FL_WRITING);
1444                 if (ret) {
1445                         printk(KERN_ERR "onenand_write_oob: write failed %d\n", ret);
1446                         break;
1447                 }
1448
1449                 ret = onenand_verify_oob(mtd, oobbuf, to);
1450                 if (ret) {
1451                         printk(KERN_ERR "onenand_write_oob: verify failed %d\n", ret);
1452                         break;
1453                 }
1454
1455                 written += thislen;
1456                 if (written == len)
1457                         break;
1458
1459                 to += mtd->writesize;
1460                 buf += thislen;
1461                 column = 0;
1462         }
1463
1464         /* Deselect and wake up anyone waiting on the device */
1465         onenand_release_device(mtd);
1466
1467         *retlen = written;
1468
1469         return ret;
1470 }
1471
1472 /**
1473  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1474  * @param mtd:          MTD device structure
1475  * @param to:           offset to write
1476  * @param ops:          oob operation description structure
1477  */
1478 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1479                              struct mtd_oob_ops *ops)
1480 {
1481         switch (ops->mode) {
1482         case MTD_OOB_PLACE:
1483         case MTD_OOB_AUTO:
1484                 break;
1485         case MTD_OOB_RAW:
1486                 /* Not implemented yet */
1487         default:
1488                 return -EINVAL;
1489         }
1490         return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1491                                     &ops->oobretlen, ops->oobbuf, ops->mode);
1492 }
1493
1494 /**
1495  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1496  * @param mtd           MTD device structure
1497  * @param ofs           offset from device start
1498  * @param getchip       0, if the chip is already selected
1499  * @param allowbbt      1, if its allowed to access the bbt area
1500  *
1501  * Check, if the block is bad. Either by reading the bad block table or
1502  * calling of the scan function.
1503  */
1504 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1505 {
1506         struct onenand_chip *this = mtd->priv;
1507         struct bbm_info *bbm = this->bbm;
1508
1509         /* Return info from the table */
1510         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1511 }
1512
1513 /**
1514  * onenand_erase - [MTD Interface] erase block(s)
1515  * @param mtd           MTD device structure
1516  * @param instr         erase instruction
1517  *
1518  * Erase one ore more blocks
1519  */
1520 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1521 {
1522         struct onenand_chip *this = mtd->priv;
1523         unsigned int block_size;
1524         loff_t addr;
1525         int len;
1526         int ret = 0;
1527
1528         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1529
1530         block_size = (1 << this->erase_shift);
1531
1532         /* Start address must align on block boundary */
1533         if (unlikely(instr->addr & (block_size - 1))) {
1534                 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1535                 return -EINVAL;
1536         }
1537
1538         /* Length must align on block boundary */
1539         if (unlikely(instr->len & (block_size - 1))) {
1540                 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1541                 return -EINVAL;
1542         }
1543
1544         /* Do not allow erase past end of device */
1545         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1546                 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1547                 return -EINVAL;
1548         }
1549
1550         instr->fail_addr = 0xffffffff;
1551
1552         /* Grab the lock and see if the device is available */
1553         onenand_get_device(mtd, FL_ERASING);
1554
1555         /* Loop throught the pages */
1556         len = instr->len;
1557         addr = instr->addr;
1558
1559         instr->state = MTD_ERASING;
1560
1561         while (len) {
1562                 cond_resched();
1563
1564                 /* Check if we have a bad block, we do not erase bad blocks */
1565                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1566                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1567                         instr->state = MTD_ERASE_FAILED;
1568                         goto erase_exit;
1569                 }
1570
1571                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1572
1573                 onenand_invalidate_bufferram(mtd, addr, block_size);
1574
1575                 ret = this->wait(mtd, FL_ERASING);
1576                 /* Check, if it is write protected */
1577                 if (ret) {
1578                         printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1579                         instr->state = MTD_ERASE_FAILED;
1580                         instr->fail_addr = addr;
1581                         goto erase_exit;
1582                 }
1583
1584                 len -= block_size;
1585                 addr += block_size;
1586         }
1587
1588         instr->state = MTD_ERASE_DONE;
1589
1590 erase_exit:
1591
1592         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1593         /* Do call back function */
1594         if (!ret)
1595                 mtd_erase_callback(instr);
1596
1597         /* Deselect and wake up anyone waiting on the device */
1598         onenand_release_device(mtd);
1599
1600         return ret;
1601 }
1602
1603 /**
1604  * onenand_sync - [MTD Interface] sync
1605  * @param mtd           MTD device structure
1606  *
1607  * Sync is actually a wait for chip ready function
1608  */
1609 static void onenand_sync(struct mtd_info *mtd)
1610 {
1611         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1612
1613         /* Grab the lock and see if the device is available */
1614         onenand_get_device(mtd, FL_SYNCING);
1615
1616         /* Release it and go back */
1617         onenand_release_device(mtd);
1618 }
1619
1620 /**
1621  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1622  * @param mtd           MTD device structure
1623  * @param ofs           offset relative to mtd start
1624  *
1625  * Check whether the block is bad
1626  */
1627 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1628 {
1629         /* Check for invalid offset */
1630         if (ofs > mtd->size)
1631                 return -EINVAL;
1632
1633         return onenand_block_checkbad(mtd, ofs, 1, 0);
1634 }
1635
1636 /**
1637  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1638  * @param mtd           MTD device structure
1639  * @param ofs           offset from device start
1640  *
1641  * This is the default implementation, which can be overridden by
1642  * a hardware specific driver.
1643  */
1644 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1645 {
1646         struct onenand_chip *this = mtd->priv;
1647         struct bbm_info *bbm = this->bbm;
1648         u_char buf[2] = {0, 0};
1649         size_t retlen;
1650         int block;
1651
1652         /* Get block number */
1653         block = ((int) ofs) >> bbm->bbt_erase_shift;
1654         if (bbm->bbt)
1655                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1656
1657         /* We write two bytes, so we dont have to mess with 16 bit access */
1658         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1659         return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf, MTD_OOB_PLACE);
1660 }
1661
1662 /**
1663  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1664  * @param mtd           MTD device structure
1665  * @param ofs           offset relative to mtd start
1666  *
1667  * Mark the block as bad
1668  */
1669 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1670 {
1671         struct onenand_chip *this = mtd->priv;
1672         int ret;
1673
1674         ret = onenand_block_isbad(mtd, ofs);
1675         if (ret) {
1676                 /* If it was bad already, return success and do nothing */
1677                 if (ret > 0)
1678                         return 0;
1679                 return ret;
1680         }
1681
1682         return this->block_markbad(mtd, ofs);
1683 }
1684
1685 /**
1686  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1687  * @param mtd           MTD device structure
1688  * @param ofs           offset relative to mtd start
1689  * @param len           number of bytes to lock or unlock
1690  * @param cmd           lock or unlock command
1691  *
1692  * Lock or unlock one or more blocks
1693  */
1694 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1695 {
1696         struct onenand_chip *this = mtd->priv;
1697         int start, end, block, value, status;
1698         int wp_status_mask;
1699
1700         start = ofs >> this->erase_shift;
1701         end = len >> this->erase_shift;
1702
1703         if (cmd == ONENAND_CMD_LOCK)
1704                 wp_status_mask = ONENAND_WP_LS;
1705         else
1706                 wp_status_mask = ONENAND_WP_US;
1707
1708         /* Continuous lock scheme */
1709         if (this->options & ONENAND_HAS_CONT_LOCK) {
1710                 /* Set start block address */
1711                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1712                 /* Set end block address */
1713                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1714                 /* Write lock command */
1715                 this->command(mtd, cmd, 0, 0);
1716
1717                 /* There's no return value */
1718                 this->wait(mtd, FL_LOCKING);
1719
1720                 /* Sanity check */
1721                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1722                     & ONENAND_CTRL_ONGO)
1723                         continue;
1724
1725                 /* Check lock status */
1726                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1727                 if (!(status & wp_status_mask))
1728                         printk(KERN_ERR "wp status = 0x%x\n", status);
1729
1730                 return 0;
1731         }
1732
1733         /* Block lock scheme */
1734         for (block = start; block < start + end; block++) {
1735                 /* Set block address */
1736                 value = onenand_block_address(this, block);
1737                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1738                 /* Select DataRAM for DDP */
1739                 value = onenand_bufferram_address(this, block);
1740                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1741                 /* Set start block address */
1742                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1743                 /* Write lock command */
1744                 this->command(mtd, cmd, 0, 0);
1745
1746                 /* There's no return value */
1747                 this->wait(mtd, FL_LOCKING);
1748
1749                 /* Sanity check */
1750                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1751                     & ONENAND_CTRL_ONGO)
1752                         continue;
1753
1754                 /* Check lock status */
1755                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1756                 if (!(status & wp_status_mask))
1757                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1758         }
1759
1760         return 0;
1761 }
1762
1763 /**
1764  * onenand_lock - [MTD Interface] Lock block(s)
1765  * @param mtd           MTD device structure
1766  * @param ofs           offset relative to mtd start
1767  * @param len           number of bytes to unlock
1768  *
1769  * Lock one or more blocks
1770  */
1771 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1772 {
1773         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1774 }
1775
1776 /**
1777  * onenand_unlock - [MTD Interface] Unlock block(s)
1778  * @param mtd           MTD device structure
1779  * @param ofs           offset relative to mtd start
1780  * @param len           number of bytes to unlock
1781  *
1782  * Unlock one or more blocks
1783  */
1784 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1785 {
1786         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1787 }
1788
1789 /**
1790  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1791  * @param this          onenand chip data structure
1792  *
1793  * Check lock status
1794  */
1795 static void onenand_check_lock_status(struct onenand_chip *this)
1796 {
1797         unsigned int value, block, status;
1798         unsigned int end;
1799
1800         end = this->chipsize >> this->erase_shift;
1801         for (block = 0; block < end; block++) {
1802                 /* Set block address */
1803                 value = onenand_block_address(this, block);
1804                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1805                 /* Select DataRAM for DDP */
1806                 value = onenand_bufferram_address(this, block);
1807                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1808                 /* Set start block address */
1809                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1810
1811                 /* Check lock status */
1812                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1813                 if (!(status & ONENAND_WP_US))
1814                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1815         }
1816 }
1817
1818 /**
1819  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1820  * @param mtd           MTD device structure
1821  *
1822  * Unlock all blocks
1823  */
1824 static int onenand_unlock_all(struct mtd_info *mtd)
1825 {
1826         struct onenand_chip *this = mtd->priv;
1827
1828         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1829                 /* Set start block address */
1830                 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1831                 /* Write unlock command */
1832                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1833
1834                 /* There's no return value */
1835                 this->wait(mtd, FL_LOCKING);
1836
1837                 /* Sanity check */
1838                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1839                     & ONENAND_CTRL_ONGO)
1840                         continue;
1841
1842                 /* Workaround for all block unlock in DDP */
1843                 if (ONENAND_IS_DDP(this)) {
1844                         /* 1st block on another chip */
1845                         loff_t ofs = this->chipsize >> 1;
1846                         size_t len = mtd->erasesize;
1847
1848                         onenand_unlock(mtd, ofs, len);
1849                 }
1850
1851                 onenand_check_lock_status(this);
1852
1853                 return 0;
1854         }
1855
1856         onenand_unlock(mtd, 0x0, this->chipsize);
1857
1858         return 0;
1859 }
1860
1861 #ifdef CONFIG_MTD_ONENAND_OTP
1862
1863 /* Interal OTP operation */
1864 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1865                 size_t *retlen, u_char *buf);
1866
1867 /**
1868  * do_otp_read - [DEFAULT] Read OTP block area
1869  * @param mtd           MTD device structure
1870  * @param from          The offset to read
1871  * @param len           number of bytes to read
1872  * @param retlen        pointer to variable to store the number of readbytes
1873  * @param buf           the databuffer to put/get data
1874  *
1875  * Read OTP block area.
1876  */
1877 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1878                 size_t *retlen, u_char *buf)
1879 {
1880         struct onenand_chip *this = mtd->priv;
1881         int ret;
1882
1883         /* Enter OTP access mode */
1884         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1885         this->wait(mtd, FL_OTPING);
1886
1887         ret = mtd->read(mtd, from, len, retlen, buf);
1888
1889         /* Exit OTP access mode */
1890         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1891         this->wait(mtd, FL_RESETING);
1892
1893         return ret;
1894 }
1895
1896 /**
1897  * do_otp_write - [DEFAULT] Write OTP block area
1898  * @param mtd           MTD device structure
1899  * @param from          The offset to write
1900  * @param len           number of bytes to write
1901  * @param retlen        pointer to variable to store the number of write bytes
1902  * @param buf           the databuffer to put/get data
1903  *
1904  * Write OTP block area.
1905  */
1906 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1907                 size_t *retlen, u_char *buf)
1908 {
1909         struct onenand_chip *this = mtd->priv;
1910         unsigned char *pbuf = buf;
1911         int ret;
1912
1913         /* Force buffer page aligned */
1914         if (len < mtd->writesize) {
1915                 memcpy(this->page_buf, buf, len);
1916                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1917                 pbuf = this->page_buf;
1918                 len = mtd->writesize;
1919         }
1920
1921         /* Enter OTP access mode */
1922         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1923         this->wait(mtd, FL_OTPING);
1924
1925         ret = mtd->write(mtd, from, len, retlen, pbuf);
1926
1927         /* Exit OTP access mode */
1928         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1929         this->wait(mtd, FL_RESETING);
1930
1931         return ret;
1932 }
1933
1934 /**
1935  * do_otp_lock - [DEFAULT] Lock OTP block area
1936  * @param mtd           MTD device structure
1937  * @param from          The offset to lock
1938  * @param len           number of bytes to lock
1939  * @param retlen        pointer to variable to store the number of lock bytes
1940  * @param buf           the databuffer to put/get data
1941  *
1942  * Lock OTP block area.
1943  */
1944 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1945                 size_t *retlen, u_char *buf)
1946 {
1947         struct onenand_chip *this = mtd->priv;
1948         int ret;
1949
1950         /* Enter OTP access mode */
1951         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1952         this->wait(mtd, FL_OTPING);
1953
1954         ret = onenand_do_write_oob(mtd, from, len, retlen, buf, MTD_OOB_PLACE);
1955
1956         /* Exit OTP access mode */
1957         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1958         this->wait(mtd, FL_RESETING);
1959
1960         return ret;
1961 }
1962
1963 /**
1964  * onenand_otp_walk - [DEFAULT] Handle OTP operation
1965  * @param mtd           MTD device structure
1966  * @param from          The offset to read/write
1967  * @param len           number of bytes to read/write
1968  * @param retlen        pointer to variable to store the number of read bytes
1969  * @param buf           the databuffer to put/get data
1970  * @param action        do given action
1971  * @param mode          specify user and factory
1972  *
1973  * Handle OTP operation.
1974  */
1975 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1976                         size_t *retlen, u_char *buf,
1977                         otp_op_t action, int mode)
1978 {
1979         struct onenand_chip *this = mtd->priv;
1980         int otp_pages;
1981         int density;
1982         int ret = 0;
1983
1984         *retlen = 0;
1985
1986         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1987         if (density < ONENAND_DEVICE_DENSITY_512Mb)
1988                 otp_pages = 20;
1989         else
1990                 otp_pages = 10;
1991
1992         if (mode == MTD_OTP_FACTORY) {
1993                 from += mtd->writesize * otp_pages;
1994                 otp_pages = 64 - otp_pages;
1995         }
1996
1997         /* Check User/Factory boundary */
1998         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1999                 return 0;
2000
2001         while (len > 0 && otp_pages > 0) {
2002                 if (!action) {  /* OTP Info functions */
2003                         struct otp_info *otpinfo;
2004
2005                         len -= sizeof(struct otp_info);
2006                         if (len <= 0)
2007                                 return -ENOSPC;
2008
2009                         otpinfo = (struct otp_info *) buf;
2010                         otpinfo->start = from;
2011                         otpinfo->length = mtd->writesize;
2012                         otpinfo->locked = 0;
2013
2014                         from += mtd->writesize;
2015                         buf += sizeof(struct otp_info);
2016                         *retlen += sizeof(struct otp_info);
2017                 } else {
2018                         size_t tmp_retlen;
2019                         int size = len;
2020
2021                         ret = action(mtd, from, len, &tmp_retlen, buf);
2022
2023                         buf += size;
2024                         len -= size;
2025                         *retlen += size;
2026
2027                         if (ret < 0)
2028                                 return ret;
2029                 }
2030                 otp_pages--;
2031         }
2032
2033         return 0;
2034 }
2035
2036 /**
2037  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
2038  * @param mtd           MTD device structure
2039  * @param buf           the databuffer to put/get data
2040  * @param len           number of bytes to read
2041  *
2042  * Read factory OTP info.
2043  */
2044 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
2045                         struct otp_info *buf, size_t len)
2046 {
2047         size_t retlen;
2048         int ret;
2049
2050         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
2051
2052         return ret ? : retlen;
2053 }
2054
2055 /**
2056  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
2057  * @param mtd           MTD device structure
2058  * @param from          The offset to read
2059  * @param len           number of bytes to read
2060  * @param retlen        pointer to variable to store the number of read bytes
2061  * @param buf           the databuffer to put/get data
2062  *
2063  * Read factory OTP area.
2064  */
2065 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2066                         size_t len, size_t *retlen, u_char *buf)
2067 {
2068         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2069 }
2070
2071 /**
2072  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2073  * @param mtd           MTD device structure
2074  * @param buf           the databuffer to put/get data
2075  * @param len           number of bytes to read
2076  *
2077  * Read user OTP info.
2078  */
2079 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2080                         struct otp_info *buf, size_t len)
2081 {
2082         size_t retlen;
2083         int ret;
2084
2085         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2086
2087         return ret ? : retlen;
2088 }
2089
2090 /**
2091  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2092  * @param mtd           MTD device structure
2093  * @param from          The offset to read
2094  * @param len           number of bytes to read
2095  * @param retlen        pointer to variable to store the number of read bytes
2096  * @param buf           the databuffer to put/get data
2097  *
2098  * Read user OTP area.
2099  */
2100 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2101                         size_t len, size_t *retlen, u_char *buf)
2102 {
2103         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2104 }
2105
2106 /**
2107  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2108  * @param mtd           MTD device structure
2109  * @param from          The offset to write
2110  * @param len           number of bytes to write
2111  * @param retlen        pointer to variable to store the number of write bytes
2112  * @param buf           the databuffer to put/get data
2113  *
2114  * Write user OTP area.
2115  */
2116 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2117                         size_t len, size_t *retlen, u_char *buf)
2118 {
2119         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2120 }
2121
2122 /**
2123  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2124  * @param mtd           MTD device structure
2125  * @param from          The offset to lock
2126  * @param len           number of bytes to unlock
2127  *
2128  * Write lock mark on spare area in page 0 in OTP block
2129  */
2130 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2131                         size_t len)
2132 {
2133         unsigned char oob_buf[64];
2134         size_t retlen;
2135         int ret;
2136
2137         memset(oob_buf, 0xff, mtd->oobsize);
2138         /*
2139          * Note: OTP lock operation
2140          *       OTP block : 0xXXFC
2141          *       1st block : 0xXXF3 (If chip support)
2142          *       Both      : 0xXXF0 (If chip support)
2143          */
2144         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2145
2146         /*
2147          * Write lock mark to 8th word of sector0 of page0 of the spare0.
2148          * We write 16 bytes spare area instead of 2 bytes.
2149          */
2150         from = 0;
2151         len = 16;
2152
2153         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2154
2155         return ret ? : retlen;
2156 }
2157 #endif  /* CONFIG_MTD_ONENAND_OTP */
2158
2159 /**
2160  * onenand_check_features - Check and set OneNAND features
2161  * @param mtd           MTD data structure
2162  *
2163  * Check and set OneNAND features
2164  * - lock scheme
2165  * - two plane
2166  */
2167 static void onenand_check_features(struct mtd_info *mtd)
2168 {
2169         struct onenand_chip *this = mtd->priv;
2170         unsigned int density, process;
2171
2172         /* Lock scheme depends on density and process */
2173         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2174         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2175
2176         /* Lock scheme */
2177         switch (density) {
2178         case ONENAND_DEVICE_DENSITY_4Gb:
2179                 this->options |= ONENAND_HAS_2PLANE;
2180
2181         case ONENAND_DEVICE_DENSITY_2Gb:
2182                 /* 2Gb DDP don't have 2 plane */
2183                 if (!ONENAND_IS_DDP(this))
2184                         this->options |= ONENAND_HAS_2PLANE;
2185                 this->options |= ONENAND_HAS_UNLOCK_ALL;
2186
2187         case ONENAND_DEVICE_DENSITY_1Gb:
2188                 /* A-Die has all block unlock */
2189                 if (process)
2190                         this->options |= ONENAND_HAS_UNLOCK_ALL;
2191                 break;
2192
2193         default:
2194                 /* Some OneNAND has continuous lock scheme */
2195                 if (!process)
2196                         this->options |= ONENAND_HAS_CONT_LOCK;
2197                 break;
2198         }
2199
2200         if (this->options & ONENAND_HAS_CONT_LOCK)
2201                 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
2202         if (this->options & ONENAND_HAS_UNLOCK_ALL)
2203                 printk(KERN_DEBUG "Chip support all block unlock\n");
2204         if (this->options & ONENAND_HAS_2PLANE)
2205                 printk(KERN_DEBUG "Chip has 2 plane\n");
2206 }
2207
2208 /**
2209  * onenand_print_device_info - Print device & version ID
2210  * @param device        device ID
2211  * @param version       version ID
2212  *
2213  * Print device & version ID
2214  */
2215 static void onenand_print_device_info(int device, int version)
2216 {
2217         int vcc, demuxed, ddp, density;
2218
2219         vcc = device & ONENAND_DEVICE_VCC_MASK;
2220         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2221         ddp = device & ONENAND_DEVICE_IS_DDP;
2222         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
2223         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2224                 demuxed ? "" : "Muxed ",
2225                 ddp ? "(DDP)" : "",
2226                 (16 << density),
2227                 vcc ? "2.65/3.3" : "1.8",
2228                 device);
2229         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
2230 }
2231
2232 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2233         {ONENAND_MFR_SAMSUNG, "Samsung"},
2234 };
2235
2236 /**
2237  * onenand_check_maf - Check manufacturer ID
2238  * @param manuf         manufacturer ID
2239  *
2240  * Check manufacturer ID
2241  */
2242 static int onenand_check_maf(int manuf)
2243 {
2244         int size = ARRAY_SIZE(onenand_manuf_ids);
2245         char *name;
2246         int i;
2247
2248         for (i = 0; i < size; i++)
2249                 if (manuf == onenand_manuf_ids[i].id)
2250                         break;
2251
2252         if (i < size)
2253                 name = onenand_manuf_ids[i].name;
2254         else
2255                 name = "Unknown";
2256
2257         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2258
2259         return (i == size);
2260 }
2261
2262 /**
2263  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2264  * @param mtd           MTD device structure
2265  *
2266  * OneNAND detection method:
2267  *   Compare the values from command with ones from register
2268  */
2269 static int onenand_probe(struct mtd_info *mtd)
2270 {
2271         struct onenand_chip *this = mtd->priv;
2272         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2273         int density;
2274         int syscfg;
2275
2276         /* Save system configuration 1 */
2277         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2278         /* Clear Sync. Burst Read mode to read BootRAM */
2279         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2280
2281         /* Send the command for reading device ID from BootRAM */
2282         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2283
2284         /* Read manufacturer and device IDs from BootRAM */
2285         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2286         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2287
2288         /* Reset OneNAND to read default register values */
2289         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2290         /* Wait reset */
2291         this->wait(mtd, FL_RESETING);
2292
2293         /* Restore system configuration 1 */
2294         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2295
2296         /* Check manufacturer ID */
2297         if (onenand_check_maf(bram_maf_id))
2298                 return -ENXIO;
2299
2300         /* Read manufacturer and device IDs from Register */
2301         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2302         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2303         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2304
2305         /* Check OneNAND device */
2306         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2307                 return -ENXIO;
2308
2309         /* Flash device information */
2310         onenand_print_device_info(dev_id, ver_id);
2311         this->device_id = dev_id;
2312         this->version_id = ver_id;
2313
2314         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2315         this->chipsize = (16 << density) << 20;
2316         /* Set density mask. it is used for DDP */
2317         if (ONENAND_IS_DDP(this))
2318                 this->density_mask = (1 << (density + 6));
2319         else
2320                 this->density_mask = 0;
2321
2322         /* OneNAND page size & block size */
2323         /* The data buffer size is equal to page size */
2324         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2325         mtd->oobsize = mtd->writesize >> 5;
2326         /* Pages per a block are always 64 in OneNAND */
2327         mtd->erasesize = mtd->writesize << 6;
2328
2329         this->erase_shift = ffs(mtd->erasesize) - 1;
2330         this->page_shift = ffs(mtd->writesize) - 1;
2331         this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2332         /* It's real page size */
2333         this->writesize = mtd->writesize;
2334
2335         /* REVIST: Multichip handling */
2336
2337         mtd->size = this->chipsize;
2338
2339         /* Check OneNAND features */
2340         onenand_check_features(mtd);
2341
2342         /*
2343          * We emulate the 4KiB page and 256KiB erase block size
2344          * But oobsize is still 64 bytes.
2345          * It is only valid if you turn on 2X program support,
2346          * Otherwise it will be ignored by compiler.
2347          */
2348         if (ONENAND_IS_2PLANE(this)) {
2349                 mtd->writesize <<= 1;
2350                 mtd->erasesize <<= 1;
2351         }
2352
2353         return 0;
2354 }
2355
2356 /**
2357  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2358  * @param mtd           MTD device structure
2359  */
2360 static int onenand_suspend(struct mtd_info *mtd)
2361 {
2362         return onenand_get_device(mtd, FL_PM_SUSPENDED);
2363 }
2364
2365 /**
2366  * onenand_resume - [MTD Interface] Resume the OneNAND flash
2367  * @param mtd           MTD device structure
2368  */
2369 static void onenand_resume(struct mtd_info *mtd)
2370 {
2371         struct onenand_chip *this = mtd->priv;
2372
2373         if (this->state == FL_PM_SUSPENDED)
2374                 onenand_release_device(mtd);
2375         else
2376                 printk(KERN_ERR "resume() called for the chip which is not"
2377                                 "in suspended state\n");
2378 }
2379
2380 /**
2381  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2382  * @param mtd           MTD device structure
2383  * @param maxchips      Number of chips to scan for
2384  *
2385  * This fills out all the not initialized function pointers
2386  * with the defaults.
2387  * The flash ID is read and the mtd/chip structures are
2388  * filled with the appropriate values.
2389  */
2390 int onenand_scan(struct mtd_info *mtd, int maxchips)
2391 {
2392         int i;
2393         struct onenand_chip *this = mtd->priv;
2394
2395         if (!this->read_word)
2396                 this->read_word = onenand_readw;
2397         if (!this->write_word)
2398                 this->write_word = onenand_writew;
2399
2400         if (!this->command)
2401                 this->command = onenand_command;
2402         if (!this->wait)
2403                 onenand_setup_wait(mtd);
2404
2405         if (!this->read_bufferram)
2406                 this->read_bufferram = onenand_read_bufferram;
2407         if (!this->write_bufferram)
2408                 this->write_bufferram = onenand_write_bufferram;
2409
2410         if (!this->block_markbad)
2411                 this->block_markbad = onenand_default_block_markbad;
2412         if (!this->scan_bbt)
2413                 this->scan_bbt = onenand_default_bbt;
2414
2415         if (onenand_probe(mtd))
2416                 return -ENXIO;
2417
2418         /* Set Sync. Burst Read after probing */
2419         if (this->mmcontrol) {
2420                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2421                 this->read_bufferram = onenand_sync_read_bufferram;
2422         }
2423
2424         /* Allocate buffers, if necessary */
2425         if (!this->page_buf) {
2426                 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2427                 if (!this->page_buf) {
2428                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2429                         return -ENOMEM;
2430                 }
2431                 this->options |= ONENAND_PAGEBUF_ALLOC;
2432         }
2433         if (!this->oob_buf) {
2434                 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2435                 if (!this->oob_buf) {
2436                         printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
2437                         if (this->options & ONENAND_PAGEBUF_ALLOC) {
2438                                 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2439                                 kfree(this->page_buf);
2440                         }
2441                         return -ENOMEM;
2442                 }
2443                 this->options |= ONENAND_OOBBUF_ALLOC;
2444         }
2445
2446         this->state = FL_READY;
2447         init_waitqueue_head(&this->wq);
2448         spin_lock_init(&this->chip_lock);
2449
2450         /*
2451          * Allow subpage writes up to oobsize.
2452          */
2453         switch (mtd->oobsize) {
2454         case 64:
2455                 this->ecclayout = &onenand_oob_64;
2456                 mtd->subpage_sft = 2;
2457                 break;
2458
2459         case 32:
2460                 this->ecclayout = &onenand_oob_32;
2461                 mtd->subpage_sft = 1;
2462                 break;
2463
2464         default:
2465                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2466                         mtd->oobsize);
2467                 mtd->subpage_sft = 0;
2468                 /* To prevent kernel oops */
2469                 this->ecclayout = &onenand_oob_32;
2470                 break;
2471         }
2472
2473         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2474
2475         /*
2476          * The number of bytes available for a client to place data into
2477          * the out of band area
2478          */
2479         this->ecclayout->oobavail = 0;
2480         for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
2481             this->ecclayout->oobfree[i].length; i++)
2482                 this->ecclayout->oobavail +=
2483                         this->ecclayout->oobfree[i].length;
2484         mtd->oobavail = this->ecclayout->oobavail;
2485
2486         mtd->ecclayout = this->ecclayout;
2487
2488         /* Fill in remaining MTD driver data */
2489         mtd->type = MTD_NANDFLASH;
2490         mtd->flags = MTD_CAP_NANDFLASH;
2491         mtd->erase = onenand_erase;
2492         mtd->point = NULL;
2493         mtd->unpoint = NULL;
2494         mtd->read = onenand_read;
2495         mtd->write = onenand_write;
2496         mtd->read_oob = onenand_read_oob;
2497         mtd->write_oob = onenand_write_oob;
2498 #ifdef CONFIG_MTD_ONENAND_OTP
2499         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2500         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2501         mtd->get_user_prot_info = onenand_get_user_prot_info;
2502         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2503         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2504         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2505 #endif
2506         mtd->sync = onenand_sync;
2507         mtd->lock = onenand_lock;
2508         mtd->unlock = onenand_unlock;
2509         mtd->suspend = onenand_suspend;
2510         mtd->resume = onenand_resume;
2511         mtd->block_isbad = onenand_block_isbad;
2512         mtd->block_markbad = onenand_block_markbad;
2513         mtd->owner = THIS_MODULE;
2514
2515         /* Unlock whole block */
2516         onenand_unlock_all(mtd);
2517
2518         return this->scan_bbt(mtd);
2519 }
2520
2521 /**
2522  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2523  * @param mtd           MTD device structure
2524  */
2525 void onenand_release(struct mtd_info *mtd)
2526 {
2527         struct onenand_chip *this = mtd->priv;
2528
2529 #ifdef CONFIG_MTD_PARTITIONS
2530         /* Deregister partitions */
2531         del_mtd_partitions (mtd);
2532 #endif
2533         /* Deregister the device */
2534         del_mtd_device (mtd);
2535
2536         /* Free bad block table memory, if allocated */
2537         if (this->bbm) {
2538                 struct bbm_info *bbm = this->bbm;
2539                 kfree(bbm->bbt);
2540                 kfree(this->bbm);
2541         }
2542         /* Buffers allocated by onenand_scan */
2543         if (this->options & ONENAND_PAGEBUF_ALLOC)
2544                 kfree(this->page_buf);
2545         if (this->options & ONENAND_OOBBUF_ALLOC)
2546                 kfree(this->oob_buf);
2547 }
2548
2549 EXPORT_SYMBOL_GPL(onenand_scan);
2550 EXPORT_SYMBOL_GPL(onenand_release);
2551
2552 MODULE_LICENSE("GPL");
2553 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2554 MODULE_DESCRIPTION("Generic OneNAND flash driver code");