drivers/mtd/onenand/onenand_base.c

   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005-2006 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/sched.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/jiffies.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/onenand.h>
  20 #include <linux/mtd/partitions.h>
  21
  22 #include <asm/io.h>
  23
  24 /**
  25  * onenand_oob_64 - oob info for large (2KB) page
  26  */
  27 static struct nand_ecclayout onenand_oob_64 = {
  28         .eccbytes       = 20,
  29         .eccpos         = {
  30                 8, 9, 10, 11, 12,
  31                 24, 25, 26, 27, 28,
  32                 40, 41, 42, 43, 44,
  33                 56, 57, 58, 59, 60,
  34                 },
  35         .oobfree        = {
  36                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
  37                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
  38         }
  39 };
  40
  41 /**
  42  * onenand_oob_32 - oob info for middle (1KB) page
  43  */
  44 static struct nand_ecclayout onenand_oob_32 = {
  45         .eccbytes       = 10,
  46         .eccpos         = {
  47                 8, 9, 10, 11, 12,
  48                 24, 25, 26, 27, 28,
  49                 },
  50         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  51 };
  52
  53 static const unsigned char ffchars[] = {
  54         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  55         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  56         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  57         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  58         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  62 };
  63
  64 /**
  65  * onenand_readw - [OneNAND Interface] Read OneNAND register
  66  * @param addr          address to read
  67  *
  68  * Read OneNAND register
  69  */
  70 static unsigned short onenand_readw(void __iomem *addr)
  71 {
  72         return readw(addr);
  73 }
  74
  75 /**
  76  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  77  * @param value         value to write
  78  * @param addr          address to write
  79  *
  80  * Write OneNAND register with value
  81  */
  82 static void onenand_writew(unsigned short value, void __iomem *addr)
  83 {
  84         writew(value, addr);
  85 }
  86
  87 /**
  88  * onenand_block_address - [DEFAULT] Get block address
  89  * @param this          onenand chip data structure
  90  * @param block         the block
  91  * @return              translated block address if DDP, otherwise same
  92  *
  93  * Setup Start Address 1 Register (F100h)
  94  */
  95 static int onenand_block_address(struct onenand_chip *this, int block)
  96 {
  97         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
  98                 /* Device Flash Core select, NAND Flash Block Address */
  99                 int dfs = 0;
 100
 101                 if (block & this->density_mask)
 102                         dfs = 1;
 103
 104                 return (dfs << ONENAND_DDP_SHIFT) |
 105                         (block & (this->density_mask - 1));
 106         }
 107
 108         return block;
 109 }
 110
 111 /**
 112  * onenand_bufferram_address - [DEFAULT] Get bufferram address
 113  * @param this          onenand chip data structure
 114  * @param block         the block
 115  * @return              set DBS value if DDP, otherwise 0
 116  *
 117  * Setup Start Address 2 Register (F101h) for DDP
 118  */
 119 static int onenand_bufferram_address(struct onenand_chip *this, int block)
 120 {
 121         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
 122                 /* Device BufferRAM Select */
 123                 int dbs = 0;
 124
 125                 if (block & this->density_mask)
 126                         dbs = 1;
 127
 128                 return (dbs << ONENAND_DDP_SHIFT);
 129         }
 130
 131         return 0;
 132 }
 133
 134 /**
 135  * onenand_page_address - [DEFAULT] Get page address
 136  * @param page          the page address
 137  * @param sector        the sector address
 138  * @return              combined page and sector address
 139  *
 140  * Setup Start Address 8 Register (F107h)
 141  */
 142 static int onenand_page_address(int page, int sector)
 143 {
 144         /* Flash Page Address, Flash Sector Address */
 145         int fpa, fsa;
 146
 147         fpa = page & ONENAND_FPA_MASK;
 148         fsa = sector & ONENAND_FSA_MASK;
 149
 150         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 151 }
 152
 153 /**
 154  * onenand_buffer_address - [DEFAULT] Get buffer address
 155  * @param dataram1      DataRAM index
 156  * @param sectors       the sector address
 157  * @param count         the number of sectors
 158  * @return              the start buffer value
 159  *
 160  * Setup Start Buffer Register (F200h)
 161  */
 162 static int onenand_buffer_address(int dataram1, int sectors, int count)
 163 {
 164         int bsa, bsc;
 165
 166         /* BufferRAM Sector Address */
 167         bsa = sectors & ONENAND_BSA_MASK;
 168
 169         if (dataram1)
 170                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 171         else
 172                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 173
 174         /* BufferRAM Sector Count */
 175         bsc = count & ONENAND_BSC_MASK;
 176
 177         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 178 }
 179
 180 /**
 181  * onenand_command - [DEFAULT] Send command to OneNAND device
 182  * @param mtd           MTD device structure
 183  * @param cmd           the command to be sent
 184  * @param addr          offset to read from or write to
 185  * @param len           number of bytes to read or write
 186  *
 187  * Send command to OneNAND device. This function is used for middle/large page
 188  * devices (1KB/2KB Bytes per page)
 189  */
 190 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
 191 {
 192         struct onenand_chip *this = mtd->priv;
 193         int value, readcmd = 0, block_cmd = 0;
 194         int block, page;
 195
 196         /* Address translation */
 197         switch (cmd) {
 198         case ONENAND_CMD_UNLOCK:
 199         case ONENAND_CMD_LOCK:
 200         case ONENAND_CMD_LOCK_TIGHT:
 201         case ONENAND_CMD_UNLOCK_ALL:
 202                 block = -1;
 203                 page = -1;
 204                 break;
 205
 206         case ONENAND_CMD_ERASE:
 207         case ONENAND_CMD_BUFFERRAM:
 208         case ONENAND_CMD_OTP_ACCESS:
 209                 block_cmd = 1;
 210                 block = (int) (addr >> this->erase_shift);
 211                 page = -1;
 212                 break;
 213
 214         default:
 215                 block = (int) (addr >> this->erase_shift);
 216                 page = (int) (addr >> this->page_shift);
 217                 page &= this->page_mask;
 218                 break;
 219         }
 220
 221         /* NOTE: The setting order of the registers is very important! */
 222         if (cmd == ONENAND_CMD_BUFFERRAM) {
 223                 /* Select DataRAM for DDP */
 224                 value = onenand_bufferram_address(this, block);
 225                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 226
 227                 /* Switch to the next data buffer */
 228                 ONENAND_SET_NEXT_BUFFERRAM(this);
 229
 230                 return 0;
 231         }
 232
 233         if (block != -1) {
 234                 /* Write 'DFS, FBA' of Flash */
 235                 value = onenand_block_address(this, block);
 236                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
 237
 238                 if (block_cmd) {
 239                         /* Select DataRAM for DDP */
 240                         value = onenand_bufferram_address(this, block);
 241                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 242                 }
 243         }
 244
 245         if (page != -1) {
 246                 /* Now we use page size operation */
 247                 int sectors = 4, count = 4;
 248                 int dataram;
 249
 250                 switch (cmd) {
 251                 case ONENAND_CMD_READ:
 252                 case ONENAND_CMD_READOOB:
 253                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 254                         readcmd = 1;
 255                         break;
 256
 257                 default:
 258                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 259                         break;
 260                 }
 261
 262                 /* Write 'FPA, FSA' of Flash */
 263                 value = onenand_page_address(page, sectors);
 264                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
 265
 266                 /* Write 'BSA, BSC' of DataRAM */
 267                 value = onenand_buffer_address(dataram, sectors, count);
 268                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 269
 270                 if (readcmd) {
 271                         /* Select DataRAM for DDP */
 272                         value = onenand_bufferram_address(this, block);
 273                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 274                 }
 275         }
 276
 277         /* Interrupt clear */
 278         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 279
 280         /* Write command */
 281         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 282
 283         return 0;
 284 }
 285
 286 /**
 287  * onenand_wait - [DEFAULT] wait until the command is done
 288  * @param mtd           MTD device structure
 289  * @param state         state to select the max. timeout value
 290  *
 291  * Wait for command done. This applies to all OneNAND command
 292  * Read can take up to 30us, erase up to 2ms and program up to 350us
 293  * according to general OneNAND specs
 294  */
 295 static int onenand_wait(struct mtd_info *mtd, int state)
 296 {
 297         struct onenand_chip * this = mtd->priv;
 298         unsigned long timeout;
 299         unsigned int flags = ONENAND_INT_MASTER;
 300         unsigned int interrupt = 0;
 301         unsigned int ctrl;
 302
 303         /* The 20 msec is enough */
 304         timeout = jiffies + msecs_to_jiffies(20);
 305         while (time_before(jiffies, timeout)) {
 306                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 307
 308                 if (interrupt & flags)
 309                         break;
 310
 311                 if (state != FL_READING)
 312                         cond_resched();
 313         }
 314         /* To get correct interrupt status in timeout case */
 315         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 316
 317         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 318
 319         if (ctrl & ONENAND_CTRL_ERROR) {
 320                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
 321                 if (ctrl & ONENAND_CTRL_LOCK)
 322                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error.\n");
 323                 return ctrl;
 324         }
 325
 326         if (interrupt & ONENAND_INT_READ) {
 327                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 328                 if (ecc) {
 329                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
 330                         if (ecc & ONENAND_ECC_2BIT_ALL) {
 331                                 mtd->ecc_stats.failed++;
 332                                 return ecc;
 333                         } else if (ecc & ONENAND_ECC_1BIT_ALL)
 334                                 mtd->ecc_stats.corrected++;
 335                 }
 336         } else if (state == FL_READING) {
 337                 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
 338                 return -EIO;
 339         }
 340
 341         return 0;
 342 }
 343
 344 /*
 345  * onenand_interrupt - [DEFAULT] onenand interrupt handler
 346  * @param irq           onenand interrupt number
 347  * @param dev_id        interrupt data
 348  *
 349  * complete the work
 350  */
 351 static irqreturn_t onenand_interrupt(int irq, void *data)
 352 {
 353         struct onenand_chip *this = (struct onenand_chip *) data;
 354
 355         /* To handle shared interrupt */
 356         if (!this->complete.done)
 357                 complete(&this->complete);
 358
 359         return IRQ_HANDLED;
 360 }
 361
 362 /*
 363  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
 364  * @param mtd           MTD device structure
 365  * @param state         state to select the max. timeout value
 366  *
 367  * Wait for command done.
 368  */
 369 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
 370 {
 371         struct onenand_chip *this = mtd->priv;
 372
 373         wait_for_completion(&this->complete);
 374
 375         return onenand_wait(mtd, state);
 376 }
 377
 378 /*
 379  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
 380  * @param mtd           MTD device structure
 381  * @param state         state to select the max. timeout value
 382  *
 383  * Try interrupt based wait (It is used one-time)
 384  */
 385 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
 386 {
 387         struct onenand_chip *this = mtd->priv;
 388         unsigned long remain, timeout;
 389
 390         /* We use interrupt wait first */
 391         this->wait = onenand_interrupt_wait;
 392
 393         timeout = msecs_to_jiffies(100);
 394         remain = wait_for_completion_timeout(&this->complete, timeout);
 395         if (!remain) {
 396                 printk(KERN_INFO "OneNAND: There's no interrupt. "
 397                                 "We use the normal wait\n");
 398
 399                 /* Release the irq */
 400                 free_irq(this->irq, this);
 401
 402                 this->wait = onenand_wait;
 403         }
 404
 405         return onenand_wait(mtd, state);
 406 }
 407
 408 /*
 409  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
 410  * @param mtd           MTD device structure
 411  *
 412  * There's two method to wait onenand work
 413  * 1. polling - read interrupt status register
 414  * 2. interrupt - use the kernel interrupt method
 415  */
 416 static void onenand_setup_wait(struct mtd_info *mtd)
 417 {
 418         struct onenand_chip *this = mtd->priv;
 419         int syscfg;
 420
 421         init_completion(&this->complete);
 422
 423         if (this->irq <= 0) {
 424                 this->wait = onenand_wait;
 425                 return;
 426         }
 427
 428         if (request_irq(this->irq, &onenand_interrupt,
 429                                 IRQF_SHARED, "onenand", this)) {
 430                 /* If we can't get irq, use the normal wait */
 431                 this->wait = onenand_wait;
 432                 return;
 433         }
 434
 435         /* Enable interrupt */
 436         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
 437         syscfg |= ONENAND_SYS_CFG1_IOBE;
 438         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
 439
 440         this->wait = onenand_try_interrupt_wait;
 441 }
 442
 443 /**
 444  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 445  * @param mtd           MTD data structure
 446  * @param area          BufferRAM area
 447  * @return              offset given area
 448  *
 449  * Return BufferRAM offset given area
 450  */
 451 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 452 {
 453         struct onenand_chip *this = mtd->priv;
 454
 455         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 456                 if (area == ONENAND_DATARAM)
 457                         return mtd->writesize;
 458                 if (area == ONENAND_SPARERAM)
 459                         return mtd->oobsize;
 460         }
 461
 462         return 0;
 463 }
 464
 465 /**
 466  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 467  * @param mtd           MTD data structure
 468  * @param area          BufferRAM area
 469  * @param buffer        the databuffer to put/get data
 470  * @param offset        offset to read from or write to
 471  * @param count         number of bytes to read/write
 472  *
 473  * Read the BufferRAM area
 474  */
 475 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 476                 unsigned char *buffer, int offset, size_t count)
 477 {
 478         struct onenand_chip *this = mtd->priv;
 479         void __iomem *bufferram;
 480
 481         bufferram = this->base + area;
 482
 483         bufferram += onenand_bufferram_offset(mtd, area);
 484
 485         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 486                 unsigned short word;
 487
 488                 /* Align with word(16-bit) size */
 489                 count--;
 490
 491                 /* Read word and save byte */
 492                 word = this->read_word(bufferram + offset + count);
 493                 buffer[count] = (word & 0xff);
 494         }
 495
 496         memcpy(buffer, bufferram + offset, count);
 497
 498         return 0;
 499 }
 500
 501 /**
 502  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 503  * @param mtd           MTD data structure
 504  * @param area          BufferRAM area
 505  * @param buffer        the databuffer to put/get data
 506  * @param offset        offset to read from or write to
 507  * @param count         number of bytes to read/write
 508  *
 509  * Read the BufferRAM area with Sync. Burst Mode
 510  */
 511 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 512                 unsigned char *buffer, int offset, size_t count)
 513 {
 514         struct onenand_chip *this = mtd->priv;
 515         void __iomem *bufferram;
 516
 517         bufferram = this->base + area;
 518
 519         bufferram += onenand_bufferram_offset(mtd, area);
 520
 521         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 522
 523         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 524                 unsigned short word;
 525
 526                 /* Align with word(16-bit) size */
 527                 count--;
 528
 529                 /* Read word and save byte */
 530                 word = this->read_word(bufferram + offset + count);
 531                 buffer[count] = (word & 0xff);
 532         }
 533
 534         memcpy(buffer, bufferram + offset, count);
 535
 536         this->mmcontrol(mtd, 0);
 537
 538         return 0;
 539 }
 540
 541 /**
 542  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 543  * @param mtd           MTD data structure
 544  * @param area          BufferRAM area
 545  * @param buffer        the databuffer to put/get data
 546  * @param offset        offset to read from or write to
 547  * @param count         number of bytes to read/write
 548  *
 549  * Write the BufferRAM area
 550  */
 551 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 552                 const unsigned char *buffer, int offset, size_t count)
 553 {
 554         struct onenand_chip *this = mtd->priv;
 555         void __iomem *bufferram;
 556
 557         bufferram = this->base + area;
 558
 559         bufferram += onenand_bufferram_offset(mtd, area);
 560
 561         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 562                 unsigned short word;
 563                 int byte_offset;
 564
 565                 /* Align with word(16-bit) size */
 566                 count--;
 567
 568                 /* Calculate byte access offset */
 569                 byte_offset = offset + count;
 570
 571                 /* Read word and save byte */
 572                 word = this->read_word(bufferram + byte_offset);
 573                 word = (word & ~0xff) | buffer[count];
 574                 this->write_word(word, bufferram + byte_offset);
 575         }
 576
 577         memcpy(bufferram + offset, buffer, count);
 578
 579         return 0;
 580 }
 581
 582 /**
 583  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 584  * @param mtd           MTD data structure
 585  * @param addr          address to check
 586  * @return              1 if there are valid data, otherwise 0
 587  *
 588  * Check bufferram if there is data we required
 589  */
 590 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 591 {
 592         struct onenand_chip *this = mtd->priv;
 593         int block, page;
 594         int i;
 595
 596         block = (int) (addr >> this->erase_shift);
 597         page = (int) (addr >> this->page_shift);
 598         page &= this->page_mask;
 599
 600         i = ONENAND_CURRENT_BUFFERRAM(this);
 601
 602         /* Is there valid data? */
 603         if (this->bufferram[i].block == block &&
 604             this->bufferram[i].page == page &&
 605             this->bufferram[i].valid)
 606                 return 1;
 607
 608         return 0;
 609 }
 610
 611 /**
 612  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 613  * @param mtd           MTD data structure
 614  * @param addr          address to update
 615  * @param valid         valid flag
 616  *
 617  * Update BufferRAM information
 618  */
 619 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 620                 int valid)
 621 {
 622         struct onenand_chip *this = mtd->priv;
 623         int block, page;
 624         int i;
 625
 626         block = (int) (addr >> this->erase_shift);
 627         page = (int) (addr >> this->page_shift);
 628         page &= this->page_mask;
 629
 630         /* Invalidate BufferRAM */
 631         for (i = 0; i < MAX_BUFFERRAM; i++) {
 632                 if (this->bufferram[i].block == block &&
 633                     this->bufferram[i].page == page)
 634                         this->bufferram[i].valid = 0;
 635         }
 636
 637         /* Update BufferRAM */
 638         i = ONENAND_CURRENT_BUFFERRAM(this);
 639         this->bufferram[i].block = block;
 640         this->bufferram[i].page = page;
 641         this->bufferram[i].valid = valid;
 642
 643         return 0;
 644 }
 645
 646 /**
 647  * onenand_get_device - [GENERIC] Get chip for selected access
 648  * @param mtd           MTD device structure
 649  * @param new_state     the state which is requested
 650  *
 651  * Get the device and lock it for exclusive access
 652  */
 653 static int onenand_get_device(struct mtd_info *mtd, int new_state)
 654 {
 655         struct onenand_chip *this = mtd->priv;
 656         DECLARE_WAITQUEUE(wait, current);
 657
 658         /*
 659          * Grab the lock and see if the device is available
 660          */
 661         while (1) {
 662                 spin_lock(&this->chip_lock);
 663                 if (this->state == FL_READY) {
 664                         this->state = new_state;
 665                         spin_unlock(&this->chip_lock);
 666                         break;
 667                 }
 668                 if (new_state == FL_PM_SUSPENDED) {
 669                         spin_unlock(&this->chip_lock);
 670                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
 671                 }
 672                 set_current_state(TASK_UNINTERRUPTIBLE);
 673                 add_wait_queue(&this->wq, &wait);
 674                 spin_unlock(&this->chip_lock);
 675                 schedule();
 676                 remove_wait_queue(&this->wq, &wait);
 677         }
 678
 679         return 0;
 680 }
 681
 682 /**
 683  * onenand_release_device - [GENERIC] release chip
 684  * @param mtd           MTD device structure
 685  *
 686  * Deselect, release chip lock and wake up anyone waiting on the device
 687  */
 688 static void onenand_release_device(struct mtd_info *mtd)
 689 {
 690         struct onenand_chip *this = mtd->priv;
 691
 692         /* Release the chip */
 693         spin_lock(&this->chip_lock);
 694         this->state = FL_READY;
 695         wake_up(&this->wq);
 696         spin_unlock(&this->chip_lock);
 697 }
 698
 699 /**
 700  * onenand_read - [MTD Interface] Read data from flash
 701  * @param mtd           MTD device structure
 702  * @param from          offset to read from
 703  * @param len           number of bytes to read
 704  * @param retlen        pointer to variable to store the number of read bytes
 705  * @param buf           the databuffer to put data
 706  *
 707  * Read with ecc
 708 */
 709 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
 710         size_t *retlen, u_char *buf)
 711 {
 712         struct onenand_chip *this = mtd->priv;
 713         struct mtd_ecc_stats stats;
 714         int read = 0, column;
 715         int thislen;
 716         int ret = 0, boundary = 0;
 717
 718         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 719
 720         /* Do not allow reads past end of device */
 721         if ((from + len) > mtd->size) {
 722                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
 723                 *retlen = 0;
 724                 return -EINVAL;
 725         }
 726
 727         /* Grab the lock and see if the device is available */
 728         onenand_get_device(mtd, FL_READING);
 729
 730         /* TODO handling oob */
 731
 732         stats = mtd->ecc_stats;
 733
 734         /* Read-while-load method */
 735
 736         /* Do first load to bufferRAM */
 737         if (read < len) {
 738                 if (!onenand_check_bufferram(mtd, from)) {
 739                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
 740                         ret = this->wait(mtd, FL_READING);
 741                         onenand_update_bufferram(mtd, from, !ret);
 742                 }
 743         }
 744
 745         thislen = min_t(int, mtd->writesize, len - read);
 746         column = from & (mtd->writesize - 1);
 747         if (column + thislen > mtd->writesize)
 748                 thislen = mtd->writesize - column;
 749
 750         while (!ret) {
 751                 /* If there is more to load then start next load */
 752                 from += thislen;
 753                 if (read + thislen < len) {
 754                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
 755                         /*
 756                          * Chip boundary handling in DDP
 757                          * Now we issued chip 1 read and pointed chip 1
 758                          * bufferam so we have to point chip 0 bufferam.
 759                          */
 760                         if (this->device_id & ONENAND_DEVICE_IS_DDP &&
 761                                         unlikely(from == (this->chipsize >> 1))) {
 762                                 this->write_word(0, this->base + ONENAND_REG_START_ADDRESS2);
 763                                 boundary = 1;
 764                         } else
 765                                 boundary = 0;
 766                         ONENAND_SET_PREV_BUFFERRAM(this);
 767                 }
 768                 /* While load is going, read from last bufferRAM */
 769                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
 770                 /* See if we are done */
 771                 read += thislen;
 772                 if (read == len)
 773                         break;
 774                 /* Set up for next read from bufferRAM */
 775                 if (unlikely(boundary))
 776                         this->write_word(0x8000, this->base + ONENAND_REG_START_ADDRESS2);
 777                 ONENAND_SET_NEXT_BUFFERRAM(this);
 778                 buf += thislen;
 779                 thislen = min_t(int, mtd->writesize, len - read);
 780                 column = 0;
 781                 cond_resched();
 782                 /* Now wait for load */
 783                 ret = this->wait(mtd, FL_READING);
 784                 onenand_update_bufferram(mtd, from, !ret);
 785         }
 786
 787         /* Deselect and wake up anyone waiting on the device */
 788         onenand_release_device(mtd);
 789
 790         /*
 791          * Return success, if no ECC failures, else -EBADMSG
 792          * fs driver will take care of that, because
 793          * retlen == desired len and result == -EBADMSG
 794          */
 795         *retlen = read;
 796
 797         if (mtd->ecc_stats.failed - stats.failed)
 798                 return -EBADMSG;
 799
 800         if (ret)
 801                 return ret;
 802
 803         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
 804 }
 805
 806 /**
 807  * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
 808  * @param mtd           MTD device structure
 809  * @param from          offset to read from
 810  * @param len           number of bytes to read
 811  * @param retlen        pointer to variable to store the number of read bytes
 812  * @param buf           the databuffer to put data
 813  *
 814  * OneNAND read out-of-band data from the spare area
 815  */
 816 int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
 817                         size_t *retlen, u_char *buf)
 818 {
 819         struct onenand_chip *this = mtd->priv;
 820         int read = 0, thislen, column;
 821         int ret = 0;
 822
 823         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 824
 825         /* Initialize return length value */
 826         *retlen = 0;
 827
 828         /* Do not allow reads past end of device */
 829         if (unlikely((from + len) > mtd->size)) {
 830                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
 831                 return -EINVAL;
 832         }
 833
 834         /* Grab the lock and see if the device is available */
 835         onenand_get_device(mtd, FL_READING);
 836
 837         column = from & (mtd->oobsize - 1);
 838
 839         while (read < len) {
 840                 cond_resched();
 841
 842                 thislen = mtd->oobsize - column;
 843                 thislen = min_t(int, thislen, len);
 844
 845                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
 846
 847                 onenand_update_bufferram(mtd, from, 0);
 848
 849                 ret = this->wait(mtd, FL_READING);
 850                 /* First copy data and check return value for ECC handling */
 851
 852                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
 853
 854                 if (ret) {
 855                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = 0x%x\n", ret);
 856                         goto out;
 857                 }
 858
 859                 read += thislen;
 860
 861                 if (read == len)
 862                         break;
 863
 864                 buf += thislen;
 865
 866                 /* Read more? */
 867                 if (read < len) {
 868                         /* Page size */
 869                         from += mtd->writesize;
 870                         column = 0;
 871                 }
 872         }
 873
 874 out:
 875         /* Deselect and wake up anyone waiting on the device */
 876         onenand_release_device(mtd);
 877
 878         *retlen = read;
 879         return ret;
 880 }
 881
 882 /**
 883  * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
 884  * @mtd:        MTD device structure
 885  * @from:       offset to read from
 886  * @ops:        oob operation description structure
 887  */
 888 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
 889                             struct mtd_oob_ops *ops)
 890 {
 891         BUG_ON(ops->mode != MTD_OOB_PLACE);
 892
 893         return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
 894                                    &ops->oobretlen, ops->oobbuf);
 895 }
 896
 897 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
 898 /**
 899  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
 900  * @param mtd           MTD device structure
 901  * @param buf           the databuffer to verify
 902  * @param to            offset to read from
 903  * @param len           number of bytes to read and compare
 904  *
 905  */
 906 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
 907 {
 908         struct onenand_chip *this = mtd->priv;
 909         char *readp = this->page_buf;
 910         int column = to & (mtd->oobsize - 1);
 911         int status, i;
 912
 913         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
 914         onenand_update_bufferram(mtd, to, 0);
 915         status = this->wait(mtd, FL_READING);
 916         if (status)
 917                 return status;
 918
 919         this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
 920
 921         for(i = 0; i < len; i++)
 922                 if (buf[i] != 0xFF && buf[i] != readp[i])
 923                         return -EBADMSG;
 924
 925         return 0;
 926 }
 927
 928 /**
 929  * onenand_verify_page - [GENERIC] verify the chip contents after a write
 930  * @param mtd           MTD device structure
 931  * @param buf           the databuffer to verify
 932  *
 933  * Check DataRAM area directly
 934  */
 935 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
 936 {
 937         struct onenand_chip *this = mtd->priv;
 938         void __iomem *dataram0, *dataram1;
 939         int ret = 0;
 940
 941         /* In partial page write, just skip it */
 942         if ((addr & (mtd->writesize - 1)) != 0)
 943                 return 0;
 944
 945         this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
 946
 947         ret = this->wait(mtd, FL_READING);
 948         if (ret)
 949                 return ret;
 950
 951         onenand_update_bufferram(mtd, addr, 1);
 952
 953         /* Check, if the two dataram areas are same */
 954         dataram0 = this->base + ONENAND_DATARAM;
 955         dataram1 = dataram0 + mtd->writesize;
 956
 957         if (memcmp(dataram0, dataram1, mtd->writesize))
 958                 return -EBADMSG;
 959
 960         return 0;
 961 }
 962 #else
 963 #define onenand_verify_page(...)        (0)
 964 #define onenand_verify_oob(...)         (0)
 965 #endif
 966
 967 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
 968
 969 /**
 970  * onenand_write - [MTD Interface] write buffer to FLASH
 971  * @param mtd           MTD device structure
 972  * @param to            offset to write to
 973  * @param len           number of bytes to write
 974  * @param retlen        pointer to variable to store the number of written bytes
 975  * @param buf           the data to write
 976  *
 977  * Write with ECC
 978  */
 979 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
 980         size_t *retlen, const u_char *buf)
 981 {
 982         struct onenand_chip *this = mtd->priv;
 983         int written = 0;
 984         int ret = 0;
 985         int column, subpage;
 986
 987         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
 988
 989         /* Initialize retlen, in case of early exit */
 990         *retlen = 0;
 991
 992         /* Do not allow writes past end of device */
 993         if (unlikely((to + len) > mtd->size)) {
 994                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
 995                 return -EINVAL;
 996         }
 997
 998         /* Reject writes, which are not page aligned */
 999         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1000                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
1001                 return -EINVAL;
1002         }
1003
1004         column = to & (mtd->writesize - 1);
1005         subpage = column || (len & (mtd->writesize - 1));
1006
1007         /* Grab the lock and see if the device is available */
1008         onenand_get_device(mtd, FL_WRITING);
1009
1010         /* Loop until all data write */
1011         while (written < len) {
1012                 int bytes = mtd->writesize;
1013                 int thislen = min_t(int, bytes, len - written);
1014                 u_char *wbuf = (u_char *) buf;
1015
1016                 cond_resched();
1017
1018                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, bytes);
1019
1020                 /* Partial page write */
1021                 if (subpage) {
1022                         bytes = min_t(int, bytes - column, (int) len);
1023                         memset(this->page_buf, 0xff, mtd->writesize);
1024                         memcpy(this->page_buf + column, buf, bytes);
1025                         wbuf = this->page_buf;
1026                         /* Even though partial write, we need page size */
1027                         thislen = mtd->writesize;
1028                 }
1029
1030                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, thislen);
1031                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1032
1033                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1034
1035                 /* In partial page write we don't update bufferram */
1036                 onenand_update_bufferram(mtd, to, !subpage);
1037
1038                 ret = this->wait(mtd, FL_WRITING);
1039                 if (ret) {
1040                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
1041                         break;
1042                 }
1043
1044                 /* Only check verify write turn on */
1045                 ret = onenand_verify_page(mtd, (u_char *) wbuf, to);
1046                 if (ret) {
1047                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
1048                         break;
1049                 }
1050
1051                 written += thislen;
1052
1053                 if (written == len)
1054                         break;
1055
1056                 column = 0;
1057                 to += thislen;
1058                 buf += thislen;
1059         }
1060
1061         /* Deselect and wake up anyone waiting on the device */
1062         onenand_release_device(mtd);
1063
1064         *retlen = written;
1065
1066         return ret;
1067 }
1068
1069 /**
1070  * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1071  * @param mtd           MTD device structure
1072  * @param to            offset to write to
1073  * @param len           number of bytes to write
1074  * @param retlen        pointer to variable to store the number of written bytes
1075  * @param buf           the data to write
1076  *
1077  * OneNAND write out-of-band
1078  */
1079 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1080                                 size_t *retlen, const u_char *buf)
1081 {
1082         struct onenand_chip *this = mtd->priv;
1083         int column, ret = 0;
1084         int written = 0;
1085
1086         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1087
1088         /* Initialize retlen, in case of early exit */
1089         *retlen = 0;
1090
1091         /* Do not allow writes past end of device */
1092         if (unlikely((to + len) > mtd->size)) {
1093                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
1094                 return -EINVAL;
1095         }
1096
1097         /* Grab the lock and see if the device is available */
1098         onenand_get_device(mtd, FL_WRITING);
1099
1100         /* Loop until all data write */
1101         while (written < len) {
1102                 int thislen = min_t(int, mtd->oobsize, len - written);
1103
1104                 cond_resched();
1105
1106                 column = to & (mtd->oobsize - 1);
1107
1108                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1109
1110                 /* We send data to spare ram with oobsize
1111                  * to prevent byte access */
1112                 memset(this->page_buf, 0xff, mtd->oobsize);
1113                 memcpy(this->page_buf + column, buf, thislen);
1114                 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
1115
1116                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1117
1118                 onenand_update_bufferram(mtd, to, 0);
1119
1120                 ret = this->wait(mtd, FL_WRITING);
1121                 if (ret) {
1122                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
1123                         goto out;
1124                 }
1125
1126                 ret = onenand_verify_oob(mtd, buf, to, thislen);
1127                 if (ret) {
1128                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
1129                         goto out;
1130                 }
1131
1132                 written += thislen;
1133
1134                 if (written == len)
1135                         break;
1136
1137                 to += thislen;
1138                 buf += thislen;
1139         }
1140
1141 out:
1142         /* Deselect and wake up anyone waiting on the device */
1143         onenand_release_device(mtd);
1144
1145         *retlen = written;
1146
1147         return ret;
1148 }
1149
1150 /**
1151  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1152  * @mtd:        MTD device structure
1153  * @from:       offset to read from
1154  * @ops:        oob operation description structure
1155  */
1156 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1157                              struct mtd_oob_ops *ops)
1158 {
1159         BUG_ON(ops->mode != MTD_OOB_PLACE);
1160
1161         return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1162                                     &ops->oobretlen, ops->oobbuf);
1163 }
1164
1165 /**
1166  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1167  * @param mtd           MTD device structure
1168  * @param ofs           offset from device start
1169  * @param getchip       0, if the chip is already selected
1170  * @param allowbbt      1, if its allowed to access the bbt area
1171  *
1172  * Check, if the block is bad. Either by reading the bad block table or
1173  * calling of the scan function.
1174  */
1175 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1176 {
1177         struct onenand_chip *this = mtd->priv;
1178         struct bbm_info *bbm = this->bbm;
1179
1180         /* Return info from the table */
1181         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1182 }
1183
1184 /**
1185  * onenand_erase - [MTD Interface] erase block(s)
1186  * @param mtd           MTD device structure
1187  * @param instr         erase instruction
1188  *
1189  * Erase one ore more blocks
1190  */
1191 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1192 {
1193         struct onenand_chip *this = mtd->priv;
1194         unsigned int block_size;
1195         loff_t addr;
1196         int len;
1197         int ret = 0;
1198
1199         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1200
1201         block_size = (1 << this->erase_shift);
1202
1203         /* Start address must align on block boundary */
1204         if (unlikely(instr->addr & (block_size - 1))) {
1205                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1206                 return -EINVAL;
1207         }
1208
1209         /* Length must align on block boundary */
1210         if (unlikely(instr->len & (block_size - 1))) {
1211                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1212                 return -EINVAL;
1213         }
1214
1215         /* Do not allow erase past end of device */
1216         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1217                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1218                 return -EINVAL;
1219         }
1220
1221         instr->fail_addr = 0xffffffff;
1222
1223         /* Grab the lock and see if the device is available */
1224         onenand_get_device(mtd, FL_ERASING);
1225
1226         /* Loop throught the pages */
1227         len = instr->len;
1228         addr = instr->addr;
1229
1230         instr->state = MTD_ERASING;
1231
1232         while (len) {
1233                 cond_resched();
1234
1235                 /* Check if we have a bad block, we do not erase bad blocks */
1236                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1237                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1238                         instr->state = MTD_ERASE_FAILED;
1239                         goto erase_exit;
1240                 }
1241
1242                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1243
1244                 ret = this->wait(mtd, FL_ERASING);
1245                 /* Check, if it is write protected */
1246                 if (ret) {
1247                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1248                         instr->state = MTD_ERASE_FAILED;
1249                         instr->fail_addr = addr;
1250                         goto erase_exit;
1251                 }
1252
1253                 len -= block_size;
1254                 addr += block_size;
1255         }
1256
1257         instr->state = MTD_ERASE_DONE;
1258
1259 erase_exit:
1260
1261         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1262         /* Do call back function */
1263         if (!ret)
1264                 mtd_erase_callback(instr);
1265
1266         /* Deselect and wake up anyone waiting on the device */
1267         onenand_release_device(mtd);
1268
1269         return ret;
1270 }
1271
1272 /**
1273  * onenand_sync - [MTD Interface] sync
1274  * @param mtd           MTD device structure
1275  *
1276  * Sync is actually a wait for chip ready function
1277  */
1278 static void onenand_sync(struct mtd_info *mtd)
1279 {
1280         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1281
1282         /* Grab the lock and see if the device is available */
1283         onenand_get_device(mtd, FL_SYNCING);
1284
1285         /* Release it and go back */
1286         onenand_release_device(mtd);
1287 }
1288
1289 /**
1290  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1291  * @param mtd           MTD device structure
1292  * @param ofs           offset relative to mtd start
1293  *
1294  * Check whether the block is bad
1295  */
1296 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1297 {
1298         /* Check for invalid offset */
1299         if (ofs > mtd->size)
1300                 return -EINVAL;
1301
1302         return onenand_block_checkbad(mtd, ofs, 1, 0);
1303 }
1304
1305 /**
1306  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1307  * @param mtd           MTD device structure
1308  * @param ofs           offset from device start
1309  *
1310  * This is the default implementation, which can be overridden by
1311  * a hardware specific driver.
1312  */
1313 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1314 {
1315         struct onenand_chip *this = mtd->priv;
1316         struct bbm_info *bbm = this->bbm;
1317         u_char buf[2] = {0, 0};
1318         size_t retlen;
1319         int block;
1320
1321         /* Get block number */
1322         block = ((int) ofs) >> bbm->bbt_erase_shift;
1323         if (bbm->bbt)
1324                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1325
1326         /* We write two bytes, so we dont have to mess with 16 bit access */
1327         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1328         return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf);
1329 }
1330
1331 /**
1332  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1333  * @param mtd           MTD device structure
1334  * @param ofs           offset relative to mtd start
1335  *
1336  * Mark the block as bad
1337  */
1338 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1339 {
1340         struct onenand_chip *this = mtd->priv;
1341         int ret;
1342
1343         ret = onenand_block_isbad(mtd, ofs);
1344         if (ret) {
1345                 /* If it was bad already, return success and do nothing */
1346                 if (ret > 0)
1347                         return 0;
1348                 return ret;
1349         }
1350
1351         return this->block_markbad(mtd, ofs);
1352 }
1353
1354 /**
1355  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1356  * @param mtd           MTD device structure
1357  * @param ofs           offset relative to mtd start
1358  * @param len           number of bytes to lock or unlock
1359  *
1360  * Lock or unlock one or more blocks
1361  */
1362 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1363 {
1364         struct onenand_chip *this = mtd->priv;
1365         int start, end, block, value, status;
1366         int wp_status_mask;
1367
1368         start = ofs >> this->erase_shift;
1369         end = len >> this->erase_shift;
1370
1371         if (cmd == ONENAND_CMD_LOCK)
1372                 wp_status_mask = ONENAND_WP_LS;
1373         else
1374                 wp_status_mask = ONENAND_WP_US;
1375
1376         /* Continuous lock scheme */
1377         if (this->options & ONENAND_HAS_CONT_LOCK) {
1378                 /* Set start block address */
1379                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1380                 /* Set end block address */
1381                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1382                 /* Write lock command */
1383                 this->command(mtd, cmd, 0, 0);
1384
1385                 /* There's no return value */
1386                 this->wait(mtd, FL_LOCKING);
1387
1388                 /* Sanity check */
1389                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1390                     & ONENAND_CTRL_ONGO)
1391                         continue;
1392
1393                 /* Check lock status */
1394                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1395                 if (!(status & wp_status_mask))
1396                         printk(KERN_ERR "wp status = 0x%x\n", status);
1397
1398                 return 0;
1399         }
1400
1401         /* Block lock scheme */
1402         for (block = start; block < start + end; block++) {
1403                 /* Set block address */
1404                 value = onenand_block_address(this, block);
1405                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1406                 /* Select DataRAM for DDP */
1407                 value = onenand_bufferram_address(this, block);
1408                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1409                 /* Set start block address */
1410                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1411                 /* Write lock command */
1412                 this->command(mtd, cmd, 0, 0);
1413
1414                 /* There's no return value */
1415                 this->wait(mtd, FL_LOCKING);
1416
1417                 /* Sanity check */
1418                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1419                     & ONENAND_CTRL_ONGO)
1420                         continue;
1421
1422                 /* Check lock status */
1423                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1424                 if (!(status & wp_status_mask))
1425                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1426         }
1427
1428         return 0;
1429 }
1430
1431 /**
1432  * onenand_lock - [MTD Interface] Lock block(s)
1433  * @param mtd           MTD device structure
1434  * @param ofs           offset relative to mtd start
1435  * @param len           number of bytes to unlock
1436  *
1437  * Lock one or more blocks
1438  */
1439 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1440 {
1441         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1442 }
1443
1444 /**
1445  * onenand_unlock - [MTD Interface] Unlock block(s)
1446  * @param mtd           MTD device structure
1447  * @param ofs           offset relative to mtd start
1448  * @param len           number of bytes to unlock
1449  *
1450  * Unlock one or more blocks
1451  */
1452 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1453 {
1454         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1455 }
1456
1457 /**
1458  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1459  * @param this          onenand chip data structure
1460  *
1461  * Check lock status
1462  */
1463 static void onenand_check_lock_status(struct onenand_chip *this)
1464 {
1465         unsigned int value, block, status;
1466         unsigned int end;
1467
1468         end = this->chipsize >> this->erase_shift;
1469         for (block = 0; block < end; block++) {
1470                 /* Set block address */
1471                 value = onenand_block_address(this, block);
1472                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1473                 /* Select DataRAM for DDP */
1474                 value = onenand_bufferram_address(this, block);
1475                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1476                 /* Set start block address */
1477                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1478
1479                 /* Check lock status */
1480                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1481                 if (!(status & ONENAND_WP_US))
1482                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1483         }
1484 }
1485
1486 /**
1487  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1488  * @param mtd           MTD device structure
1489  *
1490  * Unlock all blocks
1491  */
1492 static int onenand_unlock_all(struct mtd_info *mtd)
1493 {
1494         struct onenand_chip *this = mtd->priv;
1495
1496         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1497                 /* Set start block address */
1498                 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1499                 /* Write unlock command */
1500                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1501
1502                 /* There's no return value */
1503                 this->wait(mtd, FL_LOCKING);
1504
1505                 /* Sanity check */
1506                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1507                     & ONENAND_CTRL_ONGO)
1508                         continue;
1509
1510                 /* Workaround for all block unlock in DDP */
1511                 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
1512                         /* 1st block on another chip */
1513                         loff_t ofs = this->chipsize >> 1;
1514                         size_t len = mtd->erasesize;
1515
1516                         onenand_unlock(mtd, ofs, len);
1517                 }
1518
1519                 onenand_check_lock_status(this);
1520
1521                 return 0;
1522         }
1523
1524         onenand_unlock(mtd, 0x0, this->chipsize);
1525
1526         return 0;
1527 }
1528
1529 #ifdef CONFIG_MTD_ONENAND_OTP
1530
1531 /* Interal OTP operation */
1532 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1533                 size_t *retlen, u_char *buf);
1534
1535 /**
1536  * do_otp_read - [DEFAULT] Read OTP block area
1537  * @param mtd           MTD device structure
1538  * @param from          The offset to read
1539  * @param len           number of bytes to read
1540  * @param retlen        pointer to variable to store the number of readbytes
1541  * @param buf           the databuffer to put/get data
1542  *
1543  * Read OTP block area.
1544  */
1545 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1546                 size_t *retlen, u_char *buf)
1547 {
1548         struct onenand_chip *this = mtd->priv;
1549         int ret;
1550
1551         /* Enter OTP access mode */
1552         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1553         this->wait(mtd, FL_OTPING);
1554
1555         ret = mtd->read(mtd, from, len, retlen, buf);
1556
1557         /* Exit OTP access mode */
1558         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1559         this->wait(mtd, FL_RESETING);
1560
1561         return ret;
1562 }
1563
1564 /**
1565  * do_otp_write - [DEFAULT] Write OTP block area
1566  * @param mtd           MTD device structure
1567  * @param from          The offset to write
1568  * @param len           number of bytes to write
1569  * @param retlen        pointer to variable to store the number of write bytes
1570  * @param buf           the databuffer to put/get data
1571  *
1572  * Write OTP block area.
1573  */
1574 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1575                 size_t *retlen, u_char *buf)
1576 {
1577         struct onenand_chip *this = mtd->priv;
1578         unsigned char *pbuf = buf;
1579         int ret;
1580
1581         /* Force buffer page aligned */
1582         if (len < mtd->writesize) {
1583                 memcpy(this->page_buf, buf, len);
1584                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1585                 pbuf = this->page_buf;
1586                 len = mtd->writesize;
1587         }
1588
1589         /* Enter OTP access mode */
1590         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1591         this->wait(mtd, FL_OTPING);
1592
1593         ret = mtd->write(mtd, from, len, retlen, pbuf);
1594
1595         /* Exit OTP access mode */
1596         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1597         this->wait(mtd, FL_RESETING);
1598
1599         return ret;
1600 }
1601
1602 /**
1603  * do_otp_lock - [DEFAULT] Lock OTP block area
1604  * @param mtd           MTD device structure
1605  * @param from          The offset to lock
1606  * @param len           number of bytes to lock
1607  * @param retlen        pointer to variable to store the number of lock bytes
1608  * @param buf           the databuffer to put/get data
1609  *
1610  * Lock OTP block area.
1611  */
1612 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1613                 size_t *retlen, u_char *buf)
1614 {
1615         struct onenand_chip *this = mtd->priv;
1616         int ret;
1617
1618         /* Enter OTP access mode */
1619         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1620         this->wait(mtd, FL_OTPING);
1621
1622         ret = onenand_do_write_oob(mtd, from, len, retlen, buf);
1623
1624         /* Exit OTP access mode */
1625         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1626         this->wait(mtd, FL_RESETING);
1627
1628         return ret;
1629 }
1630
1631 /**
1632  * onenand_otp_walk - [DEFAULT] Handle OTP operation
1633  * @param mtd           MTD device structure
1634  * @param from          The offset to read/write
1635  * @param len           number of bytes to read/write
1636  * @param retlen        pointer to variable to store the number of read bytes
1637  * @param buf           the databuffer to put/get data
1638  * @param action        do given action
1639  * @param mode          specify user and factory
1640  *
1641  * Handle OTP operation.
1642  */
1643 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1644                         size_t *retlen, u_char *buf,
1645                         otp_op_t action, int mode)
1646 {
1647         struct onenand_chip *this = mtd->priv;
1648         int otp_pages;
1649         int density;
1650         int ret = 0;
1651
1652         *retlen = 0;
1653
1654         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1655         if (density < ONENAND_DEVICE_DENSITY_512Mb)
1656                 otp_pages = 20;
1657         else
1658                 otp_pages = 10;
1659
1660         if (mode == MTD_OTP_FACTORY) {
1661                 from += mtd->writesize * otp_pages;
1662                 otp_pages = 64 - otp_pages;
1663         }
1664
1665         /* Check User/Factory boundary */
1666         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1667                 return 0;
1668
1669         while (len > 0 && otp_pages > 0) {
1670                 if (!action) {  /* OTP Info functions */
1671                         struct otp_info *otpinfo;
1672
1673                         len -= sizeof(struct otp_info);
1674                         if (len <= 0)
1675                                 return -ENOSPC;
1676
1677                         otpinfo = (struct otp_info *) buf;
1678                         otpinfo->start = from;
1679                         otpinfo->length = mtd->writesize;
1680                         otpinfo->locked = 0;
1681
1682                         from += mtd->writesize;
1683                         buf += sizeof(struct otp_info);
1684                         *retlen += sizeof(struct otp_info);
1685                 } else {
1686                         size_t tmp_retlen;
1687                         int size = len;
1688
1689                         ret = action(mtd, from, len, &tmp_retlen, buf);
1690
1691                         buf += size;
1692                         len -= size;
1693                         *retlen += size;
1694
1695                         if (ret < 0)
1696                                 return ret;
1697                 }
1698                 otp_pages--;
1699         }
1700
1701         return 0;
1702 }
1703
1704 /**
1705  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1706  * @param mtd           MTD device structure
1707  * @param buf           the databuffer to put/get data
1708  * @param len           number of bytes to read
1709  *
1710  * Read factory OTP info.
1711  */
1712 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1713                         struct otp_info *buf, size_t len)
1714 {
1715         size_t retlen;
1716         int ret;
1717
1718         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1719
1720         return ret ? : retlen;
1721 }
1722
1723 /**
1724  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1725  * @param mtd           MTD device structure
1726  * @param from          The offset to read
1727  * @param len           number of bytes to read
1728  * @param retlen        pointer to variable to store the number of read bytes
1729  * @param buf           the databuffer to put/get data
1730  *
1731  * Read factory OTP area.
1732  */
1733 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1734                         size_t len, size_t *retlen, u_char *buf)
1735 {
1736         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1737 }
1738
1739 /**
1740  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1741  * @param mtd           MTD device structure
1742  * @param buf           the databuffer to put/get data
1743  * @param len           number of bytes to read
1744  *
1745  * Read user OTP info.
1746  */
1747 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1748                         struct otp_info *buf, size_t len)
1749 {
1750         size_t retlen;
1751         int ret;
1752
1753         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1754
1755         return ret ? : retlen;
1756 }
1757
1758 /**
1759  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1760  * @param mtd           MTD device structure
1761  * @param from          The offset to read
1762  * @param len           number of bytes to read
1763  * @param retlen        pointer to variable to store the number of read bytes
1764  * @param buf           the databuffer to put/get data
1765  *
1766  * Read user OTP area.
1767  */
1768 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1769                         size_t len, size_t *retlen, u_char *buf)
1770 {
1771         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1772 }
1773
1774 /**
1775  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1776  * @param mtd           MTD device structure
1777  * @param from          The offset to write
1778  * @param len           number of bytes to write
1779  * @param retlen        pointer to variable to store the number of write bytes
1780  * @param buf           the databuffer to put/get data
1781  *
1782  * Write user OTP area.
1783  */
1784 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1785                         size_t len, size_t *retlen, u_char *buf)
1786 {
1787         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1788 }
1789
1790 /**
1791  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1792  * @param mtd           MTD device structure
1793  * @param from          The offset to lock
1794  * @param len           number of bytes to unlock
1795  *
1796  * Write lock mark on spare area in page 0 in OTP block
1797  */
1798 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1799                         size_t len)
1800 {
1801         unsigned char oob_buf[64];
1802         size_t retlen;
1803         int ret;
1804
1805         memset(oob_buf, 0xff, mtd->oobsize);
1806         /*
1807          * Note: OTP lock operation
1808          *       OTP block : 0xXXFC
1809          *       1st block : 0xXXF3 (If chip support)
1810          *       Both      : 0xXXF0 (If chip support)
1811          */
1812         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1813
1814         /*
1815          * Write lock mark to 8th word of sector0 of page0 of the spare0.
1816          * We write 16 bytes spare area instead of 2 bytes.
1817          */
1818         from = 0;
1819         len = 16;
1820
1821         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1822
1823         return ret ? : retlen;
1824 }
1825 #endif  /* CONFIG_MTD_ONENAND_OTP */
1826
1827 /**
1828  * onenand_lock_scheme - Check and set OneNAND lock scheme
1829  * @param mtd           MTD data structure
1830  *
1831  * Check and set OneNAND lock scheme
1832  */
1833 static void onenand_lock_scheme(struct mtd_info *mtd)
1834 {
1835         struct onenand_chip *this = mtd->priv;
1836         unsigned int density, process;
1837
1838         /* Lock scheme depends on density and process */
1839         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1840         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
1841
1842         /* Lock scheme */
1843         if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
1844                 /* A-Die has all block unlock */
1845                 if (process) {
1846                         printk(KERN_DEBUG "Chip support all block unlock\n");
1847                         this->options |= ONENAND_HAS_UNLOCK_ALL;
1848                 }
1849         } else {
1850                 /* Some OneNAND has continues lock scheme */
1851                 if (!process) {
1852                         printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
1853                         this->options |= ONENAND_HAS_CONT_LOCK;
1854                 }
1855         }
1856 }
1857
1858 /**
1859  * onenand_print_device_info - Print device ID
1860  * @param device        device ID
1861  *
1862  * Print device ID
1863  */
1864 static void onenand_print_device_info(int device, int version)
1865 {
1866         int vcc, demuxed, ddp, density;
1867
1868         vcc = device & ONENAND_DEVICE_VCC_MASK;
1869         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1870         ddp = device & ONENAND_DEVICE_IS_DDP;
1871         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1872         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1873                 demuxed ? "" : "Muxed ",
1874                 ddp ? "(DDP)" : "",
1875                 (16 << density),
1876                 vcc ? "2.65/3.3" : "1.8",
1877                 device);
1878         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
1879 }
1880
1881 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1882         {ONENAND_MFR_SAMSUNG, "Samsung"},
1883 };
1884
1885 /**
1886  * onenand_check_maf - Check manufacturer ID
1887  * @param manuf         manufacturer ID
1888  *
1889  * Check manufacturer ID
1890  */
1891 static int onenand_check_maf(int manuf)
1892 {
1893         int size = ARRAY_SIZE(onenand_manuf_ids);
1894         char *name;
1895         int i;
1896
1897         for (i = 0; i < size; i++)
1898                 if (manuf == onenand_manuf_ids[i].id)
1899                         break;
1900
1901         if (i < size)
1902                 name = onenand_manuf_ids[i].name;
1903         else
1904                 name = "Unknown";
1905
1906         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1907
1908         return (i == size);
1909 }
1910
1911 /**
1912  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1913  * @param mtd           MTD device structure
1914  *
1915  * OneNAND detection method:
1916  *   Compare the the values from command with ones from register
1917  */
1918 static int onenand_probe(struct mtd_info *mtd)
1919 {
1920         struct onenand_chip *this = mtd->priv;
1921         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
1922         int density;
1923         int syscfg;
1924
1925         /* Save system configuration 1 */
1926         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
1927         /* Clear Sync. Burst Read mode to read BootRAM */
1928         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
1929
1930         /* Send the command for reading device ID from BootRAM */
1931         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1932
1933         /* Read manufacturer and device IDs from BootRAM */
1934         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1935         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1936
1937         /* Reset OneNAND to read default register values */
1938         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1939         /* Wait reset */
1940         this->wait(mtd, FL_RESETING);
1941
1942         /* Restore system configuration 1 */
1943         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
1944
1945         /* Check manufacturer ID */
1946         if (onenand_check_maf(bram_maf_id))
1947                 return -ENXIO;
1948
1949         /* Read manufacturer and device IDs from Register */
1950         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1951         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1952         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1953
1954         /* Check OneNAND device */
1955         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1956                 return -ENXIO;
1957
1958         /* Flash device information */
1959         onenand_print_device_info(dev_id, ver_id);
1960         this->device_id = dev_id;
1961         this->version_id = ver_id;
1962
1963         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1964         this->chipsize = (16 << density) << 20;
1965         /* Set density mask. it is used for DDP */
1966         this->density_mask = (1 << (density + 6));
1967
1968         /* OneNAND page size & block size */
1969         /* The data buffer size is equal to page size */
1970         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1971         mtd->oobsize = mtd->writesize >> 5;
1972         /* Pagers per block is always 64 in OneNAND */
1973         mtd->erasesize = mtd->writesize << 6;
1974
1975         this->erase_shift = ffs(mtd->erasesize) - 1;
1976         this->page_shift = ffs(mtd->writesize) - 1;
1977         this->ppb_shift = (this->erase_shift - this->page_shift);
1978         this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
1979
1980         /* REVIST: Multichip handling */
1981
1982         mtd->size = this->chipsize;
1983
1984         /* Check OneNAND lock scheme */
1985         onenand_lock_scheme(mtd);
1986
1987         return 0;
1988 }
1989
1990 /**
1991  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1992  * @param mtd           MTD device structure
1993  */
1994 static int onenand_suspend(struct mtd_info *mtd)
1995 {
1996         return onenand_get_device(mtd, FL_PM_SUSPENDED);
1997 }
1998
1999 /**
2000  * onenand_resume - [MTD Interface] Resume the OneNAND flash
2001  * @param mtd           MTD device structure
2002  */
2003 static void onenand_resume(struct mtd_info *mtd)
2004 {
2005         struct onenand_chip *this = mtd->priv;
2006
2007         if (this->state == FL_PM_SUSPENDED)
2008                 onenand_release_device(mtd);
2009         else
2010                 printk(KERN_ERR "resume() called for the chip which is not"
2011                                 "in suspended state\n");
2012 }
2013
2014 /**
2015  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2016  * @param mtd           MTD device structure
2017  * @param maxchips      Number of chips to scan for
2018  *
2019  * This fills out all the not initialized function pointers
2020  * with the defaults.
2021  * The flash ID is read and the mtd/chip structures are
2022  * filled with the appropriate values.
2023  */
2024 int onenand_scan(struct mtd_info *mtd, int maxchips)
2025 {
2026         struct onenand_chip *this = mtd->priv;
2027
2028         if (!this->read_word)
2029                 this->read_word = onenand_readw;
2030         if (!this->write_word)
2031                 this->write_word = onenand_writew;
2032
2033         if (!this->command)
2034                 this->command = onenand_command;
2035         if (!this->wait)
2036                 onenand_setup_wait(mtd);
2037
2038         if (!this->read_bufferram)
2039                 this->read_bufferram = onenand_read_bufferram;
2040         if (!this->write_bufferram)
2041                 this->write_bufferram = onenand_write_bufferram;
2042
2043         if (!this->block_markbad)
2044                 this->block_markbad = onenand_default_block_markbad;
2045         if (!this->scan_bbt)
2046                 this->scan_bbt = onenand_default_bbt;
2047
2048         if (onenand_probe(mtd))
2049                 return -ENXIO;
2050
2051         /* Set Sync. Burst Read after probing */
2052         if (this->mmcontrol) {
2053                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2054                 this->read_bufferram = onenand_sync_read_bufferram;
2055         }
2056
2057         /* Allocate buffers, if necessary */
2058         if (!this->page_buf) {
2059                 size_t len;
2060                 len = mtd->writesize + mtd->oobsize;
2061                 this->page_buf = kmalloc(len, GFP_KERNEL);
2062                 if (!this->page_buf) {
2063                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2064                         return -ENOMEM;
2065                 }
2066                 this->options |= ONENAND_PAGEBUF_ALLOC;
2067         }
2068
2069         this->state = FL_READY;
2070         init_waitqueue_head(&this->wq);
2071         spin_lock_init(&this->chip_lock);
2072
2073         /*
2074          * Allow subpage writes up to oobsize.
2075          */
2076         switch (mtd->oobsize) {
2077         case 64:
2078                 this->ecclayout = &onenand_oob_64;
2079                 mtd->subpage_sft = 2;
2080                 break;
2081
2082         case 32:
2083                 this->ecclayout = &onenand_oob_32;
2084                 mtd->subpage_sft = 1;
2085                 break;
2086
2087         default:
2088                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2089                         mtd->oobsize);
2090                 mtd->subpage_sft = 0;
2091                 /* To prevent kernel oops */
2092                 this->ecclayout = &onenand_oob_32;
2093                 break;
2094         }
2095
2096         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2097         mtd->ecclayout = this->ecclayout;
2098
2099         /* Fill in remaining MTD driver data */
2100         mtd->type = MTD_NANDFLASH;
2101         mtd->flags = MTD_CAP_NANDFLASH;
2102         mtd->ecctype = MTD_ECC_SW;
2103         mtd->erase = onenand_erase;
2104         mtd->point = NULL;
2105         mtd->unpoint = NULL;
2106         mtd->read = onenand_read;
2107         mtd->write = onenand_write;
2108         mtd->read_oob = onenand_read_oob;
2109         mtd->write_oob = onenand_write_oob;
2110 #ifdef CONFIG_MTD_ONENAND_OTP
2111         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2112         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2113         mtd->get_user_prot_info = onenand_get_user_prot_info;
2114         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2115         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2116         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2117 #endif
2118         mtd->sync = onenand_sync;
2119         mtd->lock = onenand_lock;
2120         mtd->unlock = onenand_unlock;
2121         mtd->suspend = onenand_suspend;
2122         mtd->resume = onenand_resume;
2123         mtd->block_isbad = onenand_block_isbad;
2124         mtd->block_markbad = onenand_block_markbad;
2125         mtd->owner = THIS_MODULE;
2126
2127         /* Unlock whole block */
2128         onenand_unlock_all(mtd);
2129
2130         return this->scan_bbt(mtd);
2131 }
2132
2133 /**
2134  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2135  * @param mtd           MTD device structure
2136  */
2137 void onenand_release(struct mtd_info *mtd)
2138 {
2139         struct onenand_chip *this = mtd->priv;
2140
2141 #ifdef CONFIG_MTD_PARTITIONS
2142         /* Deregister partitions */
2143         del_mtd_partitions (mtd);
2144 #endif
2145         /* Deregister the device */
2146         del_mtd_device (mtd);
2147
2148         /* Free bad block table memory, if allocated */
2149         if (this->bbm)
2150                 kfree(this->bbm);
2151         /* Buffer allocated by onenand_scan */
2152         if (this->options & ONENAND_PAGEBUF_ALLOC)
2153                 kfree(this->page_buf);
2154 }
2155
2156 EXPORT_SYMBOL_GPL(onenand_scan);
2157 EXPORT_SYMBOL_GPL(onenand_release);
2158
2159 MODULE_LICENSE("GPL");
2160 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2161 MODULE_DESCRIPTION("Generic OneNAND flash driver code");