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[MTD] OneNAND: Reduce internal BufferRAM operations
[net-next-2.6.git] / drivers / mtd / onenand / onenand_base.c
1 /*
2  *  linux/drivers/mtd/onenand/onenand_base.c
3  *
4  *  Copyright (C) 2005-2007 Samsung Electronics
5  *  Kyungmin Park <kyungmin.park@samsung.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/sched.h>
16 #include <linux/interrupt.h>
17 #include <linux/jiffies.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/onenand.h>
20 #include <linux/mtd/partitions.h>
21
22 #include <asm/io.h>
23
24 /**
25  * onenand_oob_64 - oob info for large (2KB) page
26  */
27 static struct nand_ecclayout onenand_oob_64 = {
28         .eccbytes       = 20,
29         .eccpos         = {
30                 8, 9, 10, 11, 12,
31                 24, 25, 26, 27, 28,
32                 40, 41, 42, 43, 44,
33                 56, 57, 58, 59, 60,
34                 },
35         .oobfree        = {
36                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
37                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
38         }
39 };
40
41 /**
42  * onenand_oob_32 - oob info for middle (1KB) page
43  */
44 static struct nand_ecclayout onenand_oob_32 = {
45         .eccbytes       = 10,
46         .eccpos         = {
47                 8, 9, 10, 11, 12,
48                 24, 25, 26, 27, 28,
49                 },
50         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
51 };
52
53 static const unsigned char ffchars[] = {
54         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
55         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
56         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
57         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
58         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
62 };
63
64 /**
65  * onenand_readw - [OneNAND Interface] Read OneNAND register
66  * @param addr          address to read
67  *
68  * Read OneNAND register
69  */
70 static unsigned short onenand_readw(void __iomem *addr)
71 {
72         return readw(addr);
73 }
74
75 /**
76  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
77  * @param value         value to write
78  * @param addr          address to write
79  *
80  * Write OneNAND register with value
81  */
82 static void onenand_writew(unsigned short value, void __iomem *addr)
83 {
84         writew(value, addr);
85 }
86
87 /**
88  * onenand_block_address - [DEFAULT] Get block address
89  * @param this          onenand chip data structure
90  * @param block         the block
91  * @return              translated block address if DDP, otherwise same
92  *
93  * Setup Start Address 1 Register (F100h)
94  */
95 static int onenand_block_address(struct onenand_chip *this, int block)
96 {
97         /* Device Flash Core select, NAND Flash Block Address */
98         if (block & this->density_mask)
99                 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
100
101         return block;
102 }
103
104 /**
105  * onenand_bufferram_address - [DEFAULT] Get bufferram address
106  * @param this          onenand chip data structure
107  * @param block         the block
108  * @return              set DBS value if DDP, otherwise 0
109  *
110  * Setup Start Address 2 Register (F101h) for DDP
111  */
112 static int onenand_bufferram_address(struct onenand_chip *this, int block)
113 {
114         /* Device BufferRAM Select */
115         if (block & this->density_mask)
116                 return ONENAND_DDP_CHIP1;
117
118         return ONENAND_DDP_CHIP0;
119 }
120
121 /**
122  * onenand_page_address - [DEFAULT] Get page address
123  * @param page          the page address
124  * @param sector        the sector address
125  * @return              combined page and sector address
126  *
127  * Setup Start Address 8 Register (F107h)
128  */
129 static int onenand_page_address(int page, int sector)
130 {
131         /* Flash Page Address, Flash Sector Address */
132         int fpa, fsa;
133
134         fpa = page & ONENAND_FPA_MASK;
135         fsa = sector & ONENAND_FSA_MASK;
136
137         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
138 }
139
140 /**
141  * onenand_buffer_address - [DEFAULT] Get buffer address
142  * @param dataram1      DataRAM index
143  * @param sectors       the sector address
144  * @param count         the number of sectors
145  * @return              the start buffer value
146  *
147  * Setup Start Buffer Register (F200h)
148  */
149 static int onenand_buffer_address(int dataram1, int sectors, int count)
150 {
151         int bsa, bsc;
152
153         /* BufferRAM Sector Address */
154         bsa = sectors & ONENAND_BSA_MASK;
155
156         if (dataram1)
157                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
158         else
159                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
160
161         /* BufferRAM Sector Count */
162         bsc = count & ONENAND_BSC_MASK;
163
164         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
165 }
166
167 /**
168  * onenand_command - [DEFAULT] Send command to OneNAND device
169  * @param mtd           MTD device structure
170  * @param cmd           the command to be sent
171  * @param addr          offset to read from or write to
172  * @param len           number of bytes to read or write
173  *
174  * Send command to OneNAND device. This function is used for middle/large page
175  * devices (1KB/2KB Bytes per page)
176  */
177 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
178 {
179         struct onenand_chip *this = mtd->priv;
180         int value, readcmd = 0, block_cmd = 0;
181         int block, page;
182
183         /* Address translation */
184         switch (cmd) {
185         case ONENAND_CMD_UNLOCK:
186         case ONENAND_CMD_LOCK:
187         case ONENAND_CMD_LOCK_TIGHT:
188         case ONENAND_CMD_UNLOCK_ALL:
189                 block = -1;
190                 page = -1;
191                 break;
192
193         case ONENAND_CMD_ERASE:
194         case ONENAND_CMD_BUFFERRAM:
195         case ONENAND_CMD_OTP_ACCESS:
196                 block_cmd = 1;
197                 block = (int) (addr >> this->erase_shift);
198                 page = -1;
199                 break;
200
201         default:
202                 block = (int) (addr >> this->erase_shift);
203                 page = (int) (addr >> this->page_shift);
204                 page &= this->page_mask;
205                 break;
206         }
207
208         /* NOTE: The setting order of the registers is very important! */
209         if (cmd == ONENAND_CMD_BUFFERRAM) {
210                 /* Select DataRAM for DDP */
211                 value = onenand_bufferram_address(this, block);
212                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
213
214                 /* Switch to the next data buffer */
215                 ONENAND_SET_NEXT_BUFFERRAM(this);
216
217                 return 0;
218         }
219
220         if (block != -1) {
221                 /* Write 'DFS, FBA' of Flash */
222                 value = onenand_block_address(this, block);
223                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
224
225                 if (block_cmd) {
226                         /* Select DataRAM for DDP */
227                         value = onenand_bufferram_address(this, block);
228                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
229                 }
230         }
231
232         if (page != -1) {
233                 /* Now we use page size operation */
234                 int sectors = 4, count = 4;
235                 int dataram;
236
237                 switch (cmd) {
238                 case ONENAND_CMD_READ:
239                 case ONENAND_CMD_READOOB:
240                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
241                         readcmd = 1;
242                         break;
243
244                 default:
245                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
246                         break;
247                 }
248
249                 /* Write 'FPA, FSA' of Flash */
250                 value = onenand_page_address(page, sectors);
251                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
252
253                 /* Write 'BSA, BSC' of DataRAM */
254                 value = onenand_buffer_address(dataram, sectors, count);
255                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
256
257                 if (readcmd) {
258                         /* Select DataRAM for DDP */
259                         value = onenand_bufferram_address(this, block);
260                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
261                 }
262         }
263
264         /* Interrupt clear */
265         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
266
267         /* Write command */
268         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
269
270         return 0;
271 }
272
273 /**
274  * onenand_wait - [DEFAULT] wait until the command is done
275  * @param mtd           MTD device structure
276  * @param state         state to select the max. timeout value
277  *
278  * Wait for command done. This applies to all OneNAND command
279  * Read can take up to 30us, erase up to 2ms and program up to 350us
280  * according to general OneNAND specs
281  */
282 static int onenand_wait(struct mtd_info *mtd, int state)
283 {
284         struct onenand_chip * this = mtd->priv;
285         unsigned long timeout;
286         unsigned int flags = ONENAND_INT_MASTER;
287         unsigned int interrupt = 0;
288         unsigned int ctrl;
289
290         /* The 20 msec is enough */
291         timeout = jiffies + msecs_to_jiffies(20);
292         while (time_before(jiffies, timeout)) {
293                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
294
295                 if (interrupt & flags)
296                         break;
297
298                 if (state != FL_READING)
299                         cond_resched();
300         }
301         /* To get correct interrupt status in timeout case */
302         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
303
304         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
305
306         if (ctrl & ONENAND_CTRL_ERROR) {
307                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
308                 if (ctrl & ONENAND_CTRL_LOCK)
309                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error.\n");
310                 return ctrl;
311         }
312
313         if (interrupt & ONENAND_INT_READ) {
314                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
315                 if (ecc) {
316                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
317                         if (ecc & ONENAND_ECC_2BIT_ALL) {
318                                 mtd->ecc_stats.failed++;
319                                 return ecc;
320                         } else if (ecc & ONENAND_ECC_1BIT_ALL)
321                                 mtd->ecc_stats.corrected++;
322                 }
323         } else if (state == FL_READING) {
324                 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
325                 return -EIO;
326         }
327
328         return 0;
329 }
330
331 /*
332  * onenand_interrupt - [DEFAULT] onenand interrupt handler
333  * @param irq           onenand interrupt number
334  * @param dev_id        interrupt data
335  *
336  * complete the work
337  */
338 static irqreturn_t onenand_interrupt(int irq, void *data)
339 {
340         struct onenand_chip *this = (struct onenand_chip *) data;
341
342         /* To handle shared interrupt */
343         if (!this->complete.done)
344                 complete(&this->complete);
345
346         return IRQ_HANDLED;
347 }
348
349 /*
350  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
351  * @param mtd           MTD device structure
352  * @param state         state to select the max. timeout value
353  *
354  * Wait for command done.
355  */
356 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
357 {
358         struct onenand_chip *this = mtd->priv;
359
360         wait_for_completion(&this->complete);
361
362         return onenand_wait(mtd, state);
363 }
364
365 /*
366  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
367  * @param mtd           MTD device structure
368  * @param state         state to select the max. timeout value
369  *
370  * Try interrupt based wait (It is used one-time)
371  */
372 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
373 {
374         struct onenand_chip *this = mtd->priv;
375         unsigned long remain, timeout;
376
377         /* We use interrupt wait first */
378         this->wait = onenand_interrupt_wait;
379
380         timeout = msecs_to_jiffies(100);
381         remain = wait_for_completion_timeout(&this->complete, timeout);
382         if (!remain) {
383                 printk(KERN_INFO "OneNAND: There's no interrupt. "
384                                 "We use the normal wait\n");
385
386                 /* Release the irq */
387                 free_irq(this->irq, this);
388
389                 this->wait = onenand_wait;
390         }
391
392         return onenand_wait(mtd, state);
393 }
394
395 /*
396  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
397  * @param mtd           MTD device structure
398  *
399  * There's two method to wait onenand work
400  * 1. polling - read interrupt status register
401  * 2. interrupt - use the kernel interrupt method
402  */
403 static void onenand_setup_wait(struct mtd_info *mtd)
404 {
405         struct onenand_chip *this = mtd->priv;
406         int syscfg;
407
408         init_completion(&this->complete);
409
410         if (this->irq <= 0) {
411                 this->wait = onenand_wait;
412                 return;
413         }
414
415         if (request_irq(this->irq, &onenand_interrupt,
416                                 IRQF_SHARED, "onenand", this)) {
417                 /* If we can't get irq, use the normal wait */
418                 this->wait = onenand_wait;
419                 return;
420         }
421
422         /* Enable interrupt */
423         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
424         syscfg |= ONENAND_SYS_CFG1_IOBE;
425         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
426
427         this->wait = onenand_try_interrupt_wait;
428 }
429
430 /**
431  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
432  * @param mtd           MTD data structure
433  * @param area          BufferRAM area
434  * @return              offset given area
435  *
436  * Return BufferRAM offset given area
437  */
438 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
439 {
440         struct onenand_chip *this = mtd->priv;
441
442         if (ONENAND_CURRENT_BUFFERRAM(this)) {
443                 if (area == ONENAND_DATARAM)
444                         return mtd->writesize;
445                 if (area == ONENAND_SPARERAM)
446                         return mtd->oobsize;
447         }
448
449         return 0;
450 }
451
452 /**
453  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
454  * @param mtd           MTD data structure
455  * @param area          BufferRAM area
456  * @param buffer        the databuffer to put/get data
457  * @param offset        offset to read from or write to
458  * @param count         number of bytes to read/write
459  *
460  * Read the BufferRAM area
461  */
462 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
463                 unsigned char *buffer, int offset, size_t count)
464 {
465         struct onenand_chip *this = mtd->priv;
466         void __iomem *bufferram;
467
468         bufferram = this->base + area;
469
470         bufferram += onenand_bufferram_offset(mtd, area);
471
472         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
473                 unsigned short word;
474
475                 /* Align with word(16-bit) size */
476                 count--;
477
478                 /* Read word and save byte */
479                 word = this->read_word(bufferram + offset + count);
480                 buffer[count] = (word & 0xff);
481         }
482
483         memcpy(buffer, bufferram + offset, count);
484
485         return 0;
486 }
487
488 /**
489  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
490  * @param mtd           MTD data structure
491  * @param area          BufferRAM area
492  * @param buffer        the databuffer to put/get data
493  * @param offset        offset to read from or write to
494  * @param count         number of bytes to read/write
495  *
496  * Read the BufferRAM area with Sync. Burst Mode
497  */
498 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
499                 unsigned char *buffer, int offset, size_t count)
500 {
501         struct onenand_chip *this = mtd->priv;
502         void __iomem *bufferram;
503
504         bufferram = this->base + area;
505
506         bufferram += onenand_bufferram_offset(mtd, area);
507
508         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
509
510         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
511                 unsigned short word;
512
513                 /* Align with word(16-bit) size */
514                 count--;
515
516                 /* Read word and save byte */
517                 word = this->read_word(bufferram + offset + count);
518                 buffer[count] = (word & 0xff);
519         }
520
521         memcpy(buffer, bufferram + offset, count);
522
523         this->mmcontrol(mtd, 0);
524
525         return 0;
526 }
527
528 /**
529  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
530  * @param mtd           MTD data structure
531  * @param area          BufferRAM area
532  * @param buffer        the databuffer to put/get data
533  * @param offset        offset to read from or write to
534  * @param count         number of bytes to read/write
535  *
536  * Write the BufferRAM area
537  */
538 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
539                 const unsigned char *buffer, int offset, size_t count)
540 {
541         struct onenand_chip *this = mtd->priv;
542         void __iomem *bufferram;
543
544         bufferram = this->base + area;
545
546         bufferram += onenand_bufferram_offset(mtd, area);
547
548         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
549                 unsigned short word;
550                 int byte_offset;
551
552                 /* Align with word(16-bit) size */
553                 count--;
554
555                 /* Calculate byte access offset */
556                 byte_offset = offset + count;
557
558                 /* Read word and save byte */
559                 word = this->read_word(bufferram + byte_offset);
560                 word = (word & ~0xff) | buffer[count];
561                 this->write_word(word, bufferram + byte_offset);
562         }
563
564         memcpy(bufferram + offset, buffer, count);
565
566         return 0;
567 }
568
569 /**
570  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
571  * @param mtd           MTD data structure
572  * @param addr          address to check
573  * @return              1 if there are valid data, otherwise 0
574  *
575  * Check bufferram if there is data we required
576  */
577 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
578 {
579         struct onenand_chip *this = mtd->priv;
580         int blockpage;
581         unsigned int i;
582
583         blockpage = (int) (addr >> this->page_shift);
584
585         /* Is there valid data? */
586         i = ONENAND_CURRENT_BUFFERRAM(this);
587         if (this->bufferram[i].blockpage == blockpage)
588                 return 1;
589
590         /* Check another BufferRAM */
591         i = ONENAND_NEXT_BUFFERRAM(this);
592         if (this->bufferram[i].blockpage == blockpage) {
593                 ONENAND_SET_NEXT_BUFFERRAM(this);
594                 return 1;
595         }
596
597         return 0;
598 }
599
600 /**
601  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
602  * @param mtd           MTD data structure
603  * @param addr          address to update
604  * @param valid         valid flag
605  *
606  * Update BufferRAM information
607  */
608 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
609                 int valid)
610 {
611         struct onenand_chip *this = mtd->priv;
612         int blockpage;
613         unsigned int i;
614
615         blockpage = (int) (addr >> this->page_shift);
616
617         /* Invalidate another BufferRAM */
618         i = ONENAND_NEXT_BUFFERRAM(this);
619         if (this->bufferram[i].blockpage == blockpage) {
620                 this->bufferram[i].blockpage = -1;
621
622         /* Update BufferRAM */
623         i = ONENAND_CURRENT_BUFFERRAM(this);
624         if (valid)
625                 this->bufferram[i].blockpage = blockpage;
626         else
627                 this->bufferram[i].blockpage = -1;
628 }
629
630 /**
631  * onenand_get_device - [GENERIC] Get chip for selected access
632  * @param mtd           MTD device structure
633  * @param new_state     the state which is requested
634  *
635  * Get the device and lock it for exclusive access
636  */
637 static int onenand_get_device(struct mtd_info *mtd, int new_state)
638 {
639         struct onenand_chip *this = mtd->priv;
640         DECLARE_WAITQUEUE(wait, current);
641
642         /*
643          * Grab the lock and see if the device is available
644          */
645         while (1) {
646                 spin_lock(&this->chip_lock);
647                 if (this->state == FL_READY) {
648                         this->state = new_state;
649                         spin_unlock(&this->chip_lock);
650                         break;
651                 }
652                 if (new_state == FL_PM_SUSPENDED) {
653                         spin_unlock(&this->chip_lock);
654                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
655                 }
656                 set_current_state(TASK_UNINTERRUPTIBLE);
657                 add_wait_queue(&this->wq, &wait);
658                 spin_unlock(&this->chip_lock);
659                 schedule();
660                 remove_wait_queue(&this->wq, &wait);
661         }
662
663         return 0;
664 }
665
666 /**
667  * onenand_release_device - [GENERIC] release chip
668  * @param mtd           MTD device structure
669  *
670  * Deselect, release chip lock and wake up anyone waiting on the device
671  */
672 static void onenand_release_device(struct mtd_info *mtd)
673 {
674         struct onenand_chip *this = mtd->priv;
675
676         /* Release the chip */
677         spin_lock(&this->chip_lock);
678         this->state = FL_READY;
679         wake_up(&this->wq);
680         spin_unlock(&this->chip_lock);
681 }
682
683 /**
684  * onenand_read - [MTD Interface] Read data from flash
685  * @param mtd           MTD device structure
686  * @param from          offset to read from
687  * @param len           number of bytes to read
688  * @param retlen        pointer to variable to store the number of read bytes
689  * @param buf           the databuffer to put data
690  *
691  * Read with ecc
692 */
693 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
694         size_t *retlen, u_char *buf)
695 {
696         struct onenand_chip *this = mtd->priv;
697         struct mtd_ecc_stats stats;
698         int read = 0, column;
699         int thislen;
700         int ret = 0, boundary = 0;
701
702         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
703
704         /* Do not allow reads past end of device */
705         if ((from + len) > mtd->size) {
706                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
707                 *retlen = 0;
708                 return -EINVAL;
709         }
710
711         /* Grab the lock and see if the device is available */
712         onenand_get_device(mtd, FL_READING);
713
714         stats = mtd->ecc_stats;
715
716         /* Read-while-load method */
717
718         /* Do first load to bufferRAM */
719         if (read < len) {
720                 if (!onenand_check_bufferram(mtd, from)) {
721                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
722                         ret = this->wait(mtd, FL_READING);
723                         onenand_update_bufferram(mtd, from, !ret);
724                 }
725         }
726
727         thislen = min_t(int, mtd->writesize, len - read);
728         column = from & (mtd->writesize - 1);
729         if (column + thislen > mtd->writesize)
730                 thislen = mtd->writesize - column;
731
732         while (!ret) {
733                 /* If there is more to load then start next load */
734                 from += thislen;
735                 if (read + thislen < len) {
736                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
737                         /*
738                          * Chip boundary handling in DDP
739                          * Now we issued chip 1 read and pointed chip 1
740                          * bufferam so we have to point chip 0 bufferam.
741                          */
742                         if (ONENAND_IS_DDP(this) &&
743                             unlikely(from == (this->chipsize >> 1))) {
744                                 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
745                                 boundary = 1;
746                         } else
747                                 boundary = 0;
748                         ONENAND_SET_PREV_BUFFERRAM(this);
749                 }
750                 /* While load is going, read from last bufferRAM */
751                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
752                 /* See if we are done */
753                 read += thislen;
754                 if (read == len)
755                         break;
756                 /* Set up for next read from bufferRAM */
757                 if (unlikely(boundary))
758                         this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
759                 ONENAND_SET_NEXT_BUFFERRAM(this);
760                 buf += thislen;
761                 thislen = min_t(int, mtd->writesize, len - read);
762                 column = 0;
763                 cond_resched();
764                 /* Now wait for load */
765                 ret = this->wait(mtd, FL_READING);
766                 onenand_update_bufferram(mtd, from, !ret);
767         }
768
769         /* Deselect and wake up anyone waiting on the device */
770         onenand_release_device(mtd);
771
772         /*
773          * Return success, if no ECC failures, else -EBADMSG
774          * fs driver will take care of that, because
775          * retlen == desired len and result == -EBADMSG
776          */
777         *retlen = read;
778
779         if (mtd->ecc_stats.failed - stats.failed)
780                 return -EBADMSG;
781
782         if (ret)
783                 return ret;
784
785         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
786 }
787
788 /**
789  * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
790  * @param mtd           MTD device structure
791  * @param buf           destination address
792  * @param column        oob offset to read from
793  * @param thislen       oob length to read
794  */
795 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
796                                 int thislen)
797 {
798         struct onenand_chip *this = mtd->priv;
799         struct nand_oobfree *free;
800         int readcol = column;
801         int readend = column + thislen;
802         int lastgap = 0;
803         uint8_t *oob_buf = this->page_buf + mtd->writesize;
804
805         for (free = this->ecclayout->oobfree; free->length; ++free) {
806                 if (readcol >= lastgap)
807                         readcol += free->offset - lastgap;
808                 if (readend >= lastgap)
809                         readend += free->offset - lastgap;
810                 lastgap = free->offset + free->length;
811         }
812         this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
813         for (free = this->ecclayout->oobfree; free->length; ++free) {
814                 int free_end = free->offset + free->length;
815                 if (free->offset < readend && free_end > readcol) {
816                         int st = max_t(int,free->offset,readcol);
817                         int ed = min_t(int,free_end,readend);
818                         int n = ed - st;
819                         memcpy(buf, oob_buf + st, n);
820                         buf += n;
821                 }
822         }
823         return 0;
824 }
825
826 /**
827  * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
828  * @param mtd           MTD device structure
829  * @param from          offset to read from
830  * @param len           number of bytes to read
831  * @param retlen        pointer to variable to store the number of read bytes
832  * @param buf           the databuffer to put data
833  * @param mode          operation mode
834  *
835  * OneNAND read out-of-band data from the spare area
836  */
837 int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
838                         size_t *retlen, u_char *buf, mtd_oob_mode_t mode)
839 {
840         struct onenand_chip *this = mtd->priv;
841         int read = 0, thislen, column, oobsize;
842         int ret = 0;
843
844         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
845
846         /* Initialize return length value */
847         *retlen = 0;
848
849         if (mode == MTD_OOB_AUTO)
850                 oobsize = this->ecclayout->oobavail;
851         else
852                 oobsize = mtd->oobsize;
853
854         column = from & (mtd->oobsize - 1);
855
856         if (unlikely(column >= oobsize)) {
857                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempted to start read outside oob\n");
858                 return -EINVAL;
859         }
860
861         /* Do not allow reads past end of device */
862         if (unlikely(from >= mtd->size ||
863                      column + len > ((mtd->size >> this->page_shift) -
864                                      (from >> this->page_shift)) * oobsize)) {
865                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempted to read beyond end of device\n");
866                 return -EINVAL;
867         }
868
869         /* Grab the lock and see if the device is available */
870         onenand_get_device(mtd, FL_READING);
871
872         while (read < len) {
873                 cond_resched();
874
875                 thislen = oobsize - column;
876                 thislen = min_t(int, thislen, len);
877
878                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
879
880                 onenand_update_bufferram(mtd, from, 0);
881
882                 ret = this->wait(mtd, FL_READING);
883                 /* First copy data and check return value for ECC handling */
884
885                 if (mode == MTD_OOB_AUTO)
886                         onenand_transfer_auto_oob(mtd, buf, column, thislen);
887                 else
888                         this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
889
890                 if (ret) {
891                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = 0x%x\n", ret);
892                         goto out;
893                 }
894
895                 read += thislen;
896
897                 if (read == len)
898                         break;
899
900                 buf += thislen;
901
902                 /* Read more? */
903                 if (read < len) {
904                         /* Page size */
905                         from += mtd->writesize;
906                         column = 0;
907                 }
908         }
909
910 out:
911         /* Deselect and wake up anyone waiting on the device */
912         onenand_release_device(mtd);
913
914         *retlen = read;
915         return ret;
916 }
917
918 /**
919  * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
920  * @mtd:        MTD device structure
921  * @from:       offset to read from
922  * @ops:        oob operation description structure
923  */
924 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
925                             struct mtd_oob_ops *ops)
926 {
927         switch (ops->mode) {
928         case MTD_OOB_PLACE:
929         case MTD_OOB_AUTO:
930                 break;
931         case MTD_OOB_RAW:
932                 /* Not implemented yet */
933         default:
934                 return -EINVAL;
935         }
936         return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
937                                    &ops->oobretlen, ops->oobbuf, ops->mode);
938 }
939
940 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
941 /**
942  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
943  * @param mtd           MTD device structure
944  * @param buf           the databuffer to verify
945  * @param to            offset to read from
946  *
947  */
948 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
949 {
950         struct onenand_chip *this = mtd->priv;
951         char *readp = this->page_buf + mtd->writesize;
952         int status, i;
953
954         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
955         onenand_update_bufferram(mtd, to, 0);
956         status = this->wait(mtd, FL_READING);
957         if (status)
958                 return status;
959
960         this->read_bufferram(mtd, ONENAND_SPARERAM, readp, 0, mtd->oobsize);
961         for(i = 0; i < mtd->oobsize; i++)
962                 if (buf[i] != 0xFF && buf[i] != readp[i])
963                         return -EBADMSG;
964
965         return 0;
966 }
967
968 /**
969  * onenand_verify - [GENERIC] verify the chip contents after a write
970  * @param mtd          MTD device structure
971  * @param buf          the databuffer to verify
972  * @param addr         offset to read from
973  * @param len          number of bytes to read and compare
974  *
975  */
976 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
977 {
978         struct onenand_chip *this = mtd->priv;
979         void __iomem *dataram;
980         int ret = 0;
981         int thislen, column;
982
983         while (len != 0) {
984                 thislen = min_t(int, mtd->writesize, len);
985                 column = addr & (mtd->writesize - 1);
986                 if (column + thislen > mtd->writesize)
987                         thislen = mtd->writesize - column;
988
989                 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
990
991                 onenand_update_bufferram(mtd, addr, 0);
992
993                 ret = this->wait(mtd, FL_READING);
994                 if (ret)
995                         return ret;
996
997                 onenand_update_bufferram(mtd, addr, 1);
998
999                 dataram = this->base + ONENAND_DATARAM;
1000                 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1001
1002                 if (memcmp(buf, dataram + column, thislen))
1003                         return -EBADMSG;
1004
1005                 len -= thislen;
1006                 buf += thislen;
1007                 addr += thislen;
1008         }
1009
1010         return 0;
1011 }
1012 #else
1013 #define onenand_verify(...)             (0)
1014 #define onenand_verify_oob(...)         (0)
1015 #endif
1016
1017 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
1018
1019 /**
1020  * onenand_write - [MTD Interface] write buffer to FLASH
1021  * @param mtd           MTD device structure
1022  * @param to            offset to write to
1023  * @param len           number of bytes to write
1024  * @param retlen        pointer to variable to store the number of written bytes
1025  * @param buf           the data to write
1026  *
1027  * Write with ECC
1028  */
1029 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1030         size_t *retlen, const u_char *buf)
1031 {
1032         struct onenand_chip *this = mtd->priv;
1033         int written = 0;
1034         int ret = 0;
1035         int column, subpage;
1036
1037         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1038
1039         /* Initialize retlen, in case of early exit */
1040         *retlen = 0;
1041
1042         /* Do not allow writes past end of device */
1043         if (unlikely((to + len) > mtd->size)) {
1044                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
1045                 return -EINVAL;
1046         }
1047
1048         /* Reject writes, which are not page aligned */
1049         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1050                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
1051                 return -EINVAL;
1052         }
1053
1054         column = to & (mtd->writesize - 1);
1055         subpage = column || (len & (mtd->writesize - 1));
1056
1057         /* Grab the lock and see if the device is available */
1058         onenand_get_device(mtd, FL_WRITING);
1059
1060         /* Loop until all data write */
1061         while (written < len) {
1062                 int bytes = mtd->writesize;
1063                 int thislen = min_t(int, bytes, len - written);
1064                 u_char *wbuf = (u_char *) buf;
1065
1066                 cond_resched();
1067
1068                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, bytes);
1069
1070                 /* Partial page write */
1071                 if (subpage) {
1072                         bytes = min_t(int, bytes - column, (int) len);
1073                         memset(this->page_buf, 0xff, mtd->writesize);
1074                         memcpy(this->page_buf + column, buf, bytes);
1075                         wbuf = this->page_buf;
1076                         /* Even though partial write, we need page size */
1077                         thislen = mtd->writesize;
1078                 }
1079
1080                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, thislen);
1081                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1082
1083                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1084
1085                 /* In partial page write we don't update bufferram */
1086                 onenand_update_bufferram(mtd, to, !subpage);
1087
1088                 ret = this->wait(mtd, FL_WRITING);
1089                 if (ret) {
1090                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
1091                         break;
1092                 }
1093
1094                 /* Only check verify write turn on */
1095                 ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen);
1096                 if (ret) {
1097                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
1098                         break;
1099                 }
1100
1101                 written += thislen;
1102
1103                 if (written == len)
1104                         break;
1105
1106                 column = 0;
1107                 to += thislen;
1108                 buf += thislen;
1109         }
1110
1111         /* Deselect and wake up anyone waiting on the device */
1112         onenand_release_device(mtd);
1113
1114         *retlen = written;
1115
1116         return ret;
1117 }
1118
1119 /**
1120  * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1121  * @param mtd           MTD device structure
1122  * @param oob_buf       oob buffer
1123  * @param buf           source address
1124  * @param column        oob offset to write to
1125  * @param thislen       oob length to write
1126  */
1127 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1128                                   const u_char *buf, int column, int thislen)
1129 {
1130         struct onenand_chip *this = mtd->priv;
1131         struct nand_oobfree *free;
1132         int writecol = column;
1133         int writeend = column + thislen;
1134         int lastgap = 0;
1135
1136         for (free = this->ecclayout->oobfree; free->length; ++free) {
1137                 if (writecol >= lastgap)
1138                         writecol += free->offset - lastgap;
1139                 if (writeend >= lastgap)
1140                         writeend += free->offset - lastgap;
1141                 lastgap = free->offset + free->length;
1142         }
1143         for (free = this->ecclayout->oobfree; free->length; ++free) {
1144                 int free_end = free->offset + free->length;
1145                 if (free->offset < writeend && free_end > writecol) {
1146                         int st = max_t(int,free->offset,writecol);
1147                         int ed = min_t(int,free_end,writeend);
1148                         int n = ed - st;
1149                         memcpy(oob_buf + st, buf, n);
1150                         buf += n;
1151                 }
1152         }
1153         return 0;
1154 }
1155
1156 /**
1157  * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1158  * @param mtd           MTD device structure
1159  * @param to            offset to write to
1160  * @param len           number of bytes to write
1161  * @param retlen        pointer to variable to store the number of written bytes
1162  * @param buf           the data to write
1163  * @param mode          operation mode
1164  *
1165  * OneNAND write out-of-band
1166  */
1167 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1168                                 size_t *retlen, const u_char *buf, mtd_oob_mode_t mode)
1169 {
1170         struct onenand_chip *this = mtd->priv;
1171         int column, ret = 0, oobsize;
1172         int written = 0;
1173
1174         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1175
1176         /* Initialize retlen, in case of early exit */
1177         *retlen = 0;
1178
1179         if (mode == MTD_OOB_AUTO)
1180                 oobsize = this->ecclayout->oobavail;
1181         else
1182                 oobsize = mtd->oobsize;
1183
1184         column = to & (mtd->oobsize - 1);
1185
1186         if (unlikely(column >= oobsize)) {
1187                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempted to start write outside oob\n");
1188                 return -EINVAL;
1189         }
1190
1191         /* Do not allow reads past end of device */
1192         if (unlikely(to >= mtd->size ||
1193                      column + len > ((mtd->size >> this->page_shift) -
1194                                      (to >> this->page_shift)) * oobsize)) {
1195                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempted to write past end of device\n");
1196                 return -EINVAL;
1197         }
1198
1199         /* Grab the lock and see if the device is available */
1200         onenand_get_device(mtd, FL_WRITING);
1201
1202         /* Loop until all data write */
1203         while (written < len) {
1204                 int thislen = min_t(int, oobsize, len - written);
1205
1206                 cond_resched();
1207
1208                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1209
1210                 /* We send data to spare ram with oobsize
1211                  * to prevent byte access */
1212                 memset(this->page_buf, 0xff, mtd->oobsize);
1213                 if (mode == MTD_OOB_AUTO)
1214                         onenand_fill_auto_oob(mtd, this->page_buf, buf, column, thislen);
1215                 else
1216                         memcpy(this->page_buf + column, buf, thislen);
1217                 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
1218
1219                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1220
1221                 onenand_update_bufferram(mtd, to, 0);
1222
1223                 ret = this->wait(mtd, FL_WRITING);
1224                 if (ret) {
1225                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write failed %d\n", ret);
1226                         goto out;
1227                 }
1228
1229                 ret = onenand_verify_oob(mtd, this->page_buf, to);
1230                 if (ret) {
1231                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
1232                         goto out;
1233                 }
1234
1235                 written += thislen;
1236
1237                 if (written == len)
1238                         break;
1239
1240                 to += mtd->writesize;
1241                 buf += thislen;
1242                 column = 0;
1243         }
1244
1245 out:
1246         /* Deselect and wake up anyone waiting on the device */
1247         onenand_release_device(mtd);
1248
1249         *retlen = written;
1250
1251         return ret;
1252 }
1253
1254 /**
1255  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1256  * @mtd:        MTD device structure
1257  * @from:       offset to read from
1258  * @ops:        oob operation description structure
1259  */
1260 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1261                              struct mtd_oob_ops *ops)
1262 {
1263         switch (ops->mode) {
1264         case MTD_OOB_PLACE:
1265         case MTD_OOB_AUTO:
1266                 break;
1267         case MTD_OOB_RAW:
1268                 /* Not implemented yet */
1269         default:
1270                 return -EINVAL;
1271         }
1272         return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1273                                     &ops->oobretlen, ops->oobbuf, ops->mode);
1274 }
1275
1276 /**
1277  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1278  * @param mtd           MTD device structure
1279  * @param ofs           offset from device start
1280  * @param getchip       0, if the chip is already selected
1281  * @param allowbbt      1, if its allowed to access the bbt area
1282  *
1283  * Check, if the block is bad. Either by reading the bad block table or
1284  * calling of the scan function.
1285  */
1286 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1287 {
1288         struct onenand_chip *this = mtd->priv;
1289         struct bbm_info *bbm = this->bbm;
1290
1291         /* Return info from the table */
1292         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1293 }
1294
1295 /**
1296  * onenand_erase - [MTD Interface] erase block(s)
1297  * @param mtd           MTD device structure
1298  * @param instr         erase instruction
1299  *
1300  * Erase one ore more blocks
1301  */
1302 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1303 {
1304         struct onenand_chip *this = mtd->priv;
1305         unsigned int block_size;
1306         loff_t addr;
1307         int len;
1308         int ret = 0;
1309
1310         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1311
1312         block_size = (1 << this->erase_shift);
1313
1314         /* Start address must align on block boundary */
1315         if (unlikely(instr->addr & (block_size - 1))) {
1316                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1317                 return -EINVAL;
1318         }
1319
1320         /* Length must align on block boundary */
1321         if (unlikely(instr->len & (block_size - 1))) {
1322                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1323                 return -EINVAL;
1324         }
1325
1326         /* Do not allow erase past end of device */
1327         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1328                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1329                 return -EINVAL;
1330         }
1331
1332         instr->fail_addr = 0xffffffff;
1333
1334         /* Grab the lock and see if the device is available */
1335         onenand_get_device(mtd, FL_ERASING);
1336
1337         /* Loop throught the pages */
1338         len = instr->len;
1339         addr = instr->addr;
1340
1341         instr->state = MTD_ERASING;
1342
1343         while (len) {
1344                 cond_resched();
1345
1346                 /* Check if we have a bad block, we do not erase bad blocks */
1347                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1348                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1349                         instr->state = MTD_ERASE_FAILED;
1350                         goto erase_exit;
1351                 }
1352
1353                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1354
1355                 ret = this->wait(mtd, FL_ERASING);
1356                 /* Check, if it is write protected */
1357                 if (ret) {
1358                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1359                         instr->state = MTD_ERASE_FAILED;
1360                         instr->fail_addr = addr;
1361                         goto erase_exit;
1362                 }
1363
1364                 len -= block_size;
1365                 addr += block_size;
1366         }
1367
1368         instr->state = MTD_ERASE_DONE;
1369
1370 erase_exit:
1371
1372         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1373         /* Do call back function */
1374         if (!ret)
1375                 mtd_erase_callback(instr);
1376
1377         /* Deselect and wake up anyone waiting on the device */
1378         onenand_release_device(mtd);
1379
1380         return ret;
1381 }
1382
1383 /**
1384  * onenand_sync - [MTD Interface] sync
1385  * @param mtd           MTD device structure
1386  *
1387  * Sync is actually a wait for chip ready function
1388  */
1389 static void onenand_sync(struct mtd_info *mtd)
1390 {
1391         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1392
1393         /* Grab the lock and see if the device is available */
1394         onenand_get_device(mtd, FL_SYNCING);
1395
1396         /* Release it and go back */
1397         onenand_release_device(mtd);
1398 }
1399
1400 /**
1401  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1402  * @param mtd           MTD device structure
1403  * @param ofs           offset relative to mtd start
1404  *
1405  * Check whether the block is bad
1406  */
1407 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1408 {
1409         /* Check for invalid offset */
1410         if (ofs > mtd->size)
1411                 return -EINVAL;
1412
1413         return onenand_block_checkbad(mtd, ofs, 1, 0);
1414 }
1415
1416 /**
1417  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1418  * @param mtd           MTD device structure
1419  * @param ofs           offset from device start
1420  *
1421  * This is the default implementation, which can be overridden by
1422  * a hardware specific driver.
1423  */
1424 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1425 {
1426         struct onenand_chip *this = mtd->priv;
1427         struct bbm_info *bbm = this->bbm;
1428         u_char buf[2] = {0, 0};
1429         size_t retlen;
1430         int block;
1431
1432         /* Get block number */
1433         block = ((int) ofs) >> bbm->bbt_erase_shift;
1434         if (bbm->bbt)
1435                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1436
1437         /* We write two bytes, so we dont have to mess with 16 bit access */
1438         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1439         return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf, MTD_OOB_PLACE);
1440 }
1441
1442 /**
1443  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1444  * @param mtd           MTD device structure
1445  * @param ofs           offset relative to mtd start
1446  *
1447  * Mark the block as bad
1448  */
1449 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1450 {
1451         struct onenand_chip *this = mtd->priv;
1452         int ret;
1453
1454         ret = onenand_block_isbad(mtd, ofs);
1455         if (ret) {
1456                 /* If it was bad already, return success and do nothing */
1457                 if (ret > 0)
1458                         return 0;
1459                 return ret;
1460         }
1461
1462         return this->block_markbad(mtd, ofs);
1463 }
1464
1465 /**
1466  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1467  * @param mtd           MTD device structure
1468  * @param ofs           offset relative to mtd start
1469  * @param len           number of bytes to lock or unlock
1470  *
1471  * Lock or unlock one or more blocks
1472  */
1473 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1474 {
1475         struct onenand_chip *this = mtd->priv;
1476         int start, end, block, value, status;
1477         int wp_status_mask;
1478
1479         start = ofs >> this->erase_shift;
1480         end = len >> this->erase_shift;
1481
1482         if (cmd == ONENAND_CMD_LOCK)
1483                 wp_status_mask = ONENAND_WP_LS;
1484         else
1485                 wp_status_mask = ONENAND_WP_US;
1486
1487         /* Continuous lock scheme */
1488         if (this->options & ONENAND_HAS_CONT_LOCK) {
1489                 /* Set start block address */
1490                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1491                 /* Set end block address */
1492                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1493                 /* Write lock command */
1494                 this->command(mtd, cmd, 0, 0);
1495
1496                 /* There's no return value */
1497                 this->wait(mtd, FL_LOCKING);
1498
1499                 /* Sanity check */
1500                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1501                     & ONENAND_CTRL_ONGO)
1502                         continue;
1503
1504                 /* Check lock status */
1505                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1506                 if (!(status & wp_status_mask))
1507                         printk(KERN_ERR "wp status = 0x%x\n", status);
1508
1509                 return 0;
1510         }
1511
1512         /* Block lock scheme */
1513         for (block = start; block < start + end; block++) {
1514                 /* Set block address */
1515                 value = onenand_block_address(this, block);
1516                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1517                 /* Select DataRAM for DDP */
1518                 value = onenand_bufferram_address(this, block);
1519                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1520                 /* Set start block address */
1521                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1522                 /* Write lock command */
1523                 this->command(mtd, cmd, 0, 0);
1524
1525                 /* There's no return value */
1526                 this->wait(mtd, FL_LOCKING);
1527
1528                 /* Sanity check */
1529                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1530                     & ONENAND_CTRL_ONGO)
1531                         continue;
1532
1533                 /* Check lock status */
1534                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1535                 if (!(status & wp_status_mask))
1536                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1537         }
1538
1539         return 0;
1540 }
1541
1542 /**
1543  * onenand_lock - [MTD Interface] Lock block(s)
1544  * @param mtd           MTD device structure
1545  * @param ofs           offset relative to mtd start
1546  * @param len           number of bytes to unlock
1547  *
1548  * Lock one or more blocks
1549  */
1550 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1551 {
1552         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1553 }
1554
1555 /**
1556  * onenand_unlock - [MTD Interface] Unlock block(s)
1557  * @param mtd           MTD device structure
1558  * @param ofs           offset relative to mtd start
1559  * @param len           number of bytes to unlock
1560  *
1561  * Unlock one or more blocks
1562  */
1563 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1564 {
1565         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1566 }
1567
1568 /**
1569  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1570  * @param this          onenand chip data structure
1571  *
1572  * Check lock status
1573  */
1574 static void onenand_check_lock_status(struct onenand_chip *this)
1575 {
1576         unsigned int value, block, status;
1577         unsigned int end;
1578
1579         end = this->chipsize >> this->erase_shift;
1580         for (block = 0; block < end; block++) {
1581                 /* Set block address */
1582                 value = onenand_block_address(this, block);
1583                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1584                 /* Select DataRAM for DDP */
1585                 value = onenand_bufferram_address(this, block);
1586                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1587                 /* Set start block address */
1588                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1589
1590                 /* Check lock status */
1591                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1592                 if (!(status & ONENAND_WP_US))
1593                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1594         }
1595 }
1596
1597 /**
1598  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1599  * @param mtd           MTD device structure
1600  *
1601  * Unlock all blocks
1602  */
1603 static int onenand_unlock_all(struct mtd_info *mtd)
1604 {
1605         struct onenand_chip *this = mtd->priv;
1606
1607         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1608                 /* Set start block address */
1609                 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1610                 /* Write unlock command */
1611                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1612
1613                 /* There's no return value */
1614                 this->wait(mtd, FL_LOCKING);
1615
1616                 /* Sanity check */
1617                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1618                     & ONENAND_CTRL_ONGO)
1619                         continue;
1620
1621                 /* Workaround for all block unlock in DDP */
1622                 if (ONENAND_IS_DDP(this)) {
1623                         /* 1st block on another chip */
1624                         loff_t ofs = this->chipsize >> 1;
1625                         size_t len = mtd->erasesize;
1626
1627                         onenand_unlock(mtd, ofs, len);
1628                 }
1629
1630                 onenand_check_lock_status(this);
1631
1632                 return 0;
1633         }
1634
1635         onenand_unlock(mtd, 0x0, this->chipsize);
1636
1637         return 0;
1638 }
1639
1640 #ifdef CONFIG_MTD_ONENAND_OTP
1641
1642 /* Interal OTP operation */
1643 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1644                 size_t *retlen, u_char *buf);
1645
1646 /**
1647  * do_otp_read - [DEFAULT] Read OTP block area
1648  * @param mtd           MTD device structure
1649  * @param from          The offset to read
1650  * @param len           number of bytes to read
1651  * @param retlen        pointer to variable to store the number of readbytes
1652  * @param buf           the databuffer to put/get data
1653  *
1654  * Read OTP block area.
1655  */
1656 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1657                 size_t *retlen, u_char *buf)
1658 {
1659         struct onenand_chip *this = mtd->priv;
1660         int ret;
1661
1662         /* Enter OTP access mode */
1663         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1664         this->wait(mtd, FL_OTPING);
1665
1666         ret = mtd->read(mtd, from, len, retlen, buf);
1667
1668         /* Exit OTP access mode */
1669         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1670         this->wait(mtd, FL_RESETING);
1671
1672         return ret;
1673 }
1674
1675 /**
1676  * do_otp_write - [DEFAULT] Write OTP block area
1677  * @param mtd           MTD device structure
1678  * @param from          The offset to write
1679  * @param len           number of bytes to write
1680  * @param retlen        pointer to variable to store the number of write bytes
1681  * @param buf           the databuffer to put/get data
1682  *
1683  * Write OTP block area.
1684  */
1685 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1686                 size_t *retlen, u_char *buf)
1687 {
1688         struct onenand_chip *this = mtd->priv;
1689         unsigned char *pbuf = buf;
1690         int ret;
1691
1692         /* Force buffer page aligned */
1693         if (len < mtd->writesize) {
1694                 memcpy(this->page_buf, buf, len);
1695                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1696                 pbuf = this->page_buf;
1697                 len = mtd->writesize;
1698         }
1699
1700         /* Enter OTP access mode */
1701         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1702         this->wait(mtd, FL_OTPING);
1703
1704         ret = mtd->write(mtd, from, len, retlen, pbuf);
1705
1706         /* Exit OTP access mode */
1707         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1708         this->wait(mtd, FL_RESETING);
1709
1710         return ret;
1711 }
1712
1713 /**
1714  * do_otp_lock - [DEFAULT] Lock OTP block area
1715  * @param mtd           MTD device structure
1716  * @param from          The offset to lock
1717  * @param len           number of bytes to lock
1718  * @param retlen        pointer to variable to store the number of lock bytes
1719  * @param buf           the databuffer to put/get data
1720  *
1721  * Lock OTP block area.
1722  */
1723 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1724                 size_t *retlen, u_char *buf)
1725 {
1726         struct onenand_chip *this = mtd->priv;
1727         int ret;
1728
1729         /* Enter OTP access mode */
1730         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1731         this->wait(mtd, FL_OTPING);
1732
1733         ret = onenand_do_write_oob(mtd, from, len, retlen, buf, MTD_OOB_PLACE);
1734
1735         /* Exit OTP access mode */
1736         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1737         this->wait(mtd, FL_RESETING);
1738
1739         return ret;
1740 }
1741
1742 /**
1743  * onenand_otp_walk - [DEFAULT] Handle OTP operation
1744  * @param mtd           MTD device structure
1745  * @param from          The offset to read/write
1746  * @param len           number of bytes to read/write
1747  * @param retlen        pointer to variable to store the number of read bytes
1748  * @param buf           the databuffer to put/get data
1749  * @param action        do given action
1750  * @param mode          specify user and factory
1751  *
1752  * Handle OTP operation.
1753  */
1754 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1755                         size_t *retlen, u_char *buf,
1756                         otp_op_t action, int mode)
1757 {
1758         struct onenand_chip *this = mtd->priv;
1759         int otp_pages;
1760         int density;
1761         int ret = 0;
1762
1763         *retlen = 0;
1764
1765         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1766         if (density < ONENAND_DEVICE_DENSITY_512Mb)
1767                 otp_pages = 20;
1768         else
1769                 otp_pages = 10;
1770
1771         if (mode == MTD_OTP_FACTORY) {
1772                 from += mtd->writesize * otp_pages;
1773                 otp_pages = 64 - otp_pages;
1774         }
1775
1776         /* Check User/Factory boundary */
1777         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1778                 return 0;
1779
1780         while (len > 0 && otp_pages > 0) {
1781                 if (!action) {  /* OTP Info functions */
1782                         struct otp_info *otpinfo;
1783
1784                         len -= sizeof(struct otp_info);
1785                         if (len <= 0)
1786                                 return -ENOSPC;
1787
1788                         otpinfo = (struct otp_info *) buf;
1789                         otpinfo->start = from;
1790                         otpinfo->length = mtd->writesize;
1791                         otpinfo->locked = 0;
1792
1793                         from += mtd->writesize;
1794                         buf += sizeof(struct otp_info);
1795                         *retlen += sizeof(struct otp_info);
1796                 } else {
1797                         size_t tmp_retlen;
1798                         int size = len;
1799
1800                         ret = action(mtd, from, len, &tmp_retlen, buf);
1801
1802                         buf += size;
1803                         len -= size;
1804                         *retlen += size;
1805
1806                         if (ret < 0)
1807                                 return ret;
1808                 }
1809                 otp_pages--;
1810         }
1811
1812         return 0;
1813 }
1814
1815 /**
1816  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1817  * @param mtd           MTD device structure
1818  * @param buf           the databuffer to put/get data
1819  * @param len           number of bytes to read
1820  *
1821  * Read factory OTP info.
1822  */
1823 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1824                         struct otp_info *buf, size_t len)
1825 {
1826         size_t retlen;
1827         int ret;
1828
1829         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1830
1831         return ret ? : retlen;
1832 }
1833
1834 /**
1835  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1836  * @param mtd           MTD device structure
1837  * @param from          The offset to read
1838  * @param len           number of bytes to read
1839  * @param retlen        pointer to variable to store the number of read bytes
1840  * @param buf           the databuffer to put/get data
1841  *
1842  * Read factory OTP area.
1843  */
1844 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1845                         size_t len, size_t *retlen, u_char *buf)
1846 {
1847         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1848 }
1849
1850 /**
1851  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1852  * @param mtd           MTD device structure
1853  * @param buf           the databuffer to put/get data
1854  * @param len           number of bytes to read
1855  *
1856  * Read user OTP info.
1857  */
1858 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1859                         struct otp_info *buf, size_t len)
1860 {
1861         size_t retlen;
1862         int ret;
1863
1864         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1865
1866         return ret ? : retlen;
1867 }
1868
1869 /**
1870  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1871  * @param mtd           MTD device structure
1872  * @param from          The offset to read
1873  * @param len           number of bytes to read
1874  * @param retlen        pointer to variable to store the number of read bytes
1875  * @param buf           the databuffer to put/get data
1876  *
1877  * Read user OTP area.
1878  */
1879 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1880                         size_t len, size_t *retlen, u_char *buf)
1881 {
1882         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1883 }
1884
1885 /**
1886  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1887  * @param mtd           MTD device structure
1888  * @param from          The offset to write
1889  * @param len           number of bytes to write
1890  * @param retlen        pointer to variable to store the number of write bytes
1891  * @param buf           the databuffer to put/get data
1892  *
1893  * Write user OTP area.
1894  */
1895 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1896                         size_t len, size_t *retlen, u_char *buf)
1897 {
1898         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1899 }
1900
1901 /**
1902  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1903  * @param mtd           MTD device structure
1904  * @param from          The offset to lock
1905  * @param len           number of bytes to unlock
1906  *
1907  * Write lock mark on spare area in page 0 in OTP block
1908  */
1909 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1910                         size_t len)
1911 {
1912         unsigned char oob_buf[64];
1913         size_t retlen;
1914         int ret;
1915
1916         memset(oob_buf, 0xff, mtd->oobsize);
1917         /*
1918          * Note: OTP lock operation
1919          *       OTP block : 0xXXFC
1920          *       1st block : 0xXXF3 (If chip support)
1921          *       Both      : 0xXXF0 (If chip support)
1922          */
1923         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1924
1925         /*
1926          * Write lock mark to 8th word of sector0 of page0 of the spare0.
1927          * We write 16 bytes spare area instead of 2 bytes.
1928          */
1929         from = 0;
1930         len = 16;
1931
1932         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1933
1934         return ret ? : retlen;
1935 }
1936 #endif  /* CONFIG_MTD_ONENAND_OTP */
1937
1938 /**
1939  * onenand_check_features - Check and set OneNAND features
1940  * @param mtd           MTD data structure
1941  *
1942  * Check and set OneNAND features
1943  * - lock scheme
1944  */
1945 static void onenand_check_features(struct mtd_info *mtd)
1946 {
1947         struct onenand_chip *this = mtd->priv;
1948         unsigned int density, process;
1949
1950         /* Lock scheme depends on density and process */
1951         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1952         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
1953
1954         /* Lock scheme */
1955         if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
1956                 /* A-Die has all block unlock */
1957                 if (process) {
1958                         printk(KERN_DEBUG "Chip support all block unlock\n");
1959                         this->options |= ONENAND_HAS_UNLOCK_ALL;
1960                 }
1961         } else {
1962                 /* Some OneNAND has continues lock scheme */
1963                 if (!process) {
1964                         printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
1965                         this->options |= ONENAND_HAS_CONT_LOCK;
1966                 }
1967         }
1968 }
1969
1970 /**
1971  * onenand_print_device_info - Print device ID
1972  * @param device        device ID
1973  *
1974  * Print device ID
1975  */
1976 static void onenand_print_device_info(int device, int version)
1977 {
1978         int vcc, demuxed, ddp, density;
1979
1980         vcc = device & ONENAND_DEVICE_VCC_MASK;
1981         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1982         ddp = device & ONENAND_DEVICE_IS_DDP;
1983         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1984         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1985                 demuxed ? "" : "Muxed ",
1986                 ddp ? "(DDP)" : "",
1987                 (16 << density),
1988                 vcc ? "2.65/3.3" : "1.8",
1989                 device);
1990         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
1991 }
1992
1993 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1994         {ONENAND_MFR_SAMSUNG, "Samsung"},
1995 };
1996
1997 /**
1998  * onenand_check_maf - Check manufacturer ID
1999  * @param manuf         manufacturer ID
2000  *
2001  * Check manufacturer ID
2002  */
2003 static int onenand_check_maf(int manuf)
2004 {
2005         int size = ARRAY_SIZE(onenand_manuf_ids);
2006         char *name;
2007         int i;
2008
2009         for (i = 0; i < size; i++)
2010                 if (manuf == onenand_manuf_ids[i].id)
2011                         break;
2012
2013         if (i < size)
2014                 name = onenand_manuf_ids[i].name;
2015         else
2016                 name = "Unknown";
2017
2018         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2019
2020         return (i == size);
2021 }
2022
2023 /**
2024  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2025  * @param mtd           MTD device structure
2026  *
2027  * OneNAND detection method:
2028  *   Compare the the values from command with ones from register
2029  */
2030 static int onenand_probe(struct mtd_info *mtd)
2031 {
2032         struct onenand_chip *this = mtd->priv;
2033         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2034         int density;
2035         int syscfg;
2036
2037         /* Save system configuration 1 */
2038         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2039         /* Clear Sync. Burst Read mode to read BootRAM */
2040         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2041
2042         /* Send the command for reading device ID from BootRAM */
2043         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2044
2045         /* Read manufacturer and device IDs from BootRAM */
2046         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2047         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2048
2049         /* Reset OneNAND to read default register values */
2050         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2051         /* Wait reset */
2052         this->wait(mtd, FL_RESETING);
2053
2054         /* Restore system configuration 1 */
2055         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2056
2057         /* Check manufacturer ID */
2058         if (onenand_check_maf(bram_maf_id))
2059                 return -ENXIO;
2060
2061         /* Read manufacturer and device IDs from Register */
2062         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2063         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2064         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2065
2066         /* Check OneNAND device */
2067         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2068                 return -ENXIO;
2069
2070         /* Flash device information */
2071         onenand_print_device_info(dev_id, ver_id);
2072         this->device_id = dev_id;
2073         this->version_id = ver_id;
2074
2075         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2076         this->chipsize = (16 << density) << 20;
2077         /* Set density mask. it is used for DDP */
2078         if (ONENAND_IS_DDP(this))
2079                 this->density_mask = (1 << (density + 6));
2080         else
2081                 this->density_mask = 0;
2082
2083         /* OneNAND page size & block size */
2084         /* The data buffer size is equal to page size */
2085         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2086         mtd->oobsize = mtd->writesize >> 5;
2087         /* Pages per a block are always 64 in OneNAND */
2088         mtd->erasesize = mtd->writesize << 6;
2089
2090         this->erase_shift = ffs(mtd->erasesize) - 1;
2091         this->page_shift = ffs(mtd->writesize) - 1;
2092         this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2093
2094         /* REVIST: Multichip handling */
2095
2096         mtd->size = this->chipsize;
2097
2098         /* Check OneNAND features */
2099         onenand_check_features(mtd);
2100
2101         return 0;
2102 }
2103
2104 /**
2105  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2106  * @param mtd           MTD device structure
2107  */
2108 static int onenand_suspend(struct mtd_info *mtd)
2109 {
2110         return onenand_get_device(mtd, FL_PM_SUSPENDED);
2111 }
2112
2113 /**
2114  * onenand_resume - [MTD Interface] Resume the OneNAND flash
2115  * @param mtd           MTD device structure
2116  */
2117 static void onenand_resume(struct mtd_info *mtd)
2118 {
2119         struct onenand_chip *this = mtd->priv;
2120
2121         if (this->state == FL_PM_SUSPENDED)
2122                 onenand_release_device(mtd);
2123         else
2124                 printk(KERN_ERR "resume() called for the chip which is not"
2125                                 "in suspended state\n");
2126 }
2127
2128 /**
2129  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2130  * @param mtd           MTD device structure
2131  * @param maxchips      Number of chips to scan for
2132  *
2133  * This fills out all the not initialized function pointers
2134  * with the defaults.
2135  * The flash ID is read and the mtd/chip structures are
2136  * filled with the appropriate values.
2137  */
2138 int onenand_scan(struct mtd_info *mtd, int maxchips)
2139 {
2140         int i;
2141         struct onenand_chip *this = mtd->priv;
2142
2143         if (!this->read_word)
2144                 this->read_word = onenand_readw;
2145         if (!this->write_word)
2146                 this->write_word = onenand_writew;
2147
2148         if (!this->command)
2149                 this->command = onenand_command;
2150         if (!this->wait)
2151                 onenand_setup_wait(mtd);
2152
2153         if (!this->read_bufferram)
2154                 this->read_bufferram = onenand_read_bufferram;
2155         if (!this->write_bufferram)
2156                 this->write_bufferram = onenand_write_bufferram;
2157
2158         if (!this->block_markbad)
2159                 this->block_markbad = onenand_default_block_markbad;
2160         if (!this->scan_bbt)
2161                 this->scan_bbt = onenand_default_bbt;
2162
2163         if (onenand_probe(mtd))
2164                 return -ENXIO;
2165
2166         /* Set Sync. Burst Read after probing */
2167         if (this->mmcontrol) {
2168                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2169                 this->read_bufferram = onenand_sync_read_bufferram;
2170         }
2171
2172         /* Allocate buffers, if necessary */
2173         if (!this->page_buf) {
2174                 size_t len;
2175                 len = mtd->writesize + mtd->oobsize;
2176                 this->page_buf = kmalloc(len, GFP_KERNEL);
2177                 if (!this->page_buf) {
2178                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2179                         return -ENOMEM;
2180                 }
2181                 this->options |= ONENAND_PAGEBUF_ALLOC;
2182         }
2183
2184         this->state = FL_READY;
2185         init_waitqueue_head(&this->wq);
2186         spin_lock_init(&this->chip_lock);
2187
2188         /*
2189          * Allow subpage writes up to oobsize.
2190          */
2191         switch (mtd->oobsize) {
2192         case 64:
2193                 this->ecclayout = &onenand_oob_64;
2194                 mtd->subpage_sft = 2;
2195                 break;
2196
2197         case 32:
2198                 this->ecclayout = &onenand_oob_32;
2199                 mtd->subpage_sft = 1;
2200                 break;
2201
2202         default:
2203                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2204                         mtd->oobsize);
2205                 mtd->subpage_sft = 0;
2206                 /* To prevent kernel oops */
2207                 this->ecclayout = &onenand_oob_32;
2208                 break;
2209         }
2210
2211         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2212
2213         /*
2214          * The number of bytes available for a client to place data into
2215          * the out of band area
2216          */
2217         this->ecclayout->oobavail = 0;
2218         for (i = 0; this->ecclayout->oobfree[i].length; i++)
2219                 this->ecclayout->oobavail +=
2220                         this->ecclayout->oobfree[i].length;
2221
2222         mtd->ecclayout = this->ecclayout;
2223
2224         /* Fill in remaining MTD driver data */
2225         mtd->type = MTD_NANDFLASH;
2226         mtd->flags = MTD_CAP_NANDFLASH;
2227         mtd->ecctype = MTD_ECC_SW;
2228         mtd->erase = onenand_erase;
2229         mtd->point = NULL;
2230         mtd->unpoint = NULL;
2231         mtd->read = onenand_read;
2232         mtd->write = onenand_write;
2233         mtd->read_oob = onenand_read_oob;
2234         mtd->write_oob = onenand_write_oob;
2235 #ifdef CONFIG_MTD_ONENAND_OTP
2236         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2237         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2238         mtd->get_user_prot_info = onenand_get_user_prot_info;
2239         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2240         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2241         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2242 #endif
2243         mtd->sync = onenand_sync;
2244         mtd->lock = onenand_lock;
2245         mtd->unlock = onenand_unlock;
2246         mtd->suspend = onenand_suspend;
2247         mtd->resume = onenand_resume;
2248         mtd->block_isbad = onenand_block_isbad;
2249         mtd->block_markbad = onenand_block_markbad;
2250         mtd->owner = THIS_MODULE;
2251
2252         /* Unlock whole block */
2253         onenand_unlock_all(mtd);
2254
2255         return this->scan_bbt(mtd);
2256 }
2257
2258 /**
2259  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2260  * @param mtd           MTD device structure
2261  */
2262 void onenand_release(struct mtd_info *mtd)
2263 {
2264         struct onenand_chip *this = mtd->priv;
2265
2266 #ifdef CONFIG_MTD_PARTITIONS
2267         /* Deregister partitions */
2268         del_mtd_partitions (mtd);
2269 #endif
2270         /* Deregister the device */
2271         del_mtd_device (mtd);
2272
2273         /* Free bad block table memory, if allocated */
2274         if (this->bbm) {
2275                 struct bbm_info *bbm = this->bbm;
2276                 kfree(bbm->bbt);
2277                 kfree(this->bbm);
2278         }
2279         /* Buffer allocated by onenand_scan */
2280         if (this->options & ONENAND_PAGEBUF_ALLOC)
2281                 kfree(this->page_buf);
2282 }
2283
2284 EXPORT_SYMBOL_GPL(onenand_scan);
2285 EXPORT_SYMBOL_GPL(onenand_release);
2286
2287 MODULE_LICENSE("GPL");
2288 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2289 MODULE_DESCRIPTION("Generic OneNAND flash driver code");