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1 /*
2  *  linux/drivers/mtd/onenand/onenand_base.c
3  *
4  *  Copyright (C) 2005-2006 Samsung Electronics
5  *  Kyungmin Park <kyungmin.park@samsung.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/sched.h>
16 #include <linux/interrupt.h>
17 #include <linux/jiffies.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/onenand.h>
20 #include <linux/mtd/partitions.h>
21
22 #include <asm/io.h>
23
24 /**
25  * onenand_oob_64 - oob info for large (2KB) page
26  */
27 static struct nand_ecclayout onenand_oob_64 = {
28         .eccbytes       = 20,
29         .eccpos         = {
30                 8, 9, 10, 11, 12,
31                 24, 25, 26, 27, 28,
32                 40, 41, 42, 43, 44,
33                 56, 57, 58, 59, 60,
34                 },
35         .oobfree        = {
36                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
37                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
38         }
39 };
40
41 /**
42  * onenand_oob_32 - oob info for middle (1KB) page
43  */
44 static struct nand_ecclayout onenand_oob_32 = {
45         .eccbytes       = 10,
46         .eccpos         = {
47                 8, 9, 10, 11, 12,
48                 24, 25, 26, 27, 28,
49                 },
50         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
51 };
52
53 static const unsigned char ffchars[] = {
54         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
55         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
56         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
57         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
58         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
62 };
63
64 /**
65  * onenand_readw - [OneNAND Interface] Read OneNAND register
66  * @param addr          address to read
67  *
68  * Read OneNAND register
69  */
70 static unsigned short onenand_readw(void __iomem *addr)
71 {
72         return readw(addr);
73 }
74
75 /**
76  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
77  * @param value         value to write
78  * @param addr          address to write
79  *
80  * Write OneNAND register with value
81  */
82 static void onenand_writew(unsigned short value, void __iomem *addr)
83 {
84         writew(value, addr);
85 }
86
87 /**
88  * onenand_block_address - [DEFAULT] Get block address
89  * @param this          onenand chip data structure
90  * @param block         the block
91  * @return              translated block address if DDP, otherwise same
92  *
93  * Setup Start Address 1 Register (F100h)
94  */
95 static int onenand_block_address(struct onenand_chip *this, int block)
96 {
97         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
98                 /* Device Flash Core select, NAND Flash Block Address */
99                 int dfs = 0;
100
101                 if (block & this->density_mask)
102                         dfs = 1;
103
104                 return (dfs << ONENAND_DDP_SHIFT) |
105                         (block & (this->density_mask - 1));
106         }
107
108         return block;
109 }
110
111 /**
112  * onenand_bufferram_address - [DEFAULT] Get bufferram address
113  * @param this          onenand chip data structure
114  * @param block         the block
115  * @return              set DBS value if DDP, otherwise 0
116  *
117  * Setup Start Address 2 Register (F101h) for DDP
118  */
119 static int onenand_bufferram_address(struct onenand_chip *this, int block)
120 {
121         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
122                 /* Device BufferRAM Select */
123                 int dbs = 0;
124
125                 if (block & this->density_mask)
126                         dbs = 1;
127
128                 return (dbs << ONENAND_DDP_SHIFT);
129         }
130
131         return 0;
132 }
133
134 /**
135  * onenand_page_address - [DEFAULT] Get page address
136  * @param page          the page address
137  * @param sector        the sector address
138  * @return              combined page and sector address
139  *
140  * Setup Start Address 8 Register (F107h)
141  */
142 static int onenand_page_address(int page, int sector)
143 {
144         /* Flash Page Address, Flash Sector Address */
145         int fpa, fsa;
146
147         fpa = page & ONENAND_FPA_MASK;
148         fsa = sector & ONENAND_FSA_MASK;
149
150         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
151 }
152
153 /**
154  * onenand_buffer_address - [DEFAULT] Get buffer address
155  * @param dataram1      DataRAM index
156  * @param sectors       the sector address
157  * @param count         the number of sectors
158  * @return              the start buffer value
159  *
160  * Setup Start Buffer Register (F200h)
161  */
162 static int onenand_buffer_address(int dataram1, int sectors, int count)
163 {
164         int bsa, bsc;
165
166         /* BufferRAM Sector Address */
167         bsa = sectors & ONENAND_BSA_MASK;
168
169         if (dataram1)
170                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
171         else
172                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
173
174         /* BufferRAM Sector Count */
175         bsc = count & ONENAND_BSC_MASK;
176
177         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
178 }
179
180 /**
181  * onenand_command - [DEFAULT] Send command to OneNAND device
182  * @param mtd           MTD device structure
183  * @param cmd           the command to be sent
184  * @param addr          offset to read from or write to
185  * @param len           number of bytes to read or write
186  *
187  * Send command to OneNAND device. This function is used for middle/large page
188  * devices (1KB/2KB Bytes per page)
189  */
190 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
191 {
192         struct onenand_chip *this = mtd->priv;
193         int value, readcmd = 0, block_cmd = 0;
194         int block, page;
195         /* Now we use page size operation */
196         int sectors = 4, count = 4;
197
198         /* Address translation */
199         switch (cmd) {
200         case ONENAND_CMD_UNLOCK:
201         case ONENAND_CMD_LOCK:
202         case ONENAND_CMD_LOCK_TIGHT:
203         case ONENAND_CMD_UNLOCK_ALL:
204                 block = -1;
205                 page = -1;
206                 break;
207
208         case ONENAND_CMD_ERASE:
209         case ONENAND_CMD_BUFFERRAM:
210         case ONENAND_CMD_OTP_ACCESS:
211                 block_cmd = 1;
212                 block = (int) (addr >> this->erase_shift);
213                 page = -1;
214                 break;
215
216         default:
217                 block = (int) (addr >> this->erase_shift);
218                 page = (int) (addr >> this->page_shift);
219                 page &= this->page_mask;
220                 break;
221         }
222
223         /* NOTE: The setting order of the registers is very important! */
224         if (cmd == ONENAND_CMD_BUFFERRAM) {
225                 /* Select DataRAM for DDP */
226                 value = onenand_bufferram_address(this, block);
227                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
228
229                 /* Switch to the next data buffer */
230                 ONENAND_SET_NEXT_BUFFERRAM(this);
231
232                 return 0;
233         }
234
235         if (block != -1) {
236                 /* Write 'DFS, FBA' of Flash */
237                 value = onenand_block_address(this, block);
238                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
239
240                 if (block_cmd) {
241                         /* Select DataRAM for DDP */
242                         value = onenand_bufferram_address(this, block);
243                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
244                 }
245         }
246
247         if (page != -1) {
248                 int dataram;
249
250                 switch (cmd) {
251                 case ONENAND_CMD_READ:
252                 case ONENAND_CMD_READOOB:
253                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
254                         readcmd = 1;
255                         break;
256
257                 default:
258                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
259                         break;
260                 }
261
262                 /* Write 'FPA, FSA' of Flash */
263                 value = onenand_page_address(page, sectors);
264                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
265
266                 /* Write 'BSA, BSC' of DataRAM */
267                 value = onenand_buffer_address(dataram, sectors, count);
268                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
269
270                 if (readcmd) {
271                         /* Select DataRAM for DDP */
272                         value = onenand_bufferram_address(this, block);
273                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
274                 }
275         }
276
277         /* Interrupt clear */
278         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
279
280         /* Write command */
281         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
282
283         return 0;
284 }
285
286 /**
287  * onenand_wait - [DEFAULT] wait until the command is done
288  * @param mtd           MTD device structure
289  * @param state         state to select the max. timeout value
290  *
291  * Wait for command done. This applies to all OneNAND command
292  * Read can take up to 30us, erase up to 2ms and program up to 350us
293  * according to general OneNAND specs
294  */
295 static int onenand_wait(struct mtd_info *mtd, int state)
296 {
297         struct onenand_chip * this = mtd->priv;
298         unsigned long timeout;
299         unsigned int flags = ONENAND_INT_MASTER;
300         unsigned int interrupt = 0;
301         unsigned int ctrl, ecc;
302
303         /* The 20 msec is enough */
304         timeout = jiffies + msecs_to_jiffies(20);
305         while (time_before(jiffies, timeout)) {
306                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
307
308                 if (interrupt & flags)
309                         break;
310
311                 if (state != FL_READING)
312                         cond_resched();
313                 touch_softlockup_watchdog();
314         }
315         /* To get correct interrupt status in timeout case */
316         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
317
318         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
319
320         if (ctrl & ONENAND_CTRL_ERROR) {
321                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
322                 if (ctrl & ONENAND_CTRL_LOCK)
323                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error.\n");
324                 return ctrl;
325         }
326
327         if (interrupt & ONENAND_INT_READ) {
328                 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
329                 if (ecc) {
330                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
331                         if (ecc & ONENAND_ECC_2BIT_ALL)
332                                 mtd->ecc_stats.failed++;
333                         else if (ecc & ONENAND_ECC_1BIT_ALL)
334                                 mtd->ecc_stats.corrected++;
335                 }
336         }
337
338         return 0;
339 }
340
341 /*
342  * onenand_interrupt - [DEFAULT] onenand interrupt handler
343  * @param irq           onenand interrupt number
344  * @param dev_id        interrupt data
345  *
346  * complete the work
347  */
348 static irqreturn_t onenand_interrupt(int irq, void *data)
349 {
350         struct onenand_chip *this = (struct onenand_chip *) data;
351
352         /* To handle shared interrupt */
353         if (!this->complete.done)
354                 complete(&this->complete);
355
356         return IRQ_HANDLED;
357 }
358
359 /*
360  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
361  * @param mtd           MTD device structure
362  * @param state         state to select the max. timeout value
363  *
364  * Wait for command done.
365  */
366 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
367 {
368         struct onenand_chip *this = mtd->priv;
369
370         /* To prevent soft lockup */
371         touch_softlockup_watchdog();
372
373         wait_for_completion(&this->complete);
374
375         return onenand_wait(mtd, state);
376 }
377
378 /*
379  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
380  * @param mtd           MTD device structure
381  * @param state         state to select the max. timeout value
382  *
383  * Try interrupt based wait (It is used one-time)
384  */
385 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
386 {
387         struct onenand_chip *this = mtd->priv;
388         unsigned long remain, timeout;
389
390         /* We use interrupt wait first */
391         this->wait = onenand_interrupt_wait;
392
393         /* To prevent soft lockup */
394         touch_softlockup_watchdog();
395
396         timeout = msecs_to_jiffies(100);
397         remain = wait_for_completion_timeout(&this->complete, timeout);
398         if (!remain) {
399                 printk(KERN_INFO "OneNAND: There's no interrupt. "
400                                 "We use the normal wait\n");
401
402                 /* Release the irq */
403                 free_irq(this->irq, this);
404
405                 this->wait = onenand_wait;
406         }
407
408         return onenand_wait(mtd, state);
409 }
410
411 /*
412  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
413  * @param mtd           MTD device structure
414  *
415  * There's two method to wait onenand work
416  * 1. polling - read interrupt status register
417  * 2. interrupt - use the kernel interrupt method
418  */
419 static void onenand_setup_wait(struct mtd_info *mtd)
420 {
421         struct onenand_chip *this = mtd->priv;
422         int syscfg;
423
424         init_completion(&this->complete);
425
426         if (this->irq <= 0) {
427                 this->wait = onenand_wait;
428                 return;
429         }
430
431         if (request_irq(this->irq, &onenand_interrupt,
432                                 IRQF_SHARED, "onenand", this)) {
433                 /* If we can't get irq, use the normal wait */
434                 this->wait = onenand_wait;
435                 return;
436         }
437
438         /* Enable interrupt */
439         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
440         syscfg |= ONENAND_SYS_CFG1_IOBE;
441         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
442
443         this->wait = onenand_try_interrupt_wait;
444 }
445
446 /**
447  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
448  * @param mtd           MTD data structure
449  * @param area          BufferRAM area
450  * @return              offset given area
451  *
452  * Return BufferRAM offset given area
453  */
454 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
455 {
456         struct onenand_chip *this = mtd->priv;
457
458         if (ONENAND_CURRENT_BUFFERRAM(this)) {
459                 if (area == ONENAND_DATARAM)
460                         return mtd->writesize;
461                 if (area == ONENAND_SPARERAM)
462                         return mtd->oobsize;
463         }
464
465         return 0;
466 }
467
468 /**
469  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
470  * @param mtd           MTD data structure
471  * @param area          BufferRAM area
472  * @param buffer        the databuffer to put/get data
473  * @param offset        offset to read from or write to
474  * @param count         number of bytes to read/write
475  *
476  * Read the BufferRAM area
477  */
478 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
479                 unsigned char *buffer, int offset, size_t count)
480 {
481         struct onenand_chip *this = mtd->priv;
482         void __iomem *bufferram;
483
484         bufferram = this->base + area;
485
486         bufferram += onenand_bufferram_offset(mtd, area);
487
488         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
489                 unsigned short word;
490
491                 /* Align with word(16-bit) size */
492                 count--;
493
494                 /* Read word and save byte */
495                 word = this->read_word(bufferram + offset + count);
496                 buffer[count] = (word & 0xff);
497         }
498
499         memcpy(buffer, bufferram + offset, count);
500
501         return 0;
502 }
503
504 /**
505  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
506  * @param mtd           MTD data structure
507  * @param area          BufferRAM area
508  * @param buffer        the databuffer to put/get data
509  * @param offset        offset to read from or write to
510  * @param count         number of bytes to read/write
511  *
512  * Read the BufferRAM area with Sync. Burst Mode
513  */
514 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
515                 unsigned char *buffer, int offset, size_t count)
516 {
517         struct onenand_chip *this = mtd->priv;
518         void __iomem *bufferram;
519
520         bufferram = this->base + area;
521
522         bufferram += onenand_bufferram_offset(mtd, area);
523
524         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
525
526         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
527                 unsigned short word;
528
529                 /* Align with word(16-bit) size */
530                 count--;
531
532                 /* Read word and save byte */
533                 word = this->read_word(bufferram + offset + count);
534                 buffer[count] = (word & 0xff);
535         }
536
537         memcpy(buffer, bufferram + offset, count);
538
539         this->mmcontrol(mtd, 0);
540
541         return 0;
542 }
543
544 /**
545  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
546  * @param mtd           MTD data structure
547  * @param area          BufferRAM area
548  * @param buffer        the databuffer to put/get data
549  * @param offset        offset to read from or write to
550  * @param count         number of bytes to read/write
551  *
552  * Write the BufferRAM area
553  */
554 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
555                 const unsigned char *buffer, int offset, size_t count)
556 {
557         struct onenand_chip *this = mtd->priv;
558         void __iomem *bufferram;
559
560         bufferram = this->base + area;
561
562         bufferram += onenand_bufferram_offset(mtd, area);
563
564         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
565                 unsigned short word;
566                 int byte_offset;
567
568                 /* Align with word(16-bit) size */
569                 count--;
570
571                 /* Calculate byte access offset */
572                 byte_offset = offset + count;
573
574                 /* Read word and save byte */
575                 word = this->read_word(bufferram + byte_offset);
576                 word = (word & ~0xff) | buffer[count];
577                 this->write_word(word, bufferram + byte_offset);
578         }
579
580         memcpy(bufferram + offset, buffer, count);
581
582         return 0;
583 }
584
585 /**
586  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
587  * @param mtd           MTD data structure
588  * @param addr          address to check
589  * @return              1 if there are valid data, otherwise 0
590  *
591  * Check bufferram if there is data we required
592  */
593 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
594 {
595         struct onenand_chip *this = mtd->priv;
596         int block, page;
597         int i;
598
599         block = (int) (addr >> this->erase_shift);
600         page = (int) (addr >> this->page_shift);
601         page &= this->page_mask;
602
603         i = ONENAND_CURRENT_BUFFERRAM(this);
604
605         /* Is there valid data? */
606         if (this->bufferram[i].block == block &&
607             this->bufferram[i].page == page &&
608             this->bufferram[i].valid)
609                 return 1;
610
611         return 0;
612 }
613
614 /**
615  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
616  * @param mtd           MTD data structure
617  * @param addr          address to update
618  * @param valid         valid flag
619  *
620  * Update BufferRAM information
621  */
622 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
623                 int valid)
624 {
625         struct onenand_chip *this = mtd->priv;
626         int block, page;
627         int i;
628
629         block = (int) (addr >> this->erase_shift);
630         page = (int) (addr >> this->page_shift);
631         page &= this->page_mask;
632
633         /* Invalidate BufferRAM */
634         for (i = 0; i < MAX_BUFFERRAM; i++) {
635                 if (this->bufferram[i].block == block &&
636                     this->bufferram[i].page == page)
637                         this->bufferram[i].valid = 0;
638         }
639
640         /* Update BufferRAM */
641         i = ONENAND_CURRENT_BUFFERRAM(this);
642         this->bufferram[i].block = block;
643         this->bufferram[i].page = page;
644         this->bufferram[i].valid = valid;
645
646         return 0;
647 }
648
649 /**
650  * onenand_get_device - [GENERIC] Get chip for selected access
651  * @param mtd           MTD device structure
652  * @param new_state     the state which is requested
653  *
654  * Get the device and lock it for exclusive access
655  */
656 static int onenand_get_device(struct mtd_info *mtd, int new_state)
657 {
658         struct onenand_chip *this = mtd->priv;
659         DECLARE_WAITQUEUE(wait, current);
660
661         /*
662          * Grab the lock and see if the device is available
663          */
664         while (1) {
665                 spin_lock(&this->chip_lock);
666                 if (this->state == FL_READY) {
667                         this->state = new_state;
668                         spin_unlock(&this->chip_lock);
669                         break;
670                 }
671                 if (new_state == FL_PM_SUSPENDED) {
672                         spin_unlock(&this->chip_lock);
673                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
674                 }
675                 set_current_state(TASK_UNINTERRUPTIBLE);
676                 add_wait_queue(&this->wq, &wait);
677                 spin_unlock(&this->chip_lock);
678                 schedule();
679                 remove_wait_queue(&this->wq, &wait);
680         }
681
682         return 0;
683 }
684
685 /**
686  * onenand_release_device - [GENERIC] release chip
687  * @param mtd           MTD device structure
688  *
689  * Deselect, release chip lock and wake up anyone waiting on the device
690  */
691 static void onenand_release_device(struct mtd_info *mtd)
692 {
693         struct onenand_chip *this = mtd->priv;
694
695         /* Release the chip */
696         spin_lock(&this->chip_lock);
697         this->state = FL_READY;
698         wake_up(&this->wq);
699         spin_unlock(&this->chip_lock);
700 }
701
702 /**
703  * onenand_read - [MTD Interface] Read data from flash
704  * @param mtd           MTD device structure
705  * @param from          offset to read from
706  * @param len           number of bytes to read
707  * @param retlen        pointer to variable to store the number of read bytes
708  * @param buf           the databuffer to put data
709  *
710  * Read with ecc
711 */
712 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
713         size_t *retlen, u_char *buf)
714 {
715         struct onenand_chip *this = mtd->priv;
716         struct mtd_ecc_stats stats;
717         int read = 0, column;
718         int thislen;
719         int ret = 0;
720
721         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
722
723         /* Do not allow reads past end of device */
724         if ((from + len) > mtd->size) {
725                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
726                 *retlen = 0;
727                 return -EINVAL;
728         }
729
730         /* Grab the lock and see if the device is available */
731         onenand_get_device(mtd, FL_READING);
732
733         /* TODO handling oob */
734
735         stats = mtd->ecc_stats;
736         while (read < len) {
737                 thislen = min_t(int, mtd->writesize, len - read);
738
739                 column = from & (mtd->writesize - 1);
740                 if (column + thislen > mtd->writesize)
741                         thislen = mtd->writesize - column;
742
743                 if (!onenand_check_bufferram(mtd, from)) {
744                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
745
746                         ret = this->wait(mtd, FL_READING);
747                         /* First copy data and check return value for ECC handling */
748                         onenand_update_bufferram(mtd, from, !ret);
749                 }
750
751                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
752
753                 if (ret) {
754                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: read failed = %d\n", ret);
755                         goto out;
756                 }
757
758                 read += thislen;
759
760                 if (read == len)
761                         break;
762
763                 from += thislen;
764                 buf += thislen;
765         }
766
767 out:
768         /* Deselect and wake up anyone waiting on the device */
769         onenand_release_device(mtd);
770
771         /*
772          * Return success, if no ECC failures, else -EBADMSG
773          * fs driver will take care of that, because
774          * retlen == desired len and result == -EBADMSG
775          */
776         *retlen = read;
777
778         if (mtd->ecc_stats.failed - stats.failed)
779                 return -EBADMSG;
780
781         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
782 }
783
784 /**
785  * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
786  * @param mtd           MTD device structure
787  * @param from          offset to read from
788  * @param len           number of bytes to read
789  * @param retlen        pointer to variable to store the number of read bytes
790  * @param buf           the databuffer to put data
791  *
792  * OneNAND read out-of-band data from the spare area
793  */
794 int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
795                         size_t *retlen, u_char *buf)
796 {
797         struct onenand_chip *this = mtd->priv;
798         int read = 0, thislen, column;
799         int ret = 0;
800
801         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
802
803         /* Initialize return length value */
804         *retlen = 0;
805
806         /* Do not allow reads past end of device */
807         if (unlikely((from + len) > mtd->size)) {
808                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
809                 return -EINVAL;
810         }
811
812         /* Grab the lock and see if the device is available */
813         onenand_get_device(mtd, FL_READING);
814
815         column = from & (mtd->oobsize - 1);
816
817         while (read < len) {
818                 thislen = mtd->oobsize - column;
819                 thislen = min_t(int, thislen, len);
820
821                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
822
823                 onenand_update_bufferram(mtd, from, 0);
824
825                 ret = this->wait(mtd, FL_READING);
826                 /* First copy data and check return value for ECC handling */
827
828                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
829
830                 if (ret) {
831                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = 0x%x\n", ret);
832                         goto out;
833                 }
834
835                 read += thislen;
836
837                 if (read == len)
838                         break;
839
840                 buf += thislen;
841
842                 /* Read more? */
843                 if (read < len) {
844                         /* Page size */
845                         from += mtd->writesize;
846                         column = 0;
847                 }
848         }
849
850 out:
851         /* Deselect and wake up anyone waiting on the device */
852         onenand_release_device(mtd);
853
854         *retlen = read;
855         return ret;
856 }
857
858 /**
859  * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
860  * @mtd:        MTD device structure
861  * @from:       offset to read from
862  * @ops:        oob operation description structure
863  */
864 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
865                             struct mtd_oob_ops *ops)
866 {
867         BUG_ON(ops->mode != MTD_OOB_PLACE);
868
869         return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
870                                    &ops->oobretlen, ops->oobbuf);
871 }
872
873 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
874 /**
875  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
876  * @param mtd           MTD device structure
877  * @param buf           the databuffer to verify
878  * @param to            offset to read from
879  * @param len           number of bytes to read and compare
880  *
881  */
882 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
883 {
884         struct onenand_chip *this = mtd->priv;
885         char *readp = this->page_buf;
886         int column = to & (mtd->oobsize - 1);
887         int status, i;
888
889         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
890         onenand_update_bufferram(mtd, to, 0);
891         status = this->wait(mtd, FL_READING);
892         if (status)
893                 return status;
894
895         this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
896
897         for(i = 0; i < len; i++)
898                 if (buf[i] != 0xFF && buf[i] != readp[i])
899                         return -EBADMSG;
900
901         return 0;
902 }
903
904 /**
905  * onenand_verify_page - [GENERIC] verify the chip contents after a write
906  * @param mtd           MTD device structure
907  * @param buf           the databuffer to verify
908  *
909  * Check DataRAM area directly
910  */
911 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
912 {
913         struct onenand_chip *this = mtd->priv;
914         void __iomem *dataram0, *dataram1;
915         int ret = 0;
916
917         this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
918
919         ret = this->wait(mtd, FL_READING);
920         if (ret)
921                 return ret;
922
923         onenand_update_bufferram(mtd, addr, 1);
924
925         /* Check, if the two dataram areas are same */
926         dataram0 = this->base + ONENAND_DATARAM;
927         dataram1 = dataram0 + mtd->writesize;
928
929         if (memcmp(dataram0, dataram1, mtd->writesize))
930                 return -EBADMSG;
931
932         return 0;
933 }
934 #else
935 #define onenand_verify_page(...)        (0)
936 #define onenand_verify_oob(...)         (0)
937 #endif
938
939 #define NOTALIGNED(x)   ((x & (mtd->writesize - 1)) != 0)
940
941 /**
942  * onenand_write - [MTD Interface] write buffer to FLASH
943  * @param mtd           MTD device structure
944  * @param to            offset to write to
945  * @param len           number of bytes to write
946  * @param retlen        pointer to variable to store the number of written bytes
947  * @param buf           the data to write
948  *
949  * Write with ECC
950  */
951 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
952         size_t *retlen, const u_char *buf)
953 {
954         struct onenand_chip *this = mtd->priv;
955         int written = 0;
956         int ret = 0;
957
958         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
959
960         /* Initialize retlen, in case of early exit */
961         *retlen = 0;
962
963         /* Do not allow writes past end of device */
964         if (unlikely((to + len) > mtd->size)) {
965                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
966                 return -EINVAL;
967         }
968
969         /* Reject writes, which are not page aligned */
970         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
971                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
972                 return -EINVAL;
973         }
974
975         /* Grab the lock and see if the device is available */
976         onenand_get_device(mtd, FL_WRITING);
977
978         /* Loop until all data write */
979         while (written < len) {
980                 int thislen = min_t(int, mtd->writesize, len - written);
981
982                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->writesize);
983
984                 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
985                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
986
987                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
988
989                 onenand_update_bufferram(mtd, to, 1);
990
991                 ret = this->wait(mtd, FL_WRITING);
992                 if (ret) {
993                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
994                         goto out;
995                 }
996
997                 written += thislen;
998
999                 /* Only check verify write turn on */
1000                 ret = onenand_verify_page(mtd, (u_char *) buf, to);
1001                 if (ret) {
1002                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
1003                         goto out;
1004                 }
1005
1006                 if (written == len)
1007                         break;
1008
1009                 to += thislen;
1010                 buf += thislen;
1011         }
1012
1013 out:
1014         /* Deselect and wake up anyone waiting on the device */
1015         onenand_release_device(mtd);
1016
1017         *retlen = written;
1018
1019         return ret;
1020 }
1021
1022 /**
1023  * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1024  * @param mtd           MTD device structure
1025  * @param to            offset to write to
1026  * @param len           number of bytes to write
1027  * @param retlen        pointer to variable to store the number of written bytes
1028  * @param buf           the data to write
1029  *
1030  * OneNAND write out-of-band
1031  */
1032 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1033                                 size_t *retlen, const u_char *buf)
1034 {
1035         struct onenand_chip *this = mtd->priv;
1036         int column, ret = 0;
1037         int written = 0;
1038
1039         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1040
1041         /* Initialize retlen, in case of early exit */
1042         *retlen = 0;
1043
1044         /* Do not allow writes past end of device */
1045         if (unlikely((to + len) > mtd->size)) {
1046                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
1047                 return -EINVAL;
1048         }
1049
1050         /* Grab the lock and see if the device is available */
1051         onenand_get_device(mtd, FL_WRITING);
1052
1053         /* Loop until all data write */
1054         while (written < len) {
1055                 int thislen = min_t(int, mtd->oobsize, len - written);
1056
1057                 column = to & (mtd->oobsize - 1);
1058
1059                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1060
1061                 /* We send data to spare ram with oobsize
1062                  * to prevent byte access */
1063                 memset(this->page_buf, 0xff, mtd->oobsize);
1064                 memcpy(this->page_buf + column, buf, thislen);
1065                 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
1066
1067                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1068
1069                 onenand_update_bufferram(mtd, to, 0);
1070
1071                 ret = this->wait(mtd, FL_WRITING);
1072                 if (ret) {
1073                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
1074                         goto out;
1075                 }
1076
1077                 ret = onenand_verify_oob(mtd, buf, to, thislen);
1078                 if (ret) {
1079                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
1080                         goto out;
1081                 }
1082
1083                 written += thislen;
1084
1085                 if (written == len)
1086                         break;
1087
1088                 to += thislen;
1089                 buf += thislen;
1090         }
1091
1092 out:
1093         /* Deselect and wake up anyone waiting on the device */
1094         onenand_release_device(mtd);
1095
1096         *retlen = written;
1097
1098         return ret;
1099 }
1100
1101 /**
1102  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1103  * @mtd:        MTD device structure
1104  * @from:       offset to read from
1105  * @ops:        oob operation description structure
1106  */
1107 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1108                              struct mtd_oob_ops *ops)
1109 {
1110         BUG_ON(ops->mode != MTD_OOB_PLACE);
1111
1112         return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1113                                     &ops->oobretlen, ops->oobbuf);
1114 }
1115
1116 /**
1117  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1118  * @param mtd           MTD device structure
1119  * @param ofs           offset from device start
1120  * @param getchip       0, if the chip is already selected
1121  * @param allowbbt      1, if its allowed to access the bbt area
1122  *
1123  * Check, if the block is bad. Either by reading the bad block table or
1124  * calling of the scan function.
1125  */
1126 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1127 {
1128         struct onenand_chip *this = mtd->priv;
1129         struct bbm_info *bbm = this->bbm;
1130
1131         /* Return info from the table */
1132         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1133 }
1134
1135 /**
1136  * onenand_erase - [MTD Interface] erase block(s)
1137  * @param mtd           MTD device structure
1138  * @param instr         erase instruction
1139  *
1140  * Erase one ore more blocks
1141  */
1142 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1143 {
1144         struct onenand_chip *this = mtd->priv;
1145         unsigned int block_size;
1146         loff_t addr;
1147         int len;
1148         int ret = 0;
1149
1150         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1151
1152         block_size = (1 << this->erase_shift);
1153
1154         /* Start address must align on block boundary */
1155         if (unlikely(instr->addr & (block_size - 1))) {
1156                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1157                 return -EINVAL;
1158         }
1159
1160         /* Length must align on block boundary */
1161         if (unlikely(instr->len & (block_size - 1))) {
1162                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1163                 return -EINVAL;
1164         }
1165
1166         /* Do not allow erase past end of device */
1167         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1168                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1169                 return -EINVAL;
1170         }
1171
1172         instr->fail_addr = 0xffffffff;
1173
1174         /* Grab the lock and see if the device is available */
1175         onenand_get_device(mtd, FL_ERASING);
1176
1177         /* Loop throught the pages */
1178         len = instr->len;
1179         addr = instr->addr;
1180
1181         instr->state = MTD_ERASING;
1182
1183         while (len) {
1184
1185                 /* Check if we have a bad block, we do not erase bad blocks */
1186                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1187                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1188                         instr->state = MTD_ERASE_FAILED;
1189                         goto erase_exit;
1190                 }
1191
1192                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1193
1194                 ret = this->wait(mtd, FL_ERASING);
1195                 /* Check, if it is write protected */
1196                 if (ret) {
1197                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1198                         instr->state = MTD_ERASE_FAILED;
1199                         instr->fail_addr = addr;
1200                         goto erase_exit;
1201                 }
1202
1203                 len -= block_size;
1204                 addr += block_size;
1205         }
1206
1207         instr->state = MTD_ERASE_DONE;
1208
1209 erase_exit:
1210
1211         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1212         /* Do call back function */
1213         if (!ret)
1214                 mtd_erase_callback(instr);
1215
1216         /* Deselect and wake up anyone waiting on the device */
1217         onenand_release_device(mtd);
1218
1219         return ret;
1220 }
1221
1222 /**
1223  * onenand_sync - [MTD Interface] sync
1224  * @param mtd           MTD device structure
1225  *
1226  * Sync is actually a wait for chip ready function
1227  */
1228 static void onenand_sync(struct mtd_info *mtd)
1229 {
1230         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1231
1232         /* Grab the lock and see if the device is available */
1233         onenand_get_device(mtd, FL_SYNCING);
1234
1235         /* Release it and go back */
1236         onenand_release_device(mtd);
1237 }
1238
1239 /**
1240  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1241  * @param mtd           MTD device structure
1242  * @param ofs           offset relative to mtd start
1243  *
1244  * Check whether the block is bad
1245  */
1246 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1247 {
1248         /* Check for invalid offset */
1249         if (ofs > mtd->size)
1250                 return -EINVAL;
1251
1252         return onenand_block_checkbad(mtd, ofs, 1, 0);
1253 }
1254
1255 /**
1256  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1257  * @param mtd           MTD device structure
1258  * @param ofs           offset from device start
1259  *
1260  * This is the default implementation, which can be overridden by
1261  * a hardware specific driver.
1262  */
1263 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1264 {
1265         struct onenand_chip *this = mtd->priv;
1266         struct bbm_info *bbm = this->bbm;
1267         u_char buf[2] = {0, 0};
1268         size_t retlen;
1269         int block;
1270
1271         /* Get block number */
1272         block = ((int) ofs) >> bbm->bbt_erase_shift;
1273         if (bbm->bbt)
1274                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1275
1276         /* We write two bytes, so we dont have to mess with 16 bit access */
1277         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1278         return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf);
1279 }
1280
1281 /**
1282  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1283  * @param mtd           MTD device structure
1284  * @param ofs           offset relative to mtd start
1285  *
1286  * Mark the block as bad
1287  */
1288 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1289 {
1290         struct onenand_chip *this = mtd->priv;
1291         int ret;
1292
1293         ret = onenand_block_isbad(mtd, ofs);
1294         if (ret) {
1295                 /* If it was bad already, return success and do nothing */
1296                 if (ret > 0)
1297                         return 0;
1298                 return ret;
1299         }
1300
1301         return this->block_markbad(mtd, ofs);
1302 }
1303
1304 /**
1305  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1306  * @param mtd           MTD device structure
1307  * @param ofs           offset relative to mtd start
1308  * @param len           number of bytes to lock or unlock
1309  *
1310  * Lock or unlock one or more blocks
1311  */
1312 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1313 {
1314         struct onenand_chip *this = mtd->priv;
1315         int start, end, block, value, status;
1316         int wp_status_mask;
1317
1318         start = ofs >> this->erase_shift;
1319         end = len >> this->erase_shift;
1320
1321         if (cmd == ONENAND_CMD_LOCK)
1322                 wp_status_mask = ONENAND_WP_LS;
1323         else
1324                 wp_status_mask = ONENAND_WP_US;
1325
1326         /* Continuous lock scheme */
1327         if (this->options & ONENAND_HAS_CONT_LOCK) {
1328                 /* Set start block address */
1329                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1330                 /* Set end block address */
1331                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1332                 /* Write lock command */
1333                 this->command(mtd, cmd, 0, 0);
1334
1335                 /* There's no return value */
1336                 this->wait(mtd, FL_LOCKING);
1337
1338                 /* Sanity check */
1339                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1340                     & ONENAND_CTRL_ONGO)
1341                         continue;
1342
1343                 /* Check lock status */
1344                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1345                 if (!(status & wp_status_mask))
1346                         printk(KERN_ERR "wp status = 0x%x\n", status);
1347
1348                 return 0;
1349         }
1350
1351         /* Block lock scheme */
1352         for (block = start; block < start + end; block++) {
1353                 /* Set block address */
1354                 value = onenand_block_address(this, block);
1355                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1356                 /* Select DataRAM for DDP */
1357                 value = onenand_bufferram_address(this, block);
1358                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1359                 /* Set start block address */
1360                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1361                 /* Write lock command */
1362                 this->command(mtd, cmd, 0, 0);
1363
1364                 /* There's no return value */
1365                 this->wait(mtd, FL_LOCKING);
1366
1367                 /* Sanity check */
1368                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1369                     & ONENAND_CTRL_ONGO)
1370                         continue;
1371
1372                 /* Check lock status */
1373                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1374                 if (!(status & wp_status_mask))
1375                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1376         }
1377
1378         return 0;
1379 }
1380
1381 /**
1382  * onenand_lock - [MTD Interface] Lock block(s)
1383  * @param mtd           MTD device structure
1384  * @param ofs           offset relative to mtd start
1385  * @param len           number of bytes to unlock
1386  *
1387  * Lock one or more blocks
1388  */
1389 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1390 {
1391         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1392 }
1393
1394 /**
1395  * onenand_unlock - [MTD Interface] Unlock block(s)
1396  * @param mtd           MTD device structure
1397  * @param ofs           offset relative to mtd start
1398  * @param len           number of bytes to unlock
1399  *
1400  * Unlock one or more blocks
1401  */
1402 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1403 {
1404         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1405 }
1406
1407 /**
1408  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1409  * @param this          onenand chip data structure
1410  *
1411  * Check lock status
1412  */
1413 static void onenand_check_lock_status(struct onenand_chip *this)
1414 {
1415         unsigned int value, block, status;
1416         unsigned int end;
1417
1418         end = this->chipsize >> this->erase_shift;
1419         for (block = 0; block < end; block++) {
1420                 /* Set block address */
1421                 value = onenand_block_address(this, block);
1422                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1423                 /* Select DataRAM for DDP */
1424                 value = onenand_bufferram_address(this, block);
1425                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1426                 /* Set start block address */
1427                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1428
1429                 /* Check lock status */
1430                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1431                 if (!(status & ONENAND_WP_US))
1432                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1433         }
1434 }
1435
1436 /**
1437  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1438  * @param mtd           MTD device structure
1439  *
1440  * Unlock all blocks
1441  */
1442 static int onenand_unlock_all(struct mtd_info *mtd)
1443 {
1444         struct onenand_chip *this = mtd->priv;
1445
1446         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1447                 /* Write unlock command */
1448                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1449
1450                 /* There's no return value */
1451                 this->wait(mtd, FL_LOCKING);
1452
1453                 /* Sanity check */
1454                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1455                     & ONENAND_CTRL_ONGO)
1456                         continue;
1457
1458                 /* Workaround for all block unlock in DDP */
1459                 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
1460                         loff_t ofs;
1461                         size_t len;
1462
1463                         /* 1st block on another chip */
1464                         ofs = this->chipsize >> 1;
1465                         len = 1 << this->erase_shift;
1466
1467                         onenand_unlock(mtd, ofs, len);
1468                 }
1469
1470                 onenand_check_lock_status(this);
1471
1472                 return 0;
1473         }
1474
1475         onenand_unlock(mtd, 0x0, this->chipsize);
1476
1477         return 0;
1478 }
1479
1480 #ifdef CONFIG_MTD_ONENAND_OTP
1481
1482 /* Interal OTP operation */
1483 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1484                 size_t *retlen, u_char *buf);
1485
1486 /**
1487  * do_otp_read - [DEFAULT] Read OTP block area
1488  * @param mtd           MTD device structure
1489  * @param from          The offset to read
1490  * @param len           number of bytes to read
1491  * @param retlen        pointer to variable to store the number of readbytes
1492  * @param buf           the databuffer to put/get data
1493  *
1494  * Read OTP block area.
1495  */
1496 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1497                 size_t *retlen, u_char *buf)
1498 {
1499         struct onenand_chip *this = mtd->priv;
1500         int ret;
1501
1502         /* Enter OTP access mode */
1503         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1504         this->wait(mtd, FL_OTPING);
1505
1506         ret = mtd->read(mtd, from, len, retlen, buf);
1507
1508         /* Exit OTP access mode */
1509         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1510         this->wait(mtd, FL_RESETING);
1511
1512         return ret;
1513 }
1514
1515 /**
1516  * do_otp_write - [DEFAULT] Write OTP block area
1517  * @param mtd           MTD device structure
1518  * @param from          The offset to write
1519  * @param len           number of bytes to write
1520  * @param retlen        pointer to variable to store the number of write bytes
1521  * @param buf           the databuffer to put/get data
1522  *
1523  * Write OTP block area.
1524  */
1525 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1526                 size_t *retlen, u_char *buf)
1527 {
1528         struct onenand_chip *this = mtd->priv;
1529         unsigned char *pbuf = buf;
1530         int ret;
1531
1532         /* Force buffer page aligned */
1533         if (len < mtd->writesize) {
1534                 memcpy(this->page_buf, buf, len);
1535                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1536                 pbuf = this->page_buf;
1537                 len = mtd->writesize;
1538         }
1539
1540         /* Enter OTP access mode */
1541         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1542         this->wait(mtd, FL_OTPING);
1543
1544         ret = mtd->write(mtd, from, len, retlen, pbuf);
1545
1546         /* Exit OTP access mode */
1547         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1548         this->wait(mtd, FL_RESETING);
1549
1550         return ret;
1551 }
1552
1553 /**
1554  * do_otp_lock - [DEFAULT] Lock OTP block area
1555  * @param mtd           MTD device structure
1556  * @param from          The offset to lock
1557  * @param len           number of bytes to lock
1558  * @param retlen        pointer to variable to store the number of lock bytes
1559  * @param buf           the databuffer to put/get data
1560  *
1561  * Lock OTP block area.
1562  */
1563 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1564                 size_t *retlen, u_char *buf)
1565 {
1566         struct onenand_chip *this = mtd->priv;
1567         int ret;
1568
1569         /* Enter OTP access mode */
1570         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1571         this->wait(mtd, FL_OTPING);
1572
1573         ret = onenand_do_write_oob(mtd, from, len, retlen, buf);
1574
1575         /* Exit OTP access mode */
1576         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1577         this->wait(mtd, FL_RESETING);
1578
1579         return ret;
1580 }
1581
1582 /**
1583  * onenand_otp_walk - [DEFAULT] Handle OTP operation
1584  * @param mtd           MTD device structure
1585  * @param from          The offset to read/write
1586  * @param len           number of bytes to read/write
1587  * @param retlen        pointer to variable to store the number of read bytes
1588  * @param buf           the databuffer to put/get data
1589  * @param action        do given action
1590  * @param mode          specify user and factory
1591  *
1592  * Handle OTP operation.
1593  */
1594 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1595                         size_t *retlen, u_char *buf,
1596                         otp_op_t action, int mode)
1597 {
1598         struct onenand_chip *this = mtd->priv;
1599         int otp_pages;
1600         int density;
1601         int ret = 0;
1602
1603         *retlen = 0;
1604
1605         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1606         if (density < ONENAND_DEVICE_DENSITY_512Mb)
1607                 otp_pages = 20;
1608         else
1609                 otp_pages = 10;
1610
1611         if (mode == MTD_OTP_FACTORY) {
1612                 from += mtd->writesize * otp_pages;
1613                 otp_pages = 64 - otp_pages;
1614         }
1615
1616         /* Check User/Factory boundary */
1617         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1618                 return 0;
1619
1620         while (len > 0 && otp_pages > 0) {
1621                 if (!action) {  /* OTP Info functions */
1622                         struct otp_info *otpinfo;
1623
1624                         len -= sizeof(struct otp_info);
1625                         if (len <= 0)
1626                                 return -ENOSPC;
1627
1628                         otpinfo = (struct otp_info *) buf;
1629                         otpinfo->start = from;
1630                         otpinfo->length = mtd->writesize;
1631                         otpinfo->locked = 0;
1632
1633                         from += mtd->writesize;
1634                         buf += sizeof(struct otp_info);
1635                         *retlen += sizeof(struct otp_info);
1636                 } else {
1637                         size_t tmp_retlen;
1638                         int size = len;
1639
1640                         ret = action(mtd, from, len, &tmp_retlen, buf);
1641
1642                         buf += size;
1643                         len -= size;
1644                         *retlen += size;
1645
1646                         if (ret < 0)
1647                                 return ret;
1648                 }
1649                 otp_pages--;
1650         }
1651
1652         return 0;
1653 }
1654
1655 /**
1656  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1657  * @param mtd           MTD device structure
1658  * @param buf           the databuffer to put/get data
1659  * @param len           number of bytes to read
1660  *
1661  * Read factory OTP info.
1662  */
1663 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1664                         struct otp_info *buf, size_t len)
1665 {
1666         size_t retlen;
1667         int ret;
1668
1669         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1670
1671         return ret ? : retlen;
1672 }
1673
1674 /**
1675  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1676  * @param mtd           MTD device structure
1677  * @param from          The offset to read
1678  * @param len           number of bytes to read
1679  * @param retlen        pointer to variable to store the number of read bytes
1680  * @param buf           the databuffer to put/get data
1681  *
1682  * Read factory OTP area.
1683  */
1684 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1685                         size_t len, size_t *retlen, u_char *buf)
1686 {
1687         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1688 }
1689
1690 /**
1691  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1692  * @param mtd           MTD device structure
1693  * @param buf           the databuffer to put/get data
1694  * @param len           number of bytes to read
1695  *
1696  * Read user OTP info.
1697  */
1698 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1699                         struct otp_info *buf, size_t len)
1700 {
1701         size_t retlen;
1702         int ret;
1703
1704         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1705
1706         return ret ? : retlen;
1707 }
1708
1709 /**
1710  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1711  * @param mtd           MTD device structure
1712  * @param from          The offset to read
1713  * @param len           number of bytes to read
1714  * @param retlen        pointer to variable to store the number of read bytes
1715  * @param buf           the databuffer to put/get data
1716  *
1717  * Read user OTP area.
1718  */
1719 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1720                         size_t len, size_t *retlen, u_char *buf)
1721 {
1722         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1723 }
1724
1725 /**
1726  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1727  * @param mtd           MTD device structure
1728  * @param from          The offset to write
1729  * @param len           number of bytes to write
1730  * @param retlen        pointer to variable to store the number of write bytes
1731  * @param buf           the databuffer to put/get data
1732  *
1733  * Write user OTP area.
1734  */
1735 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1736                         size_t len, size_t *retlen, u_char *buf)
1737 {
1738         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1739 }
1740
1741 /**
1742  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1743  * @param mtd           MTD device structure
1744  * @param from          The offset to lock
1745  * @param len           number of bytes to unlock
1746  *
1747  * Write lock mark on spare area in page 0 in OTP block
1748  */
1749 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1750                         size_t len)
1751 {
1752         unsigned char oob_buf[64];
1753         size_t retlen;
1754         int ret;
1755
1756         memset(oob_buf, 0xff, mtd->oobsize);
1757         /*
1758          * Note: OTP lock operation
1759          *       OTP block : 0xXXFC
1760          *       1st block : 0xXXF3 (If chip support)
1761          *       Both      : 0xXXF0 (If chip support)
1762          */
1763         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1764
1765         /*
1766          * Write lock mark to 8th word of sector0 of page0 of the spare0.
1767          * We write 16 bytes spare area instead of 2 bytes.
1768          */
1769         from = 0;
1770         len = 16;
1771
1772         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1773
1774         return ret ? : retlen;
1775 }
1776 #endif  /* CONFIG_MTD_ONENAND_OTP */
1777
1778 /**
1779  * onenand_lock_scheme - Check and set OneNAND lock scheme
1780  * @param mtd           MTD data structure
1781  *
1782  * Check and set OneNAND lock scheme
1783  */
1784 static void onenand_lock_scheme(struct mtd_info *mtd)
1785 {
1786         struct onenand_chip *this = mtd->priv;
1787         unsigned int density, process;
1788
1789         /* Lock scheme depends on density and process */
1790         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1791         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
1792
1793         /* Lock scheme */
1794         if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
1795                 /* A-Die has all block unlock */
1796                 if (process) {
1797                         printk(KERN_DEBUG "Chip support all block unlock\n");
1798                         this->options |= ONENAND_HAS_UNLOCK_ALL;
1799                 }
1800         } else {
1801                 /* Some OneNAND has continues lock scheme */
1802                 if (!process) {
1803                         printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
1804                         this->options |= ONENAND_HAS_CONT_LOCK;
1805                 }
1806         }
1807 }
1808
1809 /**
1810  * onenand_print_device_info - Print device ID
1811  * @param device        device ID
1812  *
1813  * Print device ID
1814  */
1815 static void onenand_print_device_info(int device, int version)
1816 {
1817         int vcc, demuxed, ddp, density;
1818
1819         vcc = device & ONENAND_DEVICE_VCC_MASK;
1820         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1821         ddp = device & ONENAND_DEVICE_IS_DDP;
1822         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1823         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1824                 demuxed ? "" : "Muxed ",
1825                 ddp ? "(DDP)" : "",
1826                 (16 << density),
1827                 vcc ? "2.65/3.3" : "1.8",
1828                 device);
1829         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
1830 }
1831
1832 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1833         {ONENAND_MFR_SAMSUNG, "Samsung"},
1834 };
1835
1836 /**
1837  * onenand_check_maf - Check manufacturer ID
1838  * @param manuf         manufacturer ID
1839  *
1840  * Check manufacturer ID
1841  */
1842 static int onenand_check_maf(int manuf)
1843 {
1844         int size = ARRAY_SIZE(onenand_manuf_ids);
1845         char *name;
1846         int i;
1847
1848         for (i = 0; i < size; i++)
1849                 if (manuf == onenand_manuf_ids[i].id)
1850                         break;
1851
1852         if (i < size)
1853                 name = onenand_manuf_ids[i].name;
1854         else
1855                 name = "Unknown";
1856
1857         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1858
1859         return (i == size);
1860 }
1861
1862 /**
1863  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1864  * @param mtd           MTD device structure
1865  *
1866  * OneNAND detection method:
1867  *   Compare the the values from command with ones from register
1868  */
1869 static int onenand_probe(struct mtd_info *mtd)
1870 {
1871         struct onenand_chip *this = mtd->priv;
1872         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
1873         int density;
1874         int syscfg;
1875
1876         /* Save system configuration 1 */
1877         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
1878         /* Clear Sync. Burst Read mode to read BootRAM */
1879         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
1880
1881         /* Send the command for reading device ID from BootRAM */
1882         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1883
1884         /* Read manufacturer and device IDs from BootRAM */
1885         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1886         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1887
1888         /* Reset OneNAND to read default register values */
1889         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1890         /* Wait reset */
1891         this->wait(mtd, FL_RESETING);
1892
1893         /* Restore system configuration 1 */
1894         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
1895
1896         /* Check manufacturer ID */
1897         if (onenand_check_maf(bram_maf_id))
1898                 return -ENXIO;
1899
1900         /* Read manufacturer and device IDs from Register */
1901         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1902         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1903         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1904
1905         /* Check OneNAND device */
1906         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1907                 return -ENXIO;
1908
1909         /* Flash device information */
1910         onenand_print_device_info(dev_id, ver_id);
1911         this->device_id = dev_id;
1912         this->version_id = ver_id;
1913
1914         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1915         this->chipsize = (16 << density) << 20;
1916         /* Set density mask. it is used for DDP */
1917         this->density_mask = (1 << (density + 6));
1918
1919         /* OneNAND page size & block size */
1920         /* The data buffer size is equal to page size */
1921         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1922         mtd->oobsize = mtd->writesize >> 5;
1923         /* Pagers per block is always 64 in OneNAND */
1924         mtd->erasesize = mtd->writesize << 6;
1925
1926         this->erase_shift = ffs(mtd->erasesize) - 1;
1927         this->page_shift = ffs(mtd->writesize) - 1;
1928         this->ppb_shift = (this->erase_shift - this->page_shift);
1929         this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
1930
1931         /* REVIST: Multichip handling */
1932
1933         mtd->size = this->chipsize;
1934
1935         /* Check OneNAND lock scheme */
1936         onenand_lock_scheme(mtd);
1937
1938         return 0;
1939 }
1940
1941 /**
1942  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1943  * @param mtd           MTD device structure
1944  */
1945 static int onenand_suspend(struct mtd_info *mtd)
1946 {
1947         return onenand_get_device(mtd, FL_PM_SUSPENDED);
1948 }
1949
1950 /**
1951  * onenand_resume - [MTD Interface] Resume the OneNAND flash
1952  * @param mtd           MTD device structure
1953  */
1954 static void onenand_resume(struct mtd_info *mtd)
1955 {
1956         struct onenand_chip *this = mtd->priv;
1957
1958         if (this->state == FL_PM_SUSPENDED)
1959                 onenand_release_device(mtd);
1960         else
1961                 printk(KERN_ERR "resume() called for the chip which is not"
1962                                 "in suspended state\n");
1963 }
1964
1965 /**
1966  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1967  * @param mtd           MTD device structure
1968  * @param maxchips      Number of chips to scan for
1969  *
1970  * This fills out all the not initialized function pointers
1971  * with the defaults.
1972  * The flash ID is read and the mtd/chip structures are
1973  * filled with the appropriate values.
1974  */
1975 int onenand_scan(struct mtd_info *mtd, int maxchips)
1976 {
1977         struct onenand_chip *this = mtd->priv;
1978
1979         if (!this->read_word)
1980                 this->read_word = onenand_readw;
1981         if (!this->write_word)
1982                 this->write_word = onenand_writew;
1983
1984         if (!this->command)
1985                 this->command = onenand_command;
1986         if (!this->wait)
1987                 onenand_setup_wait(mtd);
1988
1989         if (!this->read_bufferram)
1990                 this->read_bufferram = onenand_read_bufferram;
1991         if (!this->write_bufferram)
1992                 this->write_bufferram = onenand_write_bufferram;
1993
1994         if (!this->block_markbad)
1995                 this->block_markbad = onenand_default_block_markbad;
1996         if (!this->scan_bbt)
1997                 this->scan_bbt = onenand_default_bbt;
1998
1999         if (onenand_probe(mtd))
2000                 return -ENXIO;
2001
2002         /* Set Sync. Burst Read after probing */
2003         if (this->mmcontrol) {
2004                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2005                 this->read_bufferram = onenand_sync_read_bufferram;
2006         }
2007
2008         /* Allocate buffers, if necessary */
2009         if (!this->page_buf) {
2010                 size_t len;
2011                 len = mtd->writesize + mtd->oobsize;
2012                 this->page_buf = kmalloc(len, GFP_KERNEL);
2013                 if (!this->page_buf) {
2014                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2015                         return -ENOMEM;
2016                 }
2017                 this->options |= ONENAND_PAGEBUF_ALLOC;
2018         }
2019
2020         this->state = FL_READY;
2021         init_waitqueue_head(&this->wq);
2022         spin_lock_init(&this->chip_lock);
2023
2024         switch (mtd->oobsize) {
2025         case 64:
2026                 this->ecclayout = &onenand_oob_64;
2027                 break;
2028
2029         case 32:
2030                 this->ecclayout = &onenand_oob_32;
2031                 break;
2032
2033         default:
2034                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2035                         mtd->oobsize);
2036                 /* To prevent kernel oops */
2037                 this->ecclayout = &onenand_oob_32;
2038                 break;
2039         }
2040
2041         mtd->ecclayout = this->ecclayout;
2042
2043         /* Fill in remaining MTD driver data */
2044         mtd->type = MTD_NANDFLASH;
2045         mtd->flags = MTD_CAP_NANDFLASH;
2046         mtd->ecctype = MTD_ECC_SW;
2047         mtd->erase = onenand_erase;
2048         mtd->point = NULL;
2049         mtd->unpoint = NULL;
2050         mtd->read = onenand_read;
2051         mtd->write = onenand_write;
2052         mtd->read_oob = onenand_read_oob;
2053         mtd->write_oob = onenand_write_oob;
2054 #ifdef CONFIG_MTD_ONENAND_OTP
2055         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2056         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2057         mtd->get_user_prot_info = onenand_get_user_prot_info;
2058         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2059         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2060         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2061 #endif
2062         mtd->sync = onenand_sync;
2063         mtd->lock = onenand_lock;
2064         mtd->unlock = onenand_unlock;
2065         mtd->suspend = onenand_suspend;
2066         mtd->resume = onenand_resume;
2067         mtd->block_isbad = onenand_block_isbad;
2068         mtd->block_markbad = onenand_block_markbad;
2069         mtd->owner = THIS_MODULE;
2070
2071         /* Unlock whole block */
2072         onenand_unlock_all(mtd);
2073
2074         return this->scan_bbt(mtd);
2075 }
2076
2077 /**
2078  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2079  * @param mtd           MTD device structure
2080  */
2081 void onenand_release(struct mtd_info *mtd)
2082 {
2083         struct onenand_chip *this = mtd->priv;
2084
2085 #ifdef CONFIG_MTD_PARTITIONS
2086         /* Deregister partitions */
2087         del_mtd_partitions (mtd);
2088 #endif
2089         /* Deregister the device */
2090         del_mtd_device (mtd);
2091
2092         /* Free bad block table memory, if allocated */
2093         if (this->bbm)
2094                 kfree(this->bbm);
2095         /* Buffer allocated by onenand_scan */
2096         if (this->options & ONENAND_PAGEBUF_ALLOC)
2097                 kfree(this->page_buf);
2098 }
2099
2100 EXPORT_SYMBOL_GPL(onenand_scan);
2101 EXPORT_SYMBOL_GPL(onenand_release);
2102
2103 MODULE_LICENSE("GPL");
2104 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2105 MODULE_DESCRIPTION("Generic OneNAND flash driver code");