drivers/infiniband/hw/ipath/ipath_intr.c

   1 /*
   2  * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/pci.h>
  35 #include <linux/delay.h>
  36
  37 #include "ipath_kernel.h"
  38 #include "ipath_verbs.h"
  39 #include "ipath_common.h"
  40
  41 /*
  42  * clear (write) a pio buffer, to clear a parity error.   This routine
  43  * should only be called when in freeze mode, and the buffer should be
  44  * canceled afterwards.
  45  */
  46 static void ipath_clrpiobuf(struct ipath_devdata *dd, u32 pnum)
  47 {
  48         u32 __iomem *pbuf;
  49         u32 dwcnt; /* dword count to write */
  50         if (pnum < dd->ipath_piobcnt2k) {
  51                 pbuf = (u32 __iomem *) (dd->ipath_pio2kbase + pnum *
  52                         dd->ipath_palign);
  53                 dwcnt = dd->ipath_piosize2k >> 2;
  54         }
  55         else {
  56                 pbuf = (u32 __iomem *) (dd->ipath_pio4kbase +
  57                         (pnum - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
  58                 dwcnt = dd->ipath_piosize4k >> 2;
  59         }
  60         dev_info(&dd->pcidev->dev,
  61                 "Rewrite PIO buffer %u, to recover from parity error\n",
  62                 pnum);
  63
  64         /* no flush required, since already in freeze */
  65         writel(dwcnt + 1, pbuf);
  66         while (--dwcnt)
  67                 writel(0, pbuf++);
  68 }
  69
  70 /*
  71  * Called when we might have an error that is specific to a particular
  72  * PIO buffer, and may need to cancel that buffer, so it can be re-used.
  73  * If rewrite is true, and bits are set in the sendbufferror registers,
  74  * we'll write to the buffer, for error recovery on parity errors.
  75  */
  76 static void ipath_disarm_senderrbufs(struct ipath_devdata *dd, int rewrite)
  77 {
  78         u32 piobcnt;
  79         unsigned long sbuf[4];
  80         /*
  81          * it's possible that sendbuffererror could have bits set; might
  82          * have already done this as a result of hardware error handling
  83          */
  84         piobcnt = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
  85         /* read these before writing errorclear */
  86         sbuf[0] = ipath_read_kreg64(
  87                 dd, dd->ipath_kregs->kr_sendbuffererror);
  88         sbuf[1] = ipath_read_kreg64(
  89                 dd, dd->ipath_kregs->kr_sendbuffererror + 1);
  90         if (piobcnt > 128) {
  91                 sbuf[2] = ipath_read_kreg64(
  92                         dd, dd->ipath_kregs->kr_sendbuffererror + 2);
  93                 sbuf[3] = ipath_read_kreg64(
  94                         dd, dd->ipath_kregs->kr_sendbuffererror + 3);
  95         }
  96
  97         if (sbuf[0] || sbuf[1] || (piobcnt > 128 && (sbuf[2] || sbuf[3]))) {
  98                 int i;
  99                 if (ipath_debug & (__IPATH_PKTDBG|__IPATH_DBG) &&
 100                         dd->ipath_lastcancel > jiffies) {
 101                         __IPATH_DBG_WHICH(__IPATH_PKTDBG|__IPATH_DBG,
 102                                           "SendbufErrs %lx %lx", sbuf[0],
 103                                           sbuf[1]);
 104                         if (ipath_debug & __IPATH_PKTDBG && piobcnt > 128)
 105                                 printk(" %lx %lx ", sbuf[2], sbuf[3]);
 106                         printk("\n");
 107                 }
 108
 109                 for (i = 0; i < piobcnt; i++)
 110                         if (test_bit(i, sbuf)) {
 111                                 if (rewrite)
 112                                         ipath_clrpiobuf(dd, i);
 113                                 ipath_disarm_piobufs(dd, i, 1);
 114                         }
 115                 /* ignore armlaunch errs for a bit */
 116                 dd->ipath_lastcancel = jiffies+3;
 117         }
 118 }
 119
 120
 121 /* These are all rcv-related errors which we want to count for stats */
 122 #define E_SUM_PKTERRS \
 123         (INFINIPATH_E_RHDRLEN | INFINIPATH_E_RBADTID | \
 124          INFINIPATH_E_RBADVERSION | INFINIPATH_E_RHDR | \
 125          INFINIPATH_E_RLONGPKTLEN | INFINIPATH_E_RSHORTPKTLEN | \
 126          INFINIPATH_E_RMAXPKTLEN | INFINIPATH_E_RMINPKTLEN | \
 127          INFINIPATH_E_RFORMATERR | INFINIPATH_E_RUNSUPVL | \
 128          INFINIPATH_E_RUNEXPCHAR | INFINIPATH_E_REBP)
 129
 130 /* These are all send-related errors which we want to count for stats */
 131 #define E_SUM_ERRS \
 132         (INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SUNEXPERRPKTNUM | \
 133          INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
 134          INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SUNSUPVL | \
 135          INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
 136          INFINIPATH_E_INVALIDADDR)
 137
 138 /*
 139  * this is similar to E_SUM_ERRS, but can't ignore armlaunch, don't ignore
 140  * errors not related to freeze and cancelling buffers.  Can't ignore
 141  * armlaunch because could get more while still cleaning up, and need
 142  * to cancel those as they happen.
 143  */
 144 #define E_SPKT_ERRS_IGNORE \
 145          (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
 146          INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SMINPKTLEN | \
 147          INFINIPATH_E_SPKTLEN)
 148
 149 /*
 150  * these are errors that can occur when the link changes state while
 151  * a packet is being sent or received.  This doesn't cover things
 152  * like EBP or VCRC that can be the result of a sending having the
 153  * link change state, so we receive a "known bad" packet.
 154  */
 155 #define E_SUM_LINK_PKTERRS \
 156         (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
 157          INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
 158          INFINIPATH_E_RSHORTPKTLEN | INFINIPATH_E_RMINPKTLEN | \
 159          INFINIPATH_E_RUNEXPCHAR)
 160
 161 static u64 handle_e_sum_errs(struct ipath_devdata *dd, ipath_err_t errs)
 162 {
 163         u64 ignore_this_time = 0;
 164
 165         ipath_disarm_senderrbufs(dd, 0);
 166         if ((errs & E_SUM_LINK_PKTERRS) &&
 167             !(dd->ipath_flags & IPATH_LINKACTIVE)) {
 168                 /*
 169                  * This can happen when SMA is trying to bring the link
 170                  * up, but the IB link changes state at the "wrong" time.
 171                  * The IB logic then complains that the packet isn't
 172                  * valid.  We don't want to confuse people, so we just
 173                  * don't print them, except at debug
 174                  */
 175                 ipath_dbg("Ignoring packet errors %llx, because link not "
 176                           "ACTIVE\n", (unsigned long long) errs);
 177                 ignore_this_time = errs & E_SUM_LINK_PKTERRS;
 178         }
 179
 180         return ignore_this_time;
 181 }
 182
 183 /* generic hw error messages... */
 184 #define INFINIPATH_HWE_TXEMEMPARITYERR_MSG(a) \
 185         { \
 186                 .mask = ( INFINIPATH_HWE_TXEMEMPARITYERR_##a <<    \
 187                           INFINIPATH_HWE_TXEMEMPARITYERR_SHIFT ),   \
 188                 .msg = "TXE " #a " Memory Parity"            \
 189         }
 190 #define INFINIPATH_HWE_RXEMEMPARITYERR_MSG(a) \
 191         { \
 192                 .mask = ( INFINIPATH_HWE_RXEMEMPARITYERR_##a <<    \
 193                           INFINIPATH_HWE_RXEMEMPARITYERR_SHIFT ),   \
 194                 .msg = "RXE " #a " Memory Parity"            \
 195         }
 196
 197 static const struct ipath_hwerror_msgs ipath_generic_hwerror_msgs[] = {
 198         INFINIPATH_HWE_MSG(IBCBUSFRSPCPARITYERR, "IPATH2IB Parity"),
 199         INFINIPATH_HWE_MSG(IBCBUSTOSPCPARITYERR, "IB2IPATH Parity"),
 200
 201         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOBUF),
 202         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOPBC),
 203         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOLAUNCHFIFO),
 204
 205         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(RCVBUF),
 206         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(LOOKUPQ),
 207         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EAGERTID),
 208         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EXPTID),
 209         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(FLAGBUF),
 210         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(DATAINFO),
 211         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(HDRINFO),
 212 };
 213
 214 /**
 215  * ipath_format_hwmsg - format a single hwerror message
 216  * @msg message buffer
 217  * @msgl length of message buffer
 218  * @hwmsg message to add to message buffer
 219  */
 220 static void ipath_format_hwmsg(char *msg, size_t msgl, const char *hwmsg)
 221 {
 222         strlcat(msg, "[", msgl);
 223         strlcat(msg, hwmsg, msgl);
 224         strlcat(msg, "]", msgl);
 225 }
 226
 227 /**
 228  * ipath_format_hwerrors - format hardware error messages for display
 229  * @hwerrs hardware errors bit vector
 230  * @hwerrmsgs hardware error descriptions
 231  * @nhwerrmsgs number of hwerrmsgs
 232  * @msg message buffer
 233  * @msgl message buffer length
 234  */
 235 void ipath_format_hwerrors(u64 hwerrs,
 236                            const struct ipath_hwerror_msgs *hwerrmsgs,
 237                            size_t nhwerrmsgs,
 238                            char *msg, size_t msgl)
 239 {
 240         int i;
 241         const int glen =
 242             sizeof(ipath_generic_hwerror_msgs) /
 243             sizeof(ipath_generic_hwerror_msgs[0]);
 244
 245         for (i=0; i<glen; i++) {
 246                 if (hwerrs & ipath_generic_hwerror_msgs[i].mask) {
 247                         ipath_format_hwmsg(msg, msgl,
 248                                            ipath_generic_hwerror_msgs[i].msg);
 249                 }
 250         }
 251
 252         for (i=0; i<nhwerrmsgs; i++) {
 253                 if (hwerrs & hwerrmsgs[i].mask) {
 254                         ipath_format_hwmsg(msg, msgl, hwerrmsgs[i].msg);
 255                 }
 256         }
 257 }
 258
 259 /* return the strings for the most common link states */
 260 static char *ib_linkstate(struct ipath_devdata *dd, u64 ibcs)
 261 {
 262         char *ret;
 263         u32 state;
 264
 265         state = ipath_ib_state(dd, ibcs);
 266         if (state == dd->ib_init)
 267                 ret = "Init";
 268         else if (state == dd->ib_arm)
 269                 ret = "Arm";
 270         else if (state == dd->ib_active)
 271                 ret = "Active";
 272         else
 273                 ret = "Down";
 274         return ret;
 275 }
 276
 277 void signal_ib_event(struct ipath_devdata *dd, enum ib_event_type ev)
 278 {
 279         struct ib_event event;
 280
 281         event.device = &dd->verbs_dev->ibdev;
 282         event.element.port_num = 1;
 283         event.event = ev;
 284         ib_dispatch_event(&event);
 285 }
 286
 287 static void handle_e_ibstatuschanged(struct ipath_devdata *dd,
 288                                      ipath_err_t errs)
 289 {
 290         u32 ltstate, lstate, ibstate, lastlstate;
 291         u32 init = dd->ib_init;
 292         u32 arm = dd->ib_arm;
 293         u32 active = dd->ib_active;
 294         const u64 ibcs = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
 295
 296         lstate = ipath_ib_linkstate(dd, ibcs); /* linkstate */
 297         ibstate = ipath_ib_state(dd, ibcs);
 298         /* linkstate at last interrupt */
 299         lastlstate = ipath_ib_linkstate(dd, dd->ipath_lastibcstat);
 300         ltstate = ipath_ib_linktrstate(dd, ibcs); /* linktrainingtate */
 301
 302         /*
 303          * if linkstate transitions into INIT from any of the various down
 304          * states, or if it transitions from any of the up (INIT or better)
 305          * states into any of the down states (except link recovery), then
 306          * call the chip-specific code to take appropriate actions.
 307          */
 308         if (lstate >= INFINIPATH_IBCS_L_STATE_INIT &&
 309                 lastlstate == INFINIPATH_IBCS_L_STATE_DOWN) {
 310                 /* transitioned to UP */
 311                 if (dd->ipath_f_ib_updown(dd, 1, ibcs)) {
 312                         /* link came up, so we must no longer be disabled */
 313                         dd->ipath_flags &= ~IPATH_IB_LINK_DISABLED;
 314                         ipath_cdbg(LINKVERB, "LinkUp handled, skipped\n");
 315                         goto skip_ibchange; /* chip-code handled */
 316                 }
 317         } else if ((lastlstate >= INFINIPATH_IBCS_L_STATE_INIT ||
 318                 (dd->ipath_flags & IPATH_IB_FORCE_NOTIFY)) &&
 319                 ltstate <= INFINIPATH_IBCS_LT_STATE_CFGDEBOUNCE &&
 320                 ltstate != INFINIPATH_IBCS_LT_STATE_LINKUP) {
 321                 int handled;
 322                 handled = dd->ipath_f_ib_updown(dd, 0, ibcs);
 323                 dd->ipath_flags &= ~IPATH_IB_FORCE_NOTIFY;
 324                 if (handled) {
 325                         ipath_cdbg(LINKVERB, "LinkDown handled, skipped\n");
 326                         goto skip_ibchange; /* chip-code handled */
 327                 }
 328         }
 329
 330         /*
 331          * Significant enough to always print and get into logs, if it was
 332          * unexpected.  If it was a requested state change, we'll have
 333          * already cleared the flags, so we won't print this warning
 334          */
 335         if ((ibstate != arm && ibstate != active) &&
 336             (dd->ipath_flags & (IPATH_LINKARMED | IPATH_LINKACTIVE))) {
 337                 dev_info(&dd->pcidev->dev, "Link state changed from %s "
 338                          "to %s\n", (dd->ipath_flags & IPATH_LINKARMED) ?
 339                          "ARM" : "ACTIVE", ib_linkstate(dd, ibcs));
 340         }
 341
 342         if (ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE ||
 343             ltstate == INFINIPATH_IBCS_LT_STATE_POLLQUIET) {
 344                 u32 lastlts;
 345                 lastlts = ipath_ib_linktrstate(dd, dd->ipath_lastibcstat);
 346                 /*
 347                  * Ignore cycling back and forth from Polling.Active to
 348                  * Polling.Quiet while waiting for the other end of the link
 349                  * to come up, except to try and decide if we are connected
 350                  * to a live IB device or not.  We will cycle back and
 351                  * forth between them if no cable is plugged in, the other
 352                  * device is powered off or disabled, etc.
 353                  */
 354                 if (lastlts == INFINIPATH_IBCS_LT_STATE_POLLACTIVE ||
 355                     lastlts == INFINIPATH_IBCS_LT_STATE_POLLQUIET) {
 356                         if (++dd->ipath_ibpollcnt == 40) {
 357                                 dd->ipath_flags |= IPATH_NOCABLE;
 358                                 *dd->ipath_statusp |=
 359                                         IPATH_STATUS_IB_NOCABLE;
 360                                 ipath_cdbg(LINKVERB, "Set NOCABLE\n");
 361                         }
 362                         ipath_cdbg(LINKVERB, "POLL change to %s (%x)\n",
 363                                 ipath_ibcstatus_str[ltstate], ibstate);
 364                         goto skip_ibchange;
 365                 }
 366         }
 367
 368         dd->ipath_ibpollcnt = 0; /* not poll*, now */
 369         ipath_stats.sps_iblink++;
 370
 371         if (ibstate != init && dd->ipath_lastlinkrecov && ipath_linkrecovery) {
 372                 u64 linkrecov;
 373                 linkrecov = ipath_snap_cntr(dd,
 374                         dd->ipath_cregs->cr_iblinkerrrecovcnt);
 375                 if (linkrecov != dd->ipath_lastlinkrecov) {
 376                         ipath_dbg("IB linkrecov up %Lx (%s %s) recov %Lu\n",
 377                                 ibcs, ib_linkstate(dd, ibcs),
 378                                 ipath_ibcstatus_str[ltstate],
 379                                 linkrecov);
 380                         /* and no more until active again */
 381                         dd->ipath_lastlinkrecov = 0;
 382                         ipath_set_linkstate(dd, IPATH_IB_LINKDOWN);
 383                         goto skip_ibchange;
 384                 }
 385         }
 386
 387         if (ibstate == init || ibstate == arm || ibstate == active) {
 388                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_NOCABLE;
 389                 if (ibstate == init || ibstate == arm) {
 390                         *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
 391                         if (dd->ipath_flags & IPATH_LINKACTIVE)
 392                                 signal_ib_event(dd, IB_EVENT_PORT_ERR);
 393                 }
 394                 if (ibstate == arm) {
 395                         dd->ipath_flags |= IPATH_LINKARMED;
 396                         dd->ipath_flags &= ~(IPATH_LINKUNK |
 397                                 IPATH_LINKINIT | IPATH_LINKDOWN |
 398                                 IPATH_LINKACTIVE | IPATH_NOCABLE);
 399                         ipath_hol_down(dd);
 400                 } else  if (ibstate == init) {
 401                         /*
 402                          * set INIT and DOWN.  Down is checked by
 403                          * most of the other code, but INIT is
 404                          * useful to know in a few places.
 405                          */
 406                         dd->ipath_flags |= IPATH_LINKINIT |
 407                                 IPATH_LINKDOWN;
 408                         dd->ipath_flags &= ~(IPATH_LINKUNK |
 409                                 IPATH_LINKARMED | IPATH_LINKACTIVE |
 410                                 IPATH_NOCABLE);
 411                         ipath_hol_down(dd);
 412                 } else {  /* active */
 413                         dd->ipath_lastlinkrecov = ipath_snap_cntr(dd,
 414                                 dd->ipath_cregs->cr_iblinkerrrecovcnt);
 415                         *dd->ipath_statusp |=
 416                                 IPATH_STATUS_IB_READY | IPATH_STATUS_IB_CONF;
 417                         dd->ipath_flags |= IPATH_LINKACTIVE;
 418                         dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
 419                                 | IPATH_LINKDOWN | IPATH_LINKARMED |
 420                                 IPATH_NOCABLE);
 421                         signal_ib_event(dd, IB_EVENT_PORT_ACTIVE);
 422                         /* LED active not handled in chip _f_updown */
 423                         dd->ipath_f_setextled(dd, lstate, ltstate);
 424                         ipath_hol_up(dd);
 425                 }
 426
 427                 /*
 428                  * print after we've already done the work, so as not to
 429                  * delay the state changes and notifications, for debugging
 430                  */
 431                 if (lstate == lastlstate)
 432                         ipath_cdbg(LINKVERB, "Unchanged from last: %s "
 433                                 "(%x)\n", ib_linkstate(dd, ibcs), ibstate);
 434                 else
 435                         ipath_cdbg(VERBOSE, "Unit %u: link up to %s %s (%x)\n",
 436                                   dd->ipath_unit, ib_linkstate(dd, ibcs),
 437                                   ipath_ibcstatus_str[ltstate],  ibstate);
 438         } else { /* down */
 439                 if (dd->ipath_flags & IPATH_LINKACTIVE)
 440                         signal_ib_event(dd, IB_EVENT_PORT_ERR);
 441                 dd->ipath_flags |= IPATH_LINKDOWN;
 442                 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
 443                                      | IPATH_LINKACTIVE |
 444                                      IPATH_LINKARMED);
 445                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
 446                 dd->ipath_lli_counter = 0;
 447
 448                 if (lastlstate != INFINIPATH_IBCS_L_STATE_DOWN)
 449                         ipath_cdbg(VERBOSE, "Unit %u link state down "
 450                                    "(state 0x%x), from %s\n",
 451                                    dd->ipath_unit, lstate,
 452                                    ib_linkstate(dd, dd->ipath_lastibcstat));
 453                 else
 454                         ipath_cdbg(LINKVERB, "Unit %u link state changed "
 455                                    "to %s (0x%x) from down (%x)\n",
 456                                    dd->ipath_unit,
 457                                    ipath_ibcstatus_str[ltstate],
 458                                    ibstate, lastlstate);
 459         }
 460
 461 skip_ibchange:
 462         dd->ipath_lastibcstat = ibcs;
 463 }
 464
 465 static void handle_supp_msgs(struct ipath_devdata *dd,
 466                              unsigned supp_msgs, char *msg, int msgsz)
 467 {
 468         /*
 469          * Print the message unless it's ibc status change only, which
 470          * happens so often we never want to count it.
 471          */
 472         if (dd->ipath_lasterror & ~INFINIPATH_E_IBSTATUSCHANGED) {
 473                 int iserr;
 474                 iserr = ipath_decode_err(msg, msgsz,
 475                                          dd->ipath_lasterror &
 476                                          ~INFINIPATH_E_IBSTATUSCHANGED);
 477                 if (dd->ipath_lasterror &
 478                         ~(INFINIPATH_E_RRCVEGRFULL |
 479                         INFINIPATH_E_RRCVHDRFULL | INFINIPATH_E_PKTERRS))
 480                         ipath_dev_err(dd, "Suppressed %u messages for "
 481                                       "fast-repeating errors (%s) (%llx)\n",
 482                                       supp_msgs, msg,
 483                                       (unsigned long long)
 484                                       dd->ipath_lasterror);
 485                 else {
 486                         /*
 487                          * rcvegrfull and rcvhdrqfull are "normal", for some
 488                          * types of processes (mostly benchmarks) that send
 489                          * huge numbers of messages, while not processing
 490                          * them. So only complain about these at debug
 491                          * level.
 492                          */
 493                         if (iserr)
 494                                 ipath_dbg("Suppressed %u messages for %s\n",
 495                                           supp_msgs, msg);
 496                         else
 497                                 ipath_cdbg(ERRPKT,
 498                                         "Suppressed %u messages for %s\n",
 499                                           supp_msgs, msg);
 500                 }
 501         }
 502 }
 503
 504 static unsigned handle_frequent_errors(struct ipath_devdata *dd,
 505                                        ipath_err_t errs, char *msg,
 506                                        int msgsz, int *noprint)
 507 {
 508         unsigned long nc;
 509         static unsigned long nextmsg_time;
 510         static unsigned nmsgs, supp_msgs;
 511
 512         /*
 513          * Throttle back "fast" messages to no more than 10 per 5 seconds.
 514          * This isn't perfect, but it's a reasonable heuristic. If we get
 515          * more than 10, give a 6x longer delay.
 516          */
 517         nc = jiffies;
 518         if (nmsgs > 10) {
 519                 if (time_before(nc, nextmsg_time)) {
 520                         *noprint = 1;
 521                         if (!supp_msgs++)
 522                                 nextmsg_time = nc + HZ * 3;
 523                 }
 524                 else if (supp_msgs) {
 525                         handle_supp_msgs(dd, supp_msgs, msg, msgsz);
 526                         supp_msgs = 0;
 527                         nmsgs = 0;
 528                 }
 529         }
 530         else if (!nmsgs++ || time_after(nc, nextmsg_time))
 531                 nextmsg_time = nc + HZ / 2;
 532
 533         return supp_msgs;
 534 }
 535
 536 static int handle_errors(struct ipath_devdata *dd, ipath_err_t errs)
 537 {
 538         char msg[128];
 539         u64 ignore_this_time = 0;
 540         int i, iserr = 0;
 541         int chkerrpkts = 0, noprint = 0;
 542         unsigned supp_msgs;
 543         int log_idx;
 544
 545         supp_msgs = handle_frequent_errors(dd, errs, msg, sizeof msg, &noprint);
 546
 547         /* don't report errors that are masked */
 548         errs &= ~dd->ipath_maskederrs;
 549
 550         /* do these first, they are most important */
 551         if (errs & INFINIPATH_E_HARDWARE) {
 552                 /* reuse same msg buf */
 553                 dd->ipath_f_handle_hwerrors(dd, msg, sizeof msg);
 554         } else {
 555                 u64 mask;
 556                 for (log_idx = 0; log_idx < IPATH_EEP_LOG_CNT; ++log_idx) {
 557                         mask = dd->ipath_eep_st_masks[log_idx].errs_to_log;
 558                         if (errs & mask)
 559                                 ipath_inc_eeprom_err(dd, log_idx, 1);
 560                 }
 561         }
 562
 563         if (!noprint && (errs & ~dd->ipath_e_bitsextant))
 564                 ipath_dev_err(dd, "error interrupt with unknown errors "
 565                               "%llx set\n", (unsigned long long)
 566                               (errs & ~dd->ipath_e_bitsextant));
 567
 568         if (errs & E_SUM_ERRS)
 569                 ignore_this_time = handle_e_sum_errs(dd, errs);
 570         else if ((errs & E_SUM_LINK_PKTERRS) &&
 571             !(dd->ipath_flags & IPATH_LINKACTIVE)) {
 572                 /*
 573                  * This can happen when SMA is trying to bring the link
 574                  * up, but the IB link changes state at the "wrong" time.
 575                  * The IB logic then complains that the packet isn't
 576                  * valid.  We don't want to confuse people, so we just
 577                  * don't print them, except at debug
 578                  */
 579                 ipath_dbg("Ignoring packet errors %llx, because link not "
 580                           "ACTIVE\n", (unsigned long long) errs);
 581                 ignore_this_time = errs & E_SUM_LINK_PKTERRS;
 582         }
 583
 584         if (supp_msgs == 250000) {
 585                 int s_iserr;
 586                 /*
 587                  * It's not entirely reasonable assuming that the errors set
 588                  * in the last clear period are all responsible for the
 589                  * problem, but the alternative is to assume it's the only
 590                  * ones on this particular interrupt, which also isn't great
 591                  */
 592                 dd->ipath_maskederrs |= dd->ipath_lasterror | errs;
 593                 dd->ipath_errormask &= ~dd->ipath_maskederrs;
 594                 ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
 595                         dd->ipath_errormask);
 596                 s_iserr = ipath_decode_err(msg, sizeof msg,
 597                         dd->ipath_maskederrs);
 598
 599                 if (dd->ipath_maskederrs &
 600                         ~(INFINIPATH_E_RRCVEGRFULL |
 601                         INFINIPATH_E_RRCVHDRFULL | INFINIPATH_E_PKTERRS))
 602                         ipath_dev_err(dd, "Temporarily disabling "
 603                             "error(s) %llx reporting; too frequent (%s)\n",
 604                                 (unsigned long long)dd->ipath_maskederrs,
 605                                 msg);
 606                 else {
 607                         /*
 608                          * rcvegrfull and rcvhdrqfull are "normal",
 609                          * for some types of processes (mostly benchmarks)
 610                          * that send huge numbers of messages, while not
 611                          * processing them.  So only complain about
 612                          * these at debug level.
 613                          */
 614                         if (s_iserr)
 615                                 ipath_dbg("Temporarily disabling reporting "
 616                                     "too frequent queue full errors (%s)\n",
 617                                     msg);
 618                         else
 619                                 ipath_cdbg(ERRPKT,
 620                                     "Temporarily disabling reporting too"
 621                                     " frequent packet errors (%s)\n",
 622                                     msg);
 623                 }
 624
 625                 /*
 626                  * Re-enable the masked errors after around 3 minutes.  in
 627                  * ipath_get_faststats().  If we have a series of fast
 628                  * repeating but different errors, the interval will keep
 629                  * stretching out, but that's OK, as that's pretty
 630                  * catastrophic.
 631                  */
 632                 dd->ipath_unmasktime = jiffies + HZ * 180;
 633         }
 634
 635         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, errs);
 636         if (ignore_this_time)
 637                 errs &= ~ignore_this_time;
 638         if (errs & ~dd->ipath_lasterror) {
 639                 errs &= ~dd->ipath_lasterror;
 640                 /* never suppress duplicate hwerrors or ibstatuschange */
 641                 dd->ipath_lasterror |= errs &
 642                         ~(INFINIPATH_E_HARDWARE |
 643                           INFINIPATH_E_IBSTATUSCHANGED);
 644         }
 645
 646         /* likely due to cancel, so suppress */
 647         if ((errs & (INFINIPATH_E_SPKTLEN | INFINIPATH_E_SPIOARMLAUNCH)) &&
 648                 dd->ipath_lastcancel > jiffies) {
 649                 ipath_dbg("Suppressed armlaunch/spktlen after error send cancel\n");
 650                 errs &= ~(INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SPKTLEN);
 651         }
 652
 653         if (!errs)
 654                 return 0;
 655
 656         if (!noprint)
 657                 /*
 658                  * the ones we mask off are handled specially below or above
 659                  */
 660                 ipath_decode_err(msg, sizeof msg,
 661                                  errs & ~(INFINIPATH_E_IBSTATUSCHANGED |
 662                                           INFINIPATH_E_RRCVEGRFULL |
 663                                           INFINIPATH_E_RRCVHDRFULL |
 664                                           INFINIPATH_E_HARDWARE));
 665         else
 666                 /* so we don't need if (!noprint) at strlcat's below */
 667                 *msg = 0;
 668
 669         if (errs & E_SUM_PKTERRS) {
 670                 ipath_stats.sps_pkterrs++;
 671                 chkerrpkts = 1;
 672         }
 673         if (errs & E_SUM_ERRS)
 674                 ipath_stats.sps_errs++;
 675
 676         if (errs & (INFINIPATH_E_RICRC | INFINIPATH_E_RVCRC)) {
 677                 ipath_stats.sps_crcerrs++;
 678                 chkerrpkts = 1;
 679         }
 680         iserr = errs & ~(E_SUM_PKTERRS | INFINIPATH_E_PKTERRS);
 681
 682
 683         /*
 684          * We don't want to print these two as they happen, or we can make
 685          * the situation even worse, because it takes so long to print
 686          * messages to serial consoles.  Kernel ports get printed from
 687          * fast_stats, no more than every 5 seconds, user ports get printed
 688          * on close
 689          */
 690         if (errs & INFINIPATH_E_RRCVHDRFULL) {
 691                 u32 hd, tl;
 692                 ipath_stats.sps_hdrqfull++;
 693                 for (i = 0; i < dd->ipath_cfgports; i++) {
 694                         struct ipath_portdata *pd = dd->ipath_pd[i];
 695                         if (i == 0) {
 696                                 hd = pd->port_head;
 697                                 tl = (u32) le64_to_cpu(
 698                                         *dd->ipath_hdrqtailptr);
 699                         } else if (pd && pd->port_cnt &&
 700                                    pd->port_rcvhdrtail_kvaddr) {
 701                                 /*
 702                                  * don't report same point multiple times,
 703                                  * except kernel
 704                                  */
 705                                 tl = *(u64 *) pd->port_rcvhdrtail_kvaddr;
 706                                 if (tl == pd->port_lastrcvhdrqtail)
 707                                         continue;
 708                                 hd = ipath_read_ureg32(dd, ur_rcvhdrhead,
 709                                                        i);
 710                         } else
 711                                 continue;
 712                         if (hd == (tl + 1) ||
 713                             (!hd && tl == dd->ipath_hdrqlast)) {
 714                                 if (i == 0)
 715                                         chkerrpkts = 1;
 716                                 pd->port_lastrcvhdrqtail = tl;
 717                                 pd->port_hdrqfull++;
 718                                 /* flush hdrqfull so that poll() sees it */
 719                                 wmb();
 720                                 wake_up_interruptible(&pd->port_wait);
 721                         }
 722                 }
 723         }
 724         if (errs & INFINIPATH_E_RRCVEGRFULL) {
 725                 struct ipath_portdata *pd = dd->ipath_pd[0];
 726
 727                 /*
 728                  * since this is of less importance and not likely to
 729                  * happen without also getting hdrfull, only count
 730                  * occurrences; don't check each port (or even the kernel
 731                  * vs user)
 732                  */
 733                 ipath_stats.sps_etidfull++;
 734                 if (pd->port_head !=
 735                     (u32) le64_to_cpu(*dd->ipath_hdrqtailptr))
 736                         chkerrpkts = 1;
 737         }
 738
 739         /*
 740          * do this before IBSTATUSCHANGED, in case both bits set in a single
 741          * interrupt; we want the STATUSCHANGE to "win", so we do our
 742          * internal copy of state machine correctly
 743          */
 744         if (errs & INFINIPATH_E_RIBLOSTLINK) {
 745                 /*
 746                  * force through block below
 747                  */
 748                 errs |= INFINIPATH_E_IBSTATUSCHANGED;
 749                 ipath_stats.sps_iblink++;
 750                 dd->ipath_flags |= IPATH_LINKDOWN;
 751                 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
 752                                      | IPATH_LINKARMED | IPATH_LINKACTIVE);
 753                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
 754
 755                 ipath_dbg("Lost link, link now down (%s)\n",
 756                         ipath_ibcstatus_str[ipath_read_kreg64(dd,
 757                         dd->ipath_kregs->kr_ibcstatus) & 0xf]);
 758         }
 759         if (errs & INFINIPATH_E_IBSTATUSCHANGED)
 760                 handle_e_ibstatuschanged(dd, errs);
 761
 762         if (errs & INFINIPATH_E_RESET) {
 763                 if (!noprint)
 764                         ipath_dev_err(dd, "Got reset, requires re-init "
 765                                       "(unload and reload driver)\n");
 766                 dd->ipath_flags &= ~IPATH_INITTED;      /* needs re-init */
 767                 /* mark as having had error */
 768                 *dd->ipath_statusp |= IPATH_STATUS_HWERROR;
 769                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_CONF;
 770         }
 771
 772         if (!noprint && *msg) {
 773                 if (iserr)
 774                         ipath_dev_err(dd, "%s error\n", msg);
 775                 else
 776                         dev_info(&dd->pcidev->dev, "%s packet problems\n",
 777                                 msg);
 778         }
 779         if (dd->ipath_state_wanted & dd->ipath_flags) {
 780                 ipath_cdbg(VERBOSE, "driver wanted state %x, iflags now %x, "
 781                            "waking\n", dd->ipath_state_wanted,
 782                            dd->ipath_flags);
 783                 wake_up_interruptible(&ipath_state_wait);
 784         }
 785
 786         return chkerrpkts;
 787 }
 788
 789
 790 /*
 791  * try to cleanup as much as possible for anything that might have gone
 792  * wrong while in freeze mode, such as pio buffers being written by user
 793  * processes (causing armlaunch), send errors due to going into freeze mode,
 794  * etc., and try to avoid causing extra interrupts while doing so.
 795  * Forcibly update the in-memory pioavail register copies after cleanup
 796  * because the chip won't do it for anything changing while in freeze mode
 797  * (we don't want to wait for the next pio buffer state change).
 798  * Make sure that we don't lose any important interrupts by using the chip
 799  * feature that says that writing 0 to a bit in *clear that is set in
 800  * *status will cause an interrupt to be generated again (if allowed by
 801  * the *mask value).
 802  */
 803 void ipath_clear_freeze(struct ipath_devdata *dd)
 804 {
 805         int i, im;
 806         u64 val;
 807         unsigned long flags;
 808
 809         /* disable error interrupts, to avoid confusion */
 810         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask, 0ULL);
 811
 812         /* also disable interrupts; errormask is sometimes overwriten */
 813         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
 814
 815         /*
 816          * clear all sends, because they have may been
 817          * completed by usercode while in freeze mode, and
 818          * therefore would not be sent, and eventually
 819          * might cause the process to run out of bufs
 820          */
 821         ipath_cancel_sends(dd, 0);
 822         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
 823                          dd->ipath_control);
 824
 825         /* ensure pio avail updates continue */
 826         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
 827         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 828                  dd->ipath_sendctrl & ~INFINIPATH_S_PIOBUFAVAILUPD);
 829         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 830         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 831                          dd->ipath_sendctrl);
 832         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 833         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
 834
 835         /*
 836          * We just enabled pioavailupdate, so dma copy is almost certainly
 837          * not yet right, so read the registers directly.  Similar to init
 838          */
 839         for (i = 0; i < dd->ipath_pioavregs; i++) {
 840                 /* deal with 6110 chip bug */
 841                 im = (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS)) ?
 842                         i ^ 1 : i;
 843                 val = ipath_read_kreg64(dd, (0x1000 / sizeof(u64)) + im);
 844                 dd->ipath_pioavailregs_dma[i] = cpu_to_le64(val);
 845                 dd->ipath_pioavailshadow[i] = val;
 846         }
 847
 848         /*
 849          * force new interrupt if any hwerr, error or interrupt bits are
 850          * still set, and clear "safe" send packet errors related to freeze
 851          * and cancelling sends.  Re-enable error interrupts before possible
 852          * force of re-interrupt on pending interrupts.
 853          */
 854         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear, 0ULL);
 855         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
 856                 E_SPKT_ERRS_IGNORE);
 857         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
 858                 dd->ipath_errormask);
 859         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, -1LL);
 860         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL);
 861 }
 862
 863
 864 /* this is separate to allow for better optimization of ipath_intr() */
 865
 866 static noinline void ipath_bad_intr(struct ipath_devdata *dd, u32 *unexpectp)
 867 {
 868         /*
 869          * sometimes happen during driver init and unload, don't want
 870          * to process any interrupts at that point
 871          */
 872
 873         /* this is just a bandaid, not a fix, if something goes badly
 874          * wrong */
 875         if (++*unexpectp > 100) {
 876                 if (++*unexpectp > 105) {
 877                         /*
 878                          * ok, we must be taking somebody else's interrupts,
 879                          * due to a messed up mptable and/or PIRQ table, so
 880                          * unregister the interrupt.  We've seen this during
 881                          * linuxbios development work, and it may happen in
 882                          * the future again.
 883                          */
 884                         if (dd->pcidev && dd->ipath_irq) {
 885                                 ipath_dev_err(dd, "Now %u unexpected "
 886                                               "interrupts, unregistering "
 887                                               "interrupt handler\n",
 888                                               *unexpectp);
 889                                 ipath_dbg("free_irq of irq %d\n",
 890                                           dd->ipath_irq);
 891                                 dd->ipath_f_free_irq(dd);
 892                         }
 893                 }
 894                 if (ipath_read_ireg(dd, dd->ipath_kregs->kr_intmask)) {
 895                         ipath_dev_err(dd, "%u unexpected interrupts, "
 896                                       "disabling interrupts completely\n",
 897                                       *unexpectp);
 898                         /*
 899                          * disable all interrupts, something is very wrong
 900                          */
 901                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask,
 902                                          0ULL);
 903                 }
 904         } else if (*unexpectp > 1)
 905                 ipath_dbg("Interrupt when not ready, should not happen, "
 906                           "ignoring\n");
 907 }
 908
 909 static noinline void ipath_bad_regread(struct ipath_devdata *dd)
 910 {
 911         static int allbits;
 912
 913         /* separate routine, for better optimization of ipath_intr() */
 914
 915         /*
 916          * We print the message and disable interrupts, in hope of
 917          * having a better chance of debugging the problem.
 918          */
 919         ipath_dev_err(dd,
 920                       "Read of interrupt status failed (all bits set)\n");
 921         if (allbits++) {
 922                 /* disable all interrupts, something is very wrong */
 923                 ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
 924                 if (allbits == 2) {
 925                         ipath_dev_err(dd, "Still bad interrupt status, "
 926                                       "unregistering interrupt\n");
 927                         dd->ipath_f_free_irq(dd);
 928                 } else if (allbits > 2) {
 929                         if ((allbits % 10000) == 0)
 930                                 printk(".");
 931                 } else
 932                         ipath_dev_err(dd, "Disabling interrupts, "
 933                                       "multiple errors\n");
 934         }
 935 }
 936
 937 static void handle_layer_pioavail(struct ipath_devdata *dd)
 938 {
 939         unsigned long flags;
 940         int ret;
 941
 942         ret = ipath_ib_piobufavail(dd->verbs_dev);
 943         if (ret > 0)
 944                 goto set;
 945
 946         return;
 947 set:
 948         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
 949         dd->ipath_sendctrl |= INFINIPATH_S_PIOINTBUFAVAIL;
 950         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 951                          dd->ipath_sendctrl);
 952         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 953         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
 954 }
 955
 956 /*
 957  * Handle receive interrupts for user ports; this means a user
 958  * process was waiting for a packet to arrive, and didn't want
 959  * to poll
 960  */
 961 static void handle_urcv(struct ipath_devdata *dd, u32 istat)
 962 {
 963         u64 portr;
 964         int i;
 965         int rcvdint = 0;
 966
 967         /*
 968          * test_and_clear_bit(IPATH_PORT_WAITING_RCV) and
 969          * test_and_clear_bit(IPATH_PORT_WAITING_URG) below
 970          * would both like timely updates of the bits so that
 971          * we don't pass them by unnecessarily.  the rmb()
 972          * here ensures that we see them promptly -- the
 973          * corresponding wmb()'s are in ipath_poll_urgent()
 974          * and ipath_poll_next()...
 975          */
 976         rmb();
 977         portr = ((istat >> INFINIPATH_I_RCVAVAIL_SHIFT) &
 978                  dd->ipath_i_rcvavail_mask)
 979                 | ((istat >> INFINIPATH_I_RCVURG_SHIFT) &
 980                    dd->ipath_i_rcvurg_mask);
 981         for (i = 1; i < dd->ipath_cfgports; i++) {
 982                 struct ipath_portdata *pd = dd->ipath_pd[i];
 983                 if (portr & (1 << i) && pd && pd->port_cnt) {
 984                         if (test_and_clear_bit(IPATH_PORT_WAITING_RCV,
 985                                                &pd->port_flag)) {
 986                                 clear_bit(i + dd->ipath_r_intravail_shift,
 987                                           &dd->ipath_rcvctrl);
 988                                 wake_up_interruptible(&pd->port_wait);
 989                                 rcvdint = 1;
 990                         } else if (test_and_clear_bit(IPATH_PORT_WAITING_URG,
 991                                                       &pd->port_flag)) {
 992                                 pd->port_urgent++;
 993                                 wake_up_interruptible(&pd->port_wait);
 994                         }
 995                 }
 996         }
 997         if (rcvdint) {
 998                 /* only want to take one interrupt, so turn off the rcv
 999                  * interrupt for all the ports that we did the wakeup on
1000                  * (but never for kernel port)
1001                  */
1002                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
1003                                  dd->ipath_rcvctrl);
1004         }
1005 }
1006
1007 irqreturn_t ipath_intr(int irq, void *data)
1008 {
1009         struct ipath_devdata *dd = data;
1010         u32 istat, chk0rcv = 0;
1011         ipath_err_t estat = 0;
1012         irqreturn_t ret;
1013         static unsigned unexpected = 0;
1014         static const u32 port0rbits = (1U<<INFINIPATH_I_RCVAVAIL_SHIFT) |
1015                  (1U<<INFINIPATH_I_RCVURG_SHIFT);
1016
1017         ipath_stats.sps_ints++;
1018
1019         if (dd->ipath_int_counter != (u32) -1)
1020                 dd->ipath_int_counter++;
1021
1022         if (!(dd->ipath_flags & IPATH_PRESENT)) {
1023                 /*
1024                  * This return value is not great, but we do not want the
1025                  * interrupt core code to remove our interrupt handler
1026                  * because we don't appear to be handling an interrupt
1027                  * during a chip reset.
1028                  */
1029                 return IRQ_HANDLED;
1030         }
1031
1032         /*
1033          * this needs to be flags&initted, not statusp, so we keep
1034          * taking interrupts even after link goes down, etc.
1035          * Also, we *must* clear the interrupt at some point, or we won't
1036          * take it again, which can be real bad for errors, etc...
1037          */
1038
1039         if (!(dd->ipath_flags & IPATH_INITTED)) {
1040                 ipath_bad_intr(dd, &unexpected);
1041                 ret = IRQ_NONE;
1042                 goto bail;
1043         }
1044
1045         istat = ipath_read_ireg(dd, dd->ipath_kregs->kr_intstatus);
1046
1047         if (unlikely(!istat)) {
1048                 ipath_stats.sps_nullintr++;
1049                 ret = IRQ_NONE; /* not our interrupt, or already handled */
1050                 goto bail;
1051         }
1052         if (unlikely(istat == -1)) {
1053                 ipath_bad_regread(dd);
1054                 /* don't know if it was our interrupt or not */
1055                 ret = IRQ_NONE;
1056                 goto bail;
1057         }
1058
1059         if (unexpected)
1060                 unexpected = 0;
1061
1062         if (unlikely(istat & ~dd->ipath_i_bitsextant))
1063                 ipath_dev_err(dd,
1064                               "interrupt with unknown interrupts %x set\n",
1065                               istat & (u32) ~ dd->ipath_i_bitsextant);
1066         else
1067                 ipath_cdbg(VERBOSE, "intr stat=0x%x\n", istat);
1068
1069         if (unlikely(istat & INFINIPATH_I_ERROR)) {
1070                 ipath_stats.sps_errints++;
1071                 estat = ipath_read_kreg64(dd,
1072                                           dd->ipath_kregs->kr_errorstatus);
1073                 if (!estat)
1074                         dev_info(&dd->pcidev->dev, "error interrupt (%x), "
1075                                  "but no error bits set!\n", istat);
1076                 else if (estat == -1LL)
1077                         /*
1078                          * should we try clearing all, or hope next read
1079                          * works?
1080                          */
1081                         ipath_dev_err(dd, "Read of error status failed "
1082                                       "(all bits set); ignoring\n");
1083                 else
1084                         if (handle_errors(dd, estat))
1085                                 /* force calling ipath_kreceive() */
1086                                 chk0rcv = 1;
1087         }
1088
1089         if (istat & INFINIPATH_I_GPIO) {
1090                 /*
1091                  * GPIO interrupts fall in two broad classes:
1092                  * GPIO_2 indicates (on some HT4xx boards) that a packet
1093                  *        has arrived for Port 0. Checking for this
1094                  *        is controlled by flag IPATH_GPIO_INTR.
1095                  * GPIO_3..5 on IBA6120 Rev2 and IBA6110 Rev4 chips indicate
1096                  *        errors that we need to count. Checking for this
1097                  *        is controlled by flag IPATH_GPIO_ERRINTRS.
1098                  */
1099                 u32 gpiostatus;
1100                 u32 to_clear = 0;
1101
1102                 gpiostatus = ipath_read_kreg32(
1103                         dd, dd->ipath_kregs->kr_gpio_status);
1104                 /* First the error-counter case.
1105                  */
1106                 if ((gpiostatus & IPATH_GPIO_ERRINTR_MASK) &&
1107                     (dd->ipath_flags & IPATH_GPIO_ERRINTRS)) {
1108                         /* want to clear the bits we see asserted. */
1109                         to_clear |= (gpiostatus & IPATH_GPIO_ERRINTR_MASK);
1110
1111                         /*
1112                          * Count appropriately, clear bits out of our copy,
1113                          * as they have been "handled".
1114                          */
1115                         if (gpiostatus & (1 << IPATH_GPIO_RXUVL_BIT)) {
1116                                 ipath_dbg("FlowCtl on UnsupVL\n");
1117                                 dd->ipath_rxfc_unsupvl_errs++;
1118                         }
1119                         if (gpiostatus & (1 << IPATH_GPIO_OVRUN_BIT)) {
1120                                 ipath_dbg("Overrun Threshold exceeded\n");
1121                                 dd->ipath_overrun_thresh_errs++;
1122                         }
1123                         if (gpiostatus & (1 << IPATH_GPIO_LLI_BIT)) {
1124                                 ipath_dbg("Local Link Integrity error\n");
1125                                 dd->ipath_lli_errs++;
1126                         }
1127                         gpiostatus &= ~IPATH_GPIO_ERRINTR_MASK;
1128                 }
1129                 /* Now the Port0 Receive case */
1130                 if ((gpiostatus & (1 << IPATH_GPIO_PORT0_BIT)) &&
1131                     (dd->ipath_flags & IPATH_GPIO_INTR)) {
1132                         /*
1133                          * GPIO status bit 2 is set, and we expected it.
1134                          * clear it and indicate in p0bits.
1135                          * This probably only happens if a Port0 pkt
1136                          * arrives at _just_ the wrong time, and we
1137                          * handle that by seting chk0rcv;
1138                          */
1139                         to_clear |= (1 << IPATH_GPIO_PORT0_BIT);
1140                         gpiostatus &= ~(1 << IPATH_GPIO_PORT0_BIT);
1141                         chk0rcv = 1;
1142                 }
1143                 if (gpiostatus) {
1144                         /*
1145                          * Some unexpected bits remain. If they could have
1146                          * caused the interrupt, complain and clear.
1147                          * To avoid repetition of this condition, also clear
1148                          * the mask. It is almost certainly due to error.
1149                          */
1150                         const u32 mask = (u32) dd->ipath_gpio_mask;
1151
1152                         if (mask & gpiostatus) {
1153                                 ipath_dbg("Unexpected GPIO IRQ bits %x\n",
1154                                   gpiostatus & mask);
1155                                 to_clear |= (gpiostatus & mask);
1156                                 dd->ipath_gpio_mask &= ~(gpiostatus & mask);
1157                                 ipath_write_kreg(dd,
1158                                         dd->ipath_kregs->kr_gpio_mask,
1159                                         dd->ipath_gpio_mask);
1160                         }
1161                 }
1162                 if (to_clear) {
1163                         ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear,
1164                                         (u64) to_clear);
1165                 }
1166         }
1167         chk0rcv |= istat & port0rbits;
1168
1169         /*
1170          * Clear the interrupt bits we found set, unless they are receive
1171          * related, in which case we already cleared them above, and don't
1172          * want to clear them again, because we might lose an interrupt.
1173          * Clear it early, so we "know" know the chip will have seen this by
1174          * the time we process the queue, and will re-interrupt if necessary.
1175          * The processor itself won't take the interrupt again until we return.
1176          */
1177         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, istat);
1178
1179         /*
1180          * handle port0 receive  before checking for pio buffers available,
1181          * since receives can overflow; piobuf waiters can afford a few
1182          * extra cycles, since they were waiting anyway, and user's waiting
1183          * for receive are at the bottom.
1184          */
1185         if (chk0rcv) {
1186                 ipath_kreceive(dd->ipath_pd[0]);
1187                 istat &= ~port0rbits;
1188         }
1189
1190         if (istat & ((dd->ipath_i_rcvavail_mask <<
1191                       INFINIPATH_I_RCVAVAIL_SHIFT)
1192                      | (dd->ipath_i_rcvurg_mask <<
1193                         INFINIPATH_I_RCVURG_SHIFT)))
1194                 handle_urcv(dd, istat);
1195
1196         if (istat & INFINIPATH_I_SPIOBUFAVAIL) {
1197                 unsigned long flags;
1198
1199                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1200                 dd->ipath_sendctrl &= ~INFINIPATH_S_PIOINTBUFAVAIL;
1201                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1202                                  dd->ipath_sendctrl);
1203                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1204                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1205
1206                 handle_layer_pioavail(dd);
1207         }
1208
1209         ret = IRQ_HANDLED;
1210
1211 bail:
1212         return ret;
1213 }