drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include "drmP.h"
  32 #include "drm.h"
  33 #include "drm_crtc.h"
  34 #include "drm_edid.h"
  35 #include "intel_drv.h"
  36 #include "i915_drm.h"
  37 #include "i915_drv.h"
  38 #include "intel_sdvo_regs.h"
  39
  40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  41 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  43 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
  44
  45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  46                          SDVO_TV_MASK)
  47
  48 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  49 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  50 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  51
  52
  53 static const char *tv_format_names[] = {
  54         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  55         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  56         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  57         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  58         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  59         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  60         "SECAM_60"
  61 };
  62
  63 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
  64
  65 struct intel_sdvo {
  66         struct intel_encoder base;
  67
  68         struct i2c_adapter *i2c;
  69         u8 slave_addr;
  70
  71         struct i2c_adapter ddc;
  72
  73         /* Register for the SDVO device: SDVOB or SDVOC */
  74         int sdvo_reg;
  75
  76         /* Active outputs controlled by this SDVO output */
  77         uint16_t controlled_output;
  78
  79         /*
  80          * Capabilities of the SDVO device returned by
  81          * i830_sdvo_get_capabilities()
  82          */
  83         struct intel_sdvo_caps caps;
  84
  85         /* Pixel clock limitations reported by the SDVO device, in kHz */
  86         int pixel_clock_min, pixel_clock_max;
  87
  88         /*
  89         * For multiple function SDVO device,
  90         * this is for current attached outputs.
  91         */
  92         uint16_t attached_output;
  93
  94         /**
  95          * This is set if we're going to treat the device as TV-out.
  96          *
  97          * While we have these nice friendly flags for output types that ought
  98          * to decide this for us, the S-Video output on our HDMI+S-Video card
  99          * shows up as RGB1 (VGA).
 100          */
 101         bool is_tv;
 102
 103         /* This is for current tv format name */
 104         int tv_format_index;
 105
 106         /**
 107          * This is set if we treat the device as HDMI, instead of DVI.
 108          */
 109         bool is_hdmi;
 110         bool has_audio;
 111
 112         /**
 113          * This is set if we detect output of sdvo device as LVDS and
 114          * have a valid fixed mode to use with the panel.
 115          */
 116         bool is_lvds;
 117
 118         /**
 119          * This is sdvo fixed pannel mode pointer
 120          */
 121         struct drm_display_mode *sdvo_lvds_fixed_mode;
 122
 123         /*
 124          * supported encoding mode, used to determine whether HDMI is
 125          * supported
 126          */
 127         struct intel_sdvo_encode encode;
 128
 129         /* DDC bus used by this SDVO encoder */
 130         uint8_t ddc_bus;
 131
 132         /* Input timings for adjusted_mode */
 133         struct intel_sdvo_dtd input_dtd;
 134 };
 135
 136 struct intel_sdvo_connector {
 137         struct intel_connector base;
 138
 139         /* Mark the type of connector */
 140         uint16_t output_flag;
 141
 142         int force_audio;
 143
 144         /* This contains all current supported TV format */
 145         u8 tv_format_supported[TV_FORMAT_NUM];
 146         int   format_supported_num;
 147         struct drm_property *tv_format;
 148
 149         struct drm_property *force_audio_property;
 150
 151         /* add the property for the SDVO-TV */
 152         struct drm_property *left;
 153         struct drm_property *right;
 154         struct drm_property *top;
 155         struct drm_property *bottom;
 156         struct drm_property *hpos;
 157         struct drm_property *vpos;
 158         struct drm_property *contrast;
 159         struct drm_property *saturation;
 160         struct drm_property *hue;
 161         struct drm_property *sharpness;
 162         struct drm_property *flicker_filter;
 163         struct drm_property *flicker_filter_adaptive;
 164         struct drm_property *flicker_filter_2d;
 165         struct drm_property *tv_chroma_filter;
 166         struct drm_property *tv_luma_filter;
 167         struct drm_property *dot_crawl;
 168
 169         /* add the property for the SDVO-TV/LVDS */
 170         struct drm_property *brightness;
 171
 172         /* Add variable to record current setting for the above property */
 173         u32     left_margin, right_margin, top_margin, bottom_margin;
 174
 175         /* this is to get the range of margin.*/
 176         u32     max_hscan,  max_vscan;
 177         u32     max_hpos, cur_hpos;
 178         u32     max_vpos, cur_vpos;
 179         u32     cur_brightness, max_brightness;
 180         u32     cur_contrast,   max_contrast;
 181         u32     cur_saturation, max_saturation;
 182         u32     cur_hue,        max_hue;
 183         u32     cur_sharpness,  max_sharpness;
 184         u32     cur_flicker_filter,             max_flicker_filter;
 185         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 186         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 187         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 188         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 189         u32     cur_dot_crawl,  max_dot_crawl;
 190 };
 191
 192 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
 193 {
 194         return container_of(encoder, struct intel_sdvo, base.base);
 195 }
 196
 197 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 198 {
 199         return container_of(intel_attached_encoder(connector),
 200                             struct intel_sdvo, base);
 201 }
 202
 203 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 204 {
 205         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 206 }
 207
 208 static bool
 209 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 210 static bool
 211 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 212                               struct intel_sdvo_connector *intel_sdvo_connector,
 213                               int type);
 214 static bool
 215 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 216                                    struct intel_sdvo_connector *intel_sdvo_connector);
 217
 218 /**
 219  * Writes the SDVOB or SDVOC with the given value, but always writes both
 220  * SDVOB and SDVOC to work around apparent hardware issues (according to
 221  * comments in the BIOS).
 222  */
 223 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 224 {
 225         struct drm_device *dev = intel_sdvo->base.base.dev;
 226         struct drm_i915_private *dev_priv = dev->dev_private;
 227         u32 bval = val, cval = val;
 228         int i;
 229
 230         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
 231                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 232                 I915_READ(intel_sdvo->sdvo_reg);
 233                 return;
 234         }
 235
 236         if (intel_sdvo->sdvo_reg == SDVOB) {
 237                 cval = I915_READ(SDVOC);
 238         } else {
 239                 bval = I915_READ(SDVOB);
 240         }
 241         /*
 242          * Write the registers twice for luck. Sometimes,
 243          * writing them only once doesn't appear to 'stick'.
 244          * The BIOS does this too. Yay, magic
 245          */
 246         for (i = 0; i < 2; i++)
 247         {
 248                 I915_WRITE(SDVOB, bval);
 249                 I915_READ(SDVOB);
 250                 I915_WRITE(SDVOC, cval);
 251                 I915_READ(SDVOC);
 252         }
 253 }
 254
 255 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 256 {
 257         struct i2c_msg msgs[] = {
 258                 {
 259                         .addr = intel_sdvo->slave_addr,
 260                         .flags = 0,
 261                         .len = 1,
 262                         .buf = &addr,
 263                 },
 264                 {
 265                         .addr = intel_sdvo->slave_addr,
 266                         .flags = I2C_M_RD,
 267                         .len = 1,
 268                         .buf = ch,
 269                 }
 270         };
 271         int ret;
 272
 273         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 274                 return true;
 275
 276         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 277         return false;
 278 }
 279
 280 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 281 /** Mapping of command numbers to names, for debug output */
 282 static const struct _sdvo_cmd_name {
 283         u8 cmd;
 284         const char *name;
 285 } sdvo_cmd_names[] = {
 286     SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 287     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 288     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 289     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 290     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 291     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 292     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 293     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 294     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 295     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 296     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 297     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 298     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 299     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 300     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 301     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 302     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 303     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 304     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 305     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 306     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 307     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 308     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 309     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 310     SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 311     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 312     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 313     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 314     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 315     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 316     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 317     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 318     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 319     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 320     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 321     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 322     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 323     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 324     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 325     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 326     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 327     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 328     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 329
 330     /* Add the op code for SDVO enhancements */
 331     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 332     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 333     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 334     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 335     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 336     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 337     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 338     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 339     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 340     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 341     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 342     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 343     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 344     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 345     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 346     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 347     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 348     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 349     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 350     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 351     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 352     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 353     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 354     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 355     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 356     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 357     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 358     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 359     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 360     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 361     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 362     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 363     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 364     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 365     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 366     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 367     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 368     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 369     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 370     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 371     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 372     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 373     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 374     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 375
 376     /* HDMI op code */
 377     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 378     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 379     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 380     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 381     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 382     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 383     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 384     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 385     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 386     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 387     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 388     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 389     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 390     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 391     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 392     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 393     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 394     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 395     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 396     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 397 };
 398
 399 #define IS_SDVOB(reg)   (reg == SDVOB || reg == PCH_SDVOB)
 400 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
 401
 402 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 403                                    const void *args, int args_len)
 404 {
 405         int i;
 406
 407         DRM_DEBUG_KMS("%s: W: %02X ",
 408                                 SDVO_NAME(intel_sdvo), cmd);
 409         for (i = 0; i < args_len; i++)
 410                 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
 411         for (; i < 8; i++)
 412                 DRM_LOG_KMS("   ");
 413         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 414                 if (cmd == sdvo_cmd_names[i].cmd) {
 415                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
 416                         break;
 417                 }
 418         }
 419         if (i == ARRAY_SIZE(sdvo_cmd_names))
 420                 DRM_LOG_KMS("(%02X)", cmd);
 421         DRM_LOG_KMS("\n");
 422 }
 423
 424 static const char *cmd_status_names[] = {
 425         "Power on",
 426         "Success",
 427         "Not supported",
 428         "Invalid arg",
 429         "Pending",
 430         "Target not specified",
 431         "Scaling not supported"
 432 };
 433
 434 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 435                                  const void *args, int args_len)
 436 {
 437         u8 buf[args_len*2 + 2], status;
 438         struct i2c_msg msgs[args_len + 3];
 439         int i, ret;
 440
 441         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 442
 443         for (i = 0; i < args_len; i++) {
 444                 msgs[i].addr = intel_sdvo->slave_addr;
 445                 msgs[i].flags = 0;
 446                 msgs[i].len = 2;
 447                 msgs[i].buf = buf + 2 *i;
 448                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 449                 buf[2*i + 1] = ((u8*)args)[i];
 450         }
 451         msgs[i].addr = intel_sdvo->slave_addr;
 452         msgs[i].flags = 0;
 453         msgs[i].len = 2;
 454         msgs[i].buf = buf + 2*i;
 455         buf[2*i + 0] = SDVO_I2C_OPCODE;
 456         buf[2*i + 1] = cmd;
 457
 458         /* the following two are to read the response */
 459         status = SDVO_I2C_CMD_STATUS;
 460         msgs[i+1].addr = intel_sdvo->slave_addr;
 461         msgs[i+1].flags = 0;
 462         msgs[i+1].len = 1;
 463         msgs[i+1].buf = &status;
 464
 465         msgs[i+2].addr = intel_sdvo->slave_addr;
 466         msgs[i+2].flags = I2C_M_RD;
 467         msgs[i+2].len = 1;
 468         msgs[i+2].buf = &status;
 469
 470         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 471         if (ret < 0) {
 472                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 473                 return false;
 474         }
 475         if (ret != i+3) {
 476                 /* failure in I2C transfer */
 477                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 478                 return false;
 479         }
 480
 481         i = 3;
 482         while (status == SDVO_CMD_STATUS_PENDING && i--) {
 483                 if (!intel_sdvo_read_byte(intel_sdvo,
 484                                           SDVO_I2C_CMD_STATUS,
 485                                           &status))
 486                         return false;
 487         }
 488         if (status != SDVO_CMD_STATUS_SUCCESS) {
 489                 DRM_DEBUG_KMS("command returns response %s [%d]\n",
 490                               status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP ? cmd_status_names[status] : "???",
 491                               status);
 492                 return false;
 493         }
 494
 495         return true;
 496 }
 497
 498 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 499                                      void *response, int response_len)
 500 {
 501         u8 retry = 5;
 502         u8 status;
 503         int i;
 504
 505         /*
 506          * The documentation states that all commands will be
 507          * processed within 15µs, and that we need only poll
 508          * the status byte a maximum of 3 times in order for the
 509          * command to be complete.
 510          *
 511          * Check 5 times in case the hardware failed to read the docs.
 512          */
 513         do {
 514                 if (!intel_sdvo_read_byte(intel_sdvo,
 515                                           SDVO_I2C_CMD_STATUS,
 516                                           &status))
 517                         return false;
 518         } while (status == SDVO_CMD_STATUS_PENDING && --retry);
 519
 520         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
 521         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 522                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
 523         else
 524                 DRM_LOG_KMS("(??? %d)", status);
 525
 526         if (status != SDVO_CMD_STATUS_SUCCESS)
 527                 goto log_fail;
 528
 529         /* Read the command response */
 530         for (i = 0; i < response_len; i++) {
 531                 if (!intel_sdvo_read_byte(intel_sdvo,
 532                                           SDVO_I2C_RETURN_0 + i,
 533                                           &((u8 *)response)[i]))
 534                         goto log_fail;
 535                 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
 536         }
 537         DRM_LOG_KMS("\n");
 538         return true;
 539
 540 log_fail:
 541         DRM_LOG_KMS("\n");
 542         return false;
 543 }
 544
 545 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 546 {
 547         if (mode->clock >= 100000)
 548                 return 1;
 549         else if (mode->clock >= 50000)
 550                 return 2;
 551         else
 552                 return 4;
 553 }
 554
 555 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 556                                               u8 ddc_bus)
 557 {
 558         return intel_sdvo_write_cmd(intel_sdvo,
 559                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 560                                     &ddc_bus, 1);
 561 }
 562
 563 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 564 {
 565         return intel_sdvo_write_cmd(intel_sdvo, cmd, data, len);
 566 }
 567
 568 static bool
 569 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 570 {
 571         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 572                 return false;
 573
 574         return intel_sdvo_read_response(intel_sdvo, value, len);
 575 }
 576
 577 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 578 {
 579         struct intel_sdvo_set_target_input_args targets = {0};
 580         return intel_sdvo_set_value(intel_sdvo,
 581                                     SDVO_CMD_SET_TARGET_INPUT,
 582                                     &targets, sizeof(targets));
 583 }
 584
 585 /**
 586  * Return whether each input is trained.
 587  *
 588  * This function is making an assumption about the layout of the response,
 589  * which should be checked against the docs.
 590  */
 591 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 592 {
 593         struct intel_sdvo_get_trained_inputs_response response;
 594
 595         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 596                                   &response, sizeof(response)))
 597                 return false;
 598
 599         *input_1 = response.input0_trained;
 600         *input_2 = response.input1_trained;
 601         return true;
 602 }
 603
 604 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 605                                           u16 outputs)
 606 {
 607         return intel_sdvo_set_value(intel_sdvo,
 608                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 609                                     &outputs, sizeof(outputs));
 610 }
 611
 612 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 613                                                int mode)
 614 {
 615         u8 state = SDVO_ENCODER_STATE_ON;
 616
 617         switch (mode) {
 618         case DRM_MODE_DPMS_ON:
 619                 state = SDVO_ENCODER_STATE_ON;
 620                 break;
 621         case DRM_MODE_DPMS_STANDBY:
 622                 state = SDVO_ENCODER_STATE_STANDBY;
 623                 break;
 624         case DRM_MODE_DPMS_SUSPEND:
 625                 state = SDVO_ENCODER_STATE_SUSPEND;
 626                 break;
 627         case DRM_MODE_DPMS_OFF:
 628                 state = SDVO_ENCODER_STATE_OFF;
 629                 break;
 630         }
 631
 632         return intel_sdvo_set_value(intel_sdvo,
 633                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 634 }
 635
 636 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 637                                                    int *clock_min,
 638                                                    int *clock_max)
 639 {
 640         struct intel_sdvo_pixel_clock_range clocks;
 641
 642         if (!intel_sdvo_get_value(intel_sdvo,
 643                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 644                                   &clocks, sizeof(clocks)))
 645                 return false;
 646
 647         /* Convert the values from units of 10 kHz to kHz. */
 648         *clock_min = clocks.min * 10;
 649         *clock_max = clocks.max * 10;
 650         return true;
 651 }
 652
 653 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 654                                          u16 outputs)
 655 {
 656         return intel_sdvo_set_value(intel_sdvo,
 657                                     SDVO_CMD_SET_TARGET_OUTPUT,
 658                                     &outputs, sizeof(outputs));
 659 }
 660
 661 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 662                                   struct intel_sdvo_dtd *dtd)
 663 {
 664         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 665                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 666 }
 667
 668 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 669                                          struct intel_sdvo_dtd *dtd)
 670 {
 671         return intel_sdvo_set_timing(intel_sdvo,
 672                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 673 }
 674
 675 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 676                                          struct intel_sdvo_dtd *dtd)
 677 {
 678         return intel_sdvo_set_timing(intel_sdvo,
 679                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 680 }
 681
 682 static bool
 683 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 684                                          uint16_t clock,
 685                                          uint16_t width,
 686                                          uint16_t height)
 687 {
 688         struct intel_sdvo_preferred_input_timing_args args;
 689
 690         memset(&args, 0, sizeof(args));
 691         args.clock = clock;
 692         args.width = width;
 693         args.height = height;
 694         args.interlace = 0;
 695
 696         if (intel_sdvo->is_lvds &&
 697            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 698             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 699                 args.scaled = 1;
 700
 701         return intel_sdvo_set_value(intel_sdvo,
 702                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 703                                     &args, sizeof(args));
 704 }
 705
 706 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 707                                                   struct intel_sdvo_dtd *dtd)
 708 {
 709         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 710                                     &dtd->part1, sizeof(dtd->part1)) &&
 711                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 712                                      &dtd->part2, sizeof(dtd->part2));
 713 }
 714
 715 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 716 {
 717         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 718 }
 719
 720 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 721                                          const struct drm_display_mode *mode)
 722 {
 723         uint16_t width, height;
 724         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 725         uint16_t h_sync_offset, v_sync_offset;
 726
 727         width = mode->crtc_hdisplay;
 728         height = mode->crtc_vdisplay;
 729
 730         /* do some mode translations */
 731         h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
 732         h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
 733
 734         v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
 735         v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
 736
 737         h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
 738         v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
 739
 740         dtd->part1.clock = mode->clock / 10;
 741         dtd->part1.h_active = width & 0xff;
 742         dtd->part1.h_blank = h_blank_len & 0xff;
 743         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 744                 ((h_blank_len >> 8) & 0xf);
 745         dtd->part1.v_active = height & 0xff;
 746         dtd->part1.v_blank = v_blank_len & 0xff;
 747         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 748                 ((v_blank_len >> 8) & 0xf);
 749
 750         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 751         dtd->part2.h_sync_width = h_sync_len & 0xff;
 752         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 753                 (v_sync_len & 0xf);
 754         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 755                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 756                 ((v_sync_len & 0x30) >> 4);
 757
 758         dtd->part2.dtd_flags = 0x18;
 759         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 760                 dtd->part2.dtd_flags |= 0x2;
 761         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 762                 dtd->part2.dtd_flags |= 0x4;
 763
 764         dtd->part2.sdvo_flags = 0;
 765         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 766         dtd->part2.reserved = 0;
 767 }
 768
 769 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 770                                          const struct intel_sdvo_dtd *dtd)
 771 {
 772         mode->hdisplay = dtd->part1.h_active;
 773         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 774         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
 775         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 776         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
 777         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 778         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
 779         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
 780
 781         mode->vdisplay = dtd->part1.v_active;
 782         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 783         mode->vsync_start = mode->vdisplay;
 784         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 785         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 786         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 787         mode->vsync_end = mode->vsync_start +
 788                 (dtd->part2.v_sync_off_width & 0xf);
 789         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 790         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
 791         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
 792
 793         mode->clock = dtd->part1.clock * 10;
 794
 795         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
 796         if (dtd->part2.dtd_flags & 0x2)
 797                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
 798         if (dtd->part2.dtd_flags & 0x4)
 799                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
 800 }
 801
 802 static bool intel_sdvo_get_supp_encode(struct intel_sdvo *intel_sdvo,
 803                                        struct intel_sdvo_encode *encode)
 804 {
 805         if (intel_sdvo_get_value(intel_sdvo,
 806                                   SDVO_CMD_GET_SUPP_ENCODE,
 807                                   encode, sizeof(*encode)))
 808                 return true;
 809
 810         /* non-support means DVI */
 811         memset(encode, 0, sizeof(*encode));
 812         return false;
 813 }
 814
 815 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 816                                   uint8_t mode)
 817 {
 818         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 819 }
 820
 821 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 822                                        uint8_t mode)
 823 {
 824         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 825 }
 826
 827 #if 0
 828 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 829 {
 830         int i, j;
 831         uint8_t set_buf_index[2];
 832         uint8_t av_split;
 833         uint8_t buf_size;
 834         uint8_t buf[48];
 835         uint8_t *pos;
 836
 837         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 838
 839         for (i = 0; i <= av_split; i++) {
 840                 set_buf_index[0] = i; set_buf_index[1] = 0;
 841                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 842                                      set_buf_index, 2);
 843                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 844                 intel_sdvo_read_response(encoder, &buf_size, 1);
 845
 846                 pos = buf;
 847                 for (j = 0; j <= buf_size; j += 8) {
 848                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 849                                              NULL, 0);
 850                         intel_sdvo_read_response(encoder, pos, 8);
 851                         pos += 8;
 852                 }
 853         }
 854 }
 855 #endif
 856
 857 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
 858 {
 859         struct dip_infoframe avi_if = {
 860                 .type = DIP_TYPE_AVI,
 861                 .ver = DIP_VERSION_AVI,
 862                 .len = DIP_LEN_AVI,
 863         };
 864         uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
 865         uint8_t set_buf_index[2] = { 1, 0 };
 866         uint64_t *data = (uint64_t *)&avi_if;
 867         unsigned i;
 868
 869         intel_dip_infoframe_csum(&avi_if);
 870
 871         if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
 872                                   set_buf_index, 2))
 873                 return false;
 874
 875         for (i = 0; i < sizeof(avi_if); i += 8) {
 876                 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA,
 877                                           data, 8))
 878                         return false;
 879                 data++;
 880         }
 881
 882         return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE,
 883                                     &tx_rate, 1);
 884 }
 885
 886 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
 887 {
 888         struct intel_sdvo_tv_format format;
 889         uint32_t format_map;
 890
 891         format_map = 1 << intel_sdvo->tv_format_index;
 892         memset(&format, 0, sizeof(format));
 893         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
 894
 895         BUILD_BUG_ON(sizeof(format) != 6);
 896         return intel_sdvo_set_value(intel_sdvo,
 897                                     SDVO_CMD_SET_TV_FORMAT,
 898                                     &format, sizeof(format));
 899 }
 900
 901 static bool
 902 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
 903                                         struct drm_display_mode *mode)
 904 {
 905         struct intel_sdvo_dtd output_dtd;
 906
 907         if (!intel_sdvo_set_target_output(intel_sdvo,
 908                                           intel_sdvo->attached_output))
 909                 return false;
 910
 911         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
 912         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
 913                 return false;
 914
 915         return true;
 916 }
 917
 918 static bool
 919 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
 920                                         struct drm_display_mode *mode,
 921                                         struct drm_display_mode *adjusted_mode)
 922 {
 923         /* Reset the input timing to the screen. Assume always input 0. */
 924         if (!intel_sdvo_set_target_input(intel_sdvo))
 925                 return false;
 926
 927         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
 928                                                       mode->clock / 10,
 929                                                       mode->hdisplay,
 930                                                       mode->vdisplay))
 931                 return false;
 932
 933         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
 934                                                    &intel_sdvo->input_dtd))
 935                 return false;
 936
 937         intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
 938
 939         drm_mode_set_crtcinfo(adjusted_mode, 0);
 940         return true;
 941 }
 942
 943 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
 944                                   struct drm_display_mode *mode,
 945                                   struct drm_display_mode *adjusted_mode)
 946 {
 947         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
 948         int multiplier;
 949
 950         /* We need to construct preferred input timings based on our
 951          * output timings.  To do that, we have to set the output
 952          * timings, even though this isn't really the right place in
 953          * the sequence to do it. Oh well.
 954          */
 955         if (intel_sdvo->is_tv) {
 956                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
 957                         return false;
 958
 959                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
 960                                                              mode,
 961                                                              adjusted_mode);
 962         } else if (intel_sdvo->is_lvds) {
 963                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
 964                                                              intel_sdvo->sdvo_lvds_fixed_mode))
 965                         return false;
 966
 967                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
 968                                                              mode,
 969                                                              adjusted_mode);
 970         }
 971
 972         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
 973          * SDVO device will factor out the multiplier during mode_set.
 974          */
 975         multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
 976         intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
 977
 978         return true;
 979 }
 980
 981 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
 982                                 struct drm_display_mode *mode,
 983                                 struct drm_display_mode *adjusted_mode)
 984 {
 985         struct drm_device *dev = encoder->dev;
 986         struct drm_i915_private *dev_priv = dev->dev_private;
 987         struct drm_crtc *crtc = encoder->crtc;
 988         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 989         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
 990         u32 sdvox;
 991         struct intel_sdvo_in_out_map in_out;
 992         struct intel_sdvo_dtd input_dtd;
 993         int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
 994         int rate;
 995
 996         if (!mode)
 997                 return;
 998
 999         /* First, set the input mapping for the first input to our controlled
1000          * output. This is only correct if we're a single-input device, in
1001          * which case the first input is the output from the appropriate SDVO
1002          * channel on the motherboard.  In a two-input device, the first input
1003          * will be SDVOB and the second SDVOC.
1004          */
1005         in_out.in0 = intel_sdvo->attached_output;
1006         in_out.in1 = 0;
1007
1008         intel_sdvo_set_value(intel_sdvo,
1009                              SDVO_CMD_SET_IN_OUT_MAP,
1010                              &in_out, sizeof(in_out));
1011
1012         /* Set the output timings to the screen */
1013         if (!intel_sdvo_set_target_output(intel_sdvo,
1014                                           intel_sdvo->attached_output))
1015                 return;
1016
1017         /* We have tried to get input timing in mode_fixup, and filled into
1018          * adjusted_mode.
1019          */
1020         if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1021                 input_dtd = intel_sdvo->input_dtd;
1022         } else {
1023                 /* Set the output timing to the screen */
1024                 if (!intel_sdvo_set_target_output(intel_sdvo,
1025                                                   intel_sdvo->attached_output))
1026                         return;
1027
1028                 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1029                 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1030         }
1031
1032         /* Set the input timing to the screen. Assume always input 0. */
1033         if (!intel_sdvo_set_target_input(intel_sdvo))
1034                 return;
1035
1036         if (intel_sdvo->is_hdmi &&
1037             !intel_sdvo_set_avi_infoframe(intel_sdvo))
1038                 return;
1039
1040         if (intel_sdvo->is_tv &&
1041             !intel_sdvo_set_tv_format(intel_sdvo))
1042                 return;
1043
1044         (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1045
1046         switch (pixel_multiplier) {
1047         default:
1048         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1049         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1050         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1051         }
1052         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1053                 return;
1054
1055         /* Set the SDVO control regs. */
1056         if (INTEL_INFO(dev)->gen >= 4) {
1057                 sdvox = SDVO_BORDER_ENABLE;
1058                 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1059                         sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1060                 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1061                         sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1062         } else {
1063                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1064                 switch (intel_sdvo->sdvo_reg) {
1065                 case SDVOB:
1066                         sdvox &= SDVOB_PRESERVE_MASK;
1067                         break;
1068                 case SDVOC:
1069                         sdvox &= SDVOC_PRESERVE_MASK;
1070                         break;
1071                 }
1072                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1073         }
1074         if (intel_crtc->pipe == 1)
1075                 sdvox |= SDVO_PIPE_B_SELECT;
1076         if (intel_sdvo->has_audio)
1077                 sdvox |= SDVO_AUDIO_ENABLE;
1078
1079         if (INTEL_INFO(dev)->gen >= 4) {
1080                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1081         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1082                 /* done in crtc_mode_set as it lives inside the dpll register */
1083         } else {
1084                 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1085         }
1086
1087         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
1088                 sdvox |= SDVO_STALL_SELECT;
1089         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1090 }
1091
1092 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1093 {
1094         struct drm_device *dev = encoder->dev;
1095         struct drm_i915_private *dev_priv = dev->dev_private;
1096         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1097         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1098         u32 temp;
1099
1100         if (mode != DRM_MODE_DPMS_ON) {
1101                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1102                 if (0)
1103                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1104
1105                 if (mode == DRM_MODE_DPMS_OFF) {
1106                         temp = I915_READ(intel_sdvo->sdvo_reg);
1107                         if ((temp & SDVO_ENABLE) != 0) {
1108                                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1109                         }
1110                 }
1111         } else {
1112                 bool input1, input2;
1113                 int i;
1114                 u8 status;
1115
1116                 temp = I915_READ(intel_sdvo->sdvo_reg);
1117                 if ((temp & SDVO_ENABLE) == 0)
1118                         intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1119                 for (i = 0; i < 2; i++)
1120                         intel_wait_for_vblank(dev, intel_crtc->pipe);
1121
1122                 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1123                 /* Warn if the device reported failure to sync.
1124                  * A lot of SDVO devices fail to notify of sync, but it's
1125                  * a given it the status is a success, we succeeded.
1126                  */
1127                 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1128                         DRM_DEBUG_KMS("First %s output reported failure to "
1129                                         "sync\n", SDVO_NAME(intel_sdvo));
1130                 }
1131
1132                 if (0)
1133                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1134                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1135         }
1136         return;
1137 }
1138
1139 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1140                                  struct drm_display_mode *mode)
1141 {
1142         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1143
1144         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1145                 return MODE_NO_DBLESCAN;
1146
1147         if (intel_sdvo->pixel_clock_min > mode->clock)
1148                 return MODE_CLOCK_LOW;
1149
1150         if (intel_sdvo->pixel_clock_max < mode->clock)
1151                 return MODE_CLOCK_HIGH;
1152
1153         if (intel_sdvo->is_lvds) {
1154                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1155                         return MODE_PANEL;
1156
1157                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1158                         return MODE_PANEL;
1159         }
1160
1161         return MODE_OK;
1162 }
1163
1164 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1165 {
1166         if (!intel_sdvo_get_value(intel_sdvo,
1167                                   SDVO_CMD_GET_DEVICE_CAPS,
1168                                   caps, sizeof(*caps)))
1169                 return false;
1170
1171         DRM_DEBUG_KMS("SDVO capabilities:\n"
1172                       "  vendor_id: %d\n"
1173                       "  device_id: %d\n"
1174                       "  device_rev_id: %d\n"
1175                       "  sdvo_version_major: %d\n"
1176                       "  sdvo_version_minor: %d\n"
1177                       "  sdvo_inputs_mask: %d\n"
1178                       "  smooth_scaling: %d\n"
1179                       "  sharp_scaling: %d\n"
1180                       "  up_scaling: %d\n"
1181                       "  down_scaling: %d\n"
1182                       "  stall_support: %d\n"
1183                       "  output_flags: %d\n",
1184                       caps->vendor_id,
1185                       caps->device_id,
1186                       caps->device_rev_id,
1187                       caps->sdvo_version_major,
1188                       caps->sdvo_version_minor,
1189                       caps->sdvo_inputs_mask,
1190                       caps->smooth_scaling,
1191                       caps->sharp_scaling,
1192                       caps->up_scaling,
1193                       caps->down_scaling,
1194                       caps->stall_support,
1195                       caps->output_flags);
1196
1197         return true;
1198 }
1199
1200 /* No use! */
1201 #if 0
1202 struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1203 {
1204         struct drm_connector *connector = NULL;
1205         struct intel_sdvo *iout = NULL;
1206         struct intel_sdvo *sdvo;
1207
1208         /* find the sdvo connector */
1209         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1210                 iout = to_intel_sdvo(connector);
1211
1212                 if (iout->type != INTEL_OUTPUT_SDVO)
1213                         continue;
1214
1215                 sdvo = iout->dev_priv;
1216
1217                 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1218                         return connector;
1219
1220                 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1221                         return connector;
1222
1223         }
1224
1225         return NULL;
1226 }
1227
1228 int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1229 {
1230         u8 response[2];
1231         u8 status;
1232         struct intel_sdvo *intel_sdvo;
1233         DRM_DEBUG_KMS("\n");
1234
1235         if (!connector)
1236                 return 0;
1237
1238         intel_sdvo = to_intel_sdvo(connector);
1239
1240         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1241                                     &response, 2) && response[0];
1242 }
1243
1244 void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1245 {
1246         u8 response[2];
1247         u8 status;
1248         struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
1249
1250         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1251         intel_sdvo_read_response(intel_sdvo, &response, 2);
1252
1253         if (on) {
1254                 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1255                 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1256
1257                 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1258         } else {
1259                 response[0] = 0;
1260                 response[1] = 0;
1261                 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1262         }
1263
1264         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1265         intel_sdvo_read_response(intel_sdvo, &response, 2);
1266 }
1267 #endif
1268
1269 static bool
1270 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1271 {
1272         int caps = 0;
1273
1274         if (intel_sdvo->caps.output_flags &
1275                 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1276                 caps++;
1277         if (intel_sdvo->caps.output_flags &
1278                 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1279                 caps++;
1280         if (intel_sdvo->caps.output_flags &
1281                 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
1282                 caps++;
1283         if (intel_sdvo->caps.output_flags &
1284                 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1285                 caps++;
1286         if (intel_sdvo->caps.output_flags &
1287                 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1288                 caps++;
1289
1290         if (intel_sdvo->caps.output_flags &
1291                 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1292                 caps++;
1293
1294         if (intel_sdvo->caps.output_flags &
1295                 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1296                 caps++;
1297
1298         return (caps > 1);
1299 }
1300
1301 static struct edid *
1302 intel_sdvo_get_edid(struct drm_connector *connector)
1303 {
1304         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1305         return drm_get_edid(connector, &sdvo->ddc);
1306 }
1307
1308 static struct drm_connector *
1309 intel_find_analog_connector(struct drm_device *dev)
1310 {
1311         struct drm_connector *connector;
1312         struct intel_sdvo *encoder;
1313
1314         list_for_each_entry(encoder,
1315                             &dev->mode_config.encoder_list,
1316                             base.base.head) {
1317                 if (encoder->base.type == INTEL_OUTPUT_ANALOG) {
1318                         list_for_each_entry(connector,
1319                                             &dev->mode_config.connector_list,
1320                                             head) {
1321                                 if (&encoder->base ==
1322                                     intel_attached_encoder(connector))
1323                                         return connector;
1324                         }
1325                 }
1326         }
1327
1328         return NULL;
1329 }
1330
1331 static int
1332 intel_analog_is_connected(struct drm_device *dev)
1333 {
1334         struct drm_connector *analog_connector;
1335
1336         analog_connector = intel_find_analog_connector(dev);
1337         if (!analog_connector)
1338                 return false;
1339
1340         if (analog_connector->funcs->detect(analog_connector, false) ==
1341                         connector_status_disconnected)
1342                 return false;
1343
1344         return true;
1345 }
1346
1347 /* Mac mini hack -- use the same DDC as the analog connector */
1348 static struct edid *
1349 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1350 {
1351         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1352
1353         if (!intel_analog_is_connected(connector->dev))
1354                 return NULL;
1355
1356         return drm_get_edid(connector, &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1357 }
1358
1359 enum drm_connector_status
1360 intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1361 {
1362         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1363         enum drm_connector_status status;
1364         struct edid *edid;
1365
1366         edid = intel_sdvo_get_edid(connector);
1367
1368         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1369                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1370
1371                 /*
1372                  * Don't use the 1 as the argument of DDC bus switch to get
1373                  * the EDID. It is used for SDVO SPD ROM.
1374                  */
1375                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1376                         intel_sdvo->ddc_bus = ddc;
1377                         edid = intel_sdvo_get_edid(connector);
1378                         if (edid)
1379                                 break;
1380                 }
1381                 /*
1382                  * If we found the EDID on the other bus,
1383                  * assume that is the correct DDC bus.
1384                  */
1385                 if (edid == NULL)
1386                         intel_sdvo->ddc_bus = saved_ddc;
1387         }
1388
1389         /*
1390          * When there is no edid and no monitor is connected with VGA
1391          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1392          */
1393         if (edid == NULL)
1394                 edid = intel_sdvo_get_analog_edid(connector);
1395
1396         status = connector_status_unknown;
1397         if (edid != NULL) {
1398                 /* DDC bus is shared, match EDID to connector type */
1399                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1400                         status = connector_status_connected;
1401                         intel_sdvo->is_hdmi = drm_detect_hdmi_monitor(edid);
1402                         intel_sdvo->has_audio = drm_detect_monitor_audio(edid);
1403                 }
1404                 connector->display_info.raw_edid = NULL;
1405                 kfree(edid);
1406         }
1407
1408         if (status == connector_status_connected) {
1409                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1410                 if (intel_sdvo_connector->force_audio)
1411                         intel_sdvo->has_audio = intel_sdvo_connector->force_audio > 0;
1412         }
1413
1414         return status;
1415 }
1416
1417 static enum drm_connector_status
1418 intel_sdvo_detect(struct drm_connector *connector, bool force)
1419 {
1420         uint16_t response;
1421         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1422         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1423         enum drm_connector_status ret;
1424
1425         if (!intel_sdvo_write_cmd(intel_sdvo,
1426                                   SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1427                 return connector_status_unknown;
1428         if (intel_sdvo->is_tv) {
1429                 /* add 30ms delay when the output type is SDVO-TV */
1430                 mdelay(30);
1431         }
1432         if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1433                 return connector_status_unknown;
1434
1435         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1436                       response & 0xff, response >> 8,
1437                       intel_sdvo_connector->output_flag);
1438
1439         if (response == 0)
1440                 return connector_status_disconnected;
1441
1442         intel_sdvo->attached_output = response;
1443
1444         if ((intel_sdvo_connector->output_flag & response) == 0)
1445                 ret = connector_status_disconnected;
1446         else if (response & SDVO_TMDS_MASK)
1447                 ret = intel_sdvo_hdmi_sink_detect(connector);
1448         else
1449                 ret = connector_status_connected;
1450
1451         /* May update encoder flag for like clock for SDVO TV, etc.*/
1452         if (ret == connector_status_connected) {
1453                 intel_sdvo->is_tv = false;
1454                 intel_sdvo->is_lvds = false;
1455                 intel_sdvo->base.needs_tv_clock = false;
1456
1457                 if (response & SDVO_TV_MASK) {
1458                         intel_sdvo->is_tv = true;
1459                         intel_sdvo->base.needs_tv_clock = true;
1460                 }
1461                 if (response & SDVO_LVDS_MASK)
1462                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1463         }
1464
1465         return ret;
1466 }
1467
1468 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1469 {
1470         struct edid *edid;
1471
1472         /* set the bus switch and get the modes */
1473         edid = intel_sdvo_get_edid(connector);
1474
1475         /*
1476          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1477          * link between analog and digital outputs. So, if the regular SDVO
1478          * DDC fails, check to see if the analog output is disconnected, in
1479          * which case we'll look there for the digital DDC data.
1480          */
1481         if (edid == NULL)
1482                 edid = intel_sdvo_get_analog_edid(connector);
1483
1484         if (edid != NULL) {
1485                 drm_mode_connector_update_edid_property(connector, edid);
1486                 drm_add_edid_modes(connector, edid);
1487                 connector->display_info.raw_edid = NULL;
1488                 kfree(edid);
1489         }
1490 }
1491
1492 /*
1493  * Set of SDVO TV modes.
1494  * Note!  This is in reply order (see loop in get_tv_modes).
1495  * XXX: all 60Hz refresh?
1496  */
1497 struct drm_display_mode sdvo_tv_modes[] = {
1498         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1499                    416, 0, 200, 201, 232, 233, 0,
1500                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1501         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1502                    416, 0, 240, 241, 272, 273, 0,
1503                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1504         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1505                    496, 0, 300, 301, 332, 333, 0,
1506                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1507         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1508                    736, 0, 350, 351, 382, 383, 0,
1509                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1510         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1511                    736, 0, 400, 401, 432, 433, 0,
1512                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1513         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1514                    736, 0, 480, 481, 512, 513, 0,
1515                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1516         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1517                    800, 0, 480, 481, 512, 513, 0,
1518                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1519         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1520                    800, 0, 576, 577, 608, 609, 0,
1521                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1522         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1523                    816, 0, 350, 351, 382, 383, 0,
1524                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1525         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1526                    816, 0, 400, 401, 432, 433, 0,
1527                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1528         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1529                    816, 0, 480, 481, 512, 513, 0,
1530                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1531         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1532                    816, 0, 540, 541, 572, 573, 0,
1533                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1534         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1535                    816, 0, 576, 577, 608, 609, 0,
1536                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1537         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1538                    864, 0, 576, 577, 608, 609, 0,
1539                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1540         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1541                    896, 0, 600, 601, 632, 633, 0,
1542                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1543         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1544                    928, 0, 624, 625, 656, 657, 0,
1545                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1546         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1547                    1016, 0, 766, 767, 798, 799, 0,
1548                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1549         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1550                    1120, 0, 768, 769, 800, 801, 0,
1551                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1552         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1553                    1376, 0, 1024, 1025, 1056, 1057, 0,
1554                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1555 };
1556
1557 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1558 {
1559         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1560         struct intel_sdvo_sdtv_resolution_request tv_res;
1561         uint32_t reply = 0, format_map = 0;
1562         int i;
1563
1564         /* Read the list of supported input resolutions for the selected TV
1565          * format.
1566          */
1567         format_map = 1 << intel_sdvo->tv_format_index;
1568         memcpy(&tv_res, &format_map,
1569                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1570
1571         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1572                 return;
1573
1574         BUILD_BUG_ON(sizeof(tv_res) != 3);
1575         if (!intel_sdvo_write_cmd(intel_sdvo,
1576                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1577                                   &tv_res, sizeof(tv_res)))
1578                 return;
1579         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1580                 return;
1581
1582         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1583                 if (reply & (1 << i)) {
1584                         struct drm_display_mode *nmode;
1585                         nmode = drm_mode_duplicate(connector->dev,
1586                                                    &sdvo_tv_modes[i]);
1587                         if (nmode)
1588                                 drm_mode_probed_add(connector, nmode);
1589                 }
1590 }
1591
1592 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1593 {
1594         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1595         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1596         struct drm_display_mode *newmode;
1597
1598         /*
1599          * Attempt to get the mode list from DDC.
1600          * Assume that the preferred modes are
1601          * arranged in priority order.
1602          */
1603         intel_ddc_get_modes(connector, intel_sdvo->i2c);
1604         if (list_empty(&connector->probed_modes) == false)
1605                 goto end;
1606
1607         /* Fetch modes from VBT */
1608         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1609                 newmode = drm_mode_duplicate(connector->dev,
1610                                              dev_priv->sdvo_lvds_vbt_mode);
1611                 if (newmode != NULL) {
1612                         /* Guarantee the mode is preferred */
1613                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1614                                          DRM_MODE_TYPE_DRIVER);
1615                         drm_mode_probed_add(connector, newmode);
1616                 }
1617         }
1618
1619 end:
1620         list_for_each_entry(newmode, &connector->probed_modes, head) {
1621                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1622                         intel_sdvo->sdvo_lvds_fixed_mode =
1623                                 drm_mode_duplicate(connector->dev, newmode);
1624
1625                         drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1626                                               0);
1627
1628                         intel_sdvo->is_lvds = true;
1629                         break;
1630                 }
1631         }
1632
1633 }
1634
1635 static int intel_sdvo_get_modes(struct drm_connector *connector)
1636 {
1637         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1638
1639         if (IS_TV(intel_sdvo_connector))
1640                 intel_sdvo_get_tv_modes(connector);
1641         else if (IS_LVDS(intel_sdvo_connector))
1642                 intel_sdvo_get_lvds_modes(connector);
1643         else
1644                 intel_sdvo_get_ddc_modes(connector);
1645
1646         return !list_empty(&connector->probed_modes);
1647 }
1648
1649 static void
1650 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1651 {
1652         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1653         struct drm_device *dev = connector->dev;
1654
1655         if (intel_sdvo_connector->left)
1656                 drm_property_destroy(dev, intel_sdvo_connector->left);
1657         if (intel_sdvo_connector->right)
1658                 drm_property_destroy(dev, intel_sdvo_connector->right);
1659         if (intel_sdvo_connector->top)
1660                 drm_property_destroy(dev, intel_sdvo_connector->top);
1661         if (intel_sdvo_connector->bottom)
1662                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1663         if (intel_sdvo_connector->hpos)
1664                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1665         if (intel_sdvo_connector->vpos)
1666                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1667         if (intel_sdvo_connector->saturation)
1668                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1669         if (intel_sdvo_connector->contrast)
1670                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1671         if (intel_sdvo_connector->hue)
1672                 drm_property_destroy(dev, intel_sdvo_connector->hue);
1673         if (intel_sdvo_connector->sharpness)
1674                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1675         if (intel_sdvo_connector->flicker_filter)
1676                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1677         if (intel_sdvo_connector->flicker_filter_2d)
1678                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1679         if (intel_sdvo_connector->flicker_filter_adaptive)
1680                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1681         if (intel_sdvo_connector->tv_luma_filter)
1682                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1683         if (intel_sdvo_connector->tv_chroma_filter)
1684                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1685         if (intel_sdvo_connector->dot_crawl)
1686                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1687         if (intel_sdvo_connector->brightness)
1688                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1689 }
1690
1691 static void intel_sdvo_destroy(struct drm_connector *connector)
1692 {
1693         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1694
1695         if (intel_sdvo_connector->tv_format)
1696                 drm_property_destroy(connector->dev,
1697                                      intel_sdvo_connector->tv_format);
1698
1699         intel_sdvo_destroy_enhance_property(connector);
1700         drm_sysfs_connector_remove(connector);
1701         drm_connector_cleanup(connector);
1702         kfree(connector);
1703 }
1704
1705 static int
1706 intel_sdvo_set_property(struct drm_connector *connector,
1707                         struct drm_property *property,
1708                         uint64_t val)
1709 {
1710         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1711         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1712         uint16_t temp_value;
1713         uint8_t cmd;
1714         int ret;
1715
1716         ret = drm_connector_property_set_value(connector, property, val);
1717         if (ret)
1718                 return ret;
1719
1720         if (property == intel_sdvo_connector->force_audio_property) {
1721                 if (val == intel_sdvo_connector->force_audio)
1722                         return 0;
1723
1724                 intel_sdvo_connector->force_audio = val;
1725
1726                 if (val > 0 && intel_sdvo->has_audio)
1727                         return 0;
1728                 if (val < 0 && !intel_sdvo->has_audio)
1729                         return 0;
1730
1731                 intel_sdvo->has_audio = val > 0;
1732                 goto done;
1733         }
1734
1735 #define CHECK_PROPERTY(name, NAME) \
1736         if (intel_sdvo_connector->name == property) { \
1737                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1738                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1739                 cmd = SDVO_CMD_SET_##NAME; \
1740                 intel_sdvo_connector->cur_##name = temp_value; \
1741                 goto set_value; \
1742         }
1743
1744         if (property == intel_sdvo_connector->tv_format) {
1745                 if (val >= TV_FORMAT_NUM)
1746                         return -EINVAL;
1747
1748                 if (intel_sdvo->tv_format_index ==
1749                     intel_sdvo_connector->tv_format_supported[val])
1750                         return 0;
1751
1752                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1753                 goto done;
1754         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1755                 temp_value = val;
1756                 if (intel_sdvo_connector->left == property) {
1757                         drm_connector_property_set_value(connector,
1758                                                          intel_sdvo_connector->right, val);
1759                         if (intel_sdvo_connector->left_margin == temp_value)
1760                                 return 0;
1761
1762                         intel_sdvo_connector->left_margin = temp_value;
1763                         intel_sdvo_connector->right_margin = temp_value;
1764                         temp_value = intel_sdvo_connector->max_hscan -
1765                                 intel_sdvo_connector->left_margin;
1766                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1767                         goto set_value;
1768                 } else if (intel_sdvo_connector->right == property) {
1769                         drm_connector_property_set_value(connector,
1770                                                          intel_sdvo_connector->left, val);
1771                         if (intel_sdvo_connector->right_margin == temp_value)
1772                                 return 0;
1773
1774                         intel_sdvo_connector->left_margin = temp_value;
1775                         intel_sdvo_connector->right_margin = temp_value;
1776                         temp_value = intel_sdvo_connector->max_hscan -
1777                                 intel_sdvo_connector->left_margin;
1778                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1779                         goto set_value;
1780                 } else if (intel_sdvo_connector->top == property) {
1781                         drm_connector_property_set_value(connector,
1782                                                          intel_sdvo_connector->bottom, val);
1783                         if (intel_sdvo_connector->top_margin == temp_value)
1784                                 return 0;
1785
1786                         intel_sdvo_connector->top_margin = temp_value;
1787                         intel_sdvo_connector->bottom_margin = temp_value;
1788                         temp_value = intel_sdvo_connector->max_vscan -
1789                                 intel_sdvo_connector->top_margin;
1790                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1791                         goto set_value;
1792                 } else if (intel_sdvo_connector->bottom == property) {
1793                         drm_connector_property_set_value(connector,
1794                                                          intel_sdvo_connector->top, val);
1795                         if (intel_sdvo_connector->bottom_margin == temp_value)
1796                                 return 0;
1797
1798                         intel_sdvo_connector->top_margin = temp_value;
1799                         intel_sdvo_connector->bottom_margin = temp_value;
1800                         temp_value = intel_sdvo_connector->max_vscan -
1801                                 intel_sdvo_connector->top_margin;
1802                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1803                         goto set_value;
1804                 }
1805                 CHECK_PROPERTY(hpos, HPOS)
1806                 CHECK_PROPERTY(vpos, VPOS)
1807                 CHECK_PROPERTY(saturation, SATURATION)
1808                 CHECK_PROPERTY(contrast, CONTRAST)
1809                 CHECK_PROPERTY(hue, HUE)
1810                 CHECK_PROPERTY(brightness, BRIGHTNESS)
1811                 CHECK_PROPERTY(sharpness, SHARPNESS)
1812                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1813                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1814                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1815                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1816                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1817                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1818         }
1819
1820         return -EINVAL; /* unknown property */
1821
1822 set_value:
1823         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1824                 return -EIO;
1825
1826
1827 done:
1828         if (intel_sdvo->base.base.crtc) {
1829                 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1830                 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1831                                          crtc->y, crtc->fb);
1832         }
1833
1834         return 0;
1835 #undef CHECK_PROPERTY
1836 }
1837
1838 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1839         .dpms = intel_sdvo_dpms,
1840         .mode_fixup = intel_sdvo_mode_fixup,
1841         .prepare = intel_encoder_prepare,
1842         .mode_set = intel_sdvo_mode_set,
1843         .commit = intel_encoder_commit,
1844 };
1845
1846 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1847         .dpms = drm_helper_connector_dpms,
1848         .detect = intel_sdvo_detect,
1849         .fill_modes = drm_helper_probe_single_connector_modes,
1850         .set_property = intel_sdvo_set_property,
1851         .destroy = intel_sdvo_destroy,
1852 };
1853
1854 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1855         .get_modes = intel_sdvo_get_modes,
1856         .mode_valid = intel_sdvo_mode_valid,
1857         .best_encoder = intel_best_encoder,
1858 };
1859
1860 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1861 {
1862         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1863
1864         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1865                 drm_mode_destroy(encoder->dev,
1866                                  intel_sdvo->sdvo_lvds_fixed_mode);
1867
1868         i2c_del_adapter(&intel_sdvo->ddc);
1869         intel_encoder_destroy(encoder);
1870 }
1871
1872 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1873         .destroy = intel_sdvo_enc_destroy,
1874 };
1875
1876 static void
1877 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1878 {
1879         uint16_t mask = 0;
1880         unsigned int num_bits;
1881
1882         /* Make a mask of outputs less than or equal to our own priority in the
1883          * list.
1884          */
1885         switch (sdvo->controlled_output) {
1886         case SDVO_OUTPUT_LVDS1:
1887                 mask |= SDVO_OUTPUT_LVDS1;
1888         case SDVO_OUTPUT_LVDS0:
1889                 mask |= SDVO_OUTPUT_LVDS0;
1890         case SDVO_OUTPUT_TMDS1:
1891                 mask |= SDVO_OUTPUT_TMDS1;
1892         case SDVO_OUTPUT_TMDS0:
1893                 mask |= SDVO_OUTPUT_TMDS0;
1894         case SDVO_OUTPUT_RGB1:
1895                 mask |= SDVO_OUTPUT_RGB1;
1896         case SDVO_OUTPUT_RGB0:
1897                 mask |= SDVO_OUTPUT_RGB0;
1898                 break;
1899         }
1900
1901         /* Count bits to find what number we are in the priority list. */
1902         mask &= sdvo->caps.output_flags;
1903         num_bits = hweight16(mask);
1904         /* If more than 3 outputs, default to DDC bus 3 for now. */
1905         if (num_bits > 3)
1906                 num_bits = 3;
1907
1908         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1909         sdvo->ddc_bus = 1 << num_bits;
1910 }
1911
1912 /**
1913  * Choose the appropriate DDC bus for control bus switch command for this
1914  * SDVO output based on the controlled output.
1915  *
1916  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1917  * outputs, then LVDS outputs.
1918  */
1919 static void
1920 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1921                           struct intel_sdvo *sdvo, u32 reg)
1922 {
1923         struct sdvo_device_mapping *mapping;
1924
1925         if (IS_SDVOB(reg))
1926                 mapping = &(dev_priv->sdvo_mappings[0]);
1927         else
1928                 mapping = &(dev_priv->sdvo_mappings[1]);
1929
1930         if (mapping->initialized)
1931                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1932         else
1933                 intel_sdvo_guess_ddc_bus(sdvo);
1934 }
1935
1936 static void
1937 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1938                           struct intel_sdvo *sdvo, u32 reg)
1939 {
1940         struct sdvo_device_mapping *mapping;
1941         u8 pin, speed;
1942
1943         if (IS_SDVOB(reg))
1944                 mapping = &dev_priv->sdvo_mappings[0];
1945         else
1946                 mapping = &dev_priv->sdvo_mappings[1];
1947
1948         pin = GMBUS_PORT_DPB;
1949         speed = GMBUS_RATE_1MHZ >> 8;
1950         if (mapping->initialized) {
1951                 pin = mapping->i2c_pin;
1952                 speed = mapping->i2c_speed;
1953         }
1954
1955         sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1956         intel_gmbus_set_speed(sdvo->i2c, speed);
1957         intel_gmbus_force_bit(sdvo->i2c, true);
1958 }
1959
1960 static bool
1961 intel_sdvo_get_digital_encoding_mode(struct intel_sdvo *intel_sdvo, int device)
1962 {
1963         return intel_sdvo_set_target_output(intel_sdvo,
1964                                             device == 0 ? SDVO_OUTPUT_TMDS0 : SDVO_OUTPUT_TMDS1) &&
1965                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1966                                      &intel_sdvo->is_hdmi, 1);
1967 }
1968
1969 static u8
1970 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1971 {
1972         struct drm_i915_private *dev_priv = dev->dev_private;
1973         struct sdvo_device_mapping *my_mapping, *other_mapping;
1974
1975         if (IS_SDVOB(sdvo_reg)) {
1976                 my_mapping = &dev_priv->sdvo_mappings[0];
1977                 other_mapping = &dev_priv->sdvo_mappings[1];
1978         } else {
1979                 my_mapping = &dev_priv->sdvo_mappings[1];
1980                 other_mapping = &dev_priv->sdvo_mappings[0];
1981         }
1982
1983         /* If the BIOS described our SDVO device, take advantage of it. */
1984         if (my_mapping->slave_addr)
1985                 return my_mapping->slave_addr;
1986
1987         /* If the BIOS only described a different SDVO device, use the
1988          * address that it isn't using.
1989          */
1990         if (other_mapping->slave_addr) {
1991                 if (other_mapping->slave_addr == 0x70)
1992                         return 0x72;
1993                 else
1994                         return 0x70;
1995         }
1996
1997         /* No SDVO device info is found for another DVO port,
1998          * so use mapping assumption we had before BIOS parsing.
1999          */
2000         if (IS_SDVOB(sdvo_reg))
2001                 return 0x70;
2002         else
2003                 return 0x72;
2004 }
2005
2006 static void
2007 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2008                           struct intel_sdvo *encoder)
2009 {
2010         drm_connector_init(encoder->base.base.dev,
2011                            &connector->base.base,
2012                            &intel_sdvo_connector_funcs,
2013                            connector->base.base.connector_type);
2014
2015         drm_connector_helper_add(&connector->base.base,
2016                                  &intel_sdvo_connector_helper_funcs);
2017
2018         connector->base.base.interlace_allowed = 0;
2019         connector->base.base.doublescan_allowed = 0;
2020         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2021
2022         intel_connector_attach_encoder(&connector->base, &encoder->base);
2023         drm_sysfs_connector_add(&connector->base.base);
2024 }
2025
2026 static void
2027 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2028 {
2029         struct drm_device *dev = connector->base.base.dev;
2030
2031         connector->force_audio_property =
2032                 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
2033         if (connector->force_audio_property) {
2034                 connector->force_audio_property->values[0] = -1;
2035                 connector->force_audio_property->values[1] = 1;
2036                 drm_connector_attach_property(&connector->base.base,
2037                                               connector->force_audio_property, 0);
2038         }
2039 }
2040
2041 static bool
2042 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2043 {
2044         struct drm_encoder *encoder = &intel_sdvo->base.base;
2045         struct drm_connector *connector;
2046         struct intel_connector *intel_connector;
2047         struct intel_sdvo_connector *intel_sdvo_connector;
2048
2049         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2050         if (!intel_sdvo_connector)
2051                 return false;
2052
2053         if (device == 0) {
2054                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2055                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2056         } else if (device == 1) {
2057                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2058                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2059         }
2060
2061         intel_connector = &intel_sdvo_connector->base;
2062         connector = &intel_connector->base;
2063         connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2064         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2065         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2066
2067         if (intel_sdvo_get_supp_encode(intel_sdvo, &intel_sdvo->encode)
2068                 && intel_sdvo_get_digital_encoding_mode(intel_sdvo, device)
2069                 && intel_sdvo->is_hdmi) {
2070                 /* enable hdmi encoding mode if supported */
2071                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
2072                 intel_sdvo_set_colorimetry(intel_sdvo,
2073                                            SDVO_COLORIMETRY_RGB256);
2074                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2075         }
2076         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2077                                        (1 << INTEL_ANALOG_CLONE_BIT));
2078
2079         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2080
2081         intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2082
2083         return true;
2084 }
2085
2086 static bool
2087 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2088 {
2089         struct drm_encoder *encoder = &intel_sdvo->base.base;
2090         struct drm_connector *connector;
2091         struct intel_connector *intel_connector;
2092         struct intel_sdvo_connector *intel_sdvo_connector;
2093
2094         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2095         if (!intel_sdvo_connector)
2096                 return false;
2097
2098         intel_connector = &intel_sdvo_connector->base;
2099         connector = &intel_connector->base;
2100         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2101         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2102
2103         intel_sdvo->controlled_output |= type;
2104         intel_sdvo_connector->output_flag = type;
2105
2106         intel_sdvo->is_tv = true;
2107         intel_sdvo->base.needs_tv_clock = true;
2108         intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2109
2110         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2111
2112         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2113                 goto err;
2114
2115         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2116                 goto err;
2117
2118         return true;
2119
2120 err:
2121         intel_sdvo_destroy(connector);
2122         return false;
2123 }
2124
2125 static bool
2126 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2127 {
2128         struct drm_encoder *encoder = &intel_sdvo->base.base;
2129         struct drm_connector *connector;
2130         struct intel_connector *intel_connector;
2131         struct intel_sdvo_connector *intel_sdvo_connector;
2132
2133         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2134         if (!intel_sdvo_connector)
2135                 return false;
2136
2137         intel_connector = &intel_sdvo_connector->base;
2138         connector = &intel_connector->base;
2139         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2140         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2141         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2142
2143         if (device == 0) {
2144                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2145                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2146         } else if (device == 1) {
2147                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2148                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2149         }
2150
2151         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2152                                        (1 << INTEL_ANALOG_CLONE_BIT));
2153
2154         intel_sdvo_connector_init(intel_sdvo_connector,
2155                                   intel_sdvo);
2156         return true;
2157 }
2158
2159 static bool
2160 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2161 {
2162         struct drm_encoder *encoder = &intel_sdvo->base.base;
2163         struct drm_connector *connector;
2164         struct intel_connector *intel_connector;
2165         struct intel_sdvo_connector *intel_sdvo_connector;
2166
2167         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2168         if (!intel_sdvo_connector)
2169                 return false;
2170
2171         intel_connector = &intel_sdvo_connector->base;
2172         connector = &intel_connector->base;
2173         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2174         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2175
2176         if (device == 0) {
2177                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2178                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2179         } else if (device == 1) {
2180                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2181                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2182         }
2183
2184         intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2185                                        (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2186
2187         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2188         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2189                 goto err;
2190
2191         return true;
2192
2193 err:
2194         intel_sdvo_destroy(connector);
2195         return false;
2196 }
2197
2198 static bool
2199 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2200 {
2201         intel_sdvo->is_tv = false;
2202         intel_sdvo->base.needs_tv_clock = false;
2203         intel_sdvo->is_lvds = false;
2204
2205         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2206
2207         if (flags & SDVO_OUTPUT_TMDS0)
2208                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2209                         return false;
2210
2211         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2212                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2213                         return false;
2214
2215         /* TV has no XXX1 function block */
2216         if (flags & SDVO_OUTPUT_SVID0)
2217                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2218                         return false;
2219
2220         if (flags & SDVO_OUTPUT_CVBS0)
2221                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2222                         return false;
2223
2224         if (flags & SDVO_OUTPUT_RGB0)
2225                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2226                         return false;
2227
2228         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2229                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2230                         return false;
2231
2232         if (flags & SDVO_OUTPUT_LVDS0)
2233                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2234                         return false;
2235
2236         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2237                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2238                         return false;
2239
2240         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2241                 unsigned char bytes[2];
2242
2243                 intel_sdvo->controlled_output = 0;
2244                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2245                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2246                               SDVO_NAME(intel_sdvo),
2247                               bytes[0], bytes[1]);
2248                 return false;
2249         }
2250         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2251
2252         return true;
2253 }
2254
2255 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2256                                           struct intel_sdvo_connector *intel_sdvo_connector,
2257                                           int type)
2258 {
2259         struct drm_device *dev = intel_sdvo->base.base.dev;
2260         struct intel_sdvo_tv_format format;
2261         uint32_t format_map, i;
2262
2263         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2264                 return false;
2265
2266         if (!intel_sdvo_get_value(intel_sdvo,
2267                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2268                                   &format, sizeof(format)))
2269                 return false;
2270
2271         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2272
2273         if (format_map == 0)
2274                 return false;
2275
2276         intel_sdvo_connector->format_supported_num = 0;
2277         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2278                 if (format_map & (1 << i))
2279                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2280
2281
2282         intel_sdvo_connector->tv_format =
2283                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2284                                             "mode", intel_sdvo_connector->format_supported_num);
2285         if (!intel_sdvo_connector->tv_format)
2286                 return false;
2287
2288         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2289                 drm_property_add_enum(
2290                                 intel_sdvo_connector->tv_format, i,
2291                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2292
2293         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2294         drm_connector_attach_property(&intel_sdvo_connector->base.base,
2295                                       intel_sdvo_connector->tv_format, 0);
2296         return true;
2297
2298 }
2299
2300 #define ENHANCEMENT(name, NAME) do { \
2301         if (enhancements.name) { \
2302                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2303                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2304                         return false; \
2305                 intel_sdvo_connector->max_##name = data_value[0]; \
2306                 intel_sdvo_connector->cur_##name = response; \
2307                 intel_sdvo_connector->name = \
2308                         drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2309                 if (!intel_sdvo_connector->name) return false; \
2310                 intel_sdvo_connector->name->values[0] = 0; \
2311                 intel_sdvo_connector->name->values[1] = data_value[0]; \
2312                 drm_connector_attach_property(connector, \
2313                                               intel_sdvo_connector->name, \
2314                                               intel_sdvo_connector->cur_##name); \
2315                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2316                               data_value[0], data_value[1], response); \
2317         } \
2318 } while(0)
2319
2320 static bool
2321 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2322                                       struct intel_sdvo_connector *intel_sdvo_connector,
2323                                       struct intel_sdvo_enhancements_reply enhancements)
2324 {
2325         struct drm_device *dev = intel_sdvo->base.base.dev;
2326         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2327         uint16_t response, data_value[2];
2328
2329         /* when horizontal overscan is supported, Add the left/right  property */
2330         if (enhancements.overscan_h) {
2331                 if (!intel_sdvo_get_value(intel_sdvo,
2332                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2333                                           &data_value, 4))
2334                         return false;
2335
2336                 if (!intel_sdvo_get_value(intel_sdvo,
2337                                           SDVO_CMD_GET_OVERSCAN_H,
2338                                           &response, 2))
2339                         return false;
2340
2341                 intel_sdvo_connector->max_hscan = data_value[0];
2342                 intel_sdvo_connector->left_margin = data_value[0] - response;
2343                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2344                 intel_sdvo_connector->left =
2345                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2346                                             "left_margin", 2);
2347                 if (!intel_sdvo_connector->left)
2348                         return false;
2349
2350                 intel_sdvo_connector->left->values[0] = 0;
2351                 intel_sdvo_connector->left->values[1] = data_value[0];
2352                 drm_connector_attach_property(connector,
2353                                               intel_sdvo_connector->left,
2354                                               intel_sdvo_connector->left_margin);
2355
2356                 intel_sdvo_connector->right =
2357                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2358                                             "right_margin", 2);
2359                 if (!intel_sdvo_connector->right)
2360                         return false;
2361
2362                 intel_sdvo_connector->right->values[0] = 0;
2363                 intel_sdvo_connector->right->values[1] = data_value[0];
2364                 drm_connector_attach_property(connector,
2365                                               intel_sdvo_connector->right,
2366                                               intel_sdvo_connector->right_margin);
2367                 DRM_DEBUG_KMS("h_overscan: max %d, "
2368                               "default %d, current %d\n",
2369                               data_value[0], data_value[1], response);
2370         }
2371
2372         if (enhancements.overscan_v) {
2373                 if (!intel_sdvo_get_value(intel_sdvo,
2374                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2375                                           &data_value, 4))
2376                         return false;
2377
2378                 if (!intel_sdvo_get_value(intel_sdvo,
2379                                           SDVO_CMD_GET_OVERSCAN_V,
2380                                           &response, 2))
2381                         return false;
2382
2383                 intel_sdvo_connector->max_vscan = data_value[0];
2384                 intel_sdvo_connector->top_margin = data_value[0] - response;
2385                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2386                 intel_sdvo_connector->top =
2387                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2388                                             "top_margin", 2);
2389                 if (!intel_sdvo_connector->top)
2390                         return false;
2391
2392                 intel_sdvo_connector->top->values[0] = 0;
2393                 intel_sdvo_connector->top->values[1] = data_value[0];
2394                 drm_connector_attach_property(connector,
2395                                               intel_sdvo_connector->top,
2396                                               intel_sdvo_connector->top_margin);
2397
2398                 intel_sdvo_connector->bottom =
2399                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2400                                             "bottom_margin", 2);
2401                 if (!intel_sdvo_connector->bottom)
2402                         return false;
2403
2404                 intel_sdvo_connector->bottom->values[0] = 0;
2405                 intel_sdvo_connector->bottom->values[1] = data_value[0];
2406                 drm_connector_attach_property(connector,
2407                                               intel_sdvo_connector->bottom,
2408                                               intel_sdvo_connector->bottom_margin);
2409                 DRM_DEBUG_KMS("v_overscan: max %d, "
2410                               "default %d, current %d\n",
2411                               data_value[0], data_value[1], response);
2412         }
2413
2414         ENHANCEMENT(hpos, HPOS);
2415         ENHANCEMENT(vpos, VPOS);
2416         ENHANCEMENT(saturation, SATURATION);
2417         ENHANCEMENT(contrast, CONTRAST);
2418         ENHANCEMENT(hue, HUE);
2419         ENHANCEMENT(sharpness, SHARPNESS);
2420         ENHANCEMENT(brightness, BRIGHTNESS);
2421         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2422         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2423         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2424         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2425         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2426
2427         if (enhancements.dot_crawl) {
2428                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2429                         return false;
2430
2431                 intel_sdvo_connector->max_dot_crawl = 1;
2432                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2433                 intel_sdvo_connector->dot_crawl =
2434                         drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2435                 if (!intel_sdvo_connector->dot_crawl)
2436                         return false;
2437
2438                 intel_sdvo_connector->dot_crawl->values[0] = 0;
2439                 intel_sdvo_connector->dot_crawl->values[1] = 1;
2440                 drm_connector_attach_property(connector,
2441                                               intel_sdvo_connector->dot_crawl,
2442                                               intel_sdvo_connector->cur_dot_crawl);
2443                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2444         }
2445
2446         return true;
2447 }
2448
2449 static bool
2450 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2451                                         struct intel_sdvo_connector *intel_sdvo_connector,
2452                                         struct intel_sdvo_enhancements_reply enhancements)
2453 {
2454         struct drm_device *dev = intel_sdvo->base.base.dev;
2455         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2456         uint16_t response, data_value[2];
2457
2458         ENHANCEMENT(brightness, BRIGHTNESS);
2459
2460         return true;
2461 }
2462 #undef ENHANCEMENT
2463
2464 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2465                                                struct intel_sdvo_connector *intel_sdvo_connector)
2466 {
2467         union {
2468                 struct intel_sdvo_enhancements_reply reply;
2469                 uint16_t response;
2470         } enhancements;
2471
2472         enhancements.response = 0;
2473         intel_sdvo_get_value(intel_sdvo,
2474                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2475                              &enhancements, sizeof(enhancements));
2476         if (enhancements.response == 0) {
2477                 DRM_DEBUG_KMS("No enhancement is supported\n");
2478                 return true;
2479         }
2480
2481         if (IS_TV(intel_sdvo_connector))
2482                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2483         else if(IS_LVDS(intel_sdvo_connector))
2484                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2485         else
2486                 return true;
2487 }
2488
2489 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2490                                      struct i2c_msg *msgs,
2491                                      int num)
2492 {
2493         struct intel_sdvo *sdvo = adapter->algo_data;
2494
2495         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2496                 return -EIO;
2497
2498         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2499 }
2500
2501 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2502 {
2503         struct intel_sdvo *sdvo = adapter->algo_data;
2504         return sdvo->i2c->algo->functionality(sdvo->i2c);
2505 }
2506
2507 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2508         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2509         .functionality  = intel_sdvo_ddc_proxy_func
2510 };
2511
2512 static bool
2513 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2514                           struct drm_device *dev)
2515 {
2516         sdvo->ddc.owner = THIS_MODULE;
2517         sdvo->ddc.class = I2C_CLASS_DDC;
2518         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2519         sdvo->ddc.dev.parent = &dev->pdev->dev;
2520         sdvo->ddc.algo_data = sdvo;
2521         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2522
2523         return i2c_add_adapter(&sdvo->ddc) == 0;
2524 }
2525
2526 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2527 {
2528         struct drm_i915_private *dev_priv = dev->dev_private;
2529         struct intel_encoder *intel_encoder;
2530         struct intel_sdvo *intel_sdvo;
2531         int i;
2532
2533         intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2534         if (!intel_sdvo)
2535                 return false;
2536
2537         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2538                 kfree(intel_sdvo);
2539                 return false;
2540         }
2541
2542         intel_sdvo->sdvo_reg = sdvo_reg;
2543
2544         intel_encoder = &intel_sdvo->base;
2545         intel_encoder->type = INTEL_OUTPUT_SDVO;
2546         /* encoder type will be decided later */
2547         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2548
2549         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2550         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2551
2552         /* Read the regs to test if we can talk to the device */
2553         for (i = 0; i < 0x40; i++) {
2554                 u8 byte;
2555
2556                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2557                         DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2558                                       IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2559                         goto err;
2560                 }
2561         }
2562
2563         if (IS_SDVOB(sdvo_reg))
2564                 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2565         else
2566                 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2567
2568         drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2569
2570         /* In default case sdvo lvds is false */
2571         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2572                 goto err;
2573
2574         if (intel_sdvo_output_setup(intel_sdvo,
2575                                     intel_sdvo->caps.output_flags) != true) {
2576                 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2577                               IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2578                 goto err;
2579         }
2580
2581         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2582
2583         /* Set the input timing to the screen. Assume always input 0. */
2584         if (!intel_sdvo_set_target_input(intel_sdvo))
2585                 goto err;
2586
2587         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2588                                                     &intel_sdvo->pixel_clock_min,
2589                                                     &intel_sdvo->pixel_clock_max))
2590                 goto err;
2591
2592         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2593                         "clock range %dMHz - %dMHz, "
2594                         "input 1: %c, input 2: %c, "
2595                         "output 1: %c, output 2: %c\n",
2596                         SDVO_NAME(intel_sdvo),
2597                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2598                         intel_sdvo->caps.device_rev_id,
2599                         intel_sdvo->pixel_clock_min / 1000,
2600                         intel_sdvo->pixel_clock_max / 1000,
2601                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2602                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2603                         /* check currently supported outputs */
2604                         intel_sdvo->caps.output_flags &
2605                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2606                         intel_sdvo->caps.output_flags &
2607                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2608         return true;
2609
2610 err:
2611         drm_encoder_cleanup(&intel_encoder->base);
2612         i2c_del_adapter(&intel_sdvo->ddc);
2613         kfree(intel_sdvo);
2614
2615         return false;
2616 }