2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/init.h>
15 #include <asm/cache.h>
16 #include <asm/errno.h>
17 #include <asm/ptrace.h>
18 #include <asm/thread_info.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/unistd.h>
24 * Stack layout for the system_call stack entry.
25 * The first few entries are identical to the user_regs_struct.
27 SP_PTREGS = STACK_FRAME_OVERHEAD
28 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
29 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
30 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
31 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4
32 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12
34 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
35 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20
36 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
37 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28
38 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
39 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36
40 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
41 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44
42 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
43 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52
44 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
45 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60
46 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
47 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
48 SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
49 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
51 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
52 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
53 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
55 _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
56 _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
58 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
59 STACK_SIZE = 1 << STACK_SHIFT
61 #define BASED(name) name-system_call(%r13)
63 #ifdef CONFIG_TRACE_IRQFLAGS
66 l %r1,BASED(.Ltrace_irq_on_caller)
72 l %r1,BASED(.Ltrace_irq_off_caller)
77 #define TRACE_IRQS_OFF
81 .macro LOCKDEP_SYS_EXIT
82 tm SP_PSW+1(%r15),0x01 # returning to user ?
84 l %r1,BASED(.Llockdep_sys_exit)
89 #define LOCKDEP_SYS_EXIT
93 * Register usage in interrupt handlers:
94 * R9 - pointer to current task structure
95 * R13 - pointer to literal pool
96 * R14 - return register for function calls
97 * R15 - kernel stack pointer
100 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
101 lm %r10,%r11,\lc_from
110 1: stm %r10,%r11,\lc_sum
113 .macro SAVE_ALL_BASE savearea
114 stm %r12,%r15,\savearea
115 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
118 .macro SAVE_ALL_SVC psworg,savearea
120 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
123 .macro SAVE_ALL_SYNC psworg,savearea
125 tm \psworg+1,0x01 # test problem state bit
126 bz BASED(2f) # skip stack setup save
127 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
128 #ifdef CONFIG_CHECK_STACK
130 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
131 bz BASED(stack_overflow)
137 .macro SAVE_ALL_ASYNC psworg,savearea
139 tm \psworg+1,0x01 # test problem state bit
140 bnz BASED(1f) # from user -> load async stack
141 clc \psworg+4(4),BASED(.Lcritical_end)
143 clc \psworg+4(4),BASED(.Lcritical_start)
145 l %r14,BASED(.Lcleanup_critical)
147 tm 1(%r12),0x01 # retest problem state after cleanup
149 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
153 1: l %r15,__LC_ASYNC_STACK
154 #ifdef CONFIG_CHECK_STACK
156 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
157 bz BASED(stack_overflow)
163 .macro CREATE_STACK_FRAME psworg,savearea
164 s %r15,BASED(.Lc_spsize) # make room for registers & psw
165 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
166 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
167 icm %r12,12,__LC_SVC_ILC
168 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
170 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
172 st %r12,__SF_BACKCHAIN(%r15) # clear back chain
175 .macro RESTORE_ALL psworg,sync
176 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore
178 ni \psworg+1,0xfd # clear wait state bit
180 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
182 lpsw \psworg # back to caller
186 mvc __SF_EMPTY(1,%r15),SP_PSW(%r15)
187 ni __SF_EMPTY(%r15),0xbf
192 * Scheduler resume function, called by switch_to
193 * gpr2 = (task_struct *) prev
194 * gpr3 = (task_struct *) next
202 tm __THREAD_per(%r3),0xe8 # new process is using per ?
203 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine
204 stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff
205 clc __THREAD_per(12,%r3),__SF_EMPTY(%r15)
206 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's
207 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't
209 l %r4,__THREAD_info(%r2) # get thread_info of prev
210 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
211 bz __switch_to_no_mcck-__switch_to_base(%r1)
212 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
213 l %r4,__THREAD_info(%r3) # get thread_info of next
214 oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
216 stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
217 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
218 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
219 lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
220 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct
221 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
222 l %r3,__THREAD_info(%r3) # load thread_info from task struct
223 st %r3,__LC_THREAD_INFO
225 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
230 * SVC interrupt handler routine. System calls are synchronous events and
231 * are executed with interrupts enabled.
236 stpt __LC_SYNC_ENTER_TIMER
238 SAVE_ALL_BASE __LC_SAVE_AREA
239 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
240 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
241 lh %r7,0x8a # get svc number from lowcore
243 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
245 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
247 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
249 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
250 ltr %r7,%r7 # test for svc 0
251 bnz BASED(sysc_nr_ok) # svc number > 0
252 # svc 0: system call number in %r1
253 cl %r1,BASED(.Lnr_syscalls)
254 bnl BASED(sysc_nr_ok)
255 lr %r7,%r1 # copy svc number to %r7
257 sth %r7,SP_SVCNR(%r15)
258 sll %r7,2 # svc number *4
259 l %r8,BASED(.Lsysc_table)
260 tm __TI_flags+2(%r9),_TIF_SYSCALL
261 mvc SP_ARGS(4,%r15),SP_R7(%r15)
262 l %r8,0(%r7,%r8) # get system call addr.
263 bnz BASED(sysc_tracesys)
264 basr %r14,%r8 # call sys_xxxx
265 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
270 tm __TI_flags+3(%r9),_TIF_WORK_SVC
271 bnz BASED(sysc_work) # there is work to do (signals etc.)
273 RESTORE_ALL __LC_RETURN_PSW,1
277 # There is work to do, but first we need to check if we return to userspace.
280 tm SP_PSW+1(%r15),0x01 # returning to user ?
281 bno BASED(sysc_restore)
284 # One of the work bits is on. Find out which one.
287 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
288 bo BASED(sysc_mcck_pending)
289 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
290 bo BASED(sysc_reschedule)
291 tm __TI_flags+3(%r9),_TIF_SIGPENDING
292 bo BASED(sysc_sigpending)
293 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
294 bo BASED(sysc_notify_resume)
295 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
296 bo BASED(sysc_restart)
297 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
298 bo BASED(sysc_singlestep)
299 b BASED(sysc_return) # beware of critical section cleanup
302 # _TIF_NEED_RESCHED is set, call schedule
305 l %r1,BASED(.Lschedule)
306 la %r14,BASED(sysc_return)
307 br %r1 # call scheduler
310 # _TIF_MCCK_PENDING is set, call handler
313 l %r1,BASED(.Ls390_handle_mcck)
314 la %r14,BASED(sysc_return)
315 br %r1 # TIF bit will be cleared by handler
318 # _TIF_SIGPENDING is set, call do_signal
321 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
322 la %r2,SP_PTREGS(%r15) # load pt_regs
323 l %r1,BASED(.Ldo_signal)
324 basr %r14,%r1 # call do_signal
325 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
326 bo BASED(sysc_restart)
327 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
328 bo BASED(sysc_singlestep)
332 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
335 la %r2,SP_PTREGS(%r15) # load pt_regs
336 l %r1,BASED(.Ldo_notify_resume)
337 la %r14,BASED(sysc_return)
338 br %r1 # call do_notify_resume
342 # _TIF_RESTART_SVC is set, set up registers and restart svc
345 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
346 l %r7,SP_R2(%r15) # load new svc number
347 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
348 lm %r2,%r6,SP_R2(%r15) # load svc arguments
349 b BASED(sysc_nr_ok) # restart svc
352 # _TIF_SINGLE_STEP is set, call do_single_step
355 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
356 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
357 mvi SP_SVCNR+1(%r15),0xff
358 la %r2,SP_PTREGS(%r15) # address of register-save area
359 l %r1,BASED(.Lhandle_per) # load adr. of per handler
360 la %r14,BASED(sysc_return) # load adr. of system return
361 br %r1 # branch to do_single_step
364 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
365 # and after the system call
368 l %r1,BASED(.Ltrace_entry)
369 la %r2,SP_PTREGS(%r15) # load pt_regs
374 cl %r2,BASED(.Lnr_syscalls)
375 bnl BASED(sysc_tracenogo)
376 l %r8,BASED(.Lsysc_table)
378 sll %r7,2 # svc number *4
381 lm %r3,%r6,SP_R3(%r15)
382 mvc SP_ARGS(4,%r15),SP_R7(%r15)
383 l %r2,SP_ORIG_R2(%r15)
384 basr %r14,%r8 # call sys_xxx
385 st %r2,SP_R2(%r15) # store return value
387 tm __TI_flags+2(%r9),_TIF_SYSCALL
388 bz BASED(sysc_return)
389 l %r1,BASED(.Ltrace_exit)
390 la %r2,SP_PTREGS(%r15) # load pt_regs
391 la %r14,BASED(sysc_return)
395 # a new process exits the kernel with ret_from_fork
399 l %r13,__LC_SVC_NEW_PSW+4
400 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
401 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
403 st %r15,SP_R15(%r15) # store stack pointer for new kthread
404 0: l %r1,BASED(.Lschedtail)
407 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
408 b BASED(sysc_tracenogo)
411 # kernel_execve function needs to deal with pt_regs that is not
416 stm %r12,%r15,48(%r15)
418 l %r13,__LC_SVC_NEW_PSW+4
419 s %r15,BASED(.Lc_spsize)
420 st %r14,__SF_BACKCHAIN(%r15)
421 la %r12,SP_PTREGS(%r15)
422 xc 0(__PT_SIZE,%r12),0(%r12)
423 l %r1,BASED(.Ldo_execve)
428 a %r15,BASED(.Lc_spsize)
429 lm %r12,%r15,48(%r15)
432 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
433 l %r15,__LC_KERNEL_STACK # load ksp
434 s %r15,BASED(.Lc_spsize) # make room for registers & psw
435 l %r9,__LC_THREAD_INFO
436 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
437 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
438 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
439 l %r1,BASED(.Lexecve_tail)
444 * Program check handler routine
447 .globl pgm_check_handler
450 * First we need to check for a special case:
451 * Single stepping an instruction that disables the PER event mask will
452 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
453 * For a single stepped SVC the program check handler gets control after
454 * the SVC new PSW has been loaded. But we want to execute the SVC first and
455 * then handle the PER event. Therefore we update the SVC old PSW to point
456 * to the pgm_check_handler and branch to the SVC handler after we checked
457 * if we have to load the kernel stack register.
458 * For every other possible cause for PER event without the PER mask set
459 * we just ignore the PER event (FIXME: is there anything we have to do
462 stpt __LC_SYNC_ENTER_TIMER
463 SAVE_ALL_BASE __LC_SAVE_AREA
464 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
465 bnz BASED(pgm_per) # got per exception -> special case
466 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
467 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
468 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
469 bz BASED(pgm_no_vtime)
470 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
471 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
472 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
474 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
475 l %r3,__LC_PGM_ILC # load program interruption code
476 l %r4,__LC_TRANS_EXC_CODE
481 l %r7,BASED(.Ljump_table)
483 l %r7,0(%r8,%r7) # load address of handler routine
484 la %r2,SP_PTREGS(%r15) # address of register-save area
485 basr %r14,%r7 # branch to interrupt-handler
490 # handle per exception
493 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
494 bnz BASED(pgm_per_std) # ok, normal per event from user space
495 # ok its one of the special cases, now we need to find out which one
496 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
498 # no interesting special case, ignore PER event
499 lm %r12,%r15,__LC_SAVE_AREA
503 # Normal per exception
506 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
507 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
508 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
509 bz BASED(pgm_no_vtime2)
510 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
511 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
512 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
514 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
516 tm SP_PSW+1(%r15),0x01 # kernel per event ?
518 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
519 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
520 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
521 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
522 l %r3,__LC_PGM_ILC # load program interruption code
523 l %r4,__LC_TRANS_EXC_CODE
526 nr %r8,%r3 # clear per-event-bit and ilc
527 be BASED(pgm_exit2) # only per or per+check ?
528 l %r7,BASED(.Ljump_table)
530 l %r7,0(%r8,%r7) # load address of handler routine
531 la %r2,SP_PTREGS(%r15) # address of register-save area
532 basr %r14,%r7 # branch to interrupt-handler
537 # it was a single stepped SVC that is causing all the trouble
540 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
541 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
542 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
543 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
544 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
545 lh %r7,0x8a # get svc number from lowcore
546 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
548 mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
549 mvc __THREAD_per+__PER_address(4,%r8),__LC_PER_ADDRESS
550 mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
551 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
552 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
553 lm %r2,%r6,SP_R2(%r15) # load svc arguments
557 # per was called from kernel, must be kprobes
560 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
561 mvi SP_SVCNR+1(%r15),0xff
562 la %r2,SP_PTREGS(%r15) # address of register-save area
563 l %r1,BASED(.Lhandle_per) # load adr. of per handler
564 basr %r14,%r1 # branch to do_single_step
568 * IO interrupt handler routine
571 .globl io_int_handler
574 stpt __LC_ASYNC_ENTER_TIMER
575 SAVE_ALL_BASE __LC_SAVE_AREA+16
576 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
577 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
578 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
579 bz BASED(io_no_vtime)
580 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
581 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
582 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
585 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
586 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
587 la %r2,SP_PTREGS(%r15) # address of register-save area
588 basr %r14,%r1 # branch to standard irq handler
593 tm __TI_flags+3(%r9),_TIF_WORK_INT
594 bnz BASED(io_work) # there is work to do (signals etc.)
596 RESTORE_ALL __LC_RETURN_PSW,0
600 # There is work todo, find out in which context we have been interrupted:
601 # 1) if we return to user space we can do all _TIF_WORK_INT work
602 # 2) if we return to kernel code and preemptive scheduling is enabled check
603 # the preemption counter and if it is zero call preempt_schedule_irq
604 # Before any work can be done, a switch to the kernel stack is required.
607 tm SP_PSW+1(%r15),0x01 # returning to user ?
608 bo BASED(io_work_user) # yes -> do resched & signal
609 #ifdef CONFIG_PREEMPT
610 # check for preemptive scheduling
611 icm %r0,15,__TI_precount(%r9)
612 bnz BASED(io_restore) # preemption disabled
613 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
614 bno BASED(io_restore)
615 # switch to kernel stack
617 s %r1,BASED(.Lc_spsize)
618 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
619 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
621 # TRACE_IRQS_ON already done at io_return, call
622 # TRACE_IRQS_OFF to keep things symmetrical
624 l %r1,BASED(.Lpreempt_schedule_irq)
625 basr %r14,%r1 # call preempt_schedule_irq
632 # Need to do work before returning to userspace, switch to kernel stack
635 l %r1,__LC_KERNEL_STACK
636 s %r1,BASED(.Lc_spsize)
637 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
638 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
642 # One of the work bits is on. Find out which one.
643 # Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED
644 # and _TIF_MCCK_PENDING
647 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
648 bo BASED(io_mcck_pending)
649 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
650 bo BASED(io_reschedule)
651 tm __TI_flags+3(%r9),_TIF_SIGPENDING
652 bo BASED(io_sigpending)
653 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
654 bo BASED(io_notify_resume)
655 b BASED(io_return) # beware of critical section cleanup
658 # _TIF_MCCK_PENDING is set, call handler
661 # TRACE_IRQS_ON already done at io_return
662 l %r1,BASED(.Ls390_handle_mcck)
663 basr %r14,%r1 # TIF bit will be cleared by handler
668 # _TIF_NEED_RESCHED is set, call schedule
671 # TRACE_IRQS_ON already done at io_return
672 l %r1,BASED(.Lschedule)
673 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
674 basr %r14,%r1 # call scheduler
675 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
680 # _TIF_SIGPENDING is set, call do_signal
683 # TRACE_IRQS_ON already done at io_return
684 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
685 la %r2,SP_PTREGS(%r15) # load pt_regs
686 l %r1,BASED(.Ldo_signal)
687 basr %r14,%r1 # call do_signal
688 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
693 # _TIF_SIGPENDING is set, call do_signal
696 # TRACE_IRQS_ON already done at io_return
697 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
698 la %r2,SP_PTREGS(%r15) # load pt_regs
699 l %r1,BASED(.Ldo_notify_resume)
700 basr %r14,%r1 # call do_signal
701 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
706 * External interrupt handler routine
709 .globl ext_int_handler
712 stpt __LC_ASYNC_ENTER_TIMER
713 SAVE_ALL_BASE __LC_SAVE_AREA+16
714 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
715 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
716 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
717 bz BASED(ext_no_vtime)
718 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
719 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
720 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
722 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
724 la %r2,SP_PTREGS(%r15) # address of register-save area
725 l %r3,__LC_CPU_ADDRESS # get cpu address + interruption code
726 l %r4,__LC_EXT_PARAMS # get external parameters
727 l %r1,BASED(.Ldo_extint)
734 * Machine check handler routines
737 .globl mcck_int_handler
740 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
741 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
742 SAVE_ALL_BASE __LC_SAVE_AREA+32
743 la %r12,__LC_MCK_OLD_PSW
744 tm __LC_MCCK_CODE,0x80 # system damage?
745 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
746 mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
747 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
749 la %r14,__LC_SYNC_ENTER_TIMER
750 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
752 la %r14,__LC_ASYNC_ENTER_TIMER
753 0: clc 0(8,%r14),__LC_EXIT_TIMER
755 la %r14,__LC_EXIT_TIMER
756 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
758 la %r14,__LC_LAST_UPDATE_TIMER
760 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
761 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
762 bno BASED(mcck_int_main) # no -> skip cleanup critical
763 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
764 bnz BASED(mcck_int_main) # from user -> load async stack
765 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
766 bhe BASED(mcck_int_main)
767 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
768 bl BASED(mcck_int_main)
769 l %r14,BASED(.Lcleanup_critical)
772 l %r14,__LC_PANIC_STACK # are we already on the panic stack?
776 l %r15,__LC_PANIC_STACK # load panic stack
777 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
778 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
779 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
780 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
781 bz BASED(mcck_no_vtime)
782 UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER
783 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
784 mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
786 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
787 la %r2,SP_PTREGS(%r15) # load pt_regs
788 l %r1,BASED(.Ls390_mcck)
789 basr %r14,%r1 # call machine check handler
790 tm SP_PSW+1(%r15),0x01 # returning to user ?
791 bno BASED(mcck_return)
792 l %r1,__LC_KERNEL_STACK # switch to kernel stack
793 s %r1,BASED(.Lc_spsize)
794 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
795 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
797 stosm __SF_EMPTY(%r15),0x04 # turn dat on
798 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
799 bno BASED(mcck_return)
801 l %r1,BASED(.Ls390_handle_mcck)
802 basr %r14,%r1 # call machine check handler
805 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
806 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
807 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
809 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
811 lpsw __LC_RETURN_MCCK_PSW # back to caller
812 0: lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
813 lpsw __LC_RETURN_MCCK_PSW # back to caller
815 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
818 * Restart interruption handler, kick starter for additional CPUs
822 .globl restart_int_handler
826 spt restart_vtime-restart_base(%r1)
827 stck __LC_LAST_UPDATE_CLOCK
828 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
829 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
830 l %r15,__LC_SAVE_AREA+60 # load ksp
831 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
832 lam %a0,%a15,__LC_AREGS_SAVE_AREA
833 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
834 l %r1,__LC_THREAD_INFO
835 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
836 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
837 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
838 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
840 l %r14,restart_addr-.(%r14)
841 br %r14 # branch to start_secondary
843 .long start_secondary
846 .long 0x7fffffff,0xffffffff
850 * If we do not run with SMP enabled, let the new CPU crash ...
852 .globl restart_int_handler
856 lpsw restart_crash-restart_base(%r1)
859 .long 0x000a0000,0x00000000
863 #ifdef CONFIG_CHECK_STACK
865 * The synchronous or the asynchronous stack overflowed. We are dead.
866 * No need to properly save the registers, we are going to panic anyway.
867 * Setup a pt_regs so that show_trace can provide a good call trace.
870 l %r15,__LC_PANIC_STACK # change to panic stack
871 sl %r15,BASED(.Lc_spsize)
872 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
873 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
874 la %r1,__LC_SAVE_AREA
875 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ?
877 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ?
879 la %r1,__LC_SAVE_AREA+16
880 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack
881 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
882 l %r1,BASED(1f) # branch to kernel_stack_overflow
883 la %r2,SP_PTREGS(%r15) # load pt_regs
885 1: .long kernel_stack_overflow
888 cleanup_table_system_call:
889 .long system_call + 0x80000000, sysc_do_svc + 0x80000000
890 cleanup_table_sysc_tif:
891 .long sysc_tif + 0x80000000, sysc_restore + 0x80000000
892 cleanup_table_sysc_restore:
893 .long sysc_restore + 0x80000000, sysc_done + 0x80000000
894 cleanup_table_io_tif:
895 .long io_tif + 0x80000000, io_restore + 0x80000000
896 cleanup_table_io_restore:
897 .long io_restore + 0x80000000, io_done + 0x80000000
900 clc 4(4,%r12),BASED(cleanup_table_system_call)
902 clc 4(4,%r12),BASED(cleanup_table_system_call+4)
903 bl BASED(cleanup_system_call)
905 clc 4(4,%r12),BASED(cleanup_table_sysc_tif)
907 clc 4(4,%r12),BASED(cleanup_table_sysc_tif+4)
908 bl BASED(cleanup_sysc_tif)
910 clc 4(4,%r12),BASED(cleanup_table_sysc_restore)
912 clc 4(4,%r12),BASED(cleanup_table_sysc_restore+4)
913 bl BASED(cleanup_sysc_restore)
915 clc 4(4,%r12),BASED(cleanup_table_io_tif)
917 clc 4(4,%r12),BASED(cleanup_table_io_tif+4)
918 bl BASED(cleanup_io_tif)
920 clc 4(4,%r12),BASED(cleanup_table_io_restore)
922 clc 4(4,%r12),BASED(cleanup_table_io_restore+4)
923 bl BASED(cleanup_io_restore)
928 mvc __LC_RETURN_PSW(8),0(%r12)
929 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
931 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
932 c %r12,BASED(.Lmck_old_psw)
934 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
935 0: c %r12,BASED(.Lmck_old_psw)
936 la %r12,__LC_SAVE_AREA+32
938 la %r12,__LC_SAVE_AREA+16
939 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
940 bhe BASED(cleanup_vtime)
941 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
943 mvc __LC_SAVE_AREA(16),0(%r12)
945 st %r12,__LC_SAVE_AREA+48 # argh
946 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
947 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
948 l %r12,__LC_SAVE_AREA+48 # argh
952 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
953 bhe BASED(cleanup_stime)
954 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
956 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
957 bh BASED(cleanup_update)
958 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
960 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
961 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
962 la %r12,__LC_RETURN_PSW
964 cleanup_system_call_insn:
965 .long sysc_saveall + 0x80000000
966 .long system_call + 0x80000000
967 .long sysc_vtime + 0x80000000
968 .long sysc_stime + 0x80000000
969 .long sysc_update + 0x80000000
972 mvc __LC_RETURN_PSW(4),0(%r12)
973 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_tif)
974 la %r12,__LC_RETURN_PSW
977 cleanup_sysc_restore:
978 clc 4(4,%r12),BASED(cleanup_sysc_restore_insn)
980 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
981 c %r12,BASED(.Lmck_old_psw)
983 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
984 0: clc 4(4,%r12),BASED(cleanup_sysc_restore_insn+4)
986 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
987 c %r12,BASED(.Lmck_old_psw)
988 la %r12,__LC_SAVE_AREA+32
990 la %r12,__LC_SAVE_AREA+16
991 1: mvc 0(16,%r12),SP_R12(%r15)
992 lm %r0,%r11,SP_R0(%r15)
994 2: la %r12,__LC_RETURN_PSW
996 cleanup_sysc_restore_insn:
997 .long sysc_done - 4 + 0x80000000
998 .long sysc_done - 8 + 0x80000000
1001 mvc __LC_RETURN_PSW(4),0(%r12)
1002 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_tif)
1003 la %r12,__LC_RETURN_PSW
1007 clc 4(4,%r12),BASED(cleanup_io_restore_insn)
1009 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1010 clc 4(4,%r12),BASED(cleanup_io_restore_insn+4)
1012 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1013 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1014 lm %r0,%r11,SP_R0(%r15)
1016 1: la %r12,__LC_RETURN_PSW
1018 cleanup_io_restore_insn:
1019 .long io_done - 4 + 0x80000000
1020 .long io_done - 8 + 0x80000000
1026 .Lc_spsize: .long SP_SIZE
1027 .Lc_overhead: .long STACK_FRAME_OVERHEAD
1028 .Lnr_syscalls: .long NR_syscalls
1029 .L0x018: .short 0x018
1030 .L0x020: .short 0x020
1031 .L0x028: .short 0x028
1032 .L0x030: .short 0x030
1033 .L0x038: .short 0x038
1039 .Ls390_mcck: .long s390_do_machine_check
1041 .long s390_handle_mcck
1042 .Lmck_old_psw: .long __LC_MCK_OLD_PSW
1043 .Ldo_IRQ: .long do_IRQ
1044 .Ldo_extint: .long do_extint
1045 .Ldo_signal: .long do_signal
1047 .long do_notify_resume
1048 .Lhandle_per: .long do_single_step
1049 .Ldo_execve: .long do_execve
1050 .Lexecve_tail: .long execve_tail
1051 .Ljump_table: .long pgm_check_table
1052 .Lschedule: .long schedule
1053 #ifdef CONFIG_PREEMPT
1054 .Lpreempt_schedule_irq:
1055 .long preempt_schedule_irq
1057 .Ltrace_entry: .long do_syscall_trace_enter
1058 .Ltrace_exit: .long do_syscall_trace_exit
1059 .Lschedtail: .long schedule_tail
1060 .Lsysc_table: .long sys_call_table
1061 #ifdef CONFIG_TRACE_IRQFLAGS
1062 .Ltrace_irq_on_caller:
1063 .long trace_hardirqs_on_caller
1064 .Ltrace_irq_off_caller:
1065 .long trace_hardirqs_off_caller
1067 #ifdef CONFIG_LOCKDEP
1069 .long lockdep_sys_exit
1072 .long __critical_start + 0x80000000
1074 .long __critical_end + 0x80000000
1076 .long cleanup_critical
1078 .section .rodata, "a"
1079 #define SYSCALL(esa,esame,emu) .long esa
1080 .globl sys_call_table
1082 #include "syscalls.S"