2 * Low-level system-call handling, trap handlers and context-switching
4 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2008-2009 PetaLogix
6 * Copyright (C) 2003 John Williams <jwilliams@itee.uq.edu.au>
7 * Copyright (C) 2001,2002 NEC Corporation
8 * Copyright (C) 2001,2002 Miles Bader <miles@gnu.org>
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file COPYING in the main directory of this
12 * archive for more details.
14 * Written by Miles Bader <miles@gnu.org>
15 * Heavily modified by John Williams for Microblaze
18 #include <linux/sys.h>
19 #include <linux/linkage.h>
21 #include <asm/entry.h>
22 #include <asm/current.h>
23 #include <asm/processor.h>
24 #include <asm/exceptions.h>
25 #include <asm/asm-offsets.h>
26 #include <asm/thread_info.h>
29 #include <asm/unistd.h>
31 #include <linux/errno.h>
32 #include <asm/signal.h>
36 /* The size of a state save frame. */
37 #define STATE_SAVE_SIZE (PT_SIZE + STATE_SAVE_ARG_SPACE)
39 /* The offset of the struct pt_regs in a `state save frame' on the stack. */
40 #define PTO STATE_SAVE_ARG_SPACE /* 24 the space for args */
42 #define C_ENTRY(name) .globl name; .align 4; name
45 * Various ways of setting and clearing BIP in flags reg.
46 * This is mucky, but necessary using microblaze version that
47 * allows msr ops to write to BIP
49 #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
104 andi r11, r11, ~MSR_BIP
112 ori r11, r11, MSR_BIP
120 andi r11, r11, ~MSR_EIP
136 andi r11, r11, ~MSR_IE
152 ori r11, r11, MSR_VMS
153 andni r11, r11, MSR_UMS
161 ori r11, r11, MSR_VMS
162 andni r11, r11, MSR_UMS
170 andni r11, r11, (MSR_VMS|MSR_UMS)
176 /* Define how to call high-level functions. With MMU, virtual mode must be
177 * enabled when calling the high-level function. Clobbers R11.
178 * VM_ON, VM_OFF, DO_JUMP_BIPCLR, DO_CALL
181 /* turn on virtual protected mode save */
187 /* turn off virtual protected mode save and user mode save*/
190 rted r0, TOPHYS(1f); \
194 swi r2, r1, PTO+PT_R2; /* Save SDA */ \
195 swi r5, r1, PTO+PT_R5; \
196 swi r6, r1, PTO+PT_R6; \
197 swi r7, r1, PTO+PT_R7; \
198 swi r8, r1, PTO+PT_R8; \
199 swi r9, r1, PTO+PT_R9; \
200 swi r10, r1, PTO+PT_R10; \
201 swi r11, r1, PTO+PT_R11; /* save clobbered regs after rval */\
202 swi r12, r1, PTO+PT_R12; \
203 swi r13, r1, PTO+PT_R13; /* Save SDA2 */ \
204 swi r14, r1, PTO+PT_PC; /* PC, before IRQ/trap */ \
205 swi r15, r1, PTO+PT_R15; /* Save LP */ \
206 swi r18, r1, PTO+PT_R18; /* Save asm scratch reg */ \
207 swi r19, r1, PTO+PT_R19; \
208 swi r20, r1, PTO+PT_R20; \
209 swi r21, r1, PTO+PT_R21; \
210 swi r22, r1, PTO+PT_R22; \
211 swi r23, r1, PTO+PT_R23; \
212 swi r24, r1, PTO+PT_R24; \
213 swi r25, r1, PTO+PT_R25; \
214 swi r26, r1, PTO+PT_R26; \
215 swi r27, r1, PTO+PT_R27; \
216 swi r28, r1, PTO+PT_R28; \
217 swi r29, r1, PTO+PT_R29; \
218 swi r30, r1, PTO+PT_R30; \
219 swi r31, r1, PTO+PT_R31; /* Save current task reg */ \
220 mfs r11, rmsr; /* save MSR */ \
222 swi r11, r1, PTO+PT_MSR;
224 #define RESTORE_REGS \
225 lwi r11, r1, PTO+PT_MSR; \
228 lwi r2, r1, PTO+PT_R2; /* restore SDA */ \
229 lwi r5, r1, PTO+PT_R5; \
230 lwi r6, r1, PTO+PT_R6; \
231 lwi r7, r1, PTO+PT_R7; \
232 lwi r8, r1, PTO+PT_R8; \
233 lwi r9, r1, PTO+PT_R9; \
234 lwi r10, r1, PTO+PT_R10; \
235 lwi r11, r1, PTO+PT_R11; /* restore clobbered regs after rval */\
236 lwi r12, r1, PTO+PT_R12; \
237 lwi r13, r1, PTO+PT_R13; /* restore SDA2 */ \
238 lwi r14, r1, PTO+PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\
239 lwi r15, r1, PTO+PT_R15; /* restore LP */ \
240 lwi r18, r1, PTO+PT_R18; /* restore asm scratch reg */ \
241 lwi r19, r1, PTO+PT_R19; \
242 lwi r20, r1, PTO+PT_R20; \
243 lwi r21, r1, PTO+PT_R21; \
244 lwi r22, r1, PTO+PT_R22; \
245 lwi r23, r1, PTO+PT_R23; \
246 lwi r24, r1, PTO+PT_R24; \
247 lwi r25, r1, PTO+PT_R25; \
248 lwi r26, r1, PTO+PT_R26; \
249 lwi r27, r1, PTO+PT_R27; \
250 lwi r28, r1, PTO+PT_R28; \
251 lwi r29, r1, PTO+PT_R29; \
252 lwi r30, r1, PTO+PT_R30; \
253 lwi r31, r1, PTO+PT_R31; /* Restore cur task reg */
260 * System calls are handled here.
263 * Syscall number in r12, args in r5-r10
266 * Trap entered via brki instruction, so BIP bit is set, and interrupts
267 * are masked. This is nice, means we don't have to CLI before state save
269 C_ENTRY(_user_exception):
270 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
271 addi r14, r14, 4 /* return address is 4 byte after call */
272 swi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* Save r11 */
274 lwi r11, r0, TOPHYS(PER_CPU(KM));/* See if already in kernel mode.*/
275 beqi r11, 1f; /* Jump ahead if coming from user */
276 /* Kernel-mode state save. */
277 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
279 swi r11, r1, (PT_R1-PT_SIZE); /* Save original SP. */
280 lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
282 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
285 addi r11, r0, 1; /* Was in kernel-mode. */
286 swi r11, r1, PTO+PT_MODE; /* pt_regs -> kernel mode */
288 nop; /* Fill delay slot */
290 /* User-mode state save. */
292 lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
293 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
295 lwi r1, r1, TS_THREAD_INFO; /* get stack from task_struct */
296 /* calculate kernel stack pointer from task struct 8k */
297 addik r1, r1, THREAD_SIZE;
300 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
303 swi r0, r1, PTO+PT_MODE; /* Was in user-mode. */
304 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
305 swi r11, r1, PTO+PT_R1; /* Store user SP. */
307 swi r11, r0, TOPHYS(PER_CPU(KM)); /* Now we're in kernel-mode. */
308 2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
309 /* Save away the syscall number. */
310 swi r12, r1, PTO+PT_R0;
313 /* where the trap should return need -8 to adjust for rtsd r15, 8*/
314 /* Jump to the appropriate function for the system call number in r12
315 * (r12 is not preserved), or return an error if r12 is not valid. The LP
316 * register should point to the location where
317 * the called function should return. [note that MAKE_SYS_CALL uses label 1] */
319 # Step into virtual mode.
325 lwi r11, CURRENT_TASK, TS_THREAD_INFO /* get thread info */
326 lwi r11, r11, TI_FLAGS /* get flags in thread info */
327 andi r11, r11, _TIF_WORK_SYSCALL_MASK
330 addik r3, r0, -ENOSYS
331 swi r3, r1, PTO + PT_R3
332 brlid r15, do_syscall_trace_enter
333 addik r5, r1, PTO + PT_R0
335 # do_syscall_trace_enter returns the new syscall nr.
337 lwi r5, r1, PTO+PT_R5;
338 lwi r6, r1, PTO+PT_R6;
339 lwi r7, r1, PTO+PT_R7;
340 lwi r8, r1, PTO+PT_R8;
341 lwi r9, r1, PTO+PT_R9;
342 lwi r10, r1, PTO+PT_R10;
344 /* Jump to the appropriate function for the system call number in r12
345 * (r12 is not preserved), or return an error if r12 is not valid.
346 * The LP register should point to the location where the called function
347 * should return. [note that MAKE_SYS_CALL uses label 1] */
348 /* See if the system call number is valid */
349 addi r11, r12, -__NR_syscalls;
351 /* Figure out which function to use for this system call. */
352 /* Note Microblaze barrel shift is optional, so don't rely on it */
353 add r12, r12, r12; /* convert num -> ptr */
357 /* Trac syscalls and stored them to r0_ram */
358 lwi r3, r12, 0x400 + r0_ram
360 swi r3, r12, 0x400 + r0_ram
363 # Find and jump into the syscall handler.
364 lwi r12, r12, sys_call_table
365 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
366 la r15, r0, ret_from_trap-8
369 /* The syscall number is invalid, return an error. */
371 addi r3, r0, -ENOSYS;
372 rtsd r15,8; /* looks like a normal subroutine return */
376 /* Entry point used to return from a syscall/trap */
377 /* We re-enable BIP bit before state restore */
378 C_ENTRY(ret_from_trap):
379 set_bip; /* Ints masked for state restore*/
380 lwi r11, r1, PTO+PT_MODE;
381 /* See if returning to kernel mode, if so, skip resched &c. */
384 swi r3, r1, PTO + PT_R3
385 swi r4, r1, PTO + PT_R4
387 /* We're returning to user mode, so check for various conditions that
388 * trigger rescheduling. */
389 /* FIXME: Restructure all these flag checks. */
390 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
391 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
392 andi r11, r11, _TIF_WORK_SYSCALL_MASK
395 brlid r15, do_syscall_trace_leave
396 addik r5, r1, PTO + PT_R0
398 /* We're returning to user mode, so check for various conditions that
399 * trigger rescheduling. */
400 /* get thread info from current task */
401 lwi r11, CURRENT_TASK, TS_THREAD_INFO;
402 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
403 andi r11, r11, _TIF_NEED_RESCHED;
406 bralid r15, schedule; /* Call scheduler */
407 nop; /* delay slot */
409 /* Maybe handle a signal */
410 5: /* get thread info from current task*/
411 lwi r11, CURRENT_TASK, TS_THREAD_INFO;
412 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
413 andi r11, r11, _TIF_SIGPENDING;
414 beqi r11, 1f; /* Signals to handle, handle them */
416 la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
417 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
418 addi r7, r0, 1; /* Arg 3: int in_syscall */
419 bralid r15, do_signal; /* Handle any signals */
422 /* Finally, return to user state. */
424 lwi r3, r1, PTO + PT_R3; /* restore syscall result */
425 lwi r4, r1, PTO + PT_R4;
427 swi r0, r0, PER_CPU(KM); /* Now officially in user state. */
428 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
432 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
433 lwi r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */
436 /* Return to kernel state. */
440 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
443 TRAP_return: /* Make global symbol for debugging */
444 rtbd r14, 0; /* Instructions to return from an IRQ */
448 /* These syscalls need access to the struct pt_regs on the stack, so we
449 implement them in assembly (they're basically all wrappers anyway). */
451 C_ENTRY(sys_fork_wrapper):
452 addi r5, r0, SIGCHLD /* Arg 0: flags */
453 lwi r6, r1, PTO+PT_R1 /* Arg 1: child SP (use parent's) */
454 la r7, r1, PTO /* Arg 2: parent context */
455 add r8. r0, r0 /* Arg 3: (unused) */
456 add r9, r0, r0; /* Arg 4: (unused) */
457 add r10, r0, r0; /* Arg 5: (unused) */
458 brid do_fork /* Do real work (tail-call) */
461 /* This the initial entry point for a new child thread, with an appropriate
462 stack in place that makes it look the the child is in the middle of an
463 syscall. This function is actually `returned to' from switch_thread
464 (copy_thread makes ret_from_fork the return address in each new thread's
466 C_ENTRY(ret_from_fork):
467 bralid r15, schedule_tail; /* ...which is schedule_tail's arg */
468 add r3, r5, r0; /* switch_thread returns the prev task */
469 /* ( in the delay slot ) */
470 add r3, r0, r0; /* Child's fork call should return 0. */
471 brid ret_from_trap; /* Do normal trap return */
475 brid microblaze_vfork /* Do real work (tail-call) */
479 bnei r6, 1f; /* See if child SP arg (arg 1) is 0. */
480 lwi r6, r1, PTO+PT_R1; /* If so, use paret's stack ptr */
481 1: la r7, r1, PTO; /* Arg 2: parent context */
482 add r8, r0, r0; /* Arg 3: (unused) */
483 add r9, r0, r0; /* Arg 4: (unused) */
484 add r10, r0, r0; /* Arg 5: (unused) */
485 brid do_fork /* Do real work (tail-call) */
489 la r8, r1, PTO; /* add user context as 4th arg */
490 brid microblaze_execve; /* Do real work (tail-call).*/
493 C_ENTRY(sys_rt_sigreturn_wrapper):
494 swi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
495 swi r4, r1, PTO+PT_R4;
496 la r5, r1, PTO; /* add user context as 1st arg */
497 brlid r15, sys_rt_sigreturn /* Do real work */
499 lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
500 lwi r4, r1, PTO+PT_R4;
501 bri ret_from_trap /* fall through will not work here due to align */
505 * HW EXCEPTION rutine start
509 swi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* Save r11 */ \
510 set_bip; /*equalize initial state for all possible entries*/\
514 /* See if already in kernel mode.*/ \
515 lwi r11, r0, TOPHYS(PER_CPU(KM)); \
516 beqi r11, 1f; /* Jump ahead if coming from user */\
517 /* Kernel-mode state save. */ \
518 /* Reload kernel stack-ptr. */ \
519 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \
521 swi r11, r1, (PT_R1-PT_SIZE); /* Save original SP. */ \
522 lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */\
523 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */\
524 /* store return registers separately because \
525 * this macros is use for others exceptions */ \
526 swi r3, r1, PTO + PT_R3; \
527 swi r4, r1, PTO + PT_R4; \
529 /* PC, before IRQ/trap - this is one instruction above */ \
530 swi r17, r1, PTO+PT_PC; \
532 addi r11, r0, 1; /* Was in kernel-mode. */ \
533 swi r11, r1, PTO+PT_MODE; \
535 nop; /* Fill delay slot */ \
536 1: /* User-mode state save. */ \
537 lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */\
538 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\
540 lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ \
541 addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */\
544 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */\
545 /* store return registers separately because this macros \
546 * is use for others exceptions */ \
547 swi r3, r1, PTO + PT_R3; \
548 swi r4, r1, PTO + PT_R4; \
550 /* PC, before IRQ/trap - this is one instruction above FIXME*/ \
551 swi r17, r1, PTO+PT_PC; \
553 swi r0, r1, PTO+PT_MODE; /* Was in user-mode. */ \
554 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \
555 swi r11, r1, PTO+PT_R1; /* Store user SP. */ \
557 swi r11, r0, TOPHYS(PER_CPU(KM)); /* Now we're in kernel-mode.*/\
558 2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); \
559 /* Save away the syscall number. */ \
560 swi r0, r1, PTO+PT_R0; \
563 C_ENTRY(full_exception_trap):
564 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
565 /* adjust exception address for privileged instruction
566 * for finding where is it */
568 SAVE_STATE /* Save registers */
569 /* FIXME this can be store directly in PT_ESR reg.
570 * I tested it but there is a fault */
571 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
572 la r15, r0, ret_from_exc - 8
573 la r5, r1, PTO /* parameter struct pt_regs * regs */
576 mfs r7, rfsr; /* save FSR */
578 mts rfsr, r0; /* Clear sticky fsr */
580 la r12, r0, full_exception
586 * Unaligned data trap.
588 * Unaligned data trap last on 4k page is handled here.
590 * Trap entered via exception, so EE bit is set, and interrupts
591 * are masked. This is nice, means we don't have to CLI before state save
593 * The assembler routine is in "arch/microblaze/kernel/hw_exception_handler.S"
595 C_ENTRY(unaligned_data_trap):
596 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
597 SAVE_STATE /* Save registers.*/
598 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
599 la r15, r0, ret_from_exc-8
600 mfs r3, resr /* ESR */
602 mfs r4, rear /* EAR */
604 la r7, r1, PTO /* parameter struct pt_regs * regs */
605 la r12, r0, _unaligned_data_exception
607 rtbd r12, 0; /* interrupts enabled */
613 * If the real exception handler (from hw_exception_handler.S) didn't find
614 * the mapping for the process, then we're thrown here to handle such situation.
616 * Trap entered via exceptions, so EE bit is set, and interrupts
617 * are masked. This is nice, means we don't have to CLI before state save
619 * Build a standard exception frame for TLB Access errors. All TLB exceptions
620 * will bail out to this point if they can't resolve the lightweight TLB fault.
622 * The C function called is in "arch/microblaze/mm/fault.c", declared as:
623 * void do_page_fault(struct pt_regs *regs,
624 * unsigned long address,
625 * unsigned long error_code)
627 /* data and intruction trap - which is choose is resolved int fault.c */
628 C_ENTRY(page_fault_data_trap):
629 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
630 SAVE_STATE /* Save registers.*/
631 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
632 la r15, r0, ret_from_exc-8
633 la r5, r1, PTO /* parameter struct pt_regs * regs */
634 mfs r6, rear /* parameter unsigned long address */
636 mfs r7, resr /* parameter unsigned long error_code */
638 la r12, r0, do_page_fault
640 rtbd r12, 0; /* interrupts enabled */
643 C_ENTRY(page_fault_instr_trap):
644 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
645 SAVE_STATE /* Save registers.*/
646 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
647 la r15, r0, ret_from_exc-8
648 la r5, r1, PTO /* parameter struct pt_regs * regs */
649 mfs r6, rear /* parameter unsigned long address */
651 ori r7, r0, 0 /* parameter unsigned long error_code */
652 la r12, r0, do_page_fault
654 rtbd r12, 0; /* interrupts enabled */
657 /* Entry point used to return from an exception. */
658 C_ENTRY(ret_from_exc):
659 set_bip; /* Ints masked for state restore*/
660 lwi r11, r1, PTO+PT_MODE;
661 bnei r11, 2f; /* See if returning to kernel mode, */
662 /* ... if so, skip resched &c. */
664 /* We're returning to user mode, so check for various conditions that
665 trigger rescheduling. */
666 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
667 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
668 andi r11, r11, _TIF_NEED_RESCHED;
671 /* Call the scheduler before returning from a syscall/trap. */
672 bralid r15, schedule; /* Call scheduler */
673 nop; /* delay slot */
675 /* Maybe handle a signal */
676 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
677 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
678 andi r11, r11, _TIF_SIGPENDING;
679 beqi r11, 1f; /* Signals to handle, handle them */
682 * Handle a signal return; Pending signals should be in r18.
684 * Not all registers are saved by the normal trap/interrupt entry
685 * points (for instance, call-saved registers (because the normal
686 * C-compiler calling sequence in the kernel makes sure they're
687 * preserved), and call-clobbered registers in the case of
688 * traps), but signal handlers may want to examine or change the
689 * complete register state. Here we save anything not saved by
690 * the normal entry sequence, so that it may be safely restored
691 * (in a possibly modified form) after do_signal returns.
692 * store return registers separately because this macros is use
693 * for others exceptions */
694 la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
695 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
696 addi r7, r0, 0; /* Arg 3: int in_syscall */
697 bralid r15, do_signal; /* Handle any signals */
700 /* Finally, return to user state. */
701 1: swi r0, r0, PER_CPU(KM); /* Now officially in user state. */
702 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
706 lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
707 lwi r4, r1, PTO+PT_R4;
709 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
711 lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */
713 /* Return to kernel state. */
716 lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
717 lwi r4, r1, PTO+PT_R4;
719 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
723 EXC_return: /* Make global symbol for debugging */
724 rtbd r14, 0; /* Instructions to return from an IRQ */
728 * HW EXCEPTION rutine end
732 * Hardware maskable interrupts.
734 * The stack-pointer (r1) should have already been saved to the memory
735 * location PER_CPU(ENTRY_SP).
738 /* MS: we are in physical address */
739 /* Save registers, switch to proper stack, convert SP to virtual.*/
740 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
741 swi r11, r0, TOPHYS(PER_CPU(R11_SAVE));
742 /* MS: See if already in kernel mode. */
743 lwi r11, r0, TOPHYS(PER_CPU(KM));
744 beqi r11, 1f; /* MS: Jump ahead if coming from user */
746 /* Kernel-mode state save. */
748 tophys(r1,r11); /* MS: I have in r1 physical address where stack is */
749 /* MS: Save original SP - position PT_R1 to next stack frame 4 *1 - 152*/
750 swi r11, r1, (PT_R1 - PT_SIZE);
751 /* MS: restore r11 because of saving in SAVE_REGS */
752 lwi r11, r0, TOPHYS(PER_CPU(R11_SAVE));
754 /* MS: Make room on the stack -> activation record */
755 addik r1, r1, -STATE_SAVE_SIZE;
756 /* MS: store return registers separately because
757 * this macros is use for others exceptions */
758 swi r3, r1, PTO + PT_R3;
759 swi r4, r1, PTO + PT_R4;
762 addi r11, r0, 1; /* MS: Was in kernel-mode. */
763 swi r11, r1, PTO + PT_MODE; /* MS: and save it */
765 nop; /* MS: Fill delay slot */
768 /* User-mode state save. */
769 /* MS: restore r11 -> FIXME move before SAVE_REG */
770 lwi r11, r0, TOPHYS(PER_CPU(R11_SAVE));
771 /* MS: get the saved current */
772 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
774 lwi r1, r1, TS_THREAD_INFO;
775 addik r1, r1, THREAD_SIZE;
778 addik r1, r1, -STATE_SAVE_SIZE;
779 swi r3, r1, PTO+PT_R3;
780 swi r4, r1, PTO+PT_R4;
783 swi r0, r1, PTO + PT_MODE;
784 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
785 swi r11, r1, PTO+PT_R1;
786 /* setup kernel mode to KM */
788 swi r11, r0, TOPHYS(PER_CPU(KM));
791 lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
792 swi r0, r1, PTO + PT_R0;
797 la r15, r0, irq_call;
798 irq_call:rtbd r11, 0;
801 /* MS: we are in virtual mode */
803 lwi r11, r1, PTO + PT_MODE;
806 lwi r11, CURRENT_TASK, TS_THREAD_INFO;
807 lwi r11, r11, TI_FLAGS; /* MS: get flags from thread info */
808 andi r11, r11, _TIF_NEED_RESCHED;
810 bralid r15, schedule;
811 nop; /* delay slot */
813 /* Maybe handle a signal */
814 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* MS: get thread info */
815 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
816 andi r11, r11, _TIF_SIGPENDING;
817 beqid r11, no_intr_resched
818 /* Handle a signal return; Pending signals should be in r18. */
819 addi r7, r0, 0; /* Arg 3: int in_syscall */
820 la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
821 bralid r15, do_signal; /* Handle any signals */
822 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
824 /* Finally, return to user state. */
826 /* Disable interrupts, we are now committed to the state restore */
828 swi r0, r0, PER_CPU(KM); /* MS: Now officially in user state. */
829 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE);
832 lwi r3, r1, PTO + PT_R3; /* MS: restore saved r3, r4 registers */
833 lwi r4, r1, PTO + PT_R4;
835 addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */
836 lwi r1, r1, PT_R1 - PT_SIZE;
838 /* MS: Return to kernel state. */
840 #ifdef CONFIG_PREEMPT
841 lwi r11, CURRENT_TASK, TS_THREAD_INFO;
842 /* MS: get preempt_count from thread info */
843 lwi r5, r11, TI_PREEMPT_COUNT;
846 lwi r5, r11, TI_FLAGS; /* get flags in thread info */
847 andi r5, r5, _TIF_NEED_RESCHED;
848 beqi r5, restore /* if zero jump over */
851 /* interrupts are off that's why I am calling preempt_chedule_irq */
852 bralid r15, preempt_schedule_irq
854 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
855 lwi r5, r11, TI_FLAGS; /* get flags in thread info */
856 andi r5, r5, _TIF_NEED_RESCHED;
857 bnei r5, preempt /* if non zero jump to resched */
860 VM_OFF /* MS: turn off MMU */
862 lwi r3, r1, PTO + PT_R3; /* MS: restore saved r3, r4 registers */
863 lwi r4, r1, PTO + PT_R4;
865 addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */
868 IRQ_return: /* MS: Make global symbol for debugging */
874 * We enter dbtrap in "BIP" (breakpoint) mode.
875 * So we exit the breakpoint mode with an 'rtbd' and proceed with the
877 * however, wait to save state first
879 C_ENTRY(_debug_exception):
880 /* BIP bit is set on entry, no interrupts can occur */
881 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
883 swi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* Save r11 */
884 set_bip; /*equalize initial state for all possible entries*/
887 lwi r11, r0, TOPHYS(PER_CPU(KM));/* See if already in kernel mode.*/
888 beqi r11, 1f; /* Jump ahead if coming from user */
889 /* Kernel-mode state save. */
890 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
892 swi r11, r1, (PT_R1-PT_SIZE); /* Save original SP. */
893 lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
895 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
896 swi r3, r1, PTO + PT_R3;
897 swi r4, r1, PTO + PT_R4;
900 addi r11, r0, 1; /* Was in kernel-mode. */
901 swi r11, r1, PTO + PT_MODE;
903 nop; /* Fill delay slot */
904 1: /* User-mode state save. */
905 lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
906 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
908 lwi r1, r1, TS_THREAD_INFO; /* get the thread info */
909 addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */
912 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
913 swi r3, r1, PTO + PT_R3;
914 swi r4, r1, PTO + PT_R4;
917 swi r0, r1, PTO+PT_MODE; /* Was in user-mode. */
918 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
919 swi r11, r1, PTO+PT_R1; /* Store user SP. */
921 swi r11, r0, TOPHYS(PER_CPU(KM)); /* Now we're in kernel-mode. */
922 2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
923 /* Save away the syscall number. */
924 swi r0, r1, PTO+PT_R0;
927 addi r5, r0, SIGTRAP /* send the trap signal */
928 add r6, r0, CURRENT_TASK; /* Get current task ptr into r11 */
929 addk r7, r0, r0 /* 3rd param zero */
932 la r11, r0, send_sig;
933 la r15, r0, dbtrap_call;
934 dbtrap_call: rtbd r11, 0;
937 set_bip; /* Ints masked for state restore*/
938 lwi r11, r1, PTO+PT_MODE;
941 /* Get current task ptr into r11 */
942 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
943 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
944 andi r11, r11, _TIF_NEED_RESCHED;
947 /* Call the scheduler before returning from a syscall/trap. */
949 bralid r15, schedule; /* Call scheduler */
950 nop; /* delay slot */
951 /* XXX Is PT_DTRACE handling needed here? */
952 /* XXX m68knommu also checks TASK_STATE & TASK_COUNTER here. */
954 /* Maybe handle a signal */
955 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
956 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
957 andi r11, r11, _TIF_SIGPENDING;
958 beqi r11, 1f; /* Signals to handle, handle them */
960 /* Handle a signal return; Pending signals should be in r18. */
961 /* Not all registers are saved by the normal trap/interrupt entry
962 points (for instance, call-saved registers (because the normal
963 C-compiler calling sequence in the kernel makes sure they're
964 preserved), and call-clobbered registers in the case of
965 traps), but signal handlers may want to examine or change the
966 complete register state. Here we save anything not saved by
967 the normal entry sequence, so that it may be safely restored
968 (in a possibly modified form) after do_signal returns. */
970 la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
971 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
972 addi r7, r0, 0; /* Arg 3: int in_syscall */
973 bralid r15, do_signal; /* Handle any signals */
977 /* Finally, return to user state. */
978 1: swi r0, r0, PER_CPU(KM); /* Now officially in user state. */
979 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
983 lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
984 lwi r4, r1, PTO+PT_R4;
986 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
989 lwi r1, r1, PT_R1 - PT_SIZE;
990 /* Restore user stack pointer. */
993 /* Return to kernel state. */
996 lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
997 lwi r4, r1, PTO+PT_R4;
999 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
1003 DBTRAP_return: /* Make global symbol for debugging */
1004 rtbd r14, 0; /* Instructions to return from an IRQ */
1010 /* prepare return value */
1011 addk r3, r0, CURRENT_TASK
1013 /* save registers in cpu_context */
1014 /* use r11 and r12, volatile registers, as temp register */
1015 /* give start of cpu_context for previous process */
1016 addik r11, r5, TI_CPU_CONTEXT
1019 /* skip volatile registers.
1020 * they are saved on stack when we jumped to _switch_to() */
1021 /* dedicated registers */
1022 swi r13, r11, CC_R13
1023 swi r14, r11, CC_R14
1024 swi r15, r11, CC_R15
1025 swi r16, r11, CC_R16
1026 swi r17, r11, CC_R17
1027 swi r18, r11, CC_R18
1028 /* save non-volatile registers */
1029 swi r19, r11, CC_R19
1030 swi r20, r11, CC_R20
1031 swi r21, r11, CC_R21
1032 swi r22, r11, CC_R22
1033 swi r23, r11, CC_R23
1034 swi r24, r11, CC_R24
1035 swi r25, r11, CC_R25
1036 swi r26, r11, CC_R26
1037 swi r27, r11, CC_R27
1038 swi r28, r11, CC_R28
1039 swi r29, r11, CC_R29
1040 swi r30, r11, CC_R30
1041 /* special purpose registers */
1044 swi r12, r11, CC_MSR
1047 swi r12, r11, CC_EAR
1050 swi r12, r11, CC_ESR
1053 swi r12, r11, CC_FSR
1055 /* update r31, the current-give me pointer to task which will be next */
1056 lwi CURRENT_TASK, r6, TI_TASK
1057 /* stored it to current_save too */
1058 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE)
1060 /* get new process' cpu context and restore */
1061 /* give me start where start context of next task */
1062 addik r11, r6, TI_CPU_CONTEXT
1064 /* non-volatile registers */
1065 lwi r30, r11, CC_R30
1066 lwi r29, r11, CC_R29
1067 lwi r28, r11, CC_R28
1068 lwi r27, r11, CC_R27
1069 lwi r26, r11, CC_R26
1070 lwi r25, r11, CC_R25
1071 lwi r24, r11, CC_R24
1072 lwi r23, r11, CC_R23
1073 lwi r22, r11, CC_R22
1074 lwi r21, r11, CC_R21
1075 lwi r20, r11, CC_R20
1076 lwi r19, r11, CC_R19
1077 /* dedicated registers */
1078 lwi r18, r11, CC_R18
1079 lwi r17, r11, CC_R17
1080 lwi r16, r11, CC_R16
1081 lwi r15, r11, CC_R15
1082 lwi r14, r11, CC_R14
1083 lwi r13, r11, CC_R13
1084 /* skip volatile registers */
1088 /* special purpose registers */
1089 lwi r12, r11, CC_FSR
1092 lwi r12, r11, CC_MSR
1100 brai 0x70; /* Jump back to FS-boot */
1105 swi r5, r0, 0x250 + TOPHYS(r0_ram)
1108 swi r5, r0, 0x254 + TOPHYS(r0_ram)
1111 /* These are compiled and loaded into high memory, then
1112 * copied into place in mach_early_setup */
1113 .section .init.ivt, "ax"
1115 /* this is very important - here is the reset vector */
1116 /* in current MMU branch you don't care what is here - it is
1117 * used from bootloader site - but this is correct for FS-BOOT */
1120 brai TOPHYS(_user_exception); /* syscall handler */
1121 brai TOPHYS(_interrupt); /* Interrupt handler */
1122 brai TOPHYS(_break); /* nmi trap handler */
1123 brai TOPHYS(_hw_exception_handler); /* HW exception handler */
1126 brai TOPHYS(_debug_exception); /* debug trap handler*/
1128 .section .rodata,"a"
1129 #include "syscall_table.S"
1131 syscall_table_size=(.-sys_call_table)