arch/blackfin/mach-common/smp.c

   1 /*
   2  * File:         arch/blackfin/kernel/smp.c
   3  * Author:       Philippe Gerum <rpm@xenomai.org>
   4  * IPI management based on arch/arm/kernel/smp.c.
   5  *
   6  *               Copyright 2007 Analog Devices Inc.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, see the file COPYING, or write
  20  * to the Free Software Foundation, Inc.,
  21  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  22  */
  23
  24 #include <linux/module.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/spinlock.h>
  28 #include <linux/sched.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/cache.h>
  31 #include <linux/profile.h>
  32 #include <linux/errno.h>
  33 #include <linux/mm.h>
  34 #include <linux/cpu.h>
  35 #include <linux/smp.h>
  36 #include <linux/seq_file.h>
  37 #include <linux/irq.h>
  38 #include <asm/atomic.h>
  39 #include <asm/cacheflush.h>
  40 #include <asm/mmu_context.h>
  41 #include <asm/pgtable.h>
  42 #include <asm/pgalloc.h>
  43 #include <asm/processor.h>
  44 #include <asm/ptrace.h>
  45 #include <asm/cpu.h>
  46 #include <asm/time.h>
  47 #include <linux/err.h>
  48
  49 /*
  50  * Anomaly notes:
  51  * 05000120 - we always define corelock as 32-bit integer in L2
  52  */
  53 struct corelock_slot corelock __attribute__ ((__section__(".l2.bss")));
  54
  55 void __cpuinitdata *init_retx_coreb, *init_saved_retx_coreb,
  56         *init_saved_seqstat_coreb, *init_saved_icplb_fault_addr_coreb,
  57         *init_saved_dcplb_fault_addr_coreb;
  58
  59 cpumask_t cpu_possible_map;
  60 EXPORT_SYMBOL(cpu_possible_map);
  61
  62 cpumask_t cpu_online_map;
  63 EXPORT_SYMBOL(cpu_online_map);
  64
  65 #define BFIN_IPI_RESCHEDULE   0
  66 #define BFIN_IPI_CALL_FUNC    1
  67 #define BFIN_IPI_CPU_STOP     2
  68
  69 struct blackfin_flush_data {
  70         unsigned long start;
  71         unsigned long end;
  72 };
  73
  74 void *secondary_stack;
  75
  76
  77 struct smp_call_struct {
  78         void (*func)(void *info);
  79         void *info;
  80         int wait;
  81         cpumask_t pending;
  82         cpumask_t waitmask;
  83 };
  84
  85 static struct blackfin_flush_data smp_flush_data;
  86
  87 static DEFINE_SPINLOCK(stop_lock);
  88
  89 struct ipi_message {
  90         struct list_head list;
  91         unsigned long type;
  92         struct smp_call_struct call_struct;
  93 };
  94
  95 struct ipi_message_queue {
  96         struct list_head head;
  97         spinlock_t lock;
  98         unsigned long count;
  99 };
 100
 101 static DEFINE_PER_CPU(struct ipi_message_queue, ipi_msg_queue);
 102
 103 static void ipi_cpu_stop(unsigned int cpu)
 104 {
 105         spin_lock(&stop_lock);
 106         printk(KERN_CRIT "CPU%u: stopping\n", cpu);
 107         dump_stack();
 108         spin_unlock(&stop_lock);
 109
 110         cpu_clear(cpu, cpu_online_map);
 111
 112         local_irq_disable();
 113
 114         while (1)
 115                 SSYNC();
 116 }
 117
 118 static void ipi_flush_icache(void *info)
 119 {
 120         struct blackfin_flush_data *fdata = info;
 121
 122         /* Invalidate the memory holding the bounds of the flushed region. */
 123         blackfin_dcache_invalidate_range((unsigned long)fdata,
 124                                          (unsigned long)fdata + sizeof(*fdata));
 125
 126         blackfin_icache_flush_range(fdata->start, fdata->end);
 127 }
 128
 129 static void ipi_call_function(unsigned int cpu, struct ipi_message *msg)
 130 {
 131         int wait;
 132         void (*func)(void *info);
 133         void *info;
 134         func = msg->call_struct.func;
 135         info = msg->call_struct.info;
 136         wait = msg->call_struct.wait;
 137         cpu_clear(cpu, msg->call_struct.pending);
 138         func(info);
 139         if (wait)
 140                 cpu_clear(cpu, msg->call_struct.waitmask);
 141         else
 142                 kfree(msg);
 143 }
 144
 145 static irqreturn_t ipi_handler(int irq, void *dev_instance)
 146 {
 147         struct ipi_message *msg, *mg;
 148         struct ipi_message_queue *msg_queue;
 149         unsigned int cpu = smp_processor_id();
 150
 151         platform_clear_ipi(cpu);
 152
 153         msg_queue = &__get_cpu_var(ipi_msg_queue);
 154         msg_queue->count++;
 155
 156         spin_lock(&msg_queue->lock);
 157         list_for_each_entry_safe(msg, mg, &msg_queue->head, list) {
 158                 list_del(&msg->list);
 159                 switch (msg->type) {
 160                 case BFIN_IPI_RESCHEDULE:
 161                         /* That's the easiest one; leave it to
 162                          * return_from_int. */
 163                         kfree(msg);
 164                         break;
 165                 case BFIN_IPI_CALL_FUNC:
 166                         spin_unlock(&msg_queue->lock);
 167                         ipi_call_function(cpu, msg);
 168                         spin_lock(&msg_queue->lock);
 169                         break;
 170                 case BFIN_IPI_CPU_STOP:
 171                         spin_unlock(&msg_queue->lock);
 172                         ipi_cpu_stop(cpu);
 173                         spin_lock(&msg_queue->lock);
 174                         kfree(msg);
 175                         break;
 176                 default:
 177                         printk(KERN_CRIT "CPU%u: Unknown IPI message \
 178                         0x%lx\n", cpu, msg->type);
 179                         kfree(msg);
 180                         break;
 181                 }
 182         }
 183         spin_unlock(&msg_queue->lock);
 184         return IRQ_HANDLED;
 185 }
 186
 187 static void ipi_queue_init(void)
 188 {
 189         unsigned int cpu;
 190         struct ipi_message_queue *msg_queue;
 191         for_each_possible_cpu(cpu) {
 192                 msg_queue = &per_cpu(ipi_msg_queue, cpu);
 193                 INIT_LIST_HEAD(&msg_queue->head);
 194                 spin_lock_init(&msg_queue->lock);
 195                 msg_queue->count = 0;
 196         }
 197 }
 198
 199 int smp_call_function(void (*func)(void *info), void *info, int wait)
 200 {
 201         unsigned int cpu;
 202         cpumask_t callmap;
 203         unsigned long flags;
 204         struct ipi_message_queue *msg_queue;
 205         struct ipi_message *msg;
 206
 207         callmap = cpu_online_map;
 208         cpu_clear(smp_processor_id(), callmap);
 209         if (cpus_empty(callmap))
 210                 return 0;
 211
 212         msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
 213         INIT_LIST_HEAD(&msg->list);
 214         msg->call_struct.func = func;
 215         msg->call_struct.info = info;
 216         msg->call_struct.wait = wait;
 217         msg->call_struct.pending = callmap;
 218         msg->call_struct.waitmask = callmap;
 219         msg->type = BFIN_IPI_CALL_FUNC;
 220
 221         for_each_cpu_mask(cpu, callmap) {
 222                 msg_queue = &per_cpu(ipi_msg_queue, cpu);
 223                 spin_lock_irqsave(&msg_queue->lock, flags);
 224                 list_add(&msg->list, &msg_queue->head);
 225                 spin_unlock_irqrestore(&msg_queue->lock, flags);
 226                 platform_send_ipi_cpu(cpu);
 227         }
 228         if (wait) {
 229                 while (!cpus_empty(msg->call_struct.waitmask))
 230                         blackfin_dcache_invalidate_range(
 231                                 (unsigned long)(&msg->call_struct.waitmask),
 232                                 (unsigned long)(&msg->call_struct.waitmask));
 233                 kfree(msg);
 234         }
 235         return 0;
 236 }
 237 EXPORT_SYMBOL_GPL(smp_call_function);
 238
 239 int smp_call_function_single(int cpuid, void (*func) (void *info), void *info,
 240                                 int wait)
 241 {
 242         unsigned int cpu = cpuid;
 243         cpumask_t callmap;
 244         unsigned long flags;
 245         struct ipi_message_queue *msg_queue;
 246         struct ipi_message *msg;
 247
 248         if (cpu_is_offline(cpu))
 249                 return 0;
 250         cpus_clear(callmap);
 251         cpu_set(cpu, callmap);
 252
 253         msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
 254         INIT_LIST_HEAD(&msg->list);
 255         msg->call_struct.func = func;
 256         msg->call_struct.info = info;
 257         msg->call_struct.wait = wait;
 258         msg->call_struct.pending = callmap;
 259         msg->call_struct.waitmask = callmap;
 260         msg->type = BFIN_IPI_CALL_FUNC;
 261
 262         msg_queue = &per_cpu(ipi_msg_queue, cpu);
 263         spin_lock_irqsave(&msg_queue->lock, flags);
 264         list_add(&msg->list, &msg_queue->head);
 265         spin_unlock_irqrestore(&msg_queue->lock, flags);
 266         platform_send_ipi_cpu(cpu);
 267
 268         if (wait) {
 269                 while (!cpus_empty(msg->call_struct.waitmask))
 270                         blackfin_dcache_invalidate_range(
 271                                 (unsigned long)(&msg->call_struct.waitmask),
 272                                 (unsigned long)(&msg->call_struct.waitmask));
 273                 kfree(msg);
 274         }
 275         return 0;
 276 }
 277 EXPORT_SYMBOL_GPL(smp_call_function_single);
 278
 279 void smp_send_reschedule(int cpu)
 280 {
 281         unsigned long flags;
 282         struct ipi_message_queue *msg_queue;
 283         struct ipi_message *msg;
 284
 285         if (cpu_is_offline(cpu))
 286                 return;
 287
 288         msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
 289         memset(msg, 0, sizeof(msg));
 290         INIT_LIST_HEAD(&msg->list);
 291         msg->type = BFIN_IPI_RESCHEDULE;
 292
 293         msg_queue = &per_cpu(ipi_msg_queue, cpu);
 294         spin_lock_irqsave(&msg_queue->lock, flags);
 295         list_add(&msg->list, &msg_queue->head);
 296         spin_unlock_irqrestore(&msg_queue->lock, flags);
 297         platform_send_ipi_cpu(cpu);
 298
 299         return;
 300 }
 301
 302 void smp_send_stop(void)
 303 {
 304         unsigned int cpu;
 305         cpumask_t callmap;
 306         unsigned long flags;
 307         struct ipi_message_queue *msg_queue;
 308         struct ipi_message *msg;
 309
 310         callmap = cpu_online_map;
 311         cpu_clear(smp_processor_id(), callmap);
 312         if (cpus_empty(callmap))
 313                 return;
 314
 315         msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
 316         memset(msg, 0, sizeof(msg));
 317         INIT_LIST_HEAD(&msg->list);
 318         msg->type = BFIN_IPI_CPU_STOP;
 319
 320         for_each_cpu_mask(cpu, callmap) {
 321                 msg_queue = &per_cpu(ipi_msg_queue, cpu);
 322                 spin_lock_irqsave(&msg_queue->lock, flags);
 323                 list_add(&msg->list, &msg_queue->head);
 324                 spin_unlock_irqrestore(&msg_queue->lock, flags);
 325                 platform_send_ipi_cpu(cpu);
 326         }
 327         return;
 328 }
 329
 330 int __cpuinit __cpu_up(unsigned int cpu)
 331 {
 332         struct task_struct *idle;
 333         int ret;
 334
 335         idle = fork_idle(cpu);
 336         if (IS_ERR(idle)) {
 337                 printk(KERN_ERR "CPU%u: fork() failed\n", cpu);
 338                 return PTR_ERR(idle);
 339         }
 340
 341         secondary_stack = task_stack_page(idle) + THREAD_SIZE;
 342         smp_wmb();
 343
 344         ret = platform_boot_secondary(cpu, idle);
 345
 346         if (ret) {
 347                 cpu_clear(cpu, cpu_present_map);
 348                 printk(KERN_CRIT "CPU%u: processor failed to boot (%d)\n", cpu, ret);
 349                 free_task(idle);
 350         } else
 351                 cpu_set(cpu, cpu_online_map);
 352
 353         secondary_stack = NULL;
 354
 355         return ret;
 356 }
 357
 358 static void __cpuinit setup_secondary(unsigned int cpu)
 359 {
 360 #if !defined(CONFIG_TICKSOURCE_GPTMR0)
 361         struct irq_desc *timer_desc;
 362 #endif
 363         unsigned long ilat;
 364
 365         bfin_write_IMASK(0);
 366         CSYNC();
 367         ilat = bfin_read_ILAT();
 368         CSYNC();
 369         bfin_write_ILAT(ilat);
 370         CSYNC();
 371
 372         /* Enable interrupt levels IVG7-15. IARs have been already
 373          * programmed by the boot CPU.  */
 374         bfin_irq_flags |= IMASK_IVG15 |
 375             IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
 376             IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
 377
 378 #if defined(CONFIG_TICKSOURCE_GPTMR0)
 379         /* Power down the core timer, just to play safe. */
 380         bfin_write_TCNTL(0);
 381
 382         /* system timer0 has been setup by CoreA. */
 383 #else
 384         timer_desc = irq_desc + IRQ_CORETMR;
 385         setup_core_timer();
 386         timer_desc->chip->enable(IRQ_CORETMR);
 387 #endif
 388 }
 389
 390 void __cpuinit secondary_start_kernel(void)
 391 {
 392         unsigned int cpu = smp_processor_id();
 393         struct mm_struct *mm = &init_mm;
 394
 395         if (_bfin_swrst & SWRST_DBL_FAULT_B) {
 396                 printk(KERN_EMERG "CoreB Recovering from DOUBLE FAULT event\n");
 397 #ifdef CONFIG_DEBUG_DOUBLEFAULT
 398                 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
 399                         (int)init_saved_seqstat_coreb & SEQSTAT_EXCAUSE, init_saved_retx_coreb);
 400                 printk(KERN_NOTICE "   DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr_coreb);
 401                 printk(KERN_NOTICE "   ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr_coreb);
 402 #endif
 403                 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
 404                         init_retx_coreb);
 405         }
 406
 407         /*
 408          * We want the D-cache to be enabled early, in case the atomic
 409          * support code emulates cache coherence (see
 410          * __ARCH_SYNC_CORE_DCACHE).
 411          */
 412         init_exception_vectors();
 413
 414         bfin_setup_caches(cpu);
 415
 416         local_irq_disable();
 417
 418         /* Attach the new idle task to the global mm. */
 419         atomic_inc(&mm->mm_users);
 420         atomic_inc(&mm->mm_count);
 421         current->active_mm = mm;
 422         BUG_ON(current->mm);    /* Can't be, but better be safe than sorry. */
 423
 424         preempt_disable();
 425
 426         setup_secondary(cpu);
 427
 428         local_irq_enable();
 429
 430         platform_secondary_init(cpu);
 431
 432         cpu_idle();
 433 }
 434
 435 void __init smp_prepare_boot_cpu(void)
 436 {
 437 }
 438
 439 void __init smp_prepare_cpus(unsigned int max_cpus)
 440 {
 441         platform_prepare_cpus(max_cpus);
 442         ipi_queue_init();
 443         platform_request_ipi(&ipi_handler);
 444 }
 445
 446 void __init smp_cpus_done(unsigned int max_cpus)
 447 {
 448         unsigned long bogosum = 0;
 449         unsigned int cpu;
 450
 451         for_each_online_cpu(cpu)
 452                 bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
 453
 454         printk(KERN_INFO "SMP: Total of %d processors activated "
 455                "(%lu.%02lu BogoMIPS).\n",
 456                num_online_cpus(),
 457                bogosum / (500000/HZ),
 458                (bogosum / (5000/HZ)) % 100);
 459 }
 460
 461 void smp_icache_flush_range_others(unsigned long start, unsigned long end)
 462 {
 463         smp_flush_data.start = start;
 464         smp_flush_data.end = end;
 465
 466         if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 0))
 467                 printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n");
 468 }
 469 EXPORT_SYMBOL_GPL(smp_icache_flush_range_others);
 470
 471 #ifdef __ARCH_SYNC_CORE_ICACHE
 472 void resync_core_icache(void)
 473 {
 474         unsigned int cpu = get_cpu();
 475         blackfin_invalidate_entire_icache();
 476         ++per_cpu(cpu_data, cpu).icache_invld_count;
 477         put_cpu();
 478 }
 479 EXPORT_SYMBOL(resync_core_icache);
 480 #endif
 481
 482 #ifdef __ARCH_SYNC_CORE_DCACHE
 483 unsigned long barrier_mask __attribute__ ((__section__(".l2.bss")));
 484
 485 void resync_core_dcache(void)
 486 {
 487         unsigned int cpu = get_cpu();
 488         blackfin_invalidate_entire_dcache();
 489         ++per_cpu(cpu_data, cpu).dcache_invld_count;
 490         put_cpu();
 491 }
 492 EXPORT_SYMBOL(resync_core_dcache);
 493 #endif