arch/blackfin/kernel/setup.c

   1 /*
   2  * arch/blackfin/kernel/setup.c
   3  *
   4  * Copyright 2004-2006 Analog Devices Inc.
   5  *
   6  * Enter bugs at http://blackfin.uclinux.org/
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #include <linux/delay.h>
  12 #include <linux/console.h>
  13 #include <linux/bootmem.h>
  14 #include <linux/seq_file.h>
  15 #include <linux/cpu.h>
  16 #include <linux/mm.h>
  17 #include <linux/module.h>
  18 #include <linux/tty.h>
  19 #include <linux/pfn.h>
  20
  21 #ifdef CONFIG_MTD_UCLINUX
  22 #include <linux/mtd/map.h>
  23 #include <linux/ext2_fs.h>
  24 #include <linux/cramfs_fs.h>
  25 #include <linux/romfs_fs.h>
  26 #endif
  27
  28 #include <asm/cplb.h>
  29 #include <asm/cacheflush.h>
  30 #include <asm/blackfin.h>
  31 #include <asm/cplbinit.h>
  32 #include <asm/div64.h>
  33 #include <asm/cpu.h>
  34 #include <asm/fixed_code.h>
  35 #include <asm/early_printk.h>
  36
  37 u16 _bfin_swrst;
  38 EXPORT_SYMBOL(_bfin_swrst);
  39
  40 unsigned long memory_start, memory_end, physical_mem_end;
  41 unsigned long _rambase, _ramstart, _ramend;
  42 unsigned long reserved_mem_dcache_on;
  43 unsigned long reserved_mem_icache_on;
  44 EXPORT_SYMBOL(memory_start);
  45 EXPORT_SYMBOL(memory_end);
  46 EXPORT_SYMBOL(physical_mem_end);
  47 EXPORT_SYMBOL(_ramend);
  48 EXPORT_SYMBOL(reserved_mem_dcache_on);
  49
  50 #ifdef CONFIG_MTD_UCLINUX
  51 extern struct map_info uclinux_ram_map;
  52 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
  53 unsigned long _ebss;
  54 EXPORT_SYMBOL(memory_mtd_end);
  55 EXPORT_SYMBOL(memory_mtd_start);
  56 EXPORT_SYMBOL(mtd_size);
  57 #endif
  58
  59 char __initdata command_line[COMMAND_LINE_SIZE];
  60 void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
  61         *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
  62
  63 /* boot memmap, for parsing "memmap=" */
  64 #define BFIN_MEMMAP_MAX         128 /* number of entries in bfin_memmap */
  65 #define BFIN_MEMMAP_RAM         1
  66 #define BFIN_MEMMAP_RESERVED    2
  67 static struct bfin_memmap {
  68         int nr_map;
  69         struct bfin_memmap_entry {
  70                 unsigned long long addr; /* start of memory segment */
  71                 unsigned long long size;
  72                 unsigned long type;
  73         } map[BFIN_MEMMAP_MAX];
  74 } bfin_memmap __initdata;
  75
  76 /* for memmap sanitization */
  77 struct change_member {
  78         struct bfin_memmap_entry *pentry; /* pointer to original entry */
  79         unsigned long long addr; /* address for this change point */
  80 };
  81 static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
  82 static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
  83 static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
  84 static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
  85
  86 DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
  87
  88 static int early_init_clkin_hz(char *buf);
  89
  90 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  91 void __init generate_cplb_tables(void)
  92 {
  93         unsigned int cpu;
  94
  95         generate_cplb_tables_all();
  96         /* Generate per-CPU I&D CPLB tables */
  97         for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
  98                 generate_cplb_tables_cpu(cpu);
  99 }
 100 #endif
 101
 102 void __cpuinit bfin_setup_caches(unsigned int cpu)
 103 {
 104 #ifdef CONFIG_BFIN_ICACHE
 105         bfin_icache_init(icplb_tbl[cpu]);
 106 #endif
 107
 108 #ifdef CONFIG_BFIN_DCACHE
 109         bfin_dcache_init(dcplb_tbl[cpu]);
 110 #endif
 111
 112         /*
 113          * In cache coherence emulation mode, we need to have the
 114          * D-cache enabled before running any atomic operation which
 115          * might invove cache invalidation (i.e. spinlock, rwlock).
 116          * So printk's are deferred until then.
 117          */
 118 #ifdef CONFIG_BFIN_ICACHE
 119         printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu);
 120 #endif
 121 #ifdef CONFIG_BFIN_DCACHE
 122         printk(KERN_INFO "Data Cache Enabled for CPU%u"
 123 # if defined CONFIG_BFIN_WB
 124                 " (write-back)"
 125 # elif defined CONFIG_BFIN_WT
 126                 " (write-through)"
 127 # endif
 128                 "\n", cpu);
 129 #endif
 130 }
 131
 132 void __cpuinit bfin_setup_cpudata(unsigned int cpu)
 133 {
 134         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
 135
 136         cpudata->idle = current;
 137         cpudata->loops_per_jiffy = loops_per_jiffy;
 138         cpudata->imemctl = bfin_read_IMEM_CONTROL();
 139         cpudata->dmemctl = bfin_read_DMEM_CONTROL();
 140 }
 141
 142 void __init bfin_cache_init(void)
 143 {
 144 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
 145         generate_cplb_tables();
 146 #endif
 147         bfin_setup_caches(0);
 148 }
 149
 150 void __init bfin_relocate_l1_mem(void)
 151 {
 152         unsigned long l1_code_length;
 153         unsigned long l1_data_a_length;
 154         unsigned long l1_data_b_length;
 155         unsigned long l2_length;
 156
 157         /*
 158          * due to the ALIGN(4) in the arch/blackfin/kernel/vmlinux.lds.S
 159          * we know that everything about l1 text/data is nice and aligned,
 160          * so copy by 4 byte chunks, and don't worry about overlapping
 161          * src/dest.
 162          *
 163          * We can't use the dma_memcpy functions, since they can call
 164          * scheduler functions which might be in L1 :( and core writes
 165          * into L1 instruction cause bad access errors, so we are stuck,
 166          * we are required to use DMA, but can't use the common dma
 167          * functions. We can't use memcpy either - since that might be
 168          * going to be in the relocated L1
 169          */
 170
 171         blackfin_dma_early_init();
 172
 173         /* if necessary, copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
 174         l1_code_length = _etext_l1 - _stext_l1;
 175         if (l1_code_length)
 176                 early_dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
 177
 178         /* if necessary, copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
 179         l1_data_a_length = _sbss_l1 - _sdata_l1;
 180         if (l1_data_a_length)
 181                 early_dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
 182
 183         /* if necessary, copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
 184         l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
 185         if (l1_data_b_length)
 186                 early_dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
 187                         l1_data_a_length, l1_data_b_length);
 188
 189         early_dma_memcpy_done();
 190
 191         /* if necessary, copy _stext_l2 to _edata_l2 to L2 SRAM */
 192         if (L2_LENGTH != 0) {
 193                 l2_length = _sbss_l2 - _stext_l2;
 194                 if (l2_length)
 195                         memcpy(_stext_l2, _l2_lma_start, l2_length);
 196         }
 197 }
 198
 199 /* add_memory_region to memmap */
 200 static void __init add_memory_region(unsigned long long start,
 201                               unsigned long long size, int type)
 202 {
 203         int i;
 204
 205         i = bfin_memmap.nr_map;
 206
 207         if (i == BFIN_MEMMAP_MAX) {
 208                 printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
 209                 return;
 210         }
 211
 212         bfin_memmap.map[i].addr = start;
 213         bfin_memmap.map[i].size = size;
 214         bfin_memmap.map[i].type = type;
 215         bfin_memmap.nr_map++;
 216 }
 217
 218 /*
 219  * Sanitize the boot memmap, removing overlaps.
 220  */
 221 static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
 222 {
 223         struct change_member *change_tmp;
 224         unsigned long current_type, last_type;
 225         unsigned long long last_addr;
 226         int chgidx, still_changing;
 227         int overlap_entries;
 228         int new_entry;
 229         int old_nr, new_nr, chg_nr;
 230         int i;
 231
 232         /*
 233                 Visually we're performing the following (1,2,3,4 = memory types)
 234
 235                 Sample memory map (w/overlaps):
 236                    ____22__________________
 237                    ______________________4_
 238                    ____1111________________
 239                    _44_____________________
 240                    11111111________________
 241                    ____________________33__
 242                    ___________44___________
 243                    __________33333_________
 244                    ______________22________
 245                    ___________________2222_
 246                    _________111111111______
 247                    _____________________11_
 248                    _________________4______
 249
 250                 Sanitized equivalent (no overlap):
 251                    1_______________________
 252                    _44_____________________
 253                    ___1____________________
 254                    ____22__________________
 255                    ______11________________
 256                    _________1______________
 257                    __________3_____________
 258                    ___________44___________
 259                    _____________33_________
 260                    _______________2________
 261                    ________________1_______
 262                    _________________4______
 263                    ___________________2____
 264                    ____________________33__
 265                    ______________________4_
 266         */
 267         /* if there's only one memory region, don't bother */
 268         if (*pnr_map < 2)
 269                 return -1;
 270
 271         old_nr = *pnr_map;
 272
 273         /* bail out if we find any unreasonable addresses in memmap */
 274         for (i = 0; i < old_nr; i++)
 275                 if (map[i].addr + map[i].size < map[i].addr)
 276                         return -1;
 277
 278         /* create pointers for initial change-point information (for sorting) */
 279         for (i = 0; i < 2*old_nr; i++)
 280                 change_point[i] = &change_point_list[i];
 281
 282         /* record all known change-points (starting and ending addresses),
 283            omitting those that are for empty memory regions */
 284         chgidx = 0;
 285         for (i = 0; i < old_nr; i++) {
 286                 if (map[i].size != 0) {
 287                         change_point[chgidx]->addr = map[i].addr;
 288                         change_point[chgidx++]->pentry = &map[i];
 289                         change_point[chgidx]->addr = map[i].addr + map[i].size;
 290                         change_point[chgidx++]->pentry = &map[i];
 291                 }
 292         }
 293         chg_nr = chgidx;        /* true number of change-points */
 294
 295         /* sort change-point list by memory addresses (low -> high) */
 296         still_changing = 1;
 297         while (still_changing) {
 298                 still_changing = 0;
 299                 for (i = 1; i < chg_nr; i++) {
 300                         /* if <current_addr> > <last_addr>, swap */
 301                         /* or, if current=<start_addr> & last=<end_addr>, swap */
 302                         if ((change_point[i]->addr < change_point[i-1]->addr) ||
 303                                 ((change_point[i]->addr == change_point[i-1]->addr) &&
 304                                  (change_point[i]->addr == change_point[i]->pentry->addr) &&
 305                                  (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
 306                            ) {
 307                                 change_tmp = change_point[i];
 308                                 change_point[i] = change_point[i-1];
 309                                 change_point[i-1] = change_tmp;
 310                                 still_changing = 1;
 311                         }
 312                 }
 313         }
 314
 315         /* create a new memmap, removing overlaps */
 316         overlap_entries = 0;    /* number of entries in the overlap table */
 317         new_entry = 0;          /* index for creating new memmap entries */
 318         last_type = 0;          /* start with undefined memory type */
 319         last_addr = 0;          /* start with 0 as last starting address */
 320         /* loop through change-points, determining affect on the new memmap */
 321         for (chgidx = 0; chgidx < chg_nr; chgidx++) {
 322                 /* keep track of all overlapping memmap entries */
 323                 if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
 324                         /* add map entry to overlap list (> 1 entry implies an overlap) */
 325                         overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
 326                 } else {
 327                         /* remove entry from list (order independent, so swap with last) */
 328                         for (i = 0; i < overlap_entries; i++) {
 329                                 if (overlap_list[i] == change_point[chgidx]->pentry)
 330                                         overlap_list[i] = overlap_list[overlap_entries-1];
 331                         }
 332                         overlap_entries--;
 333                 }
 334                 /* if there are overlapping entries, decide which "type" to use */
 335                 /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
 336                 current_type = 0;
 337                 for (i = 0; i < overlap_entries; i++)
 338                         if (overlap_list[i]->type > current_type)
 339                                 current_type = overlap_list[i]->type;
 340                 /* continue building up new memmap based on this information */
 341                 if (current_type != last_type) {
 342                         if (last_type != 0) {
 343                                 new_map[new_entry].size =
 344                                         change_point[chgidx]->addr - last_addr;
 345                                 /* move forward only if the new size was non-zero */
 346                                 if (new_map[new_entry].size != 0)
 347                                         if (++new_entry >= BFIN_MEMMAP_MAX)
 348                                                 break;  /* no more space left for new entries */
 349                         }
 350                         if (current_type != 0) {
 351                                 new_map[new_entry].addr = change_point[chgidx]->addr;
 352                                 new_map[new_entry].type = current_type;
 353                                 last_addr = change_point[chgidx]->addr;
 354                         }
 355                         last_type = current_type;
 356                 }
 357         }
 358         new_nr = new_entry;     /* retain count for new entries */
 359
 360         /* copy new mapping into original location */
 361         memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
 362         *pnr_map = new_nr;
 363
 364         return 0;
 365 }
 366
 367 static void __init print_memory_map(char *who)
 368 {
 369         int i;
 370
 371         for (i = 0; i < bfin_memmap.nr_map; i++) {
 372                 printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
 373                         bfin_memmap.map[i].addr,
 374                         bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
 375                 switch (bfin_memmap.map[i].type) {
 376                 case BFIN_MEMMAP_RAM:
 377                                 printk("(usable)\n");
 378                                 break;
 379                 case BFIN_MEMMAP_RESERVED:
 380                                 printk("(reserved)\n");
 381                                 break;
 382                 default:        printk("type %lu\n", bfin_memmap.map[i].type);
 383                                 break;
 384                 }
 385         }
 386 }
 387
 388 static __init int parse_memmap(char *arg)
 389 {
 390         unsigned long long start_at, mem_size;
 391
 392         if (!arg)
 393                 return -EINVAL;
 394
 395         mem_size = memparse(arg, &arg);
 396         if (*arg == '@') {
 397                 start_at = memparse(arg+1, &arg);
 398                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
 399         } else if (*arg == '$') {
 400                 start_at = memparse(arg+1, &arg);
 401                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
 402         }
 403
 404         return 0;
 405 }
 406
 407 /*
 408  * Initial parsing of the command line.  Currently, we support:
 409  *  - Controlling the linux memory size: mem=xxx[KMG]
 410  *  - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
 411  *       $ -> reserved memory is dcacheable
 412  *       # -> reserved memory is icacheable
 413  *  - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
 414  *       @ from <start> to <start>+<mem>, type RAM
 415  *       $ from <start> to <start>+<mem>, type RESERVED
 416  */
 417 static __init void parse_cmdline_early(char *cmdline_p)
 418 {
 419         char c = ' ', *to = cmdline_p;
 420         unsigned int memsize;
 421         for (;;) {
 422                 if (c == ' ') {
 423                         if (!memcmp(to, "mem=", 4)) {
 424                                 to += 4;
 425                                 memsize = memparse(to, &to);
 426                                 if (memsize)
 427                                         _ramend = memsize;
 428
 429                         } else if (!memcmp(to, "max_mem=", 8)) {
 430                                 to += 8;
 431                                 memsize = memparse(to, &to);
 432                                 if (memsize) {
 433                                         physical_mem_end = memsize;
 434                                         if (*to != ' ') {
 435                                                 if (*to == '$'
 436                                                     || *(to + 1) == '$')
 437                                                         reserved_mem_dcache_on = 1;
 438                                                 if (*to == '#'
 439                                                     || *(to + 1) == '#')
 440                                                         reserved_mem_icache_on = 1;
 441                                         }
 442                                 }
 443                         } else if (!memcmp(to, "clkin_hz=", 9)) {
 444                                 to += 9;
 445                                 early_init_clkin_hz(to);
 446                         } else if (!memcmp(to, "earlyprintk=", 12)) {
 447                                 to += 12;
 448                                 setup_early_printk(to);
 449                         } else if (!memcmp(to, "memmap=", 7)) {
 450                                 to += 7;
 451                                 parse_memmap(to);
 452                         }
 453                 }
 454                 c = *(to++);
 455                 if (!c)
 456                         break;
 457         }
 458 }
 459
 460 /*
 461  * Setup memory defaults from user config.
 462  * The physical memory layout looks like:
 463  *
 464  *  [_rambase, _ramstart]:              kernel image
 465  *  [memory_start, memory_end]:         dynamic memory managed by kernel
 466  *  [memory_end, _ramend]:              reserved memory
 467  *      [memory_mtd_start(memory_end),
 468  *              memory_mtd_start + mtd_size]:   rootfs (if any)
 469  *      [_ramend - DMA_UNCACHED_REGION,
 470  *              _ramend]:                       uncached DMA region
 471  *  [_ramend, physical_mem_end]:        memory not managed by kernel
 472  */
 473 static __init void memory_setup(void)
 474 {
 475 #ifdef CONFIG_MTD_UCLINUX
 476         unsigned long mtd_phys = 0;
 477 #endif
 478
 479         _rambase = (unsigned long)_stext;
 480         _ramstart = (unsigned long)_end;
 481
 482         if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
 483                 console_init();
 484                 panic("DMA region exceeds memory limit: %lu.",
 485                         _ramend - _ramstart);
 486         }
 487         memory_end = _ramend - DMA_UNCACHED_REGION;
 488
 489 #ifdef CONFIG_MPU
 490         /* Round up to multiple of 4MB */
 491         memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
 492 #else
 493         memory_start = PAGE_ALIGN(_ramstart);
 494 #endif
 495
 496 #if defined(CONFIG_MTD_UCLINUX)
 497         /* generic memory mapped MTD driver */
 498         memory_mtd_end = memory_end;
 499
 500         mtd_phys = _ramstart;
 501         mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
 502
 503 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
 504         if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
 505                 mtd_size =
 506                     PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
 507 # endif
 508
 509 # if defined(CONFIG_CRAMFS)
 510         if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
 511                 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
 512 # endif
 513
 514 # if defined(CONFIG_ROMFS_FS)
 515         if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
 516             && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
 517                 mtd_size =
 518                     PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
 519 #  if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
 520         /* Due to a Hardware Anomaly we need to limit the size of usable
 521          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
 522          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
 523          */
 524 #   if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
 525         if (memory_end >= 56 * 1024 * 1024)
 526                 memory_end = 56 * 1024 * 1024;
 527 #   else
 528         if (memory_end >= 60 * 1024 * 1024)
 529                 memory_end = 60 * 1024 * 1024;
 530 #   endif                               /* CONFIG_DEBUG_HUNT_FOR_ZERO */
 531 #  endif                                /* ANOMALY_05000263 */
 532 # endif                         /* CONFIG_ROMFS_FS */
 533
 534         memory_end -= mtd_size;
 535
 536         if (mtd_size == 0) {
 537                 console_init();
 538                 panic("Don't boot kernel without rootfs attached.");
 539         }
 540
 541         /* Relocate MTD image to the top of memory after the uncached memory area */
 542         uclinux_ram_map.phys = memory_mtd_start = memory_end;
 543         uclinux_ram_map.size = mtd_size;
 544         dma_memcpy((void *)uclinux_ram_map.phys, _end, uclinux_ram_map.size);
 545 #endif                          /* CONFIG_MTD_UCLINUX */
 546
 547 #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
 548         /* Due to a Hardware Anomaly we need to limit the size of usable
 549          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
 550          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
 551          */
 552 #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
 553         if (memory_end >= 56 * 1024 * 1024)
 554                 memory_end = 56 * 1024 * 1024;
 555 #else
 556         if (memory_end >= 60 * 1024 * 1024)
 557                 memory_end = 60 * 1024 * 1024;
 558 #endif                          /* CONFIG_DEBUG_HUNT_FOR_ZERO */
 559         printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
 560 #endif                          /* ANOMALY_05000263 */
 561
 562 #ifdef CONFIG_MPU
 563         page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
 564         page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
 565 #endif
 566
 567 #if !defined(CONFIG_MTD_UCLINUX)
 568         /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
 569         memory_end -= SIZE_4K;
 570 #endif
 571
 572         init_mm.start_code = (unsigned long)_stext;
 573         init_mm.end_code = (unsigned long)_etext;
 574         init_mm.end_data = (unsigned long)_edata;
 575         init_mm.brk = (unsigned long)0;
 576
 577         printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
 578         printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
 579
 580         printk(KERN_INFO "Memory map:\n"
 581                 KERN_INFO "  fixedcode = 0x%p-0x%p\n"
 582                 KERN_INFO "  text      = 0x%p-0x%p\n"
 583                 KERN_INFO "  rodata    = 0x%p-0x%p\n"
 584                 KERN_INFO "  bss       = 0x%p-0x%p\n"
 585                 KERN_INFO "  data      = 0x%p-0x%p\n"
 586                 KERN_INFO "    stack   = 0x%p-0x%p\n"
 587                 KERN_INFO "  init      = 0x%p-0x%p\n"
 588                 KERN_INFO "  available = 0x%p-0x%p\n"
 589 #ifdef CONFIG_MTD_UCLINUX
 590                 KERN_INFO "  rootfs    = 0x%p-0x%p\n"
 591 #endif
 592 #if DMA_UNCACHED_REGION > 0
 593                 KERN_INFO "  DMA Zone  = 0x%p-0x%p\n"
 594 #endif
 595                 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
 596                 _stext, _etext,
 597                 __start_rodata, __end_rodata,
 598                 __bss_start, __bss_stop,
 599                 _sdata, _edata,
 600                 (void *)&init_thread_union,
 601                 (void *)((int)(&init_thread_union) + 0x2000),
 602                 __init_begin, __init_end,
 603                 (void *)_ramstart, (void *)memory_end
 604 #ifdef CONFIG_MTD_UCLINUX
 605                 , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
 606 #endif
 607 #if DMA_UNCACHED_REGION > 0
 608                 , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
 609 #endif
 610                 );
 611 }
 612
 613 /*
 614  * Find the lowest, highest page frame number we have available
 615  */
 616 void __init find_min_max_pfn(void)
 617 {
 618         int i;
 619
 620         max_pfn = 0;
 621         min_low_pfn = memory_end;
 622
 623         for (i = 0; i < bfin_memmap.nr_map; i++) {
 624                 unsigned long start, end;
 625                 /* RAM? */
 626                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
 627                         continue;
 628                 start = PFN_UP(bfin_memmap.map[i].addr);
 629                 end = PFN_DOWN(bfin_memmap.map[i].addr +
 630                                 bfin_memmap.map[i].size);
 631                 if (start >= end)
 632                         continue;
 633                 if (end > max_pfn)
 634                         max_pfn = end;
 635                 if (start < min_low_pfn)
 636                         min_low_pfn = start;
 637         }
 638 }
 639
 640 static __init void setup_bootmem_allocator(void)
 641 {
 642         int bootmap_size;
 643         int i;
 644         unsigned long start_pfn, end_pfn;
 645         unsigned long curr_pfn, last_pfn, size;
 646
 647         /* mark memory between memory_start and memory_end usable */
 648         add_memory_region(memory_start,
 649                 memory_end - memory_start, BFIN_MEMMAP_RAM);
 650         /* sanity check for overlap */
 651         sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
 652         print_memory_map("boot memmap");
 653
 654         /* intialize globals in linux/bootmem.h */
 655         find_min_max_pfn();
 656         /* pfn of the last usable page frame */
 657         if (max_pfn > memory_end >> PAGE_SHIFT)
 658                 max_pfn = memory_end >> PAGE_SHIFT;
 659         /* pfn of last page frame directly mapped by kernel */
 660         max_low_pfn = max_pfn;
 661         /* pfn of the first usable page frame after kernel image*/
 662         if (min_low_pfn < memory_start >> PAGE_SHIFT)
 663                 min_low_pfn = memory_start >> PAGE_SHIFT;
 664
 665         start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
 666         end_pfn = memory_end >> PAGE_SHIFT;
 667
 668         /*
 669          * give all the memory to the bootmap allocator, tell it to put the
 670          * boot mem_map at the start of memory.
 671          */
 672         bootmap_size = init_bootmem_node(NODE_DATA(0),
 673                         memory_start >> PAGE_SHIFT,     /* map goes here */
 674                         start_pfn, end_pfn);
 675
 676         /* register the memmap regions with the bootmem allocator */
 677         for (i = 0; i < bfin_memmap.nr_map; i++) {
 678                 /*
 679                  * Reserve usable memory
 680                  */
 681                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
 682                         continue;
 683                 /*
 684                  * We are rounding up the start address of usable memory:
 685                  */
 686                 curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
 687                 if (curr_pfn >= end_pfn)
 688                         continue;
 689                 /*
 690                  * ... and at the end of the usable range downwards:
 691                  */
 692                 last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
 693                                          bfin_memmap.map[i].size);
 694
 695                 if (last_pfn > end_pfn)
 696                         last_pfn = end_pfn;
 697
 698                 /*
 699                  * .. finally, did all the rounding and playing
 700                  * around just make the area go away?
 701                  */
 702                 if (last_pfn <= curr_pfn)
 703                         continue;
 704
 705                 size = last_pfn - curr_pfn;
 706                 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
 707         }
 708
 709         /* reserve memory before memory_start, including bootmap */
 710         reserve_bootmem(PAGE_OFFSET,
 711                 memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
 712                 BOOTMEM_DEFAULT);
 713 }
 714
 715 #define EBSZ_TO_MEG(ebsz) \
 716 ({ \
 717         int meg = 0; \
 718         switch (ebsz & 0xf) { \
 719                 case 0x1: meg =  16; break; \
 720                 case 0x3: meg =  32; break; \
 721                 case 0x5: meg =  64; break; \
 722                 case 0x7: meg = 128; break; \
 723                 case 0x9: meg = 256; break; \
 724                 case 0xb: meg = 512; break; \
 725         } \
 726         meg; \
 727 })
 728 static inline int __init get_mem_size(void)
 729 {
 730 #if defined(EBIU_SDBCTL)
 731 # if defined(BF561_FAMILY)
 732         int ret = 0;
 733         u32 sdbctl = bfin_read_EBIU_SDBCTL();
 734         ret += EBSZ_TO_MEG(sdbctl >>  0);
 735         ret += EBSZ_TO_MEG(sdbctl >>  8);
 736         ret += EBSZ_TO_MEG(sdbctl >> 16);
 737         ret += EBSZ_TO_MEG(sdbctl >> 24);
 738         return ret;
 739 # else
 740         return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
 741 # endif
 742 #elif defined(EBIU_DDRCTL1)
 743         u32 ddrctl = bfin_read_EBIU_DDRCTL1();
 744         int ret = 0;
 745         switch (ddrctl & 0xc0000) {
 746                 case DEVSZ_64:  ret = 64 / 8;
 747                 case DEVSZ_128: ret = 128 / 8;
 748                 case DEVSZ_256: ret = 256 / 8;
 749                 case DEVSZ_512: ret = 512 / 8;
 750         }
 751         switch (ddrctl & 0x30000) {
 752                 case DEVWD_4:  ret *= 2;
 753                 case DEVWD_8:  ret *= 2;
 754                 case DEVWD_16: break;
 755         }
 756         if ((ddrctl & 0xc000) == 0x4000)
 757                 ret *= 2;
 758         return ret;
 759 #endif
 760         BUG();
 761 }
 762
 763 void __init setup_arch(char **cmdline_p)
 764 {
 765         unsigned long sclk, cclk;
 766
 767 #ifdef CONFIG_DUMMY_CONSOLE
 768         conswitchp = &dummy_con;
 769 #endif
 770
 771 #if defined(CONFIG_CMDLINE_BOOL)
 772         strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
 773         command_line[sizeof(command_line) - 1] = 0;
 774 #endif
 775
 776         /* Keep a copy of command line */
 777         *cmdline_p = &command_line[0];
 778         memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
 779         boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
 780
 781         /* setup memory defaults from the user config */
 782         physical_mem_end = 0;
 783         _ramend = get_mem_size() * 1024 * 1024;
 784
 785         memset(&bfin_memmap, 0, sizeof(bfin_memmap));
 786
 787         parse_cmdline_early(&command_line[0]);
 788
 789         if (physical_mem_end == 0)
 790                 physical_mem_end = _ramend;
 791
 792         memory_setup();
 793
 794         /* Initialize Async memory banks */
 795         bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
 796         bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
 797         bfin_write_EBIU_AMGCTL(AMGCTLVAL);
 798 #ifdef CONFIG_EBIU_MBSCTLVAL
 799         bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
 800         bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
 801         bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
 802 #endif
 803
 804         cclk = get_cclk();
 805         sclk = get_sclk();
 806
 807         if ((ANOMALY_05000273 || ANOMALY_05000274) && (cclk >> 1) < sclk)
 808                 panic("ANOMALY 05000273 or 05000274: CCLK must be >= 2*SCLK");
 809
 810 #ifdef BF561_FAMILY
 811         if (ANOMALY_05000266) {
 812                 bfin_read_IMDMA_D0_IRQ_STATUS();
 813                 bfin_read_IMDMA_D1_IRQ_STATUS();
 814         }
 815 #endif
 816         printk(KERN_INFO "Hardware Trace ");
 817         if (bfin_read_TBUFCTL() & 0x1)
 818                 printk("Active ");
 819         else
 820                 printk("Off ");
 821         if (bfin_read_TBUFCTL() & 0x2)
 822                 printk("and Enabled\n");
 823         else
 824         printk("and Disabled\n");
 825
 826 #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
 827         /* we need to initialize the Flashrom device here since we might
 828          * do things with flash early on in the boot
 829          */
 830         flash_probe();
 831 #endif
 832
 833         printk(KERN_INFO "Boot Mode: %i\n", bfin_read_SYSCR() & 0xF);
 834
 835         /* Newer parts mirror SWRST bits in SYSCR */
 836 #if defined(CONFIG_BF53x) || defined(CONFIG_BF561) || \
 837     defined(CONFIG_BF538) || defined(CONFIG_BF539)
 838         _bfin_swrst = bfin_read_SWRST();
 839 #else
 840         /* Clear boot mode field */
 841         _bfin_swrst = bfin_read_SYSCR() & ~0xf;
 842 #endif
 843
 844 #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
 845         bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
 846 #endif
 847 #ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
 848         bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
 849 #endif
 850
 851 #ifdef CONFIG_SMP
 852         if (_bfin_swrst & SWRST_DBL_FAULT_A) {
 853 #else
 854         if (_bfin_swrst & RESET_DOUBLE) {
 855 #endif
 856                 printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
 857 #ifdef CONFIG_DEBUG_DOUBLEFAULT
 858                 /* We assume the crashing kernel, and the current symbol table match */
 859                 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
 860                         (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
 861                 printk(KERN_NOTICE "   DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
 862                 printk(KERN_NOTICE "   ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
 863 #endif
 864                 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
 865                         init_retx);
 866         } else if (_bfin_swrst & RESET_WDOG)
 867                 printk(KERN_INFO "Recovering from Watchdog event\n");
 868         else if (_bfin_swrst & RESET_SOFTWARE)
 869                 printk(KERN_NOTICE "Reset caused by Software reset\n");
 870
 871         printk(KERN_INFO "Blackfin support (C) 2004-2009 Analog Devices, Inc.\n");
 872         if (bfin_compiled_revid() == 0xffff)
 873                 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
 874         else if (bfin_compiled_revid() == -1)
 875                 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
 876         else
 877                 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
 878
 879         if (unlikely(CPUID != bfin_cpuid()))
 880                 printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
 881                         CPU, bfin_cpuid(), bfin_revid());
 882         else {
 883                 if (bfin_revid() != bfin_compiled_revid()) {
 884                         if (bfin_compiled_revid() == -1)
 885                                 printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
 886                                        bfin_revid());
 887                         else if (bfin_compiled_revid() != 0xffff) {
 888                                 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
 889                                        bfin_compiled_revid(), bfin_revid());
 890                                 if (bfin_compiled_revid() > bfin_revid())
 891                                         panic("Error: you are missing anomaly workarounds for this rev");
 892                         }
 893                 }
 894                 if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
 895                         printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
 896                                CPU, bfin_revid());
 897         }
 898
 899         /* We can't run on BF548-0.1 due to ANOMALY 05000448 */
 900         if (bfin_cpuid() == 0x27de && bfin_revid() == 1)
 901                 panic("You can't run on this processor due to 05000448");
 902
 903         printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
 904
 905         printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
 906                cclk / 1000000, sclk / 1000000);
 907
 908         setup_bootmem_allocator();
 909
 910         paging_init();
 911
 912         /* Copy atomic sequences to their fixed location, and sanity check that
 913            these locations are the ones that we advertise to userspace.  */
 914         memcpy((void *)FIXED_CODE_START, &fixed_code_start,
 915                FIXED_CODE_END - FIXED_CODE_START);
 916         BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
 917                != SIGRETURN_STUB - FIXED_CODE_START);
 918         BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
 919                != ATOMIC_XCHG32 - FIXED_CODE_START);
 920         BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
 921                != ATOMIC_CAS32 - FIXED_CODE_START);
 922         BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
 923                != ATOMIC_ADD32 - FIXED_CODE_START);
 924         BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
 925                != ATOMIC_SUB32 - FIXED_CODE_START);
 926         BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
 927                != ATOMIC_IOR32 - FIXED_CODE_START);
 928         BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
 929                != ATOMIC_AND32 - FIXED_CODE_START);
 930         BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
 931                != ATOMIC_XOR32 - FIXED_CODE_START);
 932         BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
 933                 != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
 934
 935 #ifdef CONFIG_SMP
 936         platform_init_cpus();
 937 #endif
 938         init_exception_vectors();
 939         bfin_cache_init();      /* Initialize caches for the boot CPU */
 940 }
 941
 942 static int __init topology_init(void)
 943 {
 944         unsigned int cpu;
 945         /* Record CPU-private information for the boot processor. */
 946         bfin_setup_cpudata(0);
 947
 948         for_each_possible_cpu(cpu) {
 949                 register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
 950         }
 951
 952         return 0;
 953 }
 954
 955 subsys_initcall(topology_init);
 956
 957 /* Get the input clock frequency */
 958 static u_long cached_clkin_hz = CONFIG_CLKIN_HZ;
 959 static u_long get_clkin_hz(void)
 960 {
 961         return cached_clkin_hz;
 962 }
 963 static int __init early_init_clkin_hz(char *buf)
 964 {
 965         cached_clkin_hz = simple_strtoul(buf, NULL, 0);
 966 #ifdef BFIN_KERNEL_CLOCK
 967         if (cached_clkin_hz != CONFIG_CLKIN_HZ)
 968                 panic("cannot change clkin_hz when reprogramming clocks");
 969 #endif
 970         return 1;
 971 }
 972 early_param("clkin_hz=", early_init_clkin_hz);
 973
 974 /* Get the voltage input multiplier */
 975 static u_long get_vco(void)
 976 {
 977         static u_long cached_vco;
 978         u_long msel, pll_ctl;
 979
 980         /* The assumption here is that VCO never changes at runtime.
 981          * If, someday, we support that, then we'll have to change this.
 982          */
 983         if (cached_vco)
 984                 return cached_vco;
 985
 986         pll_ctl = bfin_read_PLL_CTL();
 987         msel = (pll_ctl >> 9) & 0x3F;
 988         if (0 == msel)
 989                 msel = 64;
 990
 991         cached_vco = get_clkin_hz();
 992         cached_vco >>= (1 & pll_ctl);   /* DF bit */
 993         cached_vco *= msel;
 994         return cached_vco;
 995 }
 996
 997 /* Get the Core clock */
 998 u_long get_cclk(void)
 999 {
1000         static u_long cached_cclk_pll_div, cached_cclk;
1001         u_long csel, ssel;
1002
1003         if (bfin_read_PLL_STAT() & 0x1)
1004                 return get_clkin_hz();
1005
1006         ssel = bfin_read_PLL_DIV();
1007         if (ssel == cached_cclk_pll_div)
1008                 return cached_cclk;
1009         else
1010                 cached_cclk_pll_div = ssel;
1011
1012         csel = ((ssel >> 4) & 0x03);
1013         ssel &= 0xf;
1014         if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
1015                 cached_cclk = get_vco() / ssel;
1016         else
1017                 cached_cclk = get_vco() >> csel;
1018         return cached_cclk;
1019 }
1020 EXPORT_SYMBOL(get_cclk);
1021
1022 /* Get the System clock */
1023 u_long get_sclk(void)
1024 {
1025         static u_long cached_sclk;
1026         u_long ssel;
1027
1028         /* The assumption here is that SCLK never changes at runtime.
1029          * If, someday, we support that, then we'll have to change this.
1030          */
1031         if (cached_sclk)
1032                 return cached_sclk;
1033
1034         if (bfin_read_PLL_STAT() & 0x1)
1035                 return get_clkin_hz();
1036
1037         ssel = bfin_read_PLL_DIV() & 0xf;
1038         if (0 == ssel) {
1039                 printk(KERN_WARNING "Invalid System Clock\n");
1040                 ssel = 1;
1041         }
1042
1043         cached_sclk = get_vco() / ssel;
1044         return cached_sclk;
1045 }
1046 EXPORT_SYMBOL(get_sclk);
1047
1048 unsigned long sclk_to_usecs(unsigned long sclk)
1049 {
1050         u64 tmp = USEC_PER_SEC * (u64)sclk;
1051         do_div(tmp, get_sclk());
1052         return tmp;
1053 }
1054 EXPORT_SYMBOL(sclk_to_usecs);
1055
1056 unsigned long usecs_to_sclk(unsigned long usecs)
1057 {
1058         u64 tmp = get_sclk() * (u64)usecs;
1059         do_div(tmp, USEC_PER_SEC);
1060         return tmp;
1061 }
1062 EXPORT_SYMBOL(usecs_to_sclk);
1063
1064 /*
1065  *      Get CPU information for use by the procfs.
1066  */
1067 static int show_cpuinfo(struct seq_file *m, void *v)
1068 {
1069         char *cpu, *mmu, *fpu, *vendor, *cache;
1070         uint32_t revid;
1071         int cpu_num = *(unsigned int *)v;
1072         u_long sclk, cclk;
1073         u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
1074         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu_num);
1075
1076         cpu = CPU;
1077         mmu = "none";
1078         fpu = "none";
1079         revid = bfin_revid();
1080
1081         sclk = get_sclk();
1082         cclk = get_cclk();
1083
1084         switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
1085         case 0xca:
1086                 vendor = "Analog Devices";
1087                 break;
1088         default:
1089                 vendor = "unknown";
1090                 break;
1091         }
1092
1093         seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n", cpu_num, vendor);
1094
1095         if (CPUID == bfin_cpuid())
1096                 seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
1097         else
1098                 seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
1099                         CPUID, bfin_cpuid());
1100
1101         seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
1102                 "stepping\t: %d ",
1103                 cpu, cclk/1000000, sclk/1000000,
1104 #ifdef CONFIG_MPU
1105                 "mpu on",
1106 #else
1107                 "mpu off",
1108 #endif
1109                 revid);
1110
1111         if (bfin_revid() != bfin_compiled_revid()) {
1112                 if (bfin_compiled_revid() == -1)
1113                         seq_printf(m, "(Compiled for Rev none)");
1114                 else if (bfin_compiled_revid() == 0xffff)
1115                         seq_printf(m, "(Compiled for Rev any)");
1116                 else
1117                         seq_printf(m, "(Compiled for Rev %d)", bfin_compiled_revid());
1118         }
1119
1120         seq_printf(m, "\ncpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
1121                 cclk/1000000, cclk%1000000,
1122                 sclk/1000000, sclk%1000000);
1123         seq_printf(m, "bogomips\t: %lu.%02lu\n"
1124                 "Calibration\t: %lu loops\n",
1125                 (cpudata->loops_per_jiffy * HZ) / 500000,
1126                 ((cpudata->loops_per_jiffy * HZ) / 5000) % 100,
1127                 (cpudata->loops_per_jiffy * HZ));
1128
1129         /* Check Cache configutation */
1130         switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
1131         case ACACHE_BSRAM:
1132                 cache = "dbank-A/B\t: cache/sram";
1133                 dcache_size = 16;
1134                 dsup_banks = 1;
1135                 break;
1136         case ACACHE_BCACHE:
1137                 cache = "dbank-A/B\t: cache/cache";
1138                 dcache_size = 32;
1139                 dsup_banks = 2;
1140                 break;
1141         case ASRAM_BSRAM:
1142                 cache = "dbank-A/B\t: sram/sram";
1143                 dcache_size = 0;
1144                 dsup_banks = 0;
1145                 break;
1146         default:
1147                 cache = "unknown";
1148                 dcache_size = 0;
1149                 dsup_banks = 0;
1150                 break;
1151         }
1152
1153         /* Is it turned on? */
1154         if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
1155                 dcache_size = 0;
1156
1157         if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB))
1158                 icache_size = 0;
1159
1160         seq_printf(m, "cache size\t: %d KB(L1 icache) "
1161                 "%d KB(L1 dcache%s) %d KB(L2 cache)\n",
1162                 icache_size, dcache_size,
1163 #if defined CONFIG_BFIN_WB
1164                 "-wb"
1165 #elif defined CONFIG_BFIN_WT
1166                 "-wt"
1167 #endif
1168                 "", 0);
1169
1170         seq_printf(m, "%s\n", cache);
1171
1172         if (icache_size)
1173                 seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
1174                            BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
1175         else
1176                 seq_printf(m, "icache setup\t: off\n");
1177
1178         seq_printf(m,
1179                    "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
1180                    dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
1181                    BFIN_DLINES);
1182 #ifdef __ARCH_SYNC_CORE_DCACHE
1183         seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count);
1184 #endif
1185 #ifdef __ARCH_SYNC_CORE_ICACHE
1186         seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", cpudata->icache_invld_count);
1187 #endif
1188 #ifdef CONFIG_BFIN_ICACHE_LOCK
1189         switch ((cpudata->imemctl >> 3) & WAYALL_L) {
1190         case WAY0_L:
1191                 seq_printf(m, "Way0 Locked-Down\n");
1192                 break;
1193         case WAY1_L:
1194                 seq_printf(m, "Way1 Locked-Down\n");
1195                 break;
1196         case WAY01_L:
1197                 seq_printf(m, "Way0,Way1 Locked-Down\n");
1198                 break;
1199         case WAY2_L:
1200                 seq_printf(m, "Way2 Locked-Down\n");
1201                 break;
1202         case WAY02_L:
1203                 seq_printf(m, "Way0,Way2 Locked-Down\n");
1204                 break;
1205         case WAY12_L:
1206                 seq_printf(m, "Way1,Way2 Locked-Down\n");
1207                 break;
1208         case WAY012_L:
1209                 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
1210                 break;
1211         case WAY3_L:
1212                 seq_printf(m, "Way3 Locked-Down\n");
1213                 break;
1214         case WAY03_L:
1215                 seq_printf(m, "Way0,Way3 Locked-Down\n");
1216                 break;
1217         case WAY13_L:
1218                 seq_printf(m, "Way1,Way3 Locked-Down\n");
1219                 break;
1220         case WAY013_L:
1221                 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
1222                 break;
1223         case WAY32_L:
1224                 seq_printf(m, "Way3,Way2 Locked-Down\n");
1225                 break;
1226         case WAY320_L:
1227                 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
1228                 break;
1229         case WAY321_L:
1230                 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
1231                 break;
1232         case WAYALL_L:
1233                 seq_printf(m, "All Ways are locked\n");
1234                 break;
1235         default:
1236                 seq_printf(m, "No Ways are locked\n");
1237         }
1238 #endif
1239
1240         if (cpu_num != num_possible_cpus() - 1)
1241                 return 0;
1242
1243         if (L2_LENGTH)
1244                 seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
1245         seq_printf(m, "board name\t: %s\n", bfin_board_name);
1246         seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
1247                  physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
1248         seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
1249                 ((int)memory_end - (int)_stext) >> 10,
1250                 _stext,
1251                 (void *)memory_end);
1252         seq_printf(m, "\n");
1253
1254         return 0;
1255 }
1256
1257 static void *c_start(struct seq_file *m, loff_t *pos)
1258 {
1259         if (*pos == 0)
1260                 *pos = first_cpu(cpu_online_map);
1261         if (*pos >= num_online_cpus())
1262                 return NULL;
1263
1264         return pos;
1265 }
1266
1267 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1268 {
1269         *pos = next_cpu(*pos, cpu_online_map);
1270
1271         return c_start(m, pos);
1272 }
1273
1274 static void c_stop(struct seq_file *m, void *v)
1275 {
1276 }
1277
1278 const struct seq_operations cpuinfo_op = {
1279         .start = c_start,
1280         .next = c_next,
1281         .stop = c_stop,
1282         .show = show_cpuinfo,
1283 };
1284
1285 void __init cmdline_init(const char *r0)
1286 {
1287         if (r0)
1288                 strncpy(command_line, r0, COMMAND_LINE_SIZE);
1289 }