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ARM: imx: dynamically register spi_imx devices (imx31)
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1 /*
2  *  LILLY-1131 module support
3  *
4  *    Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
5  *
6  *  based on code for other MX31 boards,
7  *
8  *    Copyright 2005-2007 Freescale Semiconductor
9  *    Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
10  *    Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License as published by
14  * the Free Software Foundation; either version 2 of the License, or
15  * (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  * GNU General Public License for more details.
21  */
22
23 #include <linux/types.h>
24 #include <linux/init.h>
25 #include <linux/clk.h>
26 #include <linux/gpio.h>
27 #include <linux/platform_device.h>
28 #include <linux/interrupt.h>
29 #include <linux/smsc911x.h>
30 #include <linux/mtd/physmap.h>
31 #include <linux/spi/spi.h>
32 #include <linux/mfd/mc13783.h>
33 #include <linux/usb/otg.h>
34 #include <linux/usb/ulpi.h>
35
36 #include <asm/mach-types.h>
37 #include <asm/mach/arch.h>
38 #include <asm/mach/time.h>
39 #include <asm/mach/map.h>
40
41 #include <mach/hardware.h>
42 #include <mach/common.h>
43 #include <mach/iomux-mx3.h>
44 #include <mach/board-mx31lilly.h>
45 #include <mach/mxc_ehci.h>
46 #include <mach/ulpi.h>
47
48 #include "devices-imx31.h"
49 #include "devices.h"
50
51 /*
52  * This file contains module-specific initialization routines for LILLY-1131.
53  * Initialization of peripherals found on the baseboard is implemented in the
54  * appropriate baseboard support code.
55  */
56
57 /* SMSC ethernet support */
58
59 static struct resource smsc91x_resources[] = {
60         {
61                 .start  = MX31_CS4_BASE_ADDR,
62                 .end    = MX31_CS4_BASE_ADDR + 0xffff,
63                 .flags  = IORESOURCE_MEM,
64         },
65         {
66                 .start  = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
67                 .end    = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
68                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
69         }
70 };
71
72 static struct smsc911x_platform_config smsc911x_config = {
73         .phy_interface  = PHY_INTERFACE_MODE_MII,
74         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
75         .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
76         .flags          = SMSC911X_USE_32BIT |
77                           SMSC911X_SAVE_MAC_ADDRESS |
78                           SMSC911X_FORCE_INTERNAL_PHY,
79 };
80
81 static struct platform_device smsc91x_device = {
82         .name           = "smsc911x",
83         .id             = -1,
84         .num_resources  = ARRAY_SIZE(smsc91x_resources),
85         .resource       = smsc91x_resources,
86         .dev            = {
87                 .platform_data = &smsc911x_config,
88         }
89 };
90
91 /* NOR flash */
92 static struct physmap_flash_data nor_flash_data = {
93         .width  = 2,
94 };
95
96 static struct resource nor_flash_resource = {
97         .start  = 0xa0000000,
98         .end    = 0xa1ffffff,
99         .flags  = IORESOURCE_MEM,
100 };
101
102 static struct platform_device physmap_flash_device = {
103         .name   = "physmap-flash",
104         .id     = 0,
105         .dev    = {
106                 .platform_data  = &nor_flash_data,
107         },
108         .resource = &nor_flash_resource,
109         .num_resources = 1,
110 };
111
112 /* USB */
113
114 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
115                         PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
116
117 static int usbotg_init(struct platform_device *pdev)
118 {
119         unsigned int pins[] = {
120                 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
121                 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
122                 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
123                 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
124                 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
125                 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
126                 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
127                 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
128                 MX31_PIN_USBOTG_CLK__USBOTG_CLK,
129                 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
130                 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
131                 MX31_PIN_USBOTG_STP__USBOTG_STP,
132         };
133
134         mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB OTG");
135
136         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
137         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
138         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
139         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
140         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
141         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
142         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
143         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
144         mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
145         mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
146         mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
147         mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
148
149         mxc_iomux_set_gpr(MUX_PGP_USB_4WIRE, true);
150         mxc_iomux_set_gpr(MUX_PGP_USB_COMMON, true);
151
152         /* chip select */
153         mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE2, IOMUX_CONFIG_GPIO),
154                                 "USBOTG_CS");
155         gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), "USBH1 CS");
156         gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), 0);
157
158         return 0;
159 }
160
161 static int usbh1_init(struct platform_device *pdev)
162 {
163         int pins[] = {
164                 MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
165                 MX31_PIN_CSPI1_MISO__USBH1_RXDP,
166                 MX31_PIN_CSPI1_SS0__USBH1_TXDM,
167                 MX31_PIN_CSPI1_SS1__USBH1_TXDP,
168                 MX31_PIN_CSPI1_SS2__USBH1_RCV,
169                 MX31_PIN_CSPI1_SCLK__USBH1_OEB,
170                 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS,
171         };
172
173         mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H1");
174
175         mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
176         mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
177         mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
178         mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
179         mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
180         mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
181         mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
182
183         mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
184
185         return 0;
186 }
187
188 static int usbh2_init(struct platform_device *pdev)
189 {
190         int pins[] = {
191                 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
192                 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
193                 MX31_PIN_USBH2_CLK__USBH2_CLK,
194                 MX31_PIN_USBH2_DIR__USBH2_DIR,
195                 MX31_PIN_USBH2_NXT__USBH2_NXT,
196                 MX31_PIN_USBH2_STP__USBH2_STP,
197         };
198
199         mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
200
201         mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
202         mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
203         mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
204         mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
205         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
206         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
207         mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
208         mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
209         mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
210         mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
211         mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
212         mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
213
214         mxc_iomux_set_gpr(MUX_PGP_UH2, true);
215
216         /* chip select */
217         mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
218                                 "USBH2_CS");
219         gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
220         gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
221
222         return 0;
223 }
224
225 static struct mxc_usbh_platform_data usbotg_pdata = {
226         .init   = usbotg_init,
227         .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
228         .flags  = MXC_EHCI_POWER_PINS_ENABLED,
229 };
230
231 static struct mxc_usbh_platform_data usbh1_pdata = {
232         .init   = usbh1_init,
233         .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
234         .flags  = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI,
235 };
236
237 static struct mxc_usbh_platform_data usbh2_pdata = {
238         .init   = usbh2_init,
239         .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
240         .flags  = MXC_EHCI_POWER_PINS_ENABLED,
241 };
242
243 static struct platform_device *devices[] __initdata = {
244         &smsc91x_device,
245         &physmap_flash_device,
246 };
247
248 /* SPI */
249
250 static int spi_internal_chipselect[] = {
251         MXC_SPI_CS(0),
252         MXC_SPI_CS(1),
253         MXC_SPI_CS(2),
254 };
255
256 static const struct spi_imx_master spi0_pdata __initconst = {
257         .chipselect = spi_internal_chipselect,
258         .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
259 };
260
261 static const struct spi_imx_master spi1_pdata __initconst = {
262         .chipselect = spi_internal_chipselect,
263         .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
264 };
265
266 static struct mc13783_platform_data mc13783_pdata __initdata = {
267         .flags = MC13783_USE_RTC | MC13783_USE_TOUCHSCREEN,
268 };
269
270 static struct spi_board_info mc13783_dev __initdata = {
271         .modalias       = "mc13783",
272         .max_speed_hz   = 1000000,
273         .bus_num        = 1,
274         .chip_select    = 0,
275         .platform_data  = &mc13783_pdata,
276 };
277
278 static int mx31lilly_baseboard;
279 core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
280
281 static void __init mx31lilly_board_init(void)
282 {
283         switch (mx31lilly_baseboard) {
284         case MX31LILLY_NOBOARD:
285                 break;
286         case MX31LILLY_DB:
287                 mx31lilly_db_init();
288                 break;
289         default:
290                 printk(KERN_ERR "Illegal mx31lilly_baseboard type %d\n",
291                         mx31lilly_baseboard);
292         }
293
294         mxc_iomux_alloc_pin(MX31_PIN_CS4__CS4, "Ethernet CS");
295
296         /* SPI */
297         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SCLK__SCLK, "SPI1_CLK");
298         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MOSI__MOSI, "SPI1_TX");
299         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MISO__MISO, "SPI1_RX");
300         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, "SPI1_RDY");
301         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS0__SS0, "SPI1_SS0");
302         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS1__SS1, "SPI1_SS1");
303         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS2__SS2, "SPI1_SS2");
304
305         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SCLK__SCLK, "SPI2_CLK");
306         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MOSI__MOSI, "SPI2_TX");
307         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MISO__MISO, "SPI2_RX");
308         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, "SPI2_RDY");
309         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS0__SS0, "SPI2_SS0");
310         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS1__SS1, "SPI2_SS1");
311         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS2__SS2, "SPI2_SS2");
312
313         imx31_add_spi_imx0(&spi0_pdata);
314         imx31_add_spi_imx1(&spi1_pdata);
315         spi_register_board_info(&mc13783_dev, 1);
316
317         platform_add_devices(devices, ARRAY_SIZE(devices));
318
319         /* USB */
320         usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
321                                 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
322         usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
323                                 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
324
325         mxc_register_device(&mxc_usbh1, &usbh1_pdata);
326         mxc_register_device(&mxc_usbh2, &usbh2_pdata);
327 }
328
329 static void __init mx31lilly_timer_init(void)
330 {
331         mx31_clocks_init(26000000);
332 }
333
334 static struct sys_timer mx31lilly_timer = {
335         .init   = mx31lilly_timer_init,
336 };
337
338 MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
339         .phys_io        = MX31_AIPS1_BASE_ADDR,
340         .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
341         .boot_params    = MX3x_PHYS_OFFSET + 0x100,
342         .map_io         = mx31_map_io,
343         .init_irq       = mx31_init_irq,
344         .init_machine   = mx31lilly_board_init,
345         .timer          = &mx31lilly_timer,
346 MACHINE_END
347