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1 /* arch/arm/mach-msm/smd_private.h
2  *
3  * Copyright (C) 2007 Google, Inc.
4  * Copyright (c) 2007 QUALCOMM Incorporated
5  *
6  * This software is licensed under the terms of the GNU General Public
7  * License version 2, as published by the Free Software Foundation, and
8  * may be copied, distributed, and modified under those terms.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  */
16 #ifndef _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_
17 #define _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_
18
19 #include <linux/platform_device.h>
20 #include <linux/spinlock.h>
21 #include <linux/list.h>
22
23 struct smem_heap_info {
24         unsigned initialized;
25         unsigned free_offset;
26         unsigned heap_remaining;
27         unsigned reserved;
28 };
29
30 struct smem_heap_entry {
31         unsigned allocated;
32         unsigned offset;
33         unsigned size;
34         unsigned reserved;
35 };
36
37 struct smem_proc_comm {
38         unsigned command;
39         unsigned status;
40         unsigned data1;
41         unsigned data2;
42 };
43
44 #define PC_APPS  0
45 #define PC_MODEM 1
46
47 #define VERSION_SMD       0
48 #define VERSION_QDSP6     4
49 #define VERSION_APPS_SBL  6
50 #define VERSION_MODEM_SBL 7
51 #define VERSION_APPS      8
52 #define VERSION_MODEM     9
53
54 struct smem_shared {
55         struct smem_proc_comm proc_comm[4];
56         unsigned version[32];
57         struct smem_heap_info heap_info;
58         struct smem_heap_entry heap_toc[512];
59 };
60
61 #define SMSM_V1_SIZE            (sizeof(unsigned) * 8)
62 #define SMSM_V2_SIZE            (sizeof(unsigned) * 4)
63
64 #ifdef CONFIG_MSM_SMD_PKG3
65 struct smsm_interrupt_info {
66         uint32_t interrupt_mask;
67         uint32_t pending_interrupts;
68         uint32_t wakeup_reason;
69 };
70 #else
71 #define DEM_MAX_PORT_NAME_LEN (20)
72 struct msm_dem_slave_data {
73         uint32_t sleep_time;
74         uint32_t interrupt_mask;
75         uint32_t resources_used;
76         uint32_t reserved1;
77
78         uint32_t wakeup_reason;
79         uint32_t pending_interrupts;
80         uint32_t rpc_prog;
81         uint32_t rpc_proc;
82         char     smd_port_name[DEM_MAX_PORT_NAME_LEN];
83         uint32_t reserved2;
84 };
85 #endif
86
87 #define SZ_DIAG_ERR_MSG 0xC8
88 #define ID_DIAG_ERR_MSG SMEM_DIAG_ERR_MESSAGE
89 #define ID_SMD_CHANNELS SMEM_SMD_BASE_ID
90 #define ID_SHARED_STATE SMEM_SMSM_SHARED_STATE
91 #define ID_CH_ALLOC_TBL SMEM_CHANNEL_ALLOC_TBL
92
93 #define SMSM_INIT               0x00000001
94 #define SMSM_SMDINIT            0x00000008
95 #define SMSM_RPCINIT            0x00000020
96 #define SMSM_RESET              0x00000040
97 #define SMSM_RSA                0x00000080
98 #define SMSM_RUN                0x00000100
99 #define SMSM_PWRC               0x00000200
100 #define SMSM_TIMEWAIT           0x00000400
101 #define SMSM_TIMEINIT           0x00000800
102 #define SMSM_PWRC_EARLY_EXIT    0x00001000
103 #define SMSM_WFPI               0x00002000
104 #define SMSM_SLEEP              0x00004000
105 #define SMSM_SLEEPEXIT          0x00008000
106 #define SMSM_APPS_REBOOT        0x00020000
107 #define SMSM_SYSTEM_POWER_DOWN  0x00040000
108 #define SMSM_SYSTEM_REBOOT      0x00080000
109 #define SMSM_SYSTEM_DOWNLOAD    0x00100000
110 #define SMSM_PWRC_SUSPEND       0x00200000
111 #define SMSM_APPS_SHUTDOWN      0x00400000
112 #define SMSM_SMD_LOOPBACK       0x00800000
113 #define SMSM_RUN_QUIET          0x01000000
114 #define SMSM_MODEM_WAIT         0x02000000
115 #define SMSM_MODEM_BREAK        0x04000000
116 #define SMSM_MODEM_CONTINUE     0x08000000
117 #define SMSM_UNKNOWN            0x80000000
118
119 #define SMSM_WKUP_REASON_RPC    0x00000001
120 #define SMSM_WKUP_REASON_INT    0x00000002
121 #define SMSM_WKUP_REASON_GPIO   0x00000004
122 #define SMSM_WKUP_REASON_TIMER  0x00000008
123 #define SMSM_WKUP_REASON_ALARM  0x00000010
124 #define SMSM_WKUP_REASON_RESET  0x00000020
125
126 #ifdef CONFIG_ARCH_MSM7X00A
127 enum smsm_state_item {
128         SMSM_STATE_APPS = 1,
129         SMSM_STATE_MODEM = 3,
130         SMSM_STATE_COUNT,
131 };
132 #else
133 enum smsm_state_item {
134         SMSM_STATE_APPS,
135         SMSM_STATE_MODEM,
136         SMSM_STATE_HEXAGON,
137         SMSM_STATE_APPS_DEM,
138         SMSM_STATE_MODEM_DEM,
139         SMSM_STATE_QDSP6_DEM,
140         SMSM_STATE_POWER_MASTER_DEM,
141         SMSM_STATE_TIME_MASTER_DEM,
142         SMSM_STATE_COUNT,
143 };
144 #endif
145
146 void *smem_alloc(unsigned id, unsigned size);
147 int smsm_change_state(enum smsm_state_item item, uint32_t clear_mask, uint32_t set_mask);
148 uint32_t smsm_get_state(enum smsm_state_item item);
149 int smsm_set_sleep_duration(uint32_t delay);
150 void smsm_print_sleep_info(void);
151
152 #define SMEM_NUM_SMD_CHANNELS        64
153
154 typedef enum {
155         /* fixed items */
156         SMEM_PROC_COMM = 0,
157         SMEM_HEAP_INFO,
158         SMEM_ALLOCATION_TABLE,
159         SMEM_VERSION_INFO,
160         SMEM_HW_RESET_DETECT,
161         SMEM_AARM_WARM_BOOT,
162         SMEM_DIAG_ERR_MESSAGE,
163         SMEM_SPINLOCK_ARRAY,
164         SMEM_MEMORY_BARRIER_LOCATION,
165
166         /* dynamic items */
167         SMEM_AARM_PARTITION_TABLE,
168         SMEM_AARM_BAD_BLOCK_TABLE,
169         SMEM_RESERVE_BAD_BLOCKS,
170         SMEM_WM_UUID,
171         SMEM_CHANNEL_ALLOC_TBL,
172         SMEM_SMD_BASE_ID,
173         SMEM_SMEM_LOG_IDX = SMEM_SMD_BASE_ID + SMEM_NUM_SMD_CHANNELS,
174         SMEM_SMEM_LOG_EVENTS,
175         SMEM_SMEM_STATIC_LOG_IDX,
176         SMEM_SMEM_STATIC_LOG_EVENTS,
177         SMEM_SMEM_SLOW_CLOCK_SYNC,
178         SMEM_SMEM_SLOW_CLOCK_VALUE,
179         SMEM_BIO_LED_BUF,
180         SMEM_SMSM_SHARED_STATE,
181         SMEM_SMSM_INT_INFO,
182         SMEM_SMSM_SLEEP_DELAY,
183         SMEM_SMSM_LIMIT_SLEEP,
184         SMEM_SLEEP_POWER_COLLAPSE_DISABLED,
185         SMEM_KEYPAD_KEYS_PRESSED,
186         SMEM_KEYPAD_STATE_UPDATED,
187         SMEM_KEYPAD_STATE_IDX,
188         SMEM_GPIO_INT,
189         SMEM_MDDI_LCD_IDX,
190         SMEM_MDDI_HOST_DRIVER_STATE,
191         SMEM_MDDI_LCD_DISP_STATE,
192         SMEM_LCD_CUR_PANEL,
193         SMEM_MARM_BOOT_SEGMENT_INFO,
194         SMEM_AARM_BOOT_SEGMENT_INFO,
195         SMEM_SLEEP_STATIC,
196         SMEM_SCORPION_FREQUENCY,
197         SMEM_SMD_PROFILES,
198         SMEM_TSSC_BUSY,
199         SMEM_HS_SUSPEND_FILTER_INFO,
200         SMEM_BATT_INFO,
201         SMEM_APPS_BOOT_MODE,
202         SMEM_VERSION_FIRST,
203         SMEM_VERSION_LAST = SMEM_VERSION_FIRST + 24,
204         SMEM_OSS_RRCASN1_BUF1,
205         SMEM_OSS_RRCASN1_BUF2,
206         SMEM_ID_VENDOR0,
207         SMEM_ID_VENDOR1,
208         SMEM_ID_VENDOR2,
209         SMEM_HW_SW_BUILD_ID,
210         SMEM_SMD_BLOCK_PORT_BASE_ID,
211         SMEM_SMD_BLOCK_PORT_PROC0_HEAP = SMEM_SMD_BLOCK_PORT_BASE_ID + SMEM_NUM_SMD_CHANNELS,
212         SMEM_SMD_BLOCK_PORT_PROC1_HEAP = SMEM_SMD_BLOCK_PORT_PROC0_HEAP + SMEM_NUM_SMD_CHANNELS,
213         SMEM_I2C_MUTEX = SMEM_SMD_BLOCK_PORT_PROC1_HEAP + SMEM_NUM_SMD_CHANNELS,
214         SMEM_SCLK_CONVERSION,
215         SMEM_SMD_SMSM_INTR_MUX,
216         SMEM_SMSM_CPU_INTR_MASK,
217         SMEM_APPS_DEM_SLAVE_DATA,
218         SMEM_QDSP6_DEM_SLAVE_DATA,
219         SMEM_CLKREGIM_BSP,
220         SMEM_CLKREGIM_SOURCES,
221         SMEM_SMD_FIFO_BASE_ID,
222         SMEM_USABLE_RAM_PARTITION_TABLE = SMEM_SMD_FIFO_BASE_ID + SMEM_NUM_SMD_CHANNELS,
223         SMEM_POWER_ON_STATUS_INFO,
224         SMEM_DAL_AREA,
225         SMEM_SMEM_LOG_POWER_IDX,
226         SMEM_SMEM_LOG_POWER_WRAP,
227         SMEM_SMEM_LOG_POWER_EVENTS,
228         SMEM_ERR_CRASH_LOG,
229         SMEM_ERR_F3_TRACE_LOG,
230         SMEM_NUM_ITEMS,
231 } smem_mem_type;
232
233
234 #define SMD_SS_CLOSED           0x00000000
235 #define SMD_SS_OPENING          0x00000001
236 #define SMD_SS_OPENED           0x00000002
237 #define SMD_SS_FLUSHING         0x00000003
238 #define SMD_SS_CLOSING          0x00000004
239 #define SMD_SS_RESET            0x00000005
240 #define SMD_SS_RESET_OPENING    0x00000006
241
242 #define SMD_BUF_SIZE            8192
243 #define SMD_CHANNELS            64
244
245 #define SMD_HEADER_SIZE         20
246
247 struct smd_alloc_elm {
248         char name[20];
249         uint32_t cid;
250         uint32_t ctype;
251         uint32_t ref_count;
252 };
253
254 struct smd_half_channel {
255         unsigned state;
256         unsigned char fDSR;
257         unsigned char fCTS;
258         unsigned char fCD;
259         unsigned char fRI;
260         unsigned char fHEAD;
261         unsigned char fTAIL;
262         unsigned char fSTATE;
263         unsigned char fUNUSED;
264         unsigned tail;
265         unsigned head;
266 } __attribute__(( aligned(4), packed ));
267
268 /* Only used on SMD package v3 on msm7201a */
269 struct smd_shared_v1 {
270         struct smd_half_channel ch0;
271         unsigned char data0[SMD_BUF_SIZE];
272         struct smd_half_channel ch1;
273         unsigned char data1[SMD_BUF_SIZE];
274 };
275
276 /* Used on SMD package v4 */
277 struct smd_shared_v2 {
278         struct smd_half_channel ch0;
279         struct smd_half_channel ch1;
280 };
281
282 struct smd_channel {
283         volatile struct smd_half_channel *send;
284         volatile struct smd_half_channel *recv;
285         unsigned char *send_data;
286         unsigned char *recv_data;
287
288         unsigned fifo_mask;
289         unsigned fifo_size;
290         unsigned current_packet;
291         unsigned n;
292
293         struct list_head ch_list;
294
295         void *priv;
296         void (*notify)(void *priv, unsigned flags);
297
298         int (*read)(struct smd_channel *ch, void *data, int len);
299         int (*write)(struct smd_channel *ch, const void *data, int len);
300         int (*read_avail)(struct smd_channel *ch);
301         int (*write_avail)(struct smd_channel *ch);
302
303         void (*update_state)(struct smd_channel *ch);
304         unsigned last_state;
305         void (*notify_other_cpu)(void);
306         unsigned type;
307
308         char name[32];
309         struct platform_device pdev;
310 };
311
312 #define SMD_TYPE_MASK           0x0FF
313 #define SMD_TYPE_APPS_MODEM     0x000
314 #define SMD_TYPE_APPS_DSP       0x001
315 #define SMD_TYPE_MODEM_DSP      0x002
316
317 #define SMD_KIND_MASK           0xF00
318 #define SMD_KIND_UNKNOWN        0x000
319 #define SMD_KIND_STREAM         0x100
320 #define SMD_KIND_PACKET         0x200
321
322 extern struct list_head smd_ch_closed_list;
323 extern struct list_head smd_ch_list_modem;
324 extern struct list_head smd_ch_list_dsp;
325
326 extern spinlock_t smd_lock;
327 extern spinlock_t smem_lock;
328
329 void *smem_find(unsigned id, unsigned size);
330 void *smem_item(unsigned id, unsigned *size);
331 uint32_t raw_smsm_get_state(enum smsm_state_item item);
332
333 extern void msm_init_last_radio_log(struct module *);
334
335 #ifdef CONFIG_MSM_SMD_PKG3
336 /*
337  * This allocator assumes an SMD Package v3 which only exists on
338  * MSM7x00 SoC's.
339  */
340 static inline int _smd_alloc_channel(struct smd_channel *ch)
341 {
342         struct smd_shared_v1 *shared1;
343
344         shared1 = smem_alloc(ID_SMD_CHANNELS + ch->n, sizeof(*shared1));
345         if (!shared1) {
346                 pr_err("smd_alloc_channel() cid %d does not exist\n", ch->n);
347                 return -1;
348         }
349         ch->send = &shared1->ch0;
350         ch->recv = &shared1->ch1;
351         ch->send_data = shared1->data0;
352         ch->recv_data = shared1->data1;
353         ch->fifo_size = SMD_BUF_SIZE;
354         return 0;
355 }
356 #else
357 /*
358  * This allocator assumes an SMD Package v4, the most common
359  * and the default.
360  */
361 static inline int _smd_alloc_channel(struct smd_channel *ch)
362 {
363         struct smd_shared_v2 *shared2;
364         void *buffer;
365         unsigned buffer_sz;
366
367         shared2 = smem_alloc(SMEM_SMD_BASE_ID + ch->n, sizeof(*shared2));
368         buffer = smem_item(SMEM_SMD_FIFO_BASE_ID + ch->n, &buffer_sz);
369
370         if (!buffer)
371                 return -1;
372
373         /* buffer must be a power-of-two size */
374         if (buffer_sz & (buffer_sz - 1))
375                 return -1;
376
377         buffer_sz /= 2;
378         ch->send = &shared2->ch0;
379         ch->recv = &shared2->ch1;
380         ch->send_data = buffer;
381         ch->recv_data = buffer + buffer_sz;
382         ch->fifo_size = buffer_sz;
383         return 0;
384 }
385 #endif /* CONFIG_MSM_SMD_PKG3 */
386
387 #endif