5 * National Semiconductor LM90
7 Addresses scanned: I2C 0x4c
8 Datasheet: Publicly available at the National Semiconductor website
9 http://www.national.com/pf/LM/LM90.html
10 * National Semiconductor LM89
11 Prefix: 'lm89' (no auto-detection)
12 Addresses scanned: I2C 0x4c and 0x4d
13 Datasheet: Publicly available at the National Semiconductor website
14 http://www.national.com/mpf/LM/LM89.html
15 * National Semiconductor LM99
17 Addresses scanned: I2C 0x4c and 0x4d
18 Datasheet: Publicly available at the National Semiconductor website
19 http://www.national.com/pf/LM/LM99.html
20 * National Semiconductor LM86
22 Addresses scanned: I2C 0x4c
23 Datasheet: Publicly available at the National Semiconductor website
24 http://www.national.com/mpf/LM/LM86.html
25 * Analog Devices ADM1032
27 Addresses scanned: I2C 0x4c and 0x4d
28 Datasheet: Publicly available at the ON Semiconductor website
29 http://www.onsemi.com/PowerSolutions/product.do?id=ADM1032
30 * Analog Devices ADT7461
32 Addresses scanned: I2C 0x4c and 0x4d
33 Datasheet: Publicly available at the ON Semiconductor website
34 http://www.onsemi.com/PowerSolutions/product.do?id=ADT7461
37 Addresses scanned: I2C 0x4d
38 Datasheet: Publicly available at the Maxim website
39 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497
42 Addresses scanned: I2C 0x4e
43 Datasheet: Publicly available at the Maxim website
44 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497
47 Addresses scanned: I2C 0x4c
48 Datasheet: Publicly available at the Maxim website
49 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3500
52 Addresses scanned: I2C 0x4c
53 Datasheet: Publicly available at the Maxim website
54 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497
57 Addresses scanned: I2C 0x4c
58 Datasheet: Publicly available at the Maxim website
59 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
62 Addresses scanned: I2C 0x4c
63 Datasheet: Publicly available at the Maxim website
64 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
67 Addresses scanned: I2C 0x4c, 0x4d, 0x4e
68 Datasheet: Publicly available at the Maxim website
69 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
72 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
74 Datasheet: Publicly available at the Maxim website
75 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370
78 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
80 Datasheet: Publicly available at the Maxim website
81 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370
84 Addresses scanned: I2C 0x4c
85 Datasheet: Publicly available at the Maxim website
86 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3500
89 Addresses scanned: I2C 0x18
90 Datasheet: Publicly available at the Maxim website
91 http://www.maxim-ic.com/datasheet/index.mvp/id/4199
94 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
96 Datasheet: Publicly available at the Maxim website
97 http://www.maxim-ic.com/datasheet/index.mvp/id/4199
98 * Winbond/Nuvoton W83L771AWG/ASG
100 Addresses scanned: I2C 0x4c
101 Datasheet: Not publicly available, can be requested from Nuvoton
104 Author: Jean Delvare <khali@linux-fr.org>
110 The LM90 is a digital temperature sensor. It senses its own temperature as
111 well as the temperature of up to one external diode. It is compatible
112 with many other devices, many of which are supported by this driver.
114 Note that there is no easy way to differentiate between the MAX6657,
115 MAX6658 and MAX6659 variants. The extra features of the MAX6659 are only
116 supported by this driver if the chip is located at address 0x4d or 0x4e,
117 or if the chip type is explicitly selected as max6659.
118 The MAX6680 and MAX6681 only differ in their pinout, therefore they obviously
119 can't (and don't need to) be distinguished.
121 The specificity of this family of chipsets over the ADM1021/LM84
122 family is that it features critical limits with hysteresis, and an
123 increased resolution of the remote temperature measurement.
125 The different chipsets of the family are not strictly identical, although
126 very similar. For reference, here comes a non-exhaustive list of specific
130 * Filter and alert configuration register at 0xBF.
131 * ALERT is triggered by temperatures over critical limits.
135 * Better external channel accuracy
139 * External temperature shifted by 16 degrees down
142 * Consecutive alert register at 0x22.
143 * Conversion averaging.
144 * Up to 64 conversions/s.
145 * ALERT is triggered by open remote sensor.
146 * SMBus PEC support for Write Byte and Receive Byte transactions.
149 * Extended temperature range (breaks compatibility)
150 * Lower resolution for remote temperature
153 * Better local resolution
154 * Remote sensor type selection
157 * Better local resolution
159 * Second critical temperature limit
160 * Remote sensor type selection
164 * Remote sensor type selection
167 * Better local resolution
168 * Selectable address (max6696)
169 * Second critical temperature limit
173 * The AWG and ASG variants only differ in package format.
174 * Filter and alert configuration register at 0xBF
175 * Diode ideality factor configuration (remote sensor) at 0xE3
176 * Moving average (depending on conversion rate)
178 All temperature values are given in degrees Celsius. Resolution
179 is 1.0 degree for the local temperature, 0.125 degree for the remote
180 temperature, except for the MAX6657, MAX6658 and MAX6659 which have a
181 resolution of 0.125 degree for both temperatures.
183 Each sensor has its own high and low limits, plus a critical limit.
184 Additionally, there is a relative hysteresis value common to both critical
185 values. To make life easier to user-space applications, two absolute values
186 are exported, one for each channel, but these values are of course linked.
187 Only the local hysteresis can be set from user-space, and the same delta
188 applies to the remote hysteresis.
190 The lm90 driver will not update its values more frequently than every
191 other second; reading them more often will do no harm, but will return
197 This driver has basic support for SMBus alert. When an alert is received,
198 the status register is read and the faulty temperature channel is logged.
200 The Analog Devices chips (ADM1032 and ADT7461) do not implement the SMBus
201 alert protocol properly so additional care is needed: the ALERT output is
202 disabled when an alert is received, and is re-enabled only when the alarm
203 is gone. Otherwise the chip would block alerts from other chips in the bus
204 as long as the alarm is active.
209 The ADM1032 is the only chip of the family which supports PEC. It does
210 not support PEC on all transactions though, so some care must be taken.
212 When reading a register value, the PEC byte is computed and sent by the
213 ADM1032 chip. However, in the case of a combined transaction (SMBus Read
214 Byte), the ADM1032 computes the CRC value over only the second half of
215 the message rather than its entirety, because it thinks the first half
216 of the message belongs to a different transaction. As a result, the CRC
217 value differs from what the SMBus master expects, and all reads fail.
219 For this reason, the lm90 driver will enable PEC for the ADM1032 only if
220 the bus supports the SMBus Send Byte and Receive Byte transaction types.
221 These transactions will be used to read register values, instead of
222 SMBus Read Byte, and PEC will work properly.
224 Additionally, the ADM1032 doesn't support SMBus Send Byte with PEC.
225 Instead, it will try to write the PEC value to the register (because the
226 SMBus Send Byte transaction with PEC is similar to a Write Byte transaction
227 without PEC), which is not what we want. Thus, PEC is explicitly disabled
228 on SMBus Send Byte transactions in the lm90 driver.
230 PEC on byte data transactions represents a significant increase in bandwidth
231 usage (+33% for writes, +25% for reads) in normal conditions. With the need
232 to use two SMBus transaction for reads, this overhead jumps to +50%. Worse,
233 two transactions will typically mean twice as much delay waiting for
234 transaction completion, effectively doubling the register cache refresh time.
235 I guess reliability comes at a price, but it's quite expensive this time.
237 So, as not everyone might enjoy the slowdown, PEC can be disabled through
238 sysfs. Just write 0 to the "pec" file and PEC will be disabled. Write 1
239 to that file to enable PEC again.