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ASoC: Remove version display from WM8750
[net-next-2.6.git] / sound / soc / codecs / wm8750.c
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abadfc92
RP		 1/*
2 * wm8750.c -- WM8750 ALSA SoC audio driver
3 *
4 * Copyright 2005 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <richard@openedhand.com>
7 *
8 * Based on WM8753.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/module.h>
16#include <linux/moduleparam.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19#include <linux/pm.h>
20#include <linux/i2c.h>
21#include <linux/platform_device.h>
2f3dfaf5 22#include <linux/spi/spi.h>
abadfc92
RP		 23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/initval.h>
29
30#include "wm8750.h"
31
4422b606
LG		 32/* codec private data */
33struct wm8750_priv {
34 unsigned int sysclk;
35};
36
abadfc92
RP		 37/*
38 * wm8750 register cache
39 * We can't read the WM8750 register space when we
40 * are using 2 wire for device control, so we cache them instead.
41 */
42static const u16 wm8750_reg[] = {
43 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
44 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
45 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
46 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
47 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
48 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
49 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
50 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
51 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
52 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
53 0x0079, 0x0079, 0x0079, /* 40 */
54};
55
17a52fd6 56#define wm8750_reset(c) snd_soc_write(c, WM8750_RESET, 0)
abadfc92
RP		 57
58/*
59 * WM8750 Controls
60 */
61static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
62static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
63static const char *wm8750_treble[] = {"8kHz", "4kHz"};
64static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
65static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
66static const char *wm8750_3d_func[] = {"Capture", "Playback"};
67static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
68static const char *wm8750_ng_type[] = {"Constant PGA Gain",
69 "Mute ADC Output"};
70static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
71 "Differential"};
72static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
73 "Differential"};
74static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
75 "ROUT1"};
76static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
77static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
78 "L + R Invert"};
79static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
80static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
81 "Mono (Right)", "Digital Mono"};
82
83static const struct soc_enum wm8750_enum[] = {
84SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
85SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
86SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
87SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
88SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
89SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
90SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
91SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
92SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
93SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
94SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
95SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
96SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
97SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
98SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
99SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
100SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
101
102};
103
104static const struct snd_kcontrol_new wm8750_snd_controls[] = {
105
106SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
107SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
108SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
109
bd903b6e 110SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
abadfc92 111 WM8750_ROUT1V, 7, 1, 0),
bd903b6e 112SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
abadfc92
RP		 113 WM8750_ROUT2V, 7, 1, 0),
114
115SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
116
117SOC_ENUM("Capture Polarity", wm8750_enum[14]),
118SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
119SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
120
121SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
122
123SOC_ENUM("Bass Boost", wm8750_enum[0]),
124SOC_ENUM("Bass Filter", wm8750_enum[1]),
125SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
126
6a7b8cf4 127SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1),
abadfc92
RP		 128SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
129
130SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
131SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
132SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
133SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
134SOC_ENUM("3D Mode", wm8750_enum[5]),
135
136SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
137SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
138SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
139SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
140SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
141SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
142SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
143SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
144SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
145SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
146
147SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
148SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
149
150SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
151SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
152
bd903b6e 153SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
abadfc92
RP		 154
155/* Unimplemented */
156/* ADCDAC Bit 0 - ADCHPD */
157/* ADCDAC Bit 4 - HPOR */
158/* ADCTL1 Bit 2,3 - DATSEL */
159/* ADCTL1 Bit 4,5 - DMONOMIX */
160/* ADCTL1 Bit 6,7 - VSEL */
161/* ADCTL2 Bit 2 - LRCM */
162/* ADCTL2 Bit 3 - TRI */
163/* ADCTL3 Bit 5 - HPFLREN */
164/* ADCTL3 Bit 6 - VROI */
165/* ADCTL3 Bit 7,8 - ADCLRM */
166/* ADCIN Bit 4 - LDCM */
167/* ADCIN Bit 5 - RDCM */
168
169SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
170
171SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
172 WM8750_LOUTM2, 4, 7, 1),
173SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
174 WM8750_ROUTM2, 4, 7, 1),
175SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
176 WM8750_MOUTM2, 4, 7, 1),
177
178SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
179
bd903b6e
LG		 180SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
181 0, 127, 0),
182SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
183 0, 127, 0),
abadfc92
RP		 184
185SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
186
187};
188
abadfc92
RP		 189/*
190 * DAPM Controls
191 */
192
193/* Left Mixer */
194static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
195SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
196SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
197SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
198SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
199};
200
201/* Right Mixer */
202static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
203SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
204SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
205SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
206SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
207};
208
209/* Mono Mixer */
210static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
211SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
212SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
213SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
214SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
215};
216
217/* Left Line Mux */
218static const struct snd_kcontrol_new wm8750_left_line_controls =
219SOC_DAPM_ENUM("Route", wm8750_enum[8]);
220
221/* Right Line Mux */
222static const struct snd_kcontrol_new wm8750_right_line_controls =
223SOC_DAPM_ENUM("Route", wm8750_enum[9]);
224
225/* Left PGA Mux */
226static const struct snd_kcontrol_new wm8750_left_pga_controls =
227SOC_DAPM_ENUM("Route", wm8750_enum[10]);
228
229/* Right PGA Mux */
230static const struct snd_kcontrol_new wm8750_right_pga_controls =
231SOC_DAPM_ENUM("Route", wm8750_enum[11]);
232
233/* Out 3 Mux */
234static const struct snd_kcontrol_new wm8750_out3_controls =
235SOC_DAPM_ENUM("Route", wm8750_enum[12]);
236
237/* Differential Mux */
238static const struct snd_kcontrol_new wm8750_diffmux_controls =
239SOC_DAPM_ENUM("Route", wm8750_enum[13]);
240
241/* Mono ADC Mux */
242static const struct snd_kcontrol_new wm8750_monomux_controls =
243SOC_DAPM_ENUM("Route", wm8750_enum[16]);
244
245static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
246 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
247 &wm8750_left_mixer_controls[0],
248 ARRAY_SIZE(wm8750_left_mixer_controls)),
249 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
250 &wm8750_right_mixer_controls[0],
251 ARRAY_SIZE(wm8750_right_mixer_controls)),
252 SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
253 &wm8750_mono_mixer_controls[0],
254 ARRAY_SIZE(wm8750_mono_mixer_controls)),
255
256 SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
257 SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
258 SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
259 SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
260 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
261 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
262
263 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
264 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
265 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
266
267 SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
268 &wm8750_left_pga_controls),
269 SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
270 &wm8750_right_pga_controls),
271 SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
272 &wm8750_left_line_controls),
273 SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
274 &wm8750_right_line_controls),
275
276 SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
277 SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
278 SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
279
280 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
281 &wm8750_diffmux_controls),
282 SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
283 &wm8750_monomux_controls),
284 SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
285 &wm8750_monomux_controls),
286
287 SND_SOC_DAPM_OUTPUT("LOUT1"),
288 SND_SOC_DAPM_OUTPUT("ROUT1"),
289 SND_SOC_DAPM_OUTPUT("LOUT2"),
290 SND_SOC_DAPM_OUTPUT("ROUT2"),
23ba79bd 291 SND_SOC_DAPM_OUTPUT("MONO1"),
abadfc92 292 SND_SOC_DAPM_OUTPUT("OUT3"),
04489eeb 293 SND_SOC_DAPM_OUTPUT("VREF"),
abadfc92
RP		 294
295 SND_SOC_DAPM_INPUT("LINPUT1"),
296 SND_SOC_DAPM_INPUT("LINPUT2"),
297 SND_SOC_DAPM_INPUT("LINPUT3"),
298 SND_SOC_DAPM_INPUT("RINPUT1"),
299 SND_SOC_DAPM_INPUT("RINPUT2"),
300 SND_SOC_DAPM_INPUT("RINPUT3"),
301};
302
a65f0568 303static const struct snd_soc_dapm_route audio_map[] = {
abadfc92
RP		 304 /* left mixer */
305 {"Left Mixer", "Playback Switch", "Left DAC"},
306 {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
307 {"Left Mixer", "Right Playback Switch", "Right DAC"},
308 {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
309
310 /* right mixer */
311 {"Right Mixer", "Left Playback Switch", "Left DAC"},
312 {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
313 {"Right Mixer", "Playback Switch", "Right DAC"},
314 {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
315
316 /* left out 1 */
317 {"Left Out 1", NULL, "Left Mixer"},
318 {"LOUT1", NULL, "Left Out 1"},
319
320 /* left out 2 */
321 {"Left Out 2", NULL, "Left Mixer"},
322 {"LOUT2", NULL, "Left Out 2"},
323
324 /* right out 1 */
325 {"Right Out 1", NULL, "Right Mixer"},
326 {"ROUT1", NULL, "Right Out 1"},
327
328 /* right out 2 */
329 {"Right Out 2", NULL, "Right Mixer"},
330 {"ROUT2", NULL, "Right Out 2"},
331
332 /* mono mixer */
333 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
334 {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
335 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
336 {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
337
338 /* mono out */
339 {"Mono Out 1", NULL, "Mono Mixer"},
340 {"MONO1", NULL, "Mono Out 1"},
341
342 /* out 3 */
343 {"Out3 Mux", "VREF", "VREF"},
344 {"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
345 {"Out3 Mux", "ROUT1", "Right Mixer"},
346 {"Out3 Mux", "MonoOut", "MONO1"},
347 {"Out 3", NULL, "Out3 Mux"},
348 {"OUT3", NULL, "Out 3"},
349
350 /* Left Line Mux */
351 {"Left Line Mux", "Line 1", "LINPUT1"},
352 {"Left Line Mux", "Line 2", "LINPUT2"},
353 {"Left Line Mux", "Line 3", "LINPUT3"},
354 {"Left Line Mux", "PGA", "Left PGA Mux"},
355 {"Left Line Mux", "Differential", "Differential Mux"},
356
357 /* Right Line Mux */
358 {"Right Line Mux", "Line 1", "RINPUT1"},
359 {"Right Line Mux", "Line 2", "RINPUT2"},
360 {"Right Line Mux", "Line 3", "RINPUT3"},
361 {"Right Line Mux", "PGA", "Right PGA Mux"},
362 {"Right Line Mux", "Differential", "Differential Mux"},
363
364 /* Left PGA Mux */
365 {"Left PGA Mux", "Line 1", "LINPUT1"},
366 {"Left PGA Mux", "Line 2", "LINPUT2"},
367 {"Left PGA Mux", "Line 3", "LINPUT3"},
368 {"Left PGA Mux", "Differential", "Differential Mux"},
369
370 /* Right PGA Mux */
371 {"Right PGA Mux", "Line 1", "RINPUT1"},
372 {"Right PGA Mux", "Line 2", "RINPUT2"},
373 {"Right PGA Mux", "Line 3", "RINPUT3"},
374 {"Right PGA Mux", "Differential", "Differential Mux"},
375
376 /* Differential Mux */
377 {"Differential Mux", "Line 1", "LINPUT1"},
378 {"Differential Mux", "Line 1", "RINPUT1"},
379 {"Differential Mux", "Line 2", "LINPUT2"},
380 {"Differential Mux", "Line 2", "RINPUT2"},
381
382 /* Left ADC Mux */
383 {"Left ADC Mux", "Stereo", "Left PGA Mux"},
384 {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
385 {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
386
387 /* Right ADC Mux */
388 {"Right ADC Mux", "Stereo", "Right PGA Mux"},
389 {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
390 {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
391
392 /* ADC */
393 {"Left ADC", NULL, "Left ADC Mux"},
394 {"Right ADC", NULL, "Right ADC Mux"},
abadfc92
RP		 395};
396
397static int wm8750_add_widgets(struct snd_soc_codec *codec)
398{
a65f0568
MB		 399 snd_soc_dapm_new_controls(codec, wm8750_dapm_widgets,
400 ARRAY_SIZE(wm8750_dapm_widgets));
abadfc92 401
a65f0568 402 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
abadfc92 403
abadfc92
RP		 404 return 0;
405}
406
407struct _coeff_div {
408 u32 mclk;
409 u32 rate;
410 u16 fs;
411 u8 sr:5;
412 u8 usb:1;
413};
414
415/* codec hifi mclk clock divider coefficients */
416static const struct _coeff_div coeff_div[] = {
417 /* 8k */
418 {12288000, 8000, 1536, 0x6, 0x0},
419 {11289600, 8000, 1408, 0x16, 0x0},
420 {18432000, 8000, 2304, 0x7, 0x0},
421 {16934400, 8000, 2112, 0x17, 0x0},
422 {12000000, 8000, 1500, 0x6, 0x1},
423
424 /* 11.025k */
425 {11289600, 11025, 1024, 0x18, 0x0},
426 {16934400, 11025, 1536, 0x19, 0x0},
427 {12000000, 11025, 1088, 0x19, 0x1},
428
429 /* 16k */
430 {12288000, 16000, 768, 0xa, 0x0},
431 {18432000, 16000, 1152, 0xb, 0x0},
432 {12000000, 16000, 750, 0xa, 0x1},
433
434 /* 22.05k */
435 {11289600, 22050, 512, 0x1a, 0x0},
436 {16934400, 22050, 768, 0x1b, 0x0},
437 {12000000, 22050, 544, 0x1b, 0x1},
438
439 /* 32k */
440 {12288000, 32000, 384, 0xc, 0x0},
441 {18432000, 32000, 576, 0xd, 0x0},
442 {12000000, 32000, 375, 0xa, 0x1},
443
444 /* 44.1k */
445 {11289600, 44100, 256, 0x10, 0x0},
446 {16934400, 44100, 384, 0x11, 0x0},
447 {12000000, 44100, 272, 0x11, 0x1},
448
449 /* 48k */
450 {12288000, 48000, 256, 0x0, 0x0},
451 {18432000, 48000, 384, 0x1, 0x0},
452 {12000000, 48000, 250, 0x0, 0x1},
453
454 /* 88.2k */
455 {11289600, 88200, 128, 0x1e, 0x0},
456 {16934400, 88200, 192, 0x1f, 0x0},
457 {12000000, 88200, 136, 0x1f, 0x1},
458
459 /* 96k */
460 {12288000, 96000, 128, 0xe, 0x0},
461 {18432000, 96000, 192, 0xf, 0x0},
462 {12000000, 96000, 125, 0xe, 0x1},
463};
464
465static inline int get_coeff(int mclk, int rate)
466{
467 int i;
468
469 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
470 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
471 return i;
472 }
a71a468a
LG		 473
474 printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
475 mclk, rate);
abadfc92
RP		 476 return -EINVAL;
477}
478
e550e17f 479static int wm8750_set_dai_sysclk(struct snd_soc_dai *codec_dai,
4422b606 480 int clk_id, unsigned int freq, int dir)
abadfc92 481{
4422b606
LG		 482 struct snd_soc_codec *codec = codec_dai->codec;
483 struct wm8750_priv *wm8750 = codec->private_data;
484
485 switch (freq) {
486 case 11289600:
487 case 12000000:
488 case 12288000:
489 case 16934400:
490 case 18432000:
491 wm8750->sysclk = freq;
492 return 0;
493 }
494 return -EINVAL;
abadfc92
RP		 495}
496
e550e17f 497static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai,
4422b606 498 unsigned int fmt)
abadfc92 499{
4422b606
LG		 500 struct snd_soc_codec *codec = codec_dai->codec;
501 u16 iface = 0;
abadfc92
RP		 502
503 /* set master/slave audio interface */
4422b606 504 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
abadfc92
RP		 505 case SND_SOC_DAIFMT_CBM_CFM:
506 iface = 0x0040;
507 break;
508 case SND_SOC_DAIFMT_CBS_CFS:
509 break;
4422b606
LG		 510 default:
511 return -EINVAL;
abadfc92
RP		 512 }
513
514 /* interface format */
4422b606 515 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
abadfc92
RP		 516 case SND_SOC_DAIFMT_I2S:
517 iface |= 0x0002;
518 break;
519 case SND_SOC_DAIFMT_RIGHT_J:
520 break;
521 case SND_SOC_DAIFMT_LEFT_J:
522 iface |= 0x0001;
523 break;
524 case SND_SOC_DAIFMT_DSP_A:
525 iface |= 0x0003;
526 break;
527 case SND_SOC_DAIFMT_DSP_B:
528 iface |= 0x0013;
529 break;
4422b606
LG		 530 default:
531 return -EINVAL;
abadfc92
RP		 532 }
533
534 /* clock inversion */
4422b606 535 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
abadfc92
RP		 536 case SND_SOC_DAIFMT_NB_NF:
537 break;
538 case SND_SOC_DAIFMT_IB_IF:
539 iface |= 0x0090;
540 break;
541 case SND_SOC_DAIFMT_IB_NF:
542 iface |= 0x0080;
543 break;
544 case SND_SOC_DAIFMT_NB_IF:
545 iface |= 0x0010;
546 break;
4422b606
LG		 547 default:
548 return -EINVAL;
abadfc92
RP		 549 }
550
17a52fd6 551 snd_soc_write(codec, WM8750_IFACE, iface);
4422b606
LG		 552 return 0;
553}
554
555static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream,
dee89c4d
MB		 556 struct snd_pcm_hw_params *params,
557 struct snd_soc_dai *dai)
4422b606
LG		 558{
559 struct snd_soc_pcm_runtime *rtd = substream->private_data;
560 struct snd_soc_device *socdev = rtd->socdev;
6627a653 561 struct snd_soc_codec *codec = socdev->card->codec;
4422b606 562 struct wm8750_priv *wm8750 = codec->private_data;
17a52fd6
MB		 563 u16 iface = snd_soc_read(codec, WM8750_IFACE) & 0x1f3;
564 u16 srate = snd_soc_read(codec, WM8750_SRATE) & 0x1c0;
4422b606
LG		 565 int coeff = get_coeff(wm8750->sysclk, params_rate(params));
566
567 /* bit size */
568 switch (params_format(params)) {
569 case SNDRV_PCM_FORMAT_S16_LE:
abadfc92 570 break;
4422b606
LG		 571 case SNDRV_PCM_FORMAT_S20_3LE:
572 iface |= 0x0004;
abadfc92 573 break;
4422b606
LG		 574 case SNDRV_PCM_FORMAT_S24_LE:
575 iface |= 0x0008;
abadfc92 576 break;
4422b606
LG		 577 case SNDRV_PCM_FORMAT_S32_LE:
578 iface |= 0x000c;
abadfc92
RP		 579 break;
580 }
581
582 /* set iface & srate */
17a52fd6 583 snd_soc_write(codec, WM8750_IFACE, iface);
4422b606 584 if (coeff >= 0)
17a52fd6 585 snd_soc_write(codec, WM8750_SRATE, srate |
4422b606 586 (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
abadfc92
RP		 587
588 return 0;
589}
590
e550e17f 591static int wm8750_mute(struct snd_soc_dai *dai, int mute)
abadfc92 592{
4422b606 593 struct snd_soc_codec *codec = dai->codec;
17a52fd6 594 u16 mute_reg = snd_soc_read(codec, WM8750_ADCDAC) & 0xfff7;
4422b606 595
abadfc92 596 if (mute)
17a52fd6 597 snd_soc_write(codec, WM8750_ADCDAC, mute_reg | 0x8);
abadfc92 598 else
17a52fd6 599 snd_soc_write(codec, WM8750_ADCDAC, mute_reg);
abadfc92
RP		 600 return 0;
601}
602
0be9898a
MB		 603static int wm8750_set_bias_level(struct snd_soc_codec *codec,
604 enum snd_soc_bias_level level)
abadfc92 605{
17a52fd6 606 u16 pwr_reg = snd_soc_read(codec, WM8750_PWR1) & 0xfe3e;
abadfc92 607
0be9898a
MB		 608 switch (level) {
609 case SND_SOC_BIAS_ON:
abadfc92 610 /* set vmid to 50k and unmute dac */
17a52fd6 611 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x00c0);
abadfc92 612 break;
0be9898a 613 case SND_SOC_BIAS_PREPARE:
abadfc92 614 /* set vmid to 5k for quick power up */
17a52fd6 615 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x01c1);
abadfc92 616 break;
0be9898a 617 case SND_SOC_BIAS_STANDBY:
abadfc92 618 /* mute dac and set vmid to 500k, enable VREF */
17a52fd6 619 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x0141);
abadfc92 620 break;
0be9898a 621 case SND_SOC_BIAS_OFF:
17a52fd6 622 snd_soc_write(codec, WM8750_PWR1, 0x0001);
abadfc92
RP		 623 break;
624 }
0be9898a 625 codec->bias_level = level;
abadfc92
RP		 626 return 0;
627}
628
4422b606 629#define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
42f3030f
MB		 630 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
631 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
4422b606
LG		 632
633#define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
634 SNDRV_PCM_FMTBIT_S24_LE)
635
6335d055
EM		 636static struct snd_soc_dai_ops wm8750_dai_ops = {
637 .hw_params = wm8750_pcm_hw_params,
638 .digital_mute = wm8750_mute,
639 .set_fmt = wm8750_set_dai_fmt,
640 .set_sysclk = wm8750_set_dai_sysclk,
641};
642
e550e17f 643struct snd_soc_dai wm8750_dai = {
abadfc92
RP		 644 .name = "WM8750",
645 .playback = {
646 .stream_name = "Playback",
647 .channels_min = 1,
648 .channels_max = 2,
4422b606
LG		 649 .rates = WM8750_RATES,
650 .formats = WM8750_FORMATS,},
abadfc92
RP		 651 .capture = {
652 .stream_name = "Capture",
653 .channels_min = 1,
654 .channels_max = 2,
4422b606
LG		 655 .rates = WM8750_RATES,
656 .formats = WM8750_FORMATS,},
6335d055 657 .ops = &wm8750_dai_ops,
abadfc92
RP		 658};
659EXPORT_SYMBOL_GPL(wm8750_dai);
660
1321b160 661static void wm8750_work(struct work_struct *work)
abadfc92 662{
1321b160
TI		 663 struct snd_soc_codec *codec =
664 container_of(work, struct snd_soc_codec, delayed_work.work);
0be9898a 665 wm8750_set_bias_level(codec, codec->bias_level);
abadfc92
RP		 666}
667
668static int wm8750_suspend(struct platform_device *pdev, pm_message_t state)
669{
670 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 671 struct snd_soc_codec *codec = socdev->card->codec;
abadfc92 672
0be9898a 673 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
abadfc92
RP		 674 return 0;
675}
676
677static int wm8750_resume(struct platform_device *pdev)
678{
679 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 680 struct snd_soc_codec *codec = socdev->card->codec;
abadfc92
RP		 681 int i;
682 u8 data[2];
683 u16 *cache = codec->reg_cache;
684
685 /* Sync reg_cache with the hardware */
686 for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) {
687 if (i == WM8750_RESET)
688 continue;
689 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
690 data[1] = cache[i] & 0x00ff;
691 codec->hw_write(codec->control_data, data, 2);
692 }
693
0be9898a 694 wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
abadfc92
RP		 695
696 /* charge wm8750 caps */
0be9898a
MB		 697 if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {
698 wm8750_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
699 codec->bias_level = SND_SOC_BIAS_ON;
42f3030f
MB		 700 schedule_delayed_work(&codec->delayed_work,
701 msecs_to_jiffies(1000));
abadfc92
RP		 702 }
703
704 return 0;
705}
706
707/*
708 * initialise the WM8750 driver
709 * register the mixer and dsp interfaces with the kernel
710 */
7084a42b
MB		 711static int wm8750_init(struct snd_soc_device *socdev,
712 enum snd_soc_control_type control)
abadfc92 713{
6627a653 714 struct snd_soc_codec *codec = socdev->card->codec;
abadfc92
RP		 715 int reg, ret = 0;
716
717 codec->name = "WM8750";
718 codec->owner = THIS_MODULE;
0be9898a 719 codec->set_bias_level = wm8750_set_bias_level;
abadfc92
RP		 720 codec->dai = &wm8750_dai;
721 codec->num_dai = 1;
d751b233 722 codec->reg_cache_size = ARRAY_SIZE(wm8750_reg);
713fb939 723 codec->reg_cache = kmemdup(wm8750_reg, sizeof(wm8750_reg), GFP_KERNEL);
abadfc92
RP		 724 if (codec->reg_cache == NULL)
725 return -ENOMEM;
abadfc92 726
7084a42b 727 ret = snd_soc_codec_set_cache_io(codec, 7, 9, control);
17a52fd6
MB		 728 if (ret < 0) {
729 printk(KERN_ERR "wm8750: failed to set cache I/O: %d\n", ret);
730 goto err;
731 }
732
733 ret = wm8750_reset(codec);
734 if (ret < 0) {
735 printk(KERN_ERR "wm8750: failed to reset: %d\n", ret);
736 goto err;
737 }
abadfc92
RP		 738
739 /* register pcms */
740 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
741 if (ret < 0) {
e35115a5 742 printk(KERN_ERR "wm8750: failed to create pcms\n");
17a52fd6 743 goto err;
abadfc92
RP		 744 }
745
746 /* charge output caps */
0be9898a
MB		 747 wm8750_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
748 codec->bias_level = SND_SOC_BIAS_STANDBY;
1321b160 749 schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));
abadfc92
RP		 750
751 /* set the update bits */
17a52fd6
MB		 752 reg = snd_soc_read(codec, WM8750_LDAC);
753 snd_soc_write(codec, WM8750_LDAC, reg | 0x0100);
754 reg = snd_soc_read(codec, WM8750_RDAC);
755 snd_soc_write(codec, WM8750_RDAC, reg | 0x0100);
756 reg = snd_soc_read(codec, WM8750_LOUT1V);
757 snd_soc_write(codec, WM8750_LOUT1V, reg | 0x0100);
758 reg = snd_soc_read(codec, WM8750_ROUT1V);
759 snd_soc_write(codec, WM8750_ROUT1V, reg | 0x0100);
760 reg = snd_soc_read(codec, WM8750_LOUT2V);
761 snd_soc_write(codec, WM8750_LOUT2V, reg | 0x0100);
762 reg = snd_soc_read(codec, WM8750_ROUT2V);
763 snd_soc_write(codec, WM8750_ROUT2V, reg | 0x0100);
764 reg = snd_soc_read(codec, WM8750_LINVOL);
765 snd_soc_write(codec, WM8750_LINVOL, reg | 0x0100);
766 reg = snd_soc_read(codec, WM8750_RINVOL);
767 snd_soc_write(codec, WM8750_RINVOL, reg | 0x0100);
abadfc92 768
3e8e1952
IM		 769 snd_soc_add_controls(codec, wm8750_snd_controls,
770 ARRAY_SIZE(wm8750_snd_controls));
abadfc92 771 wm8750_add_widgets(codec);
e35115a5 772 return ret;
abadfc92 773
17a52fd6 774err:
e35115a5 775 kfree(codec->reg_cache);
abadfc92
RP		 776 return ret;
777}
778
779/* If the i2c layer weren't so broken, we could pass this kind of data
780 around */
781static struct snd_soc_device *wm8750_socdev;
782
42f3030f 783#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
abadfc92
RP		 784
785/*
2f3dfaf5 786 * WM8750 2 wire address is determined by GPIO5
abadfc92
RP		 787 * state during powerup.
788 * low = 0x1a
789 * high = 0x1b
790 */
abadfc92 791
ee1d0099
JD		 792static int wm8750_i2c_probe(struct i2c_client *i2c,
793 const struct i2c_device_id *id)
abadfc92
RP		 794{
795 struct snd_soc_device *socdev = wm8750_socdev;
6627a653 796 struct snd_soc_codec *codec = socdev->card->codec;
abadfc92
RP		 797 int ret;
798
abadfc92
RP		 799 i2c_set_clientdata(i2c, codec);
800 codec->control_data = i2c;
801
7084a42b 802 ret = wm8750_init(socdev, SND_SOC_I2C);
ee1d0099 803 if (ret < 0)
a5c95e90 804 pr_err("failed to initialise WM8750\n");
abadfc92 805
abadfc92
RP		 806 return ret;
807}
808
ee1d0099 809static int wm8750_i2c_remove(struct i2c_client *client)
abadfc92
RP		 810{
811 struct snd_soc_codec *codec = i2c_get_clientdata(client);
abadfc92 812 kfree(codec->reg_cache);
abadfc92
RP		 813 return 0;
814}
815
ee1d0099
JD		 816static const struct i2c_device_id wm8750_i2c_id[] = {
817 { "wm8750", 0 },
818 { }
819};
820MODULE_DEVICE_TABLE(i2c, wm8750_i2c_id);
abadfc92 821
abadfc92
RP		 822static struct i2c_driver wm8750_i2c_driver = {
823 .driver = {
824 .name = "WM8750 I2C Codec",
825 .owner = THIS_MODULE,
826 },
ee1d0099
JD		 827 .probe = wm8750_i2c_probe,
828 .remove = wm8750_i2c_remove,
829 .id_table = wm8750_i2c_id,
abadfc92
RP		 830};
831
ee1d0099
JD		 832static int wm8750_add_i2c_device(struct platform_device *pdev,
833 const struct wm8750_setup_data *setup)
834{
835 struct i2c_board_info info;
836 struct i2c_adapter *adapter;
837 struct i2c_client *client;
838 int ret;
839
840 ret = i2c_add_driver(&wm8750_i2c_driver);
841 if (ret != 0) {
842 dev_err(&pdev->dev, "can't add i2c driver\n");
843 return ret;
844 }
845
846 memset(&info, 0, sizeof(struct i2c_board_info));
847 info.addr = setup->i2c_address;
848 strlcpy(info.type, "wm8750", I2C_NAME_SIZE);
849
850 adapter = i2c_get_adapter(setup->i2c_bus);
851 if (!adapter) {
852 dev_err(&pdev->dev, "can't get i2c adapter %d\n",
853 setup->i2c_bus);
854 goto err_driver;
855 }
856
857 client = i2c_new_device(adapter, &info);
858 i2c_put_adapter(adapter);
859 if (!client) {
860 dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
861 (unsigned int)info.addr);
862 goto err_driver;
863 }
864
865 return 0;
866
867err_driver:
868 i2c_del_driver(&wm8750_i2c_driver);
869 return -ENODEV;
870}
abadfc92
RP		 871#endif
872
2f3dfaf5
MB		 873#if defined(CONFIG_SPI_MASTER)
874static int __devinit wm8750_spi_probe(struct spi_device *spi)
875{
876 struct snd_soc_device *socdev = wm8750_socdev;
6627a653 877 struct snd_soc_codec *codec = socdev->card->codec;
2f3dfaf5
MB		 878 int ret;
879
880 codec->control_data = spi;
881
7084a42b 882 ret = wm8750_init(socdev, SND_SOC_SPI);
2f3dfaf5
MB		 883 if (ret < 0)
884 dev_err(&spi->dev, "failed to initialise WM8750\n");
885
886 return ret;
887}
888
889static int __devexit wm8750_spi_remove(struct spi_device *spi)
890{
891 return 0;
892}
893
894static struct spi_driver wm8750_spi_driver = {
895 .driver = {
896 .name = "wm8750",
897 .bus = &spi_bus_type,
898 .owner = THIS_MODULE,
899 },
900 .probe = wm8750_spi_probe,
901 .remove = __devexit_p(wm8750_spi_remove),
902};
2f3dfaf5
MB		 903#endif
904
abadfc92
RP		 905static int wm8750_probe(struct platform_device *pdev)
906{
907 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
908 struct wm8750_setup_data *setup = socdev->codec_data;
909 struct snd_soc_codec *codec;
4422b606 910 struct wm8750_priv *wm8750;
b7c9d852 911 int ret;
abadfc92 912
abadfc92
RP		 913 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
914 if (codec == NULL)
915 return -ENOMEM;
916
4422b606
LG		 917 wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL);
918 if (wm8750 == NULL) {
919 kfree(codec);
920 return -ENOMEM;
921 }
922
923 codec->private_data = wm8750;
6627a653 924 socdev->card->codec = codec;
abadfc92
RP		 925 mutex_init(&codec->mutex);
926 INIT_LIST_HEAD(&codec->dapm_widgets);
927 INIT_LIST_HEAD(&codec->dapm_paths);
928 wm8750_socdev = socdev;
1321b160 929 INIT_DELAYED_WORK(&codec->delayed_work, wm8750_work);
42f3030f 930
b7c9d852
MB		 931 ret = -ENODEV;
932
42f3030f 933#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
abadfc92 934 if (setup->i2c_address) {
ee1d0099 935 ret = wm8750_add_i2c_device(pdev, setup);
abadfc92 936 }
abadfc92 937#endif
2f3dfaf5
MB		 938#if defined(CONFIG_SPI_MASTER)
939 if (setup->spi) {
2f3dfaf5
MB		 940 ret = spi_register_driver(&wm8750_spi_driver);
941 if (ret != 0)
942 printk(KERN_ERR "can't add spi driver");
943 }
944#endif
abadfc92 945
3051e41a
JD		 946 if (ret != 0) {
947 kfree(codec->private_data);
948 kfree(codec);
949 }
abadfc92
RP		 950 return ret;
951}
952
4422b606
LG		 953/*
954 * This function forces any delayed work to be queued and run.
955 */
956static int run_delayed_work(struct delayed_work *dwork)
957{
958 int ret;
959
960 /* cancel any work waiting to be queued. */
961 ret = cancel_delayed_work(dwork);
962
963 /* if there was any work waiting then we run it now and
964 * wait for it's completion */
965 if (ret) {
966 schedule_delayed_work(dwork, 0);
967 flush_scheduled_work();
968 }
969 return ret;
970}
971
abadfc92
RP		 972/* power down chip */
973static int wm8750_remove(struct platform_device *pdev)
974{
975 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
6627a653 976 struct snd_soc_codec *codec = socdev->card->codec;
abadfc92
RP		 977
978 if (codec->control_data)
0be9898a 979 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
4422b606 980 run_delayed_work(&codec->delayed_work);
abadfc92
RP		 981 snd_soc_free_pcms(socdev);
982 snd_soc_dapm_free(socdev);
42f3030f 983#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
ee1d0099 984 i2c_unregister_device(codec->control_data);
abadfc92 985 i2c_del_driver(&wm8750_i2c_driver);
2f3dfaf5
MB		 986#endif
987#if defined(CONFIG_SPI_MASTER)
988 spi_unregister_driver(&wm8750_spi_driver);
abadfc92 989#endif
4422b606 990 kfree(codec->private_data);
abadfc92
RP		 991 kfree(codec);
992
993 return 0;
994}
995
996struct snd_soc_codec_device soc_codec_dev_wm8750 = {
997 .probe = wm8750_probe,
998 .remove = wm8750_remove,
999 .suspend = wm8750_suspend,
1000 .resume = wm8750_resume,
1001};
abadfc92
RP		 1002EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750);
1003
c9b3a40f 1004static int __init wm8750_modinit(void)
64089b84
MB		 1005{
1006 return snd_soc_register_dai(&wm8750_dai);
1007}
1008module_init(wm8750_modinit);
1009
1010static void __exit wm8750_exit(void)
1011{
1012 snd_soc_unregister_dai(&wm8750_dai);
1013}
1014module_exit(wm8750_exit);
1015
abadfc92
RP		 1016MODULE_DESCRIPTION("ASoC WM8750 driver");
1017MODULE_AUTHOR("Liam Girdwood");
1018MODULE_LICENSE("GPL");
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