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ALSA: ASoC: Fix cs4270 error path
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
2f2f4251 36
4e55096e 37#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 38#define STAC_PWR_EVENT 0x20
39#define STAC_HP_EVENT 0x30
4e55096e 40
f5fcc13c
TI		 41enum {
42 STAC_REF,
bf277785 43 STAC_9200_OQO,
dfe495d0
TI		 44 STAC_9200_DELL_D21,
45 STAC_9200_DELL_D22,
46 STAC_9200_DELL_D23,
47 STAC_9200_DELL_M21,
48 STAC_9200_DELL_M22,
49 STAC_9200_DELL_M23,
50 STAC_9200_DELL_M24,
51 STAC_9200_DELL_M25,
52 STAC_9200_DELL_M26,
53 STAC_9200_DELL_M27,
1194b5b7 54 STAC_9200_GATEWAY,
117f257d 55 STAC_9200_PANASONIC,
f5fcc13c
TI		 56 STAC_9200_MODELS
57};
58
59enum {
60 STAC_9205_REF,
dfe495d0 61 STAC_9205_DELL_M42,
ae0a8ed8
TD		 62 STAC_9205_DELL_M43,
63 STAC_9205_DELL_M44,
f5fcc13c
TI		 64 STAC_9205_MODELS
65};
66
e1f0d669
MR		 67enum {
68 STAC_92HD73XX_REF,
a7662640 69 STAC_DELL_M6,
e1f0d669
MR		 70 STAC_92HD73XX_MODELS
71};
72
e035b841
MR		 73enum {
74 STAC_92HD71BXX_REF,
a7662640
MR		 75 STAC_DELL_M4_1,
76 STAC_DELL_M4_2,
e035b841
MR		 77 STAC_92HD71BXX_MODELS
78};
79
8e21c34c
TD		 80enum {
81 STAC_925x_REF,
82 STAC_M2_2,
83 STAC_MA6,
2c11f955 84 STAC_PA6,
8e21c34c
TD		 85 STAC_925x_MODELS
86};
87
f5fcc13c
TI		 88enum {
89 STAC_D945_REF,
90 STAC_D945GTP3,
91 STAC_D945GTP5,
5d5d3bc3
IZ		 92 STAC_INTEL_MAC_V1,
93 STAC_INTEL_MAC_V2,
94 STAC_INTEL_MAC_V3,
95 STAC_INTEL_MAC_V4,
96 STAC_INTEL_MAC_V5,
536319af
NB		 97 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
98 * is given, one of the above models will be
99 * chosen according to the subsystem id. */
dfe495d0 100 /* for backward compatibility */
f5fcc13c 101 STAC_MACMINI,
3fc24d85 102 STAC_MACBOOK,
6f0778d8
NB		 103 STAC_MACBOOK_PRO_V1,
104 STAC_MACBOOK_PRO_V2,
f16928fb 105 STAC_IMAC_INTEL,
0dae0f83 106 STAC_IMAC_INTEL_20,
dfe495d0
TI		 107 STAC_922X_DELL_D81,
108 STAC_922X_DELL_D82,
109 STAC_922X_DELL_M81,
110 STAC_922X_DELL_M82,
f5fcc13c
TI		 111 STAC_922X_MODELS
112};
113
114enum {
115 STAC_D965_REF,
116 STAC_D965_3ST,
117 STAC_D965_5ST,
4ff076e5 118 STAC_DELL_3ST,
8e9068b1 119 STAC_DELL_BIOS,
f5fcc13c
TI		 120 STAC_927X_MODELS
121};
403d1944 122
2f2f4251 123struct sigmatel_spec {
c8b6bf9b 124 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 125 unsigned int num_mixers;
126
403d1944 127 int board_config;
c7d4b2fa 128 unsigned int surr_switch: 1;
403d1944
MP		 129 unsigned int line_switch: 1;
130 unsigned int mic_switch: 1;
3cc08dc6 131 unsigned int alt_switch: 1;
82bc955f 132 unsigned int hp_detect: 1;
c7d4b2fa 133
4fe5195c 134 /* gpio lines */
0fc9dec4 135 unsigned int eapd_mask;
4fe5195c
MR		 136 unsigned int gpio_mask;
137 unsigned int gpio_dir;
138 unsigned int gpio_data;
139 unsigned int gpio_mute;
140
141 /* analog loopback */
e1f0d669
MR		 142 unsigned char aloopback_mask;
143 unsigned char aloopback_shift;
8259980e 144
a64135a2
MR		 145 /* power management */
146 unsigned int num_pwrs;
147 hda_nid_t *pwr_nids;
b76c850f 148 hda_nid_t *dac_list;
a64135a2 149
2f2f4251 150 /* playback */
b22b4821
MR		 151 struct hda_input_mux *mono_mux;
152 unsigned int cur_mmux;
2f2f4251 153 struct hda_multi_out multiout;
3cc08dc6 154 hda_nid_t dac_nids[5];
2f2f4251
M		 155
156 /* capture */
157 hda_nid_t *adc_nids;
2f2f4251 158 unsigned int num_adcs;
dabbed6f
M		 159 hda_nid_t *mux_nids;
160 unsigned int num_muxes;
8b65727b
MP		 161 hda_nid_t *dmic_nids;
162 unsigned int num_dmics;
e1f0d669 163 hda_nid_t *dmux_nids;
1697055e 164 unsigned int num_dmuxes;
dabbed6f 165 hda_nid_t dig_in_nid;
b22b4821 166 hda_nid_t mono_nid;
2f2f4251 167
2f2f4251
M		 168 /* pin widgets */
169 hda_nid_t *pin_nids;
170 unsigned int num_pins;
2f2f4251 171 unsigned int *pin_configs;
11b44bbd 172 unsigned int *bios_pin_configs;
2f2f4251
M		 173
174 /* codec specific stuff */
175 struct hda_verb *init;
c8b6bf9b 176 struct snd_kcontrol_new *mixer;
2f2f4251
M		 177
178 /* capture source */
8b65727b 179 struct hda_input_mux *dinput_mux;
e1f0d669 180 unsigned int cur_dmux[2];
c7d4b2fa 181 struct hda_input_mux *input_mux;
3cc08dc6 182 unsigned int cur_mux[3];
2f2f4251 183
403d1944
MP		 184 /* i/o switches */
185 unsigned int io_switch[2];
0fb87bb4 186 unsigned int clfe_swap;
7c2ba97b 187 unsigned int hp_switch;
5f10c4a9 188 unsigned int aloopback;
2f2f4251 189
c7d4b2fa
M		 190 struct hda_pcm pcm_rec[2]; /* PCM information */
191
192 /* dynamic controls and input_mux */
193 struct auto_pin_cfg autocfg;
194 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 195 struct snd_kcontrol_new *kctl_alloc;
8b65727b 196 struct hda_input_mux private_dimux;
c7d4b2fa 197 struct hda_input_mux private_imux;
b22b4821 198 struct hda_input_mux private_mono_mux;
2f2f4251
M		 199};
200
201static hda_nid_t stac9200_adc_nids[1] = {
202 0x03,
203};
204
205static hda_nid_t stac9200_mux_nids[1] = {
206 0x0c,
207};
208
209static hda_nid_t stac9200_dac_nids[1] = {
210 0x02,
211};
212
a64135a2
MR		 213static hda_nid_t stac92hd73xx_pwr_nids[8] = {
214 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
215 0x0f, 0x10, 0x11
216};
217
e1f0d669
MR		 218static hda_nid_t stac92hd73xx_adc_nids[2] = {
219 0x1a, 0x1b
220};
221
222#define STAC92HD73XX_NUM_DMICS 2
223static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
224 0x13, 0x14, 0
225};
226
227#define STAC92HD73_DAC_COUNT 5
228static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
229 0x15, 0x16, 0x17, 0x18, 0x19,
230};
231
232static hda_nid_t stac92hd73xx_mux_nids[4] = {
233 0x28, 0x29, 0x2a, 0x2b,
234};
235
236static hda_nid_t stac92hd73xx_dmux_nids[2] = {
237 0x20, 0x21,
238};
239
a64135a2
MR		 240static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
241 0x0a, 0x0d, 0x0f
242};
243
e035b841
MR		 244static hda_nid_t stac92hd71bxx_adc_nids[2] = {
245 0x12, 0x13,
246};
247
248static hda_nid_t stac92hd71bxx_mux_nids[2] = {
249 0x1a, 0x1b
250};
251
e1f0d669
MR		 252static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
253 0x1c,
254};
255
aea7bb0a 256static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 257 0x10, /*0x11, */
258};
259
260#define STAC92HD71BXX_NUM_DMICS 2
261static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
262 0x18, 0x19, 0
263};
264
8e21c34c
TD		 265static hda_nid_t stac925x_adc_nids[1] = {
266 0x03,
267};
268
269static hda_nid_t stac925x_mux_nids[1] = {
270 0x0f,
271};
272
273static hda_nid_t stac925x_dac_nids[1] = {
274 0x02,
275};
276
f6e9852a
TI		 277#define STAC925X_NUM_DMICS 1
278static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
279 0x15, 0
2c11f955
TD		 280};
281
1697055e
TI		 282static hda_nid_t stac925x_dmux_nids[1] = {
283 0x14,
284};
285
2f2f4251
M		 286static hda_nid_t stac922x_adc_nids[2] = {
287 0x06, 0x07,
288};
289
290static hda_nid_t stac922x_mux_nids[2] = {
291 0x12, 0x13,
292};
293
3cc08dc6
MP		 294static hda_nid_t stac927x_adc_nids[3] = {
295 0x07, 0x08, 0x09
296};
297
298static hda_nid_t stac927x_mux_nids[3] = {
299 0x15, 0x16, 0x17
300};
301
b76c850f
MR		 302static hda_nid_t stac927x_dac_nids[6] = {
303 0x02, 0x03, 0x04, 0x05, 0x06, 0
304};
305
e1f0d669
MR		 306static hda_nid_t stac927x_dmux_nids[1] = {
307 0x1b,
308};
309
7f16859a
MR		 310#define STAC927X_NUM_DMICS 2
311static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
312 0x13, 0x14, 0
313};
314
f3302a59
MP		 315static hda_nid_t stac9205_adc_nids[2] = {
316 0x12, 0x13
317};
318
319static hda_nid_t stac9205_mux_nids[2] = {
320 0x19, 0x1a
321};
322
e1f0d669 323static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 324 0x1d,
e1f0d669
MR		 325};
326
f6e9852a
TI		 327#define STAC9205_NUM_DMICS 2
328static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
329 0x17, 0x18, 0
8b65727b
MP		 330};
331
c7d4b2fa 332static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 333 0x08, 0x09, 0x0d, 0x0e,
334 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 335};
336
8e21c34c
TD		 337static hda_nid_t stac925x_pin_nids[8] = {
338 0x07, 0x08, 0x0a, 0x0b,
339 0x0c, 0x0d, 0x10, 0x11,
340};
341
2f2f4251
M		 342static hda_nid_t stac922x_pin_nids[10] = {
343 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
344 0x0f, 0x10, 0x11, 0x15, 0x1b,
345};
346
a7662640 347static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 348 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
349 0x0f, 0x10, 0x11, 0x12, 0x13,
a7662640 350 0x14, 0x1e, 0x22
e1f0d669
MR		 351};
352
e035b841
MR		 353static hda_nid_t stac92hd71bxx_pin_nids[10] = {
354 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
355 0x0f, 0x14, 0x18, 0x19, 0x1e,
356};
357
3cc08dc6
MP		 358static hda_nid_t stac927x_pin_nids[14] = {
359 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
360 0x0f, 0x10, 0x11, 0x12, 0x13,
361 0x14, 0x21, 0x22, 0x23,
362};
363
f3302a59
MP		 364static hda_nid_t stac9205_pin_nids[12] = {
365 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
366 0x0f, 0x14, 0x16, 0x17, 0x18,
367 0x21, 0x22,
f3302a59
MP		 368};
369
8b65727b
MP		 370static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
371 struct snd_ctl_elem_info *uinfo)
372{
373 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
374 struct sigmatel_spec *spec = codec->spec;
375 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
376}
377
378static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
379 struct snd_ctl_elem_value *ucontrol)
380{
381 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
382 struct sigmatel_spec *spec = codec->spec;
e1f0d669 383 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 384
e1f0d669 385 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 386 return 0;
387}
388
389static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
390 struct snd_ctl_elem_value *ucontrol)
391{
392 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
393 struct sigmatel_spec *spec = codec->spec;
e1f0d669 394 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 395
396 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 397 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 398}
399
c8b6bf9b 400static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 401{
402 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
403 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 404 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 405}
406
c8b6bf9b 407static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 408{
409 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
410 struct sigmatel_spec *spec = codec->spec;
411 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
412
413 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
414 return 0;
415}
416
c8b6bf9b 417static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 418{
419 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
420 struct sigmatel_spec *spec = codec->spec;
421 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
422
c7d4b2fa 423 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 424 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
425}
426
b22b4821
MR		 427static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
428 struct snd_ctl_elem_info *uinfo)
429{
430 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
431 struct sigmatel_spec *spec = codec->spec;
432 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
433}
434
435static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
436 struct snd_ctl_elem_value *ucontrol)
437{
438 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
439 struct sigmatel_spec *spec = codec->spec;
440
441 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
442 return 0;
443}
444
445static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
446 struct snd_ctl_elem_value *ucontrol)
447{
448 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
449 struct sigmatel_spec *spec = codec->spec;
450
451 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
452 spec->mono_nid, &spec->cur_mmux);
453}
454
5f10c4a9
ML		 455#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
456
457static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
458 struct snd_ctl_elem_value *ucontrol)
459{
460 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 461 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 462 struct sigmatel_spec *spec = codec->spec;
463
e1f0d669
MR		 464 ucontrol->value.integer.value[0] = !!(spec->aloopback &
465 (spec->aloopback_mask << idx));
5f10c4a9
ML		 466 return 0;
467}
468
469static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
470 struct snd_ctl_elem_value *ucontrol)
471{
472 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
473 struct sigmatel_spec *spec = codec->spec;
e1f0d669 474 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 475 unsigned int dac_mode;
e1f0d669 476 unsigned int val, idx_val;
5f10c4a9 477
e1f0d669
MR		 478 idx_val = spec->aloopback_mask << idx;
479 if (ucontrol->value.integer.value[0])
480 val = spec->aloopback | idx_val;
481 else
482 val = spec->aloopback & ~idx_val;
68ea7b2f 483 if (spec->aloopback == val)
5f10c4a9
ML		 484 return 0;
485
68ea7b2f 486 spec->aloopback = val;
5f10c4a9 487
e1f0d669
MR		 488 /* Only return the bits defined by the shift value of the
489 * first two bytes of the mask
490 */
5f10c4a9 491 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 492 kcontrol->private_value & 0xFFFF, 0x0);
493 dac_mode >>= spec->aloopback_shift;
5f10c4a9 494
e1f0d669 495 if (spec->aloopback & idx_val) {
5f10c4a9 496 snd_hda_power_up(codec);
e1f0d669 497 dac_mode |= idx_val;
5f10c4a9
ML		 498 } else {
499 snd_hda_power_down(codec);
e1f0d669 500 dac_mode &= ~idx_val;
5f10c4a9
ML		 501 }
502
503 snd_hda_codec_write_cache(codec, codec->afg, 0,
504 kcontrol->private_value >> 16, dac_mode);
505
506 return 1;
507}
508
c7d4b2fa 509static struct hda_verb stac9200_core_init[] = {
2f2f4251 510 /* set dac0mux for dac converter */
c7d4b2fa 511 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 512 {}
513};
514
1194b5b7
TI		 515static struct hda_verb stac9200_eapd_init[] = {
516 /* set dac0mux for dac converter */
517 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
518 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
519 {}
520};
521
e1f0d669
MR		 522static struct hda_verb stac92hd73xx_6ch_core_init[] = {
523 /* set master volume and direct control */
524 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
525 /* setup audio connections */
526 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
527 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
528 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
529 /* setup adcs to point to mixer */
530 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
531 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 532 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
533 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
534 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
535 /* setup import muxs */
536 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
537 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
538 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
539 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
540 {}
541};
542
d654a660
MR		 543static struct hda_verb dell_eq_core_init[] = {
544 /* set master volume to max value without distortion
545 * and direct control */
546 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
547 /* setup audio connections */
548 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
549 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
550 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
551 /* setup adcs to point to mixer */
552 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
553 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
554 /* setup import muxs */
555 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
556 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
557 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
558 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
559 {}
560};
561
52fe0f9d 562static struct hda_verb dell_m6_core_init[] = {
20f5f95d
MR		 563 /* set master volume to max value without distortion
564 * and direct control */
565 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
52fe0f9d 566 /* setup audio connections */
7747ecce
MR		 567 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
568 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 569 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
570 /* setup adcs to point to mixer */
571 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
572 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
573 /* setup import muxs */
574 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
575 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
576 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
577 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
578 {}
579};
580
e1f0d669
MR		 581static struct hda_verb stac92hd73xx_8ch_core_init[] = {
582 /* set master volume and direct control */
583 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
584 /* setup audio connections */
585 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
586 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
587 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
588 /* connect hp ports to dac3 */
589 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
590 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
591 /* setup adcs to point to mixer */
592 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
593 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 594 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
595 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
596 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
597 /* setup import muxs */
598 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
599 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
600 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
601 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
602 {}
603};
604
605static struct hda_verb stac92hd73xx_10ch_core_init[] = {
606 /* set master volume and direct control */
607 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
608 /* setup audio connections */
609 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
610 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
611 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
612 /* dac3 is connected to import3 mux */
613 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
614 /* connect hp ports to dac4 */
615 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
616 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
617 /* setup adcs to point to mixer */
618 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
619 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 620 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
621 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
622 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
623 /* setup import muxs */
624 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
625 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
626 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
627 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
628 {}
629};
630
e035b841 631static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 632 /* set master volume and direct control */
633 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
634 /* connect headphone jack to dac1 */
635 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
636 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
637 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
638 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
639 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
640 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 641};
642
aafc4412 643#define HD_DISABLE_PORTF 3
541eee87 644static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 645 /* start of config #1 */
646
647 /* connect port 0f to audio mixer */
648 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
649 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
650 /* unmute right and left channels for node 0x0f */
651 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
652 /* start of config #2 */
653
e035b841
MR		 654 /* set master volume and direct control */
655 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
656 /* connect headphone jack to dac1 */
657 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 658 /* connect port 0d to audio mixer */
9b35947f 659 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
9b35947f
MR		 660 /* unmute dac0 input in audio mixer */
661 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
aafc4412 662 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 663 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
664 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 665 {}
666};
667
8e21c34c
TD		 668static struct hda_verb stac925x_core_init[] = {
669 /* set dac0mux for dac converter */
670 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
671 {}
672};
673
c7d4b2fa 674static struct hda_verb stac922x_core_init[] = {
2f2f4251 675 /* set master volume and direct control */
c7d4b2fa 676 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 677 {}
678};
679
93ed1503 680static struct hda_verb d965_core_init[] = {
19039bd0 681 /* set master volume and direct control */
93ed1503 682 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 683 /* unmute node 0x1b */
684 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
685 /* select node 0x03 as DAC */
686 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
687 {}
688};
689
3cc08dc6
MP		 690static struct hda_verb stac927x_core_init[] = {
691 /* set master volume and direct control */
692 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
693 {}
694};
695
f3302a59
MP		 696static struct hda_verb stac9205_core_init[] = {
697 /* set master volume and direct control */
698 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
699 {}
700};
701
b22b4821
MR		 702#define STAC_MONO_MUX \
703 { \
704 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
705 .name = "Mono Mux", \
706 .count = 1, \
707 .info = stac92xx_mono_mux_enum_info, \
708 .get = stac92xx_mono_mux_enum_get, \
709 .put = stac92xx_mono_mux_enum_put, \
710 }
711
9e05b7a3 712#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 713 { \
714 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
715 .name = "Input Source", \
9e05b7a3 716 .count = cnt, \
ca7c5a8b
ML		 717 .info = stac92xx_mux_enum_info, \
718 .get = stac92xx_mux_enum_get, \
719 .put = stac92xx_mux_enum_put, \
720 }
721
e1f0d669 722#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 723 { \
724 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
725 .name = "Analog Loopback", \
e1f0d669 726 .count = cnt, \
5f10c4a9
ML		 727 .info = stac92xx_aloopback_info, \
728 .get = stac92xx_aloopback_get, \
729 .put = stac92xx_aloopback_put, \
730 .private_value = verb_read | (verb_write << 16), \
731 }
732
c8b6bf9b 733static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 734 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
735 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 736 STAC_INPUT_SOURCE(1),
2f2f4251
M		 737 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
738 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 739 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 740 { } /* end */
741};
742
e1f0d669 743static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 744 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
745
e1f0d669
MR		 746 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
747 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
748
749 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
750 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
751
752 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
753 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
754
755 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
756 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
757
758 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
759 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
760
761 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
762 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
763
764 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
765 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
766 { } /* end */
767};
768
769static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 770 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
771
e1f0d669
MR		 772 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
773 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
774
775 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
776 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
777
778 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
779 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
780
781 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
782 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
783
784 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
785 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
786
787 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
788 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
789
790 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
791 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
792 { } /* end */
793};
794
795static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 796 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
797
e1f0d669
MR		 798 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
799 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
800
801 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
802 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
803
804 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
805 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
806
807 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
808 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
809
810 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
811 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
812
813 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
814 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
815
816 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
817 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
818 { } /* end */
819};
820
541eee87 821static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 822 STAC_INPUT_SOURCE(2),
e035b841 823
9b35947f
MR		 824 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
825 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
826 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
827
828 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
829 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
830 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 831
f7c5dda2
MR		 832 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
833 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
834
9b35947f
MR		 835 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
836 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 837 { } /* end */
838};
839
541eee87 840static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 841 STAC_INPUT_SOURCE(2),
842 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
843
541eee87
MR		 844 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
845 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
846 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
847
848 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
849 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
850 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
851 { } /* end */
852};
853
8e21c34c 854static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 855 STAC_INPUT_SOURCE(1),
8e21c34c 856 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 857 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 858 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
859 { } /* end */
860};
861
9e05b7a3 862static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 863 STAC_INPUT_SOURCE(2),
e1f0d669 864 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 865
866 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
867 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
868 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
869
870 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
871 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
872 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
873
2f2f4251
M		 874 { } /* end */
875};
876
19039bd0 877/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 878static struct snd_kcontrol_new stac922x_mixer[] = {
879 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 880 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
881 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
882 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
883
884 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
885 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
886 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 887 { } /* end */
888};
889
9e05b7a3 890
d1d985f0 891static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 892 STAC_INPUT_SOURCE(3),
e1f0d669 893 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 894
9e05b7a3
ML		 895 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
896 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
897 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
898
899 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
900 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
901 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
902
903 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
904 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
905 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 906 { } /* end */
907};
908
1697055e
TI		 909static struct snd_kcontrol_new stac_dmux_mixer = {
910 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
911 .name = "Digital Input Source",
912 /* count set later */
913 .info = stac92xx_dmux_enum_info,
914 .get = stac92xx_dmux_enum_get,
915 .put = stac92xx_dmux_enum_put,
916};
917
2134ea4f
TI		 918static const char *slave_vols[] = {
919 "Front Playback Volume",
920 "Surround Playback Volume",
921 "Center Playback Volume",
922 "LFE Playback Volume",
923 "Side Playback Volume",
924 "Headphone Playback Volume",
925 "Headphone Playback Volume",
926 "Speaker Playback Volume",
927 "External Speaker Playback Volume",
928 "Speaker2 Playback Volume",
929 NULL
930};
931
932static const char *slave_sws[] = {
933 "Front Playback Switch",
934 "Surround Playback Switch",
935 "Center Playback Switch",
936 "LFE Playback Switch",
937 "Side Playback Switch",
938 "Headphone Playback Switch",
939 "Headphone Playback Switch",
940 "Speaker Playback Switch",
941 "External Speaker Playback Switch",
942 "Speaker2 Playback Switch",
edb54a55 943 "IEC958 Playback Switch",
2134ea4f
TI		 944 NULL
945};
946
2f2f4251
M		 947static int stac92xx_build_controls(struct hda_codec *codec)
948{
949 struct sigmatel_spec *spec = codec->spec;
950 int err;
c7d4b2fa 951 int i;
2f2f4251
M		 952
953 err = snd_hda_add_new_ctls(codec, spec->mixer);
954 if (err < 0)
955 return err;
c7d4b2fa
M		 956
957 for (i = 0; i < spec->num_mixers; i++) {
958 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
959 if (err < 0)
960 return err;
961 }
1697055e
TI		 962 if (spec->num_dmuxes > 0) {
963 stac_dmux_mixer.count = spec->num_dmuxes;
964 err = snd_ctl_add(codec->bus->card,
965 snd_ctl_new1(&stac_dmux_mixer, codec));
966 if (err < 0)
967 return err;
968 }
c7d4b2fa 969
dabbed6f
M		 970 if (spec->multiout.dig_out_nid) {
971 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
972 if (err < 0)
973 return err;
9a08160b
TI		 974 err = snd_hda_create_spdif_share_sw(codec,
975 &spec->multiout);
976 if (err < 0)
977 return err;
978 spec->multiout.share_spdif = 1;
dabbed6f
M		 979 }
980 if (spec->dig_in_nid) {
981 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
982 if (err < 0)
983 return err;
984 }
2134ea4f
TI		 985
986 /* if we have no master control, let's create it */
987 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 988 unsigned int vmaster_tlv[4];
2134ea4f 989 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 990 HDA_OUTPUT, vmaster_tlv);
2134ea4f 991 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 992 vmaster_tlv, slave_vols);
2134ea4f
TI		 993 if (err < 0)
994 return err;
995 }
996 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
997 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
998 NULL, slave_sws);
999 if (err < 0)
1000 return err;
1001 }
1002
dabbed6f 1003 return 0;
2f2f4251
M		 1004}
1005
403d1944 1006static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1007 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1008 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1009};
1010
dfe495d0
TI		 1011/*
1012 STAC 9200 pin configs for
1013 102801A8
1014 102801DE
1015 102801E8
1016*/
1017static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1018 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1019 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1020};
1021
1022/*
1023 STAC 9200 pin configs for
1024 102801C0
1025 102801C1
1026*/
1027static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1028 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1029 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1030};
1031
1032/*
1033 STAC 9200 pin configs for
1034 102801C4 (Dell Dimension E310)
1035 102801C5
1036 102801C7
1037 102801D9
1038 102801DA
1039 102801E3
1040*/
1041static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1042 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1043 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1044};
1045
1046
1047/*
1048 STAC 9200-32 pin configs for
1049 102801B5 (Dell Inspiron 630m)
1050 102801D8 (Dell Inspiron 640m)
1051*/
1052static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1053 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1054 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1055};
1056
1057/*
1058 STAC 9200-32 pin configs for
1059 102801C2 (Dell Latitude D620)
1060 102801C8
1061 102801CC (Dell Latitude D820)
1062 102801D4
1063 102801D6
1064*/
1065static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1066 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1067 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1068};
1069
1070/*
1071 STAC 9200-32 pin configs for
1072 102801CE (Dell XPS M1710)
1073 102801CF (Dell Precision M90)
1074*/
1075static unsigned int dell9200_m23_pin_configs[8] = {
1076 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1077 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1078};
1079
1080/*
1081 STAC 9200-32 pin configs for
1082 102801C9
1083 102801CA
1084 102801CB (Dell Latitude 120L)
1085 102801D3
1086*/
1087static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1088 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1089 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1090};
1091
1092/*
1093 STAC 9200-32 pin configs for
1094 102801BD (Dell Inspiron E1505n)
1095 102801EE
1096 102801EF
1097*/
1098static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1099 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1100 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1101};
1102
1103/*
1104 STAC 9200-32 pin configs for
1105 102801F5 (Dell Inspiron 1501)
1106 102801F6
1107*/
1108static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1109 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1110 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1111};
1112
1113/*
1114 STAC 9200-32
1115 102801CD (Dell Inspiron E1705/9400)
1116*/
1117static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1118 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1119 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1120};
1121
bf277785
TD		 1122static unsigned int oqo9200_pin_configs[8] = {
1123 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1124 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1125};
1126
dfe495d0 1127
f5fcc13c
TI		 1128static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1129 [STAC_REF] = ref9200_pin_configs,
bf277785 1130 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1131 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1132 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1133 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1134 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1135 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1136 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1137 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1138 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1139 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1140 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1141 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1142};
1143
f5fcc13c
TI		 1144static const char *stac9200_models[STAC_9200_MODELS] = {
1145 [STAC_REF] = "ref",
bf277785 1146 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1147 [STAC_9200_DELL_D21] = "dell-d21",
1148 [STAC_9200_DELL_D22] = "dell-d22",
1149 [STAC_9200_DELL_D23] = "dell-d23",
1150 [STAC_9200_DELL_M21] = "dell-m21",
1151 [STAC_9200_DELL_M22] = "dell-m22",
1152 [STAC_9200_DELL_M23] = "dell-m23",
1153 [STAC_9200_DELL_M24] = "dell-m24",
1154 [STAC_9200_DELL_M25] = "dell-m25",
1155 [STAC_9200_DELL_M26] = "dell-m26",
1156 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1157 [STAC_9200_GATEWAY] = "gateway",
117f257d 1158 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1159};
1160
1161static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1162 /* SigmaTel reference board */
1163 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1164 "DFI LanParty", STAC_REF),
e7377071 1165 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1167 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1169 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1171 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1173 "unknown Dell", STAC_9200_DELL_D22),
1174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1175 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1177 "Dell Latitude D620", STAC_9200_DELL_M22),
1178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1179 "unknown Dell", STAC_9200_DELL_D23),
1180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1181 "unknown Dell", STAC_9200_DELL_D23),
1182 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1183 "unknown Dell", STAC_9200_DELL_M22),
1184 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1185 "unknown Dell", STAC_9200_DELL_M24),
1186 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1187 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1189 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1191 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1193 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1195 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1197 "Dell Precision M90", STAC_9200_DELL_M23),
1198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1199 "unknown Dell", STAC_9200_DELL_M22),
1200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1201 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1203 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1205 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1207 "unknown Dell", STAC_9200_DELL_D23),
1208 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1209 "unknown Dell", STAC_9200_DELL_D23),
1210 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1211 "unknown Dell", STAC_9200_DELL_D21),
1212 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1213 "unknown Dell", STAC_9200_DELL_D23),
1214 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1215 "unknown Dell", STAC_9200_DELL_D21),
1216 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1217 "unknown Dell", STAC_9200_DELL_M25),
1218 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1219 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1220 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1221 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1222 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1223 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1224 /* Panasonic */
117f257d 1225 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1226 /* Gateway machines needs EAPD to be set on resume */
1227 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1228 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1229 STAC_9200_GATEWAY),
1230 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1231 STAC_9200_GATEWAY),
bf277785
TD		 1232 /* OQO Mobile */
1233 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1234 {} /* terminator */
1235};
1236
8e21c34c
TD		 1237static unsigned int ref925x_pin_configs[8] = {
1238 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1239 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1240};
1241
1242static unsigned int stac925x_MA6_pin_configs[8] = {
1243 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1244 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1245};
1246
2c11f955
TD		 1247static unsigned int stac925x_PA6_pin_configs[8] = {
1248 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1249 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1250};
1251
8e21c34c 1252static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1253 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1254 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1255};
1256
1257static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1258 [STAC_REF] = ref925x_pin_configs,
1259 [STAC_M2_2] = stac925xM2_2_pin_configs,
1260 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1261 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1262};
1263
1264static const char *stac925x_models[STAC_925x_MODELS] = {
1265 [STAC_REF] = "ref",
1266 [STAC_M2_2] = "m2-2",
1267 [STAC_MA6] = "m6",
2c11f955 1268 [STAC_PA6] = "pa6",
8e21c34c
TD		 1269};
1270
1271static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1272 /* SigmaTel reference board */
1273 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1274 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1275 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1276 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1277 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1278 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1279 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1280 {} /* terminator */
1281};
1282
a7662640 1283static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1284 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1285 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1286 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1287 0x01452050,
1288};
1289
1290static unsigned int dell_m6_pin_configs[13] = {
1291 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1292 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1293 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1294 0x4f0000f0,
e1f0d669
MR		 1295};
1296
1297static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1298 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1299 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1300};
1301
1302static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1303 [STAC_92HD73XX_REF] = "ref",
a7662640 1304 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1305};
1306
1307static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1308 /* SigmaTel reference board */
1309 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1310 "DFI LanParty", STAC_92HD73XX_REF),
1311 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1312 "unknown Dell", STAC_DELL_M6),
1313 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1314 "unknown Dell", STAC_DELL_M6),
1315 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1316 "unknown Dell", STAC_DELL_M6),
1317 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1318 "unknown Dell", STAC_DELL_M6),
1319 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1320 "unknown Dell", STAC_DELL_M6),
1321 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1322 "unknown Dell", STAC_DELL_M6),
1323 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1324 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1325 {} /* terminator */
1326};
1327
e035b841
MR		 1328static unsigned int ref92hd71bxx_pin_configs[10] = {
1329 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1330 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1331 0x90a000f0, 0x01452050,
1332};
1333
aafc4412 1334static unsigned int dell_m4_1_pin_configs[10] = {
a7662640 1335 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1336 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
a7662640
MR		 1337 0x40f000f0, 0x4f0000f0,
1338};
1339
aafc4412 1340static unsigned int dell_m4_2_pin_configs[10] = {
a7662640
MR		 1341 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1342 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
1343 0x40f000f0, 0x044413b0,
1344};
1345
e035b841
MR		 1346static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1347 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1348 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1349 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
e035b841
MR		 1350};
1351
1352static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1353 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1354 [STAC_DELL_M4_1] = "dell-m4-1",
1355 [STAC_DELL_M4_2] = "dell-m4-2",
e035b841
MR		 1356};
1357
1358static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1359 /* SigmaTel reference board */
1360 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1361 "DFI LanParty", STAC_92HD71BXX_REF),
a7662640
MR		 1362 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1363 "unknown Dell", STAC_DELL_M4_1),
1364 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1365 "unknown Dell", STAC_DELL_M4_1),
1366 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1367 "unknown Dell", STAC_DELL_M4_1),
1368 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1369 "unknown Dell", STAC_DELL_M4_1),
1370 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1371 "unknown Dell", STAC_DELL_M4_1),
1372 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1373 "unknown Dell", STAC_DELL_M4_1),
1374 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1375 "unknown Dell", STAC_DELL_M4_1),
1376 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1377 "unknown Dell", STAC_DELL_M4_2),
1378 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1379 "unknown Dell", STAC_DELL_M4_2),
1380 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1381 "unknown Dell", STAC_DELL_M4_2),
1382 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1383 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1384 {} /* terminator */
1385};
1386
403d1944
MP		 1387static unsigned int ref922x_pin_configs[10] = {
1388 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1389 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1390 0x40000100, 0x40000100,
1391};
1392
dfe495d0
TI		 1393/*
1394 STAC 922X pin configs for
1395 102801A7
1396 102801AB
1397 102801A9
1398 102801D1
1399 102801D2
1400*/
1401static unsigned int dell_922x_d81_pin_configs[10] = {
1402 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1403 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1404 0x01813122, 0x400001f2,
1405};
1406
1407/*
1408 STAC 922X pin configs for
1409 102801AC
1410 102801D0
1411*/
1412static unsigned int dell_922x_d82_pin_configs[10] = {
1413 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1414 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1415 0x01813122, 0x400001f1,
1416};
1417
1418/*
1419 STAC 922X pin configs for
1420 102801BF
1421*/
1422static unsigned int dell_922x_m81_pin_configs[10] = {
1423 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1424 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1425 0x40C003f1, 0x405003f0,
1426};
1427
1428/*
1429 STAC 9221 A1 pin configs for
1430 102801D7 (Dell XPS M1210)
1431*/
1432static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1433 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1434 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1435 0x508003f3, 0x405003f4,
1436};
1437
403d1944 1438static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1439 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1440 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1441 0x02a19120, 0x40000100,
1442};
1443
1444static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1445 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1446 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1447 0x02a19320, 0x40000100,
1448};
1449
5d5d3bc3
IZ		 1450static unsigned int intel_mac_v1_pin_configs[10] = {
1451 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1452 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1453 0x400000fc, 0x400000fb,
1454};
1455
1456static unsigned int intel_mac_v2_pin_configs[10] = {
1457 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1458 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1459 0x400000fc, 0x400000fb,
6f0778d8
NB		 1460};
1461
5d5d3bc3
IZ		 1462static unsigned int intel_mac_v3_pin_configs[10] = {
1463 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1464 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1465 0x400000fc, 0x400000fb,
1466};
1467
5d5d3bc3
IZ		 1468static unsigned int intel_mac_v4_pin_configs[10] = {
1469 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1470 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1471 0x400000fc, 0x400000fb,
1472};
1473
5d5d3bc3
IZ		 1474static unsigned int intel_mac_v5_pin_configs[10] = {
1475 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1476 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1477 0x400000fc, 0x400000fb,
0dae0f83
TI		 1478};
1479
76c08828 1480
19039bd0 1481static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1482 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1483 [STAC_D945GTP3] = d945gtp3_pin_configs,
1484 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1485 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1486 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1487 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1488 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1489 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1490 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1491 /* for backward compatibility */
5d5d3bc3
IZ		 1492 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1493 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1494 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1495 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1496 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1497 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1498 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1499 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1500 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1501 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1502};
1503
f5fcc13c
TI		 1504static const char *stac922x_models[STAC_922X_MODELS] = {
1505 [STAC_D945_REF] = "ref",
1506 [STAC_D945GTP5] = "5stack",
1507 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1508 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1509 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1510 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1511 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1512 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1513 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1514 /* for backward compatibility */
f5fcc13c 1515 [STAC_MACMINI] = "macmini",
3fc24d85 1516 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1517 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1518 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1519 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1520 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1521 [STAC_922X_DELL_D81] = "dell-d81",
1522 [STAC_922X_DELL_D82] = "dell-d82",
1523 [STAC_922X_DELL_M81] = "dell-m81",
1524 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1525};
1526
1527static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1528 /* SigmaTel reference board */
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1530 "DFI LanParty", STAC_D945_REF),
1531 /* Intel 945G based systems */
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1533 "Intel D945G", STAC_D945GTP3),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1535 "Intel D945G", STAC_D945GTP3),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1537 "Intel D945G", STAC_D945GTP3),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1539 "Intel D945G", STAC_D945GTP3),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1541 "Intel D945G", STAC_D945GTP3),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1543 "Intel D945G", STAC_D945GTP3),
1544 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1545 "Intel D945G", STAC_D945GTP3),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1547 "Intel D945G", STAC_D945GTP3),
1548 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1549 "Intel D945G", STAC_D945GTP3),
1550 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1551 "Intel D945G", STAC_D945GTP3),
1552 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1553 "Intel D945G", STAC_D945GTP3),
1554 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1555 "Intel D945G", STAC_D945GTP3),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1557 "Intel D945G", STAC_D945GTP3),
1558 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1559 "Intel D945G", STAC_D945GTP3),
1560 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1561 "Intel D945G", STAC_D945GTP3),
1562 /* Intel D945G 5-stack systems */
1563 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1564 "Intel D945G", STAC_D945GTP5),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1566 "Intel D945G", STAC_D945GTP5),
1567 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1568 "Intel D945G", STAC_D945GTP5),
1569 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1570 "Intel D945G", STAC_D945GTP5),
1571 /* Intel 945P based systems */
1572 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1573 "Intel D945P", STAC_D945GTP3),
1574 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1575 "Intel D945P", STAC_D945GTP3),
1576 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1577 "Intel D945P", STAC_D945GTP3),
1578 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1579 "Intel D945P", STAC_D945GTP3),
1580 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1581 "Intel D945P", STAC_D945GTP3),
1582 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1583 "Intel D945P", STAC_D945GTP5),
1584 /* other systems */
536319af 1585 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1586 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1587 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1588 /* Dell systems */
1589 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1590 "unknown Dell", STAC_922X_DELL_D81),
1591 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1592 "unknown Dell", STAC_922X_DELL_D81),
1593 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1594 "unknown Dell", STAC_922X_DELL_D81),
1595 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1596 "unknown Dell", STAC_922X_DELL_D82),
1597 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1598 "unknown Dell", STAC_922X_DELL_M81),
1599 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1600 "unknown Dell", STAC_922X_DELL_D82),
1601 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1602 "unknown Dell", STAC_922X_DELL_D81),
1603 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1604 "unknown Dell", STAC_922X_DELL_D81),
1605 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1606 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1607 {} /* terminator */
1608};
1609
3cc08dc6 1610static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1611 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1612 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1613 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1614 0x01c42190, 0x40000100,
3cc08dc6
MP		 1615};
1616
93ed1503 1617static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1618 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1619 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1620 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1621 0x40000100, 0x40000100
1622};
1623
93ed1503
TD		 1624static unsigned int d965_5st_pin_configs[14] = {
1625 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1626 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1627 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1628 0x40000100, 0x40000100
1629};
1630
4ff076e5
TD		 1631static unsigned int dell_3st_pin_configs[14] = {
1632 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1633 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1634 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1635 0x40c003fc, 0x40000100
1636};
1637
93ed1503 1638static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1639 [STAC_D965_REF] = ref927x_pin_configs,
1640 [STAC_D965_3ST] = d965_3st_pin_configs,
1641 [STAC_D965_5ST] = d965_5st_pin_configs,
1642 [STAC_DELL_3ST] = dell_3st_pin_configs,
1643 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1644};
1645
f5fcc13c 1646static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1647 [STAC_D965_REF] = "ref",
1648 [STAC_D965_3ST] = "3stack",
1649 [STAC_D965_5ST] = "5stack",
1650 [STAC_DELL_3ST] = "dell-3stack",
1651 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1652};
1653
1654static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1655 /* SigmaTel reference board */
1656 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1657 "DFI LanParty", STAC_D965_REF),
81d3dbde 1658 /* Intel 946 based systems */
f5fcc13c
TI		 1659 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1660 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1661 /* 965 based 3 stack systems */
f5fcc13c
TI		 1662 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1663 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1664 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1665 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1666 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1667 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1668 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1669 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1670 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1671 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1672 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1673 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1674 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1675 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1676 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1677 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1678 /* Dell 3 stack systems */
8e9068b1 1679 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1680 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1681 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1682 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1683 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1684 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1685 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1
MR		 1686 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1687 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1688 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1689 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1690 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1691 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1692 /* 965 based 5 stack systems */
f5fcc13c
TI		 1693 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1694 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1695 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1696 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1697 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1698 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1699 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1700 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1701 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1702 {} /* terminator */
1703};
1704
f3302a59
MP		 1705static unsigned int ref9205_pin_configs[12] = {
1706 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1707 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1708 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1709};
1710
dfe495d0
TI		 1711/*
1712 STAC 9205 pin configs for
1713 102801F1
1714 102801F2
1715 102801FC
1716 102801FD
1717 10280204
1718 1028021F
3fa2ef74 1719 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1720*/
1721static unsigned int dell_9205_m42_pin_configs[12] = {
1722 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1723 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1724 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1725};
1726
1727/*
1728 STAC 9205 pin configs for
1729 102801F9
1730 102801FA
1731 102801FE
1732 102801FF (Dell Precision M4300)
1733 10280206
1734 10280200
1735 10280201
1736*/
1737static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1738 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1739 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1740 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1741};
1742
dfe495d0 1743static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1744 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1745 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1746 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1747};
1748
f5fcc13c 1749static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1750 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1751 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1752 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1753 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1754};
1755
f5fcc13c
TI		 1756static const char *stac9205_models[STAC_9205_MODELS] = {
1757 [STAC_9205_REF] = "ref",
dfe495d0 1758 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1759 [STAC_9205_DELL_M43] = "dell-m43",
1760 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1761};
1762
1763static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1764 /* SigmaTel reference board */
1765 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1766 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1767 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1768 "unknown Dell", STAC_9205_DELL_M42),
1769 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1770 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1771 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 1772 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1773 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1774 "Dell Precision", STAC_9205_DELL_M43),
1775 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1776 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1777 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1778 "unknown Dell", STAC_9205_DELL_M42),
1779 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1780 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1781 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1782 "Dell Precision", STAC_9205_DELL_M43),
1783 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1784 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 1785 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1786 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 1787 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1788 "Dell Precision", STAC_9205_DELL_M43),
1789 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1790 "Dell Precision", STAC_9205_DELL_M43),
1791 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1792 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1793 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1794 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1795 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1796 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1797 {} /* terminator */
1798};
1799
11b44bbd
RF		 1800static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1801{
1802 int i;
1803 struct sigmatel_spec *spec = codec->spec;
1804
1805 if (! spec->bios_pin_configs) {
1806 spec->bios_pin_configs = kcalloc(spec->num_pins,
1807 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1808 if (! spec->bios_pin_configs)
1809 return -ENOMEM;
1810 }
1811
1812 for (i = 0; i < spec->num_pins; i++) {
1813 hda_nid_t nid = spec->pin_nids[i];
1814 unsigned int pin_cfg;
1815
1816 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1817 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1818 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1819 nid, pin_cfg);
1820 spec->bios_pin_configs[i] = pin_cfg;
1821 }
1822
1823 return 0;
1824}
1825
87d48363
MR		 1826static void stac92xx_set_config_reg(struct hda_codec *codec,
1827 hda_nid_t pin_nid, unsigned int pin_config)
1828{
1829 int i;
1830 snd_hda_codec_write(codec, pin_nid, 0,
1831 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1832 pin_config & 0x000000ff);
1833 snd_hda_codec_write(codec, pin_nid, 0,
1834 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1835 (pin_config & 0x0000ff00) >> 8);
1836 snd_hda_codec_write(codec, pin_nid, 0,
1837 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1838 (pin_config & 0x00ff0000) >> 16);
1839 snd_hda_codec_write(codec, pin_nid, 0,
1840 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1841 pin_config >> 24);
1842 i = snd_hda_codec_read(codec, pin_nid, 0,
1843 AC_VERB_GET_CONFIG_DEFAULT,
1844 0x00);
1845 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1846 pin_nid, i);
1847}
1848
2f2f4251
M		 1849static void stac92xx_set_config_regs(struct hda_codec *codec)
1850{
1851 int i;
1852 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1853
87d48363
MR		 1854 if (!spec->pin_configs)
1855 return;
11b44bbd 1856
87d48363
MR		 1857 for (i = 0; i < spec->num_pins; i++)
1858 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1859 spec->pin_configs[i]);
2f2f4251 1860}
2f2f4251 1861
dabbed6f 1862/*
c7d4b2fa 1863 * Analog playback callbacks
dabbed6f 1864 */
c7d4b2fa
M		 1865static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1866 struct hda_codec *codec,
c8b6bf9b 1867 struct snd_pcm_substream *substream)
2f2f4251 1868{
dabbed6f 1869 struct sigmatel_spec *spec = codec->spec;
9a08160b
TI		 1870 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
1871 hinfo);
2f2f4251
M		 1872}
1873
2f2f4251
M		 1874static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1875 struct hda_codec *codec,
1876 unsigned int stream_tag,
1877 unsigned int format,
c8b6bf9b 1878 struct snd_pcm_substream *substream)
2f2f4251
M		 1879{
1880 struct sigmatel_spec *spec = codec->spec;
403d1944 1881 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1882}
1883
1884static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1885 struct hda_codec *codec,
c8b6bf9b 1886 struct snd_pcm_substream *substream)
2f2f4251
M		 1887{
1888 struct sigmatel_spec *spec = codec->spec;
1889 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1890}
1891
dabbed6f
M		 1892/*
1893 * Digital playback callbacks
1894 */
1895static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1896 struct hda_codec *codec,
c8b6bf9b 1897 struct snd_pcm_substream *substream)
dabbed6f
M		 1898{
1899 struct sigmatel_spec *spec = codec->spec;
1900 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1901}
1902
1903static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1904 struct hda_codec *codec,
c8b6bf9b 1905 struct snd_pcm_substream *substream)
dabbed6f
M		 1906{
1907 struct sigmatel_spec *spec = codec->spec;
1908 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1909}
1910
6b97eb45
TI		 1911static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1912 struct hda_codec *codec,
1913 unsigned int stream_tag,
1914 unsigned int format,
1915 struct snd_pcm_substream *substream)
1916{
1917 struct sigmatel_spec *spec = codec->spec;
1918 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1919 stream_tag, format, substream);
1920}
1921
dabbed6f 1922
2f2f4251
M		 1923/*
1924 * Analog capture callbacks
1925 */
1926static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1927 struct hda_codec *codec,
1928 unsigned int stream_tag,
1929 unsigned int format,
c8b6bf9b 1930 struct snd_pcm_substream *substream)
2f2f4251
M		 1931{
1932 struct sigmatel_spec *spec = codec->spec;
1933
1934 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1935 stream_tag, 0, format);
1936 return 0;
1937}
1938
1939static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1940 struct hda_codec *codec,
c8b6bf9b 1941 struct snd_pcm_substream *substream)
2f2f4251
M		 1942{
1943 struct sigmatel_spec *spec = codec->spec;
1944
888afa15 1945 snd_hda_codec_cleanup_stream(codec, spec->adc_nids[substream->number]);
2f2f4251
M		 1946 return 0;
1947}
1948
dabbed6f
M		 1949static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1950 .substreams = 1,
1951 .channels_min = 2,
1952 .channels_max = 2,
1953 /* NID is set in stac92xx_build_pcms */
1954 .ops = {
1955 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1956 .close = stac92xx_dig_playback_pcm_close,
1957 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1958 },
1959};
1960
1961static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1962 .substreams = 1,
1963 .channels_min = 2,
1964 .channels_max = 2,
1965 /* NID is set in stac92xx_build_pcms */
1966};
1967
2f2f4251
M		 1968static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1969 .substreams = 1,
1970 .channels_min = 2,
c7d4b2fa 1971 .channels_max = 8,
2f2f4251
M		 1972 .nid = 0x02, /* NID to query formats and rates */
1973 .ops = {
1974 .open = stac92xx_playback_pcm_open,
1975 .prepare = stac92xx_playback_pcm_prepare,
1976 .cleanup = stac92xx_playback_pcm_cleanup
1977 },
1978};
1979
3cc08dc6
MP		 1980static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1981 .substreams = 1,
1982 .channels_min = 2,
1983 .channels_max = 2,
1984 .nid = 0x06, /* NID to query formats and rates */
1985 .ops = {
1986 .open = stac92xx_playback_pcm_open,
1987 .prepare = stac92xx_playback_pcm_prepare,
1988 .cleanup = stac92xx_playback_pcm_cleanup
1989 },
1990};
1991
2f2f4251 1992static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1993 .channels_min = 2,
1994 .channels_max = 2,
9e05b7a3 1995 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1996 .ops = {
1997 .prepare = stac92xx_capture_pcm_prepare,
1998 .cleanup = stac92xx_capture_pcm_cleanup
1999 },
2000};
2001
2002static int stac92xx_build_pcms(struct hda_codec *codec)
2003{
2004 struct sigmatel_spec *spec = codec->spec;
2005 struct hda_pcm *info = spec->pcm_rec;
2006
2007 codec->num_pcms = 1;
2008 codec->pcm_info = info;
2009
c7d4b2fa 2010 info->name = "STAC92xx Analog";
2f2f4251 2011 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2012 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2013 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2014 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2015
2016 if (spec->alt_switch) {
2017 codec->num_pcms++;
2018 info++;
2019 info->name = "STAC92xx Analog Alt";
2020 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2021 }
2f2f4251 2022
dabbed6f
M		 2023 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2024 codec->num_pcms++;
2025 info++;
2026 info->name = "STAC92xx Digital";
7ba72ba1 2027 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2028 if (spec->multiout.dig_out_nid) {
2029 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2030 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2031 }
2032 if (spec->dig_in_nid) {
2033 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2034 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2035 }
2036 }
2037
2f2f4251
M		 2038 return 0;
2039}
2040
c960a03b
TI		 2041static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2042{
2043 unsigned int pincap = snd_hda_param_read(codec, nid,
2044 AC_PAR_PIN_CAP);
2045 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2046 if (pincap & AC_PINCAP_VREF_100)
2047 return AC_PINCTL_VREF_100;
2048 if (pincap & AC_PINCAP_VREF_80)
2049 return AC_PINCTL_VREF_80;
2050 if (pincap & AC_PINCAP_VREF_50)
2051 return AC_PINCTL_VREF_50;
2052 if (pincap & AC_PINCAP_VREF_GRD)
2053 return AC_PINCTL_VREF_GRD;
2054 return 0;
2055}
2056
403d1944
MP		 2057static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2058
2059{
82beb8fd
TI		 2060 snd_hda_codec_write_cache(codec, nid, 0,
2061 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2062}
2063
7c2ba97b
MR		 2064#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2065
2066static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2067 struct snd_ctl_elem_value *ucontrol)
2068{
2069 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2070 struct sigmatel_spec *spec = codec->spec;
2071
2072 ucontrol->value.integer.value[0] = spec->hp_switch;
2073 return 0;
2074}
2075
2076static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2077 struct snd_ctl_elem_value *ucontrol)
2078{
2079 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2080 struct sigmatel_spec *spec = codec->spec;
2081
2082 spec->hp_switch = ucontrol->value.integer.value[0];
2083
2084 /* check to be sure that the ports are upto date with
2085 * switch changes
2086 */
2087 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2088
2089 return 1;
2090}
2091
a5ce8890 2092#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2093
2094static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2095{
2096 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2097 struct sigmatel_spec *spec = codec->spec;
2098 int io_idx = kcontrol-> private_value & 0xff;
2099
2100 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2101 return 0;
2102}
2103
2104static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2105{
2106 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2107 struct sigmatel_spec *spec = codec->spec;
2108 hda_nid_t nid = kcontrol->private_value >> 8;
2109 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2110 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2111
2112 spec->io_switch[io_idx] = val;
2113
2114 if (val)
2115 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2116 else {
2117 unsigned int pinctl = AC_PINCTL_IN_EN;
2118 if (io_idx) /* set VREF for mic */
2119 pinctl |= stac92xx_get_vref(codec, nid);
2120 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2121 }
40c1d308
JZ		 2122
2123 /* check the auto-mute again: we need to mute/unmute the speaker
2124 * appropriately according to the pin direction
2125 */
2126 if (spec->hp_detect)
2127 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2128
403d1944
MP		 2129 return 1;
2130}
2131
0fb87bb4
ML		 2132#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2133
2134static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2135 struct snd_ctl_elem_value *ucontrol)
2136{
2137 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2138 struct sigmatel_spec *spec = codec->spec;
2139
2140 ucontrol->value.integer.value[0] = spec->clfe_swap;
2141 return 0;
2142}
2143
2144static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2145 struct snd_ctl_elem_value *ucontrol)
2146{
2147 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2148 struct sigmatel_spec *spec = codec->spec;
2149 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2150 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2151
68ea7b2f 2152 if (spec->clfe_swap == val)
0fb87bb4
ML		 2153 return 0;
2154
68ea7b2f 2155 spec->clfe_swap = val;
0fb87bb4
ML		 2156
2157 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2158 spec->clfe_swap ? 0x4 : 0x0);
2159
2160 return 1;
2161}
2162
7c2ba97b
MR		 2163#define STAC_CODEC_HP_SWITCH(xname) \
2164 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2165 .name = xname, \
2166 .index = 0, \
2167 .info = stac92xx_hp_switch_info, \
2168 .get = stac92xx_hp_switch_get, \
2169 .put = stac92xx_hp_switch_put, \
2170 }
2171
403d1944
MP		 2172#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2173 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2174 .name = xname, \
2175 .index = 0, \
2176 .info = stac92xx_io_switch_info, \
2177 .get = stac92xx_io_switch_get, \
2178 .put = stac92xx_io_switch_put, \
2179 .private_value = xpval, \
2180 }
2181
0fb87bb4
ML		 2182#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2183 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2184 .name = xname, \
2185 .index = 0, \
2186 .info = stac92xx_clfe_switch_info, \
2187 .get = stac92xx_clfe_switch_get, \
2188 .put = stac92xx_clfe_switch_put, \
2189 .private_value = xpval, \
2190 }
403d1944 2191
c7d4b2fa
M		 2192enum {
2193 STAC_CTL_WIDGET_VOL,
2194 STAC_CTL_WIDGET_MUTE,
09a99959 2195 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2196 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2197 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2198 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2199};
2200
c8b6bf9b 2201static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2202 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2203 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2204 STAC_MONO_MUX,
7c2ba97b 2205 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2206 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2207 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2208};
2209
2210/* add dynamic controls */
2211static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2212{
c8b6bf9b 2213 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2214
2215 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2216 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2217
2218 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2219 if (! knew)
2220 return -ENOMEM;
2221 if (spec->kctl_alloc) {
2222 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2223 kfree(spec->kctl_alloc);
2224 }
2225 spec->kctl_alloc = knew;
2226 spec->num_kctl_alloc = num;
2227 }
2228
2229 knew = &spec->kctl_alloc[spec->num_kctl_used];
2230 *knew = stac92xx_control_templates[type];
82fe0c58 2231 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2232 if (! knew->name)
2233 return -ENOMEM;
2234 knew->private_value = val;
2235 spec->num_kctl_used++;
2236 return 0;
2237}
2238
403d1944
MP		 2239/* flag inputs as additional dynamic lineouts */
2240static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2241{
2242 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2243 unsigned int wcaps, wtype;
2244 int i, num_dacs = 0;
2245
2246 /* use the wcaps cache to count all DACs available for line-outs */
2247 for (i = 0; i < codec->num_nodes; i++) {
2248 wcaps = codec->wcaps[i];
2249 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2250
7b043899
SL		 2251 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2252 num_dacs++;
2253 }
403d1944 2254
7b043899
SL		 2255 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2256
403d1944
MP		 2257 switch (cfg->line_outs) {
2258 case 3:
2259 /* add line-in as side */
7b043899 2260 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2261 cfg->line_out_pins[cfg->line_outs] =
2262 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2263 spec->line_switch = 1;
2264 cfg->line_outs++;
2265 }
2266 break;
2267 case 2:
2268 /* add line-in as clfe and mic as side */
7b043899 2269 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2270 cfg->line_out_pins[cfg->line_outs] =
2271 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2272 spec->line_switch = 1;
2273 cfg->line_outs++;
2274 }
7b043899 2275 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2276 cfg->line_out_pins[cfg->line_outs] =
2277 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2278 spec->mic_switch = 1;
2279 cfg->line_outs++;
2280 }
2281 break;
2282 case 1:
2283 /* add line-in as surr and mic as clfe */
7b043899 2284 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2285 cfg->line_out_pins[cfg->line_outs] =
2286 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2287 spec->line_switch = 1;
2288 cfg->line_outs++;
2289 }
7b043899 2290 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2291 cfg->line_out_pins[cfg->line_outs] =
2292 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2293 spec->mic_switch = 1;
2294 cfg->line_outs++;
2295 }
2296 break;
2297 }
2298
2299 return 0;
2300}
2301
7b043899
SL		 2302
2303static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2304{
2305 int i;
2306
2307 for (i = 0; i < spec->multiout.num_dacs; i++) {
2308 if (spec->multiout.dac_nids[i] == nid)
2309 return 1;
2310 }
2311
2312 return 0;
2313}
2314
3cc08dc6 2315/*
7b043899
SL		 2316 * Fill in the dac_nids table from the parsed pin configuration
2317 * This function only works when every pin in line_out_pins[]
2318 * contains atleast one DAC in its connection list. Some 92xx
2319 * codecs are not connected directly to a DAC, such as the 9200
2320 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2321 */
19039bd0 2322static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2323 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2324{
2325 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2326 int i, j, conn_len = 0;
2327 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2328 unsigned int wcaps, wtype;
2329
c7d4b2fa
M		 2330 for (i = 0; i < cfg->line_outs; i++) {
2331 nid = cfg->line_out_pins[i];
7b043899
SL		 2332 conn_len = snd_hda_get_connections(codec, nid, conn,
2333 HDA_MAX_CONNECTIONS);
2334 for (j = 0; j < conn_len; j++) {
2335 wcaps = snd_hda_param_read(codec, conn[j],
2336 AC_PAR_AUDIO_WIDGET_CAP);
2337 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2338 if (wtype != AC_WID_AUD_OUT ||
2339 (wcaps & AC_WCAP_DIGITAL))
2340 continue;
2341 /* conn[j] is a DAC routed to this line-out */
2342 if (!is_in_dac_nids(spec, conn[j]))
2343 break;
2344 }
2345
2346 if (j == conn_len) {
df802952
TI		 2347 if (spec->multiout.num_dacs > 0) {
2348 /* we have already working output pins,
2349 * so let's drop the broken ones again
2350 */
2351 cfg->line_outs = spec->multiout.num_dacs;
2352 break;
2353 }
7b043899
SL		 2354 /* error out, no available DAC found */
2355 snd_printk(KERN_ERR
2356 "%s: No available DAC for pin 0x%x\n",
2357 __func__, nid);
2358 return -ENODEV;
2359 }
2360
2361 spec->multiout.dac_nids[i] = conn[j];
2362 spec->multiout.num_dacs++;
2363 if (conn_len > 1) {
2364 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2365 snd_hda_codec_write_cache(codec, nid, 0,
2366 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2367
7b043899
SL		 2368 }
2369 }
c7d4b2fa 2370
7b043899
SL		 2371 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2372 spec->multiout.num_dacs,
2373 spec->multiout.dac_nids[0],
2374 spec->multiout.dac_nids[1],
2375 spec->multiout.dac_nids[2],
2376 spec->multiout.dac_nids[3],
2377 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2378 return 0;
2379}
2380
eb06ed8f
TI		 2381/* create volume control/switch for the given prefx type */
2382static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2383{
2384 char name[32];
2385 int err;
2386
2387 sprintf(name, "%s Playback Volume", pfx);
2388 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2389 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2390 if (err < 0)
2391 return err;
2392 sprintf(name, "%s Playback Switch", pfx);
2393 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2394 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2395 if (err < 0)
2396 return err;
2397 return 0;
2398}
2399
ae0afd81
MR		 2400static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2401{
2402 if (!spec->multiout.hp_nid)
2403 spec->multiout.hp_nid = nid;
2404 else if (spec->multiout.num_dacs > 4) {
2405 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2406 return 1;
2407 } else {
2408 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2409 spec->multiout.num_dacs++;
2410 }
2411 return 0;
2412}
2413
2414static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2415{
2416 if (is_in_dac_nids(spec, nid))
2417 return 1;
2418 if (spec->multiout.hp_nid == nid)
2419 return 1;
2420 return 0;
2421}
2422
c7d4b2fa 2423/* add playback controls from the parsed DAC table */
0fb87bb4 2424static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2425 const struct auto_pin_cfg *cfg)
c7d4b2fa 2426{
19039bd0
TI		 2427 static const char *chname[4] = {
2428 "Front", "Surround", NULL /*CLFE*/, "Side"
2429 };
c7d4b2fa
M		 2430 hda_nid_t nid;
2431 int i, err;
2432
0fb87bb4 2433 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2434 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2435
2436
40ac8c4f 2437 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2438 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2439 continue;
2440
2441 nid = spec->multiout.dac_nids[i];
2442
2443 if (i == 2) {
2444 /* Center/LFE */
eb06ed8f
TI		 2445 err = create_controls(spec, "Center", nid, 1);
2446 if (err < 0)
c7d4b2fa 2447 return err;
eb06ed8f
TI		 2448 err = create_controls(spec, "LFE", nid, 2);
2449 if (err < 0)
c7d4b2fa 2450 return err;
0fb87bb4
ML		 2451
2452 wid_caps = get_wcaps(codec, nid);
2453
2454 if (wid_caps & AC_WCAP_LR_SWAP) {
2455 err = stac92xx_add_control(spec,
2456 STAC_CTL_WIDGET_CLFE_SWITCH,
2457 "Swap Center/LFE Playback Switch", nid);
2458
2459 if (err < 0)
2460 return err;
2461 }
2462
c7d4b2fa 2463 } else {
eb06ed8f
TI		 2464 err = create_controls(spec, chname[i], nid, 3);
2465 if (err < 0)
c7d4b2fa
M		 2466 return err;
2467 }
2468 }
2469
7c2ba97b
MR		 2470 if (cfg->hp_outs > 1) {
2471 err = stac92xx_add_control(spec,
2472 STAC_CTL_WIDGET_HP_SWITCH,
2473 "Headphone as Line Out Switch", 0);
2474 if (err < 0)
2475 return err;
2476 }
2477
b5895dc8
MR		 2478 if (spec->line_switch) {
2479 nid = cfg->input_pins[AUTO_PIN_LINE];
2480 pincap = snd_hda_param_read(codec, nid,
2481 AC_PAR_PIN_CAP);
2482 if (pincap & AC_PINCAP_OUT) {
2483 err = stac92xx_add_control(spec,
2484 STAC_CTL_WIDGET_IO_SWITCH,
2485 "Line In as Output Switch", nid << 8);
2486 if (err < 0)
2487 return err;
2488 }
2489 }
403d1944 2490
b5895dc8 2491 if (spec->mic_switch) {
cace16f1 2492 unsigned int def_conf;
ae0afd81
MR		 2493 unsigned int mic_pin = AUTO_PIN_MIC;
2494again:
2495 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2496 def_conf = snd_hda_codec_read(codec, nid, 0,
2497 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2498 /* some laptops have an internal analog microphone
2499 * which can't be used as a output */
2500 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2501 pincap = snd_hda_param_read(codec, nid,
2502 AC_PAR_PIN_CAP);
2503 if (pincap & AC_PINCAP_OUT) {
2504 err = stac92xx_add_control(spec,
2505 STAC_CTL_WIDGET_IO_SWITCH,
2506 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2507 nid = snd_hda_codec_read(codec, nid, 0,
2508 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2509 if (!check_in_dac_nids(spec, nid))
2510 add_spec_dacs(spec, nid);
cace16f1
MR		 2511 if (err < 0)
2512 return err;
2513 }
ae0afd81
MR		 2514 } else if (mic_pin == AUTO_PIN_MIC) {
2515 mic_pin = AUTO_PIN_FRONT_MIC;
2516 goto again;
b5895dc8
MR		 2517 }
2518 }
403d1944 2519
c7d4b2fa
M		 2520 return 0;
2521}
2522
eb06ed8f
TI		 2523/* add playback controls for Speaker and HP outputs */
2524static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2525 struct auto_pin_cfg *cfg)
2526{
2527 struct sigmatel_spec *spec = codec->spec;
2528 hda_nid_t nid;
2529 int i, old_num_dacs, err;
2530
2531 old_num_dacs = spec->multiout.num_dacs;
2532 for (i = 0; i < cfg->hp_outs; i++) {
2533 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2534 if (wid_caps & AC_WCAP_UNSOL_CAP)
2535 spec->hp_detect = 1;
2536 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2537 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2538 if (check_in_dac_nids(spec, nid))
2539 nid = 0;
2540 if (! nid)
c7d4b2fa 2541 continue;
eb06ed8f
TI		 2542 add_spec_dacs(spec, nid);
2543 }
2544 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2545 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2546 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2547 if (check_in_dac_nids(spec, nid))
2548 nid = 0;
eb06ed8f
TI		 2549 if (! nid)
2550 continue;
2551 add_spec_dacs(spec, nid);
c7d4b2fa 2552 }
1b290a51
MR		 2553 for (i = 0; i < cfg->line_outs; i++) {
2554 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2555 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2556 if (check_in_dac_nids(spec, nid))
2557 nid = 0;
2558 if (! nid)
2559 continue;
2560 add_spec_dacs(spec, nid);
2561 }
eb06ed8f
TI		 2562 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2563 static const char *pfxs[] = {
2564 "Speaker", "External Speaker", "Speaker2",
2565 };
2566 err = create_controls(spec, pfxs[i - old_num_dacs],
2567 spec->multiout.dac_nids[i], 3);
2568 if (err < 0)
2569 return err;
2570 }
2571 if (spec->multiout.hp_nid) {
2626a263
TI		 2572 err = create_controls(spec, "Headphone",
2573 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2574 if (err < 0)
2575 return err;
2576 }
c7d4b2fa
M		 2577
2578 return 0;
2579}
2580
b22b4821
MR		 2581/* labels for mono mux outputs */
2582static const char *stac92xx_mono_labels[3] = {
2583 "DAC0", "DAC1", "Mixer"
2584};
2585
2586/* create mono mux for mono out on capable codecs */
2587static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2588{
2589 struct sigmatel_spec *spec = codec->spec;
2590 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2591 int i, num_cons;
2592 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2593
2594 num_cons = snd_hda_get_connections(codec,
2595 spec->mono_nid,
2596 con_lst,
2597 HDA_MAX_NUM_INPUTS);
2598 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2599 return -EINVAL;
2600
2601 for (i = 0; i < num_cons; i++) {
2602 mono_mux->items[mono_mux->num_items].label =
2603 stac92xx_mono_labels[i];
2604 mono_mux->items[mono_mux->num_items].index = i;
2605 mono_mux->num_items++;
2606 }
09a99959
MR		 2607
2608 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2609 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2610}
2611
8b65727b 2612/* labels for dmic mux inputs */
ddc2cec4 2613static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2614 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2615 "Digital Mic 3", "Digital Mic 4"
2616};
2617
2618/* create playback/capture controls for input pins on dmic capable codecs */
2619static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2620 const struct auto_pin_cfg *cfg)
2621{
2622 struct sigmatel_spec *spec = codec->spec;
2623 struct hda_input_mux *dimux = &spec->private_dimux;
2624 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2625 int err, i, j;
2626 char name[32];
8b65727b
MP		 2627
2628 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2629 dimux->items[dimux->num_items].index = 0;
2630 dimux->num_items++;
2631
2632 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2633 hda_nid_t nid;
8b65727b
MP		 2634 int index;
2635 int num_cons;
0678accd 2636 unsigned int wcaps;
8b65727b
MP		 2637 unsigned int def_conf;
2638
2639 def_conf = snd_hda_codec_read(codec,
2640 spec->dmic_nids[i],
2641 0,
2642 AC_VERB_GET_CONFIG_DEFAULT,
2643 0);
2644 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2645 continue;
2646
0678accd 2647 nid = spec->dmic_nids[i];
8b65727b 2648 num_cons = snd_hda_get_connections(codec,
e1f0d669 2649 spec->dmux_nids[0],
8b65727b
MP		 2650 con_lst,
2651 HDA_MAX_NUM_INPUTS);
2652 for (j = 0; j < num_cons; j++)
0678accd 2653 if (con_lst[j] == nid) {
8b65727b
MP		 2654 index = j;
2655 goto found;
2656 }
2657 continue;
2658found:
0678accd
MR		 2659 wcaps = get_wcaps(codec, nid);
2660
2661 if (wcaps & AC_WCAP_OUT_AMP) {
2662 sprintf(name, "%s Capture Volume",
2663 stac92xx_dmic_labels[dimux->num_items]);
2664
2665 err = stac92xx_add_control(spec,
2666 STAC_CTL_WIDGET_VOL,
2667 name,
2668 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2669 if (err < 0)
2670 return err;
2671 }
2672
8b65727b
MP		 2673 dimux->items[dimux->num_items].label =
2674 stac92xx_dmic_labels[dimux->num_items];
2675 dimux->items[dimux->num_items].index = index;
2676 dimux->num_items++;
2677 }
2678
2679 return 0;
2680}
2681
c7d4b2fa
M		 2682/* create playback/capture controls for input pins */
2683static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2684{
2685 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2686 struct hda_input_mux *imux = &spec->private_imux;
2687 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2688 int i, j, k;
2689
2690 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2691 int index;
2692
2693 if (!cfg->input_pins[i])
2694 continue;
2695 index = -1;
2696 for (j = 0; j < spec->num_muxes; j++) {
2697 int num_cons;
2698 num_cons = snd_hda_get_connections(codec,
2699 spec->mux_nids[j],
2700 con_lst,
2701 HDA_MAX_NUM_INPUTS);
2702 for (k = 0; k < num_cons; k++)
2703 if (con_lst[k] == cfg->input_pins[i]) {
2704 index = k;
2705 goto found;
2706 }
c7d4b2fa 2707 }
314634bc
TI		 2708 continue;
2709 found:
2710 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2711 imux->items[imux->num_items].index = index;
2712 imux->num_items++;
c7d4b2fa
M		 2713 }
2714
7b043899 2715 if (imux->num_items) {
62fe78e9
SR		 2716 /*
2717 * Set the current input for the muxes.
2718 * The STAC9221 has two input muxes with identical source
2719 * NID lists. Hopefully this won't get confused.
2720 */
2721 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2722 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2723 AC_VERB_SET_CONNECT_SEL,
2724 imux->items[0].index);
62fe78e9
SR		 2725 }
2726 }
2727
c7d4b2fa
M		 2728 return 0;
2729}
2730
c7d4b2fa
M		 2731static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2732{
2733 struct sigmatel_spec *spec = codec->spec;
2734 int i;
2735
2736 for (i = 0; i < spec->autocfg.line_outs; i++) {
2737 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2738 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2739 }
2740}
2741
2742static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2743{
2744 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2745 int i;
c7d4b2fa 2746
eb06ed8f
TI		 2747 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2748 hda_nid_t pin;
2749 pin = spec->autocfg.hp_pins[i];
2750 if (pin) /* connect to front */
2751 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2752 }
2753 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2754 hda_nid_t pin;
2755 pin = spec->autocfg.speaker_pins[i];
2756 if (pin) /* connect to front */
2757 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2758 }
c7d4b2fa
M		 2759}
2760
3cc08dc6 2761static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2762{
2763 struct sigmatel_spec *spec = codec->spec;
2764 int err;
bcecd9bd 2765 int hp_speaker_swap = 0;
c7d4b2fa 2766
8b65727b
MP		 2767 if ((err = snd_hda_parse_pin_def_config(codec,
2768 &spec->autocfg,
2769 spec->dmic_nids)) < 0)
c7d4b2fa 2770 return err;
82bc955f 2771 if (! spec->autocfg.line_outs)
869264c4 2772 return 0; /* can't find valid pin config */
19039bd0 2773
bcecd9bd
JZ		 2774 /* If we have no real line-out pin and multiple hp-outs, HPs should
2775 * be set up as multi-channel outputs.
2776 */
2777 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2778 spec->autocfg.hp_outs > 1) {
2779 /* Copy hp_outs to line_outs, backup line_outs in
2780 * speaker_outs so that the following routines can handle
2781 * HP pins as primary outputs.
2782 */
2783 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2784 sizeof(spec->autocfg.line_out_pins));
2785 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2786 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2787 sizeof(spec->autocfg.hp_pins));
2788 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2789 hp_speaker_swap = 1;
2790 }
09a99959
MR		 2791 if (spec->autocfg.mono_out_pin) {
2792 int dir = (get_wcaps(codec, spec->autocfg.mono_out_pin)
2793 & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
2794 u32 caps = query_amp_caps(codec,
2795 spec->autocfg.mono_out_pin, dir);
2796 hda_nid_t conn_list[1];
2797
2798 /* get the mixer node and then the mono mux if it exists */
2799 if (snd_hda_get_connections(codec,
2800 spec->autocfg.mono_out_pin, conn_list, 1) &&
2801 snd_hda_get_connections(codec, conn_list[0],
2802 conn_list, 1)) {
2803
2804 int wcaps = get_wcaps(codec, conn_list[0]);
2805 int wid_type = (wcaps & AC_WCAP_TYPE)
2806 >> AC_WCAP_TYPE_SHIFT;
2807 /* LR swap check, some stac925x have a mux that
2808 * changes the DACs output path instead of the
2809 * mono-mux path.
2810 */
2811 if (wid_type == AC_WID_AUD_SEL &&
2812 !(wcaps & AC_WCAP_LR_SWAP))
2813 spec->mono_nid = conn_list[0];
2814 }
2815 /* all mono outs have a least a mute/unmute switch */
2816 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2817 "Mono Playback Switch",
2818 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2819 1, 0, dir));
2820 if (err < 0)
2821 return err;
2822 /* check to see if there is volume support for the amp */
2823 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2824 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2825 "Mono Playback Volume",
2826 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2827 1, 0, dir));
2828 if (err < 0)
2829 return err;
2830 }
2831
2832 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
2833 AC_PINCTL_OUT_EN);
2834 }
bcecd9bd 2835
403d1944
MP		 2836 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2837 return err;
19039bd0
TI		 2838 if (spec->multiout.num_dacs == 0)
2839 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2840 return err;
c7d4b2fa 2841
0fb87bb4
ML		 2842 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2843
2844 if (err < 0)
2845 return err;
2846
bcecd9bd
JZ		 2847 if (hp_speaker_swap == 1) {
2848 /* Restore the hp_outs and line_outs */
2849 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2850 sizeof(spec->autocfg.line_out_pins));
2851 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2852 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2853 sizeof(spec->autocfg.speaker_pins));
2854 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2855 memset(spec->autocfg.speaker_pins, 0,
2856 sizeof(spec->autocfg.speaker_pins));
2857 spec->autocfg.speaker_outs = 0;
2858 }
2859
0fb87bb4
ML		 2860 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2861
2862 if (err < 0)
2863 return err;
2864
2865 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2866
2867 if (err < 0)
c7d4b2fa
M		 2868 return err;
2869
b22b4821
MR		 2870 if (spec->mono_nid > 0) {
2871 err = stac92xx_auto_create_mono_output_ctls(codec);
2872 if (err < 0)
2873 return err;
2874 }
2875
8b65727b
MP		 2876 if (spec->num_dmics > 0)
2877 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2878 &spec->autocfg)) < 0)
2879 return err;
2880
c7d4b2fa 2881 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2882 if (spec->multiout.max_channels > 2)
c7d4b2fa 2883 spec->surr_switch = 1;
c7d4b2fa 2884
82bc955f 2885 if (spec->autocfg.dig_out_pin)
3cc08dc6 2886 spec->multiout.dig_out_nid = dig_out;
82bc955f 2887 if (spec->autocfg.dig_in_pin)
3cc08dc6 2888 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2889
2890 if (spec->kctl_alloc)
2891 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2892
2893 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2894 if (!spec->dinput_mux)
2895 spec->dinput_mux = &spec->private_dimux;
b22b4821 2896 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 2897
2898 return 1;
2899}
2900
82bc955f
TI		 2901/* add playback controls for HP output */
2902static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2903 struct auto_pin_cfg *cfg)
2904{
2905 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2906 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2907 unsigned int wid_caps;
2908
2909 if (! pin)
2910 return 0;
2911
2912 wid_caps = get_wcaps(codec, pin);
505cb341 2913 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2914 spec->hp_detect = 1;
82bc955f
TI		 2915
2916 return 0;
2917}
2918
160ea0dc
RF		 2919/* add playback controls for LFE output */
2920static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2921 struct auto_pin_cfg *cfg)
2922{
2923 struct sigmatel_spec *spec = codec->spec;
2924 int err;
2925 hda_nid_t lfe_pin = 0x0;
2926 int i;
2927
2928 /*
2929 * search speaker outs and line outs for a mono speaker pin
2930 * with an amp. If one is found, add LFE controls
2931 * for it.
2932 */
2933 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2934 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 2935 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 2936 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2937 if (wcaps == AC_WCAP_OUT_AMP)
2938 /* found a mono speaker with an amp, must be lfe */
2939 lfe_pin = pin;
2940 }
2941
2942 /* if speaker_outs is 0, then speakers may be in line_outs */
2943 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2944 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2945 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 2946 unsigned int defcfg;
8b551785 2947 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 2948 AC_VERB_GET_CONFIG_DEFAULT,
2949 0x00);
8b551785 2950 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 2951 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 2952 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2953 if (wcaps == AC_WCAP_OUT_AMP)
2954 /* found a mono speaker with an amp,
2955 must be lfe */
2956 lfe_pin = pin;
2957 }
2958 }
2959 }
2960
2961 if (lfe_pin) {
eb06ed8f 2962 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2963 if (err < 0)
2964 return err;
2965 }
2966
2967 return 0;
2968}
2969
c7d4b2fa
M		 2970static int stac9200_parse_auto_config(struct hda_codec *codec)
2971{
2972 struct sigmatel_spec *spec = codec->spec;
2973 int err;
2974
df694daa 2975 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2976 return err;
2977
2978 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2979 return err;
2980
82bc955f
TI		 2981 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2982 return err;
2983
160ea0dc
RF		 2984 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2985 return err;
2986
82bc955f 2987 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2988 spec->multiout.dig_out_nid = 0x05;
82bc955f 2989 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2990 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2991
2992 if (spec->kctl_alloc)
2993 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2994
2995 spec->input_mux = &spec->private_imux;
8b65727b 2996 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2997
2998 return 1;
2999}
3000
62fe78e9
SR		 3001/*
3002 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3003 * funky external mute control using GPIO pins.
3004 */
3005
76e1ddfb 3006static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3007 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3008{
3009 unsigned int gpiostate, gpiomask, gpiodir;
3010
3011 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3012 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3013 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3014
3015 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3016 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3017 gpiomask |= mask;
62fe78e9
SR		 3018
3019 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3020 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3021 gpiodir |= dir_mask;
62fe78e9 3022
76e1ddfb 3023 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3024 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3025
3026 snd_hda_codec_write(codec, codec->afg, 0,
3027 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3028 snd_hda_codec_read(codec, codec->afg, 0,
3029 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3030
3031 msleep(1);
3032
76e1ddfb
TI		 3033 snd_hda_codec_read(codec, codec->afg, 0,
3034 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3035}
3036
314634bc
TI		 3037static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3038 unsigned int event)
3039{
3040 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3041 snd_hda_codec_write_cache(codec, nid, 0,
3042 AC_VERB_SET_UNSOLICITED_ENABLE,
3043 (AC_USRSP_EN | event));
314634bc
TI		 3044}
3045
a64135a2
MR		 3046static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3047{
3048 int i;
3049 for (i = 0; i < cfg->hp_outs; i++)
3050 if (cfg->hp_pins[i] == nid)
3051 return 1; /* nid is a HP-Out */
3052
3053 return 0; /* nid is not a HP-Out */
3054};
3055
b76c850f
MR		 3056static void stac92xx_power_down(struct hda_codec *codec)
3057{
3058 struct sigmatel_spec *spec = codec->spec;
3059
3060 /* power down inactive DACs */
3061 hda_nid_t *dac;
3062 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3063 if (!is_in_dac_nids(spec, *dac) &&
3064 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3065 snd_hda_codec_write_cache(codec, *dac, 0,
3066 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3067}
3068
c7d4b2fa
M		 3069static int stac92xx_init(struct hda_codec *codec)
3070{
3071 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3072 struct auto_pin_cfg *cfg = &spec->autocfg;
3073 int i;
c7d4b2fa 3074
c7d4b2fa
M		 3075 snd_hda_sequence_write(codec, spec->init);
3076
82bc955f
TI		 3077 /* set up pins */
3078 if (spec->hp_detect) {
505cb341 3079 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3080 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3081 enable_pin_detect(codec, cfg->hp_pins[i],
3082 STAC_HP_EVENT);
0a07acaf
TI		 3083 /* force to enable the first line-out; the others are set up
3084 * in unsol_event
3085 */
3086 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3087 AC_PINCTL_OUT_EN);
eb995a8c 3088 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3089 /* fake event to set up pins */
3090 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3091 } else {
3092 stac92xx_auto_init_multi_out(codec);
3093 stac92xx_auto_init_hp_out(codec);
3094 }
3095 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3096 hda_nid_t nid = cfg->input_pins[i];
3097 if (nid) {
3098 unsigned int pinctl = AC_PINCTL_IN_EN;
3099 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3100 pinctl |= stac92xx_get_vref(codec, nid);
3101 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3102 }
82bc955f 3103 }
a64135a2
MR		 3104 for (i = 0; i < spec->num_dmics; i++)
3105 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3106 AC_PINCTL_IN_EN);
3107 for (i = 0; i < spec->num_pwrs; i++) {
3108 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3109 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3110 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3111 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3112 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3113 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3114 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3115 /* outputs are only ports capable of power management
3116 * any attempts on powering down a input port cause the
3117 * referenced VREF to act quirky.
3118 */
3119 if (pinctl & AC_PINCTL_IN_EN)
3120 continue;
aafc4412
MR		 3121 /* skip any ports that don't have jacks since presence
3122 * detection is useless */
3123 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3124 continue;
a64135a2
MR		 3125 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3126 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3127 }
b76c850f
MR		 3128 if (spec->dac_list)
3129 stac92xx_power_down(codec);
82bc955f
TI		 3130 if (cfg->dig_out_pin)
3131 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3132 AC_PINCTL_OUT_EN);
3133 if (cfg->dig_in_pin)
3134 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3135 AC_PINCTL_IN_EN);
3136
4fe5195c
MR		 3137 stac_gpio_set(codec, spec->gpio_mask,
3138 spec->gpio_dir, spec->gpio_data);
62fe78e9 3139
c7d4b2fa
M		 3140 return 0;
3141}
3142
2f2f4251
M		 3143static void stac92xx_free(struct hda_codec *codec)
3144{
c7d4b2fa
M		 3145 struct sigmatel_spec *spec = codec->spec;
3146 int i;
3147
3148 if (! spec)
3149 return;
3150
3151 if (spec->kctl_alloc) {
3152 for (i = 0; i < spec->num_kctl_used; i++)
3153 kfree(spec->kctl_alloc[i].name);
3154 kfree(spec->kctl_alloc);
3155 }
3156
11b44bbd
RF		 3157 if (spec->bios_pin_configs)
3158 kfree(spec->bios_pin_configs);
3159
c7d4b2fa 3160 kfree(spec);
2f2f4251
M		 3161}
3162
4e55096e
M		 3163static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3164 unsigned int flag)
3165{
3166 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3167 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3168
f9acba43
TI		 3169 if (pin_ctl & AC_PINCTL_IN_EN) {
3170 /*
3171 * we need to check the current set-up direction of
3172 * shared input pins since they can be switched via
3173 * "xxx as Output" mixer switch
3174 */
3175 struct sigmatel_spec *spec = codec->spec;
3176 struct auto_pin_cfg *cfg = &spec->autocfg;
3177 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3178 spec->line_switch) ||
3179 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3180 spec->mic_switch))
3181 return;
3182 }
3183
7b043899
SL		 3184 /* if setting pin direction bits, clear the current
3185 direction bits first */
3186 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3187 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3188
82beb8fd 3189 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3190 AC_VERB_SET_PIN_WIDGET_CONTROL,
3191 pin_ctl | flag);
3192}
3193
3194static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3195 unsigned int flag)
3196{
3197 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3198 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3199 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3200 AC_VERB_SET_PIN_WIDGET_CONTROL,
3201 pin_ctl & ~flag);
3202}
3203
40c1d308 3204static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3205{
3206 if (!nid)
3207 return 0;
3208 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3209 & (1 << 31)) {
3210 unsigned int pinctl;
3211 pinctl = snd_hda_codec_read(codec, nid, 0,
3212 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3213 if (pinctl & AC_PINCTL_IN_EN)
3214 return 0; /* mic- or line-input */
3215 else
3216 return 1; /* HP-output */
3217 }
314634bc
TI		 3218 return 0;
3219}
3220
3221static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3222{
3223 struct sigmatel_spec *spec = codec->spec;
3224 struct auto_pin_cfg *cfg = &spec->autocfg;
7c2ba97b 3225 int nid = cfg->hp_pins[cfg->hp_outs - 1];
4e55096e
M		 3226 int i, presence;
3227
eb06ed8f 3228 presence = 0;
4fe5195c
MR		 3229 if (spec->gpio_mute)
3230 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3231 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3232
eb06ed8f 3233 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3234 if (presence)
3235 break;
7c2ba97b
MR		 3236 if (spec->hp_switch && cfg->hp_pins[i] == nid)
3237 break;
4fe5195c 3238 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3239 }
4e55096e
M		 3240
3241 if (presence) {
3242 /* disable lineouts, enable hp */
7c2ba97b
MR		 3243 if (spec->hp_switch)
3244 stac92xx_reset_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3245 for (i = 0; i < cfg->line_outs; i++)
3246 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3247 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3248 for (i = 0; i < cfg->speaker_outs; i++)
3249 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3250 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3251 if (spec->eapd_mask)
3252 stac_gpio_set(codec, spec->gpio_mask,
3253 spec->gpio_dir, spec->gpio_data &
3254 ~spec->eapd_mask);
4e55096e
M		 3255 } else {
3256 /* enable lineouts, disable hp */
7c2ba97b
MR		 3257 if (spec->hp_switch)
3258 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3259 for (i = 0; i < cfg->line_outs; i++)
3260 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3261 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3262 for (i = 0; i < cfg->speaker_outs; i++)
3263 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3264 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3265 if (spec->eapd_mask)
3266 stac_gpio_set(codec, spec->gpio_mask,
3267 spec->gpio_dir, spec->gpio_data |
3268 spec->eapd_mask);
4e55096e 3269 }
7c2ba97b
MR		 3270 if (!spec->hp_switch && cfg->hp_outs > 1 && presence)
3271 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3272}
3273
a64135a2
MR		 3274static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3275{
3276 struct sigmatel_spec *spec = codec->spec;
3277 hda_nid_t nid = spec->pwr_nids[idx];
3278 int presence, val;
3279 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3280 & 0x000000ff;
3281 presence = get_hp_pin_presence(codec, nid);
3282 idx = 1 << idx;
3283
3284 if (presence)
3285 val &= ~idx;
3286 else
3287 val |= idx;
3288
3289 /* power down unused output ports */
3290 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3291};
3292
314634bc
TI		 3293static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3294{
a64135a2
MR		 3295 struct sigmatel_spec *spec = codec->spec;
3296 int idx = res >> 26 & 0x0f;
3297
3298 switch ((res >> 26) & 0x30) {
314634bc
TI		 3299 case STAC_HP_EVENT:
3300 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3301 /* fallthru */
3302 case STAC_PWR_EVENT:
3303 if (spec->num_pwrs > 0)
3304 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3305 }
3306}
3307
cb53c626 3308#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3309static int stac92xx_resume(struct hda_codec *codec)
3310{
dc81bed1
TI		 3311 struct sigmatel_spec *spec = codec->spec;
3312
11b44bbd 3313 stac92xx_set_config_regs(codec);
dc81bed1 3314 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3315 stac_gpio_set(codec, spec->gpio_mask,
3316 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3317 snd_hda_codec_resume_amp(codec);
3318 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3319 /* power down inactive DACs */
3320 if (spec->dac_list)
3321 stac92xx_power_down(codec);
dc81bed1
TI		 3322 /* invoke unsolicited event to reset the HP state */
3323 if (spec->hp_detect)
3324 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3325 return 0;
3326}
3327#endif
3328
2f2f4251
M		 3329static struct hda_codec_ops stac92xx_patch_ops = {
3330 .build_controls = stac92xx_build_controls,
3331 .build_pcms = stac92xx_build_pcms,
3332 .init = stac92xx_init,
3333 .free = stac92xx_free,
4e55096e 3334 .unsol_event = stac92xx_unsol_event,
cb53c626 3335#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3336 .resume = stac92xx_resume,
3337#endif
2f2f4251
M		 3338};
3339
3340static int patch_stac9200(struct hda_codec *codec)
3341{
3342 struct sigmatel_spec *spec;
c7d4b2fa 3343 int err;
2f2f4251 3344
e560d8d8 3345 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3346 if (spec == NULL)
3347 return -ENOMEM;
3348
3349 codec->spec = spec;
a4eed138 3350 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3351 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3352 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3353 stac9200_models,
3354 stac9200_cfg_tbl);
11b44bbd
RF		 3355 if (spec->board_config < 0) {
3356 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3357 err = stac92xx_save_bios_config_regs(codec);
3358 if (err < 0) {
3359 stac92xx_free(codec);
3360 return err;
3361 }
3362 spec->pin_configs = spec->bios_pin_configs;
3363 } else {
403d1944
MP		 3364 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3365 stac92xx_set_config_regs(codec);
3366 }
2f2f4251
M		 3367
3368 spec->multiout.max_channels = 2;
3369 spec->multiout.num_dacs = 1;
3370 spec->multiout.dac_nids = stac9200_dac_nids;
3371 spec->adc_nids = stac9200_adc_nids;
3372 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3373 spec->num_muxes = 1;
8b65727b 3374 spec->num_dmics = 0;
9e05b7a3 3375 spec->num_adcs = 1;
a64135a2 3376 spec->num_pwrs = 0;
c7d4b2fa 3377
bf277785
TD		 3378 if (spec->board_config == STAC_9200_GATEWAY ||
3379 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3380 spec->init = stac9200_eapd_init;
3381 else
3382 spec->init = stac9200_core_init;
2f2f4251 3383 spec->mixer = stac9200_mixer;
c7d4b2fa 3384
117f257d
TI		 3385 if (spec->board_config == STAC_9200_PANASONIC) {
3386 spec->gpio_mask = spec->gpio_dir = 0x09;
3387 spec->gpio_data = 0x00;
3388 }
3389
c7d4b2fa
M		 3390 err = stac9200_parse_auto_config(codec);
3391 if (err < 0) {
3392 stac92xx_free(codec);
3393 return err;
3394 }
2f2f4251
M		 3395
3396 codec->patch_ops = stac92xx_patch_ops;
3397
3398 return 0;
3399}
3400
8e21c34c
TD		 3401static int patch_stac925x(struct hda_codec *codec)
3402{
3403 struct sigmatel_spec *spec;
3404 int err;
3405
3406 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3407 if (spec == NULL)
3408 return -ENOMEM;
3409
3410 codec->spec = spec;
a4eed138 3411 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3412 spec->pin_nids = stac925x_pin_nids;
3413 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3414 stac925x_models,
3415 stac925x_cfg_tbl);
9e507abd 3416 again:
8e21c34c 3417 if (spec->board_config < 0) {
2c11f955
TD		 3418 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3419 "using BIOS defaults\n");
8e21c34c
TD		 3420 err = stac92xx_save_bios_config_regs(codec);
3421 if (err < 0) {
3422 stac92xx_free(codec);
3423 return err;
3424 }
3425 spec->pin_configs = spec->bios_pin_configs;
3426 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3427 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3428 stac92xx_set_config_regs(codec);
3429 }
3430
3431 spec->multiout.max_channels = 2;
3432 spec->multiout.num_dacs = 1;
3433 spec->multiout.dac_nids = stac925x_dac_nids;
3434 spec->adc_nids = stac925x_adc_nids;
3435 spec->mux_nids = stac925x_mux_nids;
3436 spec->num_muxes = 1;
9e05b7a3 3437 spec->num_adcs = 1;
a64135a2 3438 spec->num_pwrs = 0;
2c11f955
TD		 3439 switch (codec->vendor_id) {
3440 case 0x83847632: /* STAC9202 */
3441 case 0x83847633: /* STAC9202D */
3442 case 0x83847636: /* STAC9251 */
3443 case 0x83847637: /* STAC9251D */
f6e9852a 3444 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3445 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3446 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3447 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3448 break;
3449 default:
3450 spec->num_dmics = 0;
3451 break;
3452 }
8e21c34c
TD		 3453
3454 spec->init = stac925x_core_init;
3455 spec->mixer = stac925x_mixer;
3456
3457 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3458 if (!err) {
3459 if (spec->board_config < 0) {
3460 printk(KERN_WARNING "hda_codec: No auto-config is "
3461 "available, default to model=ref\n");
3462 spec->board_config = STAC_925x_REF;
3463 goto again;
3464 }
3465 err = -EINVAL;
3466 }
8e21c34c
TD		 3467 if (err < 0) {
3468 stac92xx_free(codec);
3469 return err;
3470 }
3471
3472 codec->patch_ops = stac92xx_patch_ops;
3473
3474 return 0;
3475}
3476
e1f0d669
MR		 3477static struct hda_input_mux stac92hd73xx_dmux = {
3478 .num_items = 4,
3479 .items = {
3480 { "Analog Inputs", 0x0b },
3481 { "CD", 0x08 },
3482 { "Digital Mic 1", 0x09 },
3483 { "Digital Mic 2", 0x0a },
3484 }
3485};
3486
3487static int patch_stac92hd73xx(struct hda_codec *codec)
3488{
3489 struct sigmatel_spec *spec;
3490 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3491 int err = 0;
3492
3493 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3494 if (spec == NULL)
3495 return -ENOMEM;
3496
3497 codec->spec = spec;
3498 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3499 spec->pin_nids = stac92hd73xx_pin_nids;
3500 spec->board_config = snd_hda_check_board_config(codec,
3501 STAC_92HD73XX_MODELS,
3502 stac92hd73xx_models,
3503 stac92hd73xx_cfg_tbl);
3504again:
3505 if (spec->board_config < 0) {
3506 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3507 " STAC92HD73XX, using BIOS defaults\n");
3508 err = stac92xx_save_bios_config_regs(codec);
3509 if (err < 0) {
3510 stac92xx_free(codec);
3511 return err;
3512 }
3513 spec->pin_configs = spec->bios_pin_configs;
3514 } else {
3515 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3516 stac92xx_set_config_regs(codec);
3517 }
3518
3519 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3520 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3521
3522 if (spec->multiout.num_dacs < 0) {
3523 printk(KERN_WARNING "hda_codec: Could not determine "
3524 "number of channels defaulting to DAC count\n");
3525 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3526 }
3527
3528 switch (spec->multiout.num_dacs) {
3529 case 0x3: /* 6 Channel */
7c2ba97b 3530 spec->multiout.hp_nid = 0x17;
e1f0d669
MR		 3531 spec->mixer = stac92hd73xx_6ch_mixer;
3532 spec->init = stac92hd73xx_6ch_core_init;
3533 break;
3534 case 0x4: /* 8 Channel */
3535 spec->multiout.hp_nid = 0x18;
3536 spec->mixer = stac92hd73xx_8ch_mixer;
3537 spec->init = stac92hd73xx_8ch_core_init;
3538 break;
3539 case 0x5: /* 10 Channel */
3540 spec->multiout.hp_nid = 0x19;
3541 spec->mixer = stac92hd73xx_10ch_mixer;
3542 spec->init = stac92hd73xx_10ch_core_init;
3543 };
3544
3545 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3546 spec->aloopback_mask = 0x01;
3547 spec->aloopback_shift = 8;
3548
3549 spec->mux_nids = stac92hd73xx_mux_nids;
3550 spec->adc_nids = stac92hd73xx_adc_nids;
3551 spec->dmic_nids = stac92hd73xx_dmic_nids;
3552 spec->dmux_nids = stac92hd73xx_dmux_nids;
3553
3554 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3555 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 3556 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3557 spec->dinput_mux = &stac92hd73xx_dmux;
3558 /* GPIO0 High = Enable EAPD */
0fc9dec4 3559 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 3560 spec->gpio_data = 0x01;
e1f0d669 3561
a7662640
MR		 3562 switch (spec->board_config) {
3563 case STAC_DELL_M6:
d654a660 3564 spec->init = dell_eq_core_init;
a7662640
MR		 3565 switch (codec->subsystem_id) {
3566 case 0x1028025e: /* Analog Mics */
3567 case 0x1028025f:
3568 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3569 spec->num_dmics = 0;
3570 break;
d654a660 3571 case 0x10280271: /* Digital Mics */
a7662640 3572 case 0x10280272:
d654a660
MR		 3573 spec->init = dell_m6_core_init;
3574 /* fall-through */
3575 case 0x10280254:
3576 case 0x10280255:
a7662640
MR		 3577 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3578 spec->num_dmics = 1;
3579 break;
3580 case 0x10280256: /* Both */
3581 case 0x10280057:
3582 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3583 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3584 spec->num_dmics = 1;
3585 break;
3586 }
3587 break;
3588 default:
3589 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
3590 }
3591
a64135a2
MR		 3592 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3593 spec->pwr_nids = stac92hd73xx_pwr_nids;
3594
e1f0d669
MR		 3595 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3596
3597 if (!err) {
3598 if (spec->board_config < 0) {
3599 printk(KERN_WARNING "hda_codec: No auto-config is "
3600 "available, default to model=ref\n");
3601 spec->board_config = STAC_92HD73XX_REF;
3602 goto again;
3603 }
3604 err = -EINVAL;
3605 }
3606
3607 if (err < 0) {
3608 stac92xx_free(codec);
3609 return err;
3610 }
3611
3612 codec->patch_ops = stac92xx_patch_ops;
3613
3614 return 0;
3615}
3616
e035b841
MR		 3617static int patch_stac92hd71bxx(struct hda_codec *codec)
3618{
3619 struct sigmatel_spec *spec;
3620 int err = 0;
3621
3622 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3623 if (spec == NULL)
3624 return -ENOMEM;
3625
3626 codec->spec = spec;
3627 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 3628 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 3629 spec->pin_nids = stac92hd71bxx_pin_nids;
3630 spec->board_config = snd_hda_check_board_config(codec,
3631 STAC_92HD71BXX_MODELS,
3632 stac92hd71bxx_models,
3633 stac92hd71bxx_cfg_tbl);
3634again:
3635 if (spec->board_config < 0) {
3636 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3637 " STAC92HD71BXX, using BIOS defaults\n");
3638 err = stac92xx_save_bios_config_regs(codec);
3639 if (err < 0) {
3640 stac92xx_free(codec);
3641 return err;
3642 }
3643 spec->pin_configs = spec->bios_pin_configs;
3644 } else {
3645 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3646 stac92xx_set_config_regs(codec);
3647 }
3648
541eee87
MR		 3649 switch (codec->vendor_id) {
3650 case 0x111d76b6: /* 4 Port without Analog Mixer */
3651 case 0x111d76b7:
3652 case 0x111d76b4: /* 6 Port without Analog Mixer */
3653 case 0x111d76b5:
3654 spec->mixer = stac92hd71bxx_mixer;
3655 spec->init = stac92hd71bxx_core_init;
3656 break;
aafc4412
MR		 3657 case 0x111d7608: /* 5 Port with Analog Mixer */
3658 /* no output amps */
3659 spec->num_pwrs = 0;
3660 spec->mixer = stac92hd71bxx_analog_mixer;
3661
3662 /* disable VSW */
3663 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
3664 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
3665 break;
3666 case 0x111d7603: /* 6 Port with Analog Mixer */
3667 /* no output amps */
3668 spec->num_pwrs = 0;
3669 /* fallthru */
541eee87
MR		 3670 default:
3671 spec->mixer = stac92hd71bxx_analog_mixer;
3672 spec->init = stac92hd71bxx_analog_core_init;
3673 }
3674
3675 spec->aloopback_mask = 0x20;
3676 spec->aloopback_shift = 0;
3677
4fe5195c 3678 /* GPIO0 High = EAPD */
0fc9dec4
MR		 3679 spec->gpio_mask = 0x01;
3680 spec->gpio_dir = 0x01;
0fc9dec4 3681 spec->gpio_data = 0x01;
e035b841 3682
e035b841
MR		 3683 spec->mux_nids = stac92hd71bxx_mux_nids;
3684 spec->adc_nids = stac92hd71bxx_adc_nids;
3685 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3686 spec->dmux_nids = stac92hd71bxx_dmux_nids;
aafc4412 3687 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 3688
3689 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3690 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3691 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3692 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3693
aea7bb0a 3694 spec->multiout.num_dacs = 1;
e035b841
MR		 3695 spec->multiout.hp_nid = 0x11;
3696 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3697
3698 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3699 if (!err) {
3700 if (spec->board_config < 0) {
3701 printk(KERN_WARNING "hda_codec: No auto-config is "
3702 "available, default to model=ref\n");
3703 spec->board_config = STAC_92HD71BXX_REF;
3704 goto again;
3705 }
3706 err = -EINVAL;
3707 }
3708
3709 if (err < 0) {
3710 stac92xx_free(codec);
3711 return err;
3712 }
3713
3714 codec->patch_ops = stac92xx_patch_ops;
3715
3716 return 0;
3717};
3718
2f2f4251
M		 3719static int patch_stac922x(struct hda_codec *codec)
3720{
3721 struct sigmatel_spec *spec;
c7d4b2fa 3722 int err;
2f2f4251 3723
e560d8d8 3724 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3725 if (spec == NULL)
3726 return -ENOMEM;
3727
3728 codec->spec = spec;
a4eed138 3729 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3730 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3731 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3732 stac922x_models,
3733 stac922x_cfg_tbl);
536319af 3734 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 3735 spec->gpio_mask = spec->gpio_dir = 0x03;
3736 spec->gpio_data = 0x03;
3fc24d85
TI		 3737 /* Intel Macs have all same PCI SSID, so we need to check
3738 * codec SSID to distinguish the exact models
3739 */
6f0778d8 3740 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3741 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3742
3743 case 0x106b0800:
3744 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3745 break;
5d5d3bc3
IZ		 3746 case 0x106b0600:
3747 case 0x106b0700:
3748 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3749 break;
5d5d3bc3
IZ		 3750 case 0x106b0e00:
3751 case 0x106b0f00:
3752 case 0x106b1600:
3753 case 0x106b1700:
3754 case 0x106b0200:
3755 case 0x106b1e00:
3756 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3757 break;
5d5d3bc3
IZ		 3758 case 0x106b1a00:
3759 case 0x00000100:
3760 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3761 break;
5d5d3bc3
IZ		 3762 case 0x106b0a00:
3763 case 0x106b2200:
3764 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3765 break;
536319af
NB		 3766 default:
3767 spec->board_config = STAC_INTEL_MAC_V3;
3768 break;
3fc24d85
TI		 3769 }
3770 }
3771
9e507abd 3772 again:
11b44bbd
RF		 3773 if (spec->board_config < 0) {
3774 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3775 "using BIOS defaults\n");
3776 err = stac92xx_save_bios_config_regs(codec);
3777 if (err < 0) {
3778 stac92xx_free(codec);
3779 return err;
3780 }
3781 spec->pin_configs = spec->bios_pin_configs;
3782 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3783 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3784 stac92xx_set_config_regs(codec);
3785 }
2f2f4251 3786
c7d4b2fa
M		 3787 spec->adc_nids = stac922x_adc_nids;
3788 spec->mux_nids = stac922x_mux_nids;
2549413e 3789 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3790 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3791 spec->num_dmics = 0;
a64135a2 3792 spec->num_pwrs = 0;
c7d4b2fa
M		 3793
3794 spec->init = stac922x_core_init;
2f2f4251 3795 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3796
3797 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3798
3cc08dc6 3799 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3800 if (!err) {
3801 if (spec->board_config < 0) {
3802 printk(KERN_WARNING "hda_codec: No auto-config is "
3803 "available, default to model=ref\n");
3804 spec->board_config = STAC_D945_REF;
3805 goto again;
3806 }
3807 err = -EINVAL;
3808 }
3cc08dc6
MP		 3809 if (err < 0) {
3810 stac92xx_free(codec);
3811 return err;
3812 }
3813
3814 codec->patch_ops = stac92xx_patch_ops;
3815
807a4636
TI		 3816 /* Fix Mux capture level; max to 2 */
3817 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3818 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3819 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3820 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3821 (0 << AC_AMPCAP_MUTE_SHIFT));
3822
3cc08dc6
MP		 3823 return 0;
3824}
3825
3826static int patch_stac927x(struct hda_codec *codec)
3827{
3828 struct sigmatel_spec *spec;
3829 int err;
3830
3831 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3832 if (spec == NULL)
3833 return -ENOMEM;
3834
3835 codec->spec = spec;
a4eed138 3836 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3837 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3838 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3839 stac927x_models,
3840 stac927x_cfg_tbl);
9e507abd 3841 again:
8e9068b1
MR		 3842 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3843 if (spec->board_config < 0)
3844 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3845 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3846 err = stac92xx_save_bios_config_regs(codec);
3847 if (err < 0) {
3848 stac92xx_free(codec);
3849 return err;
3850 }
3851 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3852 } else {
3cc08dc6
MP		 3853 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3854 stac92xx_set_config_regs(codec);
3855 }
3856
8e9068b1
MR		 3857 spec->adc_nids = stac927x_adc_nids;
3858 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3859 spec->mux_nids = stac927x_mux_nids;
3860 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
b76c850f 3861 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 3862 spec->multiout.dac_nids = spec->dac_nids;
3863
81d3dbde 3864 switch (spec->board_config) {
93ed1503 3865 case STAC_D965_3ST:
93ed1503 3866 case STAC_D965_5ST:
8e9068b1 3867 /* GPIO0 High = Enable EAPD */
0fc9dec4 3868 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 3869 spec->gpio_data = 0x01;
8e9068b1
MR		 3870 spec->num_dmics = 0;
3871
93ed1503 3872 spec->init = d965_core_init;
9e05b7a3 3873 spec->mixer = stac927x_mixer;
81d3dbde 3874 break;
8e9068b1 3875 case STAC_DELL_BIOS:
780c8be4
MR		 3876 switch (codec->subsystem_id) {
3877 case 0x10280209:
3878 case 0x1028022e:
3879 /* correct the device field to SPDIF out */
3880 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
3881 break;
3882 };
03d7ca17
MR		 3883 /* configure the analog microphone on some laptops */
3884 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 3885 /* correct the front output jack as a hp out */
7989fba9 3886 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 3887 /* correct the front input jack as a mic */
3888 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3889 /* fallthru */
8e9068b1
MR		 3890 case STAC_DELL_3ST:
3891 /* GPIO2 High = Enable EAPD */
0fc9dec4 3892 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 3893 spec->gpio_data = 0x04;
7f16859a
MR		 3894 spec->dmic_nids = stac927x_dmic_nids;
3895 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3896
8e9068b1
MR		 3897 spec->init = d965_core_init;
3898 spec->mixer = stac927x_mixer;
3899 spec->dmux_nids = stac927x_dmux_nids;
1697055e 3900 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 3901 break;
3902 default:
f1f208d0 3903 /* GPIO0 High = Enable EAPD */
0fc9dec4 3904 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 3905 spec->gpio_data = 0x01;
8e9068b1
MR		 3906 spec->num_dmics = 0;
3907
3908 spec->init = stac927x_core_init;
3909 spec->mixer = stac927x_mixer;
7f16859a
MR		 3910 }
3911
a64135a2 3912 spec->num_pwrs = 0;
e1f0d669
MR		 3913 spec->aloopback_mask = 0x40;
3914 spec->aloopback_shift = 0;
8e9068b1 3915
3cc08dc6 3916 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3917 if (!err) {
3918 if (spec->board_config < 0) {
3919 printk(KERN_WARNING "hda_codec: No auto-config is "
3920 "available, default to model=ref\n");
3921 spec->board_config = STAC_D965_REF;
3922 goto again;
3923 }
3924 err = -EINVAL;
3925 }
c7d4b2fa
M		 3926 if (err < 0) {
3927 stac92xx_free(codec);
3928 return err;
3929 }
2f2f4251
M		 3930
3931 codec->patch_ops = stac92xx_patch_ops;
3932
52987656
TI		 3933 /*
3934 * !!FIXME!!
3935 * The STAC927x seem to require fairly long delays for certain
3936 * command sequences. With too short delays (even if the answer
3937 * is set to RIRB properly), it results in the silence output
3938 * on some hardwares like Dell.
3939 *
3940 * The below flag enables the longer delay (see get_response
3941 * in hda_intel.c).
3942 */
3943 codec->bus->needs_damn_long_delay = 1;
3944
2f2f4251
M		 3945 return 0;
3946}
3947
f3302a59
MP		 3948static int patch_stac9205(struct hda_codec *codec)
3949{
3950 struct sigmatel_spec *spec;
8259980e 3951 int err;
f3302a59
MP		 3952
3953 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3954 if (spec == NULL)
3955 return -ENOMEM;
3956
3957 codec->spec = spec;
a4eed138 3958 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3959 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3960 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3961 stac9205_models,
3962 stac9205_cfg_tbl);
9e507abd 3963 again:
11b44bbd
RF		 3964 if (spec->board_config < 0) {
3965 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3966 err = stac92xx_save_bios_config_regs(codec);
3967 if (err < 0) {
3968 stac92xx_free(codec);
3969 return err;
3970 }
3971 spec->pin_configs = spec->bios_pin_configs;
3972 } else {
f3302a59
MP		 3973 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3974 stac92xx_set_config_regs(codec);
3975 }
3976
3977 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3978 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3979 spec->mux_nids = stac9205_mux_nids;
2549413e 3980 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3981 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3982 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3983 spec->dmux_nids = stac9205_dmux_nids;
1697055e 3984 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 3985 spec->num_pwrs = 0;
f3302a59
MP		 3986
3987 spec->init = stac9205_core_init;
3988 spec->mixer = stac9205_mixer;
3989
e1f0d669
MR		 3990 spec->aloopback_mask = 0x40;
3991 spec->aloopback_shift = 0;
f3302a59 3992 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3993
ae0a8ed8 3994 switch (spec->board_config){
ae0a8ed8 3995 case STAC_9205_DELL_M43:
87d48363
MR		 3996 /* Enable SPDIF in/out */
3997 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3998 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3999
4fe5195c
MR		 4000 /* Enable unsol response for GPIO4/Dock HP connection */
4001 snd_hda_codec_write(codec, codec->afg, 0,
4002 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4003 snd_hda_codec_write_cache(codec, codec->afg, 0,
4004 AC_VERB_SET_UNSOLICITED_ENABLE,
4005 (AC_USRSP_EN | STAC_HP_EVENT));
4006
4007 spec->gpio_dir = 0x0b;
0fc9dec4 4008 spec->eapd_mask = 0x01;
4fe5195c
MR		 4009 spec->gpio_mask = 0x1b;
4010 spec->gpio_mute = 0x10;
e2e7d624 4011 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4012 * GPIO3 Low = DRM
87d48363 4013 */
4fe5195c 4014 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4015 break;
4016 default:
4017 /* GPIO0 High = EAPD */
0fc9dec4 4018 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4019 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4020 break;
4021 }
33382403 4022
f3302a59 4023 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 4024 if (!err) {
4025 if (spec->board_config < 0) {
4026 printk(KERN_WARNING "hda_codec: No auto-config is "
4027 "available, default to model=ref\n");
4028 spec->board_config = STAC_9205_REF;
4029 goto again;
4030 }
4031 err = -EINVAL;
4032 }
f3302a59
MP		 4033 if (err < 0) {
4034 stac92xx_free(codec);
4035 return err;
4036 }
4037
4038 codec->patch_ops = stac92xx_patch_ops;
4039
4040 return 0;
4041}
4042
db064e50 4043/*
6d859065 4044 * STAC9872 hack
db064e50
TI		 4045 */
4046
99ccc560 4047/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 4048static hda_nid_t vaio_dacs[] = { 0x2 };
4049#define VAIO_HP_DAC 0x5
4050static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
4051static hda_nid_t vaio_mux_nids[] = { 0x15 };
4052
4053static struct hda_input_mux vaio_mux = {
a3a2f429 4054 .num_items = 3,
db064e50 4055 .items = {
d773781c 4056 /* { "HP", 0x0 }, */
1624cb9a
TI		 4057 { "Mic Jack", 0x1 },
4058 { "Internal Mic", 0x2 },
db064e50
TI		 4059 { "PCM", 0x3 },
4060 }
4061};
4062
4063static struct hda_verb vaio_init[] = {
4064 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 4065 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 4066 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4067 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4068 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4069 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4070 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 4071 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4072 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4073 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4074 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4075 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4076 {}
4077};
4078
6d859065
GM		 4079static struct hda_verb vaio_ar_init[] = {
4080 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
4081 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4082 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4083 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4084/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
4085 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4086 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4087 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4088 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4089/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
4090 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4091 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4092 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4093 {}
4094};
4095
db064e50 4096/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4097static struct hda_bind_ctls vaio_bind_master_vol = {
4098 .ops = &snd_hda_bind_vol,
4099 .values = {
4100 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4101 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4102 0
4103 },
4104};
db064e50
TI		 4105
4106/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4107static struct hda_bind_ctls vaio_bind_master_sw = {
4108 .ops = &snd_hda_bind_sw,
4109 .values = {
4110 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4111 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4112 0,
4113 },
4114};
db064e50
TI		 4115
4116static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 4117 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4118 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 4119 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4120 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4121 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4122 {
4123 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4124 .name = "Capture Source",
4125 .count = 1,
4126 .info = stac92xx_mux_enum_info,
4127 .get = stac92xx_mux_enum_get,
4128 .put = stac92xx_mux_enum_put,
4129 },
4130 {}
4131};
4132
6d859065 4133static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 4134 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4135 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 4136 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4137 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4138 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4139 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
4140 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
4141 {
4142 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4143 .name = "Capture Source",
4144 .count = 1,
4145 .info = stac92xx_mux_enum_info,
4146 .get = stac92xx_mux_enum_get,
4147 .put = stac92xx_mux_enum_put,
4148 },
4149 {}
4150};
4151
4152static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4153 .build_controls = stac92xx_build_controls,
4154 .build_pcms = stac92xx_build_pcms,
4155 .init = stac92xx_init,
4156 .free = stac92xx_free,
cb53c626 4157#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4158 .resume = stac92xx_resume,
4159#endif
4160};
4161
72e7b0dd
TI		 4162static int stac9872_vaio_init(struct hda_codec *codec)
4163{
4164 int err;
4165
4166 err = stac92xx_init(codec);
4167 if (err < 0)
4168 return err;
4169 if (codec->patch_ops.unsol_event)
4170 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4171 return 0;
4172}
4173
4174static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4175{
40c1d308 4176 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4177 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4178 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4179 } else {
4180 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4181 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4182 }
4183}
4184
4185static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4186{
4187 switch (res >> 26) {
4188 case STAC_HP_EVENT:
4189 stac9872_vaio_hp_detect(codec, res);
4190 break;
4191 }
4192}
4193
4194static struct hda_codec_ops stac9872_vaio_patch_ops = {
4195 .build_controls = stac92xx_build_controls,
4196 .build_pcms = stac92xx_build_pcms,
4197 .init = stac9872_vaio_init,
4198 .free = stac92xx_free,
4199 .unsol_event = stac9872_vaio_unsol_event,
4200#ifdef CONFIG_PM
4201 .resume = stac92xx_resume,
4202#endif
4203};
4204
6d859065
GM		 4205enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4206 CXD9872RD_VAIO,
4207 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
4208 STAC9872AK_VAIO,
4209 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
4210 STAC9872K_VAIO,
4211 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 4212 CXD9872AKD_VAIO,
4213 STAC_9872_MODELS,
4214};
4215
4216static const char *stac9872_models[STAC_9872_MODELS] = {
4217 [CXD9872RD_VAIO] = "vaio",
4218 [CXD9872AKD_VAIO] = "vaio-ar",
4219};
4220
4221static struct snd_pci_quirk stac9872_cfg_tbl[] = {
4222 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
4223 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
4224 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 4225 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 4226 {}
4227};
4228
6d859065 4229static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4230{
4231 struct sigmatel_spec *spec;
4232 int board_config;
4233
f5fcc13c
TI		 4234 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
4235 stac9872_models,
4236 stac9872_cfg_tbl);
db064e50
TI		 4237 if (board_config < 0)
4238 /* unknown config, let generic-parser do its job... */
4239 return snd_hda_parse_generic_codec(codec);
4240
4241 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4242 if (spec == NULL)
4243 return -ENOMEM;
4244
4245 codec->spec = spec;
4246 switch (board_config) {
6d859065
GM		 4247 case CXD9872RD_VAIO:
4248 case STAC9872AK_VAIO:
4249 case STAC9872K_VAIO:
db064e50
TI		 4250 spec->mixer = vaio_mixer;
4251 spec->init = vaio_init;
4252 spec->multiout.max_channels = 2;
4253 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4254 spec->multiout.dac_nids = vaio_dacs;
4255 spec->multiout.hp_nid = VAIO_HP_DAC;
4256 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
4257 spec->adc_nids = vaio_adcs;
a64135a2 4258 spec->num_pwrs = 0;
db064e50
TI		 4259 spec->input_mux = &vaio_mux;
4260 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4261 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 4262 break;
6d859065
GM		 4263
4264 case CXD9872AKD_VAIO:
4265 spec->mixer = vaio_ar_mixer;
4266 spec->init = vaio_ar_init;
4267 spec->multiout.max_channels = 2;
4268 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4269 spec->multiout.dac_nids = vaio_dacs;
4270 spec->multiout.hp_nid = VAIO_HP_DAC;
4271 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 4272 spec->num_pwrs = 0;
6d859065
GM		 4273 spec->adc_nids = vaio_adcs;
4274 spec->input_mux = &vaio_mux;
4275 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4276 codec->patch_ops = stac9872_patch_ops;
6d859065 4277 break;
db064e50
TI		 4278 }
4279
db064e50
TI		 4280 return 0;
4281}
4282
4283
2f2f4251
M		 4284/*
4285 * patch entries
4286 */
4287struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4288 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4289 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4290 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4291 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4292 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4293 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4294 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4295 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4296 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4297 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4298 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4299 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4300 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4301 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4302 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4303 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4304 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4305 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4306 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4307 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4308 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4309 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4310 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4311 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4312 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4313 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4314 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4315 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4316 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 4317 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
4318 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 4319 /* The following does not take into account .id=0x83847661 when subsys =
4320 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4321 * currently not fully supported.
4322 */
4323 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4324 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4325 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 4326 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4327 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4328 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4329 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4330 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4331 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4332 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4333 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412
MR		 4334 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
4335 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 4336 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4337 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4338 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 4339 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4340 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4341 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4342 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4343 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4344 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4345 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4346 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 4347 {} /* terminator */
4348};
Clone of davem's net-next-2.6 tree