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[ALSA] hda-intel - Fix resume logic, when dynamic power managment is on
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <sound/driver.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/pci.h>
32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
36
4e55096e
M		 37#define NUM_CONTROL_ALLOC 32
38#define STAC_HP_EVENT 0x37
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
dfe495d0
TI		 42 STAC_9200_DELL_D21,
43 STAC_9200_DELL_D22,
44 STAC_9200_DELL_D23,
45 STAC_9200_DELL_M21,
46 STAC_9200_DELL_M22,
47 STAC_9200_DELL_M23,
48 STAC_9200_DELL_M24,
49 STAC_9200_DELL_M25,
50 STAC_9200_DELL_M26,
51 STAC_9200_DELL_M27,
f5fcc13c
TI		 52 STAC_9200_MODELS
53};
54
55enum {
56 STAC_9205_REF,
dfe495d0 57 STAC_9205_DELL_M42,
ae0a8ed8
TD		 58 STAC_9205_DELL_M43,
59 STAC_9205_DELL_M44,
60 STAC_9205_M43xx,
f5fcc13c
TI		 61 STAC_9205_MODELS
62};
63
8e21c34c
TD		 64enum {
65 STAC_925x_REF,
66 STAC_M2_2,
67 STAC_MA6,
2c11f955 68 STAC_PA6,
8e21c34c
TD		 69 STAC_925x_MODELS
70};
71
f5fcc13c
TI		 72enum {
73 STAC_D945_REF,
74 STAC_D945GTP3,
75 STAC_D945GTP5,
5d5d3bc3
IZ		 76 STAC_INTEL_MAC_V1,
77 STAC_INTEL_MAC_V2,
78 STAC_INTEL_MAC_V3,
79 STAC_INTEL_MAC_V4,
80 STAC_INTEL_MAC_V5,
dfe495d0 81 /* for backward compatibility */
f5fcc13c 82 STAC_MACMINI,
3fc24d85 83 STAC_MACBOOK,
6f0778d8
NB		 84 STAC_MACBOOK_PRO_V1,
85 STAC_MACBOOK_PRO_V2,
f16928fb 86 STAC_IMAC_INTEL,
0dae0f83 87 STAC_IMAC_INTEL_20,
dfe495d0
TI		 88 STAC_922X_DELL_D81,
89 STAC_922X_DELL_D82,
90 STAC_922X_DELL_M81,
91 STAC_922X_DELL_M82,
f5fcc13c
TI		 92 STAC_922X_MODELS
93};
94
95enum {
96 STAC_D965_REF,
97 STAC_D965_3ST,
98 STAC_D965_5ST,
4ff076e5 99 STAC_DELL_3ST,
f5fcc13c
TI		 100 STAC_927X_MODELS
101};
403d1944 102
2f2f4251 103struct sigmatel_spec {
c8b6bf9b 104 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 105 unsigned int num_mixers;
106
403d1944 107 int board_config;
c7d4b2fa 108 unsigned int surr_switch: 1;
403d1944
MP		 109 unsigned int line_switch: 1;
110 unsigned int mic_switch: 1;
3cc08dc6 111 unsigned int alt_switch: 1;
82bc955f 112 unsigned int hp_detect: 1;
62fe78e9 113 unsigned int gpio_mute: 1;
c7d4b2fa 114
8259980e
TI		 115 unsigned int gpio_mask, gpio_data;
116
2f2f4251
M		 117 /* playback */
118 struct hda_multi_out multiout;
3cc08dc6 119 hda_nid_t dac_nids[5];
2f2f4251
M		 120
121 /* capture */
122 hda_nid_t *adc_nids;
2f2f4251 123 unsigned int num_adcs;
dabbed6f
M		 124 hda_nid_t *mux_nids;
125 unsigned int num_muxes;
8b65727b
MP		 126 hda_nid_t *dmic_nids;
127 unsigned int num_dmics;
128 hda_nid_t dmux_nid;
dabbed6f 129 hda_nid_t dig_in_nid;
2f2f4251 130
2f2f4251
M		 131 /* pin widgets */
132 hda_nid_t *pin_nids;
133 unsigned int num_pins;
2f2f4251 134 unsigned int *pin_configs;
11b44bbd 135 unsigned int *bios_pin_configs;
2f2f4251
M		 136
137 /* codec specific stuff */
138 struct hda_verb *init;
c8b6bf9b 139 struct snd_kcontrol_new *mixer;
2f2f4251
M		 140
141 /* capture source */
8b65727b
MP		 142 struct hda_input_mux *dinput_mux;
143 unsigned int cur_dmux;
c7d4b2fa 144 struct hda_input_mux *input_mux;
3cc08dc6 145 unsigned int cur_mux[3];
2f2f4251 146
403d1944
MP		 147 /* i/o switches */
148 unsigned int io_switch[2];
2f2f4251 149
c7d4b2fa
M		 150 struct hda_pcm pcm_rec[2]; /* PCM information */
151
152 /* dynamic controls and input_mux */
153 struct auto_pin_cfg autocfg;
154 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 155 struct snd_kcontrol_new *kctl_alloc;
8b65727b 156 struct hda_input_mux private_dimux;
c7d4b2fa 157 struct hda_input_mux private_imux;
2f2f4251
M		 158};
159
160static hda_nid_t stac9200_adc_nids[1] = {
161 0x03,
162};
163
164static hda_nid_t stac9200_mux_nids[1] = {
165 0x0c,
166};
167
168static hda_nid_t stac9200_dac_nids[1] = {
169 0x02,
170};
171
8e21c34c
TD		 172static hda_nid_t stac925x_adc_nids[1] = {
173 0x03,
174};
175
176static hda_nid_t stac925x_mux_nids[1] = {
177 0x0f,
178};
179
180static hda_nid_t stac925x_dac_nids[1] = {
181 0x02,
182};
183
2c11f955
TD		 184static hda_nid_t stac925x_dmic_nids[1] = {
185 0x15,
186};
187
2f2f4251
M		 188static hda_nid_t stac922x_adc_nids[2] = {
189 0x06, 0x07,
190};
191
192static hda_nid_t stac922x_mux_nids[2] = {
193 0x12, 0x13,
194};
195
3cc08dc6
MP		 196static hda_nid_t stac927x_adc_nids[3] = {
197 0x07, 0x08, 0x09
198};
199
200static hda_nid_t stac927x_mux_nids[3] = {
201 0x15, 0x16, 0x17
202};
203
f3302a59
MP		 204static hda_nid_t stac9205_adc_nids[2] = {
205 0x12, 0x13
206};
207
208static hda_nid_t stac9205_mux_nids[2] = {
209 0x19, 0x1a
210};
211
2549413e
TI		 212static hda_nid_t stac9205_dmic_nids[2] = {
213 0x17, 0x18,
8b65727b
MP		 214};
215
c7d4b2fa 216static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 217 0x08, 0x09, 0x0d, 0x0e,
218 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 219};
220
8e21c34c
TD		 221static hda_nid_t stac925x_pin_nids[8] = {
222 0x07, 0x08, 0x0a, 0x0b,
223 0x0c, 0x0d, 0x10, 0x11,
224};
225
2f2f4251
M		 226static hda_nid_t stac922x_pin_nids[10] = {
227 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
228 0x0f, 0x10, 0x11, 0x15, 0x1b,
229};
230
3cc08dc6
MP		 231static hda_nid_t stac927x_pin_nids[14] = {
232 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
233 0x0f, 0x10, 0x11, 0x12, 0x13,
234 0x14, 0x21, 0x22, 0x23,
235};
236
f3302a59
MP		 237static hda_nid_t stac9205_pin_nids[12] = {
238 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
239 0x0f, 0x14, 0x16, 0x17, 0x18,
240 0x21, 0x22,
f3302a59
MP		 241};
242
8b65727b
MP		 243static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
244 struct snd_ctl_elem_info *uinfo)
245{
246 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
247 struct sigmatel_spec *spec = codec->spec;
248 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
249}
250
251static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
252 struct snd_ctl_elem_value *ucontrol)
253{
254 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
255 struct sigmatel_spec *spec = codec->spec;
256
257 ucontrol->value.enumerated.item[0] = spec->cur_dmux;
258 return 0;
259}
260
261static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
262 struct snd_ctl_elem_value *ucontrol)
263{
264 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
265 struct sigmatel_spec *spec = codec->spec;
266
267 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
268 spec->dmux_nid, &spec->cur_dmux);
269}
270
c8b6bf9b 271static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 272{
273 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
274 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 275 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 276}
277
c8b6bf9b 278static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 279{
280 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
281 struct sigmatel_spec *spec = codec->spec;
282 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
283
284 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
285 return 0;
286}
287
c8b6bf9b 288static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 289{
290 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
291 struct sigmatel_spec *spec = codec->spec;
292 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
293
c7d4b2fa 294 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 295 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
296}
297
c7d4b2fa 298static struct hda_verb stac9200_core_init[] = {
2f2f4251 299 /* set dac0mux for dac converter */
c7d4b2fa 300 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 301 {}
302};
303
8e21c34c
TD		 304static struct hda_verb stac925x_core_init[] = {
305 /* set dac0mux for dac converter */
306 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
307 {}
308};
309
c7d4b2fa 310static struct hda_verb stac922x_core_init[] = {
2f2f4251 311 /* set master volume and direct control */
c7d4b2fa 312 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 313 {}
314};
315
93ed1503 316static struct hda_verb d965_core_init[] = {
19039bd0 317 /* set master volume and direct control */
93ed1503 318 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 319 /* unmute node 0x1b */
320 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
321 /* select node 0x03 as DAC */
322 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
323 {}
324};
325
3cc08dc6
MP		 326static struct hda_verb stac927x_core_init[] = {
327 /* set master volume and direct control */
328 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
329 {}
330};
331
f3302a59
MP		 332static struct hda_verb stac9205_core_init[] = {
333 /* set master volume and direct control */
334 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
335 {}
336};
337
ca7c5a8b
ML		 338#define STAC_INPUT_SOURCE \
339 { \
340 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
341 .name = "Input Source", \
342 .count = 1, \
343 .info = stac92xx_mux_enum_info, \
344 .get = stac92xx_mux_enum_get, \
345 .put = stac92xx_mux_enum_put, \
346 }
347
348
c8b6bf9b 349static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 350 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
351 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
ca7c5a8b 352 STAC_INPUT_SOURCE,
2f2f4251
M		 353 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
354 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 355 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 356 { } /* end */
357};
358
8e21c34c 359static struct snd_kcontrol_new stac925x_mixer[] = {
ca7c5a8b 360 STAC_INPUT_SOURCE,
8e21c34c
TD		 361 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
362 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
363 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
364 { } /* end */
365};
366
c7d4b2fa 367/* This needs to be generated dynamically based on sequence */
c8b6bf9b 368static struct snd_kcontrol_new stac922x_mixer[] = {
ca7c5a8b 369 STAC_INPUT_SOURCE,
2f2f4251 370 HDA_CODEC_VOLUME("Capture Volume", 0x17, 0x0, HDA_INPUT),
0fd1708a 371 HDA_CODEC_MUTE("Capture Switch", 0x17, 0x0, HDA_INPUT),
2f2f4251
M		 372 HDA_CODEC_VOLUME("Mux Capture Volume", 0x12, 0x0, HDA_OUTPUT),
373 { } /* end */
374};
375
19039bd0
TI		 376/* This needs to be generated dynamically based on sequence */
377static struct snd_kcontrol_new stac9227_mixer[] = {
ca7c5a8b 378 STAC_INPUT_SOURCE,
19039bd0
TI		 379 HDA_CODEC_VOLUME("Capture Volume", 0x15, 0x0, HDA_OUTPUT),
380 HDA_CODEC_MUTE("Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
381 { } /* end */
382};
383
d1d985f0 384static struct snd_kcontrol_new stac927x_mixer[] = {
ca7c5a8b 385 STAC_INPUT_SOURCE,
3cc08dc6
MP		 386 HDA_CODEC_VOLUME("InMux Capture Volume", 0x15, 0x0, HDA_OUTPUT),
387 HDA_CODEC_VOLUME("InVol Capture Volume", 0x18, 0x0, HDA_INPUT),
388 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
389 { } /* end */
390};
391
d1d985f0 392static struct snd_kcontrol_new stac9205_mixer[] = {
8b65727b
MP		 393 {
394 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
395 .name = "Digital Input Source",
396 .count = 1,
397 .info = stac92xx_dmux_enum_info,
398 .get = stac92xx_dmux_enum_get,
399 .put = stac92xx_dmux_enum_put,
400 },
ca7c5a8b 401 STAC_INPUT_SOURCE,
f3302a59
MP		 402 HDA_CODEC_VOLUME("InMux Capture Volume", 0x19, 0x0, HDA_OUTPUT),
403 HDA_CODEC_VOLUME("InVol Capture Volume", 0x1b, 0x0, HDA_INPUT),
404 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1d, 0x0, HDA_OUTPUT),
405 { } /* end */
406};
407
2f2f4251
M		 408static int stac92xx_build_controls(struct hda_codec *codec)
409{
410 struct sigmatel_spec *spec = codec->spec;
411 int err;
c7d4b2fa 412 int i;
2f2f4251
M		 413
414 err = snd_hda_add_new_ctls(codec, spec->mixer);
415 if (err < 0)
416 return err;
c7d4b2fa
M		 417
418 for (i = 0; i < spec->num_mixers; i++) {
419 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
420 if (err < 0)
421 return err;
422 }
423
dabbed6f
M		 424 if (spec->multiout.dig_out_nid) {
425 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
426 if (err < 0)
427 return err;
428 }
429 if (spec->dig_in_nid) {
430 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
431 if (err < 0)
432 return err;
433 }
434 return 0;
2f2f4251
M		 435}
436
403d1944 437static unsigned int ref9200_pin_configs[8] = {
dabbed6f 438 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 439 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
440};
441
dfe495d0
TI		 442/*
443 STAC 9200 pin configs for
444 102801A8
445 102801DE
446 102801E8
447*/
448static unsigned int dell9200_d21_pin_configs[8] = {
449 0x400001f0, 0x400001f1, 0x01a19021, 0x90100140,
450 0x01813122, 0x02214030, 0x01014010, 0x02a19020,
451};
452
453/*
454 STAC 9200 pin configs for
455 102801C0
456 102801C1
457*/
458static unsigned int dell9200_d22_pin_configs[8] = {
459 0x400001f0, 0x400001f1, 0x02a19021, 0x90100140,
460 0x400001f2, 0x0221401f, 0x01014010, 0x01813020,
461};
462
463/*
464 STAC 9200 pin configs for
465 102801C4 (Dell Dimension E310)
466 102801C5
467 102801C7
468 102801D9
469 102801DA
470 102801E3
471*/
472static unsigned int dell9200_d23_pin_configs[8] = {
473 0x400001f0, 0x400001f1, 0x01a19021, 0x90100140,
474 0x400001f2, 0x0221401f, 0x01014010, 0x01813020,
475};
476
477
478/*
479 STAC 9200-32 pin configs for
480 102801B5 (Dell Inspiron 630m)
481 102801D8 (Dell Inspiron 640m)
482*/
483static unsigned int dell9200_m21_pin_configs[8] = {
484 0x40c003fa, 0x03441340, 0x03a11020, 0x401003fc,
485 0x403003fd, 0x0321121f, 0x0321121f, 0x408003fb,
486};
487
488/*
489 STAC 9200-32 pin configs for
490 102801C2 (Dell Latitude D620)
491 102801C8
492 102801CC (Dell Latitude D820)
493 102801D4
494 102801D6
495*/
496static unsigned int dell9200_m22_pin_configs[8] = {
497 0x40c003fa, 0x0144131f, 0x03A11020, 0x401003fb,
498 0x40f000fc, 0x0321121f, 0x90170310, 0x90a70321,
499};
500
501/*
502 STAC 9200-32 pin configs for
503 102801CE (Dell XPS M1710)
504 102801CF (Dell Precision M90)
505*/
506static unsigned int dell9200_m23_pin_configs[8] = {
507 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
508 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
509};
510
511/*
512 STAC 9200-32 pin configs for
513 102801C9
514 102801CA
515 102801CB (Dell Latitude 120L)
516 102801D3
517*/
518static unsigned int dell9200_m24_pin_configs[8] = {
519 0x40c003fa, 0x404003fb, 0x03a11020, 0x401003fd,
520 0x403003fe, 0x0321121f, 0x90170310, 0x408003fc,
521};
522
523/*
524 STAC 9200-32 pin configs for
525 102801BD (Dell Inspiron E1505n)
526 102801EE
527 102801EF
528*/
529static unsigned int dell9200_m25_pin_configs[8] = {
530 0x40c003fa, 0x01441340, 0x04a11020, 0x401003fc,
531 0x403003fd, 0x0421121f, 0x90170310, 0x408003fb,
532};
533
534/*
535 STAC 9200-32 pin configs for
536 102801F5 (Dell Inspiron 1501)
537 102801F6
538*/
539static unsigned int dell9200_m26_pin_configs[8] = {
540 0x40c003fa, 0x404003fb, 0x04a11020, 0x401003fd,
541 0x403003fe, 0x0421121f, 0x90170310, 0x408003fc,
542};
543
544/*
545 STAC 9200-32
546 102801CD (Dell Inspiron E1705/9400)
547*/
548static unsigned int dell9200_m27_pin_configs[8] = {
549 0x40c003fa, 0x01441340, 0x04a11020, 0x90170310,
550 0x40f003fc, 0x0421121f, 0x90170310, 0x408003fb,
551};
552
553
f5fcc13c
TI		 554static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
555 [STAC_REF] = ref9200_pin_configs,
dfe495d0
TI		 556 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
557 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
558 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
559 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
560 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
561 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
562 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
563 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
564 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
565 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 566};
567
f5fcc13c
TI		 568static const char *stac9200_models[STAC_9200_MODELS] = {
569 [STAC_REF] = "ref",
dfe495d0
TI		 570 [STAC_9200_DELL_D21] = "dell-d21",
571 [STAC_9200_DELL_D22] = "dell-d22",
572 [STAC_9200_DELL_D23] = "dell-d23",
573 [STAC_9200_DELL_M21] = "dell-m21",
574 [STAC_9200_DELL_M22] = "dell-m22",
575 [STAC_9200_DELL_M23] = "dell-m23",
576 [STAC_9200_DELL_M24] = "dell-m24",
577 [STAC_9200_DELL_M25] = "dell-m25",
578 [STAC_9200_DELL_M26] = "dell-m26",
579 [STAC_9200_DELL_M27] = "dell-m27",
f5fcc13c
TI		 580};
581
582static struct snd_pci_quirk stac9200_cfg_tbl[] = {
583 /* SigmaTel reference board */
584 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
585 "DFI LanParty", STAC_REF),
e7377071 586 /* Dell laptops have BIOS problem */
dfe495d0
TI		 587 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
588 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 589 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 590 "Dell Inspiron 630m", STAC_9200_DELL_M21),
591 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
592 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
593 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
594 "unknown Dell", STAC_9200_DELL_D22),
595 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
596 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 597 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 598 "Dell Latitude D620", STAC_9200_DELL_M22),
599 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
600 "unknown Dell", STAC_9200_DELL_D23),
601 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
602 "unknown Dell", STAC_9200_DELL_D23),
603 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
604 "unknown Dell", STAC_9200_DELL_M22),
605 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
606 "unknown Dell", STAC_9200_DELL_M24),
607 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
608 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 609 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 610 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 611 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 612 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 613 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 614 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 615 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 616 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 617 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 618 "Dell Precision M90", STAC_9200_DELL_M23),
619 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
620 "unknown Dell", STAC_9200_DELL_M22),
621 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
622 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 623 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 624 "unknown Dell", STAC_9200_DELL_M22),
49c605db 625 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 626 "Dell Inspiron 640m", STAC_9200_DELL_M21),
627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
628 "unknown Dell", STAC_9200_DELL_D23),
629 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
630 "unknown Dell", STAC_9200_DELL_D23),
631 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
632 "unknown Dell", STAC_9200_DELL_D21),
633 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
634 "unknown Dell", STAC_9200_DELL_D23),
635 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
636 "unknown Dell", STAC_9200_DELL_D21),
637 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
638 "unknown Dell", STAC_9200_DELL_M25),
639 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
640 "unknown Dell", STAC_9200_DELL_M25),
49c605db 641 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 642 "Dell Inspiron 1501", STAC_9200_DELL_M26),
643 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
644 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 645 /* Panasonic */
646 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
647
403d1944
MP		 648 {} /* terminator */
649};
650
8e21c34c
TD		 651static unsigned int ref925x_pin_configs[8] = {
652 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
653 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
654};
655
656static unsigned int stac925x_MA6_pin_configs[8] = {
657 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
658 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
659};
660
2c11f955
TD		 661static unsigned int stac925x_PA6_pin_configs[8] = {
662 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
663 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
664};
665
8e21c34c 666static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 667 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
668 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 669};
670
671static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
672 [STAC_REF] = ref925x_pin_configs,
673 [STAC_M2_2] = stac925xM2_2_pin_configs,
674 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 675 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 676};
677
678static const char *stac925x_models[STAC_925x_MODELS] = {
679 [STAC_REF] = "ref",
680 [STAC_M2_2] = "m2-2",
681 [STAC_MA6] = "m6",
2c11f955 682 [STAC_PA6] = "pa6",
8e21c34c
TD		 683};
684
685static struct snd_pci_quirk stac925x_cfg_tbl[] = {
686 /* SigmaTel reference board */
687 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 688 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 689 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
690 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
691 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 692 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 693 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
694 {} /* terminator */
695};
696
403d1944
MP		 697static unsigned int ref922x_pin_configs[10] = {
698 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
699 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 700 0x40000100, 0x40000100,
701};
702
dfe495d0
TI		 703/*
704 STAC 922X pin configs for
705 102801A7
706 102801AB
707 102801A9
708 102801D1
709 102801D2
710*/
711static unsigned int dell_922x_d81_pin_configs[10] = {
712 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
713 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
714 0x01813122, 0x400001f2,
715};
716
717/*
718 STAC 922X pin configs for
719 102801AC
720 102801D0
721*/
722static unsigned int dell_922x_d82_pin_configs[10] = {
723 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
724 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
725 0x01813122, 0x400001f1,
726};
727
728/*
729 STAC 922X pin configs for
730 102801BF
731*/
732static unsigned int dell_922x_m81_pin_configs[10] = {
733 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
734 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
735 0x40C003f1, 0x405003f0,
736};
737
738/*
739 STAC 9221 A1 pin configs for
740 102801D7 (Dell XPS M1210)
741*/
742static unsigned int dell_922x_m82_pin_configs[10] = {
743 0x0221121f, 0x408103ff, 0x02111212, 0x90100310,
744 0x408003f1, 0x02111211, 0x03451340, 0x40c003f2,
745 0x508003f3, 0x405003f4,
746};
747
403d1944 748static unsigned int d945gtp3_pin_configs[10] = {
869264c4 749 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 750 0x40000100, 0x40000100, 0x40000100, 0x40000100,
751 0x02a19120, 0x40000100,
752};
753
754static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 755 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
756 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 757 0x02a19320, 0x40000100,
758};
759
5d5d3bc3
IZ		 760static unsigned int intel_mac_v1_pin_configs[10] = {
761 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
762 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
763 0x400000fc, 0x400000fb,
764};
765
766static unsigned int intel_mac_v2_pin_configs[10] = {
767 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
768 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
769 0x400000fc, 0x400000fb,
6f0778d8
NB		 770};
771
5d5d3bc3
IZ		 772static unsigned int intel_mac_v3_pin_configs[10] = {
773 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
774 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 775 0x400000fc, 0x400000fb,
776};
777
5d5d3bc3
IZ		 778static unsigned int intel_mac_v4_pin_configs[10] = {
779 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
780 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 781 0x400000fc, 0x400000fb,
782};
783
5d5d3bc3
IZ		 784static unsigned int intel_mac_v5_pin_configs[10] = {
785 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
786 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
787 0x400000fc, 0x400000fb,
0dae0f83
TI		 788};
789
76c08828 790
19039bd0 791static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 792 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 793 [STAC_D945GTP3] = d945gtp3_pin_configs,
794 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 795 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
796 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
797 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
798 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
799 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 800 /* for backward compatibility */
5d5d3bc3
IZ		 801 [STAC_MACMINI] = intel_mac_v3_pin_configs,
802 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
803 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
804 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
805 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
806 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 807 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
808 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
809 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
810 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 811};
812
f5fcc13c
TI		 813static const char *stac922x_models[STAC_922X_MODELS] = {
814 [STAC_D945_REF] = "ref",
815 [STAC_D945GTP5] = "5stack",
816 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 817 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
818 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
819 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
820 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
821 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 822 /* for backward compatibility */
f5fcc13c 823 [STAC_MACMINI] = "macmini",
3fc24d85 824 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 825 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
826 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 827 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 828 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 829 [STAC_922X_DELL_D81] = "dell-d81",
830 [STAC_922X_DELL_D82] = "dell-d82",
831 [STAC_922X_DELL_M81] = "dell-m81",
832 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 833};
834
835static struct snd_pci_quirk stac922x_cfg_tbl[] = {
836 /* SigmaTel reference board */
837 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
838 "DFI LanParty", STAC_D945_REF),
839 /* Intel 945G based systems */
840 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
841 "Intel D945G", STAC_D945GTP3),
842 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
843 "Intel D945G", STAC_D945GTP3),
844 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
845 "Intel D945G", STAC_D945GTP3),
846 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
847 "Intel D945G", STAC_D945GTP3),
848 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
849 "Intel D945G", STAC_D945GTP3),
850 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
851 "Intel D945G", STAC_D945GTP3),
852 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
853 "Intel D945G", STAC_D945GTP3),
854 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
855 "Intel D945G", STAC_D945GTP3),
856 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
857 "Intel D945G", STAC_D945GTP3),
858 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
859 "Intel D945G", STAC_D945GTP3),
860 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
861 "Intel D945G", STAC_D945GTP3),
862 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
863 "Intel D945G", STAC_D945GTP3),
864 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
865 "Intel D945G", STAC_D945GTP3),
866 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
867 "Intel D945G", STAC_D945GTP3),
868 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
869 "Intel D945G", STAC_D945GTP3),
870 /* Intel D945G 5-stack systems */
871 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
872 "Intel D945G", STAC_D945GTP5),
873 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
874 "Intel D945G", STAC_D945GTP5),
875 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
876 "Intel D945G", STAC_D945GTP5),
877 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
878 "Intel D945G", STAC_D945GTP5),
879 /* Intel 945P based systems */
880 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
881 "Intel D945P", STAC_D945GTP3),
882 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
883 "Intel D945P", STAC_D945GTP3),
884 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
885 "Intel D945P", STAC_D945GTP3),
886 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
887 "Intel D945P", STAC_D945GTP3),
888 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
889 "Intel D945P", STAC_D945GTP3),
890 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
891 "Intel D945P", STAC_D945GTP5),
892 /* other systems */
893 /* Apple Mac Mini (early 2006) */
894 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 895 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 896 /* Dell systems */
897 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
898 "unknown Dell", STAC_922X_DELL_D81),
899 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
900 "unknown Dell", STAC_922X_DELL_D81),
901 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
902 "unknown Dell", STAC_922X_DELL_D81),
903 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
904 "unknown Dell", STAC_922X_DELL_D82),
905 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
906 "unknown Dell", STAC_922X_DELL_M81),
907 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
908 "unknown Dell", STAC_922X_DELL_D82),
909 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
910 "unknown Dell", STAC_922X_DELL_D81),
911 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
912 "unknown Dell", STAC_922X_DELL_D81),
913 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
914 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 915 {} /* terminator */
916};
917
3cc08dc6 918static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 919 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
920 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
921 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
922 0x01c42190, 0x40000100,
3cc08dc6
MP		 923};
924
93ed1503 925static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 926 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
927 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
928 0x40000100, 0x40000100, 0x40000100, 0x40000100,
929 0x40000100, 0x40000100
930};
931
93ed1503
TD		 932static unsigned int d965_5st_pin_configs[14] = {
933 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
934 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
935 0x40000100, 0x40000100, 0x40000100, 0x01442070,
936 0x40000100, 0x40000100
937};
938
4ff076e5
TD		 939static unsigned int dell_3st_pin_configs[14] = {
940 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
941 0x01111212, 0x01116211, 0x01813050, 0x01112214,
942 0x403003fa, 0x40000100, 0x40000100, 0x404003fb,
943 0x40c003fc, 0x40000100
944};
945
93ed1503 946static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
f5fcc13c 947 [STAC_D965_REF] = ref927x_pin_configs,
93ed1503
TD		 948 [STAC_D965_3ST] = d965_3st_pin_configs,
949 [STAC_D965_5ST] = d965_5st_pin_configs,
4ff076e5 950 [STAC_DELL_3ST] = dell_3st_pin_configs,
3cc08dc6
MP		 951};
952
f5fcc13c
TI		 953static const char *stac927x_models[STAC_927X_MODELS] = {
954 [STAC_D965_REF] = "ref",
955 [STAC_D965_3ST] = "3stack",
956 [STAC_D965_5ST] = "5stack",
4ff076e5 957 [STAC_DELL_3ST] = "dell-3stack",
f5fcc13c
TI		 958};
959
960static struct snd_pci_quirk stac927x_cfg_tbl[] = {
961 /* SigmaTel reference board */
962 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
963 "DFI LanParty", STAC_D965_REF),
81d3dbde 964 /* Intel 946 based systems */
f5fcc13c
TI		 965 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
966 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 967 /* 965 based 3 stack systems */
f5fcc13c
TI		 968 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
969 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
970 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
971 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
972 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
974 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
975 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
976 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
977 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
978 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
979 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
980 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
981 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
983 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 984 /* Dell 3 stack systems */
dfe495d0 985 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 986 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
987 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
93ed1503 988 /* 965 based 5 stack systems */
f5fcc13c
TI		 989 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
991 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
993 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
995 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
997 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 998 {} /* terminator */
999};
1000
f3302a59
MP		 1001static unsigned int ref9205_pin_configs[12] = {
1002 0x40000100, 0x40000100, 0x01016011, 0x01014010,
8b65727b
MP		 1003 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
1004 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1005};
1006
dfe495d0
TI		 1007/*
1008 STAC 9205 pin configs for
1009 102801F1
1010 102801F2
1011 102801FC
1012 102801FD
1013 10280204
1014 1028021F
1015*/
1016static unsigned int dell_9205_m42_pin_configs[12] = {
1017 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1018 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1019 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1020};
1021
1022/*
1023 STAC 9205 pin configs for
1024 102801F9
1025 102801FA
1026 102801FE
1027 102801FF (Dell Precision M4300)
1028 10280206
1029 10280200
1030 10280201
1031*/
1032static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1033 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1034 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1035 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1036};
1037
dfe495d0 1038static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1039 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1040 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1041 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1042};
1043
f5fcc13c 1044static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1045 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1046 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1047 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1048 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
ae0a8ed8 1049 [STAC_9205_M43xx] = NULL,
f3302a59
MP		 1050};
1051
f5fcc13c
TI		 1052static const char *stac9205_models[STAC_9205_MODELS] = {
1053 [STAC_9205_REF] = "ref",
dfe495d0 1054 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1055 [STAC_9205_DELL_M43] = "dell-m43",
1056 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1057};
1058
1059static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1060 /* SigmaTel reference board */
1061 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1062 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1063 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1064 "unknown Dell", STAC_9205_DELL_M42),
1065 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1066 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1067 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
1068 "Dell Precision", STAC_9205_M43xx),
1069 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1070 "Dell Precision", STAC_9205_DELL_M43),
1071 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1072 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1073 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1074 "unknown Dell", STAC_9205_DELL_M42),
1075 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1076 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1077 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1078 "Dell Precision", STAC_9205_DELL_M43),
1079 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1080 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1081 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1082 "Dell Precision", STAC_9205_DELL_M43),
1083 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1084 "Dell Inspiron", STAC_9205_DELL_M44),
1085 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1086 "Dell Inspiron", STAC_9205_DELL_M44),
1087 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1088 "Dell Inspiron", STAC_9205_DELL_M44),
1089 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1090 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1091 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1092 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1093 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1094 "Dell Inspiron", STAC_9205_DELL_M44),
f3302a59
MP		 1095 {} /* terminator */
1096};
1097
11b44bbd
RF		 1098static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1099{
1100 int i;
1101 struct sigmatel_spec *spec = codec->spec;
1102
1103 if (! spec->bios_pin_configs) {
1104 spec->bios_pin_configs = kcalloc(spec->num_pins,
1105 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1106 if (! spec->bios_pin_configs)
1107 return -ENOMEM;
1108 }
1109
1110 for (i = 0; i < spec->num_pins; i++) {
1111 hda_nid_t nid = spec->pin_nids[i];
1112 unsigned int pin_cfg;
1113
1114 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1115 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1116 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1117 nid, pin_cfg);
1118 spec->bios_pin_configs[i] = pin_cfg;
1119 }
1120
1121 return 0;
1122}
1123
87d48363
MR		 1124static void stac92xx_set_config_reg(struct hda_codec *codec,
1125 hda_nid_t pin_nid, unsigned int pin_config)
1126{
1127 int i;
1128 snd_hda_codec_write(codec, pin_nid, 0,
1129 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1130 pin_config & 0x000000ff);
1131 snd_hda_codec_write(codec, pin_nid, 0,
1132 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1133 (pin_config & 0x0000ff00) >> 8);
1134 snd_hda_codec_write(codec, pin_nid, 0,
1135 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1136 (pin_config & 0x00ff0000) >> 16);
1137 snd_hda_codec_write(codec, pin_nid, 0,
1138 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1139 pin_config >> 24);
1140 i = snd_hda_codec_read(codec, pin_nid, 0,
1141 AC_VERB_GET_CONFIG_DEFAULT,
1142 0x00);
1143 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1144 pin_nid, i);
1145}
1146
2f2f4251
M		 1147static void stac92xx_set_config_regs(struct hda_codec *codec)
1148{
1149 int i;
1150 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1151
87d48363
MR		 1152 if (!spec->pin_configs)
1153 return;
11b44bbd 1154
87d48363
MR		 1155 for (i = 0; i < spec->num_pins; i++)
1156 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1157 spec->pin_configs[i]);
2f2f4251 1158}
2f2f4251 1159
8259980e 1160static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
92a22beb 1161{
8259980e 1162 struct sigmatel_spec *spec = codec->spec;
87d48363 1163 /* Configure GPIOx as output */
82beb8fd
TI		 1164 snd_hda_codec_write_cache(codec, codec->afg, 0,
1165 AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
87d48363 1166 /* Configure GPIOx as CMOS */
82beb8fd 1167 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
87d48363 1168 /* Assert GPIOx */
82beb8fd
TI		 1169 snd_hda_codec_write_cache(codec, codec->afg, 0,
1170 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
87d48363 1171 /* Enable GPIOx */
82beb8fd
TI		 1172 snd_hda_codec_write_cache(codec, codec->afg, 0,
1173 AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
92a22beb
MR		 1174}
1175
dabbed6f 1176/*
c7d4b2fa 1177 * Analog playback callbacks
dabbed6f 1178 */
c7d4b2fa
M		 1179static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1180 struct hda_codec *codec,
c8b6bf9b 1181 struct snd_pcm_substream *substream)
2f2f4251 1182{
dabbed6f 1183 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1184 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1185}
1186
2f2f4251
M		 1187static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1188 struct hda_codec *codec,
1189 unsigned int stream_tag,
1190 unsigned int format,
c8b6bf9b 1191 struct snd_pcm_substream *substream)
2f2f4251
M		 1192{
1193 struct sigmatel_spec *spec = codec->spec;
403d1944 1194 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1195}
1196
1197static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1198 struct hda_codec *codec,
c8b6bf9b 1199 struct snd_pcm_substream *substream)
2f2f4251
M		 1200{
1201 struct sigmatel_spec *spec = codec->spec;
1202 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1203}
1204
dabbed6f
M		 1205/*
1206 * Digital playback callbacks
1207 */
1208static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1209 struct hda_codec *codec,
c8b6bf9b 1210 struct snd_pcm_substream *substream)
dabbed6f
M		 1211{
1212 struct sigmatel_spec *spec = codec->spec;
1213 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1214}
1215
1216static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1217 struct hda_codec *codec,
c8b6bf9b 1218 struct snd_pcm_substream *substream)
dabbed6f
M		 1219{
1220 struct sigmatel_spec *spec = codec->spec;
1221 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1222}
1223
6b97eb45
TI		 1224static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1225 struct hda_codec *codec,
1226 unsigned int stream_tag,
1227 unsigned int format,
1228 struct snd_pcm_substream *substream)
1229{
1230 struct sigmatel_spec *spec = codec->spec;
1231 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1232 stream_tag, format, substream);
1233}
1234
dabbed6f 1235
2f2f4251
M		 1236/*
1237 * Analog capture callbacks
1238 */
1239static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1240 struct hda_codec *codec,
1241 unsigned int stream_tag,
1242 unsigned int format,
c8b6bf9b 1243 struct snd_pcm_substream *substream)
2f2f4251
M		 1244{
1245 struct sigmatel_spec *spec = codec->spec;
1246
1247 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1248 stream_tag, 0, format);
1249 return 0;
1250}
1251
1252static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1253 struct hda_codec *codec,
c8b6bf9b 1254 struct snd_pcm_substream *substream)
2f2f4251
M		 1255{
1256 struct sigmatel_spec *spec = codec->spec;
1257
1258 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1259 return 0;
1260}
1261
dabbed6f
M		 1262static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1263 .substreams = 1,
1264 .channels_min = 2,
1265 .channels_max = 2,
1266 /* NID is set in stac92xx_build_pcms */
1267 .ops = {
1268 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1269 .close = stac92xx_dig_playback_pcm_close,
1270 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1271 },
1272};
1273
1274static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1275 .substreams = 1,
1276 .channels_min = 2,
1277 .channels_max = 2,
1278 /* NID is set in stac92xx_build_pcms */
1279};
1280
2f2f4251
M		 1281static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1282 .substreams = 1,
1283 .channels_min = 2,
c7d4b2fa 1284 .channels_max = 8,
2f2f4251
M		 1285 .nid = 0x02, /* NID to query formats and rates */
1286 .ops = {
1287 .open = stac92xx_playback_pcm_open,
1288 .prepare = stac92xx_playback_pcm_prepare,
1289 .cleanup = stac92xx_playback_pcm_cleanup
1290 },
1291};
1292
3cc08dc6
MP		 1293static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1294 .substreams = 1,
1295 .channels_min = 2,
1296 .channels_max = 2,
1297 .nid = 0x06, /* NID to query formats and rates */
1298 .ops = {
1299 .open = stac92xx_playback_pcm_open,
1300 .prepare = stac92xx_playback_pcm_prepare,
1301 .cleanup = stac92xx_playback_pcm_cleanup
1302 },
1303};
1304
2f2f4251
M		 1305static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
1306 .substreams = 2,
1307 .channels_min = 2,
1308 .channels_max = 2,
3cc08dc6 1309 /* NID is set in stac92xx_build_pcms */
2f2f4251
M		 1310 .ops = {
1311 .prepare = stac92xx_capture_pcm_prepare,
1312 .cleanup = stac92xx_capture_pcm_cleanup
1313 },
1314};
1315
1316static int stac92xx_build_pcms(struct hda_codec *codec)
1317{
1318 struct sigmatel_spec *spec = codec->spec;
1319 struct hda_pcm *info = spec->pcm_rec;
1320
1321 codec->num_pcms = 1;
1322 codec->pcm_info = info;
1323
c7d4b2fa 1324 info->name = "STAC92xx Analog";
2f2f4251 1325 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1326 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6
MP		 1327 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
1328
1329 if (spec->alt_switch) {
1330 codec->num_pcms++;
1331 info++;
1332 info->name = "STAC92xx Analog Alt";
1333 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1334 }
2f2f4251 1335
dabbed6f
M		 1336 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1337 codec->num_pcms++;
1338 info++;
1339 info->name = "STAC92xx Digital";
1340 if (spec->multiout.dig_out_nid) {
1341 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1342 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1343 }
1344 if (spec->dig_in_nid) {
1345 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1346 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1347 }
1348 }
1349
2f2f4251
M		 1350 return 0;
1351}
1352
c960a03b
TI		 1353static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1354{
1355 unsigned int pincap = snd_hda_param_read(codec, nid,
1356 AC_PAR_PIN_CAP);
1357 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1358 if (pincap & AC_PINCAP_VREF_100)
1359 return AC_PINCTL_VREF_100;
1360 if (pincap & AC_PINCAP_VREF_80)
1361 return AC_PINCTL_VREF_80;
1362 if (pincap & AC_PINCAP_VREF_50)
1363 return AC_PINCTL_VREF_50;
1364 if (pincap & AC_PINCAP_VREF_GRD)
1365 return AC_PINCTL_VREF_GRD;
1366 return 0;
1367}
1368
403d1944
MP		 1369static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1370
1371{
82beb8fd
TI		 1372 snd_hda_codec_write_cache(codec, nid, 0,
1373 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1374}
1375
a5ce8890 1376#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1377
1378static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1379{
1380 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1381 struct sigmatel_spec *spec = codec->spec;
1382 int io_idx = kcontrol-> private_value & 0xff;
1383
1384 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1385 return 0;
1386}
1387
1388static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1389{
1390 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1391 struct sigmatel_spec *spec = codec->spec;
1392 hda_nid_t nid = kcontrol->private_value >> 8;
1393 int io_idx = kcontrol-> private_value & 0xff;
1394 unsigned short val = ucontrol->value.integer.value[0];
1395
1396 spec->io_switch[io_idx] = val;
1397
1398 if (val)
1399 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1400 else {
1401 unsigned int pinctl = AC_PINCTL_IN_EN;
1402 if (io_idx) /* set VREF for mic */
1403 pinctl |= stac92xx_get_vref(codec, nid);
1404 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1405 }
403d1944
MP		 1406 return 1;
1407}
1408
1409#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1410 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1411 .name = xname, \
1412 .index = 0, \
1413 .info = stac92xx_io_switch_info, \
1414 .get = stac92xx_io_switch_get, \
1415 .put = stac92xx_io_switch_put, \
1416 .private_value = xpval, \
1417 }
1418
1419
c7d4b2fa
M		 1420enum {
1421 STAC_CTL_WIDGET_VOL,
1422 STAC_CTL_WIDGET_MUTE,
403d1944 1423 STAC_CTL_WIDGET_IO_SWITCH,
c7d4b2fa
M		 1424};
1425
c8b6bf9b 1426static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 1427 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
1428 HDA_CODEC_MUTE(NULL, 0, 0, 0),
403d1944 1429 STAC_CODEC_IO_SWITCH(NULL, 0),
c7d4b2fa
M		 1430};
1431
1432/* add dynamic controls */
1433static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
1434{
c8b6bf9b 1435 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 1436
1437 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
1438 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
1439
1440 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
1441 if (! knew)
1442 return -ENOMEM;
1443 if (spec->kctl_alloc) {
1444 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
1445 kfree(spec->kctl_alloc);
1446 }
1447 spec->kctl_alloc = knew;
1448 spec->num_kctl_alloc = num;
1449 }
1450
1451 knew = &spec->kctl_alloc[spec->num_kctl_used];
1452 *knew = stac92xx_control_templates[type];
82fe0c58 1453 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 1454 if (! knew->name)
1455 return -ENOMEM;
1456 knew->private_value = val;
1457 spec->num_kctl_used++;
1458 return 0;
1459}
1460
403d1944
MP		 1461/* flag inputs as additional dynamic lineouts */
1462static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
1463{
1464 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1465 unsigned int wcaps, wtype;
1466 int i, num_dacs = 0;
1467
1468 /* use the wcaps cache to count all DACs available for line-outs */
1469 for (i = 0; i < codec->num_nodes; i++) {
1470 wcaps = codec->wcaps[i];
1471 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1472 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
1473 num_dacs++;
1474 }
403d1944 1475
7b043899
SL		 1476 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
1477
403d1944
MP		 1478 switch (cfg->line_outs) {
1479 case 3:
1480 /* add line-in as side */
7b043899 1481 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 1482 cfg->line_out_pins[cfg->line_outs] =
1483 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1484 spec->line_switch = 1;
1485 cfg->line_outs++;
1486 }
1487 break;
1488 case 2:
1489 /* add line-in as clfe and mic as side */
7b043899 1490 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 1491 cfg->line_out_pins[cfg->line_outs] =
1492 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1493 spec->line_switch = 1;
1494 cfg->line_outs++;
1495 }
7b043899 1496 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 1497 cfg->line_out_pins[cfg->line_outs] =
1498 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 1499 spec->mic_switch = 1;
1500 cfg->line_outs++;
1501 }
1502 break;
1503 case 1:
1504 /* add line-in as surr and mic as clfe */
7b043899 1505 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 1506 cfg->line_out_pins[cfg->line_outs] =
1507 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1508 spec->line_switch = 1;
1509 cfg->line_outs++;
1510 }
7b043899 1511 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 1512 cfg->line_out_pins[cfg->line_outs] =
1513 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 1514 spec->mic_switch = 1;
1515 cfg->line_outs++;
1516 }
1517 break;
1518 }
1519
1520 return 0;
1521}
1522
7b043899
SL		 1523
1524static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
1525{
1526 int i;
1527
1528 for (i = 0; i < spec->multiout.num_dacs; i++) {
1529 if (spec->multiout.dac_nids[i] == nid)
1530 return 1;
1531 }
1532
1533 return 0;
1534}
1535
3cc08dc6 1536/*
7b043899
SL		 1537 * Fill in the dac_nids table from the parsed pin configuration
1538 * This function only works when every pin in line_out_pins[]
1539 * contains atleast one DAC in its connection list. Some 92xx
1540 * codecs are not connected directly to a DAC, such as the 9200
1541 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 1542 */
19039bd0 1543static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 1544 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 1545{
1546 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1547 int i, j, conn_len = 0;
1548 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
1549 unsigned int wcaps, wtype;
1550
c7d4b2fa
M		 1551 for (i = 0; i < cfg->line_outs; i++) {
1552 nid = cfg->line_out_pins[i];
7b043899
SL		 1553 conn_len = snd_hda_get_connections(codec, nid, conn,
1554 HDA_MAX_CONNECTIONS);
1555 for (j = 0; j < conn_len; j++) {
1556 wcaps = snd_hda_param_read(codec, conn[j],
1557 AC_PAR_AUDIO_WIDGET_CAP);
1558 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1559
1560 if (wtype != AC_WID_AUD_OUT ||
1561 (wcaps & AC_WCAP_DIGITAL))
1562 continue;
1563 /* conn[j] is a DAC routed to this line-out */
1564 if (!is_in_dac_nids(spec, conn[j]))
1565 break;
1566 }
1567
1568 if (j == conn_len) {
df802952
TI		 1569 if (spec->multiout.num_dacs > 0) {
1570 /* we have already working output pins,
1571 * so let's drop the broken ones again
1572 */
1573 cfg->line_outs = spec->multiout.num_dacs;
1574 break;
1575 }
7b043899
SL		 1576 /* error out, no available DAC found */
1577 snd_printk(KERN_ERR
1578 "%s: No available DAC for pin 0x%x\n",
1579 __func__, nid);
1580 return -ENODEV;
1581 }
1582
1583 spec->multiout.dac_nids[i] = conn[j];
1584 spec->multiout.num_dacs++;
1585 if (conn_len > 1) {
1586 /* select this DAC in the pin's input mux */
82beb8fd
TI		 1587 snd_hda_codec_write_cache(codec, nid, 0,
1588 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 1589
7b043899
SL		 1590 }
1591 }
c7d4b2fa 1592
7b043899
SL		 1593 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
1594 spec->multiout.num_dacs,
1595 spec->multiout.dac_nids[0],
1596 spec->multiout.dac_nids[1],
1597 spec->multiout.dac_nids[2],
1598 spec->multiout.dac_nids[3],
1599 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 1600 return 0;
1601}
1602
eb06ed8f
TI		 1603/* create volume control/switch for the given prefx type */
1604static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
1605{
1606 char name[32];
1607 int err;
1608
1609 sprintf(name, "%s Playback Volume", pfx);
1610 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
1611 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1612 if (err < 0)
1613 return err;
1614 sprintf(name, "%s Playback Switch", pfx);
1615 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
1616 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1617 if (err < 0)
1618 return err;
1619 return 0;
1620}
1621
c7d4b2fa 1622/* add playback controls from the parsed DAC table */
19039bd0
TI		 1623static int stac92xx_auto_create_multi_out_ctls(struct sigmatel_spec *spec,
1624 const struct auto_pin_cfg *cfg)
c7d4b2fa 1625{
19039bd0
TI		 1626 static const char *chname[4] = {
1627 "Front", "Surround", NULL /*CLFE*/, "Side"
1628 };
c7d4b2fa
M		 1629 hda_nid_t nid;
1630 int i, err;
1631
1632 for (i = 0; i < cfg->line_outs; i++) {
403d1944 1633 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 1634 continue;
1635
1636 nid = spec->multiout.dac_nids[i];
1637
1638 if (i == 2) {
1639 /* Center/LFE */
eb06ed8f
TI		 1640 err = create_controls(spec, "Center", nid, 1);
1641 if (err < 0)
c7d4b2fa 1642 return err;
eb06ed8f
TI		 1643 err = create_controls(spec, "LFE", nid, 2);
1644 if (err < 0)
c7d4b2fa
M		 1645 return err;
1646 } else {
eb06ed8f
TI		 1647 err = create_controls(spec, chname[i], nid, 3);
1648 if (err < 0)
c7d4b2fa
M		 1649 return err;
1650 }
1651 }
1652
403d1944
MP		 1653 if (spec->line_switch)
1654 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
1655 return err;
1656
1657 if (spec->mic_switch)
1658 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
1659 return err;
1660
c7d4b2fa
M		 1661 return 0;
1662}
1663
eb06ed8f 1664static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 1665{
7b043899
SL		 1666 if (is_in_dac_nids(spec, nid))
1667 return 1;
eb06ed8f
TI		 1668 if (spec->multiout.hp_nid == nid)
1669 return 1;
1670 return 0;
1671}
c7d4b2fa 1672
eb06ed8f
TI		 1673static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
1674{
1675 if (!spec->multiout.hp_nid)
1676 spec->multiout.hp_nid = nid;
1677 else if (spec->multiout.num_dacs > 4) {
1678 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
1679 return 1;
1680 } else {
1681 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
1682 spec->multiout.num_dacs++;
1683 }
1684 return 0;
1685}
4e55096e 1686
eb06ed8f
TI		 1687/* add playback controls for Speaker and HP outputs */
1688static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
1689 struct auto_pin_cfg *cfg)
1690{
1691 struct sigmatel_spec *spec = codec->spec;
1692 hda_nid_t nid;
1693 int i, old_num_dacs, err;
1694
1695 old_num_dacs = spec->multiout.num_dacs;
1696 for (i = 0; i < cfg->hp_outs; i++) {
1697 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
1698 if (wid_caps & AC_WCAP_UNSOL_CAP)
1699 spec->hp_detect = 1;
1700 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
1701 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1702 if (check_in_dac_nids(spec, nid))
1703 nid = 0;
1704 if (! nid)
c7d4b2fa 1705 continue;
eb06ed8f
TI		 1706 add_spec_dacs(spec, nid);
1707 }
1708 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 1709 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 1710 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1711 if (check_in_dac_nids(spec, nid))
1712 nid = 0;
eb06ed8f
TI		 1713 if (! nid)
1714 continue;
1715 add_spec_dacs(spec, nid);
c7d4b2fa 1716 }
1b290a51
MR		 1717 for (i = 0; i < cfg->line_outs; i++) {
1718 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
1719 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1720 if (check_in_dac_nids(spec, nid))
1721 nid = 0;
1722 if (! nid)
1723 continue;
1724 add_spec_dacs(spec, nid);
1725 }
eb06ed8f
TI		 1726 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
1727 static const char *pfxs[] = {
1728 "Speaker", "External Speaker", "Speaker2",
1729 };
1730 err = create_controls(spec, pfxs[i - old_num_dacs],
1731 spec->multiout.dac_nids[i], 3);
1732 if (err < 0)
1733 return err;
1734 }
1735 if (spec->multiout.hp_nid) {
1736 const char *pfx;
1737 if (old_num_dacs == spec->multiout.num_dacs)
1738 pfx = "Master";
1739 else
1740 pfx = "Headphone";
1741 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
1742 if (err < 0)
1743 return err;
1744 }
c7d4b2fa
M		 1745
1746 return 0;
1747}
1748
8b65727b 1749/* labels for dmic mux inputs */
ddc2cec4 1750static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 1751 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
1752 "Digital Mic 3", "Digital Mic 4"
1753};
1754
1755/* create playback/capture controls for input pins on dmic capable codecs */
1756static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
1757 const struct auto_pin_cfg *cfg)
1758{
1759 struct sigmatel_spec *spec = codec->spec;
1760 struct hda_input_mux *dimux = &spec->private_dimux;
1761 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1762 int i, j;
1763
1764 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
1765 dimux->items[dimux->num_items].index = 0;
1766 dimux->num_items++;
1767
1768 for (i = 0; i < spec->num_dmics; i++) {
1769 int index;
1770 int num_cons;
1771 unsigned int def_conf;
1772
1773 def_conf = snd_hda_codec_read(codec,
1774 spec->dmic_nids[i],
1775 0,
1776 AC_VERB_GET_CONFIG_DEFAULT,
1777 0);
1778 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
1779 continue;
1780
1781 num_cons = snd_hda_get_connections(codec,
1782 spec->dmux_nid,
1783 con_lst,
1784 HDA_MAX_NUM_INPUTS);
1785 for (j = 0; j < num_cons; j++)
1786 if (con_lst[j] == spec->dmic_nids[i]) {
1787 index = j;
1788 goto found;
1789 }
1790 continue;
1791found:
1792 dimux->items[dimux->num_items].label =
1793 stac92xx_dmic_labels[dimux->num_items];
1794 dimux->items[dimux->num_items].index = index;
1795 dimux->num_items++;
1796 }
1797
1798 return 0;
1799}
1800
c7d4b2fa
M		 1801/* create playback/capture controls for input pins */
1802static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
1803{
1804 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 1805 struct hda_input_mux *imux = &spec->private_imux;
1806 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1807 int i, j, k;
1808
1809 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 1810 int index;
1811
1812 if (!cfg->input_pins[i])
1813 continue;
1814 index = -1;
1815 for (j = 0; j < spec->num_muxes; j++) {
1816 int num_cons;
1817 num_cons = snd_hda_get_connections(codec,
1818 spec->mux_nids[j],
1819 con_lst,
1820 HDA_MAX_NUM_INPUTS);
1821 for (k = 0; k < num_cons; k++)
1822 if (con_lst[k] == cfg->input_pins[i]) {
1823 index = k;
1824 goto found;
1825 }
c7d4b2fa 1826 }
314634bc
TI		 1827 continue;
1828 found:
1829 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
1830 imux->items[imux->num_items].index = index;
1831 imux->num_items++;
c7d4b2fa
M		 1832 }
1833
7b043899 1834 if (imux->num_items) {
62fe78e9
SR		 1835 /*
1836 * Set the current input for the muxes.
1837 * The STAC9221 has two input muxes with identical source
1838 * NID lists. Hopefully this won't get confused.
1839 */
1840 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 1841 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
1842 AC_VERB_SET_CONNECT_SEL,
1843 imux->items[0].index);
62fe78e9
SR		 1844 }
1845 }
1846
c7d4b2fa
M		 1847 return 0;
1848}
1849
c7d4b2fa
M		 1850static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
1851{
1852 struct sigmatel_spec *spec = codec->spec;
1853 int i;
1854
1855 for (i = 0; i < spec->autocfg.line_outs; i++) {
1856 hda_nid_t nid = spec->autocfg.line_out_pins[i];
1857 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
1858 }
1859}
1860
1861static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
1862{
1863 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 1864 int i;
c7d4b2fa 1865
eb06ed8f
TI		 1866 for (i = 0; i < spec->autocfg.hp_outs; i++) {
1867 hda_nid_t pin;
1868 pin = spec->autocfg.hp_pins[i];
1869 if (pin) /* connect to front */
1870 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
1871 }
1872 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
1873 hda_nid_t pin;
1874 pin = spec->autocfg.speaker_pins[i];
1875 if (pin) /* connect to front */
1876 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
1877 }
c7d4b2fa
M		 1878}
1879
3cc08dc6 1880static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 1881{
1882 struct sigmatel_spec *spec = codec->spec;
1883 int err;
1884
8b65727b
MP		 1885 if ((err = snd_hda_parse_pin_def_config(codec,
1886 &spec->autocfg,
1887 spec->dmic_nids)) < 0)
c7d4b2fa 1888 return err;
82bc955f 1889 if (! spec->autocfg.line_outs)
869264c4 1890 return 0; /* can't find valid pin config */
19039bd0 1891
403d1944
MP		 1892 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
1893 return err;
19039bd0
TI		 1894 if (spec->multiout.num_dacs == 0)
1895 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
1896 return err;
c7d4b2fa
M		 1897
1898 if ((err = stac92xx_auto_create_multi_out_ctls(spec, &spec->autocfg)) < 0 ||
1899 (err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg)) < 0 ||
1900 (err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
1901 return err;
1902
8b65727b
MP		 1903 if (spec->num_dmics > 0)
1904 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
1905 &spec->autocfg)) < 0)
1906 return err;
1907
c7d4b2fa 1908 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 1909 if (spec->multiout.max_channels > 2)
c7d4b2fa 1910 spec->surr_switch = 1;
c7d4b2fa 1911
82bc955f 1912 if (spec->autocfg.dig_out_pin)
3cc08dc6 1913 spec->multiout.dig_out_nid = dig_out;
82bc955f 1914 if (spec->autocfg.dig_in_pin)
3cc08dc6 1915 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 1916
1917 if (spec->kctl_alloc)
1918 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
1919
1920 spec->input_mux = &spec->private_imux;
8b65727b 1921 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 1922
1923 return 1;
1924}
1925
82bc955f
TI		 1926/* add playback controls for HP output */
1927static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
1928 struct auto_pin_cfg *cfg)
1929{
1930 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 1931 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 1932 unsigned int wid_caps;
1933
1934 if (! pin)
1935 return 0;
1936
1937 wid_caps = get_wcaps(codec, pin);
505cb341 1938 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 1939 spec->hp_detect = 1;
82bc955f
TI		 1940
1941 return 0;
1942}
1943
160ea0dc
RF		 1944/* add playback controls for LFE output */
1945static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
1946 struct auto_pin_cfg *cfg)
1947{
1948 struct sigmatel_spec *spec = codec->spec;
1949 int err;
1950 hda_nid_t lfe_pin = 0x0;
1951 int i;
1952
1953 /*
1954 * search speaker outs and line outs for a mono speaker pin
1955 * with an amp. If one is found, add LFE controls
1956 * for it.
1957 */
1958 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
1959 hda_nid_t pin = spec->autocfg.speaker_pins[i];
1960 unsigned long wcaps = get_wcaps(codec, pin);
1961 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
1962 if (wcaps == AC_WCAP_OUT_AMP)
1963 /* found a mono speaker with an amp, must be lfe */
1964 lfe_pin = pin;
1965 }
1966
1967 /* if speaker_outs is 0, then speakers may be in line_outs */
1968 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
1969 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
1970 hda_nid_t pin = spec->autocfg.line_out_pins[i];
1971 unsigned long cfg;
1972 cfg = snd_hda_codec_read(codec, pin, 0,
1973 AC_VERB_GET_CONFIG_DEFAULT,
1974 0x00);
1975 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
1976 unsigned long wcaps = get_wcaps(codec, pin);
1977 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
1978 if (wcaps == AC_WCAP_OUT_AMP)
1979 /* found a mono speaker with an amp,
1980 must be lfe */
1981 lfe_pin = pin;
1982 }
1983 }
1984 }
1985
1986 if (lfe_pin) {
eb06ed8f 1987 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 1988 if (err < 0)
1989 return err;
1990 }
1991
1992 return 0;
1993}
1994
c7d4b2fa
M		 1995static int stac9200_parse_auto_config(struct hda_codec *codec)
1996{
1997 struct sigmatel_spec *spec = codec->spec;
1998 int err;
1999
df694daa 2000 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2001 return err;
2002
2003 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2004 return err;
2005
82bc955f
TI		 2006 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2007 return err;
2008
160ea0dc
RF		 2009 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2010 return err;
2011
82bc955f 2012 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2013 spec->multiout.dig_out_nid = 0x05;
82bc955f 2014 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2015 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2016
2017 if (spec->kctl_alloc)
2018 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2019
2020 spec->input_mux = &spec->private_imux;
8b65727b 2021 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2022
2023 return 1;
2024}
2025
62fe78e9
SR		 2026/*
2027 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2028 * funky external mute control using GPIO pins.
2029 */
2030
2031static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
2032{
2033 unsigned int gpiostate, gpiomask, gpiodir;
2034
2035 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2036 AC_VERB_GET_GPIO_DATA, 0);
2037
2038 if (!muted)
2039 gpiostate |= (1 << pin);
2040 else
2041 gpiostate &= ~(1 << pin);
2042
2043 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2044 AC_VERB_GET_GPIO_MASK, 0);
2045 gpiomask |= (1 << pin);
2046
2047 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2048 AC_VERB_GET_GPIO_DIRECTION, 0);
2049 gpiodir |= (1 << pin);
2050
2051 /* AppleHDA seems to do this -- WTF is this verb?? */
2052 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2053
2054 snd_hda_codec_write(codec, codec->afg, 0,
2055 AC_VERB_SET_GPIO_MASK, gpiomask);
2056 snd_hda_codec_write(codec, codec->afg, 0,
2057 AC_VERB_SET_GPIO_DIRECTION, gpiodir);
2058
2059 msleep(1);
2060
2061 snd_hda_codec_write(codec, codec->afg, 0,
2062 AC_VERB_SET_GPIO_DATA, gpiostate);
2063}
2064
314634bc
TI		 2065static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2066 unsigned int event)
2067{
2068 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2069 snd_hda_codec_write_cache(codec, nid, 0,
2070 AC_VERB_SET_UNSOLICITED_ENABLE,
2071 (AC_USRSP_EN | event));
314634bc
TI		 2072}
2073
c7d4b2fa
M		 2074static int stac92xx_init(struct hda_codec *codec)
2075{
2076 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2077 struct auto_pin_cfg *cfg = &spec->autocfg;
2078 int i;
c7d4b2fa 2079
c7d4b2fa
M		 2080 snd_hda_sequence_write(codec, spec->init);
2081
82bc955f
TI		 2082 /* set up pins */
2083 if (spec->hp_detect) {
505cb341 2084 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2085 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2086 enable_pin_detect(codec, cfg->hp_pins[i],
2087 STAC_HP_EVENT);
0a07acaf
TI		 2088 /* force to enable the first line-out; the others are set up
2089 * in unsol_event
2090 */
2091 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2092 AC_PINCTL_OUT_EN);
eb995a8c 2093 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2094 /* fake event to set up pins */
2095 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2096 } else {
2097 stac92xx_auto_init_multi_out(codec);
2098 stac92xx_auto_init_hp_out(codec);
2099 }
2100 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2101 hda_nid_t nid = cfg->input_pins[i];
2102 if (nid) {
2103 unsigned int pinctl = AC_PINCTL_IN_EN;
2104 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2105 pinctl |= stac92xx_get_vref(codec, nid);
2106 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2107 }
82bc955f 2108 }
8b65727b
MP		 2109 if (spec->num_dmics > 0)
2110 for (i = 0; i < spec->num_dmics; i++)
2111 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2112 AC_PINCTL_IN_EN);
2113
82bc955f
TI		 2114 if (cfg->dig_out_pin)
2115 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2116 AC_PINCTL_OUT_EN);
2117 if (cfg->dig_in_pin)
2118 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2119 AC_PINCTL_IN_EN);
2120
62fe78e9
SR		 2121 if (spec->gpio_mute) {
2122 stac922x_gpio_mute(codec, 0, 0);
2123 stac922x_gpio_mute(codec, 1, 0);
2124 }
2125
c7d4b2fa
M		 2126 return 0;
2127}
2128
2f2f4251
M		 2129static void stac92xx_free(struct hda_codec *codec)
2130{
c7d4b2fa
M		 2131 struct sigmatel_spec *spec = codec->spec;
2132 int i;
2133
2134 if (! spec)
2135 return;
2136
2137 if (spec->kctl_alloc) {
2138 for (i = 0; i < spec->num_kctl_used; i++)
2139 kfree(spec->kctl_alloc[i].name);
2140 kfree(spec->kctl_alloc);
2141 }
2142
11b44bbd
RF		 2143 if (spec->bios_pin_configs)
2144 kfree(spec->bios_pin_configs);
2145
c7d4b2fa 2146 kfree(spec);
2f2f4251
M		 2147}
2148
4e55096e
M		 2149static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2150 unsigned int flag)
2151{
2152 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2153 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2154
f9acba43
TI		 2155 if (pin_ctl & AC_PINCTL_IN_EN) {
2156 /*
2157 * we need to check the current set-up direction of
2158 * shared input pins since they can be switched via
2159 * "xxx as Output" mixer switch
2160 */
2161 struct sigmatel_spec *spec = codec->spec;
2162 struct auto_pin_cfg *cfg = &spec->autocfg;
2163 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2164 spec->line_switch) ||
2165 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2166 spec->mic_switch))
2167 return;
2168 }
2169
7b043899
SL		 2170 /* if setting pin direction bits, clear the current
2171 direction bits first */
2172 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2173 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2174
82beb8fd 2175 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2176 AC_VERB_SET_PIN_WIDGET_CONTROL,
2177 pin_ctl | flag);
2178}
2179
2180static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2181 unsigned int flag)
2182{
2183 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2184 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 2185 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2186 AC_VERB_SET_PIN_WIDGET_CONTROL,
2187 pin_ctl & ~flag);
2188}
2189
314634bc
TI		 2190static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
2191{
2192 if (!nid)
2193 return 0;
2194 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
2195 & (1 << 31))
2196 return 1;
2197 return 0;
2198}
2199
2200static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 2201{
2202 struct sigmatel_spec *spec = codec->spec;
2203 struct auto_pin_cfg *cfg = &spec->autocfg;
2204 int i, presence;
2205
eb06ed8f
TI		 2206 presence = 0;
2207 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 2208 presence = get_pin_presence(codec, cfg->hp_pins[i]);
2209 if (presence)
2210 break;
eb06ed8f 2211 }
4e55096e
M		 2212
2213 if (presence) {
2214 /* disable lineouts, enable hp */
2215 for (i = 0; i < cfg->line_outs; i++)
2216 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
2217 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2218 for (i = 0; i < cfg->speaker_outs; i++)
2219 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
2220 AC_PINCTL_OUT_EN);
4e55096e
M		 2221 } else {
2222 /* enable lineouts, disable hp */
2223 for (i = 0; i < cfg->line_outs; i++)
2224 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
2225 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2226 for (i = 0; i < cfg->speaker_outs; i++)
2227 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
2228 AC_PINCTL_OUT_EN);
4e55096e
M		 2229 }
2230}
2231
314634bc
TI		 2232static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
2233{
2234 switch (res >> 26) {
2235 case STAC_HP_EVENT:
2236 stac92xx_hp_detect(codec, res);
2237 break;
2238 }
2239}
2240
cb53c626 2241#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2242static int stac92xx_resume(struct hda_codec *codec)
2243{
dc81bed1
TI		 2244 struct sigmatel_spec *spec = codec->spec;
2245
11b44bbd 2246 stac92xx_set_config_regs(codec);
dc81bed1
TI		 2247 snd_hda_sequence_write(codec, spec->init);
2248 if (spec->gpio_mute) {
2249 stac922x_gpio_mute(codec, 0, 0);
2250 stac922x_gpio_mute(codec, 1, 0);
2251 }
82beb8fd
TI		 2252 snd_hda_codec_resume_amp(codec);
2253 snd_hda_codec_resume_cache(codec);
dc81bed1
TI		 2254 /* invoke unsolicited event to reset the HP state */
2255 if (spec->hp_detect)
2256 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 2257 return 0;
2258}
2259#endif
2260
2f2f4251
M		 2261static struct hda_codec_ops stac92xx_patch_ops = {
2262 .build_controls = stac92xx_build_controls,
2263 .build_pcms = stac92xx_build_pcms,
2264 .init = stac92xx_init,
2265 .free = stac92xx_free,
4e55096e 2266 .unsol_event = stac92xx_unsol_event,
cb53c626 2267#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2268 .resume = stac92xx_resume,
2269#endif
2f2f4251
M		 2270};
2271
2272static int patch_stac9200(struct hda_codec *codec)
2273{
2274 struct sigmatel_spec *spec;
c7d4b2fa 2275 int err;
2f2f4251 2276
e560d8d8 2277 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2278 if (spec == NULL)
2279 return -ENOMEM;
2280
2281 codec->spec = spec;
a4eed138 2282 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 2283 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 2284 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
2285 stac9200_models,
2286 stac9200_cfg_tbl);
11b44bbd
RF		 2287 if (spec->board_config < 0) {
2288 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
2289 err = stac92xx_save_bios_config_regs(codec);
2290 if (err < 0) {
2291 stac92xx_free(codec);
2292 return err;
2293 }
2294 spec->pin_configs = spec->bios_pin_configs;
2295 } else {
403d1944
MP		 2296 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
2297 stac92xx_set_config_regs(codec);
2298 }
2f2f4251
M		 2299
2300 spec->multiout.max_channels = 2;
2301 spec->multiout.num_dacs = 1;
2302 spec->multiout.dac_nids = stac9200_dac_nids;
2303 spec->adc_nids = stac9200_adc_nids;
2304 spec->mux_nids = stac9200_mux_nids;
dabbed6f 2305 spec->num_muxes = 1;
8b65727b 2306 spec->num_dmics = 0;
c7d4b2fa
M		 2307
2308 spec->init = stac9200_core_init;
2f2f4251 2309 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 2310
2311 err = stac9200_parse_auto_config(codec);
2312 if (err < 0) {
2313 stac92xx_free(codec);
2314 return err;
2315 }
2f2f4251
M		 2316
2317 codec->patch_ops = stac92xx_patch_ops;
2318
2319 return 0;
2320}
2321
8e21c34c
TD		 2322static int patch_stac925x(struct hda_codec *codec)
2323{
2324 struct sigmatel_spec *spec;
2325 int err;
2326
2327 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2328 if (spec == NULL)
2329 return -ENOMEM;
2330
2331 codec->spec = spec;
a4eed138 2332 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 2333 spec->pin_nids = stac925x_pin_nids;
2334 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
2335 stac925x_models,
2336 stac925x_cfg_tbl);
9e507abd 2337 again:
8e21c34c 2338 if (spec->board_config < 0) {
2c11f955
TD		 2339 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2340 "using BIOS defaults\n");
8e21c34c
TD		 2341 err = stac92xx_save_bios_config_regs(codec);
2342 if (err < 0) {
2343 stac92xx_free(codec);
2344 return err;
2345 }
2346 spec->pin_configs = spec->bios_pin_configs;
2347 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
2348 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
2349 stac92xx_set_config_regs(codec);
2350 }
2351
2352 spec->multiout.max_channels = 2;
2353 spec->multiout.num_dacs = 1;
2354 spec->multiout.dac_nids = stac925x_dac_nids;
2355 spec->adc_nids = stac925x_adc_nids;
2356 spec->mux_nids = stac925x_mux_nids;
2357 spec->num_muxes = 1;
2c11f955
TD		 2358 switch (codec->vendor_id) {
2359 case 0x83847632: /* STAC9202 */
2360 case 0x83847633: /* STAC9202D */
2361 case 0x83847636: /* STAC9251 */
2362 case 0x83847637: /* STAC9251D */
2363 spec->num_dmics = 1;
2364 spec->dmic_nids = stac925x_dmic_nids;
2365 break;
2366 default:
2367 spec->num_dmics = 0;
2368 break;
2369 }
8e21c34c
TD		 2370
2371 spec->init = stac925x_core_init;
2372 spec->mixer = stac925x_mixer;
2373
2374 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 2375 if (!err) {
2376 if (spec->board_config < 0) {
2377 printk(KERN_WARNING "hda_codec: No auto-config is "
2378 "available, default to model=ref\n");
2379 spec->board_config = STAC_925x_REF;
2380 goto again;
2381 }
2382 err = -EINVAL;
2383 }
8e21c34c
TD		 2384 if (err < 0) {
2385 stac92xx_free(codec);
2386 return err;
2387 }
2388
2389 codec->patch_ops = stac92xx_patch_ops;
2390
2391 return 0;
2392}
2393
2f2f4251
M		 2394static int patch_stac922x(struct hda_codec *codec)
2395{
2396 struct sigmatel_spec *spec;
c7d4b2fa 2397 int err;
2f2f4251 2398
e560d8d8 2399 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2400 if (spec == NULL)
2401 return -ENOMEM;
2402
2403 codec->spec = spec;
a4eed138 2404 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 2405 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 2406 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
2407 stac922x_models,
2408 stac922x_cfg_tbl);
5d5d3bc3 2409 if (spec->board_config == STAC_INTEL_MAC_V3) {
3fc24d85
TI		 2410 spec->gpio_mute = 1;
2411 /* Intel Macs have all same PCI SSID, so we need to check
2412 * codec SSID to distinguish the exact models
2413 */
6f0778d8 2414 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 2415 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 2416
2417 case 0x106b0800:
2418 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 2419 break;
5d5d3bc3
IZ		 2420 case 0x106b0600:
2421 case 0x106b0700:
2422 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 2423 break;
5d5d3bc3
IZ		 2424 case 0x106b0e00:
2425 case 0x106b0f00:
2426 case 0x106b1600:
2427 case 0x106b1700:
2428 case 0x106b0200:
2429 case 0x106b1e00:
2430 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 2431 break;
5d5d3bc3
IZ		 2432 case 0x106b1a00:
2433 case 0x00000100:
2434 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 2435 break;
5d5d3bc3
IZ		 2436 case 0x106b0a00:
2437 case 0x106b2200:
2438 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 2439 break;
3fc24d85
TI		 2440 }
2441 }
2442
9e507abd 2443 again:
11b44bbd
RF		 2444 if (spec->board_config < 0) {
2445 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
2446 "using BIOS defaults\n");
2447 err = stac92xx_save_bios_config_regs(codec);
2448 if (err < 0) {
2449 stac92xx_free(codec);
2450 return err;
2451 }
2452 spec->pin_configs = spec->bios_pin_configs;
2453 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 2454 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
2455 stac92xx_set_config_regs(codec);
2456 }
2f2f4251 2457
c7d4b2fa
M		 2458 spec->adc_nids = stac922x_adc_nids;
2459 spec->mux_nids = stac922x_mux_nids;
2549413e 2460 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
8b65727b 2461 spec->num_dmics = 0;
c7d4b2fa
M		 2462
2463 spec->init = stac922x_core_init;
2f2f4251 2464 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 2465
2466 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 2467
3cc08dc6 2468 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 2469 if (!err) {
2470 if (spec->board_config < 0) {
2471 printk(KERN_WARNING "hda_codec: No auto-config is "
2472 "available, default to model=ref\n");
2473 spec->board_config = STAC_D945_REF;
2474 goto again;
2475 }
2476 err = -EINVAL;
2477 }
3cc08dc6
MP		 2478 if (err < 0) {
2479 stac92xx_free(codec);
2480 return err;
2481 }
2482
2483 codec->patch_ops = stac92xx_patch_ops;
2484
807a4636
TI		 2485 /* Fix Mux capture level; max to 2 */
2486 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
2487 (0 << AC_AMPCAP_OFFSET_SHIFT) |
2488 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
2489 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
2490 (0 << AC_AMPCAP_MUTE_SHIFT));
2491
3cc08dc6
MP		 2492 return 0;
2493}
2494
2495static int patch_stac927x(struct hda_codec *codec)
2496{
2497 struct sigmatel_spec *spec;
2498 int err;
2499
2500 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2501 if (spec == NULL)
2502 return -ENOMEM;
2503
2504 codec->spec = spec;
a4eed138 2505 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 2506 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 2507 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
2508 stac927x_models,
2509 stac927x_cfg_tbl);
9e507abd 2510 again:
11b44bbd 2511 if (spec->board_config < 0) {
3cc08dc6 2512 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n");
11b44bbd
RF		 2513 err = stac92xx_save_bios_config_regs(codec);
2514 if (err < 0) {
2515 stac92xx_free(codec);
2516 return err;
2517 }
2518 spec->pin_configs = spec->bios_pin_configs;
2519 } else if (stac927x_brd_tbl[spec->board_config] != NULL) {
3cc08dc6
MP		 2520 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
2521 stac92xx_set_config_regs(codec);
2522 }
2523
81d3dbde 2524 switch (spec->board_config) {
93ed1503 2525 case STAC_D965_3ST:
81d3dbde
TD		 2526 spec->adc_nids = stac927x_adc_nids;
2527 spec->mux_nids = stac927x_mux_nids;
2549413e 2528 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
8b65727b 2529 spec->num_dmics = 0;
93ed1503 2530 spec->init = d965_core_init;
81d3dbde
TD		 2531 spec->mixer = stac9227_mixer;
2532 break;
93ed1503
TD		 2533 case STAC_D965_5ST:
2534 spec->adc_nids = stac927x_adc_nids;
2535 spec->mux_nids = stac927x_mux_nids;
2549413e 2536 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
8b65727b 2537 spec->num_dmics = 0;
93ed1503 2538 spec->init = d965_core_init;
81d3dbde
TD		 2539 spec->mixer = stac9227_mixer;
2540 break;
2541 default:
2542 spec->adc_nids = stac927x_adc_nids;
2543 spec->mux_nids = stac927x_mux_nids;
2549413e 2544 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
8b65727b 2545 spec->num_dmics = 0;
81d3dbde
TD		 2546 spec->init = stac927x_core_init;
2547 spec->mixer = stac927x_mixer;
2548 }
3cc08dc6
MP		 2549
2550 spec->multiout.dac_nids = spec->dac_nids;
87d48363 2551 /* GPIO0 High = Enable EAPD */
8259980e
TI		 2552 spec->gpio_mask = spec->gpio_data = 0x00000001;
2553 stac92xx_enable_gpio_mask(codec);
92a22beb 2554
3cc08dc6 2555 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 2556 if (!err) {
2557 if (spec->board_config < 0) {
2558 printk(KERN_WARNING "hda_codec: No auto-config is "
2559 "available, default to model=ref\n");
2560 spec->board_config = STAC_D965_REF;
2561 goto again;
2562 }
2563 err = -EINVAL;
2564 }
c7d4b2fa
M		 2565 if (err < 0) {
2566 stac92xx_free(codec);
2567 return err;
2568 }
2f2f4251
M		 2569
2570 codec->patch_ops = stac92xx_patch_ops;
2571
2572 return 0;
2573}
2574
f3302a59
MP		 2575static int patch_stac9205(struct hda_codec *codec)
2576{
2577 struct sigmatel_spec *spec;
8259980e 2578 int err;
f3302a59
MP		 2579
2580 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2581 if (spec == NULL)
2582 return -ENOMEM;
2583
2584 codec->spec = spec;
a4eed138 2585 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 2586 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 2587 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
2588 stac9205_models,
2589 stac9205_cfg_tbl);
9e507abd 2590 again:
11b44bbd
RF		 2591 if (spec->board_config < 0) {
2592 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
2593 err = stac92xx_save_bios_config_regs(codec);
2594 if (err < 0) {
2595 stac92xx_free(codec);
2596 return err;
2597 }
2598 spec->pin_configs = spec->bios_pin_configs;
2599 } else {
f3302a59
MP		 2600 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
2601 stac92xx_set_config_regs(codec);
2602 }
2603
2604 spec->adc_nids = stac9205_adc_nids;
2605 spec->mux_nids = stac9205_mux_nids;
2549413e 2606 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 2607 spec->dmic_nids = stac9205_dmic_nids;
2549413e 2608 spec->num_dmics = ARRAY_SIZE(stac9205_dmic_nids);
8b65727b 2609 spec->dmux_nid = 0x1d;
f3302a59
MP		 2610
2611 spec->init = stac9205_core_init;
2612 spec->mixer = stac9205_mixer;
2613
2614 spec->multiout.dac_nids = spec->dac_nids;
87d48363 2615
ae0a8ed8
TD		 2616 switch (spec->board_config){
2617 case STAC_9205_M43xx:
2618 case STAC_9205_DELL_M43:
87d48363
MR		 2619 /* Enable SPDIF in/out */
2620 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
2621 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
2622
8259980e 2623 spec->gpio_mask = 0x00000007; /* GPIO0-2 */
87d48363
MR		 2624 /* GPIO0 High = EAPD, GPIO1 Low = DRM,
2625 * GPIO2 High = Headphone Mute
2626 */
8259980e 2627 spec->gpio_data = 0x00000005;
ae0a8ed8
TD		 2628 break;
2629 default:
2630 /* GPIO0 High = EAPD */
2631 spec->gpio_mask = spec->gpio_data = 0x00000001;
2632 break;
2633 }
33382403 2634
8259980e 2635 stac92xx_enable_gpio_mask(codec);
f3302a59 2636 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 2637 if (!err) {
2638 if (spec->board_config < 0) {
2639 printk(KERN_WARNING "hda_codec: No auto-config is "
2640 "available, default to model=ref\n");
2641 spec->board_config = STAC_9205_REF;
2642 goto again;
2643 }
2644 err = -EINVAL;
2645 }
f3302a59
MP		 2646 if (err < 0) {
2647 stac92xx_free(codec);
2648 return err;
2649 }
2650
2651 codec->patch_ops = stac92xx_patch_ops;
2652
2653 return 0;
2654}
2655
db064e50 2656/*
6d859065 2657 * STAC9872 hack
db064e50
TI		 2658 */
2659
99ccc560 2660/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 2661static hda_nid_t vaio_dacs[] = { 0x2 };
2662#define VAIO_HP_DAC 0x5
2663static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
2664static hda_nid_t vaio_mux_nids[] = { 0x15 };
2665
2666static struct hda_input_mux vaio_mux = {
2667 .num_items = 2,
2668 .items = {
d773781c 2669 /* { "HP", 0x0 }, */
1624cb9a
TI		 2670 { "Mic Jack", 0x1 },
2671 { "Internal Mic", 0x2 },
db064e50
TI		 2672 { "PCM", 0x3 },
2673 }
2674};
2675
2676static struct hda_verb vaio_init[] = {
2677 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 2678 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 2679 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2680 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2681 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2682 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2683 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 2684 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2685 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2686 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2687 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2688 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2689 {}
2690};
2691
6d859065
GM		 2692static struct hda_verb vaio_ar_init[] = {
2693 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
2694 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2695 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2696 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2697/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
2698 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2699 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 2700 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2701 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2702/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
2703 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2704 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2705 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2706 {}
2707};
2708
db064e50 2709/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 2710static struct hda_bind_ctls vaio_bind_master_vol = {
2711 .ops = &snd_hda_bind_vol,
2712 .values = {
2713 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2714 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2715 0
2716 },
2717};
db064e50
TI		 2718
2719/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 2720static struct hda_bind_ctls vaio_bind_master_sw = {
2721 .ops = &snd_hda_bind_sw,
2722 .values = {
2723 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2724 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2725 0,
2726 },
2727};
db064e50
TI		 2728
2729static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 2730 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2731 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 2732 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2733 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2734 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2735 {
2736 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2737 .name = "Capture Source",
2738 .count = 1,
2739 .info = stac92xx_mux_enum_info,
2740 .get = stac92xx_mux_enum_get,
2741 .put = stac92xx_mux_enum_put,
2742 },
2743 {}
2744};
2745
6d859065 2746static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 2747 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2748 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 2749 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2750 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2751 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2752 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
2753 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
2754 {
2755 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2756 .name = "Capture Source",
2757 .count = 1,
2758 .info = stac92xx_mux_enum_info,
2759 .get = stac92xx_mux_enum_get,
2760 .put = stac92xx_mux_enum_put,
2761 },
2762 {}
2763};
2764
2765static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 2766 .build_controls = stac92xx_build_controls,
2767 .build_pcms = stac92xx_build_pcms,
2768 .init = stac92xx_init,
2769 .free = stac92xx_free,
cb53c626 2770#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 2771 .resume = stac92xx_resume,
2772#endif
2773};
2774
72e7b0dd
TI		 2775static int stac9872_vaio_init(struct hda_codec *codec)
2776{
2777 int err;
2778
2779 err = stac92xx_init(codec);
2780 if (err < 0)
2781 return err;
2782 if (codec->patch_ops.unsol_event)
2783 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2784 return 0;
2785}
2786
2787static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
2788{
2789 if (get_pin_presence(codec, 0x0a)) {
2790 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
2791 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
2792 } else {
2793 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
2794 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
2795 }
2796}
2797
2798static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
2799{
2800 switch (res >> 26) {
2801 case STAC_HP_EVENT:
2802 stac9872_vaio_hp_detect(codec, res);
2803 break;
2804 }
2805}
2806
2807static struct hda_codec_ops stac9872_vaio_patch_ops = {
2808 .build_controls = stac92xx_build_controls,
2809 .build_pcms = stac92xx_build_pcms,
2810 .init = stac9872_vaio_init,
2811 .free = stac92xx_free,
2812 .unsol_event = stac9872_vaio_unsol_event,
2813#ifdef CONFIG_PM
2814 .resume = stac92xx_resume,
2815#endif
2816};
2817
6d859065
GM		 2818enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
2819 CXD9872RD_VAIO,
2820 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
2821 STAC9872AK_VAIO,
2822 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
2823 STAC9872K_VAIO,
2824 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 2825 CXD9872AKD_VAIO,
2826 STAC_9872_MODELS,
2827};
2828
2829static const char *stac9872_models[STAC_9872_MODELS] = {
2830 [CXD9872RD_VAIO] = "vaio",
2831 [CXD9872AKD_VAIO] = "vaio-ar",
2832};
2833
2834static struct snd_pci_quirk stac9872_cfg_tbl[] = {
2835 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
2836 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
2837 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 2838 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 2839 {}
2840};
2841
6d859065 2842static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 2843{
2844 struct sigmatel_spec *spec;
2845 int board_config;
2846
f5fcc13c
TI		 2847 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
2848 stac9872_models,
2849 stac9872_cfg_tbl);
db064e50
TI		 2850 if (board_config < 0)
2851 /* unknown config, let generic-parser do its job... */
2852 return snd_hda_parse_generic_codec(codec);
2853
2854 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2855 if (spec == NULL)
2856 return -ENOMEM;
2857
2858 codec->spec = spec;
2859 switch (board_config) {
6d859065
GM		 2860 case CXD9872RD_VAIO:
2861 case STAC9872AK_VAIO:
2862 case STAC9872K_VAIO:
db064e50
TI		 2863 spec->mixer = vaio_mixer;
2864 spec->init = vaio_init;
2865 spec->multiout.max_channels = 2;
2866 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
2867 spec->multiout.dac_nids = vaio_dacs;
2868 spec->multiout.hp_nid = VAIO_HP_DAC;
2869 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
2870 spec->adc_nids = vaio_adcs;
2871 spec->input_mux = &vaio_mux;
2872 spec->mux_nids = vaio_mux_nids;
72e7b0dd 2873 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 2874 break;
6d859065
GM		 2875
2876 case CXD9872AKD_VAIO:
2877 spec->mixer = vaio_ar_mixer;
2878 spec->init = vaio_ar_init;
2879 spec->multiout.max_channels = 2;
2880 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
2881 spec->multiout.dac_nids = vaio_dacs;
2882 spec->multiout.hp_nid = VAIO_HP_DAC;
2883 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
2884 spec->adc_nids = vaio_adcs;
2885 spec->input_mux = &vaio_mux;
2886 spec->mux_nids = vaio_mux_nids;
72e7b0dd 2887 codec->patch_ops = stac9872_patch_ops;
6d859065 2888 break;
db064e50
TI		 2889 }
2890
db064e50
TI		 2891 return 0;
2892}
2893
2894
2f2f4251
M		 2895/*
2896 * patch entries
2897 */
2898struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2899 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
2900 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
2901 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
2902 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
2903 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
2904 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
2905 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 2906 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
2907 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
2908 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
2909 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
2910 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
2911 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 2912 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
2913 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
2914 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
2915 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
2916 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
2917 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
2918 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
2919 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
2920 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
2921 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 2922 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
2923 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
2924 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
2925 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
2926 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
2927 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 2928 /* The following does not take into account .id=0x83847661 when subsys =
2929 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
2930 * currently not fully supported.
2931 */
2932 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
2933 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
2934 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 2935 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
2936 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
2937 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
2938 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
2939 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
2940 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
2941 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
2942 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
2f2f4251
M		 2943 {} /* terminator */
2944};
Clone of davem's net-next-2.6 tree