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[ALSA] hda: 92HD73xxx distortion fix
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
2f2f4251 36
4e55096e 37#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 38#define STAC_PWR_EVENT 0x20
39#define STAC_HP_EVENT 0x30
4e55096e 40
f5fcc13c
TI		 41enum {
42 STAC_REF,
bf277785 43 STAC_9200_OQO,
dfe495d0
TI		 44 STAC_9200_DELL_D21,
45 STAC_9200_DELL_D22,
46 STAC_9200_DELL_D23,
47 STAC_9200_DELL_M21,
48 STAC_9200_DELL_M22,
49 STAC_9200_DELL_M23,
50 STAC_9200_DELL_M24,
51 STAC_9200_DELL_M25,
52 STAC_9200_DELL_M26,
53 STAC_9200_DELL_M27,
1194b5b7 54 STAC_9200_GATEWAY,
f5fcc13c
TI		 55 STAC_9200_MODELS
56};
57
58enum {
59 STAC_9205_REF,
dfe495d0 60 STAC_9205_DELL_M42,
ae0a8ed8
TD		 61 STAC_9205_DELL_M43,
62 STAC_9205_DELL_M44,
f5fcc13c
TI		 63 STAC_9205_MODELS
64};
65
e1f0d669
MR		 66enum {
67 STAC_92HD73XX_REF,
a7662640 68 STAC_DELL_M6,
e1f0d669
MR		 69 STAC_92HD73XX_MODELS
70};
71
e035b841
MR		 72enum {
73 STAC_92HD71BXX_REF,
a7662640
MR		 74 STAC_DELL_M4_1,
75 STAC_DELL_M4_2,
e035b841
MR		 76 STAC_92HD71BXX_MODELS
77};
78
8e21c34c
TD		 79enum {
80 STAC_925x_REF,
81 STAC_M2_2,
82 STAC_MA6,
2c11f955 83 STAC_PA6,
8e21c34c
TD		 84 STAC_925x_MODELS
85};
86
f5fcc13c
TI		 87enum {
88 STAC_D945_REF,
89 STAC_D945GTP3,
90 STAC_D945GTP5,
5d5d3bc3
IZ		 91 STAC_INTEL_MAC_V1,
92 STAC_INTEL_MAC_V2,
93 STAC_INTEL_MAC_V3,
94 STAC_INTEL_MAC_V4,
95 STAC_INTEL_MAC_V5,
dfe495d0 96 /* for backward compatibility */
f5fcc13c 97 STAC_MACMINI,
3fc24d85 98 STAC_MACBOOK,
6f0778d8
NB		 99 STAC_MACBOOK_PRO_V1,
100 STAC_MACBOOK_PRO_V2,
f16928fb 101 STAC_IMAC_INTEL,
0dae0f83 102 STAC_IMAC_INTEL_20,
dfe495d0
TI		 103 STAC_922X_DELL_D81,
104 STAC_922X_DELL_D82,
105 STAC_922X_DELL_M81,
106 STAC_922X_DELL_M82,
f5fcc13c
TI		 107 STAC_922X_MODELS
108};
109
110enum {
111 STAC_D965_REF,
112 STAC_D965_3ST,
113 STAC_D965_5ST,
4ff076e5 114 STAC_DELL_3ST,
8e9068b1 115 STAC_DELL_BIOS,
f5fcc13c
TI		 116 STAC_927X_MODELS
117};
403d1944 118
2f2f4251 119struct sigmatel_spec {
c8b6bf9b 120 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 121 unsigned int num_mixers;
122
403d1944 123 int board_config;
c7d4b2fa 124 unsigned int surr_switch: 1;
403d1944
MP		 125 unsigned int line_switch: 1;
126 unsigned int mic_switch: 1;
3cc08dc6 127 unsigned int alt_switch: 1;
82bc955f 128 unsigned int hp_detect: 1;
c7d4b2fa 129
4fe5195c
MR		 130 /* gpio lines */
131 unsigned int gpio_mask;
132 unsigned int gpio_dir;
133 unsigned int gpio_data;
134 unsigned int gpio_mute;
135
136 /* analog loopback */
e1f0d669
MR		 137 unsigned char aloopback_mask;
138 unsigned char aloopback_shift;
8259980e 139
a64135a2
MR		 140 /* power management */
141 unsigned int num_pwrs;
142 hda_nid_t *pwr_nids;
b76c850f 143 hda_nid_t *dac_list;
a64135a2 144
2f2f4251 145 /* playback */
b22b4821
MR		 146 struct hda_input_mux *mono_mux;
147 unsigned int cur_mmux;
2f2f4251 148 struct hda_multi_out multiout;
3cc08dc6 149 hda_nid_t dac_nids[5];
2f2f4251
M		 150
151 /* capture */
152 hda_nid_t *adc_nids;
2f2f4251 153 unsigned int num_adcs;
dabbed6f
M		 154 hda_nid_t *mux_nids;
155 unsigned int num_muxes;
8b65727b
MP		 156 hda_nid_t *dmic_nids;
157 unsigned int num_dmics;
e1f0d669 158 hda_nid_t *dmux_nids;
1697055e 159 unsigned int num_dmuxes;
dabbed6f 160 hda_nid_t dig_in_nid;
b22b4821 161 hda_nid_t mono_nid;
2f2f4251 162
2f2f4251
M		 163 /* pin widgets */
164 hda_nid_t *pin_nids;
165 unsigned int num_pins;
2f2f4251 166 unsigned int *pin_configs;
11b44bbd 167 unsigned int *bios_pin_configs;
2f2f4251
M		 168
169 /* codec specific stuff */
170 struct hda_verb *init;
c8b6bf9b 171 struct snd_kcontrol_new *mixer;
2f2f4251
M		 172
173 /* capture source */
8b65727b 174 struct hda_input_mux *dinput_mux;
e1f0d669 175 unsigned int cur_dmux[2];
c7d4b2fa 176 struct hda_input_mux *input_mux;
3cc08dc6 177 unsigned int cur_mux[3];
2f2f4251 178
403d1944
MP		 179 /* i/o switches */
180 unsigned int io_switch[2];
0fb87bb4 181 unsigned int clfe_swap;
5f10c4a9 182 unsigned int aloopback;
2f2f4251 183
c7d4b2fa
M		 184 struct hda_pcm pcm_rec[2]; /* PCM information */
185
186 /* dynamic controls and input_mux */
187 struct auto_pin_cfg autocfg;
188 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 189 struct snd_kcontrol_new *kctl_alloc;
8b65727b 190 struct hda_input_mux private_dimux;
c7d4b2fa 191 struct hda_input_mux private_imux;
b22b4821 192 struct hda_input_mux private_mono_mux;
2f2f4251
M		 193};
194
195static hda_nid_t stac9200_adc_nids[1] = {
196 0x03,
197};
198
199static hda_nid_t stac9200_mux_nids[1] = {
200 0x0c,
201};
202
203static hda_nid_t stac9200_dac_nids[1] = {
204 0x02,
205};
206
a64135a2
MR		 207static hda_nid_t stac92hd73xx_pwr_nids[8] = {
208 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
209 0x0f, 0x10, 0x11
210};
211
e1f0d669
MR		 212static hda_nid_t stac92hd73xx_adc_nids[2] = {
213 0x1a, 0x1b
214};
215
216#define STAC92HD73XX_NUM_DMICS 2
217static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
218 0x13, 0x14, 0
219};
220
221#define STAC92HD73_DAC_COUNT 5
222static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
223 0x15, 0x16, 0x17, 0x18, 0x19,
224};
225
226static hda_nid_t stac92hd73xx_mux_nids[4] = {
227 0x28, 0x29, 0x2a, 0x2b,
228};
229
230static hda_nid_t stac92hd73xx_dmux_nids[2] = {
231 0x20, 0x21,
232};
233
a64135a2
MR		 234static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
235 0x0a, 0x0d, 0x0f
236};
237
e035b841
MR		 238static hda_nid_t stac92hd71bxx_adc_nids[2] = {
239 0x12, 0x13,
240};
241
242static hda_nid_t stac92hd71bxx_mux_nids[2] = {
243 0x1a, 0x1b
244};
245
e1f0d669
MR		 246static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
247 0x1c,
248};
249
aea7bb0a 250static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 251 0x10, /*0x11, */
252};
253
254#define STAC92HD71BXX_NUM_DMICS 2
255static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
256 0x18, 0x19, 0
257};
258
8e21c34c
TD		 259static hda_nid_t stac925x_adc_nids[1] = {
260 0x03,
261};
262
263static hda_nid_t stac925x_mux_nids[1] = {
264 0x0f,
265};
266
267static hda_nid_t stac925x_dac_nids[1] = {
268 0x02,
269};
270
f6e9852a
TI		 271#define STAC925X_NUM_DMICS 1
272static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
273 0x15, 0
2c11f955
TD		 274};
275
1697055e
TI		 276static hda_nid_t stac925x_dmux_nids[1] = {
277 0x14,
278};
279
2f2f4251
M		 280static hda_nid_t stac922x_adc_nids[2] = {
281 0x06, 0x07,
282};
283
284static hda_nid_t stac922x_mux_nids[2] = {
285 0x12, 0x13,
286};
287
3cc08dc6
MP		 288static hda_nid_t stac927x_adc_nids[3] = {
289 0x07, 0x08, 0x09
290};
291
292static hda_nid_t stac927x_mux_nids[3] = {
293 0x15, 0x16, 0x17
294};
295
b76c850f
MR		 296static hda_nid_t stac927x_dac_nids[6] = {
297 0x02, 0x03, 0x04, 0x05, 0x06, 0
298};
299
e1f0d669
MR		 300static hda_nid_t stac927x_dmux_nids[1] = {
301 0x1b,
302};
303
7f16859a
MR		 304#define STAC927X_NUM_DMICS 2
305static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
306 0x13, 0x14, 0
307};
308
f3302a59
MP		 309static hda_nid_t stac9205_adc_nids[2] = {
310 0x12, 0x13
311};
312
313static hda_nid_t stac9205_mux_nids[2] = {
314 0x19, 0x1a
315};
316
e1f0d669 317static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 318 0x1d,
e1f0d669
MR		 319};
320
f6e9852a
TI		 321#define STAC9205_NUM_DMICS 2
322static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
323 0x17, 0x18, 0
8b65727b
MP		 324};
325
c7d4b2fa 326static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 327 0x08, 0x09, 0x0d, 0x0e,
328 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 329};
330
8e21c34c
TD		 331static hda_nid_t stac925x_pin_nids[8] = {
332 0x07, 0x08, 0x0a, 0x0b,
333 0x0c, 0x0d, 0x10, 0x11,
334};
335
2f2f4251
M		 336static hda_nid_t stac922x_pin_nids[10] = {
337 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
338 0x0f, 0x10, 0x11, 0x15, 0x1b,
339};
340
a7662640 341static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 342 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
343 0x0f, 0x10, 0x11, 0x12, 0x13,
a7662640 344 0x14, 0x1e, 0x22
e1f0d669
MR		 345};
346
e035b841
MR		 347static hda_nid_t stac92hd71bxx_pin_nids[10] = {
348 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
349 0x0f, 0x14, 0x18, 0x19, 0x1e,
350};
351
3cc08dc6
MP		 352static hda_nid_t stac927x_pin_nids[14] = {
353 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
354 0x0f, 0x10, 0x11, 0x12, 0x13,
355 0x14, 0x21, 0x22, 0x23,
356};
357
f3302a59
MP		 358static hda_nid_t stac9205_pin_nids[12] = {
359 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
360 0x0f, 0x14, 0x16, 0x17, 0x18,
361 0x21, 0x22,
f3302a59
MP		 362};
363
8b65727b
MP		 364static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
365 struct snd_ctl_elem_info *uinfo)
366{
367 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
368 struct sigmatel_spec *spec = codec->spec;
369 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
370}
371
372static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
373 struct snd_ctl_elem_value *ucontrol)
374{
375 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
376 struct sigmatel_spec *spec = codec->spec;
e1f0d669 377 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 378
e1f0d669 379 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 380 return 0;
381}
382
383static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
384 struct snd_ctl_elem_value *ucontrol)
385{
386 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
387 struct sigmatel_spec *spec = codec->spec;
e1f0d669 388 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 389
390 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 391 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 392}
393
c8b6bf9b 394static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 395{
396 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
397 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 398 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 399}
400
c8b6bf9b 401static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 402{
403 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
404 struct sigmatel_spec *spec = codec->spec;
405 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
406
407 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
408 return 0;
409}
410
c8b6bf9b 411static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 412{
413 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
414 struct sigmatel_spec *spec = codec->spec;
415 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
416
c7d4b2fa 417 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 418 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
419}
420
b22b4821
MR		 421static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
422 struct snd_ctl_elem_info *uinfo)
423{
424 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
425 struct sigmatel_spec *spec = codec->spec;
426 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
427}
428
429static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
430 struct snd_ctl_elem_value *ucontrol)
431{
432 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
433 struct sigmatel_spec *spec = codec->spec;
434
435 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
436 return 0;
437}
438
439static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
440 struct snd_ctl_elem_value *ucontrol)
441{
442 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
443 struct sigmatel_spec *spec = codec->spec;
444
445 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
446 spec->mono_nid, &spec->cur_mmux);
447}
448
5f10c4a9
ML		 449#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
450
451static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
452 struct snd_ctl_elem_value *ucontrol)
453{
454 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 455 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 456 struct sigmatel_spec *spec = codec->spec;
457
e1f0d669
MR		 458 ucontrol->value.integer.value[0] = !!(spec->aloopback &
459 (spec->aloopback_mask << idx));
5f10c4a9
ML		 460 return 0;
461}
462
463static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
464 struct snd_ctl_elem_value *ucontrol)
465{
466 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
467 struct sigmatel_spec *spec = codec->spec;
e1f0d669 468 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 469 unsigned int dac_mode;
e1f0d669 470 unsigned int val, idx_val;
5f10c4a9 471
e1f0d669
MR		 472 idx_val = spec->aloopback_mask << idx;
473 if (ucontrol->value.integer.value[0])
474 val = spec->aloopback | idx_val;
475 else
476 val = spec->aloopback & ~idx_val;
68ea7b2f 477 if (spec->aloopback == val)
5f10c4a9
ML		 478 return 0;
479
68ea7b2f 480 spec->aloopback = val;
5f10c4a9 481
e1f0d669
MR		 482 /* Only return the bits defined by the shift value of the
483 * first two bytes of the mask
484 */
5f10c4a9 485 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 486 kcontrol->private_value & 0xFFFF, 0x0);
487 dac_mode >>= spec->aloopback_shift;
5f10c4a9 488
e1f0d669 489 if (spec->aloopback & idx_val) {
5f10c4a9 490 snd_hda_power_up(codec);
e1f0d669 491 dac_mode |= idx_val;
5f10c4a9
ML		 492 } else {
493 snd_hda_power_down(codec);
e1f0d669 494 dac_mode &= ~idx_val;
5f10c4a9
ML		 495 }
496
497 snd_hda_codec_write_cache(codec, codec->afg, 0,
498 kcontrol->private_value >> 16, dac_mode);
499
500 return 1;
501}
502
c7d4b2fa 503static struct hda_verb stac9200_core_init[] = {
2f2f4251 504 /* set dac0mux for dac converter */
c7d4b2fa 505 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 506 {}
507};
508
1194b5b7
TI		 509static struct hda_verb stac9200_eapd_init[] = {
510 /* set dac0mux for dac converter */
511 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
512 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
513 {}
514};
515
e1f0d669
MR		 516static struct hda_verb stac92hd73xx_6ch_core_init[] = {
517 /* set master volume and direct control */
518 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
519 /* setup audio connections */
520 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
521 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
522 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
523 /* setup adcs to point to mixer */
524 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
525 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 526 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
527 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
528 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
529 /* setup import muxs */
530 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
531 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
532 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
533 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
534 {}
535};
536
d654a660
MR		 537static struct hda_verb dell_eq_core_init[] = {
538 /* set master volume to max value without distortion
539 * and direct control */
540 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
541 /* setup audio connections */
542 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
543 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
544 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
545 /* setup adcs to point to mixer */
546 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
547 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
548 /* setup import muxs */
549 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
550 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
551 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
552 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
553 {}
554};
555
52fe0f9d
MR		 556static struct hda_verb dell_m6_core_init[] = {
557 /* set master volume and direct control */
558 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
559 /* setup audio connections */
7747ecce
MR		 560 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
561 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 562 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
563 /* setup adcs to point to mixer */
564 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
565 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
566 /* setup import muxs */
567 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
568 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
569 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
570 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
571 {}
572};
573
e1f0d669
MR		 574static struct hda_verb stac92hd73xx_8ch_core_init[] = {
575 /* set master volume and direct control */
576 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
577 /* setup audio connections */
578 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
579 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
580 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
581 /* connect hp ports to dac3 */
582 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
583 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
584 /* setup adcs to point to mixer */
585 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
586 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 587 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
588 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
589 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
590 /* setup import muxs */
591 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
592 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
593 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
594 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
595 {}
596};
597
598static struct hda_verb stac92hd73xx_10ch_core_init[] = {
599 /* set master volume and direct control */
600 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
601 /* setup audio connections */
602 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
603 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
604 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
605 /* dac3 is connected to import3 mux */
606 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
607 /* connect hp ports to dac4 */
608 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
609 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
610 /* setup adcs to point to mixer */
611 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
612 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 613 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
614 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
615 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
616 /* setup import muxs */
617 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
618 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
619 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
620 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
621 {}
622};
623
e035b841 624static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 625 /* set master volume and direct control */
626 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
627 /* connect headphone jack to dac1 */
628 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
629 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
630 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
631 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
632 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
633 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 634};
635
636static struct hda_verb stac92hd71bxx_analog_core_init[] = {
e035b841
MR		 637 /* set master volume and direct control */
638 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
639 /* connect headphone jack to dac1 */
640 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
9b35947f
MR		 641 /* connect ports 0d and 0f to audio mixer */
642 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
643 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
a64135a2 644 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
9b35947f
MR		 645 /* unmute dac0 input in audio mixer */
646 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
e035b841
MR		 647 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
648 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
649 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
650 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 651 {}
652};
653
8e21c34c
TD		 654static struct hda_verb stac925x_core_init[] = {
655 /* set dac0mux for dac converter */
656 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
657 {}
658};
659
c7d4b2fa 660static struct hda_verb stac922x_core_init[] = {
2f2f4251 661 /* set master volume and direct control */
c7d4b2fa 662 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 663 {}
664};
665
93ed1503 666static struct hda_verb d965_core_init[] = {
19039bd0 667 /* set master volume and direct control */
93ed1503 668 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 669 /* unmute node 0x1b */
670 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
671 /* select node 0x03 as DAC */
672 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
673 {}
674};
675
3cc08dc6
MP		 676static struct hda_verb stac927x_core_init[] = {
677 /* set master volume and direct control */
678 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
679 {}
680};
681
f3302a59
MP		 682static struct hda_verb stac9205_core_init[] = {
683 /* set master volume and direct control */
684 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
685 {}
686};
687
b22b4821
MR		 688#define STAC_MONO_MUX \
689 { \
690 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
691 .name = "Mono Mux", \
692 .count = 1, \
693 .info = stac92xx_mono_mux_enum_info, \
694 .get = stac92xx_mono_mux_enum_get, \
695 .put = stac92xx_mono_mux_enum_put, \
696 }
697
9e05b7a3 698#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 699 { \
700 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
701 .name = "Input Source", \
9e05b7a3 702 .count = cnt, \
ca7c5a8b
ML		 703 .info = stac92xx_mux_enum_info, \
704 .get = stac92xx_mux_enum_get, \
705 .put = stac92xx_mux_enum_put, \
706 }
707
e1f0d669 708#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 709 { \
710 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
711 .name = "Analog Loopback", \
e1f0d669 712 .count = cnt, \
5f10c4a9
ML		 713 .info = stac92xx_aloopback_info, \
714 .get = stac92xx_aloopback_get, \
715 .put = stac92xx_aloopback_put, \
716 .private_value = verb_read | (verb_write << 16), \
717 }
718
c8b6bf9b 719static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 720 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
721 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 722 STAC_INPUT_SOURCE(1),
2f2f4251
M		 723 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
724 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 725 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 726 { } /* end */
727};
728
e1f0d669 729static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 730 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
731
e1f0d669
MR		 732 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
733 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
734
735 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
736 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
737
738 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
739 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
740
741 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
742 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
743
744 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
745 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
746
747 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
748 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
749
750 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
751 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
752 { } /* end */
753};
754
755static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 756 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
757
e1f0d669
MR		 758 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
759 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
760
761 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
762 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
763
764 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
765 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
766
767 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
768 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
769
770 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
771 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
772
773 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
774 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
775
776 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
777 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
778 { } /* end */
779};
780
781static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 782 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
783
e1f0d669
MR		 784 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
785 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
786
787 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
788 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
789
790 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
791 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
792
793 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
794 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
795
796 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
797 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
798
799 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
800 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
801
802 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
803 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
804 { } /* end */
805};
806
541eee87 807static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 808 STAC_INPUT_SOURCE(2),
e035b841 809
9b35947f
MR		 810 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
811 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
812 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
813
814 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
815 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
816 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 817
9b35947f
MR		 818 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
819 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 820 { } /* end */
821};
822
541eee87 823static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 824 STAC_INPUT_SOURCE(2),
825 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
826
541eee87
MR		 827 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
828 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
829 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
830
831 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
832 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
833 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
834 { } /* end */
835};
836
8e21c34c 837static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 838 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 839 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
840 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
841 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
842 { } /* end */
843};
844
9e05b7a3 845static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 846 STAC_INPUT_SOURCE(2),
e1f0d669 847 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 848
849 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
850 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
851 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
852
853 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
854 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
855 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
856
2f2f4251
M		 857 { } /* end */
858};
859
19039bd0 860/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 861static struct snd_kcontrol_new stac922x_mixer[] = {
862 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 863 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
864 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
865 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
866
867 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
868 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
869 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 870 { } /* end */
871};
872
9e05b7a3 873
d1d985f0 874static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 875 STAC_INPUT_SOURCE(3),
e1f0d669 876 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 877
9e05b7a3
ML		 878 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
879 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
880 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
881
882 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
883 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
884 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
885
886 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
887 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
888 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 889 { } /* end */
890};
891
1697055e
TI		 892static struct snd_kcontrol_new stac_dmux_mixer = {
893 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
894 .name = "Digital Input Source",
895 /* count set later */
896 .info = stac92xx_dmux_enum_info,
897 .get = stac92xx_dmux_enum_get,
898 .put = stac92xx_dmux_enum_put,
899};
900
2134ea4f
TI		 901static const char *slave_vols[] = {
902 "Front Playback Volume",
903 "Surround Playback Volume",
904 "Center Playback Volume",
905 "LFE Playback Volume",
906 "Side Playback Volume",
907 "Headphone Playback Volume",
908 "Headphone Playback Volume",
909 "Speaker Playback Volume",
910 "External Speaker Playback Volume",
911 "Speaker2 Playback Volume",
912 NULL
913};
914
915static const char *slave_sws[] = {
916 "Front Playback Switch",
917 "Surround Playback Switch",
918 "Center Playback Switch",
919 "LFE Playback Switch",
920 "Side Playback Switch",
921 "Headphone Playback Switch",
922 "Headphone Playback Switch",
923 "Speaker Playback Switch",
924 "External Speaker Playback Switch",
925 "Speaker2 Playback Switch",
edb54a55 926 "IEC958 Playback Switch",
2134ea4f
TI		 927 NULL
928};
929
2f2f4251
M		 930static int stac92xx_build_controls(struct hda_codec *codec)
931{
932 struct sigmatel_spec *spec = codec->spec;
933 int err;
c7d4b2fa 934 int i;
2f2f4251
M		 935
936 err = snd_hda_add_new_ctls(codec, spec->mixer);
937 if (err < 0)
938 return err;
c7d4b2fa
M		 939
940 for (i = 0; i < spec->num_mixers; i++) {
941 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
942 if (err < 0)
943 return err;
944 }
1697055e
TI		 945 if (spec->num_dmuxes > 0) {
946 stac_dmux_mixer.count = spec->num_dmuxes;
947 err = snd_ctl_add(codec->bus->card,
948 snd_ctl_new1(&stac_dmux_mixer, codec));
949 if (err < 0)
950 return err;
951 }
c7d4b2fa 952
dabbed6f
M		 953 if (spec->multiout.dig_out_nid) {
954 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
955 if (err < 0)
956 return err;
9a08160b
TI		 957 err = snd_hda_create_spdif_share_sw(codec,
958 &spec->multiout);
959 if (err < 0)
960 return err;
961 spec->multiout.share_spdif = 1;
dabbed6f
M		 962 }
963 if (spec->dig_in_nid) {
964 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
965 if (err < 0)
966 return err;
967 }
2134ea4f
TI		 968
969 /* if we have no master control, let's create it */
970 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 971 unsigned int vmaster_tlv[4];
2134ea4f 972 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 973 HDA_OUTPUT, vmaster_tlv);
2134ea4f 974 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 975 vmaster_tlv, slave_vols);
2134ea4f
TI		 976 if (err < 0)
977 return err;
978 }
979 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
980 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
981 NULL, slave_sws);
982 if (err < 0)
983 return err;
984 }
985
dabbed6f 986 return 0;
2f2f4251
M		 987}
988
403d1944 989static unsigned int ref9200_pin_configs[8] = {
dabbed6f 990 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 991 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
992};
993
dfe495d0
TI		 994/*
995 STAC 9200 pin configs for
996 102801A8
997 102801DE
998 102801E8
999*/
1000static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1001 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1002 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1003};
1004
1005/*
1006 STAC 9200 pin configs for
1007 102801C0
1008 102801C1
1009*/
1010static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1011 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1012 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1013};
1014
1015/*
1016 STAC 9200 pin configs for
1017 102801C4 (Dell Dimension E310)
1018 102801C5
1019 102801C7
1020 102801D9
1021 102801DA
1022 102801E3
1023*/
1024static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1025 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1026 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1027};
1028
1029
1030/*
1031 STAC 9200-32 pin configs for
1032 102801B5 (Dell Inspiron 630m)
1033 102801D8 (Dell Inspiron 640m)
1034*/
1035static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1036 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1037 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1038};
1039
1040/*
1041 STAC 9200-32 pin configs for
1042 102801C2 (Dell Latitude D620)
1043 102801C8
1044 102801CC (Dell Latitude D820)
1045 102801D4
1046 102801D6
1047*/
1048static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1049 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1050 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1051};
1052
1053/*
1054 STAC 9200-32 pin configs for
1055 102801CE (Dell XPS M1710)
1056 102801CF (Dell Precision M90)
1057*/
1058static unsigned int dell9200_m23_pin_configs[8] = {
1059 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1060 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1061};
1062
1063/*
1064 STAC 9200-32 pin configs for
1065 102801C9
1066 102801CA
1067 102801CB (Dell Latitude 120L)
1068 102801D3
1069*/
1070static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1071 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1072 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1073};
1074
1075/*
1076 STAC 9200-32 pin configs for
1077 102801BD (Dell Inspiron E1505n)
1078 102801EE
1079 102801EF
1080*/
1081static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1082 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1083 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1084};
1085
1086/*
1087 STAC 9200-32 pin configs for
1088 102801F5 (Dell Inspiron 1501)
1089 102801F6
1090*/
1091static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1092 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1093 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1094};
1095
1096/*
1097 STAC 9200-32
1098 102801CD (Dell Inspiron E1705/9400)
1099*/
1100static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1101 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1102 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1103};
1104
bf277785
TD		 1105static unsigned int oqo9200_pin_configs[8] = {
1106 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1107 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1108};
1109
dfe495d0 1110
f5fcc13c
TI		 1111static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1112 [STAC_REF] = ref9200_pin_configs,
bf277785 1113 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1114 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1115 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1116 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1117 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1118 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1119 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1120 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1121 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1122 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1123 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 1124};
1125
f5fcc13c
TI		 1126static const char *stac9200_models[STAC_9200_MODELS] = {
1127 [STAC_REF] = "ref",
bf277785 1128 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1129 [STAC_9200_DELL_D21] = "dell-d21",
1130 [STAC_9200_DELL_D22] = "dell-d22",
1131 [STAC_9200_DELL_D23] = "dell-d23",
1132 [STAC_9200_DELL_M21] = "dell-m21",
1133 [STAC_9200_DELL_M22] = "dell-m22",
1134 [STAC_9200_DELL_M23] = "dell-m23",
1135 [STAC_9200_DELL_M24] = "dell-m24",
1136 [STAC_9200_DELL_M25] = "dell-m25",
1137 [STAC_9200_DELL_M26] = "dell-m26",
1138 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1139 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 1140};
1141
1142static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1143 /* SigmaTel reference board */
1144 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1145 "DFI LanParty", STAC_REF),
e7377071 1146 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1147 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1148 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1149 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1150 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1151 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1152 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1153 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1154 "unknown Dell", STAC_9200_DELL_D22),
1155 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1156 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1157 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1158 "Dell Latitude D620", STAC_9200_DELL_M22),
1159 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1160 "unknown Dell", STAC_9200_DELL_D23),
1161 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1162 "unknown Dell", STAC_9200_DELL_D23),
1163 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1164 "unknown Dell", STAC_9200_DELL_M22),
1165 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1166 "unknown Dell", STAC_9200_DELL_M24),
1167 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1168 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1170 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1172 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1174 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1176 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1178 "Dell Precision M90", STAC_9200_DELL_M23),
1179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1180 "unknown Dell", STAC_9200_DELL_M22),
1181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1182 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1183 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1184 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1185 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1186 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1187 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1188 "unknown Dell", STAC_9200_DELL_D23),
1189 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1190 "unknown Dell", STAC_9200_DELL_D23),
1191 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1192 "unknown Dell", STAC_9200_DELL_D21),
1193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1194 "unknown Dell", STAC_9200_DELL_D23),
1195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1196 "unknown Dell", STAC_9200_DELL_D21),
1197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1198 "unknown Dell", STAC_9200_DELL_M25),
1199 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1200 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1202 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1203 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1204 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 1205 /* Panasonic */
1206 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 1207 /* Gateway machines needs EAPD to be set on resume */
1208 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1209 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1210 STAC_9200_GATEWAY),
1211 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1212 STAC_9200_GATEWAY),
bf277785
TD		 1213 /* OQO Mobile */
1214 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1215 {} /* terminator */
1216};
1217
8e21c34c
TD		 1218static unsigned int ref925x_pin_configs[8] = {
1219 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1220 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1221};
1222
1223static unsigned int stac925x_MA6_pin_configs[8] = {
1224 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1225 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1226};
1227
2c11f955
TD		 1228static unsigned int stac925x_PA6_pin_configs[8] = {
1229 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1230 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1231};
1232
8e21c34c 1233static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1234 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1235 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1236};
1237
1238static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1239 [STAC_REF] = ref925x_pin_configs,
1240 [STAC_M2_2] = stac925xM2_2_pin_configs,
1241 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1242 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1243};
1244
1245static const char *stac925x_models[STAC_925x_MODELS] = {
1246 [STAC_REF] = "ref",
1247 [STAC_M2_2] = "m2-2",
1248 [STAC_MA6] = "m6",
2c11f955 1249 [STAC_PA6] = "pa6",
8e21c34c
TD		 1250};
1251
1252static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1253 /* SigmaTel reference board */
1254 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1255 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1256 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1257 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1258 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1259 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1260 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1261 {} /* terminator */
1262};
1263
a7662640 1264static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1265 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1266 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1267 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1268 0x01452050,
1269};
1270
1271static unsigned int dell_m6_pin_configs[13] = {
1272 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
1273 0x03a11020, 0x03011050, 0x4f0000f0, 0x4f0000f0,
1274 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1275 0x4f0000f0,
e1f0d669
MR		 1276};
1277
1278static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1279 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1280 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1281};
1282
1283static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1284 [STAC_92HD73XX_REF] = "ref",
a7662640 1285 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1286};
1287
1288static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1289 /* SigmaTel reference board */
1290 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1291 "DFI LanParty", STAC_92HD73XX_REF),
1292 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1293 "unknown Dell", STAC_DELL_M6),
1294 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1295 "unknown Dell", STAC_DELL_M6),
1296 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1297 "unknown Dell", STAC_DELL_M6),
1298 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1299 "unknown Dell", STAC_DELL_M6),
1300 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1301 "unknown Dell", STAC_DELL_M6),
1302 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1303 "unknown Dell", STAC_DELL_M6),
1304 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1305 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1306 {} /* terminator */
1307};
1308
e035b841
MR		 1309static unsigned int ref92hd71bxx_pin_configs[10] = {
1310 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1311 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1312 0x90a000f0, 0x01452050,
1313};
1314
a7662640
MR		 1315static unsigned int dell_m4_1_pin_configs[13] = {
1316 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
1317 0x23a1902e, 0x23014250, 0x40f000f0, 0x4f0000f0,
1318 0x40f000f0, 0x4f0000f0,
1319};
1320
1321static unsigned int dell_m4_2_pin_configs[13] = {
1322 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1323 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
1324 0x40f000f0, 0x044413b0,
1325};
1326
e035b841
MR		 1327static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1328 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1329 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1330 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
e035b841
MR		 1331};
1332
1333static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1334 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1335 [STAC_DELL_M4_1] = "dell-m4-1",
1336 [STAC_DELL_M4_2] = "dell-m4-2",
e035b841
MR		 1337};
1338
1339static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1340 /* SigmaTel reference board */
1341 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1342 "DFI LanParty", STAC_92HD71BXX_REF),
a7662640
MR		 1343 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1344 "unknown Dell", STAC_DELL_M4_1),
1345 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1346 "unknown Dell", STAC_DELL_M4_1),
1347 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1348 "unknown Dell", STAC_DELL_M4_1),
1349 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1350 "unknown Dell", STAC_DELL_M4_1),
1351 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1352 "unknown Dell", STAC_DELL_M4_1),
1353 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1354 "unknown Dell", STAC_DELL_M4_1),
1355 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1356 "unknown Dell", STAC_DELL_M4_1),
1357 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1358 "unknown Dell", STAC_DELL_M4_2),
1359 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1360 "unknown Dell", STAC_DELL_M4_2),
1361 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1362 "unknown Dell", STAC_DELL_M4_2),
1363 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1364 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1365 {} /* terminator */
1366};
1367
403d1944
MP		 1368static unsigned int ref922x_pin_configs[10] = {
1369 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1370 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1371 0x40000100, 0x40000100,
1372};
1373
dfe495d0
TI		 1374/*
1375 STAC 922X pin configs for
1376 102801A7
1377 102801AB
1378 102801A9
1379 102801D1
1380 102801D2
1381*/
1382static unsigned int dell_922x_d81_pin_configs[10] = {
1383 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1384 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1385 0x01813122, 0x400001f2,
1386};
1387
1388/*
1389 STAC 922X pin configs for
1390 102801AC
1391 102801D0
1392*/
1393static unsigned int dell_922x_d82_pin_configs[10] = {
1394 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1395 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1396 0x01813122, 0x400001f1,
1397};
1398
1399/*
1400 STAC 922X pin configs for
1401 102801BF
1402*/
1403static unsigned int dell_922x_m81_pin_configs[10] = {
1404 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1405 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1406 0x40C003f1, 0x405003f0,
1407};
1408
1409/*
1410 STAC 9221 A1 pin configs for
1411 102801D7 (Dell XPS M1210)
1412*/
1413static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1414 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1415 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1416 0x508003f3, 0x405003f4,
1417};
1418
403d1944 1419static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1420 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1421 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1422 0x02a19120, 0x40000100,
1423};
1424
1425static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1426 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1427 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1428 0x02a19320, 0x40000100,
1429};
1430
5d5d3bc3
IZ		 1431static unsigned int intel_mac_v1_pin_configs[10] = {
1432 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1433 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1434 0x400000fc, 0x400000fb,
1435};
1436
1437static unsigned int intel_mac_v2_pin_configs[10] = {
1438 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1439 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1440 0x400000fc, 0x400000fb,
6f0778d8
NB		 1441};
1442
5d5d3bc3
IZ		 1443static unsigned int intel_mac_v3_pin_configs[10] = {
1444 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1445 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1446 0x400000fc, 0x400000fb,
1447};
1448
5d5d3bc3
IZ		 1449static unsigned int intel_mac_v4_pin_configs[10] = {
1450 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1451 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1452 0x400000fc, 0x400000fb,
1453};
1454
5d5d3bc3
IZ		 1455static unsigned int intel_mac_v5_pin_configs[10] = {
1456 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1457 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1458 0x400000fc, 0x400000fb,
0dae0f83
TI		 1459};
1460
76c08828 1461
19039bd0 1462static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1463 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1464 [STAC_D945GTP3] = d945gtp3_pin_configs,
1465 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1466 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1467 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1468 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1469 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1470 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1471 /* for backward compatibility */
5d5d3bc3
IZ		 1472 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1473 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1474 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1475 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1476 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1477 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1478 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1479 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1480 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1481 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1482};
1483
f5fcc13c
TI		 1484static const char *stac922x_models[STAC_922X_MODELS] = {
1485 [STAC_D945_REF] = "ref",
1486 [STAC_D945GTP5] = "5stack",
1487 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1488 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1489 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1490 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1491 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1492 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1493 /* for backward compatibility */
f5fcc13c 1494 [STAC_MACMINI] = "macmini",
3fc24d85 1495 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1496 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1497 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1498 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1499 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1500 [STAC_922X_DELL_D81] = "dell-d81",
1501 [STAC_922X_DELL_D82] = "dell-d82",
1502 [STAC_922X_DELL_M81] = "dell-m81",
1503 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1504};
1505
1506static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1507 /* SigmaTel reference board */
1508 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1509 "DFI LanParty", STAC_D945_REF),
1510 /* Intel 945G based systems */
1511 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1512 "Intel D945G", STAC_D945GTP3),
1513 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1514 "Intel D945G", STAC_D945GTP3),
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1516 "Intel D945G", STAC_D945GTP3),
1517 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1518 "Intel D945G", STAC_D945GTP3),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1520 "Intel D945G", STAC_D945GTP3),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1522 "Intel D945G", STAC_D945GTP3),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1524 "Intel D945G", STAC_D945GTP3),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1526 "Intel D945G", STAC_D945GTP3),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1528 "Intel D945G", STAC_D945GTP3),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1530 "Intel D945G", STAC_D945GTP3),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1532 "Intel D945G", STAC_D945GTP3),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1534 "Intel D945G", STAC_D945GTP3),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1536 "Intel D945G", STAC_D945GTP3),
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1538 "Intel D945G", STAC_D945GTP3),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1540 "Intel D945G", STAC_D945GTP3),
1541 /* Intel D945G 5-stack systems */
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1543 "Intel D945G", STAC_D945GTP5),
1544 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1545 "Intel D945G", STAC_D945GTP5),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1547 "Intel D945G", STAC_D945GTP5),
1548 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1549 "Intel D945G", STAC_D945GTP5),
1550 /* Intel 945P based systems */
1551 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1552 "Intel D945P", STAC_D945GTP3),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1554 "Intel D945P", STAC_D945GTP3),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1556 "Intel D945P", STAC_D945GTP3),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1558 "Intel D945P", STAC_D945GTP3),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1560 "Intel D945P", STAC_D945GTP3),
1561 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1562 "Intel D945P", STAC_D945GTP5),
1563 /* other systems */
1564 /* Apple Mac Mini (early 2006) */
1565 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1566 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1567 /* Dell systems */
1568 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1569 "unknown Dell", STAC_922X_DELL_D81),
1570 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1571 "unknown Dell", STAC_922X_DELL_D81),
1572 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1573 "unknown Dell", STAC_922X_DELL_D81),
1574 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1575 "unknown Dell", STAC_922X_DELL_D82),
1576 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1577 "unknown Dell", STAC_922X_DELL_M81),
1578 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1579 "unknown Dell", STAC_922X_DELL_D82),
1580 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1581 "unknown Dell", STAC_922X_DELL_D81),
1582 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1583 "unknown Dell", STAC_922X_DELL_D81),
1584 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1585 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1586 {} /* terminator */
1587};
1588
3cc08dc6 1589static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1590 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1591 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1592 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1593 0x01c42190, 0x40000100,
3cc08dc6
MP		 1594};
1595
93ed1503 1596static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1597 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1598 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1599 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1600 0x40000100, 0x40000100
1601};
1602
93ed1503
TD		 1603static unsigned int d965_5st_pin_configs[14] = {
1604 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1605 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1606 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1607 0x40000100, 0x40000100
1608};
1609
4ff076e5
TD		 1610static unsigned int dell_3st_pin_configs[14] = {
1611 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1612 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1613 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1614 0x40c003fc, 0x40000100
1615};
1616
93ed1503 1617static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1618 [STAC_D965_REF] = ref927x_pin_configs,
1619 [STAC_D965_3ST] = d965_3st_pin_configs,
1620 [STAC_D965_5ST] = d965_5st_pin_configs,
1621 [STAC_DELL_3ST] = dell_3st_pin_configs,
1622 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1623};
1624
f5fcc13c 1625static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1626 [STAC_D965_REF] = "ref",
1627 [STAC_D965_3ST] = "3stack",
1628 [STAC_D965_5ST] = "5stack",
1629 [STAC_DELL_3ST] = "dell-3stack",
1630 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1631};
1632
1633static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1634 /* SigmaTel reference board */
1635 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1636 "DFI LanParty", STAC_D965_REF),
81d3dbde 1637 /* Intel 946 based systems */
f5fcc13c
TI		 1638 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1639 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1640 /* 965 based 3 stack systems */
f5fcc13c
TI		 1641 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1642 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1643 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1644 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1645 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1646 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1647 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1648 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1649 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1650 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1651 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1652 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1653 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1654 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1655 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1656 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1657 /* Dell 3 stack systems */
8e9068b1 1658 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1659 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1660 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1661 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1662 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1663 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1664 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1
MR		 1665 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1666 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1667 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1668 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1669 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1670 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1671 /* 965 based 5 stack systems */
f5fcc13c
TI		 1672 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1673 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1674 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1675 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1676 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1677 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1678 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1679 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1680 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1681 {} /* terminator */
1682};
1683
f3302a59
MP		 1684static unsigned int ref9205_pin_configs[12] = {
1685 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1686 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1687 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1688};
1689
dfe495d0
TI		 1690/*
1691 STAC 9205 pin configs for
1692 102801F1
1693 102801F2
1694 102801FC
1695 102801FD
1696 10280204
1697 1028021F
3fa2ef74 1698 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1699*/
1700static unsigned int dell_9205_m42_pin_configs[12] = {
1701 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1702 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1703 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1704};
1705
1706/*
1707 STAC 9205 pin configs for
1708 102801F9
1709 102801FA
1710 102801FE
1711 102801FF (Dell Precision M4300)
1712 10280206
1713 10280200
1714 10280201
1715*/
1716static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1717 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1718 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1719 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1720};
1721
dfe495d0 1722static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1723 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1724 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1725 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1726};
1727
f5fcc13c 1728static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1729 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1730 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1731 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1732 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1733};
1734
f5fcc13c
TI		 1735static const char *stac9205_models[STAC_9205_MODELS] = {
1736 [STAC_9205_REF] = "ref",
dfe495d0 1737 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1738 [STAC_9205_DELL_M43] = "dell-m43",
1739 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1740};
1741
1742static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1743 /* SigmaTel reference board */
1744 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1745 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1746 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1747 "unknown Dell", STAC_9205_DELL_M42),
1748 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1749 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1750 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1751 "Dell Precision", STAC_9205_DELL_M43),
1752 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1753 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1754 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1755 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1756 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1757 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1758 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1759 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1760 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1761 "unknown Dell", STAC_9205_DELL_M42),
1762 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1763 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1764 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1765 "Dell Precision", STAC_9205_DELL_M43),
1766 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1767 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1769 "Dell Precision", STAC_9205_DELL_M43),
1770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1771 "Dell Inspiron", STAC_9205_DELL_M44),
1772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1773 "Dell Inspiron", STAC_9205_DELL_M44),
1774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1775 "Dell Inspiron", STAC_9205_DELL_M44),
1776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1777 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1778 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1779 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1780 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1781 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1782 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1783 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1784 {} /* terminator */
1785};
1786
11b44bbd
RF		 1787static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1788{
1789 int i;
1790 struct sigmatel_spec *spec = codec->spec;
1791
1792 if (! spec->bios_pin_configs) {
1793 spec->bios_pin_configs = kcalloc(spec->num_pins,
1794 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1795 if (! spec->bios_pin_configs)
1796 return -ENOMEM;
1797 }
1798
1799 for (i = 0; i < spec->num_pins; i++) {
1800 hda_nid_t nid = spec->pin_nids[i];
1801 unsigned int pin_cfg;
1802
1803 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1804 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1805 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1806 nid, pin_cfg);
1807 spec->bios_pin_configs[i] = pin_cfg;
1808 }
1809
1810 return 0;
1811}
1812
87d48363
MR		 1813static void stac92xx_set_config_reg(struct hda_codec *codec,
1814 hda_nid_t pin_nid, unsigned int pin_config)
1815{
1816 int i;
1817 snd_hda_codec_write(codec, pin_nid, 0,
1818 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1819 pin_config & 0x000000ff);
1820 snd_hda_codec_write(codec, pin_nid, 0,
1821 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1822 (pin_config & 0x0000ff00) >> 8);
1823 snd_hda_codec_write(codec, pin_nid, 0,
1824 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1825 (pin_config & 0x00ff0000) >> 16);
1826 snd_hda_codec_write(codec, pin_nid, 0,
1827 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1828 pin_config >> 24);
1829 i = snd_hda_codec_read(codec, pin_nid, 0,
1830 AC_VERB_GET_CONFIG_DEFAULT,
1831 0x00);
1832 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1833 pin_nid, i);
1834}
1835
2f2f4251
M		 1836static void stac92xx_set_config_regs(struct hda_codec *codec)
1837{
1838 int i;
1839 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1840
87d48363
MR		 1841 if (!spec->pin_configs)
1842 return;
11b44bbd 1843
87d48363
MR		 1844 for (i = 0; i < spec->num_pins; i++)
1845 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1846 spec->pin_configs[i]);
2f2f4251 1847}
2f2f4251 1848
dabbed6f 1849/*
c7d4b2fa 1850 * Analog playback callbacks
dabbed6f 1851 */
c7d4b2fa
M		 1852static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1853 struct hda_codec *codec,
c8b6bf9b 1854 struct snd_pcm_substream *substream)
2f2f4251 1855{
dabbed6f 1856 struct sigmatel_spec *spec = codec->spec;
9a08160b
TI		 1857 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
1858 hinfo);
2f2f4251
M		 1859}
1860
2f2f4251
M		 1861static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1862 struct hda_codec *codec,
1863 unsigned int stream_tag,
1864 unsigned int format,
c8b6bf9b 1865 struct snd_pcm_substream *substream)
2f2f4251
M		 1866{
1867 struct sigmatel_spec *spec = codec->spec;
403d1944 1868 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1869}
1870
1871static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1872 struct hda_codec *codec,
c8b6bf9b 1873 struct snd_pcm_substream *substream)
2f2f4251
M		 1874{
1875 struct sigmatel_spec *spec = codec->spec;
1876 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1877}
1878
dabbed6f
M		 1879/*
1880 * Digital playback callbacks
1881 */
1882static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1883 struct hda_codec *codec,
c8b6bf9b 1884 struct snd_pcm_substream *substream)
dabbed6f
M		 1885{
1886 struct sigmatel_spec *spec = codec->spec;
1887 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1888}
1889
1890static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1891 struct hda_codec *codec,
c8b6bf9b 1892 struct snd_pcm_substream *substream)
dabbed6f
M		 1893{
1894 struct sigmatel_spec *spec = codec->spec;
1895 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1896}
1897
6b97eb45
TI		 1898static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1899 struct hda_codec *codec,
1900 unsigned int stream_tag,
1901 unsigned int format,
1902 struct snd_pcm_substream *substream)
1903{
1904 struct sigmatel_spec *spec = codec->spec;
1905 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1906 stream_tag, format, substream);
1907}
1908
dabbed6f 1909
2f2f4251
M		 1910/*
1911 * Analog capture callbacks
1912 */
1913static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1914 struct hda_codec *codec,
1915 unsigned int stream_tag,
1916 unsigned int format,
c8b6bf9b 1917 struct snd_pcm_substream *substream)
2f2f4251
M		 1918{
1919 struct sigmatel_spec *spec = codec->spec;
1920
1921 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1922 stream_tag, 0, format);
1923 return 0;
1924}
1925
1926static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1927 struct hda_codec *codec,
c8b6bf9b 1928 struct snd_pcm_substream *substream)
2f2f4251
M		 1929{
1930 struct sigmatel_spec *spec = codec->spec;
1931
1932 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1933 return 0;
1934}
1935
dabbed6f
M		 1936static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1937 .substreams = 1,
1938 .channels_min = 2,
1939 .channels_max = 2,
1940 /* NID is set in stac92xx_build_pcms */
1941 .ops = {
1942 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1943 .close = stac92xx_dig_playback_pcm_close,
1944 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1945 },
1946};
1947
1948static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1949 .substreams = 1,
1950 .channels_min = 2,
1951 .channels_max = 2,
1952 /* NID is set in stac92xx_build_pcms */
1953};
1954
2f2f4251
M		 1955static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1956 .substreams = 1,
1957 .channels_min = 2,
c7d4b2fa 1958 .channels_max = 8,
2f2f4251
M		 1959 .nid = 0x02, /* NID to query formats and rates */
1960 .ops = {
1961 .open = stac92xx_playback_pcm_open,
1962 .prepare = stac92xx_playback_pcm_prepare,
1963 .cleanup = stac92xx_playback_pcm_cleanup
1964 },
1965};
1966
3cc08dc6
MP		 1967static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1968 .substreams = 1,
1969 .channels_min = 2,
1970 .channels_max = 2,
1971 .nid = 0x06, /* NID to query formats and rates */
1972 .ops = {
1973 .open = stac92xx_playback_pcm_open,
1974 .prepare = stac92xx_playback_pcm_prepare,
1975 .cleanup = stac92xx_playback_pcm_cleanup
1976 },
1977};
1978
2f2f4251 1979static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1980 .channels_min = 2,
1981 .channels_max = 2,
9e05b7a3 1982 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1983 .ops = {
1984 .prepare = stac92xx_capture_pcm_prepare,
1985 .cleanup = stac92xx_capture_pcm_cleanup
1986 },
1987};
1988
1989static int stac92xx_build_pcms(struct hda_codec *codec)
1990{
1991 struct sigmatel_spec *spec = codec->spec;
1992 struct hda_pcm *info = spec->pcm_rec;
1993
1994 codec->num_pcms = 1;
1995 codec->pcm_info = info;
1996
c7d4b2fa 1997 info->name = "STAC92xx Analog";
2f2f4251 1998 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1999 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2000 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2001 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2002
2003 if (spec->alt_switch) {
2004 codec->num_pcms++;
2005 info++;
2006 info->name = "STAC92xx Analog Alt";
2007 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2008 }
2f2f4251 2009
dabbed6f
M		 2010 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2011 codec->num_pcms++;
2012 info++;
2013 info->name = "STAC92xx Digital";
7ba72ba1 2014 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2015 if (spec->multiout.dig_out_nid) {
2016 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2017 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2018 }
2019 if (spec->dig_in_nid) {
2020 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2021 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2022 }
2023 }
2024
2f2f4251
M		 2025 return 0;
2026}
2027
c960a03b
TI		 2028static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2029{
2030 unsigned int pincap = snd_hda_param_read(codec, nid,
2031 AC_PAR_PIN_CAP);
2032 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2033 if (pincap & AC_PINCAP_VREF_100)
2034 return AC_PINCTL_VREF_100;
2035 if (pincap & AC_PINCAP_VREF_80)
2036 return AC_PINCTL_VREF_80;
2037 if (pincap & AC_PINCAP_VREF_50)
2038 return AC_PINCTL_VREF_50;
2039 if (pincap & AC_PINCAP_VREF_GRD)
2040 return AC_PINCTL_VREF_GRD;
2041 return 0;
2042}
2043
403d1944
MP		 2044static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2045
2046{
82beb8fd
TI		 2047 snd_hda_codec_write_cache(codec, nid, 0,
2048 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2049}
2050
a5ce8890 2051#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2052
2053static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2054{
2055 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2056 struct sigmatel_spec *spec = codec->spec;
2057 int io_idx = kcontrol-> private_value & 0xff;
2058
2059 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2060 return 0;
2061}
2062
2063static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2064{
2065 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2066 struct sigmatel_spec *spec = codec->spec;
2067 hda_nid_t nid = kcontrol->private_value >> 8;
2068 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2069 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2070
2071 spec->io_switch[io_idx] = val;
2072
2073 if (val)
2074 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2075 else {
2076 unsigned int pinctl = AC_PINCTL_IN_EN;
2077 if (io_idx) /* set VREF for mic */
2078 pinctl |= stac92xx_get_vref(codec, nid);
2079 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2080 }
40c1d308
JZ		 2081
2082 /* check the auto-mute again: we need to mute/unmute the speaker
2083 * appropriately according to the pin direction
2084 */
2085 if (spec->hp_detect)
2086 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2087
403d1944
MP		 2088 return 1;
2089}
2090
0fb87bb4
ML		 2091#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2092
2093static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2094 struct snd_ctl_elem_value *ucontrol)
2095{
2096 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2097 struct sigmatel_spec *spec = codec->spec;
2098
2099 ucontrol->value.integer.value[0] = spec->clfe_swap;
2100 return 0;
2101}
2102
2103static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2104 struct snd_ctl_elem_value *ucontrol)
2105{
2106 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2107 struct sigmatel_spec *spec = codec->spec;
2108 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2109 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2110
68ea7b2f 2111 if (spec->clfe_swap == val)
0fb87bb4
ML		 2112 return 0;
2113
68ea7b2f 2114 spec->clfe_swap = val;
0fb87bb4
ML		 2115
2116 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2117 spec->clfe_swap ? 0x4 : 0x0);
2118
2119 return 1;
2120}
2121
403d1944
MP		 2122#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2123 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2124 .name = xname, \
2125 .index = 0, \
2126 .info = stac92xx_io_switch_info, \
2127 .get = stac92xx_io_switch_get, \
2128 .put = stac92xx_io_switch_put, \
2129 .private_value = xpval, \
2130 }
2131
0fb87bb4
ML		 2132#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2133 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2134 .name = xname, \
2135 .index = 0, \
2136 .info = stac92xx_clfe_switch_info, \
2137 .get = stac92xx_clfe_switch_get, \
2138 .put = stac92xx_clfe_switch_put, \
2139 .private_value = xpval, \
2140 }
403d1944 2141
c7d4b2fa
M		 2142enum {
2143 STAC_CTL_WIDGET_VOL,
2144 STAC_CTL_WIDGET_MUTE,
09a99959 2145 STAC_CTL_WIDGET_MONO_MUX,
403d1944 2146 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2147 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2148};
2149
c8b6bf9b 2150static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2151 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2152 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2153 STAC_MONO_MUX,
403d1944 2154 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2155 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2156};
2157
2158/* add dynamic controls */
2159static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2160{
c8b6bf9b 2161 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2162
2163 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2164 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2165
2166 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2167 if (! knew)
2168 return -ENOMEM;
2169 if (spec->kctl_alloc) {
2170 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2171 kfree(spec->kctl_alloc);
2172 }
2173 spec->kctl_alloc = knew;
2174 spec->num_kctl_alloc = num;
2175 }
2176
2177 knew = &spec->kctl_alloc[spec->num_kctl_used];
2178 *knew = stac92xx_control_templates[type];
82fe0c58 2179 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2180 if (! knew->name)
2181 return -ENOMEM;
2182 knew->private_value = val;
2183 spec->num_kctl_used++;
2184 return 0;
2185}
2186
403d1944
MP		 2187/* flag inputs as additional dynamic lineouts */
2188static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2189{
2190 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2191 unsigned int wcaps, wtype;
2192 int i, num_dacs = 0;
2193
2194 /* use the wcaps cache to count all DACs available for line-outs */
2195 for (i = 0; i < codec->num_nodes; i++) {
2196 wcaps = codec->wcaps[i];
2197 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2198
7b043899
SL		 2199 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2200 num_dacs++;
2201 }
403d1944 2202
7b043899
SL		 2203 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2204
403d1944
MP		 2205 switch (cfg->line_outs) {
2206 case 3:
2207 /* add line-in as side */
7b043899 2208 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2209 cfg->line_out_pins[cfg->line_outs] =
2210 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2211 spec->line_switch = 1;
2212 cfg->line_outs++;
2213 }
2214 break;
2215 case 2:
2216 /* add line-in as clfe and mic as side */
7b043899 2217 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2218 cfg->line_out_pins[cfg->line_outs] =
2219 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2220 spec->line_switch = 1;
2221 cfg->line_outs++;
2222 }
7b043899 2223 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2224 cfg->line_out_pins[cfg->line_outs] =
2225 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2226 spec->mic_switch = 1;
2227 cfg->line_outs++;
2228 }
2229 break;
2230 case 1:
2231 /* add line-in as surr and mic as clfe */
7b043899 2232 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2233 cfg->line_out_pins[cfg->line_outs] =
2234 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2235 spec->line_switch = 1;
2236 cfg->line_outs++;
2237 }
7b043899 2238 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2239 cfg->line_out_pins[cfg->line_outs] =
2240 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2241 spec->mic_switch = 1;
2242 cfg->line_outs++;
2243 }
2244 break;
2245 }
2246
2247 return 0;
2248}
2249
7b043899
SL		 2250
2251static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2252{
2253 int i;
2254
2255 for (i = 0; i < spec->multiout.num_dacs; i++) {
2256 if (spec->multiout.dac_nids[i] == nid)
2257 return 1;
2258 }
2259
2260 return 0;
2261}
2262
3cc08dc6 2263/*
7b043899
SL		 2264 * Fill in the dac_nids table from the parsed pin configuration
2265 * This function only works when every pin in line_out_pins[]
2266 * contains atleast one DAC in its connection list. Some 92xx
2267 * codecs are not connected directly to a DAC, such as the 9200
2268 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2269 */
19039bd0 2270static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2271 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2272{
2273 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2274 int i, j, conn_len = 0;
2275 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2276 unsigned int wcaps, wtype;
2277
c7d4b2fa
M		 2278 for (i = 0; i < cfg->line_outs; i++) {
2279 nid = cfg->line_out_pins[i];
7b043899
SL		 2280 conn_len = snd_hda_get_connections(codec, nid, conn,
2281 HDA_MAX_CONNECTIONS);
2282 for (j = 0; j < conn_len; j++) {
2283 wcaps = snd_hda_param_read(codec, conn[j],
2284 AC_PAR_AUDIO_WIDGET_CAP);
2285 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2286 if (wtype != AC_WID_AUD_OUT ||
2287 (wcaps & AC_WCAP_DIGITAL))
2288 continue;
2289 /* conn[j] is a DAC routed to this line-out */
2290 if (!is_in_dac_nids(spec, conn[j]))
2291 break;
2292 }
2293
2294 if (j == conn_len) {
df802952
TI		 2295 if (spec->multiout.num_dacs > 0) {
2296 /* we have already working output pins,
2297 * so let's drop the broken ones again
2298 */
2299 cfg->line_outs = spec->multiout.num_dacs;
2300 break;
2301 }
7b043899
SL		 2302 /* error out, no available DAC found */
2303 snd_printk(KERN_ERR
2304 "%s: No available DAC for pin 0x%x\n",
2305 __func__, nid);
2306 return -ENODEV;
2307 }
2308
2309 spec->multiout.dac_nids[i] = conn[j];
2310 spec->multiout.num_dacs++;
2311 if (conn_len > 1) {
2312 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2313 snd_hda_codec_write_cache(codec, nid, 0,
2314 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2315
7b043899
SL		 2316 }
2317 }
c7d4b2fa 2318
7b043899
SL		 2319 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2320 spec->multiout.num_dacs,
2321 spec->multiout.dac_nids[0],
2322 spec->multiout.dac_nids[1],
2323 spec->multiout.dac_nids[2],
2324 spec->multiout.dac_nids[3],
2325 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2326 return 0;
2327}
2328
eb06ed8f
TI		 2329/* create volume control/switch for the given prefx type */
2330static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2331{
2332 char name[32];
2333 int err;
2334
2335 sprintf(name, "%s Playback Volume", pfx);
2336 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2337 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2338 if (err < 0)
2339 return err;
2340 sprintf(name, "%s Playback Switch", pfx);
2341 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2342 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2343 if (err < 0)
2344 return err;
2345 return 0;
2346}
2347
ae0afd81
MR		 2348static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2349{
2350 if (!spec->multiout.hp_nid)
2351 spec->multiout.hp_nid = nid;
2352 else if (spec->multiout.num_dacs > 4) {
2353 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2354 return 1;
2355 } else {
2356 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2357 spec->multiout.num_dacs++;
2358 }
2359 return 0;
2360}
2361
2362static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2363{
2364 if (is_in_dac_nids(spec, nid))
2365 return 1;
2366 if (spec->multiout.hp_nid == nid)
2367 return 1;
2368 return 0;
2369}
2370
c7d4b2fa 2371/* add playback controls from the parsed DAC table */
0fb87bb4 2372static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2373 const struct auto_pin_cfg *cfg)
c7d4b2fa 2374{
19039bd0
TI		 2375 static const char *chname[4] = {
2376 "Front", "Surround", NULL /*CLFE*/, "Side"
2377 };
c7d4b2fa
M		 2378 hda_nid_t nid;
2379 int i, err;
2380
0fb87bb4 2381 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2382 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2383
2384
40ac8c4f 2385 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2386 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2387 continue;
2388
2389 nid = spec->multiout.dac_nids[i];
2390
2391 if (i == 2) {
2392 /* Center/LFE */
eb06ed8f
TI		 2393 err = create_controls(spec, "Center", nid, 1);
2394 if (err < 0)
c7d4b2fa 2395 return err;
eb06ed8f
TI		 2396 err = create_controls(spec, "LFE", nid, 2);
2397 if (err < 0)
c7d4b2fa 2398 return err;
0fb87bb4
ML		 2399
2400 wid_caps = get_wcaps(codec, nid);
2401
2402 if (wid_caps & AC_WCAP_LR_SWAP) {
2403 err = stac92xx_add_control(spec,
2404 STAC_CTL_WIDGET_CLFE_SWITCH,
2405 "Swap Center/LFE Playback Switch", nid);
2406
2407 if (err < 0)
2408 return err;
2409 }
2410
c7d4b2fa 2411 } else {
eb06ed8f
TI		 2412 err = create_controls(spec, chname[i], nid, 3);
2413 if (err < 0)
c7d4b2fa
M		 2414 return err;
2415 }
2416 }
2417
b5895dc8
MR		 2418 if (spec->line_switch) {
2419 nid = cfg->input_pins[AUTO_PIN_LINE];
2420 pincap = snd_hda_param_read(codec, nid,
2421 AC_PAR_PIN_CAP);
2422 if (pincap & AC_PINCAP_OUT) {
2423 err = stac92xx_add_control(spec,
2424 STAC_CTL_WIDGET_IO_SWITCH,
2425 "Line In as Output Switch", nid << 8);
2426 if (err < 0)
2427 return err;
2428 }
2429 }
403d1944 2430
b5895dc8 2431 if (spec->mic_switch) {
cace16f1 2432 unsigned int def_conf;
ae0afd81
MR		 2433 unsigned int mic_pin = AUTO_PIN_MIC;
2434again:
2435 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2436 def_conf = snd_hda_codec_read(codec, nid, 0,
2437 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2438 /* some laptops have an internal analog microphone
2439 * which can't be used as a output */
2440 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2441 pincap = snd_hda_param_read(codec, nid,
2442 AC_PAR_PIN_CAP);
2443 if (pincap & AC_PINCAP_OUT) {
2444 err = stac92xx_add_control(spec,
2445 STAC_CTL_WIDGET_IO_SWITCH,
2446 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2447 nid = snd_hda_codec_read(codec, nid, 0,
2448 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2449 if (!check_in_dac_nids(spec, nid))
2450 add_spec_dacs(spec, nid);
cace16f1
MR		 2451 if (err < 0)
2452 return err;
2453 }
ae0afd81
MR		 2454 } else if (mic_pin == AUTO_PIN_MIC) {
2455 mic_pin = AUTO_PIN_FRONT_MIC;
2456 goto again;
b5895dc8
MR		 2457 }
2458 }
403d1944 2459
c7d4b2fa
M		 2460 return 0;
2461}
2462
eb06ed8f
TI		 2463/* add playback controls for Speaker and HP outputs */
2464static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2465 struct auto_pin_cfg *cfg)
2466{
2467 struct sigmatel_spec *spec = codec->spec;
2468 hda_nid_t nid;
2469 int i, old_num_dacs, err;
2470
2471 old_num_dacs = spec->multiout.num_dacs;
2472 for (i = 0; i < cfg->hp_outs; i++) {
2473 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2474 if (wid_caps & AC_WCAP_UNSOL_CAP)
2475 spec->hp_detect = 1;
2476 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2477 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2478 if (check_in_dac_nids(spec, nid))
2479 nid = 0;
2480 if (! nid)
c7d4b2fa 2481 continue;
eb06ed8f
TI		 2482 add_spec_dacs(spec, nid);
2483 }
2484 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2485 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2486 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2487 if (check_in_dac_nids(spec, nid))
2488 nid = 0;
eb06ed8f
TI		 2489 if (! nid)
2490 continue;
2491 add_spec_dacs(spec, nid);
c7d4b2fa 2492 }
1b290a51
MR		 2493 for (i = 0; i < cfg->line_outs; i++) {
2494 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2495 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2496 if (check_in_dac_nids(spec, nid))
2497 nid = 0;
2498 if (! nid)
2499 continue;
2500 add_spec_dacs(spec, nid);
2501 }
eb06ed8f
TI		 2502 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2503 static const char *pfxs[] = {
2504 "Speaker", "External Speaker", "Speaker2",
2505 };
2506 err = create_controls(spec, pfxs[i - old_num_dacs],
2507 spec->multiout.dac_nids[i], 3);
2508 if (err < 0)
2509 return err;
2510 }
2511 if (spec->multiout.hp_nid) {
2512 const char *pfx;
6020c008 2513 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 2514 pfx = "Master";
2515 else
2516 pfx = "Headphone";
2517 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
2518 if (err < 0)
2519 return err;
2520 }
c7d4b2fa
M		 2521
2522 return 0;
2523}
2524
b22b4821
MR		 2525/* labels for mono mux outputs */
2526static const char *stac92xx_mono_labels[3] = {
2527 "DAC0", "DAC1", "Mixer"
2528};
2529
2530/* create mono mux for mono out on capable codecs */
2531static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2532{
2533 struct sigmatel_spec *spec = codec->spec;
2534 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2535 int i, num_cons;
2536 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2537
2538 num_cons = snd_hda_get_connections(codec,
2539 spec->mono_nid,
2540 con_lst,
2541 HDA_MAX_NUM_INPUTS);
2542 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2543 return -EINVAL;
2544
2545 for (i = 0; i < num_cons; i++) {
2546 mono_mux->items[mono_mux->num_items].label =
2547 stac92xx_mono_labels[i];
2548 mono_mux->items[mono_mux->num_items].index = i;
2549 mono_mux->num_items++;
2550 }
09a99959
MR		 2551
2552 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2553 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2554}
2555
8b65727b 2556/* labels for dmic mux inputs */
ddc2cec4 2557static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2558 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2559 "Digital Mic 3", "Digital Mic 4"
2560};
2561
2562/* create playback/capture controls for input pins on dmic capable codecs */
2563static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2564 const struct auto_pin_cfg *cfg)
2565{
2566 struct sigmatel_spec *spec = codec->spec;
2567 struct hda_input_mux *dimux = &spec->private_dimux;
2568 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2569 int err, i, j;
2570 char name[32];
8b65727b
MP		 2571
2572 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2573 dimux->items[dimux->num_items].index = 0;
2574 dimux->num_items++;
2575
2576 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2577 hda_nid_t nid;
8b65727b
MP		 2578 int index;
2579 int num_cons;
0678accd 2580 unsigned int wcaps;
8b65727b
MP		 2581 unsigned int def_conf;
2582
2583 def_conf = snd_hda_codec_read(codec,
2584 spec->dmic_nids[i],
2585 0,
2586 AC_VERB_GET_CONFIG_DEFAULT,
2587 0);
2588 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2589 continue;
2590
0678accd 2591 nid = spec->dmic_nids[i];
8b65727b 2592 num_cons = snd_hda_get_connections(codec,
e1f0d669 2593 spec->dmux_nids[0],
8b65727b
MP		 2594 con_lst,
2595 HDA_MAX_NUM_INPUTS);
2596 for (j = 0; j < num_cons; j++)
0678accd 2597 if (con_lst[j] == nid) {
8b65727b
MP		 2598 index = j;
2599 goto found;
2600 }
2601 continue;
2602found:
0678accd
MR		 2603 wcaps = get_wcaps(codec, nid);
2604
2605 if (wcaps & AC_WCAP_OUT_AMP) {
2606 sprintf(name, "%s Capture Volume",
2607 stac92xx_dmic_labels[dimux->num_items]);
2608
2609 err = stac92xx_add_control(spec,
2610 STAC_CTL_WIDGET_VOL,
2611 name,
2612 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2613 if (err < 0)
2614 return err;
2615 }
2616
8b65727b
MP		 2617 dimux->items[dimux->num_items].label =
2618 stac92xx_dmic_labels[dimux->num_items];
2619 dimux->items[dimux->num_items].index = index;
2620 dimux->num_items++;
2621 }
2622
2623 return 0;
2624}
2625
c7d4b2fa
M		 2626/* create playback/capture controls for input pins */
2627static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2628{
2629 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2630 struct hda_input_mux *imux = &spec->private_imux;
2631 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2632 int i, j, k;
2633
2634 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2635 int index;
2636
2637 if (!cfg->input_pins[i])
2638 continue;
2639 index = -1;
2640 for (j = 0; j < spec->num_muxes; j++) {
2641 int num_cons;
2642 num_cons = snd_hda_get_connections(codec,
2643 spec->mux_nids[j],
2644 con_lst,
2645 HDA_MAX_NUM_INPUTS);
2646 for (k = 0; k < num_cons; k++)
2647 if (con_lst[k] == cfg->input_pins[i]) {
2648 index = k;
2649 goto found;
2650 }
c7d4b2fa 2651 }
314634bc
TI		 2652 continue;
2653 found:
2654 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2655 imux->items[imux->num_items].index = index;
2656 imux->num_items++;
c7d4b2fa
M		 2657 }
2658
7b043899 2659 if (imux->num_items) {
62fe78e9
SR		 2660 /*
2661 * Set the current input for the muxes.
2662 * The STAC9221 has two input muxes with identical source
2663 * NID lists. Hopefully this won't get confused.
2664 */
2665 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2666 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2667 AC_VERB_SET_CONNECT_SEL,
2668 imux->items[0].index);
62fe78e9
SR		 2669 }
2670 }
2671
c7d4b2fa
M		 2672 return 0;
2673}
2674
c7d4b2fa
M		 2675static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2676{
2677 struct sigmatel_spec *spec = codec->spec;
2678 int i;
2679
2680 for (i = 0; i < spec->autocfg.line_outs; i++) {
2681 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2682 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2683 }
2684}
2685
2686static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2687{
2688 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2689 int i;
c7d4b2fa 2690
eb06ed8f
TI		 2691 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2692 hda_nid_t pin;
2693 pin = spec->autocfg.hp_pins[i];
2694 if (pin) /* connect to front */
2695 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2696 }
2697 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2698 hda_nid_t pin;
2699 pin = spec->autocfg.speaker_pins[i];
2700 if (pin) /* connect to front */
2701 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2702 }
c7d4b2fa
M		 2703}
2704
3cc08dc6 2705static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2706{
2707 struct sigmatel_spec *spec = codec->spec;
2708 int err;
bcecd9bd 2709 int hp_speaker_swap = 0;
c7d4b2fa 2710
8b65727b
MP		 2711 if ((err = snd_hda_parse_pin_def_config(codec,
2712 &spec->autocfg,
2713 spec->dmic_nids)) < 0)
c7d4b2fa 2714 return err;
82bc955f 2715 if (! spec->autocfg.line_outs)
869264c4 2716 return 0; /* can't find valid pin config */
19039bd0 2717
bcecd9bd
JZ		 2718 /* If we have no real line-out pin and multiple hp-outs, HPs should
2719 * be set up as multi-channel outputs.
2720 */
2721 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2722 spec->autocfg.hp_outs > 1) {
2723 /* Copy hp_outs to line_outs, backup line_outs in
2724 * speaker_outs so that the following routines can handle
2725 * HP pins as primary outputs.
2726 */
2727 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2728 sizeof(spec->autocfg.line_out_pins));
2729 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2730 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2731 sizeof(spec->autocfg.hp_pins));
2732 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2733 hp_speaker_swap = 1;
2734 }
09a99959
MR		 2735 if (spec->autocfg.mono_out_pin) {
2736 int dir = (get_wcaps(codec, spec->autocfg.mono_out_pin)
2737 & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
2738 u32 caps = query_amp_caps(codec,
2739 spec->autocfg.mono_out_pin, dir);
2740 hda_nid_t conn_list[1];
2741
2742 /* get the mixer node and then the mono mux if it exists */
2743 if (snd_hda_get_connections(codec,
2744 spec->autocfg.mono_out_pin, conn_list, 1) &&
2745 snd_hda_get_connections(codec, conn_list[0],
2746 conn_list, 1)) {
2747
2748 int wcaps = get_wcaps(codec, conn_list[0]);
2749 int wid_type = (wcaps & AC_WCAP_TYPE)
2750 >> AC_WCAP_TYPE_SHIFT;
2751 /* LR swap check, some stac925x have a mux that
2752 * changes the DACs output path instead of the
2753 * mono-mux path.
2754 */
2755 if (wid_type == AC_WID_AUD_SEL &&
2756 !(wcaps & AC_WCAP_LR_SWAP))
2757 spec->mono_nid = conn_list[0];
2758 }
2759 /* all mono outs have a least a mute/unmute switch */
2760 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2761 "Mono Playback Switch",
2762 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2763 1, 0, dir));
2764 if (err < 0)
2765 return err;
2766 /* check to see if there is volume support for the amp */
2767 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2768 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2769 "Mono Playback Volume",
2770 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2771 1, 0, dir));
2772 if (err < 0)
2773 return err;
2774 }
2775
2776 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
2777 AC_PINCTL_OUT_EN);
2778 }
bcecd9bd 2779
403d1944
MP		 2780 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2781 return err;
19039bd0
TI		 2782 if (spec->multiout.num_dacs == 0)
2783 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2784 return err;
c7d4b2fa 2785
0fb87bb4
ML		 2786 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2787
2788 if (err < 0)
2789 return err;
2790
bcecd9bd
JZ		 2791 if (hp_speaker_swap == 1) {
2792 /* Restore the hp_outs and line_outs */
2793 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2794 sizeof(spec->autocfg.line_out_pins));
2795 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2796 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2797 sizeof(spec->autocfg.speaker_pins));
2798 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2799 memset(spec->autocfg.speaker_pins, 0,
2800 sizeof(spec->autocfg.speaker_pins));
2801 spec->autocfg.speaker_outs = 0;
2802 }
2803
0fb87bb4
ML		 2804 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2805
2806 if (err < 0)
2807 return err;
2808
2809 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2810
2811 if (err < 0)
c7d4b2fa
M		 2812 return err;
2813
b22b4821
MR		 2814 if (spec->mono_nid > 0) {
2815 err = stac92xx_auto_create_mono_output_ctls(codec);
2816 if (err < 0)
2817 return err;
2818 }
2819
8b65727b
MP		 2820 if (spec->num_dmics > 0)
2821 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2822 &spec->autocfg)) < 0)
2823 return err;
2824
c7d4b2fa 2825 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2826 if (spec->multiout.max_channels > 2)
c7d4b2fa 2827 spec->surr_switch = 1;
c7d4b2fa 2828
82bc955f 2829 if (spec->autocfg.dig_out_pin)
3cc08dc6 2830 spec->multiout.dig_out_nid = dig_out;
82bc955f 2831 if (spec->autocfg.dig_in_pin)
3cc08dc6 2832 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2833
2834 if (spec->kctl_alloc)
2835 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2836
2837 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2838 if (!spec->dinput_mux)
2839 spec->dinput_mux = &spec->private_dimux;
b22b4821 2840 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 2841
2842 return 1;
2843}
2844
82bc955f
TI		 2845/* add playback controls for HP output */
2846static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2847 struct auto_pin_cfg *cfg)
2848{
2849 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2850 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2851 unsigned int wid_caps;
2852
2853 if (! pin)
2854 return 0;
2855
2856 wid_caps = get_wcaps(codec, pin);
505cb341 2857 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2858 spec->hp_detect = 1;
82bc955f
TI		 2859
2860 return 0;
2861}
2862
160ea0dc
RF		 2863/* add playback controls for LFE output */
2864static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2865 struct auto_pin_cfg *cfg)
2866{
2867 struct sigmatel_spec *spec = codec->spec;
2868 int err;
2869 hda_nid_t lfe_pin = 0x0;
2870 int i;
2871
2872 /*
2873 * search speaker outs and line outs for a mono speaker pin
2874 * with an amp. If one is found, add LFE controls
2875 * for it.
2876 */
2877 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2878 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 2879 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 2880 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2881 if (wcaps == AC_WCAP_OUT_AMP)
2882 /* found a mono speaker with an amp, must be lfe */
2883 lfe_pin = pin;
2884 }
2885
2886 /* if speaker_outs is 0, then speakers may be in line_outs */
2887 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2888 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2889 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 2890 unsigned int defcfg;
8b551785 2891 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 2892 AC_VERB_GET_CONFIG_DEFAULT,
2893 0x00);
8b551785 2894 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 2895 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 2896 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2897 if (wcaps == AC_WCAP_OUT_AMP)
2898 /* found a mono speaker with an amp,
2899 must be lfe */
2900 lfe_pin = pin;
2901 }
2902 }
2903 }
2904
2905 if (lfe_pin) {
eb06ed8f 2906 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2907 if (err < 0)
2908 return err;
2909 }
2910
2911 return 0;
2912}
2913
c7d4b2fa
M		 2914static int stac9200_parse_auto_config(struct hda_codec *codec)
2915{
2916 struct sigmatel_spec *spec = codec->spec;
2917 int err;
2918
df694daa 2919 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2920 return err;
2921
2922 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2923 return err;
2924
82bc955f
TI		 2925 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2926 return err;
2927
160ea0dc
RF		 2928 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2929 return err;
2930
82bc955f 2931 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2932 spec->multiout.dig_out_nid = 0x05;
82bc955f 2933 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2934 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2935
2936 if (spec->kctl_alloc)
2937 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2938
2939 spec->input_mux = &spec->private_imux;
8b65727b 2940 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2941
2942 return 1;
2943}
2944
62fe78e9
SR		 2945/*
2946 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2947 * funky external mute control using GPIO pins.
2948 */
2949
76e1ddfb 2950static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 2951 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 2952{
2953 unsigned int gpiostate, gpiomask, gpiodir;
2954
2955 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2956 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 2957 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 2958
2959 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2960 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 2961 gpiomask |= mask;
62fe78e9
SR		 2962
2963 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2964 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 2965 gpiodir |= dir_mask;
62fe78e9 2966
76e1ddfb 2967 /* Configure GPIOx as CMOS */
62fe78e9
SR		 2968 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2969
2970 snd_hda_codec_write(codec, codec->afg, 0,
2971 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 2972 snd_hda_codec_read(codec, codec->afg, 0,
2973 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 2974
2975 msleep(1);
2976
76e1ddfb
TI		 2977 snd_hda_codec_read(codec, codec->afg, 0,
2978 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 2979}
2980
314634bc
TI		 2981static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2982 unsigned int event)
2983{
2984 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2985 snd_hda_codec_write_cache(codec, nid, 0,
2986 AC_VERB_SET_UNSOLICITED_ENABLE,
2987 (AC_USRSP_EN | event));
314634bc
TI		 2988}
2989
a64135a2
MR		 2990static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
2991{
2992 int i;
2993 for (i = 0; i < cfg->hp_outs; i++)
2994 if (cfg->hp_pins[i] == nid)
2995 return 1; /* nid is a HP-Out */
2996
2997 return 0; /* nid is not a HP-Out */
2998};
2999
b76c850f
MR		 3000static void stac92xx_power_down(struct hda_codec *codec)
3001{
3002 struct sigmatel_spec *spec = codec->spec;
3003
3004 /* power down inactive DACs */
3005 hda_nid_t *dac;
3006 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3007 if (!is_in_dac_nids(spec, *dac) &&
3008 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3009 snd_hda_codec_write_cache(codec, *dac, 0,
3010 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3011}
3012
c7d4b2fa
M		 3013static int stac92xx_init(struct hda_codec *codec)
3014{
3015 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3016 struct auto_pin_cfg *cfg = &spec->autocfg;
3017 int i;
c7d4b2fa 3018
c7d4b2fa
M		 3019 snd_hda_sequence_write(codec, spec->init);
3020
82bc955f
TI		 3021 /* set up pins */
3022 if (spec->hp_detect) {
505cb341 3023 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3024 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3025 enable_pin_detect(codec, cfg->hp_pins[i],
3026 STAC_HP_EVENT);
0a07acaf
TI		 3027 /* force to enable the first line-out; the others are set up
3028 * in unsol_event
3029 */
3030 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3031 AC_PINCTL_OUT_EN);
eb995a8c 3032 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3033 /* fake event to set up pins */
3034 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3035 } else {
3036 stac92xx_auto_init_multi_out(codec);
3037 stac92xx_auto_init_hp_out(codec);
3038 }
3039 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3040 hda_nid_t nid = cfg->input_pins[i];
3041 if (nid) {
3042 unsigned int pinctl = AC_PINCTL_IN_EN;
3043 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3044 pinctl |= stac92xx_get_vref(codec, nid);
3045 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3046 }
82bc955f 3047 }
a64135a2
MR		 3048 for (i = 0; i < spec->num_dmics; i++)
3049 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3050 AC_PINCTL_IN_EN);
3051 for (i = 0; i < spec->num_pwrs; i++) {
3052 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3053 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3054 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3055 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3056 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3057 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
a64135a2
MR		 3058 /* outputs are only ports capable of power management
3059 * any attempts on powering down a input port cause the
3060 * referenced VREF to act quirky.
3061 */
3062 if (pinctl & AC_PINCTL_IN_EN)
3063 continue;
bce6c2b5
MR		 3064 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED)
3065 continue;
a64135a2
MR		 3066 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3067 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3068 }
b76c850f
MR		 3069 if (spec->dac_list)
3070 stac92xx_power_down(codec);
82bc955f
TI		 3071 if (cfg->dig_out_pin)
3072 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3073 AC_PINCTL_OUT_EN);
3074 if (cfg->dig_in_pin)
3075 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3076 AC_PINCTL_IN_EN);
3077
4fe5195c
MR		 3078 stac_gpio_set(codec, spec->gpio_mask,
3079 spec->gpio_dir, spec->gpio_data);
62fe78e9 3080
c7d4b2fa
M		 3081 return 0;
3082}
3083
2f2f4251
M		 3084static void stac92xx_free(struct hda_codec *codec)
3085{
c7d4b2fa
M		 3086 struct sigmatel_spec *spec = codec->spec;
3087 int i;
3088
3089 if (! spec)
3090 return;
3091
3092 if (spec->kctl_alloc) {
3093 for (i = 0; i < spec->num_kctl_used; i++)
3094 kfree(spec->kctl_alloc[i].name);
3095 kfree(spec->kctl_alloc);
3096 }
3097
11b44bbd
RF		 3098 if (spec->bios_pin_configs)
3099 kfree(spec->bios_pin_configs);
3100
c7d4b2fa 3101 kfree(spec);
2f2f4251
M		 3102}
3103
4e55096e
M		 3104static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3105 unsigned int flag)
3106{
3107 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3108 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3109
f9acba43
TI		 3110 if (pin_ctl & AC_PINCTL_IN_EN) {
3111 /*
3112 * we need to check the current set-up direction of
3113 * shared input pins since they can be switched via
3114 * "xxx as Output" mixer switch
3115 */
3116 struct sigmatel_spec *spec = codec->spec;
3117 struct auto_pin_cfg *cfg = &spec->autocfg;
3118 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3119 spec->line_switch) ||
3120 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3121 spec->mic_switch))
3122 return;
3123 }
3124
7b043899
SL		 3125 /* if setting pin direction bits, clear the current
3126 direction bits first */
3127 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3128 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3129
82beb8fd 3130 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3131 AC_VERB_SET_PIN_WIDGET_CONTROL,
3132 pin_ctl | flag);
3133}
3134
3135static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3136 unsigned int flag)
3137{
3138 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3139 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3140 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3141 AC_VERB_SET_PIN_WIDGET_CONTROL,
3142 pin_ctl & ~flag);
3143}
3144
40c1d308 3145static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3146{
3147 if (!nid)
3148 return 0;
3149 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3150 & (1 << 31)) {
3151 unsigned int pinctl;
3152 pinctl = snd_hda_codec_read(codec, nid, 0,
3153 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3154 if (pinctl & AC_PINCTL_IN_EN)
3155 return 0; /* mic- or line-input */
3156 else
3157 return 1; /* HP-output */
3158 }
314634bc
TI		 3159 return 0;
3160}
3161
3162static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3163{
3164 struct sigmatel_spec *spec = codec->spec;
3165 struct auto_pin_cfg *cfg = &spec->autocfg;
3166 int i, presence;
3167
eb06ed8f 3168 presence = 0;
4fe5195c
MR		 3169 if (spec->gpio_mute)
3170 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3171 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3172
eb06ed8f 3173 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3174 if (presence)
3175 break;
4fe5195c 3176 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3177 }
4e55096e
M		 3178
3179 if (presence) {
3180 /* disable lineouts, enable hp */
3181 for (i = 0; i < cfg->line_outs; i++)
3182 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3183 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3184 for (i = 0; i < cfg->speaker_outs; i++)
3185 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3186 AC_PINCTL_OUT_EN);
4e55096e
M		 3187 } else {
3188 /* enable lineouts, disable hp */
3189 for (i = 0; i < cfg->line_outs; i++)
3190 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3191 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3192 for (i = 0; i < cfg->speaker_outs; i++)
3193 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3194 AC_PINCTL_OUT_EN);
4e55096e
M		 3195 }
3196}
3197
a64135a2
MR		 3198static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3199{
3200 struct sigmatel_spec *spec = codec->spec;
3201 hda_nid_t nid = spec->pwr_nids[idx];
3202 int presence, val;
3203 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3204 & 0x000000ff;
3205 presence = get_hp_pin_presence(codec, nid);
3206 idx = 1 << idx;
3207
3208 if (presence)
3209 val &= ~idx;
3210 else
3211 val |= idx;
3212
3213 /* power down unused output ports */
3214 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3215};
3216
314634bc
TI		 3217static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3218{
a64135a2
MR		 3219 struct sigmatel_spec *spec = codec->spec;
3220 int idx = res >> 26 & 0x0f;
3221
3222 switch ((res >> 26) & 0x30) {
314634bc
TI		 3223 case STAC_HP_EVENT:
3224 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3225 /* fallthru */
3226 case STAC_PWR_EVENT:
3227 if (spec->num_pwrs > 0)
3228 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3229 }
3230}
3231
cb53c626 3232#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3233static int stac92xx_resume(struct hda_codec *codec)
3234{
dc81bed1
TI		 3235 struct sigmatel_spec *spec = codec->spec;
3236
11b44bbd 3237 stac92xx_set_config_regs(codec);
dc81bed1 3238 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3239 stac_gpio_set(codec, spec->gpio_mask,
3240 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3241 snd_hda_codec_resume_amp(codec);
3242 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3243 /* power down inactive DACs */
3244 if (spec->dac_list)
3245 stac92xx_power_down(codec);
dc81bed1
TI		 3246 /* invoke unsolicited event to reset the HP state */
3247 if (spec->hp_detect)
3248 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3249 return 0;
3250}
3251#endif
3252
2f2f4251
M		 3253static struct hda_codec_ops stac92xx_patch_ops = {
3254 .build_controls = stac92xx_build_controls,
3255 .build_pcms = stac92xx_build_pcms,
3256 .init = stac92xx_init,
3257 .free = stac92xx_free,
4e55096e 3258 .unsol_event = stac92xx_unsol_event,
cb53c626 3259#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3260 .resume = stac92xx_resume,
3261#endif
2f2f4251
M		 3262};
3263
3264static int patch_stac9200(struct hda_codec *codec)
3265{
3266 struct sigmatel_spec *spec;
c7d4b2fa 3267 int err;
2f2f4251 3268
e560d8d8 3269 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3270 if (spec == NULL)
3271 return -ENOMEM;
3272
3273 codec->spec = spec;
a4eed138 3274 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3275 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3276 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3277 stac9200_models,
3278 stac9200_cfg_tbl);
11b44bbd
RF		 3279 if (spec->board_config < 0) {
3280 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3281 err = stac92xx_save_bios_config_regs(codec);
3282 if (err < 0) {
3283 stac92xx_free(codec);
3284 return err;
3285 }
3286 spec->pin_configs = spec->bios_pin_configs;
3287 } else {
403d1944
MP		 3288 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3289 stac92xx_set_config_regs(codec);
3290 }
2f2f4251
M		 3291
3292 spec->multiout.max_channels = 2;
3293 spec->multiout.num_dacs = 1;
3294 spec->multiout.dac_nids = stac9200_dac_nids;
3295 spec->adc_nids = stac9200_adc_nids;
3296 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3297 spec->num_muxes = 1;
8b65727b 3298 spec->num_dmics = 0;
9e05b7a3 3299 spec->num_adcs = 1;
a64135a2 3300 spec->num_pwrs = 0;
c7d4b2fa 3301
bf277785
TD		 3302 if (spec->board_config == STAC_9200_GATEWAY ||
3303 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3304 spec->init = stac9200_eapd_init;
3305 else
3306 spec->init = stac9200_core_init;
2f2f4251 3307 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 3308
3309 err = stac9200_parse_auto_config(codec);
3310 if (err < 0) {
3311 stac92xx_free(codec);
3312 return err;
3313 }
2f2f4251
M		 3314
3315 codec->patch_ops = stac92xx_patch_ops;
3316
3317 return 0;
3318}
3319
8e21c34c
TD		 3320static int patch_stac925x(struct hda_codec *codec)
3321{
3322 struct sigmatel_spec *spec;
3323 int err;
3324
3325 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3326 if (spec == NULL)
3327 return -ENOMEM;
3328
3329 codec->spec = spec;
a4eed138 3330 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3331 spec->pin_nids = stac925x_pin_nids;
3332 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3333 stac925x_models,
3334 stac925x_cfg_tbl);
9e507abd 3335 again:
8e21c34c 3336 if (spec->board_config < 0) {
2c11f955
TD		 3337 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3338 "using BIOS defaults\n");
8e21c34c
TD		 3339 err = stac92xx_save_bios_config_regs(codec);
3340 if (err < 0) {
3341 stac92xx_free(codec);
3342 return err;
3343 }
3344 spec->pin_configs = spec->bios_pin_configs;
3345 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3346 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3347 stac92xx_set_config_regs(codec);
3348 }
3349
3350 spec->multiout.max_channels = 2;
3351 spec->multiout.num_dacs = 1;
3352 spec->multiout.dac_nids = stac925x_dac_nids;
3353 spec->adc_nids = stac925x_adc_nids;
3354 spec->mux_nids = stac925x_mux_nids;
3355 spec->num_muxes = 1;
9e05b7a3 3356 spec->num_adcs = 1;
a64135a2 3357 spec->num_pwrs = 0;
2c11f955
TD		 3358 switch (codec->vendor_id) {
3359 case 0x83847632: /* STAC9202 */
3360 case 0x83847633: /* STAC9202D */
3361 case 0x83847636: /* STAC9251 */
3362 case 0x83847637: /* STAC9251D */
f6e9852a 3363 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3364 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3365 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3366 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3367 break;
3368 default:
3369 spec->num_dmics = 0;
3370 break;
3371 }
8e21c34c
TD		 3372
3373 spec->init = stac925x_core_init;
3374 spec->mixer = stac925x_mixer;
3375
3376 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3377 if (!err) {
3378 if (spec->board_config < 0) {
3379 printk(KERN_WARNING "hda_codec: No auto-config is "
3380 "available, default to model=ref\n");
3381 spec->board_config = STAC_925x_REF;
3382 goto again;
3383 }
3384 err = -EINVAL;
3385 }
8e21c34c
TD		 3386 if (err < 0) {
3387 stac92xx_free(codec);
3388 return err;
3389 }
3390
3391 codec->patch_ops = stac92xx_patch_ops;
3392
3393 return 0;
3394}
3395
e1f0d669
MR		 3396static struct hda_input_mux stac92hd73xx_dmux = {
3397 .num_items = 4,
3398 .items = {
3399 { "Analog Inputs", 0x0b },
3400 { "CD", 0x08 },
3401 { "Digital Mic 1", 0x09 },
3402 { "Digital Mic 2", 0x0a },
3403 }
3404};
3405
3406static int patch_stac92hd73xx(struct hda_codec *codec)
3407{
3408 struct sigmatel_spec *spec;
3409 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3410 int err = 0;
3411
3412 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3413 if (spec == NULL)
3414 return -ENOMEM;
3415
3416 codec->spec = spec;
3417 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3418 spec->pin_nids = stac92hd73xx_pin_nids;
3419 spec->board_config = snd_hda_check_board_config(codec,
3420 STAC_92HD73XX_MODELS,
3421 stac92hd73xx_models,
3422 stac92hd73xx_cfg_tbl);
3423again:
3424 if (spec->board_config < 0) {
3425 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3426 " STAC92HD73XX, using BIOS defaults\n");
3427 err = stac92xx_save_bios_config_regs(codec);
3428 if (err < 0) {
3429 stac92xx_free(codec);
3430 return err;
3431 }
3432 spec->pin_configs = spec->bios_pin_configs;
3433 } else {
3434 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3435 stac92xx_set_config_regs(codec);
3436 }
3437
3438 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3439 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3440
3441 if (spec->multiout.num_dacs < 0) {
3442 printk(KERN_WARNING "hda_codec: Could not determine "
3443 "number of channels defaulting to DAC count\n");
3444 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3445 }
3446
3447 switch (spec->multiout.num_dacs) {
3448 case 0x3: /* 6 Channel */
3449 spec->mixer = stac92hd73xx_6ch_mixer;
3450 spec->init = stac92hd73xx_6ch_core_init;
3451 break;
3452 case 0x4: /* 8 Channel */
3453 spec->multiout.hp_nid = 0x18;
3454 spec->mixer = stac92hd73xx_8ch_mixer;
3455 spec->init = stac92hd73xx_8ch_core_init;
3456 break;
3457 case 0x5: /* 10 Channel */
3458 spec->multiout.hp_nid = 0x19;
3459 spec->mixer = stac92hd73xx_10ch_mixer;
3460 spec->init = stac92hd73xx_10ch_core_init;
3461 };
3462
3463 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3464 spec->aloopback_mask = 0x01;
3465 spec->aloopback_shift = 8;
3466
3467 spec->mux_nids = stac92hd73xx_mux_nids;
3468 spec->adc_nids = stac92hd73xx_adc_nids;
3469 spec->dmic_nids = stac92hd73xx_dmic_nids;
3470 spec->dmux_nids = stac92hd73xx_dmux_nids;
3471
3472 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3473 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 3474 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3475 spec->dinput_mux = &stac92hd73xx_dmux;
3476 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3477 spec->gpio_mask = spec->gpio_dir = 0x1;
3478 spec->gpio_data = 0x01;
e1f0d669 3479
a7662640
MR		 3480 switch (spec->board_config) {
3481 case STAC_DELL_M6:
d654a660 3482 spec->init = dell_eq_core_init;
a7662640
MR		 3483 switch (codec->subsystem_id) {
3484 case 0x1028025e: /* Analog Mics */
3485 case 0x1028025f:
3486 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3487 spec->num_dmics = 0;
3488 break;
d654a660 3489 case 0x10280271: /* Digital Mics */
a7662640 3490 case 0x10280272:
d654a660
MR		 3491 spec->init = dell_m6_core_init;
3492 /* fall-through */
3493 case 0x10280254:
3494 case 0x10280255:
a7662640
MR		 3495 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3496 spec->num_dmics = 1;
3497 break;
3498 case 0x10280256: /* Both */
3499 case 0x10280057:
3500 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3501 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3502 spec->num_dmics = 1;
3503 break;
3504 }
3505 break;
3506 default:
3507 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
3508 }
3509
a64135a2
MR		 3510 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3511 spec->pwr_nids = stac92hd73xx_pwr_nids;
3512
e1f0d669
MR		 3513 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3514
3515 if (!err) {
3516 if (spec->board_config < 0) {
3517 printk(KERN_WARNING "hda_codec: No auto-config is "
3518 "available, default to model=ref\n");
3519 spec->board_config = STAC_92HD73XX_REF;
3520 goto again;
3521 }
3522 err = -EINVAL;
3523 }
3524
3525 if (err < 0) {
3526 stac92xx_free(codec);
3527 return err;
3528 }
3529
3530 codec->patch_ops = stac92xx_patch_ops;
3531
3532 return 0;
3533}
3534
e035b841
MR		 3535static int patch_stac92hd71bxx(struct hda_codec *codec)
3536{
3537 struct sigmatel_spec *spec;
3538 int err = 0;
3539
3540 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3541 if (spec == NULL)
3542 return -ENOMEM;
3543
3544 codec->spec = spec;
3545 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
3546 spec->pin_nids = stac92hd71bxx_pin_nids;
3547 spec->board_config = snd_hda_check_board_config(codec,
3548 STAC_92HD71BXX_MODELS,
3549 stac92hd71bxx_models,
3550 stac92hd71bxx_cfg_tbl);
3551again:
3552 if (spec->board_config < 0) {
3553 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3554 " STAC92HD71BXX, using BIOS defaults\n");
3555 err = stac92xx_save_bios_config_regs(codec);
3556 if (err < 0) {
3557 stac92xx_free(codec);
3558 return err;
3559 }
3560 spec->pin_configs = spec->bios_pin_configs;
3561 } else {
3562 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3563 stac92xx_set_config_regs(codec);
3564 }
3565
541eee87
MR		 3566 switch (codec->vendor_id) {
3567 case 0x111d76b6: /* 4 Port without Analog Mixer */
3568 case 0x111d76b7:
3569 case 0x111d76b4: /* 6 Port without Analog Mixer */
3570 case 0x111d76b5:
3571 spec->mixer = stac92hd71bxx_mixer;
3572 spec->init = stac92hd71bxx_core_init;
3573 break;
3574 default:
3575 spec->mixer = stac92hd71bxx_analog_mixer;
3576 spec->init = stac92hd71bxx_analog_core_init;
3577 }
3578
3579 spec->aloopback_mask = 0x20;
3580 spec->aloopback_shift = 0;
3581
4fe5195c
MR		 3582 /* GPIO0 High = EAPD */
3583 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0x1;
e035b841 3584
e035b841
MR		 3585 spec->mux_nids = stac92hd71bxx_mux_nids;
3586 spec->adc_nids = stac92hd71bxx_adc_nids;
3587 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3588 spec->dmux_nids = stac92hd71bxx_dmux_nids;
e035b841
MR		 3589
3590 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3591 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3592 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3593 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3594
a64135a2
MR		 3595 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3596 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3597
aea7bb0a 3598 spec->multiout.num_dacs = 1;
e035b841
MR		 3599 spec->multiout.hp_nid = 0x11;
3600 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3601
3602 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3603 if (!err) {
3604 if (spec->board_config < 0) {
3605 printk(KERN_WARNING "hda_codec: No auto-config is "
3606 "available, default to model=ref\n");
3607 spec->board_config = STAC_92HD71BXX_REF;
3608 goto again;
3609 }
3610 err = -EINVAL;
3611 }
3612
3613 if (err < 0) {
3614 stac92xx_free(codec);
3615 return err;
3616 }
3617
3618 codec->patch_ops = stac92xx_patch_ops;
3619
3620 return 0;
3621};
3622
2f2f4251
M		 3623static int patch_stac922x(struct hda_codec *codec)
3624{
3625 struct sigmatel_spec *spec;
c7d4b2fa 3626 int err;
2f2f4251 3627
e560d8d8 3628 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3629 if (spec == NULL)
3630 return -ENOMEM;
3631
3632 codec->spec = spec;
a4eed138 3633 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3634 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3635 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3636 stac922x_models,
3637 stac922x_cfg_tbl);
5d5d3bc3 3638 if (spec->board_config == STAC_INTEL_MAC_V3) {
4fe5195c
MR		 3639 spec->gpio_mask = spec->gpio_dir = 0x03;
3640 spec->gpio_data = 0x03;
3fc24d85
TI		 3641 /* Intel Macs have all same PCI SSID, so we need to check
3642 * codec SSID to distinguish the exact models
3643 */
6f0778d8 3644 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3645 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3646
3647 case 0x106b0800:
3648 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3649 break;
5d5d3bc3
IZ		 3650 case 0x106b0600:
3651 case 0x106b0700:
3652 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3653 break;
5d5d3bc3
IZ		 3654 case 0x106b0e00:
3655 case 0x106b0f00:
3656 case 0x106b1600:
3657 case 0x106b1700:
3658 case 0x106b0200:
3659 case 0x106b1e00:
3660 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3661 break;
5d5d3bc3
IZ		 3662 case 0x106b1a00:
3663 case 0x00000100:
3664 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3665 break;
5d5d3bc3
IZ		 3666 case 0x106b0a00:
3667 case 0x106b2200:
3668 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3669 break;
3fc24d85
TI		 3670 }
3671 }
3672
9e507abd 3673 again:
11b44bbd
RF		 3674 if (spec->board_config < 0) {
3675 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3676 "using BIOS defaults\n");
3677 err = stac92xx_save_bios_config_regs(codec);
3678 if (err < 0) {
3679 stac92xx_free(codec);
3680 return err;
3681 }
3682 spec->pin_configs = spec->bios_pin_configs;
3683 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3684 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3685 stac92xx_set_config_regs(codec);
3686 }
2f2f4251 3687
c7d4b2fa
M		 3688 spec->adc_nids = stac922x_adc_nids;
3689 spec->mux_nids = stac922x_mux_nids;
2549413e 3690 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3691 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3692 spec->num_dmics = 0;
a64135a2 3693 spec->num_pwrs = 0;
c7d4b2fa
M		 3694
3695 spec->init = stac922x_core_init;
2f2f4251 3696 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3697
3698 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3699
3cc08dc6 3700 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3701 if (!err) {
3702 if (spec->board_config < 0) {
3703 printk(KERN_WARNING "hda_codec: No auto-config is "
3704 "available, default to model=ref\n");
3705 spec->board_config = STAC_D945_REF;
3706 goto again;
3707 }
3708 err = -EINVAL;
3709 }
3cc08dc6
MP		 3710 if (err < 0) {
3711 stac92xx_free(codec);
3712 return err;
3713 }
3714
3715 codec->patch_ops = stac92xx_patch_ops;
3716
807a4636
TI		 3717 /* Fix Mux capture level; max to 2 */
3718 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3719 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3720 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3721 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3722 (0 << AC_AMPCAP_MUTE_SHIFT));
3723
3cc08dc6
MP		 3724 return 0;
3725}
3726
3727static int patch_stac927x(struct hda_codec *codec)
3728{
3729 struct sigmatel_spec *spec;
3730 int err;
3731
3732 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3733 if (spec == NULL)
3734 return -ENOMEM;
3735
3736 codec->spec = spec;
a4eed138 3737 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3738 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3739 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3740 stac927x_models,
3741 stac927x_cfg_tbl);
9e507abd 3742 again:
8e9068b1
MR		 3743 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3744 if (spec->board_config < 0)
3745 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3746 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3747 err = stac92xx_save_bios_config_regs(codec);
3748 if (err < 0) {
3749 stac92xx_free(codec);
3750 return err;
3751 }
3752 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3753 } else {
3cc08dc6
MP		 3754 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3755 stac92xx_set_config_regs(codec);
3756 }
3757
8e9068b1
MR		 3758 spec->adc_nids = stac927x_adc_nids;
3759 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3760 spec->mux_nids = stac927x_mux_nids;
3761 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
b76c850f 3762 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 3763 spec->multiout.dac_nids = spec->dac_nids;
3764
81d3dbde 3765 switch (spec->board_config) {
93ed1503 3766 case STAC_D965_3ST:
93ed1503 3767 case STAC_D965_5ST:
8e9068b1 3768 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3769 spec->gpio_mask = spec->gpio_dir = 0x01;
3770 spec->gpio_data = 0x01;
8e9068b1
MR		 3771 spec->num_dmics = 0;
3772
93ed1503 3773 spec->init = d965_core_init;
9e05b7a3 3774 spec->mixer = stac927x_mixer;
81d3dbde 3775 break;
8e9068b1 3776 case STAC_DELL_BIOS:
03d7ca17
MR		 3777 /* configure the analog microphone on some laptops */
3778 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 3779 /* correct the front output jack as a hp out */
7989fba9 3780 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 3781 /* correct the front input jack as a mic */
3782 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3783 /* fallthru */
8e9068b1
MR		 3784 case STAC_DELL_3ST:
3785 /* GPIO2 High = Enable EAPD */
4fe5195c
MR		 3786 spec->gpio_mask = spec->gpio_dir = 0x04;
3787 spec->gpio_data = 0x04;
7f16859a
MR		 3788 spec->dmic_nids = stac927x_dmic_nids;
3789 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3790
8e9068b1
MR		 3791 spec->init = d965_core_init;
3792 spec->mixer = stac927x_mixer;
3793 spec->dmux_nids = stac927x_dmux_nids;
1697055e 3794 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 3795 break;
3796 default:
f1f208d0 3797 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3798 spec->gpio_mask = spec->gpio_dir = 0x1;
3799 spec->gpio_data = 0x01;
8e9068b1
MR		 3800 spec->num_dmics = 0;
3801
3802 spec->init = stac927x_core_init;
3803 spec->mixer = stac927x_mixer;
7f16859a
MR		 3804 }
3805
a64135a2 3806 spec->num_pwrs = 0;
e1f0d669
MR		 3807 spec->aloopback_mask = 0x40;
3808 spec->aloopback_shift = 0;
8e9068b1 3809
3cc08dc6 3810 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3811 if (!err) {
3812 if (spec->board_config < 0) {
3813 printk(KERN_WARNING "hda_codec: No auto-config is "
3814 "available, default to model=ref\n");
3815 spec->board_config = STAC_D965_REF;
3816 goto again;
3817 }
3818 err = -EINVAL;
3819 }
c7d4b2fa
M		 3820 if (err < 0) {
3821 stac92xx_free(codec);
3822 return err;
3823 }
2f2f4251
M		 3824
3825 codec->patch_ops = stac92xx_patch_ops;
3826
52987656
TI		 3827 /*
3828 * !!FIXME!!
3829 * The STAC927x seem to require fairly long delays for certain
3830 * command sequences. With too short delays (even if the answer
3831 * is set to RIRB properly), it results in the silence output
3832 * on some hardwares like Dell.
3833 *
3834 * The below flag enables the longer delay (see get_response
3835 * in hda_intel.c).
3836 */
3837 codec->bus->needs_damn_long_delay = 1;
3838
2f2f4251
M		 3839 return 0;
3840}
3841
f3302a59
MP		 3842static int patch_stac9205(struct hda_codec *codec)
3843{
3844 struct sigmatel_spec *spec;
8259980e 3845 int err;
f3302a59
MP		 3846
3847 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3848 if (spec == NULL)
3849 return -ENOMEM;
3850
3851 codec->spec = spec;
a4eed138 3852 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3853 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3854 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3855 stac9205_models,
3856 stac9205_cfg_tbl);
9e507abd 3857 again:
11b44bbd
RF		 3858 if (spec->board_config < 0) {
3859 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3860 err = stac92xx_save_bios_config_regs(codec);
3861 if (err < 0) {
3862 stac92xx_free(codec);
3863 return err;
3864 }
3865 spec->pin_configs = spec->bios_pin_configs;
3866 } else {
f3302a59
MP		 3867 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3868 stac92xx_set_config_regs(codec);
3869 }
3870
3871 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3872 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3873 spec->mux_nids = stac9205_mux_nids;
2549413e 3874 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3875 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3876 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3877 spec->dmux_nids = stac9205_dmux_nids;
1697055e 3878 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 3879 spec->num_pwrs = 0;
f3302a59
MP		 3880
3881 spec->init = stac9205_core_init;
3882 spec->mixer = stac9205_mixer;
3883
e1f0d669
MR		 3884 spec->aloopback_mask = 0x40;
3885 spec->aloopback_shift = 0;
f3302a59 3886 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3887
ae0a8ed8 3888 switch (spec->board_config){
ae0a8ed8 3889 case STAC_9205_DELL_M43:
87d48363
MR		 3890 /* Enable SPDIF in/out */
3891 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3892 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3893
4fe5195c
MR		 3894 /* Enable unsol response for GPIO4/Dock HP connection */
3895 snd_hda_codec_write(codec, codec->afg, 0,
3896 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3897 snd_hda_codec_write_cache(codec, codec->afg, 0,
3898 AC_VERB_SET_UNSOLICITED_ENABLE,
3899 (AC_USRSP_EN | STAC_HP_EVENT));
3900
3901 spec->gpio_dir = 0x0b;
3902 spec->gpio_mask = 0x1b;
3903 spec->gpio_mute = 0x10;
e2e7d624 3904 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 3905 * GPIO3 Low = DRM
87d48363 3906 */
4fe5195c 3907 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3908 break;
3909 default:
3910 /* GPIO0 High = EAPD */
4fe5195c
MR		 3911 spec->gpio_mask = spec->gpio_dir = 0x1;
3912 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3913 break;
3914 }
33382403 3915
f3302a59 3916 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 3917 if (!err) {
3918 if (spec->board_config < 0) {
3919 printk(KERN_WARNING "hda_codec: No auto-config is "
3920 "available, default to model=ref\n");
3921 spec->board_config = STAC_9205_REF;
3922 goto again;
3923 }
3924 err = -EINVAL;
3925 }
f3302a59
MP		 3926 if (err < 0) {
3927 stac92xx_free(codec);
3928 return err;
3929 }
3930
3931 codec->patch_ops = stac92xx_patch_ops;
3932
3933 return 0;
3934}
3935
db064e50 3936/*
6d859065 3937 * STAC9872 hack
db064e50
TI		 3938 */
3939
99ccc560 3940/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 3941static hda_nid_t vaio_dacs[] = { 0x2 };
3942#define VAIO_HP_DAC 0x5
3943static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
3944static hda_nid_t vaio_mux_nids[] = { 0x15 };
3945
3946static struct hda_input_mux vaio_mux = {
a3a2f429 3947 .num_items = 3,
db064e50 3948 .items = {
d773781c 3949 /* { "HP", 0x0 }, */
1624cb9a
TI		 3950 { "Mic Jack", 0x1 },
3951 { "Internal Mic", 0x2 },
db064e50
TI		 3952 { "PCM", 0x3 },
3953 }
3954};
3955
3956static struct hda_verb vaio_init[] = {
3957 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 3958 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 3959 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3960 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3961 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3962 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3963 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 3964 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3965 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3966 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3967 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3968 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3969 {}
3970};
3971
6d859065
GM		 3972static struct hda_verb vaio_ar_init[] = {
3973 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
3974 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3975 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3976 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3977/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
3978 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3979 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 3980 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3981 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3982/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
3983 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3984 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3985 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3986 {}
3987};
3988
db064e50 3989/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3990static struct hda_bind_ctls vaio_bind_master_vol = {
3991 .ops = &snd_hda_bind_vol,
3992 .values = {
3993 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3994 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3995 0
3996 },
3997};
db064e50
TI		 3998
3999/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4000static struct hda_bind_ctls vaio_bind_master_sw = {
4001 .ops = &snd_hda_bind_sw,
4002 .values = {
4003 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4004 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4005 0,
4006 },
4007};
db064e50
TI		 4008
4009static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 4010 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4011 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 4012 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4013 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4014 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4015 {
4016 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4017 .name = "Capture Source",
4018 .count = 1,
4019 .info = stac92xx_mux_enum_info,
4020 .get = stac92xx_mux_enum_get,
4021 .put = stac92xx_mux_enum_put,
4022 },
4023 {}
4024};
4025
6d859065 4026static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 4027 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4028 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 4029 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4030 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4031 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4032 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
4033 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
4034 {
4035 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4036 .name = "Capture Source",
4037 .count = 1,
4038 .info = stac92xx_mux_enum_info,
4039 .get = stac92xx_mux_enum_get,
4040 .put = stac92xx_mux_enum_put,
4041 },
4042 {}
4043};
4044
4045static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4046 .build_controls = stac92xx_build_controls,
4047 .build_pcms = stac92xx_build_pcms,
4048 .init = stac92xx_init,
4049 .free = stac92xx_free,
cb53c626 4050#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4051 .resume = stac92xx_resume,
4052#endif
4053};
4054
72e7b0dd
TI		 4055static int stac9872_vaio_init(struct hda_codec *codec)
4056{
4057 int err;
4058
4059 err = stac92xx_init(codec);
4060 if (err < 0)
4061 return err;
4062 if (codec->patch_ops.unsol_event)
4063 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4064 return 0;
4065}
4066
4067static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4068{
40c1d308 4069 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4070 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4071 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4072 } else {
4073 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4074 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4075 }
4076}
4077
4078static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4079{
4080 switch (res >> 26) {
4081 case STAC_HP_EVENT:
4082 stac9872_vaio_hp_detect(codec, res);
4083 break;
4084 }
4085}
4086
4087static struct hda_codec_ops stac9872_vaio_patch_ops = {
4088 .build_controls = stac92xx_build_controls,
4089 .build_pcms = stac92xx_build_pcms,
4090 .init = stac9872_vaio_init,
4091 .free = stac92xx_free,
4092 .unsol_event = stac9872_vaio_unsol_event,
4093#ifdef CONFIG_PM
4094 .resume = stac92xx_resume,
4095#endif
4096};
4097
6d859065
GM		 4098enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4099 CXD9872RD_VAIO,
4100 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
4101 STAC9872AK_VAIO,
4102 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
4103 STAC9872K_VAIO,
4104 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 4105 CXD9872AKD_VAIO,
4106 STAC_9872_MODELS,
4107};
4108
4109static const char *stac9872_models[STAC_9872_MODELS] = {
4110 [CXD9872RD_VAIO] = "vaio",
4111 [CXD9872AKD_VAIO] = "vaio-ar",
4112};
4113
4114static struct snd_pci_quirk stac9872_cfg_tbl[] = {
4115 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
4116 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
4117 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 4118 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 4119 {}
4120};
4121
6d859065 4122static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4123{
4124 struct sigmatel_spec *spec;
4125 int board_config;
4126
f5fcc13c
TI		 4127 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
4128 stac9872_models,
4129 stac9872_cfg_tbl);
db064e50
TI		 4130 if (board_config < 0)
4131 /* unknown config, let generic-parser do its job... */
4132 return snd_hda_parse_generic_codec(codec);
4133
4134 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4135 if (spec == NULL)
4136 return -ENOMEM;
4137
4138 codec->spec = spec;
4139 switch (board_config) {
6d859065
GM		 4140 case CXD9872RD_VAIO:
4141 case STAC9872AK_VAIO:
4142 case STAC9872K_VAIO:
db064e50
TI		 4143 spec->mixer = vaio_mixer;
4144 spec->init = vaio_init;
4145 spec->multiout.max_channels = 2;
4146 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4147 spec->multiout.dac_nids = vaio_dacs;
4148 spec->multiout.hp_nid = VAIO_HP_DAC;
4149 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
4150 spec->adc_nids = vaio_adcs;
a64135a2 4151 spec->num_pwrs = 0;
db064e50
TI		 4152 spec->input_mux = &vaio_mux;
4153 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4154 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 4155 break;
6d859065
GM		 4156
4157 case CXD9872AKD_VAIO:
4158 spec->mixer = vaio_ar_mixer;
4159 spec->init = vaio_ar_init;
4160 spec->multiout.max_channels = 2;
4161 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4162 spec->multiout.dac_nids = vaio_dacs;
4163 spec->multiout.hp_nid = VAIO_HP_DAC;
4164 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 4165 spec->num_pwrs = 0;
6d859065
GM		 4166 spec->adc_nids = vaio_adcs;
4167 spec->input_mux = &vaio_mux;
4168 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4169 codec->patch_ops = stac9872_patch_ops;
6d859065 4170 break;
db064e50
TI		 4171 }
4172
db064e50
TI		 4173 return 0;
4174}
4175
4176
2f2f4251
M		 4177/*
4178 * patch entries
4179 */
4180struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4181 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4182 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4183 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4184 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4185 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4186 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4187 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4188 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4189 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4190 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4191 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4192 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4193 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4194 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4195 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4196 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4197 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4198 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4199 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4200 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4201 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4202 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4203 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4204 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4205 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4206 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4207 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4208 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4209 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 4210 /* The following does not take into account .id=0x83847661 when subsys =
4211 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4212 * currently not fully supported.
4213 */
4214 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4215 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4216 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 4217 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4218 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4219 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4220 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4221 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4222 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4223 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4224 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
541eee87
MR		 4225 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4226 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4227 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 4228 { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
4229 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4230 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4231 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4232 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4233 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4234 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4235 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4236 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 4237 {} /* terminator */
4238};
Clone of davem's net-next-2.6 tree