]> bbs.cooldavid.org Git - net-next-2.6.git/blame - sound/pci/hda/patch_sigmatel.c
git://bbs.cooldavid.org / net-next-2.6.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ALSA: oxygen: wait for ACK when resetting UART
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
4e55096e 38#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 39#define STAC_PWR_EVENT 0x20
40#define STAC_HP_EVENT 0x30
4e55096e 41
f5fcc13c
TI		 42enum {
43 STAC_REF,
bf277785 44 STAC_9200_OQO,
dfe495d0
TI		 45 STAC_9200_DELL_D21,
46 STAC_9200_DELL_D22,
47 STAC_9200_DELL_D23,
48 STAC_9200_DELL_M21,
49 STAC_9200_DELL_M22,
50 STAC_9200_DELL_M23,
51 STAC_9200_DELL_M24,
52 STAC_9200_DELL_M25,
53 STAC_9200_DELL_M26,
54 STAC_9200_DELL_M27,
1194b5b7 55 STAC_9200_GATEWAY,
117f257d 56 STAC_9200_PANASONIC,
f5fcc13c
TI		 57 STAC_9200_MODELS
58};
59
60enum {
61 STAC_9205_REF,
dfe495d0 62 STAC_9205_DELL_M42,
ae0a8ed8
TD		 63 STAC_9205_DELL_M43,
64 STAC_9205_DELL_M44,
f5fcc13c
TI		 65 STAC_9205_MODELS
66};
67
e1f0d669
MR		 68enum {
69 STAC_92HD73XX_REF,
a7662640 70 STAC_DELL_M6,
e1f0d669
MR		 71 STAC_92HD73XX_MODELS
72};
73
d0513fc6
MR		 74enum {
75 STAC_92HD83XXX_REF,
76 STAC_92HD83XXX_MODELS
77};
78
e035b841
MR		 79enum {
80 STAC_92HD71BXX_REF,
a7662640
MR		 81 STAC_DELL_M4_1,
82 STAC_DELL_M4_2,
6a14f585 83 STAC_HP_M4,
e035b841
MR		 84 STAC_92HD71BXX_MODELS
85};
86
8e21c34c
TD		 87enum {
88 STAC_925x_REF,
89 STAC_M2_2,
90 STAC_MA6,
2c11f955 91 STAC_PA6,
8e21c34c
TD		 92 STAC_925x_MODELS
93};
94
f5fcc13c
TI		 95enum {
96 STAC_D945_REF,
97 STAC_D945GTP3,
98 STAC_D945GTP5,
5d5d3bc3
IZ		 99 STAC_INTEL_MAC_V1,
100 STAC_INTEL_MAC_V2,
101 STAC_INTEL_MAC_V3,
102 STAC_INTEL_MAC_V4,
103 STAC_INTEL_MAC_V5,
536319af
NB		 104 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
105 * is given, one of the above models will be
106 * chosen according to the subsystem id. */
dfe495d0 107 /* for backward compatibility */
f5fcc13c 108 STAC_MACMINI,
3fc24d85 109 STAC_MACBOOK,
6f0778d8
NB		 110 STAC_MACBOOK_PRO_V1,
111 STAC_MACBOOK_PRO_V2,
f16928fb 112 STAC_IMAC_INTEL,
0dae0f83 113 STAC_IMAC_INTEL_20,
8c650087 114 STAC_ECS_202,
dfe495d0
TI		 115 STAC_922X_DELL_D81,
116 STAC_922X_DELL_D82,
117 STAC_922X_DELL_M81,
118 STAC_922X_DELL_M82,
f5fcc13c
TI		 119 STAC_922X_MODELS
120};
121
122enum {
123 STAC_D965_REF,
124 STAC_D965_3ST,
125 STAC_D965_5ST,
4ff076e5 126 STAC_DELL_3ST,
8e9068b1 127 STAC_DELL_BIOS,
f5fcc13c
TI		 128 STAC_927X_MODELS
129};
403d1944 130
2f2f4251 131struct sigmatel_spec {
c8b6bf9b 132 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 133 unsigned int num_mixers;
134
403d1944 135 int board_config;
c7d4b2fa 136 unsigned int surr_switch: 1;
403d1944
MP		 137 unsigned int line_switch: 1;
138 unsigned int mic_switch: 1;
3cc08dc6 139 unsigned int alt_switch: 1;
82bc955f 140 unsigned int hp_detect: 1;
c7d4b2fa 141
4fe5195c 142 /* gpio lines */
0fc9dec4 143 unsigned int eapd_mask;
4fe5195c
MR		 144 unsigned int gpio_mask;
145 unsigned int gpio_dir;
146 unsigned int gpio_data;
147 unsigned int gpio_mute;
148
8daaaa97
MR		 149 /* stream */
150 unsigned int stream_delay;
151
4fe5195c 152 /* analog loopback */
e1f0d669
MR		 153 unsigned char aloopback_mask;
154 unsigned char aloopback_shift;
8259980e 155
a64135a2
MR		 156 /* power management */
157 unsigned int num_pwrs;
d0513fc6 158 unsigned int *pwr_mapping;
a64135a2 159 hda_nid_t *pwr_nids;
b76c850f 160 hda_nid_t *dac_list;
a64135a2 161
2f2f4251 162 /* playback */
b22b4821 163 struct hda_input_mux *mono_mux;
89385035 164 struct hda_input_mux *amp_mux;
b22b4821 165 unsigned int cur_mmux;
2f2f4251 166 struct hda_multi_out multiout;
3cc08dc6 167 hda_nid_t dac_nids[5];
2f2f4251
M		 168
169 /* capture */
170 hda_nid_t *adc_nids;
2f2f4251 171 unsigned int num_adcs;
dabbed6f
M		 172 hda_nid_t *mux_nids;
173 unsigned int num_muxes;
8b65727b
MP		 174 hda_nid_t *dmic_nids;
175 unsigned int num_dmics;
e1f0d669 176 hda_nid_t *dmux_nids;
1697055e 177 unsigned int num_dmuxes;
d9737751
MR		 178 hda_nid_t *smux_nids;
179 unsigned int num_smuxes;
65973632 180 const char **spdif_labels;
d9737751 181
dabbed6f 182 hda_nid_t dig_in_nid;
b22b4821 183 hda_nid_t mono_nid;
1cd2224c
MR		 184 hda_nid_t anabeep_nid;
185 hda_nid_t digbeep_nid;
2f2f4251 186
2f2f4251
M		 187 /* pin widgets */
188 hda_nid_t *pin_nids;
189 unsigned int num_pins;
2f2f4251 190 unsigned int *pin_configs;
11b44bbd 191 unsigned int *bios_pin_configs;
2f2f4251
M		 192
193 /* codec specific stuff */
194 struct hda_verb *init;
c8b6bf9b 195 struct snd_kcontrol_new *mixer;
2f2f4251
M		 196
197 /* capture source */
8b65727b 198 struct hda_input_mux *dinput_mux;
e1f0d669 199 unsigned int cur_dmux[2];
c7d4b2fa 200 struct hda_input_mux *input_mux;
3cc08dc6 201 unsigned int cur_mux[3];
d9737751
MR		 202 struct hda_input_mux *sinput_mux;
203 unsigned int cur_smux[2];
2a9c7816
MR		 204 unsigned int cur_amux;
205 hda_nid_t *amp_nids;
206 unsigned int num_amps;
8daaaa97 207 unsigned int powerdown_adcs;
2f2f4251 208
403d1944
MP		 209 /* i/o switches */
210 unsigned int io_switch[2];
0fb87bb4 211 unsigned int clfe_swap;
7c2ba97b 212 unsigned int hp_switch;
5f10c4a9 213 unsigned int aloopback;
2f2f4251 214
c7d4b2fa
M		 215 struct hda_pcm pcm_rec[2]; /* PCM information */
216
217 /* dynamic controls and input_mux */
218 struct auto_pin_cfg autocfg;
219 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 220 struct snd_kcontrol_new *kctl_alloc;
8b65727b 221 struct hda_input_mux private_dimux;
c7d4b2fa 222 struct hda_input_mux private_imux;
d9737751 223 struct hda_input_mux private_smux;
89385035 224 struct hda_input_mux private_amp_mux;
b22b4821 225 struct hda_input_mux private_mono_mux;
2f2f4251
M		 226};
227
228static hda_nid_t stac9200_adc_nids[1] = {
229 0x03,
230};
231
232static hda_nid_t stac9200_mux_nids[1] = {
233 0x0c,
234};
235
236static hda_nid_t stac9200_dac_nids[1] = {
237 0x02,
238};
239
a64135a2
MR		 240static hda_nid_t stac92hd73xx_pwr_nids[8] = {
241 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
242 0x0f, 0x10, 0x11
243};
244
0ffa9807
MR		 245static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
246 0x26, 0,
247};
248
e1f0d669
MR		 249static hda_nid_t stac92hd73xx_adc_nids[2] = {
250 0x1a, 0x1b
251};
252
2a9c7816
MR		 253#define DELL_M6_AMP 2
254static hda_nid_t stac92hd73xx_amp_nids[3] = {
255 0x0b, 0x0c, 0x0e
89385035
MR		 256};
257
e1f0d669
MR		 258#define STAC92HD73XX_NUM_DMICS 2
259static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
260 0x13, 0x14, 0
261};
262
263#define STAC92HD73_DAC_COUNT 5
264static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
265 0x15, 0x16, 0x17, 0x18, 0x19,
266};
267
268static hda_nid_t stac92hd73xx_mux_nids[4] = {
269 0x28, 0x29, 0x2a, 0x2b,
270};
271
272static hda_nid_t stac92hd73xx_dmux_nids[2] = {
273 0x20, 0x21,
274};
275
d9737751
MR		 276static hda_nid_t stac92hd73xx_smux_nids[2] = {
277 0x22, 0x23,
278};
279
d0513fc6
MR		 280#define STAC92HD83XXX_NUM_DMICS 2
281static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
282 0x11, 0x12, 0
283};
284
285#define STAC92HD81_DAC_COUNT 2
286#define STAC92HD83_DAC_COUNT 3
287static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
288 0x13, 0x14, 0x22,
289};
290
291static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
292 0x17, 0x18,
293};
294
295static hda_nid_t stac92hd83xxx_adc_nids[2] = {
296 0x15, 0x16,
297};
298
299static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
300 0xa, 0xb, 0xd, 0xe,
301};
302
0ffa9807
MR		 303static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
304 0x1e, 0,
305};
306
d0513fc6
MR		 307static unsigned int stac92hd83xxx_pwr_mapping[4] = {
308 0x03, 0x0c, 0x10, 0x40,
309};
310
a64135a2
MR		 311static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
312 0x0a, 0x0d, 0x0f
313};
314
e035b841
MR		 315static hda_nid_t stac92hd71bxx_adc_nids[2] = {
316 0x12, 0x13,
317};
318
319static hda_nid_t stac92hd71bxx_mux_nids[2] = {
320 0x1a, 0x1b
321};
322
e1f0d669
MR		 323static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
324 0x1c,
325};
326
d9737751
MR		 327static hda_nid_t stac92hd71bxx_smux_nids[2] = {
328 0x24, 0x25,
329};
330
aea7bb0a 331static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 332 0x10, /*0x11, */
333};
334
335#define STAC92HD71BXX_NUM_DMICS 2
336static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
337 0x18, 0x19, 0
338};
339
0ffa9807
MR		 340static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
341 0x22, 0
342};
343
8e21c34c
TD		 344static hda_nid_t stac925x_adc_nids[1] = {
345 0x03,
346};
347
348static hda_nid_t stac925x_mux_nids[1] = {
349 0x0f,
350};
351
352static hda_nid_t stac925x_dac_nids[1] = {
353 0x02,
354};
355
f6e9852a
TI		 356#define STAC925X_NUM_DMICS 1
357static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
358 0x15, 0
2c11f955
TD		 359};
360
1697055e
TI		 361static hda_nid_t stac925x_dmux_nids[1] = {
362 0x14,
363};
364
2f2f4251
M		 365static hda_nid_t stac922x_adc_nids[2] = {
366 0x06, 0x07,
367};
368
369static hda_nid_t stac922x_mux_nids[2] = {
370 0x12, 0x13,
371};
372
3cc08dc6
MP		 373static hda_nid_t stac927x_adc_nids[3] = {
374 0x07, 0x08, 0x09
375};
376
377static hda_nid_t stac927x_mux_nids[3] = {
378 0x15, 0x16, 0x17
379};
380
d9737751
MR		 381static hda_nid_t stac927x_smux_nids[1] = {
382 0x21,
383};
384
b76c850f
MR		 385static hda_nid_t stac927x_dac_nids[6] = {
386 0x02, 0x03, 0x04, 0x05, 0x06, 0
387};
388
e1f0d669
MR		 389static hda_nid_t stac927x_dmux_nids[1] = {
390 0x1b,
391};
392
7f16859a
MR		 393#define STAC927X_NUM_DMICS 2
394static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
395 0x13, 0x14, 0
396};
397
65973632
MR		 398static const char *stac927x_spdif_labels[5] = {
399 "Digital Playback", "ADAT", "Analog Mux 1",
400 "Analog Mux 2", "Analog Mux 3"
401};
402
f3302a59
MP		 403static hda_nid_t stac9205_adc_nids[2] = {
404 0x12, 0x13
405};
406
407static hda_nid_t stac9205_mux_nids[2] = {
408 0x19, 0x1a
409};
410
e1f0d669 411static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 412 0x1d,
e1f0d669
MR		 413};
414
d9737751
MR		 415static hda_nid_t stac9205_smux_nids[1] = {
416 0x21,
417};
418
f6e9852a
TI		 419#define STAC9205_NUM_DMICS 2
420static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
421 0x17, 0x18, 0
8b65727b
MP		 422};
423
c7d4b2fa 424static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 425 0x08, 0x09, 0x0d, 0x0e,
426 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 427};
428
8e21c34c
TD		 429static hda_nid_t stac925x_pin_nids[8] = {
430 0x07, 0x08, 0x0a, 0x0b,
431 0x0c, 0x0d, 0x10, 0x11,
432};
433
2f2f4251
M		 434static hda_nid_t stac922x_pin_nids[10] = {
435 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
436 0x0f, 0x10, 0x11, 0x15, 0x1b,
437};
438
a7662640 439static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 440 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
441 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 442 0x14, 0x22, 0x23
e1f0d669
MR		 443};
444
d0513fc6
MR		 445static hda_nid_t stac92hd83xxx_pin_nids[14] = {
446 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
447 0x0f, 0x10, 0x11, 0x12, 0x13,
448 0x1d, 0x1e, 0x1f, 0x20
449};
0ffa9807 450static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 451 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
452 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 453 0x1f,
e035b841
MR		 454};
455
3cc08dc6
MP		 456static hda_nid_t stac927x_pin_nids[14] = {
457 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
458 0x0f, 0x10, 0x11, 0x12, 0x13,
459 0x14, 0x21, 0x22, 0x23,
460};
461
f3302a59
MP		 462static hda_nid_t stac9205_pin_nids[12] = {
463 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
464 0x0f, 0x14, 0x16, 0x17, 0x18,
465 0x21, 0x22,
f3302a59
MP		 466};
467
89385035
MR		 468#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
469
470static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
471 struct snd_ctl_elem_value *ucontrol)
472{
473 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
474 struct sigmatel_spec *spec = codec->spec;
475 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
476
477 kcontrol->private_value ^= get_amp_nid(kcontrol);
478 kcontrol->private_value |= nid;
479
480 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
481}
482
483static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
484 struct snd_ctl_elem_value *ucontrol)
485{
486 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
487 struct sigmatel_spec *spec = codec->spec;
488 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
489
490 kcontrol->private_value ^= get_amp_nid(kcontrol);
491 kcontrol->private_value |= nid;
492
493 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
494}
495
8b65727b
MP		 496static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
497 struct snd_ctl_elem_info *uinfo)
498{
499 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
500 struct sigmatel_spec *spec = codec->spec;
501 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
502}
503
504static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
505 struct snd_ctl_elem_value *ucontrol)
506{
507 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
508 struct sigmatel_spec *spec = codec->spec;
e1f0d669 509 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 510
e1f0d669 511 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 512 return 0;
513}
514
515static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
516 struct snd_ctl_elem_value *ucontrol)
517{
518 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
519 struct sigmatel_spec *spec = codec->spec;
e1f0d669 520 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 521
522 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 523 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 524}
525
d9737751
MR		 526static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
527 struct snd_ctl_elem_info *uinfo)
528{
529 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
530 struct sigmatel_spec *spec = codec->spec;
531 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
532}
533
534static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
535 struct snd_ctl_elem_value *ucontrol)
536{
537 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
538 struct sigmatel_spec *spec = codec->spec;
539 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
540
541 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
542 return 0;
543}
544
545static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
546 struct snd_ctl_elem_value *ucontrol)
547{
548 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
549 struct sigmatel_spec *spec = codec->spec;
550 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
551
552 return snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
553 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
554}
555
c8b6bf9b 556static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 557{
558 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
559 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 560 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 561}
562
c8b6bf9b 563static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 564{
565 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
566 struct sigmatel_spec *spec = codec->spec;
567 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
568
569 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
570 return 0;
571}
572
c8b6bf9b 573static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 574{
575 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
576 struct sigmatel_spec *spec = codec->spec;
577 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
578
c7d4b2fa 579 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 580 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
581}
582
b22b4821
MR		 583static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
584 struct snd_ctl_elem_info *uinfo)
585{
586 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
587 struct sigmatel_spec *spec = codec->spec;
588 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
589}
590
591static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
592 struct snd_ctl_elem_value *ucontrol)
593{
594 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
595 struct sigmatel_spec *spec = codec->spec;
596
597 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
598 return 0;
599}
600
601static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
602 struct snd_ctl_elem_value *ucontrol)
603{
604 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
605 struct sigmatel_spec *spec = codec->spec;
606
607 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
608 spec->mono_nid, &spec->cur_mmux);
609}
610
89385035
MR		 611static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
612 struct snd_ctl_elem_info *uinfo)
613{
614 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
615 struct sigmatel_spec *spec = codec->spec;
616 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
617}
618
619static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
620 struct snd_ctl_elem_value *ucontrol)
621{
622 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
623 struct sigmatel_spec *spec = codec->spec;
624
625 ucontrol->value.enumerated.item[0] = spec->cur_amux;
626 return 0;
627}
628
629static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
630 struct snd_ctl_elem_value *ucontrol)
631{
632 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
633 struct sigmatel_spec *spec = codec->spec;
634 struct snd_kcontrol *ctl =
635 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
636 if (!ctl)
637 return -EINVAL;
638
639 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
640 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
641
642 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
643 0, &spec->cur_amux);
644}
645
5f10c4a9
ML		 646#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
647
648static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
649 struct snd_ctl_elem_value *ucontrol)
650{
651 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 652 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 653 struct sigmatel_spec *spec = codec->spec;
654
e1f0d669
MR		 655 ucontrol->value.integer.value[0] = !!(spec->aloopback &
656 (spec->aloopback_mask << idx));
5f10c4a9
ML		 657 return 0;
658}
659
660static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
661 struct snd_ctl_elem_value *ucontrol)
662{
663 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
664 struct sigmatel_spec *spec = codec->spec;
e1f0d669 665 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 666 unsigned int dac_mode;
e1f0d669 667 unsigned int val, idx_val;
5f10c4a9 668
e1f0d669
MR		 669 idx_val = spec->aloopback_mask << idx;
670 if (ucontrol->value.integer.value[0])
671 val = spec->aloopback | idx_val;
672 else
673 val = spec->aloopback & ~idx_val;
68ea7b2f 674 if (spec->aloopback == val)
5f10c4a9
ML		 675 return 0;
676
68ea7b2f 677 spec->aloopback = val;
5f10c4a9 678
e1f0d669
MR		 679 /* Only return the bits defined by the shift value of the
680 * first two bytes of the mask
681 */
5f10c4a9 682 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 683 kcontrol->private_value & 0xFFFF, 0x0);
684 dac_mode >>= spec->aloopback_shift;
5f10c4a9 685
e1f0d669 686 if (spec->aloopback & idx_val) {
5f10c4a9 687 snd_hda_power_up(codec);
e1f0d669 688 dac_mode |= idx_val;
5f10c4a9
ML		 689 } else {
690 snd_hda_power_down(codec);
e1f0d669 691 dac_mode &= ~idx_val;
5f10c4a9
ML		 692 }
693
694 snd_hda_codec_write_cache(codec, codec->afg, 0,
695 kcontrol->private_value >> 16, dac_mode);
696
697 return 1;
698}
699
c7d4b2fa 700static struct hda_verb stac9200_core_init[] = {
2f2f4251 701 /* set dac0mux for dac converter */
c7d4b2fa 702 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 703 {}
704};
705
1194b5b7
TI		 706static struct hda_verb stac9200_eapd_init[] = {
707 /* set dac0mux for dac converter */
708 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
709 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
710 {}
711};
712
e1f0d669
MR		 713static struct hda_verb stac92hd73xx_6ch_core_init[] = {
714 /* set master volume and direct control */
715 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
716 /* setup audio connections */
717 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
718 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
719 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
720 /* setup adcs to point to mixer */
721 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
722 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 723 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
724 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
725 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
726 /* setup import muxs */
727 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
728 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
729 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
730 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
731 {}
732};
733
d654a660
MR		 734static struct hda_verb dell_eq_core_init[] = {
735 /* set master volume to max value without distortion
736 * and direct control */
737 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
738 /* setup audio connections */
739 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 740 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
741 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 742 /* setup adcs to point to mixer */
743 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
744 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
745 /* setup import muxs */
746 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
747 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
748 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
749 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
750 {}
751};
752
52fe0f9d 753static struct hda_verb dell_m6_core_init[] = {
20f5f95d
MR		 754 /* set master volume to max value without distortion
755 * and direct control */
756 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
52fe0f9d 757 /* setup audio connections */
7747ecce
MR		 758 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
759 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 760 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
761 /* setup adcs to point to mixer */
762 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
763 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
764 /* setup import muxs */
765 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
766 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
767 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
768 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
769 {}
770};
771
e1f0d669
MR		 772static struct hda_verb stac92hd73xx_8ch_core_init[] = {
773 /* set master volume and direct control */
774 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
775 /* setup audio connections */
776 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
777 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
778 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
779 /* connect hp ports to dac3 */
780 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
781 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
782 /* setup adcs to point to mixer */
783 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
784 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 785 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
786 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
787 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
788 /* setup import muxs */
789 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
790 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
791 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
792 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
793 {}
794};
795
796static struct hda_verb stac92hd73xx_10ch_core_init[] = {
797 /* set master volume and direct control */
798 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
799 /* setup audio connections */
800 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
801 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
802 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
803 /* dac3 is connected to import3 mux */
804 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
805 /* connect hp ports to dac4 */
806 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
807 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
808 /* setup adcs to point to mixer */
809 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
810 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 811 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
812 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
813 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
814 /* setup import muxs */
815 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
816 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
817 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
818 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
819 {}
820};
821
d0513fc6
MR		 822static struct hda_verb stac92hd83xxx_core_init[] = {
823 /* start of config #1 */
824 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
825
826 /* start of config #2 */
827 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
828 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
829 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
830
831 /* power state controls amps */
832 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
833};
834
e035b841 835static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 836 /* set master volume and direct control */
837 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
838 /* connect headphone jack to dac1 */
839 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
840 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
841 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
842 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
843 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
844 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 845};
846
aafc4412 847#define HD_DISABLE_PORTF 3
541eee87 848static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 849 /* start of config #1 */
850
851 /* connect port 0f to audio mixer */
852 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
853 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
854 /* unmute right and left channels for node 0x0f */
855 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
856 /* start of config #2 */
857
e035b841
MR		 858 /* set master volume and direct control */
859 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
860 /* connect headphone jack to dac1 */
861 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 862 /* connect port 0d to audio mixer */
9b35947f 863 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
9b35947f
MR		 864 /* unmute dac0 input in audio mixer */
865 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
aafc4412 866 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 867 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
868 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 869 {}
870};
871
8e21c34c
TD		 872static struct hda_verb stac925x_core_init[] = {
873 /* set dac0mux for dac converter */
874 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
875 {}
876};
877
c7d4b2fa 878static struct hda_verb stac922x_core_init[] = {
2f2f4251 879 /* set master volume and direct control */
c7d4b2fa 880 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 881 {}
882};
883
93ed1503 884static struct hda_verb d965_core_init[] = {
19039bd0 885 /* set master volume and direct control */
93ed1503 886 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 887 /* unmute node 0x1b */
888 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
889 /* select node 0x03 as DAC */
890 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
891 {}
892};
893
3cc08dc6
MP		 894static struct hda_verb stac927x_core_init[] = {
895 /* set master volume and direct control */
896 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 897 /* enable analog pc beep path */
898 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 899 {}
900};
901
f3302a59
MP		 902static struct hda_verb stac9205_core_init[] = {
903 /* set master volume and direct control */
904 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 905 /* enable analog pc beep path */
906 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 907 {}
908};
909
b22b4821
MR		 910#define STAC_MONO_MUX \
911 { \
912 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
913 .name = "Mono Mux", \
914 .count = 1, \
915 .info = stac92xx_mono_mux_enum_info, \
916 .get = stac92xx_mono_mux_enum_get, \
917 .put = stac92xx_mono_mux_enum_put, \
918 }
919
89385035
MR		 920#define STAC_AMP_MUX \
921 { \
922 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
923 .name = "Amp Selector Capture Switch", \
924 .count = 1, \
925 .info = stac92xx_amp_mux_enum_info, \
926 .get = stac92xx_amp_mux_enum_get, \
927 .put = stac92xx_amp_mux_enum_put, \
928 }
929
930#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
931 { \
932 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
933 .name = xname, \
934 .index = 0, \
935 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
936 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
937 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
938 .info = stac92xx_amp_volume_info, \
939 .get = stac92xx_amp_volume_get, \
940 .put = stac92xx_amp_volume_put, \
941 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
942 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
943 }
944
9e05b7a3 945#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 946 { \
947 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
948 .name = "Input Source", \
9e05b7a3 949 .count = cnt, \
ca7c5a8b
ML		 950 .info = stac92xx_mux_enum_info, \
951 .get = stac92xx_mux_enum_get, \
952 .put = stac92xx_mux_enum_put, \
953 }
954
e1f0d669 955#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 956 { \
957 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
958 .name = "Analog Loopback", \
e1f0d669 959 .count = cnt, \
5f10c4a9
ML		 960 .info = stac92xx_aloopback_info, \
961 .get = stac92xx_aloopback_get, \
962 .put = stac92xx_aloopback_put, \
963 .private_value = verb_read | (verb_write << 16), \
964 }
965
c8b6bf9b 966static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 967 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
968 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 969 STAC_INPUT_SOURCE(1),
2f2f4251
M		 970 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
971 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 972 { } /* end */
973};
974
2a9c7816 975#define DELL_M6_MIXER 6
e1f0d669 976static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 977 /* start of config #1 */
e1f0d669
MR		 978 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
979 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
980
e1f0d669
MR		 981 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
982 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
983
2a9c7816
MR		 984 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
985 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
986
987 /* start of config #2 */
988 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
989 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
990
e1f0d669
MR		 991 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
992 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
993
2a9c7816
MR		 994 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
995
996 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
997 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
998
999 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1000 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1001
e1f0d669
MR		 1002 { } /* end */
1003};
1004
1005static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1006 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1007
e1f0d669
MR		 1008 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1009 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1010
1011 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1012 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1013
1014 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1015 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1016
1017 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1018 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1019
1020 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1021 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1022
1023 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1024 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1025
1026 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1027 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1028 { } /* end */
1029};
1030
1031static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1032 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1033
e1f0d669
MR		 1034 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1035 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1036
1037 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1038 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1039
1040 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1041 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1042
1043 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1044 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1045
1046 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1047 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1048
1049 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1050 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1051
1052 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1053 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1054 { } /* end */
1055};
1056
d0513fc6
MR		 1057
1058static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1059 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1060 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1061
1062 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1063 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1064
1065 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1066 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1067
1068 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1069 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1070
1071 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1072 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1073
1074 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1075 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1076
1077 /*
1078 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1079 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1080 */
1081 { } /* end */
1082};
1083
541eee87 1084static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1085 STAC_INPUT_SOURCE(2),
e035b841 1086
9b35947f
MR		 1087 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1088 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1089
1090 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1091 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1092 /* analog pc-beep replaced with digital beep support */
1093 /*
f7c5dda2
MR		 1094 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1095 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1096 */
f7c5dda2 1097
9b35947f
MR		 1098 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
1099 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1100 { } /* end */
1101};
1102
541eee87 1103static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1104 STAC_INPUT_SOURCE(2),
1105 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1106
541eee87
MR		 1107 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1108 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1109
1110 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1111 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1112 { } /* end */
1113};
1114
8e21c34c 1115static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1116 STAC_INPUT_SOURCE(1),
8e21c34c 1117 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1118 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1119 { } /* end */
1120};
1121
9e05b7a3 1122static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1123 STAC_INPUT_SOURCE(2),
e1f0d669 1124 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1125
1126 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1127 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1128
1129 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1130 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1131 { } /* end */
1132};
1133
19039bd0 1134/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1135static struct snd_kcontrol_new stac922x_mixer[] = {
1136 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1137 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1138 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1139
1140 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1141 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1142 { } /* end */
1143};
1144
9e05b7a3 1145
d1d985f0 1146static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1147 STAC_INPUT_SOURCE(3),
e1f0d669 1148 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1149
9e05b7a3
ML		 1150 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1151 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1152
1153 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1154 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1155
1156 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1157 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1158 { } /* end */
1159};
1160
1697055e
TI		 1161static struct snd_kcontrol_new stac_dmux_mixer = {
1162 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1163 .name = "Digital Input Source",
1164 /* count set later */
1165 .info = stac92xx_dmux_enum_info,
1166 .get = stac92xx_dmux_enum_get,
1167 .put = stac92xx_dmux_enum_put,
1168};
1169
d9737751
MR		 1170static struct snd_kcontrol_new stac_smux_mixer = {
1171 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1172 .name = "IEC958 Playback Source",
d9737751
MR		 1173 /* count set later */
1174 .info = stac92xx_smux_enum_info,
1175 .get = stac92xx_smux_enum_get,
1176 .put = stac92xx_smux_enum_put,
1177};
1178
2134ea4f
TI		 1179static const char *slave_vols[] = {
1180 "Front Playback Volume",
1181 "Surround Playback Volume",
1182 "Center Playback Volume",
1183 "LFE Playback Volume",
1184 "Side Playback Volume",
1185 "Headphone Playback Volume",
1186 "Headphone Playback Volume",
1187 "Speaker Playback Volume",
1188 "External Speaker Playback Volume",
1189 "Speaker2 Playback Volume",
1190 NULL
1191};
1192
1193static const char *slave_sws[] = {
1194 "Front Playback Switch",
1195 "Surround Playback Switch",
1196 "Center Playback Switch",
1197 "LFE Playback Switch",
1198 "Side Playback Switch",
1199 "Headphone Playback Switch",
1200 "Headphone Playback Switch",
1201 "Speaker Playback Switch",
1202 "External Speaker Playback Switch",
1203 "Speaker2 Playback Switch",
edb54a55 1204 "IEC958 Playback Switch",
2134ea4f
TI		 1205 NULL
1206};
1207
2f2f4251
M		 1208static int stac92xx_build_controls(struct hda_codec *codec)
1209{
1210 struct sigmatel_spec *spec = codec->spec;
1211 int err;
c7d4b2fa 1212 int i;
2f2f4251
M		 1213
1214 err = snd_hda_add_new_ctls(codec, spec->mixer);
1215 if (err < 0)
1216 return err;
c7d4b2fa
M		 1217
1218 for (i = 0; i < spec->num_mixers; i++) {
1219 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1220 if (err < 0)
1221 return err;
1222 }
1697055e
TI		 1223 if (spec->num_dmuxes > 0) {
1224 stac_dmux_mixer.count = spec->num_dmuxes;
1225 err = snd_ctl_add(codec->bus->card,
1226 snd_ctl_new1(&stac_dmux_mixer, codec));
1227 if (err < 0)
1228 return err;
1229 }
d9737751
MR		 1230 if (spec->num_smuxes > 0) {
1231 stac_smux_mixer.count = spec->num_smuxes;
1232 err = snd_ctl_add(codec->bus->card,
1233 snd_ctl_new1(&stac_smux_mixer, codec));
1234 if (err < 0)
1235 return err;
1236 }
c7d4b2fa 1237
dabbed6f
M		 1238 if (spec->multiout.dig_out_nid) {
1239 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1240 if (err < 0)
1241 return err;
9a08160b
TI		 1242 err = snd_hda_create_spdif_share_sw(codec,
1243 &spec->multiout);
1244 if (err < 0)
1245 return err;
1246 spec->multiout.share_spdif = 1;
dabbed6f
M		 1247 }
1248 if (spec->dig_in_nid) {
1249 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1250 if (err < 0)
1251 return err;
1252 }
2134ea4f
TI		 1253
1254 /* if we have no master control, let's create it */
1255 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1256 unsigned int vmaster_tlv[4];
2134ea4f 1257 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1258 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1259 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1260 vmaster_tlv, slave_vols);
2134ea4f
TI		 1261 if (err < 0)
1262 return err;
1263 }
1264 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1265 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1266 NULL, slave_sws);
1267 if (err < 0)
1268 return err;
1269 }
1270
dabbed6f 1271 return 0;
2f2f4251
M		 1272}
1273
403d1944 1274static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1275 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1276 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1277};
1278
dfe495d0
TI		 1279/*
1280 STAC 9200 pin configs for
1281 102801A8
1282 102801DE
1283 102801E8
1284*/
1285static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1286 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1287 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1288};
1289
1290/*
1291 STAC 9200 pin configs for
1292 102801C0
1293 102801C1
1294*/
1295static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1296 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1297 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1298};
1299
1300/*
1301 STAC 9200 pin configs for
1302 102801C4 (Dell Dimension E310)
1303 102801C5
1304 102801C7
1305 102801D9
1306 102801DA
1307 102801E3
1308*/
1309static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1310 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1311 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1312};
1313
1314
1315/*
1316 STAC 9200-32 pin configs for
1317 102801B5 (Dell Inspiron 630m)
1318 102801D8 (Dell Inspiron 640m)
1319*/
1320static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1321 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1322 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1323};
1324
1325/*
1326 STAC 9200-32 pin configs for
1327 102801C2 (Dell Latitude D620)
1328 102801C8
1329 102801CC (Dell Latitude D820)
1330 102801D4
1331 102801D6
1332*/
1333static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1334 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1335 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1336};
1337
1338/*
1339 STAC 9200-32 pin configs for
1340 102801CE (Dell XPS M1710)
1341 102801CF (Dell Precision M90)
1342*/
1343static unsigned int dell9200_m23_pin_configs[8] = {
1344 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1345 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1346};
1347
1348/*
1349 STAC 9200-32 pin configs for
1350 102801C9
1351 102801CA
1352 102801CB (Dell Latitude 120L)
1353 102801D3
1354*/
1355static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1356 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1357 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1358};
1359
1360/*
1361 STAC 9200-32 pin configs for
1362 102801BD (Dell Inspiron E1505n)
1363 102801EE
1364 102801EF
1365*/
1366static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1367 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1368 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1369};
1370
1371/*
1372 STAC 9200-32 pin configs for
1373 102801F5 (Dell Inspiron 1501)
1374 102801F6
1375*/
1376static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1377 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1378 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1379};
1380
1381/*
1382 STAC 9200-32
1383 102801CD (Dell Inspiron E1705/9400)
1384*/
1385static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1386 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1387 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1388};
1389
bf277785
TD		 1390static unsigned int oqo9200_pin_configs[8] = {
1391 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1392 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1393};
1394
dfe495d0 1395
f5fcc13c
TI		 1396static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1397 [STAC_REF] = ref9200_pin_configs,
bf277785 1398 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1399 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1400 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1401 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1402 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1403 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1404 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1405 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1406 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1407 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1408 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1409 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1410};
1411
f5fcc13c
TI		 1412static const char *stac9200_models[STAC_9200_MODELS] = {
1413 [STAC_REF] = "ref",
bf277785 1414 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1415 [STAC_9200_DELL_D21] = "dell-d21",
1416 [STAC_9200_DELL_D22] = "dell-d22",
1417 [STAC_9200_DELL_D23] = "dell-d23",
1418 [STAC_9200_DELL_M21] = "dell-m21",
1419 [STAC_9200_DELL_M22] = "dell-m22",
1420 [STAC_9200_DELL_M23] = "dell-m23",
1421 [STAC_9200_DELL_M24] = "dell-m24",
1422 [STAC_9200_DELL_M25] = "dell-m25",
1423 [STAC_9200_DELL_M26] = "dell-m26",
1424 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1425 [STAC_9200_GATEWAY] = "gateway",
117f257d 1426 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1427};
1428
1429static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1430 /* SigmaTel reference board */
1431 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1432 "DFI LanParty", STAC_REF),
e7377071 1433 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1434 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1435 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1436 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1437 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1438 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1439 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1440 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1441 "unknown Dell", STAC_9200_DELL_D22),
1442 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1443 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1444 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1445 "Dell Latitude D620", STAC_9200_DELL_M22),
1446 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1447 "unknown Dell", STAC_9200_DELL_D23),
1448 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1449 "unknown Dell", STAC_9200_DELL_D23),
1450 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1451 "unknown Dell", STAC_9200_DELL_M22),
1452 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1453 "unknown Dell", STAC_9200_DELL_M24),
1454 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1455 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1456 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1457 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1458 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1459 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1460 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1461 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1462 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1463 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1464 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1465 "Dell Precision M90", STAC_9200_DELL_M23),
1466 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1467 "unknown Dell", STAC_9200_DELL_M22),
1468 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1469 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1470 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1471 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1472 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1473 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1475 "unknown Dell", STAC_9200_DELL_D23),
1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1477 "unknown Dell", STAC_9200_DELL_D23),
1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1479 "unknown Dell", STAC_9200_DELL_D21),
1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1481 "unknown Dell", STAC_9200_DELL_D23),
1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1483 "unknown Dell", STAC_9200_DELL_D21),
1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1485 "unknown Dell", STAC_9200_DELL_M25),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1487 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1489 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1491 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1492 /* Panasonic */
117f257d 1493 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1494 /* Gateway machines needs EAPD to be set on resume */
1495 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1496 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1497 STAC_9200_GATEWAY),
1498 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1499 STAC_9200_GATEWAY),
bf277785
TD		 1500 /* OQO Mobile */
1501 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1502 {} /* terminator */
1503};
1504
8e21c34c
TD		 1505static unsigned int ref925x_pin_configs[8] = {
1506 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1507 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1508};
1509
1510static unsigned int stac925x_MA6_pin_configs[8] = {
1511 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1512 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1513};
1514
2c11f955
TD		 1515static unsigned int stac925x_PA6_pin_configs[8] = {
1516 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1517 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1518};
1519
8e21c34c 1520static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1521 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1522 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1523};
1524
1525static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1526 [STAC_REF] = ref925x_pin_configs,
1527 [STAC_M2_2] = stac925xM2_2_pin_configs,
1528 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1529 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1530};
1531
1532static const char *stac925x_models[STAC_925x_MODELS] = {
1533 [STAC_REF] = "ref",
1534 [STAC_M2_2] = "m2-2",
1535 [STAC_MA6] = "m6",
2c11f955 1536 [STAC_PA6] = "pa6",
8e21c34c
TD		 1537};
1538
1539static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1540 /* SigmaTel reference board */
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1542 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1543 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1544 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1545 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1546 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1547 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1548 {} /* terminator */
1549};
1550
a7662640 1551static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1552 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1553 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1554 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1555 0x01452050,
1556};
1557
1558static unsigned int dell_m6_pin_configs[13] = {
1559 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1560 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1561 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1562 0x4f0000f0,
e1f0d669
MR		 1563};
1564
1565static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1566 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1567 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1568};
1569
1570static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1571 [STAC_92HD73XX_REF] = "ref",
a7662640 1572 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1573};
1574
1575static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1576 /* SigmaTel reference board */
1577 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1578 "DFI LanParty", STAC_92HD73XX_REF),
1579 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1580 "unknown Dell", STAC_DELL_M6),
1581 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1582 "unknown Dell", STAC_DELL_M6),
1583 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1584 "unknown Dell", STAC_DELL_M6),
1585 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1586 "unknown Dell", STAC_DELL_M6),
1587 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1588 "unknown Dell", STAC_DELL_M6),
1589 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1590 "unknown Dell", STAC_DELL_M6),
1591 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1592 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1593 {} /* terminator */
1594};
1595
d0513fc6
MR		 1596static unsigned int ref92hd83xxx_pin_configs[14] = {
1597 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1598 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1599 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1600 0x01451160, 0x98560170,
1601};
1602
1603static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1604 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1605};
1606
1607static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1608 [STAC_92HD83XXX_REF] = "ref",
1609};
1610
1611static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1612 /* SigmaTel reference board */
1613 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1614 "DFI LanParty", STAC_92HD71BXX_REF),
1615};
1616
0ffa9807 1617static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1618 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1619 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
0ffa9807 1620 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1621};
1622
0ffa9807 1623static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1624 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1625 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1626 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1627};
1628
0ffa9807 1629static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1630 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1631 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1632 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1633};
1634
e035b841
MR		 1635static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1636 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1637 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1638 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
6a14f585 1639 [STAC_HP_M4] = NULL,
e035b841
MR		 1640};
1641
1642static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1643 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1644 [STAC_DELL_M4_1] = "dell-m4-1",
1645 [STAC_DELL_M4_2] = "dell-m4-2",
6a14f585 1646 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1647};
1648
1649static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1650 /* SigmaTel reference board */
1651 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1652 "DFI LanParty", STAC_92HD71BXX_REF),
a7662640
MR		 1653 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1654 "unknown Dell", STAC_DELL_M4_1),
1655 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1656 "unknown Dell", STAC_DELL_M4_1),
1657 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1658 "unknown Dell", STAC_DELL_M4_1),
1659 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1660 "unknown Dell", STAC_DELL_M4_1),
1661 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1662 "unknown Dell", STAC_DELL_M4_1),
1663 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1664 "unknown Dell", STAC_DELL_M4_1),
1665 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1666 "unknown Dell", STAC_DELL_M4_1),
1667 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1668 "unknown Dell", STAC_DELL_M4_2),
1669 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1670 "unknown Dell", STAC_DELL_M4_2),
1671 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1672 "unknown Dell", STAC_DELL_M4_2),
1673 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1674 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1675 {} /* terminator */
1676};
1677
403d1944
MP		 1678static unsigned int ref922x_pin_configs[10] = {
1679 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1680 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1681 0x40000100, 0x40000100,
1682};
1683
dfe495d0
TI		 1684/*
1685 STAC 922X pin configs for
1686 102801A7
1687 102801AB
1688 102801A9
1689 102801D1
1690 102801D2
1691*/
1692static unsigned int dell_922x_d81_pin_configs[10] = {
1693 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1694 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1695 0x01813122, 0x400001f2,
1696};
1697
1698/*
1699 STAC 922X pin configs for
1700 102801AC
1701 102801D0
1702*/
1703static unsigned int dell_922x_d82_pin_configs[10] = {
1704 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1705 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1706 0x01813122, 0x400001f1,
1707};
1708
1709/*
1710 STAC 922X pin configs for
1711 102801BF
1712*/
1713static unsigned int dell_922x_m81_pin_configs[10] = {
1714 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1715 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1716 0x40C003f1, 0x405003f0,
1717};
1718
1719/*
1720 STAC 9221 A1 pin configs for
1721 102801D7 (Dell XPS M1210)
1722*/
1723static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1724 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1725 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1726 0x508003f3, 0x405003f4,
1727};
1728
403d1944 1729static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1730 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1731 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1732 0x02a19120, 0x40000100,
1733};
1734
1735static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1736 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1737 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1738 0x02a19320, 0x40000100,
1739};
1740
5d5d3bc3
IZ		 1741static unsigned int intel_mac_v1_pin_configs[10] = {
1742 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1743 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1744 0x400000fc, 0x400000fb,
1745};
1746
1747static unsigned int intel_mac_v2_pin_configs[10] = {
1748 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1749 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1750 0x400000fc, 0x400000fb,
6f0778d8
NB		 1751};
1752
5d5d3bc3
IZ		 1753static unsigned int intel_mac_v3_pin_configs[10] = {
1754 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1755 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1756 0x400000fc, 0x400000fb,
1757};
1758
5d5d3bc3
IZ		 1759static unsigned int intel_mac_v4_pin_configs[10] = {
1760 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1761 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1762 0x400000fc, 0x400000fb,
1763};
1764
5d5d3bc3
IZ		 1765static unsigned int intel_mac_v5_pin_configs[10] = {
1766 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1767 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1768 0x400000fc, 0x400000fb,
0dae0f83
TI		 1769};
1770
8c650087
MCC		 1771static unsigned int ecs202_pin_configs[10] = {
1772 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1773 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1774 0x9037012e, 0x40e000f2,
1775};
76c08828 1776
19039bd0 1777static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1778 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1779 [STAC_D945GTP3] = d945gtp3_pin_configs,
1780 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1781 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1782 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1783 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1784 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1785 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1786 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1787 /* for backward compatibility */
5d5d3bc3
IZ		 1788 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1789 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1790 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1791 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1792 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1793 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1794 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1795 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1796 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1797 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1798 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1799};
1800
f5fcc13c
TI		 1801static const char *stac922x_models[STAC_922X_MODELS] = {
1802 [STAC_D945_REF] = "ref",
1803 [STAC_D945GTP5] = "5stack",
1804 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1805 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1806 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1807 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1808 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1809 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1810 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1811 /* for backward compatibility */
f5fcc13c 1812 [STAC_MACMINI] = "macmini",
3fc24d85 1813 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1814 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1815 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1816 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1817 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1818 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1819 [STAC_922X_DELL_D81] = "dell-d81",
1820 [STAC_922X_DELL_D82] = "dell-d82",
1821 [STAC_922X_DELL_M81] = "dell-m81",
1822 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1823};
1824
1825static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1826 /* SigmaTel reference board */
1827 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1828 "DFI LanParty", STAC_D945_REF),
1829 /* Intel 945G based systems */
1830 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1831 "Intel D945G", STAC_D945GTP3),
1832 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1833 "Intel D945G", STAC_D945GTP3),
1834 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1835 "Intel D945G", STAC_D945GTP3),
1836 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1837 "Intel D945G", STAC_D945GTP3),
1838 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1839 "Intel D945G", STAC_D945GTP3),
1840 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1841 "Intel D945G", STAC_D945GTP3),
1842 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1843 "Intel D945G", STAC_D945GTP3),
1844 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1845 "Intel D945G", STAC_D945GTP3),
1846 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1847 "Intel D945G", STAC_D945GTP3),
1848 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1849 "Intel D945G", STAC_D945GTP3),
1850 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1851 "Intel D945G", STAC_D945GTP3),
1852 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1853 "Intel D945G", STAC_D945GTP3),
1854 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1855 "Intel D945G", STAC_D945GTP3),
1856 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1857 "Intel D945G", STAC_D945GTP3),
1858 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1859 "Intel D945G", STAC_D945GTP3),
1860 /* Intel D945G 5-stack systems */
1861 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1862 "Intel D945G", STAC_D945GTP5),
1863 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1864 "Intel D945G", STAC_D945GTP5),
1865 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1866 "Intel D945G", STAC_D945GTP5),
1867 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1868 "Intel D945G", STAC_D945GTP5),
1869 /* Intel 945P based systems */
1870 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1871 "Intel D945P", STAC_D945GTP3),
1872 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1873 "Intel D945P", STAC_D945GTP3),
1874 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1875 "Intel D945P", STAC_D945GTP3),
1876 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1877 "Intel D945P", STAC_D945GTP3),
1878 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1879 "Intel D945P", STAC_D945GTP3),
1880 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1881 "Intel D945P", STAC_D945GTP5),
1882 /* other systems */
536319af 1883 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1884 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1885 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1886 /* Dell systems */
1887 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1888 "unknown Dell", STAC_922X_DELL_D81),
1889 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1890 "unknown Dell", STAC_922X_DELL_D81),
1891 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1892 "unknown Dell", STAC_922X_DELL_D81),
1893 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1894 "unknown Dell", STAC_922X_DELL_D82),
1895 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1896 "unknown Dell", STAC_922X_DELL_M81),
1897 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1898 "unknown Dell", STAC_922X_DELL_D82),
1899 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1900 "unknown Dell", STAC_922X_DELL_D81),
1901 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1902 "unknown Dell", STAC_922X_DELL_D81),
1903 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1904 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1905 /* ECS/PC Chips boards */
1906 SND_PCI_QUIRK(0x1019, 0x2144,
1907 "ECS/PC chips", STAC_ECS_202),
1908 SND_PCI_QUIRK(0x1019, 0x2608,
1909 "ECS/PC chips", STAC_ECS_202),
1910 SND_PCI_QUIRK(0x1019, 0x2633,
1911 "ECS/PC chips P17G/1333", STAC_ECS_202),
1912 SND_PCI_QUIRK(0x1019, 0x2811,
1913 "ECS/PC chips", STAC_ECS_202),
1914 SND_PCI_QUIRK(0x1019, 0x2812,
1915 "ECS/PC chips", STAC_ECS_202),
1916 SND_PCI_QUIRK(0x1019, 0x2813,
1917 "ECS/PC chips", STAC_ECS_202),
1918 SND_PCI_QUIRK(0x1019, 0x2814,
1919 "ECS/PC chips", STAC_ECS_202),
1920 SND_PCI_QUIRK(0x1019, 0x2815,
1921 "ECS/PC chips", STAC_ECS_202),
1922 SND_PCI_QUIRK(0x1019, 0x2816,
1923 "ECS/PC chips", STAC_ECS_202),
1924 SND_PCI_QUIRK(0x1019, 0x2817,
1925 "ECS/PC chips", STAC_ECS_202),
1926 SND_PCI_QUIRK(0x1019, 0x2818,
1927 "ECS/PC chips", STAC_ECS_202),
1928 SND_PCI_QUIRK(0x1019, 0x2819,
1929 "ECS/PC chips", STAC_ECS_202),
1930 SND_PCI_QUIRK(0x1019, 0x2820,
1931 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 1932 {} /* terminator */
1933};
1934
3cc08dc6 1935static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1936 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1937 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1938 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1939 0x01c42190, 0x40000100,
3cc08dc6
MP		 1940};
1941
93ed1503 1942static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1943 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1944 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1945 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1946 0x40000100, 0x40000100
1947};
1948
93ed1503
TD		 1949static unsigned int d965_5st_pin_configs[14] = {
1950 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1951 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1952 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1953 0x40000100, 0x40000100
1954};
1955
4ff076e5
TD		 1956static unsigned int dell_3st_pin_configs[14] = {
1957 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1958 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1959 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1960 0x40c003fc, 0x40000100
1961};
1962
93ed1503 1963static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1964 [STAC_D965_REF] = ref927x_pin_configs,
1965 [STAC_D965_3ST] = d965_3st_pin_configs,
1966 [STAC_D965_5ST] = d965_5st_pin_configs,
1967 [STAC_DELL_3ST] = dell_3st_pin_configs,
1968 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1969};
1970
f5fcc13c 1971static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1972 [STAC_D965_REF] = "ref",
1973 [STAC_D965_3ST] = "3stack",
1974 [STAC_D965_5ST] = "5stack",
1975 [STAC_DELL_3ST] = "dell-3stack",
1976 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1977};
1978
1979static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1980 /* SigmaTel reference board */
1981 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1982 "DFI LanParty", STAC_D965_REF),
81d3dbde 1983 /* Intel 946 based systems */
f5fcc13c
TI		 1984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1985 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1986 /* 965 based 3 stack systems */
f5fcc13c
TI		 1987 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1989 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1991 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1993 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1995 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1997 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1999 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2001 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2003 /* Dell 3 stack systems */
8e9068b1 2004 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2005 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2006 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2007 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2008 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2009 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2011 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2012 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2013 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2015 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2017 /* 965 based 5 stack systems */
f5fcc13c
TI		 2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2019 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2021 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2023 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2027 {} /* terminator */
2028};
2029
f3302a59
MP		 2030static unsigned int ref9205_pin_configs[12] = {
2031 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2032 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2033 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2034};
2035
dfe495d0
TI		 2036/*
2037 STAC 9205 pin configs for
2038 102801F1
2039 102801F2
2040 102801FC
2041 102801FD
2042 10280204
2043 1028021F
3fa2ef74 2044 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2045*/
2046static unsigned int dell_9205_m42_pin_configs[12] = {
2047 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2048 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2049 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2050};
2051
2052/*
2053 STAC 9205 pin configs for
2054 102801F9
2055 102801FA
2056 102801FE
2057 102801FF (Dell Precision M4300)
2058 10280206
2059 10280200
2060 10280201
2061*/
2062static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2063 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2064 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2065 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2066};
2067
dfe495d0 2068static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2069 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2070 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2071 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2072};
2073
f5fcc13c 2074static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2075 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2076 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2077 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2078 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2079};
2080
f5fcc13c
TI		 2081static const char *stac9205_models[STAC_9205_MODELS] = {
2082 [STAC_9205_REF] = "ref",
dfe495d0 2083 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2084 [STAC_9205_DELL_M43] = "dell-m43",
2085 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2086};
2087
2088static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2089 /* SigmaTel reference board */
2090 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2091 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2092 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2093 "unknown Dell", STAC_9205_DELL_M42),
2094 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2095 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2096 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2097 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2098 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2099 "Dell Precision", STAC_9205_DELL_M43),
2100 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2101 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2102 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2103 "unknown Dell", STAC_9205_DELL_M42),
2104 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2105 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2106 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2107 "Dell Precision", STAC_9205_DELL_M43),
2108 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2109 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2110 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2111 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2113 "Dell Precision", STAC_9205_DELL_M43),
2114 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2115 "Dell Precision", STAC_9205_DELL_M43),
2116 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2117 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2119 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2120 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2121 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2122 {} /* terminator */
2123};
2124
11b44bbd
RF		 2125static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2126{
2127 int i;
2128 struct sigmatel_spec *spec = codec->spec;
2129
2130 if (! spec->bios_pin_configs) {
2131 spec->bios_pin_configs = kcalloc(spec->num_pins,
2132 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
2133 if (! spec->bios_pin_configs)
2134 return -ENOMEM;
2135 }
2136
2137 for (i = 0; i < spec->num_pins; i++) {
2138 hda_nid_t nid = spec->pin_nids[i];
2139 unsigned int pin_cfg;
2140
2141 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2142 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2143 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2144 nid, pin_cfg);
2145 spec->bios_pin_configs[i] = pin_cfg;
2146 }
2147
2148 return 0;
2149}
2150
87d48363
MR		 2151static void stac92xx_set_config_reg(struct hda_codec *codec,
2152 hda_nid_t pin_nid, unsigned int pin_config)
2153{
2154 int i;
2155 snd_hda_codec_write(codec, pin_nid, 0,
2156 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2157 pin_config & 0x000000ff);
2158 snd_hda_codec_write(codec, pin_nid, 0,
2159 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2160 (pin_config & 0x0000ff00) >> 8);
2161 snd_hda_codec_write(codec, pin_nid, 0,
2162 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2163 (pin_config & 0x00ff0000) >> 16);
2164 snd_hda_codec_write(codec, pin_nid, 0,
2165 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2166 pin_config >> 24);
2167 i = snd_hda_codec_read(codec, pin_nid, 0,
2168 AC_VERB_GET_CONFIG_DEFAULT,
2169 0x00);
2170 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2171 pin_nid, i);
2172}
2173
2f2f4251
M		 2174static void stac92xx_set_config_regs(struct hda_codec *codec)
2175{
2176 int i;
2177 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2178
87d48363
MR		 2179 if (!spec->pin_configs)
2180 return;
11b44bbd 2181
87d48363
MR		 2182 for (i = 0; i < spec->num_pins; i++)
2183 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2184 spec->pin_configs[i]);
2f2f4251 2185}
2f2f4251 2186
dabbed6f 2187/*
c7d4b2fa 2188 * Analog playback callbacks
dabbed6f 2189 */
c7d4b2fa
M		 2190static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2191 struct hda_codec *codec,
c8b6bf9b 2192 struct snd_pcm_substream *substream)
2f2f4251 2193{
dabbed6f 2194 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2195 if (spec->stream_delay)
2196 msleep(spec->stream_delay);
9a08160b
TI		 2197 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2198 hinfo);
2f2f4251
M		 2199}
2200
2f2f4251
M		 2201static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2202 struct hda_codec *codec,
2203 unsigned int stream_tag,
2204 unsigned int format,
c8b6bf9b 2205 struct snd_pcm_substream *substream)
2f2f4251
M		 2206{
2207 struct sigmatel_spec *spec = codec->spec;
403d1944 2208 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2209}
2210
2211static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2212 struct hda_codec *codec,
c8b6bf9b 2213 struct snd_pcm_substream *substream)
2f2f4251
M		 2214{
2215 struct sigmatel_spec *spec = codec->spec;
2216 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2217}
2218
dabbed6f
M		 2219/*
2220 * Digital playback callbacks
2221 */
2222static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2223 struct hda_codec *codec,
c8b6bf9b 2224 struct snd_pcm_substream *substream)
dabbed6f
M		 2225{
2226 struct sigmatel_spec *spec = codec->spec;
2227 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2228}
2229
2230static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2231 struct hda_codec *codec,
c8b6bf9b 2232 struct snd_pcm_substream *substream)
dabbed6f
M		 2233{
2234 struct sigmatel_spec *spec = codec->spec;
2235 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2236}
2237
6b97eb45
TI		 2238static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2239 struct hda_codec *codec,
2240 unsigned int stream_tag,
2241 unsigned int format,
2242 struct snd_pcm_substream *substream)
2243{
2244 struct sigmatel_spec *spec = codec->spec;
2245 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2246 stream_tag, format, substream);
2247}
2248
dabbed6f 2249
2f2f4251
M		 2250/*
2251 * Analog capture callbacks
2252 */
2253static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2254 struct hda_codec *codec,
2255 unsigned int stream_tag,
2256 unsigned int format,
c8b6bf9b 2257 struct snd_pcm_substream *substream)
2f2f4251
M		 2258{
2259 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2260 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2261
8daaaa97
MR		 2262 if (spec->powerdown_adcs) {
2263 msleep(40);
2264 snd_hda_codec_write_cache(codec, nid, 0,
2265 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2266 }
2267 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2268 return 0;
2269}
2270
2271static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2272 struct hda_codec *codec,
c8b6bf9b 2273 struct snd_pcm_substream *substream)
2f2f4251
M		 2274{
2275 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2276 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2277
8daaaa97
MR		 2278 snd_hda_codec_cleanup_stream(codec, nid);
2279 if (spec->powerdown_adcs)
2280 snd_hda_codec_write_cache(codec, nid, 0,
2281 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2282 return 0;
2283}
2284
dabbed6f
M		 2285static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2286 .substreams = 1,
2287 .channels_min = 2,
2288 .channels_max = 2,
2289 /* NID is set in stac92xx_build_pcms */
2290 .ops = {
2291 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2292 .close = stac92xx_dig_playback_pcm_close,
2293 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2294 },
2295};
2296
2297static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2298 .substreams = 1,
2299 .channels_min = 2,
2300 .channels_max = 2,
2301 /* NID is set in stac92xx_build_pcms */
2302};
2303
2f2f4251
M		 2304static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2305 .substreams = 1,
2306 .channels_min = 2,
c7d4b2fa 2307 .channels_max = 8,
2f2f4251
M		 2308 .nid = 0x02, /* NID to query formats and rates */
2309 .ops = {
2310 .open = stac92xx_playback_pcm_open,
2311 .prepare = stac92xx_playback_pcm_prepare,
2312 .cleanup = stac92xx_playback_pcm_cleanup
2313 },
2314};
2315
3cc08dc6
MP		 2316static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2317 .substreams = 1,
2318 .channels_min = 2,
2319 .channels_max = 2,
2320 .nid = 0x06, /* NID to query formats and rates */
2321 .ops = {
2322 .open = stac92xx_playback_pcm_open,
2323 .prepare = stac92xx_playback_pcm_prepare,
2324 .cleanup = stac92xx_playback_pcm_cleanup
2325 },
2326};
2327
2f2f4251 2328static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2329 .channels_min = 2,
2330 .channels_max = 2,
9e05b7a3 2331 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2332 .ops = {
2333 .prepare = stac92xx_capture_pcm_prepare,
2334 .cleanup = stac92xx_capture_pcm_cleanup
2335 },
2336};
2337
2338static int stac92xx_build_pcms(struct hda_codec *codec)
2339{
2340 struct sigmatel_spec *spec = codec->spec;
2341 struct hda_pcm *info = spec->pcm_rec;
2342
2343 codec->num_pcms = 1;
2344 codec->pcm_info = info;
2345
c7d4b2fa 2346 info->name = "STAC92xx Analog";
2f2f4251 2347 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2348 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2349 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2350 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2351
2352 if (spec->alt_switch) {
2353 codec->num_pcms++;
2354 info++;
2355 info->name = "STAC92xx Analog Alt";
2356 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2357 }
2f2f4251 2358
dabbed6f
M		 2359 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2360 codec->num_pcms++;
2361 info++;
2362 info->name = "STAC92xx Digital";
7ba72ba1 2363 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2364 if (spec->multiout.dig_out_nid) {
2365 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2366 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2367 }
2368 if (spec->dig_in_nid) {
2369 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2370 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2371 }
2372 }
2373
2f2f4251
M		 2374 return 0;
2375}
2376
c960a03b
TI		 2377static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2378{
2379 unsigned int pincap = snd_hda_param_read(codec, nid,
2380 AC_PAR_PIN_CAP);
2381 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2382 if (pincap & AC_PINCAP_VREF_100)
2383 return AC_PINCTL_VREF_100;
2384 if (pincap & AC_PINCAP_VREF_80)
2385 return AC_PINCTL_VREF_80;
2386 if (pincap & AC_PINCAP_VREF_50)
2387 return AC_PINCTL_VREF_50;
2388 if (pincap & AC_PINCAP_VREF_GRD)
2389 return AC_PINCTL_VREF_GRD;
2390 return 0;
2391}
2392
403d1944
MP		 2393static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2394
2395{
82beb8fd
TI		 2396 snd_hda_codec_write_cache(codec, nid, 0,
2397 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2398}
2399
7c2ba97b
MR		 2400#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2401
2402static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2403 struct snd_ctl_elem_value *ucontrol)
2404{
2405 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2406 struct sigmatel_spec *spec = codec->spec;
2407
2408 ucontrol->value.integer.value[0] = spec->hp_switch;
2409 return 0;
2410}
2411
2412static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2413 struct snd_ctl_elem_value *ucontrol)
2414{
2415 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2416 struct sigmatel_spec *spec = codec->spec;
2417
2418 spec->hp_switch = ucontrol->value.integer.value[0];
2419
2420 /* check to be sure that the ports are upto date with
2421 * switch changes
2422 */
2423 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2424
2425 return 1;
2426}
2427
a5ce8890 2428#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2429
2430static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2431{
2432 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2433 struct sigmatel_spec *spec = codec->spec;
2434 int io_idx = kcontrol-> private_value & 0xff;
2435
2436 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2437 return 0;
2438}
2439
2440static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2441{
2442 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2443 struct sigmatel_spec *spec = codec->spec;
2444 hda_nid_t nid = kcontrol->private_value >> 8;
2445 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2446 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2447
2448 spec->io_switch[io_idx] = val;
2449
2450 if (val)
2451 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2452 else {
2453 unsigned int pinctl = AC_PINCTL_IN_EN;
2454 if (io_idx) /* set VREF for mic */
2455 pinctl |= stac92xx_get_vref(codec, nid);
2456 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2457 }
40c1d308
JZ		 2458
2459 /* check the auto-mute again: we need to mute/unmute the speaker
2460 * appropriately according to the pin direction
2461 */
2462 if (spec->hp_detect)
2463 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2464
403d1944
MP		 2465 return 1;
2466}
2467
0fb87bb4
ML		 2468#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2469
2470static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2471 struct snd_ctl_elem_value *ucontrol)
2472{
2473 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2474 struct sigmatel_spec *spec = codec->spec;
2475
2476 ucontrol->value.integer.value[0] = spec->clfe_swap;
2477 return 0;
2478}
2479
2480static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2481 struct snd_ctl_elem_value *ucontrol)
2482{
2483 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2484 struct sigmatel_spec *spec = codec->spec;
2485 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2486 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2487
68ea7b2f 2488 if (spec->clfe_swap == val)
0fb87bb4
ML		 2489 return 0;
2490
68ea7b2f 2491 spec->clfe_swap = val;
0fb87bb4
ML		 2492
2493 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2494 spec->clfe_swap ? 0x4 : 0x0);
2495
2496 return 1;
2497}
2498
7c2ba97b
MR		 2499#define STAC_CODEC_HP_SWITCH(xname) \
2500 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2501 .name = xname, \
2502 .index = 0, \
2503 .info = stac92xx_hp_switch_info, \
2504 .get = stac92xx_hp_switch_get, \
2505 .put = stac92xx_hp_switch_put, \
2506 }
2507
403d1944
MP		 2508#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2509 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2510 .name = xname, \
2511 .index = 0, \
2512 .info = stac92xx_io_switch_info, \
2513 .get = stac92xx_io_switch_get, \
2514 .put = stac92xx_io_switch_put, \
2515 .private_value = xpval, \
2516 }
2517
0fb87bb4
ML		 2518#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2519 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2520 .name = xname, \
2521 .index = 0, \
2522 .info = stac92xx_clfe_switch_info, \
2523 .get = stac92xx_clfe_switch_get, \
2524 .put = stac92xx_clfe_switch_put, \
2525 .private_value = xpval, \
2526 }
403d1944 2527
c7d4b2fa
M		 2528enum {
2529 STAC_CTL_WIDGET_VOL,
2530 STAC_CTL_WIDGET_MUTE,
09a99959 2531 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2532 STAC_CTL_WIDGET_AMP_MUX,
2533 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2534 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2535 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2536 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2537};
2538
c8b6bf9b 2539static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2540 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2541 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2542 STAC_MONO_MUX,
89385035
MR		 2543 STAC_AMP_MUX,
2544 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2545 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2546 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2547 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2548};
2549
2550/* add dynamic controls */
4682eee0
MR		 2551static int stac92xx_add_control_idx(struct sigmatel_spec *spec, int type,
2552 int idx, const char *name, unsigned long val)
c7d4b2fa 2553{
c8b6bf9b 2554 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2555
2556 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2557 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2558
2559 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2560 if (! knew)
2561 return -ENOMEM;
2562 if (spec->kctl_alloc) {
2563 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2564 kfree(spec->kctl_alloc);
2565 }
2566 spec->kctl_alloc = knew;
2567 spec->num_kctl_alloc = num;
2568 }
2569
2570 knew = &spec->kctl_alloc[spec->num_kctl_used];
2571 *knew = stac92xx_control_templates[type];
4682eee0 2572 knew->index = idx;
82fe0c58 2573 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2574 if (! knew->name)
2575 return -ENOMEM;
2576 knew->private_value = val;
2577 spec->num_kctl_used++;
2578 return 0;
2579}
2580
4682eee0
MR		 2581
2582/* add dynamic controls */
2583static int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2584 const char *name, unsigned long val)
2585{
2586 return stac92xx_add_control_idx(spec, type, 0, name, val);
2587}
2588
403d1944
MP		 2589/* flag inputs as additional dynamic lineouts */
2590static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2591{
2592 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2593 unsigned int wcaps, wtype;
2594 int i, num_dacs = 0;
2595
2596 /* use the wcaps cache to count all DACs available for line-outs */
2597 for (i = 0; i < codec->num_nodes; i++) {
2598 wcaps = codec->wcaps[i];
2599 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2600
7b043899
SL		 2601 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2602 num_dacs++;
2603 }
403d1944 2604
7b043899
SL		 2605 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2606
403d1944
MP		 2607 switch (cfg->line_outs) {
2608 case 3:
2609 /* add line-in as side */
7b043899 2610 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2611 cfg->line_out_pins[cfg->line_outs] =
2612 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2613 spec->line_switch = 1;
2614 cfg->line_outs++;
2615 }
2616 break;
2617 case 2:
2618 /* add line-in as clfe and mic as side */
7b043899 2619 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2620 cfg->line_out_pins[cfg->line_outs] =
2621 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2622 spec->line_switch = 1;
2623 cfg->line_outs++;
2624 }
7b043899 2625 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2626 cfg->line_out_pins[cfg->line_outs] =
2627 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2628 spec->mic_switch = 1;
2629 cfg->line_outs++;
2630 }
2631 break;
2632 case 1:
2633 /* add line-in as surr and mic as clfe */
7b043899 2634 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2635 cfg->line_out_pins[cfg->line_outs] =
2636 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2637 spec->line_switch = 1;
2638 cfg->line_outs++;
2639 }
7b043899 2640 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2641 cfg->line_out_pins[cfg->line_outs] =
2642 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2643 spec->mic_switch = 1;
2644 cfg->line_outs++;
2645 }
2646 break;
2647 }
2648
2649 return 0;
2650}
2651
7b043899
SL		 2652
2653static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2654{
2655 int i;
2656
2657 for (i = 0; i < spec->multiout.num_dacs; i++) {
2658 if (spec->multiout.dac_nids[i] == nid)
2659 return 1;
2660 }
2661
2662 return 0;
2663}
2664
3cc08dc6 2665/*
7b043899
SL		 2666 * Fill in the dac_nids table from the parsed pin configuration
2667 * This function only works when every pin in line_out_pins[]
2668 * contains atleast one DAC in its connection list. Some 92xx
2669 * codecs are not connected directly to a DAC, such as the 9200
2670 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2671 */
19039bd0 2672static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2673 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2674{
2675 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2676 int i, j, conn_len = 0;
2677 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2678 unsigned int wcaps, wtype;
2679
c7d4b2fa
M		 2680 for (i = 0; i < cfg->line_outs; i++) {
2681 nid = cfg->line_out_pins[i];
7b043899
SL		 2682 conn_len = snd_hda_get_connections(codec, nid, conn,
2683 HDA_MAX_CONNECTIONS);
2684 for (j = 0; j < conn_len; j++) {
2685 wcaps = snd_hda_param_read(codec, conn[j],
2686 AC_PAR_AUDIO_WIDGET_CAP);
2687 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2688 if (wtype != AC_WID_AUD_OUT ||
2689 (wcaps & AC_WCAP_DIGITAL))
2690 continue;
2691 /* conn[j] is a DAC routed to this line-out */
2692 if (!is_in_dac_nids(spec, conn[j]))
2693 break;
2694 }
2695
2696 if (j == conn_len) {
df802952
TI		 2697 if (spec->multiout.num_dacs > 0) {
2698 /* we have already working output pins,
2699 * so let's drop the broken ones again
2700 */
2701 cfg->line_outs = spec->multiout.num_dacs;
2702 break;
2703 }
7b043899
SL		 2704 /* error out, no available DAC found */
2705 snd_printk(KERN_ERR
2706 "%s: No available DAC for pin 0x%x\n",
2707 __func__, nid);
2708 return -ENODEV;
2709 }
2710
2711 spec->multiout.dac_nids[i] = conn[j];
2712 spec->multiout.num_dacs++;
2713 if (conn_len > 1) {
2714 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2715 snd_hda_codec_write_cache(codec, nid, 0,
2716 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2717
7b043899
SL		 2718 }
2719 }
c7d4b2fa 2720
7b043899
SL		 2721 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2722 spec->multiout.num_dacs,
2723 spec->multiout.dac_nids[0],
2724 spec->multiout.dac_nids[1],
2725 spec->multiout.dac_nids[2],
2726 spec->multiout.dac_nids[3],
2727 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2728 return 0;
2729}
2730
eb06ed8f
TI		 2731/* create volume control/switch for the given prefx type */
2732static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2733{
2734 char name[32];
2735 int err;
2736
2737 sprintf(name, "%s Playback Volume", pfx);
2738 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2739 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2740 if (err < 0)
2741 return err;
2742 sprintf(name, "%s Playback Switch", pfx);
2743 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2744 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2745 if (err < 0)
2746 return err;
2747 return 0;
2748}
2749
ae0afd81
MR		 2750static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2751{
2752 if (!spec->multiout.hp_nid)
2753 spec->multiout.hp_nid = nid;
2754 else if (spec->multiout.num_dacs > 4) {
2755 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2756 return 1;
2757 } else {
2758 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2759 spec->multiout.num_dacs++;
2760 }
2761 return 0;
2762}
2763
2764static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2765{
2766 if (is_in_dac_nids(spec, nid))
2767 return 1;
2768 if (spec->multiout.hp_nid == nid)
2769 return 1;
2770 return 0;
2771}
2772
c7d4b2fa 2773/* add playback controls from the parsed DAC table */
0fb87bb4 2774static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2775 const struct auto_pin_cfg *cfg)
c7d4b2fa 2776{
19039bd0
TI		 2777 static const char *chname[4] = {
2778 "Front", "Surround", NULL /*CLFE*/, "Side"
2779 };
c7d4b2fa
M		 2780 hda_nid_t nid;
2781 int i, err;
2782
0fb87bb4 2783 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2784 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2785
2786
40ac8c4f 2787 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2788 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2789 continue;
2790
2791 nid = spec->multiout.dac_nids[i];
2792
2793 if (i == 2) {
2794 /* Center/LFE */
eb06ed8f
TI		 2795 err = create_controls(spec, "Center", nid, 1);
2796 if (err < 0)
c7d4b2fa 2797 return err;
eb06ed8f
TI		 2798 err = create_controls(spec, "LFE", nid, 2);
2799 if (err < 0)
c7d4b2fa 2800 return err;
0fb87bb4
ML		 2801
2802 wid_caps = get_wcaps(codec, nid);
2803
2804 if (wid_caps & AC_WCAP_LR_SWAP) {
2805 err = stac92xx_add_control(spec,
2806 STAC_CTL_WIDGET_CLFE_SWITCH,
2807 "Swap Center/LFE Playback Switch", nid);
2808
2809 if (err < 0)
2810 return err;
2811 }
2812
c7d4b2fa 2813 } else {
eb06ed8f
TI		 2814 err = create_controls(spec, chname[i], nid, 3);
2815 if (err < 0)
c7d4b2fa
M		 2816 return err;
2817 }
2818 }
2819
7c2ba97b
MR		 2820 if (cfg->hp_outs > 1) {
2821 err = stac92xx_add_control(spec,
2822 STAC_CTL_WIDGET_HP_SWITCH,
2823 "Headphone as Line Out Switch", 0);
2824 if (err < 0)
2825 return err;
2826 }
2827
b5895dc8
MR		 2828 if (spec->line_switch) {
2829 nid = cfg->input_pins[AUTO_PIN_LINE];
2830 pincap = snd_hda_param_read(codec, nid,
2831 AC_PAR_PIN_CAP);
2832 if (pincap & AC_PINCAP_OUT) {
2833 err = stac92xx_add_control(spec,
2834 STAC_CTL_WIDGET_IO_SWITCH,
2835 "Line In as Output Switch", nid << 8);
2836 if (err < 0)
2837 return err;
2838 }
2839 }
403d1944 2840
b5895dc8 2841 if (spec->mic_switch) {
cace16f1 2842 unsigned int def_conf;
ae0afd81
MR		 2843 unsigned int mic_pin = AUTO_PIN_MIC;
2844again:
2845 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2846 def_conf = snd_hda_codec_read(codec, nid, 0,
2847 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2848 /* some laptops have an internal analog microphone
2849 * which can't be used as a output */
2850 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2851 pincap = snd_hda_param_read(codec, nid,
2852 AC_PAR_PIN_CAP);
2853 if (pincap & AC_PINCAP_OUT) {
2854 err = stac92xx_add_control(spec,
2855 STAC_CTL_WIDGET_IO_SWITCH,
2856 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2857 nid = snd_hda_codec_read(codec, nid, 0,
2858 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2859 if (!check_in_dac_nids(spec, nid))
2860 add_spec_dacs(spec, nid);
cace16f1
MR		 2861 if (err < 0)
2862 return err;
2863 }
ae0afd81
MR		 2864 } else if (mic_pin == AUTO_PIN_MIC) {
2865 mic_pin = AUTO_PIN_FRONT_MIC;
2866 goto again;
b5895dc8
MR		 2867 }
2868 }
403d1944 2869
c7d4b2fa
M		 2870 return 0;
2871}
2872
eb06ed8f
TI		 2873/* add playback controls for Speaker and HP outputs */
2874static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2875 struct auto_pin_cfg *cfg)
2876{
2877 struct sigmatel_spec *spec = codec->spec;
2878 hda_nid_t nid;
2879 int i, old_num_dacs, err;
2880
2881 old_num_dacs = spec->multiout.num_dacs;
2882 for (i = 0; i < cfg->hp_outs; i++) {
2883 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2884 if (wid_caps & AC_WCAP_UNSOL_CAP)
2885 spec->hp_detect = 1;
2886 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2887 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2888 if (check_in_dac_nids(spec, nid))
2889 nid = 0;
2890 if (! nid)
c7d4b2fa 2891 continue;
eb06ed8f
TI		 2892 add_spec_dacs(spec, nid);
2893 }
2894 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2895 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2896 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2897 if (check_in_dac_nids(spec, nid))
2898 nid = 0;
eb06ed8f
TI		 2899 if (! nid)
2900 continue;
2901 add_spec_dacs(spec, nid);
c7d4b2fa 2902 }
1b290a51
MR		 2903 for (i = 0; i < cfg->line_outs; i++) {
2904 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2905 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2906 if (check_in_dac_nids(spec, nid))
2907 nid = 0;
2908 if (! nid)
2909 continue;
2910 add_spec_dacs(spec, nid);
2911 }
eb06ed8f
TI		 2912 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2913 static const char *pfxs[] = {
2914 "Speaker", "External Speaker", "Speaker2",
2915 };
2916 err = create_controls(spec, pfxs[i - old_num_dacs],
2917 spec->multiout.dac_nids[i], 3);
2918 if (err < 0)
2919 return err;
2920 }
2921 if (spec->multiout.hp_nid) {
2626a263
TI		 2922 err = create_controls(spec, "Headphone",
2923 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2924 if (err < 0)
2925 return err;
2926 }
c7d4b2fa
M		 2927
2928 return 0;
2929}
2930
b22b4821 2931/* labels for mono mux outputs */
d0513fc6
MR		 2932static const char *stac92xx_mono_labels[4] = {
2933 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 2934};
2935
2936/* create mono mux for mono out on capable codecs */
2937static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2938{
2939 struct sigmatel_spec *spec = codec->spec;
2940 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2941 int i, num_cons;
2942 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2943
2944 num_cons = snd_hda_get_connections(codec,
2945 spec->mono_nid,
2946 con_lst,
2947 HDA_MAX_NUM_INPUTS);
2948 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2949 return -EINVAL;
2950
2951 for (i = 0; i < num_cons; i++) {
2952 mono_mux->items[mono_mux->num_items].label =
2953 stac92xx_mono_labels[i];
2954 mono_mux->items[mono_mux->num_items].index = i;
2955 mono_mux->num_items++;
2956 }
09a99959
MR		 2957
2958 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2959 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2960}
2961
89385035
MR		 2962/* labels for amp mux outputs */
2963static const char *stac92xx_amp_labels[3] = {
2964 "Front Microphone", "Microphone", "Line In"
2965};
2966
2967/* create amp out controls mux on capable codecs */
2968static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
2969{
2970 struct sigmatel_spec *spec = codec->spec;
2971 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
2972 int i, err;
2973
2a9c7816 2974 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 2975 amp_mux->items[amp_mux->num_items].label =
2976 stac92xx_amp_labels[i];
2977 amp_mux->items[amp_mux->num_items].index = i;
2978 amp_mux->num_items++;
2979 }
2980
2a9c7816
MR		 2981 if (spec->num_amps > 1) {
2982 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
2983 "Amp Selector Capture Switch", 0);
2984 if (err < 0)
2985 return err;
2986 }
89385035
MR		 2987 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
2988 "Amp Capture Volume",
2989 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
2990}
2991
2992
1cd2224c
MR		 2993/* create PC beep volume controls */
2994static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
2995 hda_nid_t nid)
2996{
2997 struct sigmatel_spec *spec = codec->spec;
2998 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
2999 int err;
3000
3001 /* check for mute support for the the amp */
3002 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3003 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3004 "PC Beep Playback Switch",
3005 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3006 if (err < 0)
3007 return err;
3008 }
3009
3010 /* check to see if there is volume support for the amp */
3011 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3012 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3013 "PC Beep Playback Volume",
3014 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3015 if (err < 0)
3016 return err;
3017 }
3018 return 0;
3019}
3020
4682eee0
MR		 3021static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3022{
3023 struct sigmatel_spec *spec = codec->spec;
3024 int wcaps, nid, i, err = 0;
3025
3026 for (i = 0; i < spec->num_muxes; i++) {
3027 nid = spec->mux_nids[i];
3028 wcaps = get_wcaps(codec, nid);
3029
3030 if (wcaps & AC_WCAP_OUT_AMP) {
3031 err = stac92xx_add_control_idx(spec,
3032 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3033 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3034 if (err < 0)
3035 return err;
3036 }
3037 }
3038 return 0;
3039};
3040
d9737751 3041static const char *stac92xx_spdif_labels[3] = {
65973632 3042 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3043};
3044
3045static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3046{
3047 struct sigmatel_spec *spec = codec->spec;
3048 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3049 const char **labels = spec->spdif_labels;
d9737751 3050 int i, num_cons;
65973632 3051 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3052
3053 num_cons = snd_hda_get_connections(codec,
3054 spec->smux_nids[0],
3055 con_lst,
3056 HDA_MAX_NUM_INPUTS);
65973632 3057 if (!num_cons)
d9737751
MR		 3058 return -EINVAL;
3059
65973632
MR		 3060 if (!labels)
3061 labels = stac92xx_spdif_labels;
3062
d9737751 3063 for (i = 0; i < num_cons; i++) {
65973632 3064 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3065 spdif_mux->items[spdif_mux->num_items].index = i;
3066 spdif_mux->num_items++;
3067 }
3068
3069 return 0;
3070}
3071
8b65727b 3072/* labels for dmic mux inputs */
ddc2cec4 3073static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3074 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3075 "Digital Mic 3", "Digital Mic 4"
3076};
3077
3078/* create playback/capture controls for input pins on dmic capable codecs */
3079static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3080 const struct auto_pin_cfg *cfg)
3081{
3082 struct sigmatel_spec *spec = codec->spec;
3083 struct hda_input_mux *dimux = &spec->private_dimux;
3084 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3085 int err, i, j;
3086 char name[32];
8b65727b
MP		 3087
3088 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3089 dimux->items[dimux->num_items].index = 0;
3090 dimux->num_items++;
3091
3092 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3093 hda_nid_t nid;
8b65727b
MP		 3094 int index;
3095 int num_cons;
0678accd 3096 unsigned int wcaps;
8b65727b
MP		 3097 unsigned int def_conf;
3098
3099 def_conf = snd_hda_codec_read(codec,
3100 spec->dmic_nids[i],
3101 0,
3102 AC_VERB_GET_CONFIG_DEFAULT,
3103 0);
3104 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3105 continue;
3106
0678accd 3107 nid = spec->dmic_nids[i];
8b65727b 3108 num_cons = snd_hda_get_connections(codec,
e1f0d669 3109 spec->dmux_nids[0],
8b65727b
MP		 3110 con_lst,
3111 HDA_MAX_NUM_INPUTS);
3112 for (j = 0; j < num_cons; j++)
0678accd 3113 if (con_lst[j] == nid) {
8b65727b
MP		 3114 index = j;
3115 goto found;
3116 }
3117 continue;
3118found:
d0513fc6
MR		 3119 wcaps = get_wcaps(codec, nid) &
3120 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3121
d0513fc6 3122 if (wcaps) {
0678accd
MR		 3123 sprintf(name, "%s Capture Volume",
3124 stac92xx_dmic_labels[dimux->num_items]);
3125
3126 err = stac92xx_add_control(spec,
3127 STAC_CTL_WIDGET_VOL,
3128 name,
d0513fc6
MR		 3129 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3130 (wcaps & AC_WCAP_OUT_AMP) ?
3131 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3132 if (err < 0)
3133 return err;
3134 }
3135
8b65727b
MP		 3136 dimux->items[dimux->num_items].label =
3137 stac92xx_dmic_labels[dimux->num_items];
3138 dimux->items[dimux->num_items].index = index;
3139 dimux->num_items++;
3140 }
3141
3142 return 0;
3143}
3144
c7d4b2fa
M		 3145/* create playback/capture controls for input pins */
3146static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3147{
3148 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3149 struct hda_input_mux *imux = &spec->private_imux;
3150 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3151 int i, j, k;
3152
3153 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3154 int index;
3155
3156 if (!cfg->input_pins[i])
3157 continue;
3158 index = -1;
3159 for (j = 0; j < spec->num_muxes; j++) {
3160 int num_cons;
3161 num_cons = snd_hda_get_connections(codec,
3162 spec->mux_nids[j],
3163 con_lst,
3164 HDA_MAX_NUM_INPUTS);
3165 for (k = 0; k < num_cons; k++)
3166 if (con_lst[k] == cfg->input_pins[i]) {
3167 index = k;
3168 goto found;
3169 }
c7d4b2fa 3170 }
314634bc
TI		 3171 continue;
3172 found:
3173 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3174 imux->items[imux->num_items].index = index;
3175 imux->num_items++;
c7d4b2fa
M		 3176 }
3177
7b043899 3178 if (imux->num_items) {
62fe78e9
SR		 3179 /*
3180 * Set the current input for the muxes.
3181 * The STAC9221 has two input muxes with identical source
3182 * NID lists. Hopefully this won't get confused.
3183 */
3184 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3185 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3186 AC_VERB_SET_CONNECT_SEL,
3187 imux->items[0].index);
62fe78e9
SR		 3188 }
3189 }
3190
c7d4b2fa
M		 3191 return 0;
3192}
3193
c7d4b2fa
M		 3194static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3195{
3196 struct sigmatel_spec *spec = codec->spec;
3197 int i;
3198
3199 for (i = 0; i < spec->autocfg.line_outs; i++) {
3200 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3201 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3202 }
3203}
3204
3205static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3206{
3207 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3208 int i;
c7d4b2fa 3209
eb06ed8f
TI		 3210 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3211 hda_nid_t pin;
3212 pin = spec->autocfg.hp_pins[i];
3213 if (pin) /* connect to front */
3214 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3215 }
3216 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3217 hda_nid_t pin;
3218 pin = spec->autocfg.speaker_pins[i];
3219 if (pin) /* connect to front */
3220 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3221 }
c7d4b2fa
M		 3222}
3223
3cc08dc6 3224static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3225{
3226 struct sigmatel_spec *spec = codec->spec;
3227 int err;
bcecd9bd 3228 int hp_speaker_swap = 0;
c7d4b2fa 3229
8b65727b
MP		 3230 if ((err = snd_hda_parse_pin_def_config(codec,
3231 &spec->autocfg,
3232 spec->dmic_nids)) < 0)
c7d4b2fa 3233 return err;
82bc955f 3234 if (! spec->autocfg.line_outs)
869264c4 3235 return 0; /* can't find valid pin config */
19039bd0 3236
bcecd9bd
JZ		 3237 /* If we have no real line-out pin and multiple hp-outs, HPs should
3238 * be set up as multi-channel outputs.
3239 */
3240 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3241 spec->autocfg.hp_outs > 1) {
3242 /* Copy hp_outs to line_outs, backup line_outs in
3243 * speaker_outs so that the following routines can handle
3244 * HP pins as primary outputs.
3245 */
3246 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3247 sizeof(spec->autocfg.line_out_pins));
3248 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3249 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3250 sizeof(spec->autocfg.hp_pins));
3251 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3252 hp_speaker_swap = 1;
3253 }
09a99959 3254 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3255 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3256 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3257 u32 caps = query_amp_caps(codec,
3258 spec->autocfg.mono_out_pin, dir);
3259 hda_nid_t conn_list[1];
3260
3261 /* get the mixer node and then the mono mux if it exists */
3262 if (snd_hda_get_connections(codec,
3263 spec->autocfg.mono_out_pin, conn_list, 1) &&
3264 snd_hda_get_connections(codec, conn_list[0],
3265 conn_list, 1)) {
3266
3267 int wcaps = get_wcaps(codec, conn_list[0]);
3268 int wid_type = (wcaps & AC_WCAP_TYPE)
3269 >> AC_WCAP_TYPE_SHIFT;
3270 /* LR swap check, some stac925x have a mux that
3271 * changes the DACs output path instead of the
3272 * mono-mux path.
3273 */
3274 if (wid_type == AC_WID_AUD_SEL &&
3275 !(wcaps & AC_WCAP_LR_SWAP))
3276 spec->mono_nid = conn_list[0];
3277 }
d0513fc6
MR		 3278 if (dir) {
3279 hda_nid_t nid = spec->autocfg.mono_out_pin;
3280
3281 /* most mono outs have a least a mute/unmute switch */
3282 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3283 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3284 "Mono Playback Switch",
3285 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3286 if (err < 0)
3287 return err;
d0513fc6
MR		 3288 /* check for volume support for the amp */
3289 if ((caps & AC_AMPCAP_NUM_STEPS)
3290 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3291 err = stac92xx_add_control(spec,
3292 STAC_CTL_WIDGET_VOL,
3293 "Mono Playback Volume",
3294 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3295 if (err < 0)
3296 return err;
3297 }
09a99959
MR		 3298 }
3299
3300 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3301 AC_PINCTL_OUT_EN);
3302 }
bcecd9bd 3303
403d1944
MP		 3304 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3305 return err;
19039bd0
TI		 3306 if (spec->multiout.num_dacs == 0)
3307 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3308 return err;
c7d4b2fa 3309
0fb87bb4
ML		 3310 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3311
3312 if (err < 0)
3313 return err;
3314
1cd2224c
MR		 3315 /* setup analog beep controls */
3316 if (spec->anabeep_nid > 0) {
3317 err = stac92xx_auto_create_beep_ctls(codec,
3318 spec->anabeep_nid);
3319 if (err < 0)
3320 return err;
3321 }
3322
3323 /* setup digital beep controls and input device */
3324#ifdef CONFIG_SND_HDA_INPUT_BEEP
3325 if (spec->digbeep_nid > 0) {
3326 hda_nid_t nid = spec->digbeep_nid;
3327
3328 err = stac92xx_auto_create_beep_ctls(codec, nid);
3329 if (err < 0)
3330 return err;
3331 err = snd_hda_attach_beep_device(codec, nid);
3332 if (err < 0)
3333 return err;
3334 }
3335#endif
3336
bcecd9bd
JZ		 3337 if (hp_speaker_swap == 1) {
3338 /* Restore the hp_outs and line_outs */
3339 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3340 sizeof(spec->autocfg.line_out_pins));
3341 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3342 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3343 sizeof(spec->autocfg.speaker_pins));
3344 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3345 memset(spec->autocfg.speaker_pins, 0,
3346 sizeof(spec->autocfg.speaker_pins));
3347 spec->autocfg.speaker_outs = 0;
3348 }
3349
0fb87bb4
ML		 3350 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3351
3352 if (err < 0)
3353 return err;
3354
3355 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3356
3357 if (err < 0)
c7d4b2fa
M		 3358 return err;
3359
b22b4821
MR		 3360 if (spec->mono_nid > 0) {
3361 err = stac92xx_auto_create_mono_output_ctls(codec);
3362 if (err < 0)
3363 return err;
3364 }
2a9c7816 3365 if (spec->num_amps > 0) {
89385035
MR		 3366 err = stac92xx_auto_create_amp_output_ctls(codec);
3367 if (err < 0)
3368 return err;
3369 }
2a9c7816 3370 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3371 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3372 &spec->autocfg)) < 0)
3373 return err;
4682eee0
MR		 3374 if (spec->num_muxes > 0) {
3375 err = stac92xx_auto_create_mux_input_ctls(codec);
3376 if (err < 0)
3377 return err;
3378 }
d9737751
MR		 3379 if (spec->num_smuxes > 0) {
3380 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3381 if (err < 0)
3382 return err;
3383 }
8b65727b 3384
c7d4b2fa 3385 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3386 if (spec->multiout.max_channels > 2)
c7d4b2fa 3387 spec->surr_switch = 1;
c7d4b2fa 3388
82bc955f 3389 if (spec->autocfg.dig_out_pin)
3cc08dc6 3390 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3391 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3392 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 3393
3394 if (spec->kctl_alloc)
3395 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3396
3397 spec->input_mux = &spec->private_imux;
2a9c7816 3398 spec->dinput_mux = &spec->private_dimux;
d9737751 3399 spec->sinput_mux = &spec->private_smux;
b22b4821 3400 spec->mono_mux = &spec->private_mono_mux;
89385035 3401 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3402 return 1;
3403}
3404
82bc955f
TI		 3405/* add playback controls for HP output */
3406static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3407 struct auto_pin_cfg *cfg)
3408{
3409 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3410 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3411 unsigned int wid_caps;
3412
3413 if (! pin)
3414 return 0;
3415
3416 wid_caps = get_wcaps(codec, pin);
505cb341 3417 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3418 spec->hp_detect = 1;
82bc955f
TI		 3419
3420 return 0;
3421}
3422
160ea0dc
RF		 3423/* add playback controls for LFE output */
3424static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3425 struct auto_pin_cfg *cfg)
3426{
3427 struct sigmatel_spec *spec = codec->spec;
3428 int err;
3429 hda_nid_t lfe_pin = 0x0;
3430 int i;
3431
3432 /*
3433 * search speaker outs and line outs for a mono speaker pin
3434 * with an amp. If one is found, add LFE controls
3435 * for it.
3436 */
3437 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3438 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3439 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3440 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3441 if (wcaps == AC_WCAP_OUT_AMP)
3442 /* found a mono speaker with an amp, must be lfe */
3443 lfe_pin = pin;
3444 }
3445
3446 /* if speaker_outs is 0, then speakers may be in line_outs */
3447 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3448 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3449 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3450 unsigned int defcfg;
8b551785 3451 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3452 AC_VERB_GET_CONFIG_DEFAULT,
3453 0x00);
8b551785 3454 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3455 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3456 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3457 if (wcaps == AC_WCAP_OUT_AMP)
3458 /* found a mono speaker with an amp,
3459 must be lfe */
3460 lfe_pin = pin;
3461 }
3462 }
3463 }
3464
3465 if (lfe_pin) {
eb06ed8f 3466 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3467 if (err < 0)
3468 return err;
3469 }
3470
3471 return 0;
3472}
3473
c7d4b2fa
M		 3474static int stac9200_parse_auto_config(struct hda_codec *codec)
3475{
3476 struct sigmatel_spec *spec = codec->spec;
3477 int err;
3478
df694daa 3479 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3480 return err;
3481
3482 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3483 return err;
3484
82bc955f
TI		 3485 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3486 return err;
3487
160ea0dc
RF		 3488 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3489 return err;
3490
82bc955f 3491 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3492 spec->multiout.dig_out_nid = 0x05;
82bc955f 3493 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3494 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 3495
3496 if (spec->kctl_alloc)
3497 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3498
3499 spec->input_mux = &spec->private_imux;
8b65727b 3500 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3501
3502 return 1;
3503}
3504
62fe78e9
SR		 3505/*
3506 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3507 * funky external mute control using GPIO pins.
3508 */
3509
76e1ddfb 3510static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3511 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3512{
3513 unsigned int gpiostate, gpiomask, gpiodir;
3514
3515 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3516 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3517 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3518
3519 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3520 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3521 gpiomask |= mask;
62fe78e9
SR		 3522
3523 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3524 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3525 gpiodir |= dir_mask;
62fe78e9 3526
76e1ddfb 3527 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3528 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3529
3530 snd_hda_codec_write(codec, codec->afg, 0,
3531 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3532 snd_hda_codec_read(codec, codec->afg, 0,
3533 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3534
3535 msleep(1);
3536
76e1ddfb
TI		 3537 snd_hda_codec_read(codec, codec->afg, 0,
3538 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3539}
3540
314634bc
TI		 3541static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3542 unsigned int event)
3543{
3544 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3545 snd_hda_codec_write_cache(codec, nid, 0,
3546 AC_VERB_SET_UNSOLICITED_ENABLE,
3547 (AC_USRSP_EN | event));
314634bc
TI		 3548}
3549
a64135a2
MR		 3550static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3551{
3552 int i;
3553 for (i = 0; i < cfg->hp_outs; i++)
3554 if (cfg->hp_pins[i] == nid)
3555 return 1; /* nid is a HP-Out */
3556
3557 return 0; /* nid is not a HP-Out */
3558};
3559
b76c850f
MR		 3560static void stac92xx_power_down(struct hda_codec *codec)
3561{
3562 struct sigmatel_spec *spec = codec->spec;
3563
3564 /* power down inactive DACs */
3565 hda_nid_t *dac;
3566 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3567 if (!is_in_dac_nids(spec, *dac) &&
3568 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3569 snd_hda_codec_write_cache(codec, *dac, 0,
3570 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3571}
3572
c7d4b2fa
M		 3573static int stac92xx_init(struct hda_codec *codec)
3574{
3575 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3576 struct auto_pin_cfg *cfg = &spec->autocfg;
3577 int i;
c7d4b2fa 3578
c7d4b2fa
M		 3579 snd_hda_sequence_write(codec, spec->init);
3580
8daaaa97
MR		 3581 /* power down adcs initially */
3582 if (spec->powerdown_adcs)
3583 for (i = 0; i < spec->num_adcs; i++)
3584 snd_hda_codec_write_cache(codec,
3585 spec->adc_nids[i], 0,
3586 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
82bc955f
TI		 3587 /* set up pins */
3588 if (spec->hp_detect) {
505cb341 3589 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3590 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3591 enable_pin_detect(codec, cfg->hp_pins[i],
3592 STAC_HP_EVENT);
0a07acaf
TI		 3593 /* force to enable the first line-out; the others are set up
3594 * in unsol_event
3595 */
3596 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3597 AC_PINCTL_OUT_EN);
eb995a8c 3598 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3599 /* fake event to set up pins */
3600 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3601 } else {
3602 stac92xx_auto_init_multi_out(codec);
3603 stac92xx_auto_init_hp_out(codec);
3604 }
3605 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3606 hda_nid_t nid = cfg->input_pins[i];
3607 if (nid) {
3608 unsigned int pinctl = AC_PINCTL_IN_EN;
3609 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3610 pinctl |= stac92xx_get_vref(codec, nid);
3611 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3612 }
82bc955f 3613 }
a64135a2
MR		 3614 for (i = 0; i < spec->num_dmics; i++)
3615 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3616 AC_PINCTL_IN_EN);
3617 for (i = 0; i < spec->num_pwrs; i++) {
3618 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3619 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3620 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3621 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3622 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3623 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3624 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3625 /* outputs are only ports capable of power management
3626 * any attempts on powering down a input port cause the
3627 * referenced VREF to act quirky.
3628 */
3629 if (pinctl & AC_PINCTL_IN_EN)
3630 continue;
aafc4412
MR		 3631 /* skip any ports that don't have jacks since presence
3632 * detection is useless */
3633 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3634 continue;
a64135a2
MR		 3635 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3636 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3637 }
b76c850f
MR		 3638 if (spec->dac_list)
3639 stac92xx_power_down(codec);
82bc955f
TI		 3640 if (cfg->dig_out_pin)
3641 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3642 AC_PINCTL_OUT_EN);
3643 if (cfg->dig_in_pin)
3644 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3645 AC_PINCTL_IN_EN);
3646
4fe5195c
MR		 3647 stac_gpio_set(codec, spec->gpio_mask,
3648 spec->gpio_dir, spec->gpio_data);
62fe78e9 3649
c7d4b2fa
M		 3650 return 0;
3651}
3652
2f2f4251
M		 3653static void stac92xx_free(struct hda_codec *codec)
3654{
c7d4b2fa
M		 3655 struct sigmatel_spec *spec = codec->spec;
3656 int i;
3657
3658 if (! spec)
3659 return;
3660
3661 if (spec->kctl_alloc) {
3662 for (i = 0; i < spec->num_kctl_used; i++)
3663 kfree(spec->kctl_alloc[i].name);
3664 kfree(spec->kctl_alloc);
3665 }
3666
11b44bbd
RF		 3667 if (spec->bios_pin_configs)
3668 kfree(spec->bios_pin_configs);
3669
c7d4b2fa 3670 kfree(spec);
1cd2224c 3671 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3672}
3673
4e55096e
M		 3674static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3675 unsigned int flag)
3676{
3677 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3678 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3679
f9acba43
TI		 3680 if (pin_ctl & AC_PINCTL_IN_EN) {
3681 /*
3682 * we need to check the current set-up direction of
3683 * shared input pins since they can be switched via
3684 * "xxx as Output" mixer switch
3685 */
3686 struct sigmatel_spec *spec = codec->spec;
3687 struct auto_pin_cfg *cfg = &spec->autocfg;
3688 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3689 spec->line_switch) ||
3690 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3691 spec->mic_switch))
3692 return;
3693 }
3694
7b043899
SL		 3695 /* if setting pin direction bits, clear the current
3696 direction bits first */
3697 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3698 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3699
82beb8fd 3700 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3701 AC_VERB_SET_PIN_WIDGET_CONTROL,
3702 pin_ctl | flag);
3703}
3704
3705static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3706 unsigned int flag)
3707{
3708 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3709 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3710 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3711 AC_VERB_SET_PIN_WIDGET_CONTROL,
3712 pin_ctl & ~flag);
3713}
3714
40c1d308 3715static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3716{
3717 if (!nid)
3718 return 0;
3719 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3720 & (1 << 31)) {
3721 unsigned int pinctl;
3722 pinctl = snd_hda_codec_read(codec, nid, 0,
3723 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3724 if (pinctl & AC_PINCTL_IN_EN)
3725 return 0; /* mic- or line-input */
3726 else
3727 return 1; /* HP-output */
3728 }
314634bc
TI		 3729 return 0;
3730}
3731
3732static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3733{
3734 struct sigmatel_spec *spec = codec->spec;
3735 struct auto_pin_cfg *cfg = &spec->autocfg;
7c2ba97b 3736 int nid = cfg->hp_pins[cfg->hp_outs - 1];
4e55096e
M		 3737 int i, presence;
3738
eb06ed8f 3739 presence = 0;
4fe5195c
MR		 3740 if (spec->gpio_mute)
3741 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3742 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3743
eb06ed8f 3744 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3745 if (presence)
3746 break;
7c2ba97b
MR		 3747 if (spec->hp_switch && cfg->hp_pins[i] == nid)
3748 break;
4fe5195c 3749 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3750 }
4e55096e
M		 3751
3752 if (presence) {
3753 /* disable lineouts, enable hp */
7c2ba97b
MR		 3754 if (spec->hp_switch)
3755 stac92xx_reset_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3756 for (i = 0; i < cfg->line_outs; i++)
3757 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3758 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3759 for (i = 0; i < cfg->speaker_outs; i++)
3760 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3761 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3762 if (spec->eapd_mask)
3763 stac_gpio_set(codec, spec->gpio_mask,
3764 spec->gpio_dir, spec->gpio_data &
3765 ~spec->eapd_mask);
4e55096e
M		 3766 } else {
3767 /* enable lineouts, disable hp */
7c2ba97b
MR		 3768 if (spec->hp_switch)
3769 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3770 for (i = 0; i < cfg->line_outs; i++)
3771 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3772 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3773 for (i = 0; i < cfg->speaker_outs; i++)
3774 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3775 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3776 if (spec->eapd_mask)
3777 stac_gpio_set(codec, spec->gpio_mask,
3778 spec->gpio_dir, spec->gpio_data |
3779 spec->eapd_mask);
4e55096e 3780 }
7c2ba97b
MR		 3781 if (!spec->hp_switch && cfg->hp_outs > 1 && presence)
3782 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3783}
3784
a64135a2
MR		 3785static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3786{
3787 struct sigmatel_spec *spec = codec->spec;
3788 hda_nid_t nid = spec->pwr_nids[idx];
3789 int presence, val;
3790 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3791 & 0x000000ff;
3792 presence = get_hp_pin_presence(codec, nid);
d0513fc6
MR		 3793
3794 /* several codecs have two power down bits */
3795 if (spec->pwr_mapping)
3796 idx = spec->pwr_mapping[idx];
3797 else
3798 idx = 1 << idx;
a64135a2
MR		 3799
3800 if (presence)
3801 val &= ~idx;
3802 else
3803 val |= idx;
3804
3805 /* power down unused output ports */
3806 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3807};
3808
314634bc
TI		 3809static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3810{
a64135a2
MR		 3811 struct sigmatel_spec *spec = codec->spec;
3812 int idx = res >> 26 & 0x0f;
3813
3814 switch ((res >> 26) & 0x30) {
314634bc
TI		 3815 case STAC_HP_EVENT:
3816 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3817 /* fallthru */
3818 case STAC_PWR_EVENT:
3819 if (spec->num_pwrs > 0)
3820 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3821 }
3822}
3823
cb53c626 3824#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3825static int stac92xx_resume(struct hda_codec *codec)
3826{
dc81bed1
TI		 3827 struct sigmatel_spec *spec = codec->spec;
3828
11b44bbd 3829 stac92xx_set_config_regs(codec);
dc81bed1 3830 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3831 stac_gpio_set(codec, spec->gpio_mask,
3832 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3833 snd_hda_codec_resume_amp(codec);
3834 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3835 /* power down inactive DACs */
3836 if (spec->dac_list)
3837 stac92xx_power_down(codec);
dc81bed1
TI		 3838 /* invoke unsolicited event to reset the HP state */
3839 if (spec->hp_detect)
3840 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3841 return 0;
3842}
3843#endif
3844
2f2f4251
M		 3845static struct hda_codec_ops stac92xx_patch_ops = {
3846 .build_controls = stac92xx_build_controls,
3847 .build_pcms = stac92xx_build_pcms,
3848 .init = stac92xx_init,
3849 .free = stac92xx_free,
4e55096e 3850 .unsol_event = stac92xx_unsol_event,
cb53c626 3851#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3852 .resume = stac92xx_resume,
3853#endif
2f2f4251
M		 3854};
3855
3856static int patch_stac9200(struct hda_codec *codec)
3857{
3858 struct sigmatel_spec *spec;
c7d4b2fa 3859 int err;
2f2f4251 3860
e560d8d8 3861 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3862 if (spec == NULL)
3863 return -ENOMEM;
3864
3865 codec->spec = spec;
a4eed138 3866 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3867 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3868 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3869 stac9200_models,
3870 stac9200_cfg_tbl);
11b44bbd
RF		 3871 if (spec->board_config < 0) {
3872 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3873 err = stac92xx_save_bios_config_regs(codec);
3874 if (err < 0) {
3875 stac92xx_free(codec);
3876 return err;
3877 }
3878 spec->pin_configs = spec->bios_pin_configs;
3879 } else {
403d1944
MP		 3880 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3881 stac92xx_set_config_regs(codec);
3882 }
2f2f4251
M		 3883
3884 spec->multiout.max_channels = 2;
3885 spec->multiout.num_dacs = 1;
3886 spec->multiout.dac_nids = stac9200_dac_nids;
3887 spec->adc_nids = stac9200_adc_nids;
3888 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3889 spec->num_muxes = 1;
8b65727b 3890 spec->num_dmics = 0;
9e05b7a3 3891 spec->num_adcs = 1;
a64135a2 3892 spec->num_pwrs = 0;
c7d4b2fa 3893
bf277785
TD		 3894 if (spec->board_config == STAC_9200_GATEWAY ||
3895 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3896 spec->init = stac9200_eapd_init;
3897 else
3898 spec->init = stac9200_core_init;
2f2f4251 3899 spec->mixer = stac9200_mixer;
c7d4b2fa 3900
117f257d
TI		 3901 if (spec->board_config == STAC_9200_PANASONIC) {
3902 spec->gpio_mask = spec->gpio_dir = 0x09;
3903 spec->gpio_data = 0x00;
3904 }
3905
c7d4b2fa
M		 3906 err = stac9200_parse_auto_config(codec);
3907 if (err < 0) {
3908 stac92xx_free(codec);
3909 return err;
3910 }
2f2f4251
M		 3911
3912 codec->patch_ops = stac92xx_patch_ops;
3913
3914 return 0;
3915}
3916
8e21c34c
TD		 3917static int patch_stac925x(struct hda_codec *codec)
3918{
3919 struct sigmatel_spec *spec;
3920 int err;
3921
3922 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3923 if (spec == NULL)
3924 return -ENOMEM;
3925
3926 codec->spec = spec;
a4eed138 3927 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3928 spec->pin_nids = stac925x_pin_nids;
3929 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3930 stac925x_models,
3931 stac925x_cfg_tbl);
9e507abd 3932 again:
8e21c34c 3933 if (spec->board_config < 0) {
2c11f955
TD		 3934 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3935 "using BIOS defaults\n");
8e21c34c
TD		 3936 err = stac92xx_save_bios_config_regs(codec);
3937 if (err < 0) {
3938 stac92xx_free(codec);
3939 return err;
3940 }
3941 spec->pin_configs = spec->bios_pin_configs;
3942 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3943 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3944 stac92xx_set_config_regs(codec);
3945 }
3946
3947 spec->multiout.max_channels = 2;
3948 spec->multiout.num_dacs = 1;
3949 spec->multiout.dac_nids = stac925x_dac_nids;
3950 spec->adc_nids = stac925x_adc_nids;
3951 spec->mux_nids = stac925x_mux_nids;
3952 spec->num_muxes = 1;
9e05b7a3 3953 spec->num_adcs = 1;
a64135a2 3954 spec->num_pwrs = 0;
2c11f955
TD		 3955 switch (codec->vendor_id) {
3956 case 0x83847632: /* STAC9202 */
3957 case 0x83847633: /* STAC9202D */
3958 case 0x83847636: /* STAC9251 */
3959 case 0x83847637: /* STAC9251D */
f6e9852a 3960 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3961 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3962 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3963 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3964 break;
3965 default:
3966 spec->num_dmics = 0;
3967 break;
3968 }
8e21c34c
TD		 3969
3970 spec->init = stac925x_core_init;
3971 spec->mixer = stac925x_mixer;
3972
3973 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3974 if (!err) {
3975 if (spec->board_config < 0) {
3976 printk(KERN_WARNING "hda_codec: No auto-config is "
3977 "available, default to model=ref\n");
3978 spec->board_config = STAC_925x_REF;
3979 goto again;
3980 }
3981 err = -EINVAL;
3982 }
8e21c34c
TD		 3983 if (err < 0) {
3984 stac92xx_free(codec);
3985 return err;
3986 }
3987
3988 codec->patch_ops = stac92xx_patch_ops;
3989
3990 return 0;
3991}
3992
e1f0d669
MR		 3993static struct hda_input_mux stac92hd73xx_dmux = {
3994 .num_items = 4,
3995 .items = {
3996 { "Analog Inputs", 0x0b },
e1f0d669
MR		 3997 { "Digital Mic 1", 0x09 },
3998 { "Digital Mic 2", 0x0a },
2a9c7816 3999 { "CD", 0x08 },
e1f0d669
MR		 4000 }
4001};
4002
4003static int patch_stac92hd73xx(struct hda_codec *codec)
4004{
4005 struct sigmatel_spec *spec;
4006 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4007 int err = 0;
4008
4009 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4010 if (spec == NULL)
4011 return -ENOMEM;
4012
4013 codec->spec = spec;
e99d32b3 4014 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4015 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4016 spec->pin_nids = stac92hd73xx_pin_nids;
4017 spec->board_config = snd_hda_check_board_config(codec,
4018 STAC_92HD73XX_MODELS,
4019 stac92hd73xx_models,
4020 stac92hd73xx_cfg_tbl);
4021again:
4022 if (spec->board_config < 0) {
4023 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4024 " STAC92HD73XX, using BIOS defaults\n");
4025 err = stac92xx_save_bios_config_regs(codec);
4026 if (err < 0) {
4027 stac92xx_free(codec);
4028 return err;
4029 }
4030 spec->pin_configs = spec->bios_pin_configs;
4031 } else {
4032 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
4033 stac92xx_set_config_regs(codec);
4034 }
4035
4036 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4037 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4038
4039 if (spec->multiout.num_dacs < 0) {
4040 printk(KERN_WARNING "hda_codec: Could not determine "
4041 "number of channels defaulting to DAC count\n");
4042 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4043 }
4044
4045 switch (spec->multiout.num_dacs) {
4046 case 0x3: /* 6 Channel */
4047 spec->mixer = stac92hd73xx_6ch_mixer;
4048 spec->init = stac92hd73xx_6ch_core_init;
4049 break;
4050 case 0x4: /* 8 Channel */
e1f0d669
MR		 4051 spec->mixer = stac92hd73xx_8ch_mixer;
4052 spec->init = stac92hd73xx_8ch_core_init;
4053 break;
4054 case 0x5: /* 10 Channel */
e1f0d669
MR		 4055 spec->mixer = stac92hd73xx_10ch_mixer;
4056 spec->init = stac92hd73xx_10ch_core_init;
4057 };
4058
4059 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4060 spec->aloopback_mask = 0x01;
4061 spec->aloopback_shift = 8;
4062
1cd2224c 4063 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4064 spec->mux_nids = stac92hd73xx_mux_nids;
4065 spec->adc_nids = stac92hd73xx_adc_nids;
4066 spec->dmic_nids = stac92hd73xx_dmic_nids;
4067 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4068 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4069 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4070 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4071
4072 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4073 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4074 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4075 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4076 sizeof(stac92hd73xx_dmux));
4077
e1f0d669 4078 /* GPIO0 High = Enable EAPD */
0fc9dec4 4079 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4080 spec->gpio_data = 0x01;
e1f0d669 4081
a7662640
MR		 4082 switch (spec->board_config) {
4083 case STAC_DELL_M6:
d654a660 4084 spec->init = dell_eq_core_init;
2a9c7816
MR		 4085 spec->num_smuxes = 0;
4086 spec->multiout.hp_nid =
4087 spec->multiout.dac_nids[spec->multiout.num_dacs - 1];
4088 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4089 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
4090 spec->num_amps = 1;
a7662640
MR		 4091 switch (codec->subsystem_id) {
4092 case 0x1028025e: /* Analog Mics */
4093 case 0x1028025f:
4094 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4095 spec->num_dmics = 0;
2a9c7816 4096 spec->private_dimux.num_items = 1;
a7662640 4097 break;
d654a660 4098 case 0x10280271: /* Digital Mics */
a7662640 4099 case 0x10280272:
d654a660
MR		 4100 spec->init = dell_m6_core_init;
4101 /* fall-through */
4102 case 0x10280254:
4103 case 0x10280255:
a7662640
MR		 4104 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4105 spec->num_dmics = 1;
2a9c7816 4106 spec->private_dimux.num_items = 2;
a7662640
MR		 4107 break;
4108 case 0x10280256: /* Both */
4109 case 0x10280057:
4110 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4111 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4112 spec->num_dmics = 1;
2a9c7816 4113 spec->private_dimux.num_items = 2;
a7662640
MR		 4114 break;
4115 }
4116 break;
4117 default:
4118 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4119 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
a7662640 4120 }
2a9c7816 4121 spec->dinput_mux = &spec->private_dimux;
a7662640 4122
a64135a2
MR		 4123 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4124 spec->pwr_nids = stac92hd73xx_pwr_nids;
4125
d9737751 4126 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4127
4128 if (!err) {
4129 if (spec->board_config < 0) {
4130 printk(KERN_WARNING "hda_codec: No auto-config is "
4131 "available, default to model=ref\n");
4132 spec->board_config = STAC_92HD73XX_REF;
4133 goto again;
4134 }
4135 err = -EINVAL;
4136 }
4137
4138 if (err < 0) {
4139 stac92xx_free(codec);
4140 return err;
4141 }
4142
4143 codec->patch_ops = stac92xx_patch_ops;
4144
4145 return 0;
4146}
4147
d0513fc6
MR		 4148static struct hda_input_mux stac92hd83xxx_dmux = {
4149 .num_items = 3,
4150 .items = {
4151 { "Analog Inputs", 0x03 },
4152 { "Digital Mic 1", 0x04 },
4153 { "Digital Mic 2", 0x05 },
4154 }
4155};
4156
4157static int patch_stac92hd83xxx(struct hda_codec *codec)
4158{
4159 struct sigmatel_spec *spec;
4160 int err;
4161
4162 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4163 if (spec == NULL)
4164 return -ENOMEM;
4165
4166 codec->spec = spec;
0ffa9807 4167 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4168 spec->mono_nid = 0x19;
4169 spec->digbeep_nid = 0x21;
4170 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4171 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4172 spec->adc_nids = stac92hd83xxx_adc_nids;
4173 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4174 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4175 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4176 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4177
4178 spec->init = stac92hd83xxx_core_init;
4179 switch (codec->vendor_id) {
4180 case 0x111d7605:
4181 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4182 break;
4183 default:
4184 spec->num_pwrs--;
4185 spec->init++; /* switch to config #2 */
4186 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4187 }
4188
4189 spec->mixer = stac92hd83xxx_mixer;
4190 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4191 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4192 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4193 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4194 spec->dinput_mux = &stac92hd83xxx_dmux;
4195 spec->pin_nids = stac92hd83xxx_pin_nids;
4196 spec->board_config = snd_hda_check_board_config(codec,
4197 STAC_92HD83XXX_MODELS,
4198 stac92hd83xxx_models,
4199 stac92hd83xxx_cfg_tbl);
4200again:
4201 if (spec->board_config < 0) {
4202 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4203 " STAC92HD83XXX, using BIOS defaults\n");
4204 err = stac92xx_save_bios_config_regs(codec);
4205 if (err < 0) {
4206 stac92xx_free(codec);
4207 return err;
4208 }
4209 spec->pin_configs = spec->bios_pin_configs;
4210 } else {
4211 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
4212 stac92xx_set_config_regs(codec);
4213 }
4214
4215 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4216 if (!err) {
4217 if (spec->board_config < 0) {
4218 printk(KERN_WARNING "hda_codec: No auto-config is "
4219 "available, default to model=ref\n");
4220 spec->board_config = STAC_92HD83XXX_REF;
4221 goto again;
4222 }
4223 err = -EINVAL;
4224 }
4225
4226 if (err < 0) {
4227 stac92xx_free(codec);
4228 return err;
4229 }
4230
4231 codec->patch_ops = stac92xx_patch_ops;
4232
4233 return 0;
4234}
4235
8daaaa97
MR		 4236#ifdef SND_HDA_NEEDS_RESUME
4237static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4238{
4239 struct sigmatel_spec *spec = codec->spec;
4240 int i;
4241 snd_hda_codec_write_cache(codec, codec->afg, 0,
4242 AC_VERB_SET_POWER_STATE, pwr);
4243
4244 msleep(1);
4245 for (i = 0; i < spec->num_adcs; i++) {
4246 snd_hda_codec_write_cache(codec,
4247 spec->adc_nids[i], 0,
4248 AC_VERB_SET_POWER_STATE, pwr);
4249 }
4250};
4251
4252static int stac92hd71xx_resume(struct hda_codec *codec)
4253{
4254 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4255 return stac92xx_resume(codec);
4256}
4257
4258static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4259{
4260 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
4261 return 0;
4262};
4263
4264#endif
4265
4266static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4267 .build_controls = stac92xx_build_controls,
4268 .build_pcms = stac92xx_build_pcms,
4269 .init = stac92xx_init,
4270 .free = stac92xx_free,
4271 .unsol_event = stac92xx_unsol_event,
4272#ifdef SND_HDA_NEEDS_RESUME
4273 .resume = stac92hd71xx_resume,
4274 .suspend = stac92hd71xx_suspend,
4275#endif
4276};
d0513fc6 4277
e035b841
MR		 4278static int patch_stac92hd71bxx(struct hda_codec *codec)
4279{
4280 struct sigmatel_spec *spec;
4281 int err = 0;
4282
4283 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4284 if (spec == NULL)
4285 return -ENOMEM;
4286
4287 codec->spec = spec;
8daaaa97 4288 codec->patch_ops = stac92xx_patch_ops;
e035b841 4289 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4290 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 4291 spec->pin_nids = stac92hd71bxx_pin_nids;
4292 spec->board_config = snd_hda_check_board_config(codec,
4293 STAC_92HD71BXX_MODELS,
4294 stac92hd71bxx_models,
4295 stac92hd71bxx_cfg_tbl);
4296again:
4297 if (spec->board_config < 0) {
4298 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4299 " STAC92HD71BXX, using BIOS defaults\n");
4300 err = stac92xx_save_bios_config_regs(codec);
4301 if (err < 0) {
4302 stac92xx_free(codec);
4303 return err;
4304 }
4305 spec->pin_configs = spec->bios_pin_configs;
4306 } else {
4307 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
4308 stac92xx_set_config_regs(codec);
4309 }
4310
541eee87
MR		 4311 switch (codec->vendor_id) {
4312 case 0x111d76b6: /* 4 Port without Analog Mixer */
4313 case 0x111d76b7:
4314 case 0x111d76b4: /* 6 Port without Analog Mixer */
4315 case 0x111d76b5:
4316 spec->mixer = stac92hd71bxx_mixer;
4317 spec->init = stac92hd71bxx_core_init;
0ffa9807 4318 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4319 break;
aafc4412 4320 case 0x111d7608: /* 5 Port with Analog Mixer */
8daaaa97
MR		 4321 if ((codec->revision_id & 0xf) == 0 ||
4322 (codec->revision_id & 0xf) == 1) {
4323#ifdef SND_HDA_NEEDS_RESUME
4324 codec->patch_ops = stac92hd71bxx_patch_ops;
4325#endif
4326 spec->stream_delay = 40; /* 40 milliseconds */
4327 }
4328
aafc4412
MR		 4329 /* no output amps */
4330 spec->num_pwrs = 0;
4331 spec->mixer = stac92hd71bxx_analog_mixer;
4332
4333 /* disable VSW */
4334 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
4335 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
4336 break;
4337 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4338 if ((codec->revision_id & 0xf) == 1) {
4339#ifdef SND_HDA_NEEDS_RESUME
4340 codec->patch_ops = stac92hd71bxx_patch_ops;
4341#endif
4342 spec->stream_delay = 40; /* 40 milliseconds */
4343 }
4344
aafc4412
MR		 4345 /* no output amps */
4346 spec->num_pwrs = 0;
4347 /* fallthru */
541eee87
MR		 4348 default:
4349 spec->mixer = stac92hd71bxx_analog_mixer;
4350 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4351 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4352 }
4353
4354 spec->aloopback_mask = 0x20;
4355 spec->aloopback_shift = 0;
4356
4fe5195c 4357 /* GPIO0 High = EAPD */
0fc9dec4
MR		 4358 spec->gpio_mask = 0x01;
4359 spec->gpio_dir = 0x01;
0fc9dec4 4360 spec->gpio_data = 0x01;
e035b841 4361
8daaaa97 4362 spec->powerdown_adcs = 1;
1cd2224c 4363 spec->digbeep_nid = 0x26;
e035b841
MR		 4364 spec->mux_nids = stac92hd71bxx_mux_nids;
4365 spec->adc_nids = stac92hd71bxx_adc_nids;
4366 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4367 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4368 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4369 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4370
4371 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4372 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
1697055e 4373 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 4374
6a14f585
MR		 4375 switch (spec->board_config) {
4376 case STAC_HP_M4:
4377 spec->num_dmics = 0;
4378 spec->num_smuxes = 1;
4379 spec->num_dmuxes = 0;
4380
4381 /* enable internal microphone */
4382 snd_hda_codec_write_cache(codec, 0x0e, 0,
4383 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80);
4384 break;
4385 default:
4386 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4387 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4388 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4389 };
4390
aea7bb0a 4391 spec->multiout.num_dacs = 1;
e035b841
MR		 4392 spec->multiout.hp_nid = 0x11;
4393 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4394
4395 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4396 if (!err) {
4397 if (spec->board_config < 0) {
4398 printk(KERN_WARNING "hda_codec: No auto-config is "
4399 "available, default to model=ref\n");
4400 spec->board_config = STAC_92HD71BXX_REF;
4401 goto again;
4402 }
4403 err = -EINVAL;
4404 }
4405
4406 if (err < 0) {
4407 stac92xx_free(codec);
4408 return err;
4409 }
4410
e035b841
MR		 4411 return 0;
4412};
4413
2f2f4251
M		 4414static int patch_stac922x(struct hda_codec *codec)
4415{
4416 struct sigmatel_spec *spec;
c7d4b2fa 4417 int err;
2f2f4251 4418
e560d8d8 4419 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4420 if (spec == NULL)
4421 return -ENOMEM;
4422
4423 codec->spec = spec;
a4eed138 4424 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4425 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4426 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4427 stac922x_models,
4428 stac922x_cfg_tbl);
536319af 4429 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4430 spec->gpio_mask = spec->gpio_dir = 0x03;
4431 spec->gpio_data = 0x03;
3fc24d85
TI		 4432 /* Intel Macs have all same PCI SSID, so we need to check
4433 * codec SSID to distinguish the exact models
4434 */
6f0778d8 4435 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4436 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4437
4438 case 0x106b0800:
4439 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4440 break;
5d5d3bc3
IZ		 4441 case 0x106b0600:
4442 case 0x106b0700:
4443 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4444 break;
5d5d3bc3
IZ		 4445 case 0x106b0e00:
4446 case 0x106b0f00:
4447 case 0x106b1600:
4448 case 0x106b1700:
4449 case 0x106b0200:
4450 case 0x106b1e00:
4451 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4452 break;
5d5d3bc3
IZ		 4453 case 0x106b1a00:
4454 case 0x00000100:
4455 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4456 break;
5d5d3bc3
IZ		 4457 case 0x106b0a00:
4458 case 0x106b2200:
4459 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4460 break;
536319af
NB		 4461 default:
4462 spec->board_config = STAC_INTEL_MAC_V3;
4463 break;
3fc24d85
TI		 4464 }
4465 }
4466
9e507abd 4467 again:
11b44bbd
RF		 4468 if (spec->board_config < 0) {
4469 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4470 "using BIOS defaults\n");
4471 err = stac92xx_save_bios_config_regs(codec);
4472 if (err < 0) {
4473 stac92xx_free(codec);
4474 return err;
4475 }
4476 spec->pin_configs = spec->bios_pin_configs;
4477 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4478 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4479 stac92xx_set_config_regs(codec);
4480 }
2f2f4251 4481
c7d4b2fa
M		 4482 spec->adc_nids = stac922x_adc_nids;
4483 spec->mux_nids = stac922x_mux_nids;
2549413e 4484 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4485 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4486 spec->num_dmics = 0;
a64135a2 4487 spec->num_pwrs = 0;
c7d4b2fa
M		 4488
4489 spec->init = stac922x_core_init;
2f2f4251 4490 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4491
4492 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4493
3cc08dc6 4494 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4495 if (!err) {
4496 if (spec->board_config < 0) {
4497 printk(KERN_WARNING "hda_codec: No auto-config is "
4498 "available, default to model=ref\n");
4499 spec->board_config = STAC_D945_REF;
4500 goto again;
4501 }
4502 err = -EINVAL;
4503 }
3cc08dc6
MP		 4504 if (err < 0) {
4505 stac92xx_free(codec);
4506 return err;
4507 }
4508
4509 codec->patch_ops = stac92xx_patch_ops;
4510
807a4636
TI		 4511 /* Fix Mux capture level; max to 2 */
4512 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4513 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4514 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4515 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4516 (0 << AC_AMPCAP_MUTE_SHIFT));
4517
3cc08dc6
MP		 4518 return 0;
4519}
4520
4521static int patch_stac927x(struct hda_codec *codec)
4522{
4523 struct sigmatel_spec *spec;
4524 int err;
4525
4526 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4527 if (spec == NULL)
4528 return -ENOMEM;
4529
4530 codec->spec = spec;
a4eed138 4531 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4532 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4533 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4534 stac927x_models,
4535 stac927x_cfg_tbl);
9e507abd 4536 again:
8e9068b1
MR		 4537 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4538 if (spec->board_config < 0)
4539 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4540 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4541 err = stac92xx_save_bios_config_regs(codec);
4542 if (err < 0) {
4543 stac92xx_free(codec);
4544 return err;
4545 }
4546 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4547 } else {
3cc08dc6
MP		 4548 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4549 stac92xx_set_config_regs(codec);
4550 }
4551
1cd2224c 4552 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4553 spec->adc_nids = stac927x_adc_nids;
4554 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4555 spec->mux_nids = stac927x_mux_nids;
4556 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4557 spec->smux_nids = stac927x_smux_nids;
4558 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 4559 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 4560 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4561 spec->multiout.dac_nids = spec->dac_nids;
4562
81d3dbde 4563 switch (spec->board_config) {
93ed1503 4564 case STAC_D965_3ST:
93ed1503 4565 case STAC_D965_5ST:
8e9068b1 4566 /* GPIO0 High = Enable EAPD */
0fc9dec4 4567 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4568 spec->gpio_data = 0x01;
8e9068b1
MR		 4569 spec->num_dmics = 0;
4570
93ed1503 4571 spec->init = d965_core_init;
9e05b7a3 4572 spec->mixer = stac927x_mixer;
81d3dbde 4573 break;
8e9068b1 4574 case STAC_DELL_BIOS:
780c8be4
MR		 4575 switch (codec->subsystem_id) {
4576 case 0x10280209:
4577 case 0x1028022e:
4578 /* correct the device field to SPDIF out */
4579 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4580 break;
4581 };
03d7ca17
MR		 4582 /* configure the analog microphone on some laptops */
4583 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4584 /* correct the front output jack as a hp out */
7989fba9 4585 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4586 /* correct the front input jack as a mic */
4587 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4588 /* fallthru */
8e9068b1
MR		 4589 case STAC_DELL_3ST:
4590 /* GPIO2 High = Enable EAPD */
0fc9dec4 4591 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4592 spec->gpio_data = 0x04;
7f16859a
MR		 4593 spec->dmic_nids = stac927x_dmic_nids;
4594 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4595
8e9068b1
MR		 4596 spec->init = d965_core_init;
4597 spec->mixer = stac927x_mixer;
4598 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4599 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4600 break;
4601 default:
f1f208d0 4602 /* GPIO0 High = Enable EAPD */
0fc9dec4 4603 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4604 spec->gpio_data = 0x01;
8e9068b1
MR		 4605 spec->num_dmics = 0;
4606
4607 spec->init = stac927x_core_init;
4608 spec->mixer = stac927x_mixer;
7f16859a
MR		 4609 }
4610
a64135a2 4611 spec->num_pwrs = 0;
e1f0d669
MR		 4612 spec->aloopback_mask = 0x40;
4613 spec->aloopback_shift = 0;
8e9068b1 4614
3cc08dc6 4615 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4616 if (!err) {
4617 if (spec->board_config < 0) {
4618 printk(KERN_WARNING "hda_codec: No auto-config is "
4619 "available, default to model=ref\n");
4620 spec->board_config = STAC_D965_REF;
4621 goto again;
4622 }
4623 err = -EINVAL;
4624 }
c7d4b2fa
M		 4625 if (err < 0) {
4626 stac92xx_free(codec);
4627 return err;
4628 }
2f2f4251
M		 4629
4630 codec->patch_ops = stac92xx_patch_ops;
4631
52987656
TI		 4632 /*
4633 * !!FIXME!!
4634 * The STAC927x seem to require fairly long delays for certain
4635 * command sequences. With too short delays (even if the answer
4636 * is set to RIRB properly), it results in the silence output
4637 * on some hardwares like Dell.
4638 *
4639 * The below flag enables the longer delay (see get_response
4640 * in hda_intel.c).
4641 */
4642 codec->bus->needs_damn_long_delay = 1;
4643
2f2f4251
M		 4644 return 0;
4645}
4646
f3302a59
MP		 4647static int patch_stac9205(struct hda_codec *codec)
4648{
4649 struct sigmatel_spec *spec;
8259980e 4650 int err;
f3302a59
MP		 4651
4652 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4653 if (spec == NULL)
4654 return -ENOMEM;
4655
4656 codec->spec = spec;
a4eed138 4657 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4658 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4659 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4660 stac9205_models,
4661 stac9205_cfg_tbl);
9e507abd 4662 again:
11b44bbd
RF		 4663 if (spec->board_config < 0) {
4664 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4665 err = stac92xx_save_bios_config_regs(codec);
4666 if (err < 0) {
4667 stac92xx_free(codec);
4668 return err;
4669 }
4670 spec->pin_configs = spec->bios_pin_configs;
4671 } else {
f3302a59
MP		 4672 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4673 stac92xx_set_config_regs(codec);
4674 }
4675
1cd2224c 4676 spec->digbeep_nid = 0x23;
f3302a59 4677 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4678 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4679 spec->mux_nids = stac9205_mux_nids;
2549413e 4680 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 4681 spec->smux_nids = stac9205_smux_nids;
4682 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 4683 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4684 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4685 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4686 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4687 spec->num_pwrs = 0;
f3302a59
MP		 4688
4689 spec->init = stac9205_core_init;
4690 spec->mixer = stac9205_mixer;
4691
e1f0d669
MR		 4692 spec->aloopback_mask = 0x40;
4693 spec->aloopback_shift = 0;
f3302a59 4694 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4695
ae0a8ed8 4696 switch (spec->board_config){
ae0a8ed8 4697 case STAC_9205_DELL_M43:
87d48363
MR		 4698 /* Enable SPDIF in/out */
4699 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4700 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4701
4fe5195c
MR		 4702 /* Enable unsol response for GPIO4/Dock HP connection */
4703 snd_hda_codec_write(codec, codec->afg, 0,
4704 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4705 snd_hda_codec_write_cache(codec, codec->afg, 0,
4706 AC_VERB_SET_UNSOLICITED_ENABLE,
4707 (AC_USRSP_EN | STAC_HP_EVENT));
4708
4709 spec->gpio_dir = 0x0b;
0fc9dec4 4710 spec->eapd_mask = 0x01;
4fe5195c
MR		 4711 spec->gpio_mask = 0x1b;
4712 spec->gpio_mute = 0x10;
e2e7d624 4713 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4714 * GPIO3 Low = DRM
87d48363 4715 */
4fe5195c 4716 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4717 break;
4718 default:
4719 /* GPIO0 High = EAPD */
0fc9dec4 4720 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4721 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4722 break;
4723 }
33382403 4724
f3302a59 4725 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 4726 if (!err) {
4727 if (spec->board_config < 0) {
4728 printk(KERN_WARNING "hda_codec: No auto-config is "
4729 "available, default to model=ref\n");
4730 spec->board_config = STAC_9205_REF;
4731 goto again;
4732 }
4733 err = -EINVAL;
4734 }
f3302a59
MP		 4735 if (err < 0) {
4736 stac92xx_free(codec);
4737 return err;
4738 }
4739
4740 codec->patch_ops = stac92xx_patch_ops;
4741
4742 return 0;
4743}
4744
db064e50 4745/*
6d859065 4746 * STAC9872 hack
db064e50
TI		 4747 */
4748
99ccc560 4749/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 4750static hda_nid_t vaio_dacs[] = { 0x2 };
4751#define VAIO_HP_DAC 0x5
4752static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
4753static hda_nid_t vaio_mux_nids[] = { 0x15 };
4754
4755static struct hda_input_mux vaio_mux = {
a3a2f429 4756 .num_items = 3,
db064e50 4757 .items = {
d773781c 4758 /* { "HP", 0x0 }, */
1624cb9a
TI		 4759 { "Mic Jack", 0x1 },
4760 { "Internal Mic", 0x2 },
db064e50
TI		 4761 { "PCM", 0x3 },
4762 }
4763};
4764
4765static struct hda_verb vaio_init[] = {
4766 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 4767 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 4768 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4769 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4770 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4771 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4772 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 4773 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4774 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4775 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4776 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4777 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4778 {}
4779};
4780
6d859065
GM		 4781static struct hda_verb vaio_ar_init[] = {
4782 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
4783 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4784 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4785 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4786/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
4787 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4788 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4789 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4790 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4791/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
4792 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4793 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4794 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4795 {}
4796};
4797
db064e50 4798/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4799static struct hda_bind_ctls vaio_bind_master_vol = {
4800 .ops = &snd_hda_bind_vol,
4801 .values = {
4802 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4803 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4804 0
4805 },
4806};
db064e50
TI		 4807
4808/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4809static struct hda_bind_ctls vaio_bind_master_sw = {
4810 .ops = &snd_hda_bind_sw,
4811 .values = {
4812 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4813 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4814 0,
4815 },
4816};
db064e50
TI		 4817
4818static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 4819 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4820 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 4821 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4822 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4823 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4824 {
4825 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4826 .name = "Capture Source",
4827 .count = 1,
4828 .info = stac92xx_mux_enum_info,
4829 .get = stac92xx_mux_enum_get,
4830 .put = stac92xx_mux_enum_put,
4831 },
4832 {}
4833};
4834
6d859065 4835static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 4836 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4837 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 4838 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4839 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4840 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4841 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
4842 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
4843 {
4844 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4845 .name = "Capture Source",
4846 .count = 1,
4847 .info = stac92xx_mux_enum_info,
4848 .get = stac92xx_mux_enum_get,
4849 .put = stac92xx_mux_enum_put,
4850 },
4851 {}
4852};
4853
4854static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4855 .build_controls = stac92xx_build_controls,
4856 .build_pcms = stac92xx_build_pcms,
4857 .init = stac92xx_init,
4858 .free = stac92xx_free,
cb53c626 4859#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4860 .resume = stac92xx_resume,
4861#endif
4862};
4863
72e7b0dd
TI		 4864static int stac9872_vaio_init(struct hda_codec *codec)
4865{
4866 int err;
4867
4868 err = stac92xx_init(codec);
4869 if (err < 0)
4870 return err;
4871 if (codec->patch_ops.unsol_event)
4872 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4873 return 0;
4874}
4875
4876static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4877{
40c1d308 4878 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4879 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4880 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4881 } else {
4882 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4883 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4884 }
4885}
4886
4887static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4888{
4889 switch (res >> 26) {
4890 case STAC_HP_EVENT:
4891 stac9872_vaio_hp_detect(codec, res);
4892 break;
4893 }
4894}
4895
4896static struct hda_codec_ops stac9872_vaio_patch_ops = {
4897 .build_controls = stac92xx_build_controls,
4898 .build_pcms = stac92xx_build_pcms,
4899 .init = stac9872_vaio_init,
4900 .free = stac92xx_free,
4901 .unsol_event = stac9872_vaio_unsol_event,
4902#ifdef CONFIG_PM
4903 .resume = stac92xx_resume,
4904#endif
4905};
4906
6d859065
GM		 4907enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4908 CXD9872RD_VAIO,
4909 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
4910 STAC9872AK_VAIO,
4911 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
4912 STAC9872K_VAIO,
4913 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 4914 CXD9872AKD_VAIO,
4915 STAC_9872_MODELS,
4916};
4917
4918static const char *stac9872_models[STAC_9872_MODELS] = {
4919 [CXD9872RD_VAIO] = "vaio",
4920 [CXD9872AKD_VAIO] = "vaio-ar",
4921};
4922
4923static struct snd_pci_quirk stac9872_cfg_tbl[] = {
4924 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
4925 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
4926 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 4927 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 4928 {}
4929};
4930
6d859065 4931static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4932{
4933 struct sigmatel_spec *spec;
4934 int board_config;
4935
f5fcc13c
TI		 4936 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
4937 stac9872_models,
4938 stac9872_cfg_tbl);
db064e50
TI		 4939 if (board_config < 0)
4940 /* unknown config, let generic-parser do its job... */
4941 return snd_hda_parse_generic_codec(codec);
4942
4943 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4944 if (spec == NULL)
4945 return -ENOMEM;
4946
4947 codec->spec = spec;
4948 switch (board_config) {
6d859065
GM		 4949 case CXD9872RD_VAIO:
4950 case STAC9872AK_VAIO:
4951 case STAC9872K_VAIO:
db064e50
TI		 4952 spec->mixer = vaio_mixer;
4953 spec->init = vaio_init;
4954 spec->multiout.max_channels = 2;
4955 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4956 spec->multiout.dac_nids = vaio_dacs;
4957 spec->multiout.hp_nid = VAIO_HP_DAC;
4958 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
4959 spec->adc_nids = vaio_adcs;
a64135a2 4960 spec->num_pwrs = 0;
db064e50
TI		 4961 spec->input_mux = &vaio_mux;
4962 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4963 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 4964 break;
6d859065
GM		 4965
4966 case CXD9872AKD_VAIO:
4967 spec->mixer = vaio_ar_mixer;
4968 spec->init = vaio_ar_init;
4969 spec->multiout.max_channels = 2;
4970 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4971 spec->multiout.dac_nids = vaio_dacs;
4972 spec->multiout.hp_nid = VAIO_HP_DAC;
4973 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 4974 spec->num_pwrs = 0;
6d859065
GM		 4975 spec->adc_nids = vaio_adcs;
4976 spec->input_mux = &vaio_mux;
4977 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4978 codec->patch_ops = stac9872_patch_ops;
6d859065 4979 break;
db064e50
TI		 4980 }
4981
db064e50
TI		 4982 return 0;
4983}
4984
4985
2f2f4251
M		 4986/*
4987 * patch entries
4988 */
4989struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4990 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4991 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4992 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4993 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4994 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4995 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4996 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4997 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4998 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4999 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5000 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5001 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5002 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5003 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5004 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5005 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5006 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5007 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5008 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5009 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5010 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5011 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5012 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5013 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5014 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5015 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5016 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5017 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5018 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5019 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5020 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5021 /* The following does not take into account .id=0x83847661 when subsys =
5022 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5023 * currently not fully supported.
5024 */
5025 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5026 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5027 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5028 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5029 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5030 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5031 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5032 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5033 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5034 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5035 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5036 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5037 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5038 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5039 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5040 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5041 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5042 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5043 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5044 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5045 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5046 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5047 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5048 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5049 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5050 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5051 {} /* terminator */
5052};
Clone of davem's net-next-2.6 tree