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ALSA: hda - Use amp cache for SPDIF mute controls in patch_sigmatel.c
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
3c9a3203 36#include "hda_patch.h"
1cd2224c 37#include "hda_beep.h"
2f2f4251 38
c6e4c666
TI		 39enum {
40 STAC_VREF_EVENT = 1,
41 STAC_INSERT_EVENT,
42 STAC_PWR_EVENT,
43 STAC_HP_EVENT,
44};
4e55096e 45
f5fcc13c
TI		 46enum {
47 STAC_REF,
bf277785 48 STAC_9200_OQO,
dfe495d0
TI		 49 STAC_9200_DELL_D21,
50 STAC_9200_DELL_D22,
51 STAC_9200_DELL_D23,
52 STAC_9200_DELL_M21,
53 STAC_9200_DELL_M22,
54 STAC_9200_DELL_M23,
55 STAC_9200_DELL_M24,
56 STAC_9200_DELL_M25,
57 STAC_9200_DELL_M26,
58 STAC_9200_DELL_M27,
1194b5b7 59 STAC_9200_GATEWAY,
117f257d 60 STAC_9200_PANASONIC,
f5fcc13c
TI		 61 STAC_9200_MODELS
62};
63
64enum {
65 STAC_9205_REF,
dfe495d0 66 STAC_9205_DELL_M42,
ae0a8ed8
TD		 67 STAC_9205_DELL_M43,
68 STAC_9205_DELL_M44,
f5fcc13c
TI		 69 STAC_9205_MODELS
70};
71
e1f0d669
MR		 72enum {
73 STAC_92HD73XX_REF,
661cd8fb
TI		 74 STAC_DELL_M6_AMIC,
75 STAC_DELL_M6_DMIC,
76 STAC_DELL_M6_BOTH,
6b3ab21e 77 STAC_DELL_EQ,
e1f0d669
MR		 78 STAC_92HD73XX_MODELS
79};
80
d0513fc6
MR		 81enum {
82 STAC_92HD83XXX_REF,
83 STAC_92HD83XXX_MODELS
84};
85
e035b841
MR		 86enum {
87 STAC_92HD71BXX_REF,
a7662640
MR		 88 STAC_DELL_M4_1,
89 STAC_DELL_M4_2,
3a7abfd2 90 STAC_DELL_M4_3,
6a14f585 91 STAC_HP_M4,
e035b841
MR		 92 STAC_92HD71BXX_MODELS
93};
94
8e21c34c
TD		 95enum {
96 STAC_925x_REF,
97 STAC_M2_2,
98 STAC_MA6,
2c11f955 99 STAC_PA6,
8e21c34c
TD		 100 STAC_925x_MODELS
101};
102
f5fcc13c
TI		 103enum {
104 STAC_D945_REF,
105 STAC_D945GTP3,
106 STAC_D945GTP5,
5d5d3bc3
IZ		 107 STAC_INTEL_MAC_V1,
108 STAC_INTEL_MAC_V2,
109 STAC_INTEL_MAC_V3,
110 STAC_INTEL_MAC_V4,
111 STAC_INTEL_MAC_V5,
536319af
NB		 112 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
113 * is given, one of the above models will be
114 * chosen according to the subsystem id. */
dfe495d0 115 /* for backward compatibility */
f5fcc13c 116 STAC_MACMINI,
3fc24d85 117 STAC_MACBOOK,
6f0778d8
NB		 118 STAC_MACBOOK_PRO_V1,
119 STAC_MACBOOK_PRO_V2,
f16928fb 120 STAC_IMAC_INTEL,
0dae0f83 121 STAC_IMAC_INTEL_20,
8c650087 122 STAC_ECS_202,
dfe495d0
TI		 123 STAC_922X_DELL_D81,
124 STAC_922X_DELL_D82,
125 STAC_922X_DELL_M81,
126 STAC_922X_DELL_M82,
f5fcc13c
TI		 127 STAC_922X_MODELS
128};
129
130enum {
131 STAC_D965_REF,
132 STAC_D965_3ST,
133 STAC_D965_5ST,
4ff076e5 134 STAC_DELL_3ST,
8e9068b1 135 STAC_DELL_BIOS,
f5fcc13c
TI		 136 STAC_927X_MODELS
137};
403d1944 138
74aeaabc
MR		 139struct sigmatel_event {
140 hda_nid_t nid;
c6e4c666
TI		 141 unsigned char type;
142 unsigned char tag;
74aeaabc
MR		 143 int data;
144};
145
146struct sigmatel_jack {
147 hda_nid_t nid;
148 int type;
149 struct snd_jack *jack;
150};
151
2f2f4251 152struct sigmatel_spec {
c8b6bf9b 153 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 154 unsigned int num_mixers;
155
403d1944 156 int board_config;
c0cea0d0 157 unsigned int eapd_switch: 1;
c7d4b2fa 158 unsigned int surr_switch: 1;
403d1944
MP		 159 unsigned int line_switch: 1;
160 unsigned int mic_switch: 1;
3cc08dc6 161 unsigned int alt_switch: 1;
82bc955f 162 unsigned int hp_detect: 1;
00ef50c2 163 unsigned int spdif_mute: 1;
c7d4b2fa 164
4fe5195c 165 /* gpio lines */
0fc9dec4 166 unsigned int eapd_mask;
4fe5195c
MR		 167 unsigned int gpio_mask;
168 unsigned int gpio_dir;
169 unsigned int gpio_data;
170 unsigned int gpio_mute;
171
8daaaa97
MR		 172 /* stream */
173 unsigned int stream_delay;
174
4fe5195c 175 /* analog loopback */
e1f0d669
MR		 176 unsigned char aloopback_mask;
177 unsigned char aloopback_shift;
8259980e 178
a64135a2
MR		 179 /* power management */
180 unsigned int num_pwrs;
d0513fc6 181 unsigned int *pwr_mapping;
a64135a2 182 hda_nid_t *pwr_nids;
b76c850f 183 hda_nid_t *dac_list;
a64135a2 184
74aeaabc
MR		 185 /* jack detection */
186 struct snd_array jacks;
187
188 /* events */
189 struct snd_array events;
190
2f2f4251 191 /* playback */
b22b4821 192 struct hda_input_mux *mono_mux;
89385035 193 struct hda_input_mux *amp_mux;
b22b4821 194 unsigned int cur_mmux;
2f2f4251 195 struct hda_multi_out multiout;
3cc08dc6 196 hda_nid_t dac_nids[5];
2f2f4251
M		 197
198 /* capture */
199 hda_nid_t *adc_nids;
2f2f4251 200 unsigned int num_adcs;
dabbed6f
M		 201 hda_nid_t *mux_nids;
202 unsigned int num_muxes;
8b65727b
MP		 203 hda_nid_t *dmic_nids;
204 unsigned int num_dmics;
e1f0d669 205 hda_nid_t *dmux_nids;
1697055e 206 unsigned int num_dmuxes;
d9737751
MR		 207 hda_nid_t *smux_nids;
208 unsigned int num_smuxes;
65973632 209 const char **spdif_labels;
d9737751 210
dabbed6f 211 hda_nid_t dig_in_nid;
b22b4821 212 hda_nid_t mono_nid;
1cd2224c
MR		 213 hda_nid_t anabeep_nid;
214 hda_nid_t digbeep_nid;
2f2f4251 215
2f2f4251
M		 216 /* pin widgets */
217 hda_nid_t *pin_nids;
218 unsigned int num_pins;
2f2f4251 219 unsigned int *pin_configs;
2f2f4251
M		 220
221 /* codec specific stuff */
222 struct hda_verb *init;
c8b6bf9b 223 struct snd_kcontrol_new *mixer;
2f2f4251
M		 224
225 /* capture source */
8b65727b 226 struct hda_input_mux *dinput_mux;
e1f0d669 227 unsigned int cur_dmux[2];
c7d4b2fa 228 struct hda_input_mux *input_mux;
3cc08dc6 229 unsigned int cur_mux[3];
d9737751
MR		 230 struct hda_input_mux *sinput_mux;
231 unsigned int cur_smux[2];
2a9c7816
MR		 232 unsigned int cur_amux;
233 hda_nid_t *amp_nids;
234 unsigned int num_amps;
8daaaa97 235 unsigned int powerdown_adcs;
2f2f4251 236
403d1944
MP		 237 /* i/o switches */
238 unsigned int io_switch[2];
0fb87bb4 239 unsigned int clfe_swap;
d7a89436 240 unsigned int hp_switch; /* NID of HP as line-out */
5f10c4a9 241 unsigned int aloopback;
2f2f4251 242
c7d4b2fa
M		 243 struct hda_pcm pcm_rec[2]; /* PCM information */
244
245 /* dynamic controls and input_mux */
246 struct auto_pin_cfg autocfg;
603c4019 247 struct snd_array kctls;
8b65727b 248 struct hda_input_mux private_dimux;
c7d4b2fa 249 struct hda_input_mux private_imux;
d9737751 250 struct hda_input_mux private_smux;
89385035 251 struct hda_input_mux private_amp_mux;
b22b4821 252 struct hda_input_mux private_mono_mux;
2f2f4251
M		 253};
254
255static hda_nid_t stac9200_adc_nids[1] = {
256 0x03,
257};
258
259static hda_nid_t stac9200_mux_nids[1] = {
260 0x0c,
261};
262
263static hda_nid_t stac9200_dac_nids[1] = {
264 0x02,
265};
266
a64135a2
MR		 267static hda_nid_t stac92hd73xx_pwr_nids[8] = {
268 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
269 0x0f, 0x10, 0x11
270};
271
0ffa9807
MR		 272static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
273 0x26, 0,
274};
275
e1f0d669
MR		 276static hda_nid_t stac92hd73xx_adc_nids[2] = {
277 0x1a, 0x1b
278};
279
2a9c7816
MR		 280#define DELL_M6_AMP 2
281static hda_nid_t stac92hd73xx_amp_nids[3] = {
282 0x0b, 0x0c, 0x0e
89385035
MR		 283};
284
e1f0d669
MR		 285#define STAC92HD73XX_NUM_DMICS 2
286static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
287 0x13, 0x14, 0
288};
289
290#define STAC92HD73_DAC_COUNT 5
291static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
292 0x15, 0x16, 0x17, 0x18, 0x19,
293};
294
295static hda_nid_t stac92hd73xx_mux_nids[4] = {
296 0x28, 0x29, 0x2a, 0x2b,
297};
298
299static hda_nid_t stac92hd73xx_dmux_nids[2] = {
300 0x20, 0x21,
301};
302
d9737751
MR		 303static hda_nid_t stac92hd73xx_smux_nids[2] = {
304 0x22, 0x23,
305};
306
d0513fc6
MR		 307#define STAC92HD83XXX_NUM_DMICS 2
308static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
309 0x11, 0x12, 0
310};
311
312#define STAC92HD81_DAC_COUNT 2
313#define STAC92HD83_DAC_COUNT 3
314static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
315 0x13, 0x14, 0x22,
316};
317
318static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
319 0x17, 0x18,
320};
321
322static hda_nid_t stac92hd83xxx_adc_nids[2] = {
323 0x15, 0x16,
324};
325
326static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
327 0xa, 0xb, 0xd, 0xe,
328};
329
0ffa9807
MR		 330static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
331 0x1e, 0,
332};
333
d0513fc6
MR		 334static unsigned int stac92hd83xxx_pwr_mapping[4] = {
335 0x03, 0x0c, 0x10, 0x40,
336};
337
a64135a2
MR		 338static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
339 0x0a, 0x0d, 0x0f
340};
341
e035b841
MR		 342static hda_nid_t stac92hd71bxx_adc_nids[2] = {
343 0x12, 0x13,
344};
345
346static hda_nid_t stac92hd71bxx_mux_nids[2] = {
347 0x1a, 0x1b
348};
349
4b33c767
MR		 350static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
351 0x1c, 0x1d,
e1f0d669
MR		 352};
353
d9737751
MR		 354static hda_nid_t stac92hd71bxx_smux_nids[2] = {
355 0x24, 0x25,
356};
357
aea7bb0a 358static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 359 0x10, /*0x11, */
360};
361
362#define STAC92HD71BXX_NUM_DMICS 2
363static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
364 0x18, 0x19, 0
365};
366
0ffa9807
MR		 367static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
368 0x22, 0
369};
370
8e21c34c
TD		 371static hda_nid_t stac925x_adc_nids[1] = {
372 0x03,
373};
374
375static hda_nid_t stac925x_mux_nids[1] = {
376 0x0f,
377};
378
379static hda_nid_t stac925x_dac_nids[1] = {
380 0x02,
381};
382
f6e9852a
TI		 383#define STAC925X_NUM_DMICS 1
384static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
385 0x15, 0
2c11f955
TD		 386};
387
1697055e
TI		 388static hda_nid_t stac925x_dmux_nids[1] = {
389 0x14,
390};
391
2f2f4251
M		 392static hda_nid_t stac922x_adc_nids[2] = {
393 0x06, 0x07,
394};
395
396static hda_nid_t stac922x_mux_nids[2] = {
397 0x12, 0x13,
398};
399
3cc08dc6
MP		 400static hda_nid_t stac927x_adc_nids[3] = {
401 0x07, 0x08, 0x09
402};
403
404static hda_nid_t stac927x_mux_nids[3] = {
405 0x15, 0x16, 0x17
406};
407
d9737751
MR		 408static hda_nid_t stac927x_smux_nids[1] = {
409 0x21,
410};
411
b76c850f
MR		 412static hda_nid_t stac927x_dac_nids[6] = {
413 0x02, 0x03, 0x04, 0x05, 0x06, 0
414};
415
e1f0d669
MR		 416static hda_nid_t stac927x_dmux_nids[1] = {
417 0x1b,
418};
419
7f16859a
MR		 420#define STAC927X_NUM_DMICS 2
421static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
422 0x13, 0x14, 0
423};
424
65973632
MR		 425static const char *stac927x_spdif_labels[5] = {
426 "Digital Playback", "ADAT", "Analog Mux 1",
427 "Analog Mux 2", "Analog Mux 3"
428};
429
f3302a59
MP		 430static hda_nid_t stac9205_adc_nids[2] = {
431 0x12, 0x13
432};
433
434static hda_nid_t stac9205_mux_nids[2] = {
435 0x19, 0x1a
436};
437
e1f0d669 438static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 439 0x1d,
e1f0d669
MR		 440};
441
d9737751
MR		 442static hda_nid_t stac9205_smux_nids[1] = {
443 0x21,
444};
445
f6e9852a
TI		 446#define STAC9205_NUM_DMICS 2
447static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
448 0x17, 0x18, 0
8b65727b
MP		 449};
450
c7d4b2fa 451static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 452 0x08, 0x09, 0x0d, 0x0e,
453 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 454};
455
8e21c34c
TD		 456static hda_nid_t stac925x_pin_nids[8] = {
457 0x07, 0x08, 0x0a, 0x0b,
458 0x0c, 0x0d, 0x10, 0x11,
459};
460
2f2f4251
M		 461static hda_nid_t stac922x_pin_nids[10] = {
462 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
463 0x0f, 0x10, 0x11, 0x15, 0x1b,
464};
465
a7662640 466static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 467 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
468 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 469 0x14, 0x22, 0x23
e1f0d669
MR		 470};
471
d0513fc6
MR		 472static hda_nid_t stac92hd83xxx_pin_nids[14] = {
473 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
474 0x0f, 0x10, 0x11, 0x12, 0x13,
475 0x1d, 0x1e, 0x1f, 0x20
476};
0ffa9807 477static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 478 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
479 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 480 0x1f,
e035b841
MR		 481};
482
3cc08dc6
MP		 483static hda_nid_t stac927x_pin_nids[14] = {
484 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
485 0x0f, 0x10, 0x11, 0x12, 0x13,
486 0x14, 0x21, 0x22, 0x23,
487};
488
f3302a59
MP		 489static hda_nid_t stac9205_pin_nids[12] = {
490 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
491 0x0f, 0x14, 0x16, 0x17, 0x18,
492 0x21, 0x22,
f3302a59
MP		 493};
494
89385035
MR		 495#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
496
497static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
498 struct snd_ctl_elem_value *ucontrol)
499{
500 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
501 struct sigmatel_spec *spec = codec->spec;
502 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
503
504 kcontrol->private_value ^= get_amp_nid(kcontrol);
505 kcontrol->private_value |= nid;
506
507 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
508}
509
510static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
511 struct snd_ctl_elem_value *ucontrol)
512{
513 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
514 struct sigmatel_spec *spec = codec->spec;
515 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
516
517 kcontrol->private_value ^= get_amp_nid(kcontrol);
518 kcontrol->private_value |= nid;
519
520 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
521}
522
8b65727b
MP		 523static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
524 struct snd_ctl_elem_info *uinfo)
525{
526 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
527 struct sigmatel_spec *spec = codec->spec;
528 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
529}
530
531static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
532 struct snd_ctl_elem_value *ucontrol)
533{
534 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
535 struct sigmatel_spec *spec = codec->spec;
e1f0d669 536 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 537
e1f0d669 538 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 539 return 0;
540}
541
542static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
543 struct snd_ctl_elem_value *ucontrol)
544{
545 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
546 struct sigmatel_spec *spec = codec->spec;
e1f0d669 547 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 548
549 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 550 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 551}
552
d9737751
MR		 553static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
554 struct snd_ctl_elem_info *uinfo)
555{
556 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
557 struct sigmatel_spec *spec = codec->spec;
558 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
559}
560
561static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
562 struct snd_ctl_elem_value *ucontrol)
563{
564 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
565 struct sigmatel_spec *spec = codec->spec;
566 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
567
568 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
569 return 0;
570}
571
572static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
573 struct snd_ctl_elem_value *ucontrol)
574{
575 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
576 struct sigmatel_spec *spec = codec->spec;
00ef50c2 577 struct hda_input_mux *smux = &spec->private_smux;
d9737751 578 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 579 int err, val;
580 hda_nid_t nid;
d9737751 581
00ef50c2 582 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 583 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 584 if (err < 0)
585 return err;
586
587 if (spec->spdif_mute) {
588 if (smux_idx == 0)
589 nid = spec->multiout.dig_out_nid;
590 else
591 nid = codec->slave_dig_outs[smux_idx - 1];
592 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 593 val = HDA_AMP_MUTE;
00ef50c2 594 else
c9b46f91 595 val = 0;
00ef50c2 596 /* un/mute SPDIF out */
c9b46f91
TI		 597 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
598 HDA_AMP_MUTE, val);
00ef50c2
MR		 599 }
600 return 0;
d9737751
MR		 601}
602
c8b6bf9b 603static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 604{
605 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
606 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 607 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 608}
609
c8b6bf9b 610static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 611{
612 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
613 struct sigmatel_spec *spec = codec->spec;
614 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
615
616 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
617 return 0;
618}
619
c8b6bf9b 620static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 621{
622 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
623 struct sigmatel_spec *spec = codec->spec;
624 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
625
c7d4b2fa 626 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 627 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
628}
629
b22b4821
MR		 630static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
631 struct snd_ctl_elem_info *uinfo)
632{
633 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
634 struct sigmatel_spec *spec = codec->spec;
635 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
636}
637
638static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
639 struct snd_ctl_elem_value *ucontrol)
640{
641 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
642 struct sigmatel_spec *spec = codec->spec;
643
644 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
645 return 0;
646}
647
648static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
649 struct snd_ctl_elem_value *ucontrol)
650{
651 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
652 struct sigmatel_spec *spec = codec->spec;
653
654 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
655 spec->mono_nid, &spec->cur_mmux);
656}
657
89385035
MR		 658static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
659 struct snd_ctl_elem_info *uinfo)
660{
661 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
662 struct sigmatel_spec *spec = codec->spec;
663 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
664}
665
666static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
667 struct snd_ctl_elem_value *ucontrol)
668{
669 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
670 struct sigmatel_spec *spec = codec->spec;
671
672 ucontrol->value.enumerated.item[0] = spec->cur_amux;
673 return 0;
674}
675
676static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
677 struct snd_ctl_elem_value *ucontrol)
678{
679 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
680 struct sigmatel_spec *spec = codec->spec;
681 struct snd_kcontrol *ctl =
682 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
683 if (!ctl)
684 return -EINVAL;
685
686 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
687 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
688
689 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
690 0, &spec->cur_amux);
691}
692
5f10c4a9
ML		 693#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
694
695static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
696 struct snd_ctl_elem_value *ucontrol)
697{
698 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 699 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 700 struct sigmatel_spec *spec = codec->spec;
701
e1f0d669
MR		 702 ucontrol->value.integer.value[0] = !!(spec->aloopback &
703 (spec->aloopback_mask << idx));
5f10c4a9
ML		 704 return 0;
705}
706
707static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
708 struct snd_ctl_elem_value *ucontrol)
709{
710 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
711 struct sigmatel_spec *spec = codec->spec;
e1f0d669 712 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 713 unsigned int dac_mode;
e1f0d669 714 unsigned int val, idx_val;
5f10c4a9 715
e1f0d669
MR		 716 idx_val = spec->aloopback_mask << idx;
717 if (ucontrol->value.integer.value[0])
718 val = spec->aloopback | idx_val;
719 else
720 val = spec->aloopback & ~idx_val;
68ea7b2f 721 if (spec->aloopback == val)
5f10c4a9
ML		 722 return 0;
723
68ea7b2f 724 spec->aloopback = val;
5f10c4a9 725
e1f0d669
MR		 726 /* Only return the bits defined by the shift value of the
727 * first two bytes of the mask
728 */
5f10c4a9 729 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 730 kcontrol->private_value & 0xFFFF, 0x0);
731 dac_mode >>= spec->aloopback_shift;
5f10c4a9 732
e1f0d669 733 if (spec->aloopback & idx_val) {
5f10c4a9 734 snd_hda_power_up(codec);
e1f0d669 735 dac_mode |= idx_val;
5f10c4a9
ML		 736 } else {
737 snd_hda_power_down(codec);
e1f0d669 738 dac_mode &= ~idx_val;
5f10c4a9
ML		 739 }
740
741 snd_hda_codec_write_cache(codec, codec->afg, 0,
742 kcontrol->private_value >> 16, dac_mode);
743
744 return 1;
745}
746
c7d4b2fa 747static struct hda_verb stac9200_core_init[] = {
2f2f4251 748 /* set dac0mux for dac converter */
c7d4b2fa 749 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 750 {}
751};
752
1194b5b7
TI		 753static struct hda_verb stac9200_eapd_init[] = {
754 /* set dac0mux for dac converter */
755 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
756 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
757 {}
758};
759
e1f0d669
MR		 760static struct hda_verb stac92hd73xx_6ch_core_init[] = {
761 /* set master volume and direct control */
762 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
763 /* setup audio connections */
764 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
765 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
766 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
767 /* setup adcs to point to mixer */
768 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
769 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 770 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
771 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
772 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
773 /* setup import muxs */
774 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
775 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
776 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
777 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
778 {}
779};
780
d654a660
MR		 781static struct hda_verb dell_eq_core_init[] = {
782 /* set master volume to max value without distortion
783 * and direct control */
784 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
785 /* setup audio connections */
786 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 787 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
788 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 789 /* setup adcs to point to mixer */
790 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
791 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
792 /* setup import muxs */
793 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
794 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
795 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
796 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
797 {}
798};
799
52fe0f9d 800static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 801 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d 802 /* setup audio connections */
7747ecce
MR		 803 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
804 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 805 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
806 /* setup adcs to point to mixer */
807 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
808 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
809 /* setup import muxs */
810 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
811 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
812 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
813 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
814 {}
815};
816
e1f0d669
MR		 817static struct hda_verb stac92hd73xx_8ch_core_init[] = {
818 /* set master volume and direct control */
819 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
820 /* setup audio connections */
821 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
822 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
823 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
824 /* connect hp ports to dac3 */
825 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
826 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
827 /* setup adcs to point to mixer */
828 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
829 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 830 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
831 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
832 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
833 /* setup import muxs */
834 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
835 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
836 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
837 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
838 {}
839};
840
841static struct hda_verb stac92hd73xx_10ch_core_init[] = {
842 /* set master volume and direct control */
843 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
844 /* setup audio connections */
845 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
846 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
847 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
848 /* dac3 is connected to import3 mux */
849 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
850 /* connect hp ports to dac4 */
851 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
852 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
853 /* setup adcs to point to mixer */
854 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
855 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 856 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
857 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
858 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
859 /* setup import muxs */
860 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
861 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
862 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
863 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
864 {}
865};
866
d0513fc6
MR		 867static struct hda_verb stac92hd83xxx_core_init[] = {
868 /* start of config #1 */
869 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
870
871 /* start of config #2 */
872 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
873 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
874 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
875
876 /* power state controls amps */
877 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
878};
879
e035b841 880static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 881 /* set master volume and direct control */
882 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
883 /* connect headphone jack to dac1 */
884 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
541eee87
MR		 885 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
886 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
887 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
888 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 889};
890
4b33c767 891#define HD_DISABLE_PORTF 2
541eee87 892static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 893 /* start of config #1 */
894
895 /* connect port 0f to audio mixer */
896 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 897 /* unmute right and left channels for node 0x0f */
898 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
899 /* start of config #2 */
900
e035b841
MR		 901 /* set master volume and direct control */
902 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
903 /* connect headphone jack to dac1 */
904 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 905 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 906 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
907 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 908 {}
909};
910
8e21c34c
TD		 911static struct hda_verb stac925x_core_init[] = {
912 /* set dac0mux for dac converter */
913 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
914 {}
915};
916
c7d4b2fa 917static struct hda_verb stac922x_core_init[] = {
2f2f4251 918 /* set master volume and direct control */
c7d4b2fa 919 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 920 {}
921};
922
93ed1503 923static struct hda_verb d965_core_init[] = {
19039bd0 924 /* set master volume and direct control */
93ed1503 925 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 926 /* unmute node 0x1b */
927 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
928 /* select node 0x03 as DAC */
929 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
930 {}
931};
932
3cc08dc6
MP		 933static struct hda_verb stac927x_core_init[] = {
934 /* set master volume and direct control */
935 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 936 /* enable analog pc beep path */
937 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 938 {}
939};
940
f3302a59
MP		 941static struct hda_verb stac9205_core_init[] = {
942 /* set master volume and direct control */
943 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 944 /* enable analog pc beep path */
945 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 946 {}
947};
948
b22b4821
MR		 949#define STAC_MONO_MUX \
950 { \
951 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
952 .name = "Mono Mux", \
953 .count = 1, \
954 .info = stac92xx_mono_mux_enum_info, \
955 .get = stac92xx_mono_mux_enum_get, \
956 .put = stac92xx_mono_mux_enum_put, \
957 }
958
89385035
MR		 959#define STAC_AMP_MUX \
960 { \
961 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
962 .name = "Amp Selector Capture Switch", \
963 .count = 1, \
964 .info = stac92xx_amp_mux_enum_info, \
965 .get = stac92xx_amp_mux_enum_get, \
966 .put = stac92xx_amp_mux_enum_put, \
967 }
968
969#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
970 { \
971 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
972 .name = xname, \
973 .index = 0, \
974 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
975 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
976 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
977 .info = stac92xx_amp_volume_info, \
978 .get = stac92xx_amp_volume_get, \
979 .put = stac92xx_amp_volume_put, \
980 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
981 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
982 }
983
9e05b7a3 984#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 985 { \
986 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
987 .name = "Input Source", \
9e05b7a3 988 .count = cnt, \
ca7c5a8b
ML		 989 .info = stac92xx_mux_enum_info, \
990 .get = stac92xx_mux_enum_get, \
991 .put = stac92xx_mux_enum_put, \
992 }
993
e1f0d669 994#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 995 { \
996 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
997 .name = "Analog Loopback", \
e1f0d669 998 .count = cnt, \
5f10c4a9
ML		 999 .info = stac92xx_aloopback_info, \
1000 .get = stac92xx_aloopback_get, \
1001 .put = stac92xx_aloopback_put, \
1002 .private_value = verb_read | (verb_write << 16), \
1003 }
1004
c8b6bf9b 1005static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 1006 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
1007 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 1008 STAC_INPUT_SOURCE(1),
2f2f4251
M		 1009 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1010 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 1011 { } /* end */
1012};
1013
2a9c7816 1014#define DELL_M6_MIXER 6
e1f0d669 1015static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 1016 /* start of config #1 */
e1f0d669
MR		 1017 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1018 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1019
e1f0d669
MR		 1020 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1021 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1022
2a9c7816
MR		 1023 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1024 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1025
1026 /* start of config #2 */
1027 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1028 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1029
e1f0d669
MR		 1030 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1031 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1032
2a9c7816
MR		 1033 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1034
1035 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1036 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1037
1038 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1039 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1040
e1f0d669
MR		 1041 { } /* end */
1042};
1043
1044static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1045 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1046
e1f0d669
MR		 1047 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1048 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1049
1050 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1051 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1052
1053 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1054 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1055
1056 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1057 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1058
1059 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1060 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1061
1062 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1063 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1064
1065 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1066 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1067 { } /* end */
1068};
1069
1070static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1071 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1072
e1f0d669
MR		 1073 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1074 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1075
1076 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1077 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1078
1079 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1080 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1081
1082 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1083 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1084
1085 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1086 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1087
1088 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1089 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1090
1091 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1092 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1093 { } /* end */
1094};
1095
d0513fc6
MR		 1096
1097static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1098 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1099 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1100
1101 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1102 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1103
1104 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1105 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1106
1107 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1108 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1109
1110 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1111 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1112
1113 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1114 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1115
1116 /*
1117 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1118 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1119 */
1120 { } /* end */
1121};
1122
541eee87 1123static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1124 STAC_INPUT_SOURCE(2),
4b33c767 1125 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1126
9b35947f
MR		 1127 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1128 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1129
1130 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1131 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1132 /* analog pc-beep replaced with digital beep support */
1133 /*
f7c5dda2
MR		 1134 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1135 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1136 */
f7c5dda2 1137
687cb98e
MR		 1138 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1139 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1140
687cb98e
MR		 1141 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1142 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1143
1144 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1145 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1146
1147 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1148 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1149 { } /* end */
1150};
1151
541eee87 1152static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1153 STAC_INPUT_SOURCE(2),
1154 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1155
541eee87
MR		 1156 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1157 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1158
1159 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1160 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1161 { } /* end */
1162};
1163
8e21c34c 1164static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1165 STAC_INPUT_SOURCE(1),
8e21c34c 1166 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1167 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1168 { } /* end */
1169};
1170
9e05b7a3 1171static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1172 STAC_INPUT_SOURCE(2),
e1f0d669 1173 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1174
1175 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1176 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1177
1178 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1179 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1180 { } /* end */
1181};
1182
19039bd0 1183/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1184static struct snd_kcontrol_new stac922x_mixer[] = {
1185 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1186 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1187 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1188
1189 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1190 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1191 { } /* end */
1192};
1193
9e05b7a3 1194
d1d985f0 1195static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1196 STAC_INPUT_SOURCE(3),
e1f0d669 1197 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1198
9e05b7a3
ML		 1199 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1200 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1201
1202 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1203 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1204
1205 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1206 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1207 { } /* end */
1208};
1209
1697055e
TI		 1210static struct snd_kcontrol_new stac_dmux_mixer = {
1211 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1212 .name = "Digital Input Source",
1213 /* count set later */
1214 .info = stac92xx_dmux_enum_info,
1215 .get = stac92xx_dmux_enum_get,
1216 .put = stac92xx_dmux_enum_put,
1217};
1218
d9737751
MR		 1219static struct snd_kcontrol_new stac_smux_mixer = {
1220 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1221 .name = "IEC958 Playback Source",
d9737751
MR		 1222 /* count set later */
1223 .info = stac92xx_smux_enum_info,
1224 .get = stac92xx_smux_enum_get,
1225 .put = stac92xx_smux_enum_put,
1226};
1227
2134ea4f
TI		 1228static const char *slave_vols[] = {
1229 "Front Playback Volume",
1230 "Surround Playback Volume",
1231 "Center Playback Volume",
1232 "LFE Playback Volume",
1233 "Side Playback Volume",
1234 "Headphone Playback Volume",
1235 "Headphone Playback Volume",
1236 "Speaker Playback Volume",
1237 "External Speaker Playback Volume",
1238 "Speaker2 Playback Volume",
1239 NULL
1240};
1241
1242static const char *slave_sws[] = {
1243 "Front Playback Switch",
1244 "Surround Playback Switch",
1245 "Center Playback Switch",
1246 "LFE Playback Switch",
1247 "Side Playback Switch",
1248 "Headphone Playback Switch",
1249 "Headphone Playback Switch",
1250 "Speaker Playback Switch",
1251 "External Speaker Playback Switch",
1252 "Speaker2 Playback Switch",
edb54a55 1253 "IEC958 Playback Switch",
2134ea4f
TI		 1254 NULL
1255};
1256
603c4019 1257static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1258static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1259
2f2f4251
M		 1260static int stac92xx_build_controls(struct hda_codec *codec)
1261{
1262 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1263 struct auto_pin_cfg *cfg = &spec->autocfg;
1264 hda_nid_t nid;
2f2f4251 1265 int err;
c7d4b2fa 1266 int i;
2f2f4251
M		 1267
1268 err = snd_hda_add_new_ctls(codec, spec->mixer);
1269 if (err < 0)
1270 return err;
c7d4b2fa
M		 1271
1272 for (i = 0; i < spec->num_mixers; i++) {
1273 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1274 if (err < 0)
1275 return err;
1276 }
1697055e
TI		 1277 if (spec->num_dmuxes > 0) {
1278 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1279 err = snd_hda_ctl_add(codec,
1697055e
TI		 1280 snd_ctl_new1(&stac_dmux_mixer, codec));
1281 if (err < 0)
1282 return err;
1283 }
d9737751 1284 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1285 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1286 struct hda_input_mux *smux = &spec->private_smux;
1287 /* check for mute support on SPDIF out */
1288 if (wcaps & AC_WCAP_OUT_AMP) {
1289 smux->items[smux->num_items].label = "Off";
1290 smux->items[smux->num_items].index = 0;
1291 smux->num_items++;
1292 spec->spdif_mute = 1;
1293 }
d9737751
MR		 1294 stac_smux_mixer.count = spec->num_smuxes;
1295 err = snd_ctl_add(codec->bus->card,
1296 snd_ctl_new1(&stac_smux_mixer, codec));
1297 if (err < 0)
1298 return err;
1299 }
c7d4b2fa 1300
dabbed6f
M		 1301 if (spec->multiout.dig_out_nid) {
1302 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1303 if (err < 0)
1304 return err;
9a08160b
TI		 1305 err = snd_hda_create_spdif_share_sw(codec,
1306 &spec->multiout);
1307 if (err < 0)
1308 return err;
1309 spec->multiout.share_spdif = 1;
dabbed6f 1310 }
da74ae3e 1311 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1312 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1313 if (err < 0)
1314 return err;
1315 }
2134ea4f
TI		 1316
1317 /* if we have no master control, let's create it */
1318 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1319 unsigned int vmaster_tlv[4];
2134ea4f 1320 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1321 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1322 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1323 vmaster_tlv, slave_vols);
2134ea4f
TI		 1324 if (err < 0)
1325 return err;
1326 }
1327 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1328 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1329 NULL, slave_sws);
1330 if (err < 0)
1331 return err;
1332 }
1333
603c4019 1334 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1335
1336 /* create jack input elements */
1337 if (spec->hp_detect) {
1338 for (i = 0; i < cfg->hp_outs; i++) {
1339 int type = SND_JACK_HEADPHONE;
1340 nid = cfg->hp_pins[i];
1341 /* jack detection */
1342 if (cfg->hp_outs == i)
1343 type |= SND_JACK_LINEOUT;
1344 err = stac92xx_add_jack(codec, nid, type);
1345 if (err < 0)
1346 return err;
1347 }
1348 }
1349 for (i = 0; i < cfg->line_outs; i++) {
1350 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1351 SND_JACK_LINEOUT);
1352 if (err < 0)
1353 return err;
1354 }
1355 for (i = 0; i < AUTO_PIN_LAST; i++) {
1356 nid = cfg->input_pins[i];
1357 if (nid) {
1358 err = stac92xx_add_jack(codec, nid,
1359 SND_JACK_MICROPHONE);
1360 if (err < 0)
1361 return err;
1362 }
1363 }
1364
dabbed6f 1365 return 0;
2f2f4251
M		 1366}
1367
403d1944 1368static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1369 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1370 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1371};
1372
dfe495d0
TI		 1373/*
1374 STAC 9200 pin configs for
1375 102801A8
1376 102801DE
1377 102801E8
1378*/
1379static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1380 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1381 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1382};
1383
1384/*
1385 STAC 9200 pin configs for
1386 102801C0
1387 102801C1
1388*/
1389static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1390 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1391 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1392};
1393
1394/*
1395 STAC 9200 pin configs for
1396 102801C4 (Dell Dimension E310)
1397 102801C5
1398 102801C7
1399 102801D9
1400 102801DA
1401 102801E3
1402*/
1403static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1404 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1405 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1406};
1407
1408
1409/*
1410 STAC 9200-32 pin configs for
1411 102801B5 (Dell Inspiron 630m)
1412 102801D8 (Dell Inspiron 640m)
1413*/
1414static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1415 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1416 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1417};
1418
1419/*
1420 STAC 9200-32 pin configs for
1421 102801C2 (Dell Latitude D620)
1422 102801C8
1423 102801CC (Dell Latitude D820)
1424 102801D4
1425 102801D6
1426*/
1427static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1428 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1429 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1430};
1431
1432/*
1433 STAC 9200-32 pin configs for
1434 102801CE (Dell XPS M1710)
1435 102801CF (Dell Precision M90)
1436*/
1437static unsigned int dell9200_m23_pin_configs[8] = {
1438 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1439 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1440};
1441
1442/*
1443 STAC 9200-32 pin configs for
1444 102801C9
1445 102801CA
1446 102801CB (Dell Latitude 120L)
1447 102801D3
1448*/
1449static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1450 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1451 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1452};
1453
1454/*
1455 STAC 9200-32 pin configs for
1456 102801BD (Dell Inspiron E1505n)
1457 102801EE
1458 102801EF
1459*/
1460static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1461 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1462 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1463};
1464
1465/*
1466 STAC 9200-32 pin configs for
1467 102801F5 (Dell Inspiron 1501)
1468 102801F6
1469*/
1470static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1471 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1472 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1473};
1474
1475/*
1476 STAC 9200-32
1477 102801CD (Dell Inspiron E1705/9400)
1478*/
1479static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1480 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1481 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1482};
1483
bf277785
TD		 1484static unsigned int oqo9200_pin_configs[8] = {
1485 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1486 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1487};
1488
dfe495d0 1489
f5fcc13c
TI		 1490static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1491 [STAC_REF] = ref9200_pin_configs,
bf277785 1492 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1493 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1494 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1495 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1496 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1497 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1498 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1499 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1500 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1501 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1502 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1503 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1504};
1505
f5fcc13c
TI		 1506static const char *stac9200_models[STAC_9200_MODELS] = {
1507 [STAC_REF] = "ref",
bf277785 1508 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1509 [STAC_9200_DELL_D21] = "dell-d21",
1510 [STAC_9200_DELL_D22] = "dell-d22",
1511 [STAC_9200_DELL_D23] = "dell-d23",
1512 [STAC_9200_DELL_M21] = "dell-m21",
1513 [STAC_9200_DELL_M22] = "dell-m22",
1514 [STAC_9200_DELL_M23] = "dell-m23",
1515 [STAC_9200_DELL_M24] = "dell-m24",
1516 [STAC_9200_DELL_M25] = "dell-m25",
1517 [STAC_9200_DELL_M26] = "dell-m26",
1518 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1519 [STAC_9200_GATEWAY] = "gateway",
117f257d 1520 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1521};
1522
1523static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1524 /* SigmaTel reference board */
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1526 "DFI LanParty", STAC_REF),
e7377071 1527 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1529 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1531 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1533 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1535 "unknown Dell", STAC_9200_DELL_D22),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1537 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1539 "Dell Latitude D620", STAC_9200_DELL_M22),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1541 "unknown Dell", STAC_9200_DELL_D23),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1543 "unknown Dell", STAC_9200_DELL_D23),
1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1545 "unknown Dell", STAC_9200_DELL_M22),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1547 "unknown Dell", STAC_9200_DELL_M24),
1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1549 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1550 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1551 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1552 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1553 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1554 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1555 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1556 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1557 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1558 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1559 "Dell Precision M90", STAC_9200_DELL_M23),
1560 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1561 "unknown Dell", STAC_9200_DELL_M22),
1562 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1563 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1564 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1565 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1566 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1567 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1568 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1569 "unknown Dell", STAC_9200_DELL_D23),
1570 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1571 "unknown Dell", STAC_9200_DELL_D23),
1572 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1573 "unknown Dell", STAC_9200_DELL_D21),
1574 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1575 "unknown Dell", STAC_9200_DELL_D23),
1576 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1577 "unknown Dell", STAC_9200_DELL_D21),
1578 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1579 "unknown Dell", STAC_9200_DELL_M25),
1580 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1581 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1582 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1583 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1584 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1585 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1586 /* Panasonic */
117f257d 1587 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1588 /* Gateway machines needs EAPD to be set on resume */
1589 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1590 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1591 STAC_9200_GATEWAY),
1592 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1593 STAC_9200_GATEWAY),
bf277785
TD		 1594 /* OQO Mobile */
1595 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1596 {} /* terminator */
1597};
1598
8e21c34c
TD		 1599static unsigned int ref925x_pin_configs[8] = {
1600 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1601 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1602};
1603
1604static unsigned int stac925x_MA6_pin_configs[8] = {
1605 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1606 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1607};
1608
2c11f955
TD		 1609static unsigned int stac925x_PA6_pin_configs[8] = {
1610 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1611 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1612};
1613
8e21c34c 1614static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1615 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1616 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1617};
1618
1619static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1620 [STAC_REF] = ref925x_pin_configs,
1621 [STAC_M2_2] = stac925xM2_2_pin_configs,
1622 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1623 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1624};
1625
1626static const char *stac925x_models[STAC_925x_MODELS] = {
1627 [STAC_REF] = "ref",
1628 [STAC_M2_2] = "m2-2",
1629 [STAC_MA6] = "m6",
2c11f955 1630 [STAC_PA6] = "pa6",
8e21c34c
TD		 1631};
1632
1633static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1634 /* SigmaTel reference board */
1635 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1636 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1637 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1638 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1639 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1640 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1641 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1642 {} /* terminator */
1643};
1644
a7662640 1645static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1646 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1647 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1648 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1649 0x01452050,
1650};
1651
1652static unsigned int dell_m6_pin_configs[13] = {
1653 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1654 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1655 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1656 0x4f0000f0,
e1f0d669
MR		 1657};
1658
1659static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1660 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1661 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1662 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1663 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1664 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1665};
1666
1667static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1668 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI		 1669 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1670 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1671 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1672 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1673};
1674
1675static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1676 /* SigmaTel reference board */
1677 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1678 "DFI LanParty", STAC_92HD73XX_REF),
1679 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1680 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1681 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1682 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1683 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1684 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1685 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1686 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1687 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1688 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1689 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1690 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1691 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1692 "unknown Dell", STAC_DELL_M6_DMIC),
1693 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1694 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1695 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1696 "Dell Studio 1537", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1697 {} /* terminator */
1698};
1699
d0513fc6
MR		 1700static unsigned int ref92hd83xxx_pin_configs[14] = {
1701 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1702 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1703 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1704 0x01451160, 0x98560170,
1705};
1706
1707static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1708 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1709};
1710
1711static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1712 [STAC_92HD83XXX_REF] = "ref",
1713};
1714
1715static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1716 /* SigmaTel reference board */
1717 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1718 "DFI LanParty", STAC_92HD71BXX_REF),
1719};
1720
0ffa9807 1721static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1722 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1723 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1724 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1725};
1726
0ffa9807 1727static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1728 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1729 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1730 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1731};
1732
0ffa9807 1733static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1734 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1735 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1736 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1737};
1738
3a7abfd2
MR		 1739static unsigned int dell_m4_3_pin_configs[11] = {
1740 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1741 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1742 0x40f000f0, 0x044413b0, 0x044413b0,
1743};
1744
e035b841
MR		 1745static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1746 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1747 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1748 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1749 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1750 [STAC_HP_M4] = NULL,
e035b841
MR		 1751};
1752
1753static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1754 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1755 [STAC_DELL_M4_1] = "dell-m4-1",
1756 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1757 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1758 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1759};
1760
1761static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1762 /* SigmaTel reference board */
1763 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1764 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1765 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1766 "HP dv5", STAC_HP_M4),
1767 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1768 "HP dv7", STAC_HP_M4),
9a9e2359
MR		 1769 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1770 "unknown HP", STAC_HP_M4),
a7662640
MR		 1771 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1772 "unknown Dell", STAC_DELL_M4_1),
1773 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1774 "unknown Dell", STAC_DELL_M4_1),
1775 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1776 "unknown Dell", STAC_DELL_M4_1),
1777 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1778 "unknown Dell", STAC_DELL_M4_1),
1779 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1780 "unknown Dell", STAC_DELL_M4_1),
1781 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1782 "unknown Dell", STAC_DELL_M4_1),
1783 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1784 "unknown Dell", STAC_DELL_M4_1),
1785 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1786 "unknown Dell", STAC_DELL_M4_2),
1787 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1788 "unknown Dell", STAC_DELL_M4_2),
1789 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1790 "unknown Dell", STAC_DELL_M4_2),
1791 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1792 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1793 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1794 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1795 {} /* terminator */
1796};
1797
403d1944
MP		 1798static unsigned int ref922x_pin_configs[10] = {
1799 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1800 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1801 0x40000100, 0x40000100,
1802};
1803
dfe495d0
TI		 1804/*
1805 STAC 922X pin configs for
1806 102801A7
1807 102801AB
1808 102801A9
1809 102801D1
1810 102801D2
1811*/
1812static unsigned int dell_922x_d81_pin_configs[10] = {
1813 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1814 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1815 0x01813122, 0x400001f2,
1816};
1817
1818/*
1819 STAC 922X pin configs for
1820 102801AC
1821 102801D0
1822*/
1823static unsigned int dell_922x_d82_pin_configs[10] = {
1824 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1825 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1826 0x01813122, 0x400001f1,
1827};
1828
1829/*
1830 STAC 922X pin configs for
1831 102801BF
1832*/
1833static unsigned int dell_922x_m81_pin_configs[10] = {
1834 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1835 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1836 0x40C003f1, 0x405003f0,
1837};
1838
1839/*
1840 STAC 9221 A1 pin configs for
1841 102801D7 (Dell XPS M1210)
1842*/
1843static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1844 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1845 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1846 0x508003f3, 0x405003f4,
1847};
1848
403d1944 1849static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1850 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1851 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1852 0x02a19120, 0x40000100,
1853};
1854
1855static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1856 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1857 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1858 0x02a19320, 0x40000100,
1859};
1860
5d5d3bc3
IZ		 1861static unsigned int intel_mac_v1_pin_configs[10] = {
1862 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1863 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1864 0x400000fc, 0x400000fb,
1865};
1866
1867static unsigned int intel_mac_v2_pin_configs[10] = {
1868 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1869 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1870 0x400000fc, 0x400000fb,
6f0778d8
NB		 1871};
1872
5d5d3bc3
IZ		 1873static unsigned int intel_mac_v3_pin_configs[10] = {
1874 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1875 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1876 0x400000fc, 0x400000fb,
1877};
1878
5d5d3bc3
IZ		 1879static unsigned int intel_mac_v4_pin_configs[10] = {
1880 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1881 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1882 0x400000fc, 0x400000fb,
1883};
1884
5d5d3bc3
IZ		 1885static unsigned int intel_mac_v5_pin_configs[10] = {
1886 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1887 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1888 0x400000fc, 0x400000fb,
0dae0f83
TI		 1889};
1890
8c650087
MCC		 1891static unsigned int ecs202_pin_configs[10] = {
1892 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1893 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1894 0x9037012e, 0x40e000f2,
1895};
76c08828 1896
19039bd0 1897static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1898 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1899 [STAC_D945GTP3] = d945gtp3_pin_configs,
1900 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1901 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1902 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1903 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1904 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1905 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1906 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1907 /* for backward compatibility */
5d5d3bc3
IZ		 1908 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1909 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1910 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1911 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1912 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1913 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1914 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1915 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1916 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1917 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1918 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1919};
1920
f5fcc13c
TI		 1921static const char *stac922x_models[STAC_922X_MODELS] = {
1922 [STAC_D945_REF] = "ref",
1923 [STAC_D945GTP5] = "5stack",
1924 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1925 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1926 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1927 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1928 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1929 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1930 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1931 /* for backward compatibility */
f5fcc13c 1932 [STAC_MACMINI] = "macmini",
3fc24d85 1933 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1934 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1935 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1936 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1937 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1938 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1939 [STAC_922X_DELL_D81] = "dell-d81",
1940 [STAC_922X_DELL_D82] = "dell-d82",
1941 [STAC_922X_DELL_M81] = "dell-m81",
1942 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1943};
1944
1945static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1946 /* SigmaTel reference board */
1947 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1948 "DFI LanParty", STAC_D945_REF),
1949 /* Intel 945G based systems */
1950 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1951 "Intel D945G", STAC_D945GTP3),
1952 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1953 "Intel D945G", STAC_D945GTP3),
1954 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1955 "Intel D945G", STAC_D945GTP3),
1956 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1957 "Intel D945G", STAC_D945GTP3),
1958 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1959 "Intel D945G", STAC_D945GTP3),
1960 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1961 "Intel D945G", STAC_D945GTP3),
1962 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1963 "Intel D945G", STAC_D945GTP3),
1964 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1965 "Intel D945G", STAC_D945GTP3),
1966 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1967 "Intel D945G", STAC_D945GTP3),
1968 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1969 "Intel D945G", STAC_D945GTP3),
1970 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1971 "Intel D945G", STAC_D945GTP3),
1972 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1973 "Intel D945G", STAC_D945GTP3),
1974 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1975 "Intel D945G", STAC_D945GTP3),
1976 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1977 "Intel D945G", STAC_D945GTP3),
1978 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1979 "Intel D945G", STAC_D945GTP3),
1980 /* Intel D945G 5-stack systems */
1981 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1982 "Intel D945G", STAC_D945GTP5),
1983 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1984 "Intel D945G", STAC_D945GTP5),
1985 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1986 "Intel D945G", STAC_D945GTP5),
1987 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1988 "Intel D945G", STAC_D945GTP5),
1989 /* Intel 945P based systems */
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1991 "Intel D945P", STAC_D945GTP3),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1993 "Intel D945P", STAC_D945GTP3),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1995 "Intel D945P", STAC_D945GTP3),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1997 "Intel D945P", STAC_D945GTP3),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1999 "Intel D945P", STAC_D945GTP3),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2001 "Intel D945P", STAC_D945GTP5),
2002 /* other systems */
536319af 2003 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2004 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2005 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2006 /* Dell systems */
2007 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2008 "unknown Dell", STAC_922X_DELL_D81),
2009 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2010 "unknown Dell", STAC_922X_DELL_D81),
2011 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2012 "unknown Dell", STAC_922X_DELL_D81),
2013 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2014 "unknown Dell", STAC_922X_DELL_D82),
2015 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2016 "unknown Dell", STAC_922X_DELL_M81),
2017 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2018 "unknown Dell", STAC_922X_DELL_D82),
2019 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2020 "unknown Dell", STAC_922X_DELL_D81),
2021 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2022 "unknown Dell", STAC_922X_DELL_D81),
2023 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2024 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 2025 /* ECS/PC Chips boards */
2026 SND_PCI_QUIRK(0x1019, 0x2144,
2027 "ECS/PC chips", STAC_ECS_202),
2028 SND_PCI_QUIRK(0x1019, 0x2608,
2029 "ECS/PC chips", STAC_ECS_202),
2030 SND_PCI_QUIRK(0x1019, 0x2633,
2031 "ECS/PC chips P17G/1333", STAC_ECS_202),
2032 SND_PCI_QUIRK(0x1019, 0x2811,
2033 "ECS/PC chips", STAC_ECS_202),
2034 SND_PCI_QUIRK(0x1019, 0x2812,
2035 "ECS/PC chips", STAC_ECS_202),
2036 SND_PCI_QUIRK(0x1019, 0x2813,
2037 "ECS/PC chips", STAC_ECS_202),
2038 SND_PCI_QUIRK(0x1019, 0x2814,
2039 "ECS/PC chips", STAC_ECS_202),
2040 SND_PCI_QUIRK(0x1019, 0x2815,
2041 "ECS/PC chips", STAC_ECS_202),
2042 SND_PCI_QUIRK(0x1019, 0x2816,
2043 "ECS/PC chips", STAC_ECS_202),
2044 SND_PCI_QUIRK(0x1019, 0x2817,
2045 "ECS/PC chips", STAC_ECS_202),
2046 SND_PCI_QUIRK(0x1019, 0x2818,
2047 "ECS/PC chips", STAC_ECS_202),
2048 SND_PCI_QUIRK(0x1019, 0x2819,
2049 "ECS/PC chips", STAC_ECS_202),
2050 SND_PCI_QUIRK(0x1019, 0x2820,
2051 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2052 {} /* terminator */
2053};
2054
3cc08dc6 2055static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2056 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2057 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2058 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2059 0x01c42190, 0x40000100,
3cc08dc6
MP		 2060};
2061
93ed1503 2062static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2063 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2064 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2065 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2066 0x40000100, 0x40000100
2067};
2068
93ed1503
TD		 2069static unsigned int d965_5st_pin_configs[14] = {
2070 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2071 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2072 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2073 0x40000100, 0x40000100
2074};
2075
4ff076e5
TD		 2076static unsigned int dell_3st_pin_configs[14] = {
2077 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2078 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2079 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2080 0x40c003fc, 0x40000100
2081};
2082
93ed1503 2083static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 2084 [STAC_D965_REF] = ref927x_pin_configs,
2085 [STAC_D965_3ST] = d965_3st_pin_configs,
2086 [STAC_D965_5ST] = d965_5st_pin_configs,
2087 [STAC_DELL_3ST] = dell_3st_pin_configs,
2088 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2089};
2090
f5fcc13c 2091static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 2092 [STAC_D965_REF] = "ref",
2093 [STAC_D965_3ST] = "3stack",
2094 [STAC_D965_5ST] = "5stack",
2095 [STAC_DELL_3ST] = "dell-3stack",
2096 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2097};
2098
2099static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2100 /* SigmaTel reference board */
2101 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2102 "DFI LanParty", STAC_D965_REF),
81d3dbde 2103 /* Intel 946 based systems */
f5fcc13c
TI		 2104 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2105 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2106 /* 965 based 3 stack systems */
f5fcc13c
TI		 2107 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2108 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2109 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2110 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2111 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2112 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2113 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2114 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2115 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2116 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2117 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2118 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2119 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2120 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2121 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2122 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2123 /* Dell 3 stack systems */
8e9068b1 2124 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2125 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2126 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2127 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2128 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2129 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2130 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2131 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2132 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2133 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2134 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2135 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2136 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2137 /* 965 based 5 stack systems */
f5fcc13c
TI		 2138 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2139 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2140 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2141 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2142 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2143 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2144 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2145 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2146 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2147 {} /* terminator */
2148};
2149
f3302a59
MP		 2150static unsigned int ref9205_pin_configs[12] = {
2151 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2152 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2153 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2154};
2155
dfe495d0
TI		 2156/*
2157 STAC 9205 pin configs for
2158 102801F1
2159 102801F2
2160 102801FC
2161 102801FD
2162 10280204
2163 1028021F
3fa2ef74 2164 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2165*/
2166static unsigned int dell_9205_m42_pin_configs[12] = {
2167 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2168 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2169 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2170};
2171
2172/*
2173 STAC 9205 pin configs for
2174 102801F9
2175 102801FA
2176 102801FE
2177 102801FF (Dell Precision M4300)
2178 10280206
2179 10280200
2180 10280201
2181*/
2182static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2183 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2184 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2185 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2186};
2187
dfe495d0 2188static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2189 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2190 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2191 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2192};
2193
f5fcc13c 2194static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2195 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2196 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2197 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2198 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2199};
2200
f5fcc13c
TI		 2201static const char *stac9205_models[STAC_9205_MODELS] = {
2202 [STAC_9205_REF] = "ref",
dfe495d0 2203 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2204 [STAC_9205_DELL_M43] = "dell-m43",
2205 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2206};
2207
2208static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2209 /* SigmaTel reference board */
2210 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2211 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2212 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2213 "unknown Dell", STAC_9205_DELL_M42),
2214 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2215 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2216 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2217 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2218 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2219 "Dell Precision", STAC_9205_DELL_M43),
2220 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2221 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2222 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2223 "unknown Dell", STAC_9205_DELL_M42),
2224 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2225 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2226 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2227 "Dell Precision", STAC_9205_DELL_M43),
2228 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2229 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2230 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2231 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2232 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2233 "Dell Precision", STAC_9205_DELL_M43),
2234 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2235 "Dell Precision", STAC_9205_DELL_M43),
2236 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2237 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2238 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2239 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2240 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2241 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2242 {} /* terminator */
2243};
2244
11b44bbd
RF		 2245static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2246{
2247 int i;
2248 struct sigmatel_spec *spec = codec->spec;
2249
af9f341a
TI		 2250 kfree(spec->pin_configs);
2251 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2252 GFP_KERNEL);
2253 if (!spec->pin_configs)
2254 return -ENOMEM;
11b44bbd
RF		 2255
2256 for (i = 0; i < spec->num_pins; i++) {
2257 hda_nid_t nid = spec->pin_nids[i];
2258 unsigned int pin_cfg;
2259
2260 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2261 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2262 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2263 nid, pin_cfg);
af9f341a 2264 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF		 2265 }
2266
2267 return 0;
2268}
2269
87d48363
MR		 2270static void stac92xx_set_config_reg(struct hda_codec *codec,
2271 hda_nid_t pin_nid, unsigned int pin_config)
2272{
2273 int i;
2274 snd_hda_codec_write(codec, pin_nid, 0,
2275 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2276 pin_config & 0x000000ff);
2277 snd_hda_codec_write(codec, pin_nid, 0,
2278 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2279 (pin_config & 0x0000ff00) >> 8);
2280 snd_hda_codec_write(codec, pin_nid, 0,
2281 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2282 (pin_config & 0x00ff0000) >> 16);
2283 snd_hda_codec_write(codec, pin_nid, 0,
2284 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2285 pin_config >> 24);
2286 i = snd_hda_codec_read(codec, pin_nid, 0,
2287 AC_VERB_GET_CONFIG_DEFAULT,
2288 0x00);
2289 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2290 pin_nid, i);
2291}
2292
2f2f4251
M		 2293static void stac92xx_set_config_regs(struct hda_codec *codec)
2294{
2295 int i;
2296 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2297
87d48363
MR		 2298 if (!spec->pin_configs)
2299 return;
11b44bbd 2300
87d48363
MR		 2301 for (i = 0; i < spec->num_pins; i++)
2302 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2303 spec->pin_configs[i]);
2f2f4251 2304}
2f2f4251 2305
af9f341a
TI		 2306static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2307{
2308 struct sigmatel_spec *spec = codec->spec;
2309
2310 if (!pins)
2311 return stac92xx_save_bios_config_regs(codec);
2312
2313 kfree(spec->pin_configs);
2314 spec->pin_configs = kmemdup(pins,
2315 spec->num_pins * sizeof(*pins),
2316 GFP_KERNEL);
2317 if (!spec->pin_configs)
2318 return -ENOMEM;
2319
2320 stac92xx_set_config_regs(codec);
2321 return 0;
2322}
2323
2324static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2325 unsigned int cfg)
2326{
2327 struct sigmatel_spec *spec = codec->spec;
2328 int i;
2329
2330 for (i = 0; i < spec->num_pins; i++) {
2331 if (spec->pin_nids[i] == nid) {
2332 spec->pin_configs[i] = cfg;
2333 stac92xx_set_config_reg(codec, nid, cfg);
2334 break;
2335 }
2336 }
2337}
2338
dabbed6f 2339/*
c7d4b2fa 2340 * Analog playback callbacks
dabbed6f 2341 */
c7d4b2fa
M		 2342static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2343 struct hda_codec *codec,
c8b6bf9b 2344 struct snd_pcm_substream *substream)
2f2f4251 2345{
dabbed6f 2346 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2347 if (spec->stream_delay)
2348 msleep(spec->stream_delay);
9a08160b
TI		 2349 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2350 hinfo);
2f2f4251
M		 2351}
2352
2f2f4251
M		 2353static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2354 struct hda_codec *codec,
2355 unsigned int stream_tag,
2356 unsigned int format,
c8b6bf9b 2357 struct snd_pcm_substream *substream)
2f2f4251
M		 2358{
2359 struct sigmatel_spec *spec = codec->spec;
403d1944 2360 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2361}
2362
2363static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2364 struct hda_codec *codec,
c8b6bf9b 2365 struct snd_pcm_substream *substream)
2f2f4251
M		 2366{
2367 struct sigmatel_spec *spec = codec->spec;
2368 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2369}
2370
dabbed6f
M		 2371/*
2372 * Digital playback callbacks
2373 */
2374static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2375 struct hda_codec *codec,
c8b6bf9b 2376 struct snd_pcm_substream *substream)
dabbed6f
M		 2377{
2378 struct sigmatel_spec *spec = codec->spec;
2379 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2380}
2381
2382static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2383 struct hda_codec *codec,
c8b6bf9b 2384 struct snd_pcm_substream *substream)
dabbed6f
M		 2385{
2386 struct sigmatel_spec *spec = codec->spec;
2387 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2388}
2389
6b97eb45
TI		 2390static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2391 struct hda_codec *codec,
2392 unsigned int stream_tag,
2393 unsigned int format,
2394 struct snd_pcm_substream *substream)
2395{
2396 struct sigmatel_spec *spec = codec->spec;
2397 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2398 stream_tag, format, substream);
2399}
2400
dabbed6f 2401
2f2f4251
M		 2402/*
2403 * Analog capture callbacks
2404 */
2405static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2406 struct hda_codec *codec,
2407 unsigned int stream_tag,
2408 unsigned int format,
c8b6bf9b 2409 struct snd_pcm_substream *substream)
2f2f4251
M		 2410{
2411 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2412 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2413
8daaaa97
MR		 2414 if (spec->powerdown_adcs) {
2415 msleep(40);
2416 snd_hda_codec_write_cache(codec, nid, 0,
2417 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2418 }
2419 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2420 return 0;
2421}
2422
2423static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2424 struct hda_codec *codec,
c8b6bf9b 2425 struct snd_pcm_substream *substream)
2f2f4251
M		 2426{
2427 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2428 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2429
8daaaa97
MR		 2430 snd_hda_codec_cleanup_stream(codec, nid);
2431 if (spec->powerdown_adcs)
2432 snd_hda_codec_write_cache(codec, nid, 0,
2433 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2434 return 0;
2435}
2436
dabbed6f
M		 2437static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2438 .substreams = 1,
2439 .channels_min = 2,
2440 .channels_max = 2,
2441 /* NID is set in stac92xx_build_pcms */
2442 .ops = {
2443 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2444 .close = stac92xx_dig_playback_pcm_close,
2445 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2446 },
2447};
2448
2449static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2450 .substreams = 1,
2451 .channels_min = 2,
2452 .channels_max = 2,
2453 /* NID is set in stac92xx_build_pcms */
2454};
2455
2f2f4251
M		 2456static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2457 .substreams = 1,
2458 .channels_min = 2,
c7d4b2fa 2459 .channels_max = 8,
2f2f4251
M		 2460 .nid = 0x02, /* NID to query formats and rates */
2461 .ops = {
2462 .open = stac92xx_playback_pcm_open,
2463 .prepare = stac92xx_playback_pcm_prepare,
2464 .cleanup = stac92xx_playback_pcm_cleanup
2465 },
2466};
2467
3cc08dc6
MP		 2468static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2469 .substreams = 1,
2470 .channels_min = 2,
2471 .channels_max = 2,
2472 .nid = 0x06, /* NID to query formats and rates */
2473 .ops = {
2474 .open = stac92xx_playback_pcm_open,
2475 .prepare = stac92xx_playback_pcm_prepare,
2476 .cleanup = stac92xx_playback_pcm_cleanup
2477 },
2478};
2479
2f2f4251 2480static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2481 .channels_min = 2,
2482 .channels_max = 2,
9e05b7a3 2483 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2484 .ops = {
2485 .prepare = stac92xx_capture_pcm_prepare,
2486 .cleanup = stac92xx_capture_pcm_cleanup
2487 },
2488};
2489
2490static int stac92xx_build_pcms(struct hda_codec *codec)
2491{
2492 struct sigmatel_spec *spec = codec->spec;
2493 struct hda_pcm *info = spec->pcm_rec;
2494
2495 codec->num_pcms = 1;
2496 codec->pcm_info = info;
2497
c7d4b2fa 2498 info->name = "STAC92xx Analog";
2f2f4251 2499 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2500 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2501 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2502 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2503
2504 if (spec->alt_switch) {
2505 codec->num_pcms++;
2506 info++;
2507 info->name = "STAC92xx Analog Alt";
2508 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2509 }
2f2f4251 2510
dabbed6f
M		 2511 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2512 codec->num_pcms++;
2513 info++;
2514 info->name = "STAC92xx Digital";
7ba72ba1 2515 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2516 if (spec->multiout.dig_out_nid) {
2517 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2518 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2519 }
2520 if (spec->dig_in_nid) {
2521 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2522 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2523 }
2524 }
2525
2f2f4251
M		 2526 return 0;
2527}
2528
c960a03b
TI		 2529static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2530{
2531 unsigned int pincap = snd_hda_param_read(codec, nid,
2532 AC_PAR_PIN_CAP);
2533 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2534 if (pincap & AC_PINCAP_VREF_100)
2535 return AC_PINCTL_VREF_100;
2536 if (pincap & AC_PINCAP_VREF_80)
2537 return AC_PINCTL_VREF_80;
2538 if (pincap & AC_PINCAP_VREF_50)
2539 return AC_PINCTL_VREF_50;
2540 if (pincap & AC_PINCAP_VREF_GRD)
2541 return AC_PINCTL_VREF_GRD;
2542 return 0;
2543}
2544
403d1944
MP		 2545static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2546
2547{
82beb8fd
TI		 2548 snd_hda_codec_write_cache(codec, nid, 0,
2549 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2550}
2551
7c2ba97b
MR		 2552#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2553
2554static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2555 struct snd_ctl_elem_value *ucontrol)
2556{
2557 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2558 struct sigmatel_spec *spec = codec->spec;
2559
d7a89436 2560 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2561 return 0;
2562}
2563
c6e4c666
TI		 2564static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2565 unsigned char type);
2566
7c2ba97b
MR		 2567static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2568 struct snd_ctl_elem_value *ucontrol)
2569{
2570 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2571 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2572 int nid = kcontrol->private_value;
2573
2574 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2575
2576 /* check to be sure that the ports are upto date with
2577 * switch changes
2578 */
c6e4c666 2579 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR		 2580
2581 return 1;
2582}
2583
a5ce8890 2584#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2585
2586static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2587{
2588 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2589 struct sigmatel_spec *spec = codec->spec;
2590 int io_idx = kcontrol-> private_value & 0xff;
2591
2592 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2593 return 0;
2594}
2595
2596static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2597{
2598 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2599 struct sigmatel_spec *spec = codec->spec;
2600 hda_nid_t nid = kcontrol->private_value >> 8;
2601 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2602 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2603
2604 spec->io_switch[io_idx] = val;
2605
2606 if (val)
2607 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2608 else {
2609 unsigned int pinctl = AC_PINCTL_IN_EN;
2610 if (io_idx) /* set VREF for mic */
2611 pinctl |= stac92xx_get_vref(codec, nid);
2612 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2613 }
40c1d308
JZ		 2614
2615 /* check the auto-mute again: we need to mute/unmute the speaker
2616 * appropriately according to the pin direction
2617 */
2618 if (spec->hp_detect)
c6e4c666 2619 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2620
403d1944
MP		 2621 return 1;
2622}
2623
0fb87bb4
ML		 2624#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2625
2626static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2627 struct snd_ctl_elem_value *ucontrol)
2628{
2629 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2630 struct sigmatel_spec *spec = codec->spec;
2631
2632 ucontrol->value.integer.value[0] = spec->clfe_swap;
2633 return 0;
2634}
2635
2636static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2637 struct snd_ctl_elem_value *ucontrol)
2638{
2639 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2640 struct sigmatel_spec *spec = codec->spec;
2641 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2642 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2643
68ea7b2f 2644 if (spec->clfe_swap == val)
0fb87bb4
ML		 2645 return 0;
2646
68ea7b2f 2647 spec->clfe_swap = val;
0fb87bb4
ML		 2648
2649 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2650 spec->clfe_swap ? 0x4 : 0x0);
2651
2652 return 1;
2653}
2654
7c2ba97b
MR		 2655#define STAC_CODEC_HP_SWITCH(xname) \
2656 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2657 .name = xname, \
2658 .index = 0, \
2659 .info = stac92xx_hp_switch_info, \
2660 .get = stac92xx_hp_switch_get, \
2661 .put = stac92xx_hp_switch_put, \
2662 }
2663
403d1944
MP		 2664#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2665 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2666 .name = xname, \
2667 .index = 0, \
2668 .info = stac92xx_io_switch_info, \
2669 .get = stac92xx_io_switch_get, \
2670 .put = stac92xx_io_switch_put, \
2671 .private_value = xpval, \
2672 }
2673
0fb87bb4
ML		 2674#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2675 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2676 .name = xname, \
2677 .index = 0, \
2678 .info = stac92xx_clfe_switch_info, \
2679 .get = stac92xx_clfe_switch_get, \
2680 .put = stac92xx_clfe_switch_put, \
2681 .private_value = xpval, \
2682 }
403d1944 2683
c7d4b2fa
M		 2684enum {
2685 STAC_CTL_WIDGET_VOL,
2686 STAC_CTL_WIDGET_MUTE,
09a99959 2687 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2688 STAC_CTL_WIDGET_AMP_MUX,
2689 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2690 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2691 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2692 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2693};
2694
c8b6bf9b 2695static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2696 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2697 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2698 STAC_MONO_MUX,
89385035
MR		 2699 STAC_AMP_MUX,
2700 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2701 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2702 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2703 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2704};
2705
2706/* add dynamic controls */
4d4e9bb3
TI		 2707static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2708 struct snd_kcontrol_new *ktemp,
2709 int idx, const char *name,
2710 unsigned long val)
c7d4b2fa 2711{
c8b6bf9b 2712 struct snd_kcontrol_new *knew;
c7d4b2fa 2713
603c4019
TI		 2714 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2715 knew = snd_array_new(&spec->kctls);
2716 if (!knew)
2717 return -ENOMEM;
4d4e9bb3 2718 *knew = *ktemp;
4682eee0 2719 knew->index = idx;
82fe0c58 2720 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2721 if (!knew->name)
c7d4b2fa
M		 2722 return -ENOMEM;
2723 knew->private_value = val;
c7d4b2fa
M		 2724 return 0;
2725}
2726
4d4e9bb3
TI		 2727static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2728 int type, int idx, const char *name,
2729 unsigned long val)
2730{
2731 return stac92xx_add_control_temp(spec,
2732 &stac92xx_control_templates[type],
2733 idx, name, val);
2734}
2735
4682eee0
MR		 2736
2737/* add dynamic controls */
4d4e9bb3
TI		 2738static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2739 const char *name, unsigned long val)
4682eee0
MR		 2740{
2741 return stac92xx_add_control_idx(spec, type, 0, name, val);
2742}
2743
403d1944
MP		 2744/* flag inputs as additional dynamic lineouts */
2745static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2746{
2747 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2748 unsigned int wcaps, wtype;
2749 int i, num_dacs = 0;
2750
2751 /* use the wcaps cache to count all DACs available for line-outs */
2752 for (i = 0; i < codec->num_nodes; i++) {
2753 wcaps = codec->wcaps[i];
2754 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2755
7b043899
SL		 2756 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2757 num_dacs++;
2758 }
403d1944 2759
7b043899
SL		 2760 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2761
403d1944
MP		 2762 switch (cfg->line_outs) {
2763 case 3:
2764 /* add line-in as side */
7b043899 2765 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2766 cfg->line_out_pins[cfg->line_outs] =
2767 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2768 spec->line_switch = 1;
2769 cfg->line_outs++;
2770 }
2771 break;
2772 case 2:
2773 /* add line-in as clfe and mic as side */
7b043899 2774 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2775 cfg->line_out_pins[cfg->line_outs] =
2776 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2777 spec->line_switch = 1;
2778 cfg->line_outs++;
2779 }
7b043899 2780 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2781 cfg->line_out_pins[cfg->line_outs] =
2782 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2783 spec->mic_switch = 1;
2784 cfg->line_outs++;
2785 }
2786 break;
2787 case 1:
2788 /* add line-in as surr and mic as clfe */
7b043899 2789 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2790 cfg->line_out_pins[cfg->line_outs] =
2791 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2792 spec->line_switch = 1;
2793 cfg->line_outs++;
2794 }
7b043899 2795 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2796 cfg->line_out_pins[cfg->line_outs] =
2797 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2798 spec->mic_switch = 1;
2799 cfg->line_outs++;
2800 }
2801 break;
2802 }
2803
2804 return 0;
2805}
2806
7b043899
SL		 2807
2808static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2809{
2810 int i;
2811
2812 for (i = 0; i < spec->multiout.num_dacs; i++) {
2813 if (spec->multiout.dac_nids[i] == nid)
2814 return 1;
2815 }
2816
2817 return 0;
2818}
2819
3cc08dc6 2820/*
7b043899
SL		 2821 * Fill in the dac_nids table from the parsed pin configuration
2822 * This function only works when every pin in line_out_pins[]
2823 * contains atleast one DAC in its connection list. Some 92xx
2824 * codecs are not connected directly to a DAC, such as the 9200
2825 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2826 */
19039bd0 2827static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2828 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2829{
2830 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2831 int i, j, conn_len = 0;
2832 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2833 unsigned int wcaps, wtype;
2834
c7d4b2fa
M		 2835 for (i = 0; i < cfg->line_outs; i++) {
2836 nid = cfg->line_out_pins[i];
7b043899
SL		 2837 conn_len = snd_hda_get_connections(codec, nid, conn,
2838 HDA_MAX_CONNECTIONS);
2839 for (j = 0; j < conn_len; j++) {
2840 wcaps = snd_hda_param_read(codec, conn[j],
2841 AC_PAR_AUDIO_WIDGET_CAP);
2842 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2843 if (wtype != AC_WID_AUD_OUT ||
2844 (wcaps & AC_WCAP_DIGITAL))
2845 continue;
2846 /* conn[j] is a DAC routed to this line-out */
2847 if (!is_in_dac_nids(spec, conn[j]))
2848 break;
2849 }
2850
2851 if (j == conn_len) {
df802952
TI		 2852 if (spec->multiout.num_dacs > 0) {
2853 /* we have already working output pins,
2854 * so let's drop the broken ones again
2855 */
2856 cfg->line_outs = spec->multiout.num_dacs;
2857 break;
2858 }
7b043899
SL		 2859 /* error out, no available DAC found */
2860 snd_printk(KERN_ERR
2861 "%s: No available DAC for pin 0x%x\n",
2862 __func__, nid);
2863 return -ENODEV;
2864 }
2865
2866 spec->multiout.dac_nids[i] = conn[j];
2867 spec->multiout.num_dacs++;
2868 if (conn_len > 1) {
2869 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2870 snd_hda_codec_write_cache(codec, nid, 0,
2871 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2872
7b043899
SL		 2873 }
2874 }
c7d4b2fa 2875
7b043899
SL		 2876 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2877 spec->multiout.num_dacs,
2878 spec->multiout.dac_nids[0],
2879 spec->multiout.dac_nids[1],
2880 spec->multiout.dac_nids[2],
2881 spec->multiout.dac_nids[3],
2882 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2883 return 0;
2884}
2885
eb06ed8f
TI		 2886/* create volume control/switch for the given prefx type */
2887static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2888{
2889 char name[32];
2890 int err;
2891
2892 sprintf(name, "%s Playback Volume", pfx);
2893 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2894 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2895 if (err < 0)
2896 return err;
2897 sprintf(name, "%s Playback Switch", pfx);
2898 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2899 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2900 if (err < 0)
2901 return err;
2902 return 0;
2903}
2904
ae0afd81
MR		 2905static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2906{
2907 if (!spec->multiout.hp_nid)
2908 spec->multiout.hp_nid = nid;
2909 else if (spec->multiout.num_dacs > 4) {
2910 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2911 return 1;
2912 } else {
2913 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2914 spec->multiout.num_dacs++;
2915 }
2916 return 0;
2917}
2918
2919static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2920{
2921 if (is_in_dac_nids(spec, nid))
2922 return 1;
2923 if (spec->multiout.hp_nid == nid)
2924 return 1;
2925 return 0;
2926}
2927
c7d4b2fa 2928/* add playback controls from the parsed DAC table */
0fb87bb4 2929static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2930 const struct auto_pin_cfg *cfg)
c7d4b2fa 2931{
19039bd0
TI		 2932 static const char *chname[4] = {
2933 "Front", "Surround", NULL /*CLFE*/, "Side"
2934 };
d21995e3 2935 hda_nid_t nid = 0;
c7d4b2fa
M		 2936 int i, err;
2937
0fb87bb4 2938 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2939 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2940
2941
40ac8c4f 2942 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2943 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2944 continue;
2945
2946 nid = spec->multiout.dac_nids[i];
2947
2948 if (i == 2) {
2949 /* Center/LFE */
eb06ed8f
TI		 2950 err = create_controls(spec, "Center", nid, 1);
2951 if (err < 0)
c7d4b2fa 2952 return err;
eb06ed8f
TI		 2953 err = create_controls(spec, "LFE", nid, 2);
2954 if (err < 0)
c7d4b2fa 2955 return err;
0fb87bb4
ML		 2956
2957 wid_caps = get_wcaps(codec, nid);
2958
2959 if (wid_caps & AC_WCAP_LR_SWAP) {
2960 err = stac92xx_add_control(spec,
2961 STAC_CTL_WIDGET_CLFE_SWITCH,
2962 "Swap Center/LFE Playback Switch", nid);
2963
2964 if (err < 0)
2965 return err;
2966 }
2967
c7d4b2fa 2968 } else {
eb06ed8f
TI		 2969 err = create_controls(spec, chname[i], nid, 3);
2970 if (err < 0)
c7d4b2fa
M		 2971 return err;
2972 }
2973 }
2974
fedb7569
MR		 2975 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
2976 cfg->hp_outs && !spec->multiout.hp_nid)
2977 spec->multiout.hp_nid = nid;
2978
a9cb5c90 2979 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 2980 err = stac92xx_add_control(spec,
2981 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 2982 "Headphone as Line Out Switch",
2983 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 2984 if (err < 0)
2985 return err;
2986 }
2987
b5895dc8
MR		 2988 if (spec->line_switch) {
2989 nid = cfg->input_pins[AUTO_PIN_LINE];
2990 pincap = snd_hda_param_read(codec, nid,
2991 AC_PAR_PIN_CAP);
2992 if (pincap & AC_PINCAP_OUT) {
2993 err = stac92xx_add_control(spec,
2994 STAC_CTL_WIDGET_IO_SWITCH,
2995 "Line In as Output Switch", nid << 8);
2996 if (err < 0)
2997 return err;
2998 }
2999 }
403d1944 3000
b5895dc8 3001 if (spec->mic_switch) {
cace16f1 3002 unsigned int def_conf;
ae0afd81
MR		 3003 unsigned int mic_pin = AUTO_PIN_MIC;
3004again:
3005 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 3006 def_conf = snd_hda_codec_read(codec, nid, 0,
3007 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 3008 /* some laptops have an internal analog microphone
3009 * which can't be used as a output */
3010 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
3011 pincap = snd_hda_param_read(codec, nid,
3012 AC_PAR_PIN_CAP);
3013 if (pincap & AC_PINCAP_OUT) {
3014 err = stac92xx_add_control(spec,
3015 STAC_CTL_WIDGET_IO_SWITCH,
3016 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 3017 nid = snd_hda_codec_read(codec, nid, 0,
3018 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3019 if (!check_in_dac_nids(spec, nid))
3020 add_spec_dacs(spec, nid);
cace16f1
MR		 3021 if (err < 0)
3022 return err;
3023 }
ae0afd81
MR		 3024 } else if (mic_pin == AUTO_PIN_MIC) {
3025 mic_pin = AUTO_PIN_FRONT_MIC;
3026 goto again;
b5895dc8
MR		 3027 }
3028 }
403d1944 3029
c7d4b2fa
M		 3030 return 0;
3031}
3032
eb06ed8f
TI		 3033/* add playback controls for Speaker and HP outputs */
3034static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3035 struct auto_pin_cfg *cfg)
3036{
3037 struct sigmatel_spec *spec = codec->spec;
3038 hda_nid_t nid;
3039 int i, old_num_dacs, err;
3040
3041 old_num_dacs = spec->multiout.num_dacs;
3042 for (i = 0; i < cfg->hp_outs; i++) {
3043 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3044 if (wid_caps & AC_WCAP_UNSOL_CAP)
3045 spec->hp_detect = 1;
3046 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
3047 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3048 if (check_in_dac_nids(spec, nid))
3049 nid = 0;
3050 if (! nid)
c7d4b2fa 3051 continue;
eb06ed8f
TI		 3052 add_spec_dacs(spec, nid);
3053 }
3054 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 3055 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 3056 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3057 if (check_in_dac_nids(spec, nid))
3058 nid = 0;
eb06ed8f
TI		 3059 if (! nid)
3060 continue;
3061 add_spec_dacs(spec, nid);
c7d4b2fa 3062 }
1b290a51
MR		 3063 for (i = 0; i < cfg->line_outs; i++) {
3064 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
3065 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3066 if (check_in_dac_nids(spec, nid))
3067 nid = 0;
3068 if (! nid)
3069 continue;
3070 add_spec_dacs(spec, nid);
3071 }
eb06ed8f
TI		 3072 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
3073 static const char *pfxs[] = {
3074 "Speaker", "External Speaker", "Speaker2",
3075 };
3076 err = create_controls(spec, pfxs[i - old_num_dacs],
3077 spec->multiout.dac_nids[i], 3);
3078 if (err < 0)
3079 return err;
3080 }
3081 if (spec->multiout.hp_nid) {
2626a263
TI		 3082 err = create_controls(spec, "Headphone",
3083 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 3084 if (err < 0)
3085 return err;
3086 }
c7d4b2fa
M		 3087
3088 return 0;
3089}
3090
b22b4821 3091/* labels for mono mux outputs */
d0513fc6
MR		 3092static const char *stac92xx_mono_labels[4] = {
3093 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3094};
3095
3096/* create mono mux for mono out on capable codecs */
3097static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3098{
3099 struct sigmatel_spec *spec = codec->spec;
3100 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3101 int i, num_cons;
3102 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3103
3104 num_cons = snd_hda_get_connections(codec,
3105 spec->mono_nid,
3106 con_lst,
3107 HDA_MAX_NUM_INPUTS);
3108 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3109 return -EINVAL;
3110
3111 for (i = 0; i < num_cons; i++) {
3112 mono_mux->items[mono_mux->num_items].label =
3113 stac92xx_mono_labels[i];
3114 mono_mux->items[mono_mux->num_items].index = i;
3115 mono_mux->num_items++;
3116 }
09a99959
MR		 3117
3118 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3119 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3120}
3121
89385035
MR		 3122/* labels for amp mux outputs */
3123static const char *stac92xx_amp_labels[3] = {
4b33c767 3124 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3125};
3126
3127/* create amp out controls mux on capable codecs */
3128static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3129{
3130 struct sigmatel_spec *spec = codec->spec;
3131 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3132 int i, err;
3133
2a9c7816 3134 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3135 amp_mux->items[amp_mux->num_items].label =
3136 stac92xx_amp_labels[i];
3137 amp_mux->items[amp_mux->num_items].index = i;
3138 amp_mux->num_items++;
3139 }
3140
2a9c7816
MR		 3141 if (spec->num_amps > 1) {
3142 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3143 "Amp Selector Capture Switch", 0);
3144 if (err < 0)
3145 return err;
3146 }
89385035
MR		 3147 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3148 "Amp Capture Volume",
3149 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3150}
3151
3152
1cd2224c
MR		 3153/* create PC beep volume controls */
3154static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3155 hda_nid_t nid)
3156{
3157 struct sigmatel_spec *spec = codec->spec;
3158 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3159 int err;
3160
3161 /* check for mute support for the the amp */
3162 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3163 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3164 "PC Beep Playback Switch",
3165 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3166 if (err < 0)
3167 return err;
3168 }
3169
3170 /* check to see if there is volume support for the amp */
3171 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3172 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3173 "PC Beep Playback Volume",
3174 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3175 if (err < 0)
3176 return err;
3177 }
3178 return 0;
3179}
3180
4d4e9bb3
TI		 3181#ifdef CONFIG_SND_HDA_INPUT_BEEP
3182#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3183
3184static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3185 struct snd_ctl_elem_value *ucontrol)
3186{
3187 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3188 ucontrol->value.integer.value[0] = codec->beep->enabled;
3189 return 0;
3190}
3191
3192static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3193 struct snd_ctl_elem_value *ucontrol)
3194{
3195 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3196 int enabled = !!ucontrol->value.integer.value[0];
3197 if (codec->beep->enabled != enabled) {
3198 codec->beep->enabled = enabled;
3199 return 1;
3200 }
3201 return 0;
3202}
3203
3204static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3205 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3206 .info = stac92xx_dig_beep_switch_info,
3207 .get = stac92xx_dig_beep_switch_get,
3208 .put = stac92xx_dig_beep_switch_put,
3209};
3210
3211static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3212{
3213 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3214 0, "PC Beep Playback Switch", 0);
3215}
3216#endif
3217
4682eee0
MR		 3218static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3219{
3220 struct sigmatel_spec *spec = codec->spec;
3221 int wcaps, nid, i, err = 0;
3222
3223 for (i = 0; i < spec->num_muxes; i++) {
3224 nid = spec->mux_nids[i];
3225 wcaps = get_wcaps(codec, nid);
3226
3227 if (wcaps & AC_WCAP_OUT_AMP) {
3228 err = stac92xx_add_control_idx(spec,
3229 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3230 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3231 if (err < 0)
3232 return err;
3233 }
3234 }
3235 return 0;
3236};
3237
d9737751 3238static const char *stac92xx_spdif_labels[3] = {
65973632 3239 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3240};
3241
3242static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3243{
3244 struct sigmatel_spec *spec = codec->spec;
3245 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3246 const char **labels = spec->spdif_labels;
d9737751 3247 int i, num_cons;
65973632 3248 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3249
3250 num_cons = snd_hda_get_connections(codec,
3251 spec->smux_nids[0],
3252 con_lst,
3253 HDA_MAX_NUM_INPUTS);
65973632 3254 if (!num_cons)
d9737751
MR		 3255 return -EINVAL;
3256
65973632
MR		 3257 if (!labels)
3258 labels = stac92xx_spdif_labels;
3259
d9737751 3260 for (i = 0; i < num_cons; i++) {
65973632 3261 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3262 spdif_mux->items[spdif_mux->num_items].index = i;
3263 spdif_mux->num_items++;
3264 }
3265
3266 return 0;
3267}
3268
8b65727b 3269/* labels for dmic mux inputs */
ddc2cec4 3270static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3271 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3272 "Digital Mic 3", "Digital Mic 4"
3273};
3274
3275/* create playback/capture controls for input pins on dmic capable codecs */
3276static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3277 const struct auto_pin_cfg *cfg)
3278{
3279 struct sigmatel_spec *spec = codec->spec;
3280 struct hda_input_mux *dimux = &spec->private_dimux;
3281 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3282 int err, i, j;
3283 char name[32];
8b65727b
MP		 3284
3285 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3286 dimux->items[dimux->num_items].index = 0;
3287 dimux->num_items++;
3288
3289 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3290 hda_nid_t nid;
8b65727b
MP		 3291 int index;
3292 int num_cons;
0678accd 3293 unsigned int wcaps;
8b65727b
MP		 3294 unsigned int def_conf;
3295
3296 def_conf = snd_hda_codec_read(codec,
3297 spec->dmic_nids[i],
3298 0,
3299 AC_VERB_GET_CONFIG_DEFAULT,
3300 0);
3301 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3302 continue;
3303
0678accd 3304 nid = spec->dmic_nids[i];
8b65727b 3305 num_cons = snd_hda_get_connections(codec,
e1f0d669 3306 spec->dmux_nids[0],
8b65727b
MP		 3307 con_lst,
3308 HDA_MAX_NUM_INPUTS);
3309 for (j = 0; j < num_cons; j++)
0678accd 3310 if (con_lst[j] == nid) {
8b65727b
MP		 3311 index = j;
3312 goto found;
3313 }
3314 continue;
3315found:
d0513fc6
MR		 3316 wcaps = get_wcaps(codec, nid) &
3317 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3318
d0513fc6 3319 if (wcaps) {
0678accd
MR		 3320 sprintf(name, "%s Capture Volume",
3321 stac92xx_dmic_labels[dimux->num_items]);
3322
3323 err = stac92xx_add_control(spec,
3324 STAC_CTL_WIDGET_VOL,
3325 name,
d0513fc6
MR		 3326 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3327 (wcaps & AC_WCAP_OUT_AMP) ?
3328 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3329 if (err < 0)
3330 return err;
3331 }
3332
8b65727b
MP		 3333 dimux->items[dimux->num_items].label =
3334 stac92xx_dmic_labels[dimux->num_items];
3335 dimux->items[dimux->num_items].index = index;
3336 dimux->num_items++;
3337 }
3338
3339 return 0;
3340}
3341
c7d4b2fa
M		 3342/* create playback/capture controls for input pins */
3343static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3344{
3345 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3346 struct hda_input_mux *imux = &spec->private_imux;
3347 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3348 int i, j, k;
3349
3350 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3351 int index;
3352
3353 if (!cfg->input_pins[i])
3354 continue;
3355 index = -1;
3356 for (j = 0; j < spec->num_muxes; j++) {
3357 int num_cons;
3358 num_cons = snd_hda_get_connections(codec,
3359 spec->mux_nids[j],
3360 con_lst,
3361 HDA_MAX_NUM_INPUTS);
3362 for (k = 0; k < num_cons; k++)
3363 if (con_lst[k] == cfg->input_pins[i]) {
3364 index = k;
3365 goto found;
3366 }
c7d4b2fa 3367 }
314634bc
TI		 3368 continue;
3369 found:
3370 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3371 imux->items[imux->num_items].index = index;
3372 imux->num_items++;
c7d4b2fa
M		 3373 }
3374
7b043899 3375 if (imux->num_items) {
62fe78e9
SR		 3376 /*
3377 * Set the current input for the muxes.
3378 * The STAC9221 has two input muxes with identical source
3379 * NID lists. Hopefully this won't get confused.
3380 */
3381 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3382 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3383 AC_VERB_SET_CONNECT_SEL,
3384 imux->items[0].index);
62fe78e9
SR		 3385 }
3386 }
3387
c7d4b2fa
M		 3388 return 0;
3389}
3390
c7d4b2fa
M		 3391static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3392{
3393 struct sigmatel_spec *spec = codec->spec;
3394 int i;
3395
3396 for (i = 0; i < spec->autocfg.line_outs; i++) {
3397 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3398 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3399 }
3400}
3401
3402static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3403{
3404 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3405 int i;
c7d4b2fa 3406
eb06ed8f
TI		 3407 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3408 hda_nid_t pin;
3409 pin = spec->autocfg.hp_pins[i];
3410 if (pin) /* connect to front */
3411 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3412 }
3413 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3414 hda_nid_t pin;
3415 pin = spec->autocfg.speaker_pins[i];
3416 if (pin) /* connect to front */
3417 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3418 }
c7d4b2fa
M		 3419}
3420
3cc08dc6 3421static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3422{
3423 struct sigmatel_spec *spec = codec->spec;
3424 int err;
bcecd9bd 3425 int hp_speaker_swap = 0;
c7d4b2fa 3426
8b65727b
MP		 3427 if ((err = snd_hda_parse_pin_def_config(codec,
3428 &spec->autocfg,
3429 spec->dmic_nids)) < 0)
c7d4b2fa 3430 return err;
82bc955f 3431 if (! spec->autocfg.line_outs)
869264c4 3432 return 0; /* can't find valid pin config */
19039bd0 3433
bcecd9bd
JZ		 3434 /* If we have no real line-out pin and multiple hp-outs, HPs should
3435 * be set up as multi-channel outputs.
3436 */
3437 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3438 spec->autocfg.hp_outs > 1) {
3439 /* Copy hp_outs to line_outs, backup line_outs in
3440 * speaker_outs so that the following routines can handle
3441 * HP pins as primary outputs.
3442 */
3443 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3444 sizeof(spec->autocfg.line_out_pins));
3445 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3446 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3447 sizeof(spec->autocfg.hp_pins));
3448 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3449 hp_speaker_swap = 1;
3450 }
09a99959 3451 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3452 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3453 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3454 u32 caps = query_amp_caps(codec,
3455 spec->autocfg.mono_out_pin, dir);
3456 hda_nid_t conn_list[1];
3457
3458 /* get the mixer node and then the mono mux if it exists */
3459 if (snd_hda_get_connections(codec,
3460 spec->autocfg.mono_out_pin, conn_list, 1) &&
3461 snd_hda_get_connections(codec, conn_list[0],
3462 conn_list, 1)) {
3463
3464 int wcaps = get_wcaps(codec, conn_list[0]);
3465 int wid_type = (wcaps & AC_WCAP_TYPE)
3466 >> AC_WCAP_TYPE_SHIFT;
3467 /* LR swap check, some stac925x have a mux that
3468 * changes the DACs output path instead of the
3469 * mono-mux path.
3470 */
3471 if (wid_type == AC_WID_AUD_SEL &&
3472 !(wcaps & AC_WCAP_LR_SWAP))
3473 spec->mono_nid = conn_list[0];
3474 }
d0513fc6
MR		 3475 if (dir) {
3476 hda_nid_t nid = spec->autocfg.mono_out_pin;
3477
3478 /* most mono outs have a least a mute/unmute switch */
3479 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3480 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3481 "Mono Playback Switch",
3482 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3483 if (err < 0)
3484 return err;
d0513fc6
MR		 3485 /* check for volume support for the amp */
3486 if ((caps & AC_AMPCAP_NUM_STEPS)
3487 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3488 err = stac92xx_add_control(spec,
3489 STAC_CTL_WIDGET_VOL,
3490 "Mono Playback Volume",
3491 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3492 if (err < 0)
3493 return err;
3494 }
09a99959
MR		 3495 }
3496
3497 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3498 AC_PINCTL_OUT_EN);
3499 }
bcecd9bd 3500
403d1944
MP		 3501 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3502 return err;
19039bd0
TI		 3503 if (spec->multiout.num_dacs == 0)
3504 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3505 return err;
c7d4b2fa 3506
0fb87bb4
ML		 3507 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3508
3509 if (err < 0)
3510 return err;
3511
1cd2224c
MR		 3512 /* setup analog beep controls */
3513 if (spec->anabeep_nid > 0) {
3514 err = stac92xx_auto_create_beep_ctls(codec,
3515 spec->anabeep_nid);
3516 if (err < 0)
3517 return err;
3518 }
3519
3520 /* setup digital beep controls and input device */
3521#ifdef CONFIG_SND_HDA_INPUT_BEEP
3522 if (spec->digbeep_nid > 0) {
3523 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3524 unsigned int caps;
1cd2224c
MR		 3525
3526 err = stac92xx_auto_create_beep_ctls(codec, nid);
3527 if (err < 0)
3528 return err;
3529 err = snd_hda_attach_beep_device(codec, nid);
3530 if (err < 0)
3531 return err;
4d4e9bb3
TI		 3532 /* if no beep switch is available, make its own one */
3533 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3534 if (codec->beep &&
3535 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3536 err = stac92xx_beep_switch_ctl(codec);
3537 if (err < 0)
3538 return err;
3539 }
1cd2224c
MR		 3540 }
3541#endif
3542
bcecd9bd
JZ		 3543 if (hp_speaker_swap == 1) {
3544 /* Restore the hp_outs and line_outs */
3545 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3546 sizeof(spec->autocfg.line_out_pins));
3547 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3548 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3549 sizeof(spec->autocfg.speaker_pins));
3550 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3551 memset(spec->autocfg.speaker_pins, 0,
3552 sizeof(spec->autocfg.speaker_pins));
3553 spec->autocfg.speaker_outs = 0;
3554 }
3555
0fb87bb4
ML		 3556 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3557
3558 if (err < 0)
3559 return err;
3560
3561 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3562
3563 if (err < 0)
c7d4b2fa
M		 3564 return err;
3565
b22b4821
MR		 3566 if (spec->mono_nid > 0) {
3567 err = stac92xx_auto_create_mono_output_ctls(codec);
3568 if (err < 0)
3569 return err;
3570 }
2a9c7816 3571 if (spec->num_amps > 0) {
89385035
MR		 3572 err = stac92xx_auto_create_amp_output_ctls(codec);
3573 if (err < 0)
3574 return err;
3575 }
2a9c7816 3576 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3577 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3578 &spec->autocfg)) < 0)
3579 return err;
4682eee0
MR		 3580 if (spec->num_muxes > 0) {
3581 err = stac92xx_auto_create_mux_input_ctls(codec);
3582 if (err < 0)
3583 return err;
3584 }
d9737751
MR		 3585 if (spec->num_smuxes > 0) {
3586 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3587 if (err < 0)
3588 return err;
3589 }
8b65727b 3590
c7d4b2fa 3591 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3592 if (spec->multiout.max_channels > 2)
c7d4b2fa 3593 spec->surr_switch = 1;
c7d4b2fa 3594
82bc955f 3595 if (spec->autocfg.dig_out_pin)
3cc08dc6 3596 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3597 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3598 spec->dig_in_nid = dig_in;
c7d4b2fa 3599
603c4019
TI		 3600 if (spec->kctls.list)
3601 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3602
3603 spec->input_mux = &spec->private_imux;
2a9c7816 3604 spec->dinput_mux = &spec->private_dimux;
d9737751 3605 spec->sinput_mux = &spec->private_smux;
b22b4821 3606 spec->mono_mux = &spec->private_mono_mux;
89385035 3607 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3608 return 1;
3609}
3610
82bc955f
TI		 3611/* add playback controls for HP output */
3612static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3613 struct auto_pin_cfg *cfg)
3614{
3615 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3616 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3617 unsigned int wid_caps;
3618
3619 if (! pin)
3620 return 0;
3621
3622 wid_caps = get_wcaps(codec, pin);
505cb341 3623 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3624 spec->hp_detect = 1;
82bc955f
TI		 3625
3626 return 0;
3627}
3628
160ea0dc
RF		 3629/* add playback controls for LFE output */
3630static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3631 struct auto_pin_cfg *cfg)
3632{
3633 struct sigmatel_spec *spec = codec->spec;
3634 int err;
3635 hda_nid_t lfe_pin = 0x0;
3636 int i;
3637
3638 /*
3639 * search speaker outs and line outs for a mono speaker pin
3640 * with an amp. If one is found, add LFE controls
3641 * for it.
3642 */
3643 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3644 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3645 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3646 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3647 if (wcaps == AC_WCAP_OUT_AMP)
3648 /* found a mono speaker with an amp, must be lfe */
3649 lfe_pin = pin;
3650 }
3651
3652 /* if speaker_outs is 0, then speakers may be in line_outs */
3653 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3654 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3655 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3656 unsigned int defcfg;
8b551785 3657 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3658 AC_VERB_GET_CONFIG_DEFAULT,
3659 0x00);
8b551785 3660 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3661 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3662 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3663 if (wcaps == AC_WCAP_OUT_AMP)
3664 /* found a mono speaker with an amp,
3665 must be lfe */
3666 lfe_pin = pin;
3667 }
3668 }
3669 }
3670
3671 if (lfe_pin) {
eb06ed8f 3672 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3673 if (err < 0)
3674 return err;
3675 }
3676
3677 return 0;
3678}
3679
c7d4b2fa
M		 3680static int stac9200_parse_auto_config(struct hda_codec *codec)
3681{
3682 struct sigmatel_spec *spec = codec->spec;
3683 int err;
3684
df694daa 3685 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3686 return err;
3687
3688 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3689 return err;
3690
82bc955f
TI		 3691 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3692 return err;
3693
160ea0dc
RF		 3694 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3695 return err;
3696
355a0ec4
TI		 3697 if (spec->num_muxes > 0) {
3698 err = stac92xx_auto_create_mux_input_ctls(codec);
3699 if (err < 0)
3700 return err;
3701 }
3702
82bc955f 3703 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3704 spec->multiout.dig_out_nid = 0x05;
82bc955f 3705 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3706 spec->dig_in_nid = 0x04;
c7d4b2fa 3707
603c4019
TI		 3708 if (spec->kctls.list)
3709 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3710
3711 spec->input_mux = &spec->private_imux;
8b65727b 3712 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3713
3714 return 1;
3715}
3716
62fe78e9
SR		 3717/*
3718 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3719 * funky external mute control using GPIO pins.
3720 */
3721
76e1ddfb 3722static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3723 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3724{
3725 unsigned int gpiostate, gpiomask, gpiodir;
3726
3727 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3728 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3729 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3730
3731 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3732 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3733 gpiomask |= mask;
62fe78e9
SR		 3734
3735 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3736 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3737 gpiodir |= dir_mask;
62fe78e9 3738
76e1ddfb 3739 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3740 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3741
3742 snd_hda_codec_write(codec, codec->afg, 0,
3743 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3744 snd_hda_codec_read(codec, codec->afg, 0,
3745 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3746
3747 msleep(1);
3748
76e1ddfb
TI		 3749 snd_hda_codec_read(codec, codec->afg, 0,
3750 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3751}
3752
74aeaabc
MR		 3753static int stac92xx_add_jack(struct hda_codec *codec,
3754 hda_nid_t nid, int type)
3755{
e4973e1e 3756#ifdef CONFIG_SND_JACK
74aeaabc
MR		 3757 struct sigmatel_spec *spec = codec->spec;
3758 struct sigmatel_jack *jack;
3759 int def_conf = snd_hda_codec_read(codec, nid,
3760 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3761 int connectivity = get_defcfg_connect(def_conf);
3762 char name[32];
3763
3764 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3765 return 0;
3766
3767 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3768 jack = snd_array_new(&spec->jacks);
3769 if (!jack)
3770 return -ENOMEM;
3771 jack->nid = nid;
3772 jack->type = type;
3773
3774 sprintf(name, "%s at %s %s Jack",
3775 snd_hda_get_jack_type(def_conf),
3776 snd_hda_get_jack_connectivity(def_conf),
3777 snd_hda_get_jack_location(def_conf));
3778
3779 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI		 3780#else
3781 return 0;
3782#endif
74aeaabc
MR		 3783}
3784
c6e4c666
TI		 3785static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3786 unsigned char type, int data)
74aeaabc
MR		 3787{
3788 struct sigmatel_event *event;
3789
3790 snd_array_init(&spec->events, sizeof(*event), 32);
3791 event = snd_array_new(&spec->events);
3792 if (!event)
3793 return -ENOMEM;
3794 event->nid = nid;
c6e4c666
TI		 3795 event->type = type;
3796 event->tag = spec->events.used;
74aeaabc
MR		 3797 event->data = data;
3798
c6e4c666 3799 return event->tag;
74aeaabc
MR		 3800}
3801
c6e4c666
TI		 3802static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3803 hda_nid_t nid, unsigned char type)
74aeaabc
MR		 3804{
3805 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 3806 struct sigmatel_event *event = spec->events.list;
3807 int i;
3808
3809 for (i = 0; i < spec->events.used; i++, event++) {
3810 if (event->nid == nid && event->type == type)
3811 return event;
74aeaabc 3812 }
c6e4c666 3813 return NULL;
74aeaabc
MR		 3814}
3815
c6e4c666
TI		 3816static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3817 unsigned char tag)
314634bc 3818{
c6e4c666
TI		 3819 struct sigmatel_spec *spec = codec->spec;
3820 struct sigmatel_event *event = spec->events.list;
3821 int i;
3822
3823 for (i = 0; i < spec->events.used; i++, event++) {
3824 if (event->tag == tag)
3825 return event;
74aeaabc 3826 }
c6e4c666
TI		 3827 return NULL;
3828}
3829
3830static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3831 unsigned int type)
3832{
3833 struct sigmatel_event *event;
3834 int tag;
3835
3836 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3837 return;
3838 event = stac_get_event(codec, nid, type);
3839 if (event)
3840 tag = event->tag;
3841 else
3842 tag = stac_add_event(codec->spec, nid, type, 0);
3843 if (tag < 0)
3844 return;
3845 snd_hda_codec_write_cache(codec, nid, 0,
3846 AC_VERB_SET_UNSOLICITED_ENABLE,
3847 AC_USRSP_EN | tag);
314634bc
TI		 3848}
3849
a64135a2
MR		 3850static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3851{
3852 int i;
3853 for (i = 0; i < cfg->hp_outs; i++)
3854 if (cfg->hp_pins[i] == nid)
3855 return 1; /* nid is a HP-Out */
3856
3857 return 0; /* nid is not a HP-Out */
3858};
3859
b76c850f
MR		 3860static void stac92xx_power_down(struct hda_codec *codec)
3861{
3862 struct sigmatel_spec *spec = codec->spec;
3863
3864 /* power down inactive DACs */
3865 hda_nid_t *dac;
3866 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3867 if (!is_in_dac_nids(spec, *dac) &&
3868 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3869 snd_hda_codec_write_cache(codec, *dac, 0,
3870 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3871}
3872
f73d3585
TI		 3873static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3874 int enable);
3875
c7d4b2fa
M		 3876static int stac92xx_init(struct hda_codec *codec)
3877{
3878 struct sigmatel_spec *spec = codec->spec;
82bc955f 3879 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3880 unsigned int gpio;
e4973e1e 3881 int i;
c7d4b2fa 3882
c7d4b2fa
M		 3883 snd_hda_sequence_write(codec, spec->init);
3884
8daaaa97
MR		 3885 /* power down adcs initially */
3886 if (spec->powerdown_adcs)
3887 for (i = 0; i < spec->num_adcs; i++)
3888 snd_hda_codec_write_cache(codec,
3889 spec->adc_nids[i], 0,
3890 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI		 3891
3892 /* set up GPIO */
3893 gpio = spec->gpio_data;
3894 /* turn on EAPD statically when spec->eapd_switch isn't set.
3895 * otherwise, unsol event will turn it on/off dynamically
3896 */
3897 if (!spec->eapd_switch)
3898 gpio |= spec->eapd_mask;
3899 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3900
82bc955f
TI		 3901 /* set up pins */
3902 if (spec->hp_detect) {
505cb341 3903 /* Enable unsolicited responses on the HP widget */
74aeaabc 3904 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 3905 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 3906 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 3907 }
0a07acaf
TI		 3908 /* force to enable the first line-out; the others are set up
3909 * in unsol_event
3910 */
3911 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3912 AC_PINCTL_OUT_EN);
82bc955f 3913 /* fake event to set up pins */
c6e4c666
TI		 3914 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
3915 STAC_HP_EVENT);
82bc955f
TI		 3916 } else {
3917 stac92xx_auto_init_multi_out(codec);
3918 stac92xx_auto_init_hp_out(codec);
3919 }
3920 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3921 hda_nid_t nid = cfg->input_pins[i];
3922 if (nid) {
4f1e6bc3
TI		 3923 unsigned int pinctl;
3924 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3925 /* for mic pins, force to initialize */
3926 pinctl = stac92xx_get_vref(codec, nid);
3927 } else {
3928 pinctl = snd_hda_codec_read(codec, nid, 0,
3929 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3930 /* if PINCTL already set then skip */
3931 if (pinctl & AC_PINCTL_IN_EN)
3932 continue;
3933 }
3934 pinctl |= AC_PINCTL_IN_EN;
c960a03b 3935 stac92xx_auto_set_pinctl(codec, nid, pinctl);
c6e4c666 3936 enable_pin_detect(codec, nid, STAC_INSERT_EVENT);
c960a03b 3937 }
82bc955f 3938 }
a64135a2
MR		 3939 for (i = 0; i < spec->num_dmics; i++)
3940 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3941 AC_PINCTL_IN_EN);
f73d3585
TI		 3942 if (cfg->dig_out_pin)
3943 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3944 AC_PINCTL_OUT_EN);
3945 if (cfg->dig_in_pin)
3946 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3947 AC_PINCTL_IN_EN);
a64135a2 3948 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 3949 hda_nid_t nid = spec->pwr_nids[i];
3950 int pinctl, def_conf;
f73d3585
TI		 3951
3952 if (is_nid_hp_pin(cfg, nid) && spec->hp_detect)
3953 continue; /* already has an unsol event */
3954
3955 pinctl = snd_hda_codec_read(codec, nid, 0,
3956 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 3957 /* outputs are only ports capable of power management
3958 * any attempts on powering down a input port cause the
3959 * referenced VREF to act quirky.
3960 */
3961 if (pinctl & AC_PINCTL_IN_EN)
3962 continue;
f73d3585
TI		 3963 def_conf = snd_hda_codec_read(codec, nid, 0,
3964 AC_VERB_GET_CONFIG_DEFAULT, 0);
3965 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 3966 /* skip any ports that don't have jacks since presence
3967 * detection is useless */
f73d3585
TI		 3968 if (def_conf != AC_JACK_PORT_COMPLEX) {
3969 if (def_conf != AC_JACK_PORT_NONE)
3970 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 3971 continue;
f73d3585 3972 }
c6e4c666
TI		 3973 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
3974 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
a64135a2 3975 }
b76c850f
MR		 3976 if (spec->dac_list)
3977 stac92xx_power_down(codec);
c7d4b2fa
M		 3978 return 0;
3979}
3980
74aeaabc
MR		 3981static void stac92xx_free_jacks(struct hda_codec *codec)
3982{
e4973e1e 3983#ifdef CONFIG_SND_JACK
b94d3539 3984 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 3985 struct sigmatel_spec *spec = codec->spec;
b94d3539 3986 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 3987 struct sigmatel_jack *jacks = spec->jacks.list;
3988 int i;
3989 for (i = 0; i < spec->jacks.used; i++)
3990 snd_device_free(codec->bus->card, &jacks[i].jack);
3991 }
3992 snd_array_free(&spec->jacks);
e4973e1e 3993#endif
74aeaabc
MR		 3994}
3995
603c4019
TI		 3996static void stac92xx_free_kctls(struct hda_codec *codec)
3997{
3998 struct sigmatel_spec *spec = codec->spec;
3999
4000 if (spec->kctls.list) {
4001 struct snd_kcontrol_new *kctl = spec->kctls.list;
4002 int i;
4003 for (i = 0; i < spec->kctls.used; i++)
4004 kfree(kctl[i].name);
4005 }
4006 snd_array_free(&spec->kctls);
4007}
4008
2f2f4251
M		 4009static void stac92xx_free(struct hda_codec *codec)
4010{
c7d4b2fa 4011 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4012
4013 if (! spec)
4014 return;
4015
af9f341a 4016 kfree(spec->pin_configs);
74aeaabc
MR		 4017 stac92xx_free_jacks(codec);
4018 snd_array_free(&spec->events);
11b44bbd 4019
c7d4b2fa 4020 kfree(spec);
1cd2224c 4021 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4022}
4023
4e55096e
M		 4024static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4025 unsigned int flag)
4026{
4027 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4028 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4029
f9acba43
TI		 4030 if (pin_ctl & AC_PINCTL_IN_EN) {
4031 /*
4032 * we need to check the current set-up direction of
4033 * shared input pins since they can be switched via
4034 * "xxx as Output" mixer switch
4035 */
4036 struct sigmatel_spec *spec = codec->spec;
4037 struct auto_pin_cfg *cfg = &spec->autocfg;
4038 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
4039 spec->line_switch) ||
4040 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
4041 spec->mic_switch))
4042 return;
4043 }
4044
7b043899
SL		 4045 /* if setting pin direction bits, clear the current
4046 direction bits first */
4047 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4048 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4049
82beb8fd 4050 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4051 AC_VERB_SET_PIN_WIDGET_CONTROL,
4052 pin_ctl | flag);
4053}
4054
4055static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4056 unsigned int flag)
4057{
4058 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4059 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 4060 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4061 AC_VERB_SET_PIN_WIDGET_CONTROL,
4062 pin_ctl & ~flag);
4063}
4064
40c1d308 4065static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4066{
4067 if (!nid)
4068 return 0;
4069 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 4070 & (1 << 31)) {
4071 unsigned int pinctl;
4072 pinctl = snd_hda_codec_read(codec, nid, 0,
4073 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4074 if (pinctl & AC_PINCTL_IN_EN)
4075 return 0; /* mic- or line-input */
4076 else
4077 return 1; /* HP-output */
4078 }
314634bc
TI		 4079 return 0;
4080}
4081
d7a89436
TI		 4082/* return non-zero if the hp-pin of the given array index isn't
4083 * a jack-detection target
4084 */
4085static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4086{
4087 struct auto_pin_cfg *cfg = &spec->autocfg;
4088
4089 /* ignore sensing of shared line and mic jacks */
4090 if (spec->line_switch &&
4091 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_LINE])
4092 return 1;
4093 if (spec->mic_switch &&
4094 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_MIC])
4095 return 1;
4096 /* ignore if the pin is set as line-out */
4097 if (cfg->hp_pins[i] == spec->hp_switch)
4098 return 1;
4099 return 0;
4100}
4101
c6e4c666 4102static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4103{
4104 struct sigmatel_spec *spec = codec->spec;
4105 struct auto_pin_cfg *cfg = &spec->autocfg;
4106 int i, presence;
4107
eb06ed8f 4108 presence = 0;
4fe5195c
MR		 4109 if (spec->gpio_mute)
4110 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4111 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4112
eb06ed8f 4113 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4114 if (presence)
4115 break;
d7a89436
TI		 4116 if (no_hp_sensing(spec, i))
4117 continue;
4fe5195c 4118 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 4119 }
4e55096e
M		 4120
4121 if (presence) {
d7a89436 4122 /* disable lineouts */
7c2ba97b 4123 if (spec->hp_switch)
d7a89436
TI		 4124 stac92xx_reset_pinctl(codec, spec->hp_switch,
4125 AC_PINCTL_OUT_EN);
4e55096e
M		 4126 for (i = 0; i < cfg->line_outs; i++)
4127 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4128 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4129 for (i = 0; i < cfg->speaker_outs; i++)
4130 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4131 AC_PINCTL_OUT_EN);
c0cea0d0 4132 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4133 stac_gpio_set(codec, spec->gpio_mask,
4134 spec->gpio_dir, spec->gpio_data &
4135 ~spec->eapd_mask);
4e55096e 4136 } else {
d7a89436 4137 /* enable lineouts */
7c2ba97b 4138 if (spec->hp_switch)
d7a89436
TI		 4139 stac92xx_set_pinctl(codec, spec->hp_switch,
4140 AC_PINCTL_OUT_EN);
4e55096e
M		 4141 for (i = 0; i < cfg->line_outs; i++)
4142 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4143 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4144 for (i = 0; i < cfg->speaker_outs; i++)
4145 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4146 AC_PINCTL_OUT_EN);
c0cea0d0 4147 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4148 stac_gpio_set(codec, spec->gpio_mask,
4149 spec->gpio_dir, spec->gpio_data |
4150 spec->eapd_mask);
4e55096e 4151 }
d7a89436
TI		 4152 /* toggle hp outs */
4153 for (i = 0; i < cfg->hp_outs; i++) {
4154 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4155 if (no_hp_sensing(spec, i))
4156 continue;
4157 if (presence)
4158 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
4159 else
4160 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
4161 }
4e55096e
M		 4162}
4163
f73d3585
TI		 4164static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4165 int enable)
a64135a2
MR		 4166{
4167 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4168 unsigned int idx, val;
4169
4170 for (idx = 0; idx < spec->num_pwrs; idx++) {
4171 if (spec->pwr_nids[idx] == nid)
4172 break;
4173 }
4174 if (idx >= spec->num_pwrs)
4175 return;
d0513fc6
MR		 4176
4177 /* several codecs have two power down bits */
4178 if (spec->pwr_mapping)
4179 idx = spec->pwr_mapping[idx];
4180 else
4181 idx = 1 << idx;
a64135a2 4182
f73d3585
TI		 4183 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4184 if (enable)
a64135a2
MR		 4185 val &= ~idx;
4186 else
4187 val |= idx;
4188
4189 /* power down unused output ports */
4190 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4191}
4192
f73d3585
TI		 4193static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4194{
4195 stac_toggle_power_map(codec, nid, get_hp_pin_presence(codec, nid));
4196}
a64135a2 4197
74aeaabc
MR		 4198static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4199{
4200 struct sigmatel_spec *spec = codec->spec;
4201 struct sigmatel_jack *jacks = spec->jacks.list;
4202
4203 if (jacks) {
4204 int i;
4205 for (i = 0; i < spec->jacks.used; i++) {
4206 if (jacks->nid == nid) {
4207 unsigned int pin_ctl =
4208 snd_hda_codec_read(codec, nid,
4209 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4210 0x00);
4211 int type = jacks->type;
4212 if (type == (SND_JACK_LINEOUT
4213 | SND_JACK_HEADPHONE))
4214 type = (pin_ctl & AC_PINCTL_HP_EN)
4215 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4216 snd_jack_report(jacks->jack,
4217 get_hp_pin_presence(codec, nid)
4218 ? type : 0);
4219 }
4220 jacks++;
4221 }
4222 }
4223}
a64135a2 4224
c6e4c666
TI		 4225static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4226 unsigned char type)
4227{
4228 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4229 if (!event)
4230 return;
4231 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4232}
4233
314634bc
TI		 4234static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4235{
a64135a2 4236 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4237 struct sigmatel_event *event;
4238 int tag, data;
a64135a2 4239
c6e4c666
TI		 4240 tag = (res >> 26) & 0x7f;
4241 event = stac_get_event_from_tag(codec, tag);
4242 if (!event)
4243 return;
4244
4245 switch (event->type) {
314634bc 4246 case STAC_HP_EVENT:
c6e4c666 4247 stac92xx_hp_detect(codec);
a64135a2 4248 /* fallthru */
74aeaabc 4249 case STAC_INSERT_EVENT:
a64135a2 4250 case STAC_PWR_EVENT:
c6e4c666
TI		 4251 if (spec->num_pwrs > 0)
4252 stac92xx_pin_sense(codec, event->nid);
4253 stac92xx_report_jack(codec, event->nid);
72474be6 4254 break;
c6e4c666
TI		 4255 case STAC_VREF_EVENT:
4256 data = snd_hda_codec_read(codec, codec->afg, 0,
4257 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4258 /* toggle VREF state based on GPIOx status */
4259 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4260 !!(data & (1 << event->data)));
72474be6 4261 break;
314634bc
TI		 4262 }
4263}
4264
2d34e1b3
TI		 4265#ifdef CONFIG_PROC_FS
4266static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4267 struct hda_codec *codec, hda_nid_t nid)
4268{
4269 if (nid == codec->afg)
4270 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4271 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4272}
4273
4274static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4275 struct hda_codec *codec,
4276 unsigned int verb)
4277{
4278 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4279 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4280}
4281
4282/* stac92hd71bxx, stac92hd73xx */
4283static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4284 struct hda_codec *codec, hda_nid_t nid)
4285{
4286 stac92hd_proc_hook(buffer, codec, nid);
4287 if (nid == codec->afg)
4288 analog_loop_proc_hook(buffer, codec, 0xfa0);
4289}
4290
4291static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4292 struct hda_codec *codec, hda_nid_t nid)
4293{
4294 if (nid == codec->afg)
4295 analog_loop_proc_hook(buffer, codec, 0xfe0);
4296}
4297
4298static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4299 struct hda_codec *codec, hda_nid_t nid)
4300{
4301 if (nid == codec->afg)
4302 analog_loop_proc_hook(buffer, codec, 0xfeb);
4303}
4304#else
4305#define stac92hd_proc_hook NULL
4306#define stac92hd7x_proc_hook NULL
4307#define stac9205_proc_hook NULL
4308#define stac927x_proc_hook NULL
4309#endif
4310
cb53c626 4311#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4312static int stac92xx_resume(struct hda_codec *codec)
4313{
dc81bed1
TI		 4314 struct sigmatel_spec *spec = codec->spec;
4315
11b44bbd 4316 stac92xx_set_config_regs(codec);
2c885878 4317 stac92xx_init(codec);
82beb8fd
TI		 4318 snd_hda_codec_resume_amp(codec);
4319 snd_hda_codec_resume_cache(codec);
2c885878 4320 /* fake event to set up pins again to override cached values */
dc81bed1 4321 if (spec->hp_detect)
c6e4c666
TI		 4322 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4323 STAC_HP_EVENT);
ff6fdc37
M		 4324 return 0;
4325}
c6798d2b
MR		 4326
4327static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4328{
4329 struct sigmatel_spec *spec = codec->spec;
4330 if (spec->eapd_mask)
4331 stac_gpio_set(codec, spec->gpio_mask,
4332 spec->gpio_dir, spec->gpio_data &
4333 ~spec->eapd_mask);
4334 return 0;
4335}
ff6fdc37
M		 4336#endif
4337
2f2f4251
M		 4338static struct hda_codec_ops stac92xx_patch_ops = {
4339 .build_controls = stac92xx_build_controls,
4340 .build_pcms = stac92xx_build_pcms,
4341 .init = stac92xx_init,
4342 .free = stac92xx_free,
4e55096e 4343 .unsol_event = stac92xx_unsol_event,
cb53c626 4344#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4345 .suspend = stac92xx_suspend,
ff6fdc37
M		 4346 .resume = stac92xx_resume,
4347#endif
2f2f4251
M		 4348};
4349
4350static int patch_stac9200(struct hda_codec *codec)
4351{
4352 struct sigmatel_spec *spec;
c7d4b2fa 4353 int err;
2f2f4251 4354
e560d8d8 4355 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4356 if (spec == NULL)
4357 return -ENOMEM;
4358
4359 codec->spec = spec;
a4eed138 4360 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4361 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4362 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4363 stac9200_models,
4364 stac9200_cfg_tbl);
11b44bbd
RF		 4365 if (spec->board_config < 0) {
4366 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4367 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4368 } else
4369 err = stac_save_pin_cfgs(codec,
4370 stac9200_brd_tbl[spec->board_config]);
4371 if (err < 0) {
4372 stac92xx_free(codec);
4373 return err;
403d1944 4374 }
2f2f4251
M		 4375
4376 spec->multiout.max_channels = 2;
4377 spec->multiout.num_dacs = 1;
4378 spec->multiout.dac_nids = stac9200_dac_nids;
4379 spec->adc_nids = stac9200_adc_nids;
4380 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4381 spec->num_muxes = 1;
8b65727b 4382 spec->num_dmics = 0;
9e05b7a3 4383 spec->num_adcs = 1;
a64135a2 4384 spec->num_pwrs = 0;
c7d4b2fa 4385
bf277785
TD		 4386 if (spec->board_config == STAC_9200_GATEWAY ||
4387 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4388 spec->init = stac9200_eapd_init;
4389 else
4390 spec->init = stac9200_core_init;
2f2f4251 4391 spec->mixer = stac9200_mixer;
c7d4b2fa 4392
117f257d
TI		 4393 if (spec->board_config == STAC_9200_PANASONIC) {
4394 spec->gpio_mask = spec->gpio_dir = 0x09;
4395 spec->gpio_data = 0x00;
4396 }
4397
c7d4b2fa
M		 4398 err = stac9200_parse_auto_config(codec);
4399 if (err < 0) {
4400 stac92xx_free(codec);
4401 return err;
4402 }
2f2f4251
M		 4403
4404 codec->patch_ops = stac92xx_patch_ops;
4405
4406 return 0;
4407}
4408
8e21c34c
TD		 4409static int patch_stac925x(struct hda_codec *codec)
4410{
4411 struct sigmatel_spec *spec;
4412 int err;
4413
4414 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4415 if (spec == NULL)
4416 return -ENOMEM;
4417
4418 codec->spec = spec;
a4eed138 4419 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 4420 spec->pin_nids = stac925x_pin_nids;
4421 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
4422 stac925x_models,
4423 stac925x_cfg_tbl);
9e507abd 4424 again:
8e21c34c 4425 if (spec->board_config < 0) {
2c11f955
TD		 4426 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
4427 "using BIOS defaults\n");
8e21c34c 4428 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4429 } else
4430 err = stac_save_pin_cfgs(codec,
4431 stac925x_brd_tbl[spec->board_config]);
4432 if (err < 0) {
4433 stac92xx_free(codec);
4434 return err;
8e21c34c
TD		 4435 }
4436
4437 spec->multiout.max_channels = 2;
4438 spec->multiout.num_dacs = 1;
4439 spec->multiout.dac_nids = stac925x_dac_nids;
4440 spec->adc_nids = stac925x_adc_nids;
4441 spec->mux_nids = stac925x_mux_nids;
4442 spec->num_muxes = 1;
9e05b7a3 4443 spec->num_adcs = 1;
a64135a2 4444 spec->num_pwrs = 0;
2c11f955
TD		 4445 switch (codec->vendor_id) {
4446 case 0x83847632: /* STAC9202 */
4447 case 0x83847633: /* STAC9202D */
4448 case 0x83847636: /* STAC9251 */
4449 case 0x83847637: /* STAC9251D */
f6e9852a 4450 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4451 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4452 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4453 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4454 break;
4455 default:
4456 spec->num_dmics = 0;
4457 break;
4458 }
8e21c34c
TD		 4459
4460 spec->init = stac925x_core_init;
4461 spec->mixer = stac925x_mixer;
4462
4463 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4464 if (!err) {
4465 if (spec->board_config < 0) {
4466 printk(KERN_WARNING "hda_codec: No auto-config is "
4467 "available, default to model=ref\n");
4468 spec->board_config = STAC_925x_REF;
4469 goto again;
4470 }
4471 err = -EINVAL;
4472 }
8e21c34c
TD		 4473 if (err < 0) {
4474 stac92xx_free(codec);
4475 return err;
4476 }
4477
4478 codec->patch_ops = stac92xx_patch_ops;
4479
4480 return 0;
4481}
4482
e1f0d669
MR		 4483static struct hda_input_mux stac92hd73xx_dmux = {
4484 .num_items = 4,
4485 .items = {
4486 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4487 { "Digital Mic 1", 0x09 },
4488 { "Digital Mic 2", 0x0a },
2a9c7816 4489 { "CD", 0x08 },
e1f0d669
MR		 4490 }
4491};
4492
4493static int patch_stac92hd73xx(struct hda_codec *codec)
4494{
4495 struct sigmatel_spec *spec;
4496 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4497 int err = 0;
4498
4499 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4500 if (spec == NULL)
4501 return -ENOMEM;
4502
4503 codec->spec = spec;
e99d32b3 4504 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4505 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4506 spec->pin_nids = stac92hd73xx_pin_nids;
4507 spec->board_config = snd_hda_check_board_config(codec,
4508 STAC_92HD73XX_MODELS,
4509 stac92hd73xx_models,
4510 stac92hd73xx_cfg_tbl);
4511again:
4512 if (spec->board_config < 0) {
4513 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4514 " STAC92HD73XX, using BIOS defaults\n");
4515 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4516 } else
4517 err = stac_save_pin_cfgs(codec,
4518 stac92hd73xx_brd_tbl[spec->board_config]);
4519 if (err < 0) {
4520 stac92xx_free(codec);
4521 return err;
e1f0d669
MR		 4522 }
4523
4524 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4525 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4526
4527 if (spec->multiout.num_dacs < 0) {
4528 printk(KERN_WARNING "hda_codec: Could not determine "
4529 "number of channels defaulting to DAC count\n");
4530 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4531 }
4532
4533 switch (spec->multiout.num_dacs) {
4534 case 0x3: /* 6 Channel */
4535 spec->mixer = stac92hd73xx_6ch_mixer;
4536 spec->init = stac92hd73xx_6ch_core_init;
4537 break;
4538 case 0x4: /* 8 Channel */
e1f0d669
MR		 4539 spec->mixer = stac92hd73xx_8ch_mixer;
4540 spec->init = stac92hd73xx_8ch_core_init;
4541 break;
4542 case 0x5: /* 10 Channel */
e1f0d669
MR		 4543 spec->mixer = stac92hd73xx_10ch_mixer;
4544 spec->init = stac92hd73xx_10ch_core_init;
4545 };
4546
4547 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4548 spec->aloopback_mask = 0x01;
4549 spec->aloopback_shift = 8;
4550
1cd2224c 4551 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4552 spec->mux_nids = stac92hd73xx_mux_nids;
4553 spec->adc_nids = stac92hd73xx_adc_nids;
4554 spec->dmic_nids = stac92hd73xx_dmic_nids;
4555 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4556 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4557 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4558 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4559
4560 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4561 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4562 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4563 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4564 sizeof(stac92hd73xx_dmux));
4565
a7662640 4566 switch (spec->board_config) {
6b3ab21e 4567 case STAC_DELL_EQ:
d654a660 4568 spec->init = dell_eq_core_init;
6b3ab21e 4569 /* fallthru */
661cd8fb
TI		 4570 case STAC_DELL_M6_AMIC:
4571 case STAC_DELL_M6_DMIC:
4572 case STAC_DELL_M6_BOTH:
2a9c7816 4573 spec->num_smuxes = 0;
2a9c7816
MR		 4574 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4575 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4576 spec->eapd_switch = 0;
2a9c7816 4577 spec->num_amps = 1;
6b3ab21e
MR		 4578
4579 if (!spec->init)
4580 spec->init = dell_m6_core_init;
661cd8fb
TI		 4581 switch (spec->board_config) {
4582 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR		 4583 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4584 spec->num_dmics = 0;
2a9c7816 4585 spec->private_dimux.num_items = 1;
a7662640 4586 break;
661cd8fb 4587 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR		 4588 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4589 spec->num_dmics = 1;
2a9c7816 4590 spec->private_dimux.num_items = 2;
a7662640 4591 break;
661cd8fb 4592 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR		 4593 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4594 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4595 spec->num_dmics = 1;
2a9c7816 4596 spec->private_dimux.num_items = 2;
a7662640
MR		 4597 break;
4598 }
4599 break;
4600 default:
4601 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4602 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4603 spec->eapd_switch = 1;
a7662640 4604 }
b2c4f4d7
MR		 4605 if (spec->board_config > STAC_92HD73XX_REF) {
4606 /* GPIO0 High = Enable EAPD */
4607 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4608 spec->gpio_data = 0x01;
4609 }
2a9c7816 4610 spec->dinput_mux = &spec->private_dimux;
a7662640 4611
a64135a2
MR		 4612 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4613 spec->pwr_nids = stac92hd73xx_pwr_nids;
4614
d9737751 4615 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4616
4617 if (!err) {
4618 if (spec->board_config < 0) {
4619 printk(KERN_WARNING "hda_codec: No auto-config is "
4620 "available, default to model=ref\n");
4621 spec->board_config = STAC_92HD73XX_REF;
4622 goto again;
4623 }
4624 err = -EINVAL;
4625 }
4626
4627 if (err < 0) {
4628 stac92xx_free(codec);
4629 return err;
4630 }
4631
4632 codec->patch_ops = stac92xx_patch_ops;
4633
2d34e1b3
TI		 4634 codec->proc_widget_hook = stac92hd7x_proc_hook;
4635
e1f0d669
MR		 4636 return 0;
4637}
4638
d0513fc6
MR		 4639static struct hda_input_mux stac92hd83xxx_dmux = {
4640 .num_items = 3,
4641 .items = {
4642 { "Analog Inputs", 0x03 },
4643 { "Digital Mic 1", 0x04 },
4644 { "Digital Mic 2", 0x05 },
4645 }
4646};
4647
4648static int patch_stac92hd83xxx(struct hda_codec *codec)
4649{
4650 struct sigmatel_spec *spec;
4651 int err;
4652
4653 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4654 if (spec == NULL)
4655 return -ENOMEM;
4656
4657 codec->spec = spec;
0ffa9807 4658 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4659 spec->mono_nid = 0x19;
4660 spec->digbeep_nid = 0x21;
4661 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4662 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4663 spec->adc_nids = stac92hd83xxx_adc_nids;
4664 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4665 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4666 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4667 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4668
4669 spec->init = stac92hd83xxx_core_init;
4670 switch (codec->vendor_id) {
4671 case 0x111d7605:
4672 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4673 break;
4674 default:
4675 spec->num_pwrs--;
4676 spec->init++; /* switch to config #2 */
4677 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4678 }
4679
4680 spec->mixer = stac92hd83xxx_mixer;
4681 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4682 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4683 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4684 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4685 spec->dinput_mux = &stac92hd83xxx_dmux;
4686 spec->pin_nids = stac92hd83xxx_pin_nids;
4687 spec->board_config = snd_hda_check_board_config(codec,
4688 STAC_92HD83XXX_MODELS,
4689 stac92hd83xxx_models,
4690 stac92hd83xxx_cfg_tbl);
4691again:
4692 if (spec->board_config < 0) {
4693 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4694 " STAC92HD83XXX, using BIOS defaults\n");
4695 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4696 } else
4697 err = stac_save_pin_cfgs(codec,
4698 stac92hd83xxx_brd_tbl[spec->board_config]);
4699 if (err < 0) {
4700 stac92xx_free(codec);
4701 return err;
d0513fc6
MR		 4702 }
4703
4704 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4705 if (!err) {
4706 if (spec->board_config < 0) {
4707 printk(KERN_WARNING "hda_codec: No auto-config is "
4708 "available, default to model=ref\n");
4709 spec->board_config = STAC_92HD83XXX_REF;
4710 goto again;
4711 }
4712 err = -EINVAL;
4713 }
4714
4715 if (err < 0) {
4716 stac92xx_free(codec);
4717 return err;
4718 }
4719
4720 codec->patch_ops = stac92xx_patch_ops;
4721
2d34e1b3
TI		 4722 codec->proc_widget_hook = stac92hd_proc_hook;
4723
d0513fc6
MR		 4724 return 0;
4725}
4726
8daaaa97
MR		 4727#ifdef SND_HDA_NEEDS_RESUME
4728static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4729{
4730 struct sigmatel_spec *spec = codec->spec;
4731 int i;
4732 snd_hda_codec_write_cache(codec, codec->afg, 0,
4733 AC_VERB_SET_POWER_STATE, pwr);
4734
4735 msleep(1);
4736 for (i = 0; i < spec->num_adcs; i++) {
4737 snd_hda_codec_write_cache(codec,
4738 spec->adc_nids[i], 0,
4739 AC_VERB_SET_POWER_STATE, pwr);
4740 }
4741};
4742
4743static int stac92hd71xx_resume(struct hda_codec *codec)
4744{
4745 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4746 return stac92xx_resume(codec);
4747}
4748
4749static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4750{
4751 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
c6798d2b 4752 return stac92xx_suspend(codec, state);
8daaaa97
MR		 4753};
4754
4755#endif
4756
4757static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4758 .build_controls = stac92xx_build_controls,
4759 .build_pcms = stac92xx_build_pcms,
4760 .init = stac92xx_init,
4761 .free = stac92xx_free,
4762 .unsol_event = stac92xx_unsol_event,
4763#ifdef SND_HDA_NEEDS_RESUME
8daaaa97 4764 .suspend = stac92hd71xx_suspend,
c6798d2b 4765 .resume = stac92hd71xx_resume,
8daaaa97
MR		 4766#endif
4767};
d0513fc6 4768
4b33c767
MR		 4769static struct hda_input_mux stac92hd71bxx_dmux = {
4770 .num_items = 4,
4771 .items = {
4772 { "Analog Inputs", 0x00 },
4773 { "Mixer", 0x01 },
4774 { "Digital Mic 1", 0x02 },
4775 { "Digital Mic 2", 0x03 },
4776 }
4777};
4778
e035b841
MR		 4779static int patch_stac92hd71bxx(struct hda_codec *codec)
4780{
4781 struct sigmatel_spec *spec;
4782 int err = 0;
4783
4784 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4785 if (spec == NULL)
4786 return -ENOMEM;
4787
4788 codec->spec = spec;
8daaaa97 4789 codec->patch_ops = stac92xx_patch_ops;
e035b841 4790 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4791 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4792 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4793 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4794 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4795 spec->board_config = snd_hda_check_board_config(codec,
4796 STAC_92HD71BXX_MODELS,
4797 stac92hd71bxx_models,
4798 stac92hd71bxx_cfg_tbl);
4799again:
4800 if (spec->board_config < 0) {
4801 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4802 " STAC92HD71BXX, using BIOS defaults\n");
4803 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4804 } else
4805 err = stac_save_pin_cfgs(codec,
4806 stac92hd71bxx_brd_tbl[spec->board_config]);
4807 if (err < 0) {
4808 stac92xx_free(codec);
4809 return err;
e035b841
MR		 4810 }
4811
41c3b648
TI		 4812 if (spec->board_config > STAC_92HD71BXX_REF) {
4813 /* GPIO0 = EAPD */
4814 spec->gpio_mask = 0x01;
4815 spec->gpio_dir = 0x01;
4816 spec->gpio_data = 0x01;
4817 }
4818
541eee87
MR		 4819 switch (codec->vendor_id) {
4820 case 0x111d76b6: /* 4 Port without Analog Mixer */
4821 case 0x111d76b7:
4822 case 0x111d76b4: /* 6 Port without Analog Mixer */
4823 case 0x111d76b5:
4824 spec->mixer = stac92hd71bxx_mixer;
4825 spec->init = stac92hd71bxx_core_init;
0ffa9807 4826 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4827 break;
aafc4412 4828 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4829 switch (spec->board_config) {
4830 case STAC_HP_M4:
72474be6 4831 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 4832 err = stac_add_event(spec, codec->afg,
4833 STAC_VREF_EVENT, 0x02);
4834 if (err < 0)
4835 return err;
c5d08bb5 4836 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4837 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4838 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4839 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4840 AC_USRSP_EN | err);
72474be6
MR		 4841 spec->gpio_mask |= 0x02;
4842 break;
4843 }
8daaaa97
MR		 4844 if ((codec->revision_id & 0xf) == 0 ||
4845 (codec->revision_id & 0xf) == 1) {
4846#ifdef SND_HDA_NEEDS_RESUME
4847 codec->patch_ops = stac92hd71bxx_patch_ops;
4848#endif
4849 spec->stream_delay = 40; /* 40 milliseconds */
4850 }
4851
aafc4412
MR		 4852 /* no output amps */
4853 spec->num_pwrs = 0;
4854 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4855 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4856
4857 /* disable VSW */
4858 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4859 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR		 4860 break;
4861 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4862 if ((codec->revision_id & 0xf) == 1) {
4863#ifdef SND_HDA_NEEDS_RESUME
4864 codec->patch_ops = stac92hd71bxx_patch_ops;
4865#endif
4866 spec->stream_delay = 40; /* 40 milliseconds */
4867 }
4868
aafc4412
MR		 4869 /* no output amps */
4870 spec->num_pwrs = 0;
4871 /* fallthru */
541eee87 4872 default:
4b33c767 4873 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4874 spec->mixer = stac92hd71bxx_analog_mixer;
4875 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4876 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4877 }
4878
4b33c767 4879 spec->aloopback_mask = 0x50;
541eee87
MR		 4880 spec->aloopback_shift = 0;
4881
8daaaa97 4882 spec->powerdown_adcs = 1;
1cd2224c 4883 spec->digbeep_nid = 0x26;
e035b841
MR		 4884 spec->mux_nids = stac92hd71bxx_mux_nids;
4885 spec->adc_nids = stac92hd71bxx_adc_nids;
4886 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4887 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4888 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4889 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4890
4891 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4892 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4893
6a14f585
MR		 4894 switch (spec->board_config) {
4895 case STAC_HP_M4:
6a14f585 4896 /* enable internal microphone */
af9f341a 4897 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR		 4898 stac92xx_auto_set_pinctl(codec, 0x0e,
4899 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4900 /* fallthru */
4901 case STAC_DELL_M4_2:
4902 spec->num_dmics = 0;
4903 spec->num_smuxes = 0;
4904 spec->num_dmuxes = 0;
4905 break;
4906 case STAC_DELL_M4_1:
4907 case STAC_DELL_M4_3:
4908 spec->num_dmics = 1;
4909 spec->num_smuxes = 0;
4910 spec->num_dmuxes = 0;
6a14f585
MR		 4911 break;
4912 default:
4913 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4914 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4915 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4916 };
4917
aea7bb0a 4918 spec->multiout.num_dacs = 1;
e035b841
MR		 4919 spec->multiout.hp_nid = 0x11;
4920 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4b33c767
MR		 4921 if (spec->dinput_mux)
4922 spec->private_dimux.num_items +=
4923 spec->num_dmics -
4924 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4925
4926 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4927 if (!err) {
4928 if (spec->board_config < 0) {
4929 printk(KERN_WARNING "hda_codec: No auto-config is "
4930 "available, default to model=ref\n");
4931 spec->board_config = STAC_92HD71BXX_REF;
4932 goto again;
4933 }
4934 err = -EINVAL;
4935 }
4936
4937 if (err < 0) {
4938 stac92xx_free(codec);
4939 return err;
4940 }
4941
2d34e1b3
TI		 4942 codec->proc_widget_hook = stac92hd7x_proc_hook;
4943
e035b841
MR		 4944 return 0;
4945};
4946
2f2f4251
M		 4947static int patch_stac922x(struct hda_codec *codec)
4948{
4949 struct sigmatel_spec *spec;
c7d4b2fa 4950 int err;
2f2f4251 4951
e560d8d8 4952 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4953 if (spec == NULL)
4954 return -ENOMEM;
4955
4956 codec->spec = spec;
a4eed138 4957 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4958 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4959 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4960 stac922x_models,
4961 stac922x_cfg_tbl);
536319af 4962 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4963 spec->gpio_mask = spec->gpio_dir = 0x03;
4964 spec->gpio_data = 0x03;
3fc24d85
TI		 4965 /* Intel Macs have all same PCI SSID, so we need to check
4966 * codec SSID to distinguish the exact models
4967 */
6f0778d8 4968 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4969 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4970
4971 case 0x106b0800:
4972 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4973 break;
5d5d3bc3
IZ		 4974 case 0x106b0600:
4975 case 0x106b0700:
4976 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4977 break;
5d5d3bc3
IZ		 4978 case 0x106b0e00:
4979 case 0x106b0f00:
4980 case 0x106b1600:
4981 case 0x106b1700:
4982 case 0x106b0200:
4983 case 0x106b1e00:
4984 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4985 break;
5d5d3bc3
IZ		 4986 case 0x106b1a00:
4987 case 0x00000100:
4988 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4989 break;
5d5d3bc3
IZ		 4990 case 0x106b0a00:
4991 case 0x106b2200:
4992 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4993 break;
536319af
NB		 4994 default:
4995 spec->board_config = STAC_INTEL_MAC_V3;
4996 break;
3fc24d85
TI		 4997 }
4998 }
4999
9e507abd 5000 again:
11b44bbd
RF		 5001 if (spec->board_config < 0) {
5002 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5003 "using BIOS defaults\n");
5004 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5005 } else
5006 err = stac_save_pin_cfgs(codec,
5007 stac922x_brd_tbl[spec->board_config]);
5008 if (err < 0) {
5009 stac92xx_free(codec);
5010 return err;
403d1944 5011 }
2f2f4251 5012
c7d4b2fa
M		 5013 spec->adc_nids = stac922x_adc_nids;
5014 spec->mux_nids = stac922x_mux_nids;
2549413e 5015 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5016 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5017 spec->num_dmics = 0;
a64135a2 5018 spec->num_pwrs = 0;
c7d4b2fa
M		 5019
5020 spec->init = stac922x_core_init;
2f2f4251 5021 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 5022
5023 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5024
3cc08dc6 5025 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 5026 if (!err) {
5027 if (spec->board_config < 0) {
5028 printk(KERN_WARNING "hda_codec: No auto-config is "
5029 "available, default to model=ref\n");
5030 spec->board_config = STAC_D945_REF;
5031 goto again;
5032 }
5033 err = -EINVAL;
5034 }
3cc08dc6
MP		 5035 if (err < 0) {
5036 stac92xx_free(codec);
5037 return err;
5038 }
5039
5040 codec->patch_ops = stac92xx_patch_ops;
5041
807a4636
TI		 5042 /* Fix Mux capture level; max to 2 */
5043 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5044 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5045 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5046 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5047 (0 << AC_AMPCAP_MUTE_SHIFT));
5048
3cc08dc6
MP		 5049 return 0;
5050}
5051
5052static int patch_stac927x(struct hda_codec *codec)
5053{
5054 struct sigmatel_spec *spec;
5055 int err;
5056
5057 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5058 if (spec == NULL)
5059 return -ENOMEM;
5060
5061 codec->spec = spec;
a4eed138 5062 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5063 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 5064 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5065 stac927x_models,
5066 stac927x_cfg_tbl);
9e507abd 5067 again:
8e9068b1
MR		 5068 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5069 if (spec->board_config < 0)
5070 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5071 "STAC927x, using BIOS defaults\n");
11b44bbd 5072 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5073 } else
5074 err = stac_save_pin_cfgs(codec,
5075 stac927x_brd_tbl[spec->board_config]);
5076 if (err < 0) {
5077 stac92xx_free(codec);
5078 return err;
3cc08dc6
MP		 5079 }
5080
1cd2224c 5081 spec->digbeep_nid = 0x23;
8e9068b1
MR		 5082 spec->adc_nids = stac927x_adc_nids;
5083 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5084 spec->mux_nids = stac927x_mux_nids;
5085 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 5086 spec->smux_nids = stac927x_smux_nids;
5087 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5088 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5089 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 5090 spec->multiout.dac_nids = spec->dac_nids;
5091
81d3dbde 5092 switch (spec->board_config) {
93ed1503 5093 case STAC_D965_3ST:
93ed1503 5094 case STAC_D965_5ST:
8e9068b1 5095 /* GPIO0 High = Enable EAPD */
0fc9dec4 5096 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5097 spec->gpio_data = 0x01;
8e9068b1
MR		 5098 spec->num_dmics = 0;
5099
93ed1503 5100 spec->init = d965_core_init;
9e05b7a3 5101 spec->mixer = stac927x_mixer;
81d3dbde 5102 break;
8e9068b1 5103 case STAC_DELL_BIOS:
780c8be4
MR		 5104 switch (codec->subsystem_id) {
5105 case 0x10280209:
5106 case 0x1028022e:
5107 /* correct the device field to SPDIF out */
af9f341a 5108 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR		 5109 break;
5110 };
03d7ca17 5111 /* configure the analog microphone on some laptops */
af9f341a 5112 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5113 /* correct the front output jack as a hp out */
af9f341a 5114 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5115 /* correct the front input jack as a mic */
af9f341a 5116 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5117 /* fallthru */
8e9068b1
MR		 5118 case STAC_DELL_3ST:
5119 /* GPIO2 High = Enable EAPD */
0fc9dec4 5120 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5121 spec->gpio_data = 0x04;
7f16859a
MR		 5122 spec->dmic_nids = stac927x_dmic_nids;
5123 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5124
8e9068b1
MR		 5125 spec->init = d965_core_init;
5126 spec->mixer = stac927x_mixer;
5127 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5128 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 5129 break;
5130 default:
b2c4f4d7
MR		 5131 if (spec->board_config > STAC_D965_REF) {
5132 /* GPIO0 High = Enable EAPD */
5133 spec->eapd_mask = spec->gpio_mask = 0x01;
5134 spec->gpio_dir = spec->gpio_data = 0x01;
5135 }
8e9068b1
MR		 5136 spec->num_dmics = 0;
5137
5138 spec->init = stac927x_core_init;
5139 spec->mixer = stac927x_mixer;
7f16859a
MR		 5140 }
5141
a64135a2 5142 spec->num_pwrs = 0;
e1f0d669
MR		 5143 spec->aloopback_mask = 0x40;
5144 spec->aloopback_shift = 0;
c0cea0d0 5145 spec->eapd_switch = 1;
8e9068b1 5146
3cc08dc6 5147 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5148 if (!err) {
5149 if (spec->board_config < 0) {
5150 printk(KERN_WARNING "hda_codec: No auto-config is "
5151 "available, default to model=ref\n");
5152 spec->board_config = STAC_D965_REF;
5153 goto again;
5154 }
5155 err = -EINVAL;
5156 }
c7d4b2fa
M		 5157 if (err < 0) {
5158 stac92xx_free(codec);
5159 return err;
5160 }
2f2f4251
M		 5161
5162 codec->patch_ops = stac92xx_patch_ops;
5163
2d34e1b3
TI		 5164 codec->proc_widget_hook = stac927x_proc_hook;
5165
52987656
TI		 5166 /*
5167 * !!FIXME!!
5168 * The STAC927x seem to require fairly long delays for certain
5169 * command sequences. With too short delays (even if the answer
5170 * is set to RIRB properly), it results in the silence output
5171 * on some hardwares like Dell.
5172 *
5173 * The below flag enables the longer delay (see get_response
5174 * in hda_intel.c).
5175 */
5176 codec->bus->needs_damn_long_delay = 1;
5177
2f2f4251
M		 5178 return 0;
5179}
5180
f3302a59
MP		 5181static int patch_stac9205(struct hda_codec *codec)
5182{
5183 struct sigmatel_spec *spec;
8259980e 5184 int err;
f3302a59
MP		 5185
5186 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5187 if (spec == NULL)
5188 return -ENOMEM;
5189
5190 codec->spec = spec;
a4eed138 5191 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5192 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 5193 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5194 stac9205_models,
5195 stac9205_cfg_tbl);
9e507abd 5196 again:
11b44bbd
RF		 5197 if (spec->board_config < 0) {
5198 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5199 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5200 } else
5201 err = stac_save_pin_cfgs(codec,
5202 stac9205_brd_tbl[spec->board_config]);
5203 if (err < 0) {
5204 stac92xx_free(codec);
5205 return err;
f3302a59
MP		 5206 }
5207
1cd2224c 5208 spec->digbeep_nid = 0x23;
f3302a59 5209 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5210 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5211 spec->mux_nids = stac9205_mux_nids;
2549413e 5212 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 5213 spec->smux_nids = stac9205_smux_nids;
5214 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5215 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5216 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5217 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5218 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5219 spec->num_pwrs = 0;
f3302a59
MP		 5220
5221 spec->init = stac9205_core_init;
5222 spec->mixer = stac9205_mixer;
5223
e1f0d669
MR		 5224 spec->aloopback_mask = 0x40;
5225 spec->aloopback_shift = 0;
c0cea0d0 5226 spec->eapd_switch = 1;
f3302a59 5227 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5228
ae0a8ed8 5229 switch (spec->board_config){
ae0a8ed8 5230 case STAC_9205_DELL_M43:
87d48363 5231 /* Enable SPDIF in/out */
af9f341a
TI		 5232 stac_change_pin_config(codec, 0x1f, 0x01441030);
5233 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5234
4fe5195c 5235 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 5236 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5237 if (err < 0)
5238 return err;
c5d08bb5 5239 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 5240 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5241 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 5242 AC_VERB_SET_UNSOLICITED_ENABLE,
5243 AC_USRSP_EN | err);
4fe5195c
MR		 5244
5245 spec->gpio_dir = 0x0b;
0fc9dec4 5246 spec->eapd_mask = 0x01;
4fe5195c
MR		 5247 spec->gpio_mask = 0x1b;
5248 spec->gpio_mute = 0x10;
e2e7d624 5249 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5250 * GPIO3 Low = DRM
87d48363 5251 */
4fe5195c 5252 spec->gpio_data = 0x01;
ae0a8ed8 5253 break;
b2c4f4d7
MR		 5254 case STAC_9205_REF:
5255 /* SPDIF-In enabled */
5256 break;
ae0a8ed8
TD		 5257 default:
5258 /* GPIO0 High = EAPD */
0fc9dec4 5259 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5260 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5261 break;
5262 }
33382403 5263
f3302a59 5264 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5265 if (!err) {
5266 if (spec->board_config < 0) {
5267 printk(KERN_WARNING "hda_codec: No auto-config is "
5268 "available, default to model=ref\n");
5269 spec->board_config = STAC_9205_REF;
5270 goto again;
5271 }
5272 err = -EINVAL;
5273 }
f3302a59
MP		 5274 if (err < 0) {
5275 stac92xx_free(codec);
5276 return err;
5277 }
5278
5279 codec->patch_ops = stac92xx_patch_ops;
5280
2d34e1b3
TI		 5281 codec->proc_widget_hook = stac9205_proc_hook;
5282
f3302a59
MP		 5283 return 0;
5284}
5285
db064e50 5286/*
6d859065 5287 * STAC9872 hack
db064e50
TI		 5288 */
5289
99ccc560 5290/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 5291static hda_nid_t vaio_dacs[] = { 0x2 };
5292#define VAIO_HP_DAC 0x5
5293static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5294static hda_nid_t vaio_mux_nids[] = { 0x15 };
5295
5296static struct hda_input_mux vaio_mux = {
a3a2f429 5297 .num_items = 3,
db064e50 5298 .items = {
d773781c 5299 /* { "HP", 0x0 }, */
1624cb9a
TI		 5300 { "Mic Jack", 0x1 },
5301 { "Internal Mic", 0x2 },
db064e50
TI		 5302 { "PCM", 0x3 },
5303 }
5304};
5305
5306static struct hda_verb vaio_init[] = {
5307 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5308 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 5309 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5310 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5311 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5312 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5313 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 5314 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5315 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5316 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5317 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5318 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5319 {}
5320};
5321
6d859065
GM		 5322static struct hda_verb vaio_ar_init[] = {
5323 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5324 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5325 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5326 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5327/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5328 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5329 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5330 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5331 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5332/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5333 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5334 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5335 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5336 {}
5337};
5338
db064e50 5339static struct snd_kcontrol_new vaio_mixer[] = {
127e82e3
TI		 5340 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5341 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5342 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5343 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
db064e50
TI		 5344 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5345 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5346 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5347 {
5348 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5349 .name = "Capture Source",
5350 .count = 1,
5351 .info = stac92xx_mux_enum_info,
5352 .get = stac92xx_mux_enum_get,
5353 .put = stac92xx_mux_enum_put,
5354 },
5355 {}
5356};
5357
6d859065 5358static struct snd_kcontrol_new vaio_ar_mixer[] = {
127e82e3
TI		 5359 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5360 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5361 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5362 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
6d859065
GM		 5363 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5364 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5365 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5366 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5367 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5368 {
5369 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5370 .name = "Capture Source",
5371 .count = 1,
5372 .info = stac92xx_mux_enum_info,
5373 .get = stac92xx_mux_enum_get,
5374 .put = stac92xx_mux_enum_put,
5375 },
5376 {}
5377};
5378
5379static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5380 .build_controls = stac92xx_build_controls,
5381 .build_pcms = stac92xx_build_pcms,
5382 .init = stac92xx_init,
5383 .free = stac92xx_free,
cb53c626 5384#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5385 .resume = stac92xx_resume,
5386#endif
5387};
5388
72e7b0dd
TI		 5389static int stac9872_vaio_init(struct hda_codec *codec)
5390{
5391 int err;
5392
5393 err = stac92xx_init(codec);
5394 if (err < 0)
5395 return err;
5396 if (codec->patch_ops.unsol_event)
5397 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5398 return 0;
5399}
5400
5401static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5402{
40c1d308 5403 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5404 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5405 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5406 } else {
5407 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5408 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5409 }
5410}
5411
5412static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5413{
5414 switch (res >> 26) {
5415 case STAC_HP_EVENT:
5416 stac9872_vaio_hp_detect(codec, res);
5417 break;
5418 }
5419}
5420
5421static struct hda_codec_ops stac9872_vaio_patch_ops = {
5422 .build_controls = stac92xx_build_controls,
5423 .build_pcms = stac92xx_build_pcms,
5424 .init = stac9872_vaio_init,
5425 .free = stac92xx_free,
5426 .unsol_event = stac9872_vaio_unsol_event,
5427#ifdef CONFIG_PM
5428 .resume = stac92xx_resume,
5429#endif
5430};
5431
6d859065
GM		 5432enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5433 CXD9872RD_VAIO,
5434 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5435 STAC9872AK_VAIO,
5436 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5437 STAC9872K_VAIO,
5438 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5439 CXD9872AKD_VAIO,
5440 STAC_9872_MODELS,
5441};
5442
5443static const char *stac9872_models[STAC_9872_MODELS] = {
5444 [CXD9872RD_VAIO] = "vaio",
5445 [CXD9872AKD_VAIO] = "vaio-ar",
5446};
5447
5448static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5449 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5450 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5451 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5452 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5453 {}
5454};
5455
6d859065 5456static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5457{
5458 struct sigmatel_spec *spec;
5459 int board_config;
5460
f5fcc13c
TI		 5461 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5462 stac9872_models,
5463 stac9872_cfg_tbl);
db064e50
TI		 5464 if (board_config < 0)
5465 /* unknown config, let generic-parser do its job... */
5466 return snd_hda_parse_generic_codec(codec);
5467
5468 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5469 if (spec == NULL)
5470 return -ENOMEM;
5471
5472 codec->spec = spec;
5473 switch (board_config) {
6d859065
GM		 5474 case CXD9872RD_VAIO:
5475 case STAC9872AK_VAIO:
5476 case STAC9872K_VAIO:
db064e50
TI		 5477 spec->mixer = vaio_mixer;
5478 spec->init = vaio_init;
5479 spec->multiout.max_channels = 2;
5480 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5481 spec->multiout.dac_nids = vaio_dacs;
5482 spec->multiout.hp_nid = VAIO_HP_DAC;
5483 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5484 spec->adc_nids = vaio_adcs;
a64135a2 5485 spec->num_pwrs = 0;
db064e50
TI		 5486 spec->input_mux = &vaio_mux;
5487 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5488 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5489 break;
6d859065
GM		 5490
5491 case CXD9872AKD_VAIO:
5492 spec->mixer = vaio_ar_mixer;
5493 spec->init = vaio_ar_init;
5494 spec->multiout.max_channels = 2;
5495 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5496 spec->multiout.dac_nids = vaio_dacs;
5497 spec->multiout.hp_nid = VAIO_HP_DAC;
5498 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5499 spec->num_pwrs = 0;
6d859065
GM		 5500 spec->adc_nids = vaio_adcs;
5501 spec->input_mux = &vaio_mux;
5502 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5503 codec->patch_ops = stac9872_patch_ops;
6d859065 5504 break;
db064e50
TI		 5505 }
5506
db064e50
TI		 5507 return 0;
5508}
5509
5510
2f2f4251
M		 5511/*
5512 * patch entries
5513 */
5514struct hda_codec_preset snd_hda_preset_sigmatel[] = {
5515 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5516 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5517 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5518 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5519 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5520 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5521 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5522 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5523 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5524 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5525 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5526 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5527 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5528 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5529 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5530 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5531 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5532 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5533 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5534 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5535 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5536 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5537 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5538 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5539 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5540 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5541 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5542 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5543 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5544 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5545 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5546 /* The following does not take into account .id=0x83847661 when subsys =
5547 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5548 * currently not fully supported.
5549 */
5550 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5551 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5552 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5553 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5554 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5555 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5556 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5557 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5558 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5559 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5560 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5561 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5562 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5563 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5564 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5565 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5566 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5567 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5568 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5569 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5570 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5571 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5572 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5573 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5574 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5575 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5576 {} /* terminator */
5577};
Clone of davem's net-next-2.6 tree