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[ALSA] hda-codec - Fix capture on ALC262 HP machines
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <sound/driver.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/pci.h>
32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
36
4e55096e
M		 37#define NUM_CONTROL_ALLOC 32
38#define STAC_HP_EVENT 0x37
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
dfe495d0
TI		 42 STAC_9200_DELL_D21,
43 STAC_9200_DELL_D22,
44 STAC_9200_DELL_D23,
45 STAC_9200_DELL_M21,
46 STAC_9200_DELL_M22,
47 STAC_9200_DELL_M23,
48 STAC_9200_DELL_M24,
49 STAC_9200_DELL_M25,
50 STAC_9200_DELL_M26,
51 STAC_9200_DELL_M27,
f5fcc13c
TI		 52 STAC_9200_MODELS
53};
54
55enum {
56 STAC_9205_REF,
dfe495d0 57 STAC_9205_DELL_M42,
ae0a8ed8
TD		 58 STAC_9205_DELL_M43,
59 STAC_9205_DELL_M44,
60 STAC_9205_M43xx,
f5fcc13c
TI		 61 STAC_9205_MODELS
62};
63
8e21c34c
TD		 64enum {
65 STAC_925x_REF,
66 STAC_M2_2,
67 STAC_MA6,
2c11f955 68 STAC_PA6,
8e21c34c
TD		 69 STAC_925x_MODELS
70};
71
f5fcc13c
TI		 72enum {
73 STAC_D945_REF,
74 STAC_D945GTP3,
75 STAC_D945GTP5,
5d5d3bc3
IZ		 76 STAC_INTEL_MAC_V1,
77 STAC_INTEL_MAC_V2,
78 STAC_INTEL_MAC_V3,
79 STAC_INTEL_MAC_V4,
80 STAC_INTEL_MAC_V5,
dfe495d0 81 /* for backward compatibility */
f5fcc13c 82 STAC_MACMINI,
3fc24d85 83 STAC_MACBOOK,
6f0778d8
NB		 84 STAC_MACBOOK_PRO_V1,
85 STAC_MACBOOK_PRO_V2,
f16928fb 86 STAC_IMAC_INTEL,
0dae0f83 87 STAC_IMAC_INTEL_20,
dfe495d0
TI		 88 STAC_922X_DELL_D81,
89 STAC_922X_DELL_D82,
90 STAC_922X_DELL_M81,
91 STAC_922X_DELL_M82,
f5fcc13c
TI		 92 STAC_922X_MODELS
93};
94
95enum {
96 STAC_D965_REF,
97 STAC_D965_3ST,
98 STAC_D965_5ST,
4ff076e5 99 STAC_DELL_3ST,
f5fcc13c
TI		 100 STAC_927X_MODELS
101};
403d1944 102
2f2f4251 103struct sigmatel_spec {
c8b6bf9b 104 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 105 unsigned int num_mixers;
106
403d1944 107 int board_config;
c7d4b2fa 108 unsigned int surr_switch: 1;
403d1944
MP		 109 unsigned int line_switch: 1;
110 unsigned int mic_switch: 1;
3cc08dc6 111 unsigned int alt_switch: 1;
82bc955f 112 unsigned int hp_detect: 1;
62fe78e9 113 unsigned int gpio_mute: 1;
c7d4b2fa 114
8259980e
TI		 115 unsigned int gpio_mask, gpio_data;
116
2f2f4251
M		 117 /* playback */
118 struct hda_multi_out multiout;
3cc08dc6 119 hda_nid_t dac_nids[5];
2f2f4251
M		 120
121 /* capture */
122 hda_nid_t *adc_nids;
2f2f4251 123 unsigned int num_adcs;
dabbed6f
M		 124 hda_nid_t *mux_nids;
125 unsigned int num_muxes;
8b65727b
MP		 126 hda_nid_t *dmic_nids;
127 unsigned int num_dmics;
128 hda_nid_t dmux_nid;
dabbed6f 129 hda_nid_t dig_in_nid;
2f2f4251 130
2f2f4251
M		 131 /* pin widgets */
132 hda_nid_t *pin_nids;
133 unsigned int num_pins;
2f2f4251 134 unsigned int *pin_configs;
11b44bbd 135 unsigned int *bios_pin_configs;
2f2f4251
M		 136
137 /* codec specific stuff */
138 struct hda_verb *init;
c8b6bf9b 139 struct snd_kcontrol_new *mixer;
2f2f4251
M		 140
141 /* capture source */
8b65727b
MP		 142 struct hda_input_mux *dinput_mux;
143 unsigned int cur_dmux;
c7d4b2fa 144 struct hda_input_mux *input_mux;
3cc08dc6 145 unsigned int cur_mux[3];
2f2f4251 146
403d1944
MP		 147 /* i/o switches */
148 unsigned int io_switch[2];
2f2f4251 149
c7d4b2fa
M		 150 struct hda_pcm pcm_rec[2]; /* PCM information */
151
152 /* dynamic controls and input_mux */
153 struct auto_pin_cfg autocfg;
154 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 155 struct snd_kcontrol_new *kctl_alloc;
8b65727b 156 struct hda_input_mux private_dimux;
c7d4b2fa 157 struct hda_input_mux private_imux;
2f2f4251
M		 158};
159
160static hda_nid_t stac9200_adc_nids[1] = {
161 0x03,
162};
163
164static hda_nid_t stac9200_mux_nids[1] = {
165 0x0c,
166};
167
168static hda_nid_t stac9200_dac_nids[1] = {
169 0x02,
170};
171
8e21c34c
TD		 172static hda_nid_t stac925x_adc_nids[1] = {
173 0x03,
174};
175
176static hda_nid_t stac925x_mux_nids[1] = {
177 0x0f,
178};
179
180static hda_nid_t stac925x_dac_nids[1] = {
181 0x02,
182};
183
2c11f955
TD		 184static hda_nid_t stac925x_dmic_nids[1] = {
185 0x15,
186};
187
2f2f4251
M		 188static hda_nid_t stac922x_adc_nids[2] = {
189 0x06, 0x07,
190};
191
192static hda_nid_t stac922x_mux_nids[2] = {
193 0x12, 0x13,
194};
195
3cc08dc6
MP		 196static hda_nid_t stac927x_adc_nids[3] = {
197 0x07, 0x08, 0x09
198};
199
200static hda_nid_t stac927x_mux_nids[3] = {
201 0x15, 0x16, 0x17
202};
203
f3302a59
MP		 204static hda_nid_t stac9205_adc_nids[2] = {
205 0x12, 0x13
206};
207
208static hda_nid_t stac9205_mux_nids[2] = {
209 0x19, 0x1a
210};
211
2549413e
TI		 212static hda_nid_t stac9205_dmic_nids[2] = {
213 0x17, 0x18,
8b65727b
MP		 214};
215
c7d4b2fa 216static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 217 0x08, 0x09, 0x0d, 0x0e,
218 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 219};
220
8e21c34c
TD		 221static hda_nid_t stac925x_pin_nids[8] = {
222 0x07, 0x08, 0x0a, 0x0b,
223 0x0c, 0x0d, 0x10, 0x11,
224};
225
2f2f4251
M		 226static hda_nid_t stac922x_pin_nids[10] = {
227 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
228 0x0f, 0x10, 0x11, 0x15, 0x1b,
229};
230
3cc08dc6
MP		 231static hda_nid_t stac927x_pin_nids[14] = {
232 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
233 0x0f, 0x10, 0x11, 0x12, 0x13,
234 0x14, 0x21, 0x22, 0x23,
235};
236
f3302a59
MP		 237static hda_nid_t stac9205_pin_nids[12] = {
238 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
239 0x0f, 0x14, 0x16, 0x17, 0x18,
240 0x21, 0x22,
f3302a59
MP		 241};
242
8b65727b
MP		 243static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
244 struct snd_ctl_elem_info *uinfo)
245{
246 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
247 struct sigmatel_spec *spec = codec->spec;
248 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
249}
250
251static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
252 struct snd_ctl_elem_value *ucontrol)
253{
254 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
255 struct sigmatel_spec *spec = codec->spec;
256
257 ucontrol->value.enumerated.item[0] = spec->cur_dmux;
258 return 0;
259}
260
261static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
262 struct snd_ctl_elem_value *ucontrol)
263{
264 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
265 struct sigmatel_spec *spec = codec->spec;
266
267 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
268 spec->dmux_nid, &spec->cur_dmux);
269}
270
c8b6bf9b 271static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 272{
273 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
274 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 275 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 276}
277
c8b6bf9b 278static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 279{
280 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
281 struct sigmatel_spec *spec = codec->spec;
282 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
283
284 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
285 return 0;
286}
287
c8b6bf9b 288static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 289{
290 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
291 struct sigmatel_spec *spec = codec->spec;
292 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
293
c7d4b2fa 294 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 295 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
296}
297
c7d4b2fa 298static struct hda_verb stac9200_core_init[] = {
2f2f4251 299 /* set dac0mux for dac converter */
c7d4b2fa 300 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 301 {}
302};
303
8e21c34c
TD		 304static struct hda_verb stac925x_core_init[] = {
305 /* set dac0mux for dac converter */
306 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
307 {}
308};
309
c7d4b2fa 310static struct hda_verb stac922x_core_init[] = {
2f2f4251 311 /* set master volume and direct control */
c7d4b2fa 312 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 313 {}
314};
315
93ed1503 316static struct hda_verb d965_core_init[] = {
19039bd0 317 /* set master volume and direct control */
93ed1503 318 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 319 /* unmute node 0x1b */
320 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
321 /* select node 0x03 as DAC */
322 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
323 {}
324};
325
3cc08dc6
MP		 326static struct hda_verb stac927x_core_init[] = {
327 /* set master volume and direct control */
328 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
329 {}
330};
331
f3302a59
MP		 332static struct hda_verb stac9205_core_init[] = {
333 /* set master volume and direct control */
334 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
335 {}
336};
337
c8b6bf9b 338static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 339 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
340 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
341 {
342 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
343 .name = "Input Source",
344 .count = 1,
345 .info = stac92xx_mux_enum_info,
346 .get = stac92xx_mux_enum_get,
347 .put = stac92xx_mux_enum_put,
348 },
349 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
350 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 351 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 352 { } /* end */
353};
354
8e21c34c 355static struct snd_kcontrol_new stac925x_mixer[] = {
8e21c34c
TD		 356 {
357 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
358 .name = "Input Source",
359 .count = 1,
360 .info = stac92xx_mux_enum_info,
361 .get = stac92xx_mux_enum_get,
362 .put = stac92xx_mux_enum_put,
363 },
364 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
365 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
366 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
367 { } /* end */
368};
369
c7d4b2fa 370/* This needs to be generated dynamically based on sequence */
c8b6bf9b 371static struct snd_kcontrol_new stac922x_mixer[] = {
2f2f4251
M		 372 {
373 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
374 .name = "Input Source",
375 .count = 1,
376 .info = stac92xx_mux_enum_info,
377 .get = stac92xx_mux_enum_get,
378 .put = stac92xx_mux_enum_put,
379 },
380 HDA_CODEC_VOLUME("Capture Volume", 0x17, 0x0, HDA_INPUT),
0fd1708a 381 HDA_CODEC_MUTE("Capture Switch", 0x17, 0x0, HDA_INPUT),
2f2f4251
M		 382 HDA_CODEC_VOLUME("Mux Capture Volume", 0x12, 0x0, HDA_OUTPUT),
383 { } /* end */
384};
385
19039bd0
TI		 386/* This needs to be generated dynamically based on sequence */
387static struct snd_kcontrol_new stac9227_mixer[] = {
388 {
389 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
390 .name = "Input Source",
391 .count = 1,
392 .info = stac92xx_mux_enum_info,
393 .get = stac92xx_mux_enum_get,
394 .put = stac92xx_mux_enum_put,
395 },
396 HDA_CODEC_VOLUME("Capture Volume", 0x15, 0x0, HDA_OUTPUT),
397 HDA_CODEC_MUTE("Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
398 { } /* end */
399};
400
d1d985f0 401static struct snd_kcontrol_new stac927x_mixer[] = {
3cc08dc6
MP		 402 {
403 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
404 .name = "Input Source",
405 .count = 1,
406 .info = stac92xx_mux_enum_info,
407 .get = stac92xx_mux_enum_get,
408 .put = stac92xx_mux_enum_put,
409 },
410 HDA_CODEC_VOLUME("InMux Capture Volume", 0x15, 0x0, HDA_OUTPUT),
411 HDA_CODEC_VOLUME("InVol Capture Volume", 0x18, 0x0, HDA_INPUT),
412 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
413 { } /* end */
414};
415
d1d985f0 416static struct snd_kcontrol_new stac9205_mixer[] = {
8b65727b
MP		 417 {
418 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
419 .name = "Digital Input Source",
420 .count = 1,
421 .info = stac92xx_dmux_enum_info,
422 .get = stac92xx_dmux_enum_get,
423 .put = stac92xx_dmux_enum_put,
424 },
f3302a59
MP		 425 {
426 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
427 .name = "Input Source",
428 .count = 1,
429 .info = stac92xx_mux_enum_info,
430 .get = stac92xx_mux_enum_get,
431 .put = stac92xx_mux_enum_put,
432 },
433 HDA_CODEC_VOLUME("InMux Capture Volume", 0x19, 0x0, HDA_OUTPUT),
434 HDA_CODEC_VOLUME("InVol Capture Volume", 0x1b, 0x0, HDA_INPUT),
435 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1d, 0x0, HDA_OUTPUT),
436 { } /* end */
437};
438
2f2f4251
M		 439static int stac92xx_build_controls(struct hda_codec *codec)
440{
441 struct sigmatel_spec *spec = codec->spec;
442 int err;
c7d4b2fa 443 int i;
2f2f4251
M		 444
445 err = snd_hda_add_new_ctls(codec, spec->mixer);
446 if (err < 0)
447 return err;
c7d4b2fa
M		 448
449 for (i = 0; i < spec->num_mixers; i++) {
450 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
451 if (err < 0)
452 return err;
453 }
454
dabbed6f
M		 455 if (spec->multiout.dig_out_nid) {
456 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
457 if (err < 0)
458 return err;
459 }
460 if (spec->dig_in_nid) {
461 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
462 if (err < 0)
463 return err;
464 }
465 return 0;
2f2f4251
M		 466}
467
403d1944 468static unsigned int ref9200_pin_configs[8] = {
dabbed6f 469 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 470 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
471};
472
dfe495d0
TI		 473/*
474 STAC 9200 pin configs for
475 102801A8
476 102801DE
477 102801E8
478*/
479static unsigned int dell9200_d21_pin_configs[8] = {
480 0x400001f0, 0x400001f1, 0x01a19021, 0x90100140,
481 0x01813122, 0x02214030, 0x01014010, 0x02a19020,
482};
483
484/*
485 STAC 9200 pin configs for
486 102801C0
487 102801C1
488*/
489static unsigned int dell9200_d22_pin_configs[8] = {
490 0x400001f0, 0x400001f1, 0x02a19021, 0x90100140,
491 0x400001f2, 0x0221401f, 0x01014010, 0x01813020,
492};
493
494/*
495 STAC 9200 pin configs for
496 102801C4 (Dell Dimension E310)
497 102801C5
498 102801C7
499 102801D9
500 102801DA
501 102801E3
502*/
503static unsigned int dell9200_d23_pin_configs[8] = {
504 0x400001f0, 0x400001f1, 0x01a19021, 0x90100140,
505 0x400001f2, 0x0221401f, 0x01014010, 0x01813020,
506};
507
508
509/*
510 STAC 9200-32 pin configs for
511 102801B5 (Dell Inspiron 630m)
512 102801D8 (Dell Inspiron 640m)
513*/
514static unsigned int dell9200_m21_pin_configs[8] = {
515 0x40c003fa, 0x03441340, 0x03a11020, 0x401003fc,
516 0x403003fd, 0x0321121f, 0x0321121f, 0x408003fb,
517};
518
519/*
520 STAC 9200-32 pin configs for
521 102801C2 (Dell Latitude D620)
522 102801C8
523 102801CC (Dell Latitude D820)
524 102801D4
525 102801D6
526*/
527static unsigned int dell9200_m22_pin_configs[8] = {
528 0x40c003fa, 0x0144131f, 0x03A11020, 0x401003fb,
529 0x40f000fc, 0x0321121f, 0x90170310, 0x90a70321,
530};
531
532/*
533 STAC 9200-32 pin configs for
534 102801CE (Dell XPS M1710)
535 102801CF (Dell Precision M90)
536*/
537static unsigned int dell9200_m23_pin_configs[8] = {
538 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
539 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
540};
541
542/*
543 STAC 9200-32 pin configs for
544 102801C9
545 102801CA
546 102801CB (Dell Latitude 120L)
547 102801D3
548*/
549static unsigned int dell9200_m24_pin_configs[8] = {
550 0x40c003fa, 0x404003fb, 0x03a11020, 0x401003fd,
551 0x403003fe, 0x0321121f, 0x90170310, 0x408003fc,
552};
553
554/*
555 STAC 9200-32 pin configs for
556 102801BD (Dell Inspiron E1505n)
557 102801EE
558 102801EF
559*/
560static unsigned int dell9200_m25_pin_configs[8] = {
561 0x40c003fa, 0x01441340, 0x04a11020, 0x401003fc,
562 0x403003fd, 0x0421121f, 0x90170310, 0x408003fb,
563};
564
565/*
566 STAC 9200-32 pin configs for
567 102801F5 (Dell Inspiron 1501)
568 102801F6
569*/
570static unsigned int dell9200_m26_pin_configs[8] = {
571 0x40c003fa, 0x404003fb, 0x04a11020, 0x401003fd,
572 0x403003fe, 0x0421121f, 0x90170310, 0x408003fc,
573};
574
575/*
576 STAC 9200-32
577 102801CD (Dell Inspiron E1705/9400)
578*/
579static unsigned int dell9200_m27_pin_configs[8] = {
580 0x40c003fa, 0x01441340, 0x04a11020, 0x90170310,
581 0x40f003fc, 0x0421121f, 0x90170310, 0x408003fb,
582};
583
584
f5fcc13c
TI		 585static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
586 [STAC_REF] = ref9200_pin_configs,
dfe495d0
TI		 587 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
588 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
589 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
590 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
591 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
592 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
593 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
594 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
595 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
596 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 597};
598
f5fcc13c
TI		 599static const char *stac9200_models[STAC_9200_MODELS] = {
600 [STAC_REF] = "ref",
dfe495d0
TI		 601 [STAC_9200_DELL_D21] = "dell-d21",
602 [STAC_9200_DELL_D22] = "dell-d22",
603 [STAC_9200_DELL_D23] = "dell-d23",
604 [STAC_9200_DELL_M21] = "dell-m21",
605 [STAC_9200_DELL_M22] = "dell-m22",
606 [STAC_9200_DELL_M23] = "dell-m23",
607 [STAC_9200_DELL_M24] = "dell-m24",
608 [STAC_9200_DELL_M25] = "dell-m25",
609 [STAC_9200_DELL_M26] = "dell-m26",
610 [STAC_9200_DELL_M27] = "dell-m27",
f5fcc13c
TI		 611};
612
613static struct snd_pci_quirk stac9200_cfg_tbl[] = {
614 /* SigmaTel reference board */
615 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
616 "DFI LanParty", STAC_REF),
e7377071 617 /* Dell laptops have BIOS problem */
dfe495d0
TI		 618 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
619 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 620 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 621 "Dell Inspiron 630m", STAC_9200_DELL_M21),
622 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
623 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
624 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
625 "unknown Dell", STAC_9200_DELL_D22),
626 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
627 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 628 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 629 "Dell Latitude D620", STAC_9200_DELL_M22),
630 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
631 "unknown Dell", STAC_9200_DELL_D23),
632 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
633 "unknown Dell", STAC_9200_DELL_D23),
634 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
635 "unknown Dell", STAC_9200_DELL_M22),
636 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
637 "unknown Dell", STAC_9200_DELL_M24),
638 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
639 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 640 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 641 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 642 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 643 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 644 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 645 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 646 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 647 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 648 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 649 "Dell Precision M90", STAC_9200_DELL_M23),
650 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
651 "unknown Dell", STAC_9200_DELL_M22),
652 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
653 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 654 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 655 "unknown Dell", STAC_9200_DELL_M22),
49c605db 656 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 657 "Dell Inspiron 640m", STAC_9200_DELL_M21),
658 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
659 "unknown Dell", STAC_9200_DELL_D23),
660 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
661 "unknown Dell", STAC_9200_DELL_D23),
662 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
663 "unknown Dell", STAC_9200_DELL_D21),
664 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
665 "unknown Dell", STAC_9200_DELL_D23),
666 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
667 "unknown Dell", STAC_9200_DELL_D21),
668 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
669 "unknown Dell", STAC_9200_DELL_M25),
670 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
671 "unknown Dell", STAC_9200_DELL_M25),
49c605db 672 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 673 "Dell Inspiron 1501", STAC_9200_DELL_M26),
674 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
675 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 676 /* Panasonic */
677 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
678
403d1944
MP		 679 {} /* terminator */
680};
681
8e21c34c
TD		 682static unsigned int ref925x_pin_configs[8] = {
683 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
684 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
685};
686
687static unsigned int stac925x_MA6_pin_configs[8] = {
688 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
689 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
690};
691
2c11f955
TD		 692static unsigned int stac925x_PA6_pin_configs[8] = {
693 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
694 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
695};
696
8e21c34c 697static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 698 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
699 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 700};
701
702static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
703 [STAC_REF] = ref925x_pin_configs,
704 [STAC_M2_2] = stac925xM2_2_pin_configs,
705 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 706 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 707};
708
709static const char *stac925x_models[STAC_925x_MODELS] = {
710 [STAC_REF] = "ref",
711 [STAC_M2_2] = "m2-2",
712 [STAC_MA6] = "m6",
2c11f955 713 [STAC_PA6] = "pa6",
8e21c34c
TD		 714};
715
716static struct snd_pci_quirk stac925x_cfg_tbl[] = {
717 /* SigmaTel reference board */
718 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 719 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 720 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
721 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
722 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 723 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 724 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
725 {} /* terminator */
726};
727
403d1944
MP		 728static unsigned int ref922x_pin_configs[10] = {
729 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
730 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 731 0x40000100, 0x40000100,
732};
733
dfe495d0
TI		 734/*
735 STAC 922X pin configs for
736 102801A7
737 102801AB
738 102801A9
739 102801D1
740 102801D2
741*/
742static unsigned int dell_922x_d81_pin_configs[10] = {
743 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
744 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
745 0x01813122, 0x400001f2,
746};
747
748/*
749 STAC 922X pin configs for
750 102801AC
751 102801D0
752*/
753static unsigned int dell_922x_d82_pin_configs[10] = {
754 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
755 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
756 0x01813122, 0x400001f1,
757};
758
759/*
760 STAC 922X pin configs for
761 102801BF
762*/
763static unsigned int dell_922x_m81_pin_configs[10] = {
764 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
765 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
766 0x40C003f1, 0x405003f0,
767};
768
769/*
770 STAC 9221 A1 pin configs for
771 102801D7 (Dell XPS M1210)
772*/
773static unsigned int dell_922x_m82_pin_configs[10] = {
774 0x0221121f, 0x408103ff, 0x02111212, 0x90100310,
775 0x408003f1, 0x02111211, 0x03451340, 0x40c003f2,
776 0x508003f3, 0x405003f4,
777};
778
403d1944 779static unsigned int d945gtp3_pin_configs[10] = {
869264c4 780 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 781 0x40000100, 0x40000100, 0x40000100, 0x40000100,
782 0x02a19120, 0x40000100,
783};
784
785static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 786 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
787 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 788 0x02a19320, 0x40000100,
789};
790
5d5d3bc3
IZ		 791static unsigned int intel_mac_v1_pin_configs[10] = {
792 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
793 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
794 0x400000fc, 0x400000fb,
795};
796
797static unsigned int intel_mac_v2_pin_configs[10] = {
798 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
799 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
800 0x400000fc, 0x400000fb,
6f0778d8
NB		 801};
802
5d5d3bc3
IZ		 803static unsigned int intel_mac_v3_pin_configs[10] = {
804 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
805 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 806 0x400000fc, 0x400000fb,
807};
808
5d5d3bc3
IZ		 809static unsigned int intel_mac_v4_pin_configs[10] = {
810 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
811 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 812 0x400000fc, 0x400000fb,
813};
814
5d5d3bc3
IZ		 815static unsigned int intel_mac_v5_pin_configs[10] = {
816 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
817 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
818 0x400000fc, 0x400000fb,
0dae0f83
TI		 819};
820
76c08828 821
19039bd0 822static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 823 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 824 [STAC_D945GTP3] = d945gtp3_pin_configs,
825 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 826 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
827 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
828 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
829 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
830 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 831 /* for backward compatibility */
5d5d3bc3
IZ		 832 [STAC_MACMINI] = intel_mac_v3_pin_configs,
833 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
834 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
835 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
836 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
837 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 838 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
839 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
840 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
841 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 842};
843
f5fcc13c
TI		 844static const char *stac922x_models[STAC_922X_MODELS] = {
845 [STAC_D945_REF] = "ref",
846 [STAC_D945GTP5] = "5stack",
847 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 848 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
849 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
850 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
851 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
852 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 853 /* for backward compatibility */
f5fcc13c 854 [STAC_MACMINI] = "macmini",
3fc24d85 855 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 856 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
857 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 858 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 859 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 860 [STAC_922X_DELL_D81] = "dell-d81",
861 [STAC_922X_DELL_D82] = "dell-d82",
862 [STAC_922X_DELL_M81] = "dell-m81",
863 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 864};
865
866static struct snd_pci_quirk stac922x_cfg_tbl[] = {
867 /* SigmaTel reference board */
868 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
869 "DFI LanParty", STAC_D945_REF),
870 /* Intel 945G based systems */
871 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
872 "Intel D945G", STAC_D945GTP3),
873 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
874 "Intel D945G", STAC_D945GTP3),
875 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
876 "Intel D945G", STAC_D945GTP3),
877 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
878 "Intel D945G", STAC_D945GTP3),
879 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
880 "Intel D945G", STAC_D945GTP3),
881 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
882 "Intel D945G", STAC_D945GTP3),
883 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
884 "Intel D945G", STAC_D945GTP3),
885 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
886 "Intel D945G", STAC_D945GTP3),
887 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
888 "Intel D945G", STAC_D945GTP3),
889 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
890 "Intel D945G", STAC_D945GTP3),
891 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
892 "Intel D945G", STAC_D945GTP3),
893 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
894 "Intel D945G", STAC_D945GTP3),
895 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
896 "Intel D945G", STAC_D945GTP3),
897 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
898 "Intel D945G", STAC_D945GTP3),
899 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
900 "Intel D945G", STAC_D945GTP3),
901 /* Intel D945G 5-stack systems */
902 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
903 "Intel D945G", STAC_D945GTP5),
904 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
905 "Intel D945G", STAC_D945GTP5),
906 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
907 "Intel D945G", STAC_D945GTP5),
908 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
909 "Intel D945G", STAC_D945GTP5),
910 /* Intel 945P based systems */
911 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
912 "Intel D945P", STAC_D945GTP3),
913 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
914 "Intel D945P", STAC_D945GTP3),
915 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
916 "Intel D945P", STAC_D945GTP3),
917 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
918 "Intel D945P", STAC_D945GTP3),
919 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
920 "Intel D945P", STAC_D945GTP3),
921 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
922 "Intel D945P", STAC_D945GTP5),
923 /* other systems */
924 /* Apple Mac Mini (early 2006) */
925 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 926 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 927 /* Dell systems */
928 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
929 "unknown Dell", STAC_922X_DELL_D81),
930 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
931 "unknown Dell", STAC_922X_DELL_D81),
932 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
933 "unknown Dell", STAC_922X_DELL_D81),
934 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
935 "unknown Dell", STAC_922X_DELL_D82),
936 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
937 "unknown Dell", STAC_922X_DELL_M81),
938 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
939 "unknown Dell", STAC_922X_DELL_D82),
940 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
941 "unknown Dell", STAC_922X_DELL_D81),
942 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
943 "unknown Dell", STAC_922X_DELL_D81),
944 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
945 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 946 {} /* terminator */
947};
948
3cc08dc6 949static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 950 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
951 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
952 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
953 0x01c42190, 0x40000100,
3cc08dc6
MP		 954};
955
93ed1503 956static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 957 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
958 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
959 0x40000100, 0x40000100, 0x40000100, 0x40000100,
960 0x40000100, 0x40000100
961};
962
93ed1503
TD		 963static unsigned int d965_5st_pin_configs[14] = {
964 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
965 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
966 0x40000100, 0x40000100, 0x40000100, 0x01442070,
967 0x40000100, 0x40000100
968};
969
4ff076e5
TD		 970static unsigned int dell_3st_pin_configs[14] = {
971 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
972 0x01111212, 0x01116211, 0x01813050, 0x01112214,
973 0x403003fa, 0x40000100, 0x40000100, 0x404003fb,
974 0x40c003fc, 0x40000100
975};
976
93ed1503 977static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
f5fcc13c 978 [STAC_D965_REF] = ref927x_pin_configs,
93ed1503
TD		 979 [STAC_D965_3ST] = d965_3st_pin_configs,
980 [STAC_D965_5ST] = d965_5st_pin_configs,
4ff076e5 981 [STAC_DELL_3ST] = dell_3st_pin_configs,
3cc08dc6
MP		 982};
983
f5fcc13c
TI		 984static const char *stac927x_models[STAC_927X_MODELS] = {
985 [STAC_D965_REF] = "ref",
986 [STAC_D965_3ST] = "3stack",
987 [STAC_D965_5ST] = "5stack",
4ff076e5 988 [STAC_DELL_3ST] = "dell-3stack",
f5fcc13c
TI		 989};
990
991static struct snd_pci_quirk stac927x_cfg_tbl[] = {
992 /* SigmaTel reference board */
993 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
994 "DFI LanParty", STAC_D965_REF),
81d3dbde 995 /* Intel 946 based systems */
f5fcc13c
TI		 996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
997 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 998 /* 965 based 3 stack systems */
f5fcc13c
TI		 999 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1001 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1002 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1003 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1005 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1007 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1009 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1010 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1011 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1013 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1014 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1015 /* Dell 3 stack systems */
dfe495d0 1016 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1017 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1018 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
93ed1503 1019 /* 965 based 5 stack systems */
f5fcc13c
TI		 1020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1021 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1023 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1028 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1029 {} /* terminator */
1030};
1031
f3302a59
MP		 1032static unsigned int ref9205_pin_configs[12] = {
1033 0x40000100, 0x40000100, 0x01016011, 0x01014010,
8b65727b
MP		 1034 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
1035 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1036};
1037
dfe495d0
TI		 1038/*
1039 STAC 9205 pin configs for
1040 102801F1
1041 102801F2
1042 102801FC
1043 102801FD
1044 10280204
1045 1028021F
1046*/
1047static unsigned int dell_9205_m42_pin_configs[12] = {
1048 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1049 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1050 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1051};
1052
1053/*
1054 STAC 9205 pin configs for
1055 102801F9
1056 102801FA
1057 102801FE
1058 102801FF (Dell Precision M4300)
1059 10280206
1060 10280200
1061 10280201
1062*/
1063static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1064 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1065 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1066 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1067};
1068
dfe495d0 1069static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1070 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1071 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1072 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1073};
1074
f5fcc13c 1075static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1076 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1077 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1078 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1079 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
ae0a8ed8 1080 [STAC_9205_M43xx] = NULL,
f3302a59
MP		 1081};
1082
f5fcc13c
TI		 1083static const char *stac9205_models[STAC_9205_MODELS] = {
1084 [STAC_9205_REF] = "ref",
dfe495d0 1085 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1086 [STAC_9205_DELL_M43] = "dell-m43",
1087 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1088};
1089
1090static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1091 /* SigmaTel reference board */
1092 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1093 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1094 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1095 "unknown Dell", STAC_9205_DELL_M42),
1096 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1097 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1098 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
1099 "Dell Precision", STAC_9205_M43xx),
1100 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1101 "Dell Precision", STAC_9205_DELL_M43),
1102 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1103 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1104 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1105 "unknown Dell", STAC_9205_DELL_M42),
1106 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1107 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1108 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1109 "Dell Precision", STAC_9205_DELL_M43),
1110 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1111 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1113 "Dell Precision", STAC_9205_DELL_M43),
1114 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1115 "Dell Inspiron", STAC_9205_DELL_M44),
1116 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1117 "Dell Inspiron", STAC_9205_DELL_M44),
1118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1119 "Dell Inspiron", STAC_9205_DELL_M44),
1120 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1121 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1122 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1123 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1124 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1125 "Dell Inspiron", STAC_9205_DELL_M44),
f3302a59
MP		 1126 {} /* terminator */
1127};
1128
11b44bbd
RF		 1129static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1130{
1131 int i;
1132 struct sigmatel_spec *spec = codec->spec;
1133
1134 if (! spec->bios_pin_configs) {
1135 spec->bios_pin_configs = kcalloc(spec->num_pins,
1136 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1137 if (! spec->bios_pin_configs)
1138 return -ENOMEM;
1139 }
1140
1141 for (i = 0; i < spec->num_pins; i++) {
1142 hda_nid_t nid = spec->pin_nids[i];
1143 unsigned int pin_cfg;
1144
1145 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1146 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1147 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1148 nid, pin_cfg);
1149 spec->bios_pin_configs[i] = pin_cfg;
1150 }
1151
1152 return 0;
1153}
1154
87d48363
MR		 1155static void stac92xx_set_config_reg(struct hda_codec *codec,
1156 hda_nid_t pin_nid, unsigned int pin_config)
1157{
1158 int i;
1159 snd_hda_codec_write(codec, pin_nid, 0,
1160 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1161 pin_config & 0x000000ff);
1162 snd_hda_codec_write(codec, pin_nid, 0,
1163 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1164 (pin_config & 0x0000ff00) >> 8);
1165 snd_hda_codec_write(codec, pin_nid, 0,
1166 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1167 (pin_config & 0x00ff0000) >> 16);
1168 snd_hda_codec_write(codec, pin_nid, 0,
1169 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1170 pin_config >> 24);
1171 i = snd_hda_codec_read(codec, pin_nid, 0,
1172 AC_VERB_GET_CONFIG_DEFAULT,
1173 0x00);
1174 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1175 pin_nid, i);
1176}
1177
2f2f4251
M		 1178static void stac92xx_set_config_regs(struct hda_codec *codec)
1179{
1180 int i;
1181 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1182
87d48363
MR		 1183 if (!spec->pin_configs)
1184 return;
11b44bbd 1185
87d48363
MR		 1186 for (i = 0; i < spec->num_pins; i++)
1187 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1188 spec->pin_configs[i]);
2f2f4251 1189}
2f2f4251 1190
8259980e 1191static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
92a22beb 1192{
8259980e 1193 struct sigmatel_spec *spec = codec->spec;
87d48363 1194 /* Configure GPIOx as output */
82beb8fd
TI		 1195 snd_hda_codec_write_cache(codec, codec->afg, 0,
1196 AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
87d48363 1197 /* Configure GPIOx as CMOS */
82beb8fd 1198 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
87d48363 1199 /* Assert GPIOx */
82beb8fd
TI		 1200 snd_hda_codec_write_cache(codec, codec->afg, 0,
1201 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
87d48363 1202 /* Enable GPIOx */
82beb8fd
TI		 1203 snd_hda_codec_write_cache(codec, codec->afg, 0,
1204 AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
92a22beb
MR		 1205}
1206
dabbed6f 1207/*
c7d4b2fa 1208 * Analog playback callbacks
dabbed6f 1209 */
c7d4b2fa
M		 1210static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1211 struct hda_codec *codec,
c8b6bf9b 1212 struct snd_pcm_substream *substream)
2f2f4251 1213{
dabbed6f 1214 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1215 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1216}
1217
2f2f4251
M		 1218static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1219 struct hda_codec *codec,
1220 unsigned int stream_tag,
1221 unsigned int format,
c8b6bf9b 1222 struct snd_pcm_substream *substream)
2f2f4251
M		 1223{
1224 struct sigmatel_spec *spec = codec->spec;
403d1944 1225 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1226}
1227
1228static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1229 struct hda_codec *codec,
c8b6bf9b 1230 struct snd_pcm_substream *substream)
2f2f4251
M		 1231{
1232 struct sigmatel_spec *spec = codec->spec;
1233 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1234}
1235
dabbed6f
M		 1236/*
1237 * Digital playback callbacks
1238 */
1239static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1240 struct hda_codec *codec,
c8b6bf9b 1241 struct snd_pcm_substream *substream)
dabbed6f
M		 1242{
1243 struct sigmatel_spec *spec = codec->spec;
1244 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1245}
1246
1247static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1248 struct hda_codec *codec,
c8b6bf9b 1249 struct snd_pcm_substream *substream)
dabbed6f
M		 1250{
1251 struct sigmatel_spec *spec = codec->spec;
1252 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1253}
1254
6b97eb45
TI		 1255static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1256 struct hda_codec *codec,
1257 unsigned int stream_tag,
1258 unsigned int format,
1259 struct snd_pcm_substream *substream)
1260{
1261 struct sigmatel_spec *spec = codec->spec;
1262 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1263 stream_tag, format, substream);
1264}
1265
dabbed6f 1266
2f2f4251
M		 1267/*
1268 * Analog capture callbacks
1269 */
1270static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1271 struct hda_codec *codec,
1272 unsigned int stream_tag,
1273 unsigned int format,
c8b6bf9b 1274 struct snd_pcm_substream *substream)
2f2f4251
M		 1275{
1276 struct sigmatel_spec *spec = codec->spec;
1277
1278 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1279 stream_tag, 0, format);
1280 return 0;
1281}
1282
1283static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1284 struct hda_codec *codec,
c8b6bf9b 1285 struct snd_pcm_substream *substream)
2f2f4251
M		 1286{
1287 struct sigmatel_spec *spec = codec->spec;
1288
1289 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1290 return 0;
1291}
1292
dabbed6f
M		 1293static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1294 .substreams = 1,
1295 .channels_min = 2,
1296 .channels_max = 2,
1297 /* NID is set in stac92xx_build_pcms */
1298 .ops = {
1299 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1300 .close = stac92xx_dig_playback_pcm_close,
1301 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1302 },
1303};
1304
1305static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1306 .substreams = 1,
1307 .channels_min = 2,
1308 .channels_max = 2,
1309 /* NID is set in stac92xx_build_pcms */
1310};
1311
2f2f4251
M		 1312static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1313 .substreams = 1,
1314 .channels_min = 2,
c7d4b2fa 1315 .channels_max = 8,
2f2f4251
M		 1316 .nid = 0x02, /* NID to query formats and rates */
1317 .ops = {
1318 .open = stac92xx_playback_pcm_open,
1319 .prepare = stac92xx_playback_pcm_prepare,
1320 .cleanup = stac92xx_playback_pcm_cleanup
1321 },
1322};
1323
3cc08dc6
MP		 1324static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1325 .substreams = 1,
1326 .channels_min = 2,
1327 .channels_max = 2,
1328 .nid = 0x06, /* NID to query formats and rates */
1329 .ops = {
1330 .open = stac92xx_playback_pcm_open,
1331 .prepare = stac92xx_playback_pcm_prepare,
1332 .cleanup = stac92xx_playback_pcm_cleanup
1333 },
1334};
1335
2f2f4251
M		 1336static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
1337 .substreams = 2,
1338 .channels_min = 2,
1339 .channels_max = 2,
3cc08dc6 1340 /* NID is set in stac92xx_build_pcms */
2f2f4251
M		 1341 .ops = {
1342 .prepare = stac92xx_capture_pcm_prepare,
1343 .cleanup = stac92xx_capture_pcm_cleanup
1344 },
1345};
1346
1347static int stac92xx_build_pcms(struct hda_codec *codec)
1348{
1349 struct sigmatel_spec *spec = codec->spec;
1350 struct hda_pcm *info = spec->pcm_rec;
1351
1352 codec->num_pcms = 1;
1353 codec->pcm_info = info;
1354
c7d4b2fa 1355 info->name = "STAC92xx Analog";
2f2f4251 1356 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1357 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6
MP		 1358 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
1359
1360 if (spec->alt_switch) {
1361 codec->num_pcms++;
1362 info++;
1363 info->name = "STAC92xx Analog Alt";
1364 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1365 }
2f2f4251 1366
dabbed6f
M		 1367 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1368 codec->num_pcms++;
1369 info++;
1370 info->name = "STAC92xx Digital";
1371 if (spec->multiout.dig_out_nid) {
1372 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1373 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1374 }
1375 if (spec->dig_in_nid) {
1376 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1377 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1378 }
1379 }
1380
2f2f4251
M		 1381 return 0;
1382}
1383
c960a03b
TI		 1384static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1385{
1386 unsigned int pincap = snd_hda_param_read(codec, nid,
1387 AC_PAR_PIN_CAP);
1388 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1389 if (pincap & AC_PINCAP_VREF_100)
1390 return AC_PINCTL_VREF_100;
1391 if (pincap & AC_PINCAP_VREF_80)
1392 return AC_PINCTL_VREF_80;
1393 if (pincap & AC_PINCAP_VREF_50)
1394 return AC_PINCTL_VREF_50;
1395 if (pincap & AC_PINCAP_VREF_GRD)
1396 return AC_PINCTL_VREF_GRD;
1397 return 0;
1398}
1399
403d1944
MP		 1400static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1401
1402{
82beb8fd
TI		 1403 snd_hda_codec_write_cache(codec, nid, 0,
1404 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1405}
1406
a5ce8890 1407#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1408
1409static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1410{
1411 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1412 struct sigmatel_spec *spec = codec->spec;
1413 int io_idx = kcontrol-> private_value & 0xff;
1414
1415 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1416 return 0;
1417}
1418
1419static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1420{
1421 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1422 struct sigmatel_spec *spec = codec->spec;
1423 hda_nid_t nid = kcontrol->private_value >> 8;
1424 int io_idx = kcontrol-> private_value & 0xff;
1425 unsigned short val = ucontrol->value.integer.value[0];
1426
1427 spec->io_switch[io_idx] = val;
1428
1429 if (val)
1430 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1431 else {
1432 unsigned int pinctl = AC_PINCTL_IN_EN;
1433 if (io_idx) /* set VREF for mic */
1434 pinctl |= stac92xx_get_vref(codec, nid);
1435 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1436 }
403d1944
MP		 1437 return 1;
1438}
1439
1440#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1441 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1442 .name = xname, \
1443 .index = 0, \
1444 .info = stac92xx_io_switch_info, \
1445 .get = stac92xx_io_switch_get, \
1446 .put = stac92xx_io_switch_put, \
1447 .private_value = xpval, \
1448 }
1449
1450
c7d4b2fa
M		 1451enum {
1452 STAC_CTL_WIDGET_VOL,
1453 STAC_CTL_WIDGET_MUTE,
403d1944 1454 STAC_CTL_WIDGET_IO_SWITCH,
c7d4b2fa
M		 1455};
1456
c8b6bf9b 1457static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 1458 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
1459 HDA_CODEC_MUTE(NULL, 0, 0, 0),
403d1944 1460 STAC_CODEC_IO_SWITCH(NULL, 0),
c7d4b2fa
M		 1461};
1462
1463/* add dynamic controls */
1464static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
1465{
c8b6bf9b 1466 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 1467
1468 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
1469 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
1470
1471 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
1472 if (! knew)
1473 return -ENOMEM;
1474 if (spec->kctl_alloc) {
1475 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
1476 kfree(spec->kctl_alloc);
1477 }
1478 spec->kctl_alloc = knew;
1479 spec->num_kctl_alloc = num;
1480 }
1481
1482 knew = &spec->kctl_alloc[spec->num_kctl_used];
1483 *knew = stac92xx_control_templates[type];
82fe0c58 1484 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 1485 if (! knew->name)
1486 return -ENOMEM;
1487 knew->private_value = val;
1488 spec->num_kctl_used++;
1489 return 0;
1490}
1491
403d1944
MP		 1492/* flag inputs as additional dynamic lineouts */
1493static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
1494{
1495 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1496 unsigned int wcaps, wtype;
1497 int i, num_dacs = 0;
1498
1499 /* use the wcaps cache to count all DACs available for line-outs */
1500 for (i = 0; i < codec->num_nodes; i++) {
1501 wcaps = codec->wcaps[i];
1502 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1503 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
1504 num_dacs++;
1505 }
403d1944 1506
7b043899
SL		 1507 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
1508
403d1944
MP		 1509 switch (cfg->line_outs) {
1510 case 3:
1511 /* add line-in as side */
7b043899 1512 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
403d1944
MP		 1513 cfg->line_out_pins[3] = cfg->input_pins[AUTO_PIN_LINE];
1514 spec->line_switch = 1;
1515 cfg->line_outs++;
1516 }
1517 break;
1518 case 2:
1519 /* add line-in as clfe and mic as side */
7b043899 1520 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
403d1944
MP		 1521 cfg->line_out_pins[2] = cfg->input_pins[AUTO_PIN_LINE];
1522 spec->line_switch = 1;
1523 cfg->line_outs++;
1524 }
7b043899 1525 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
403d1944
MP		 1526 cfg->line_out_pins[3] = cfg->input_pins[AUTO_PIN_MIC];
1527 spec->mic_switch = 1;
1528 cfg->line_outs++;
1529 }
1530 break;
1531 case 1:
1532 /* add line-in as surr and mic as clfe */
7b043899 1533 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
403d1944
MP		 1534 cfg->line_out_pins[1] = cfg->input_pins[AUTO_PIN_LINE];
1535 spec->line_switch = 1;
1536 cfg->line_outs++;
1537 }
7b043899 1538 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
403d1944
MP		 1539 cfg->line_out_pins[2] = cfg->input_pins[AUTO_PIN_MIC];
1540 spec->mic_switch = 1;
1541 cfg->line_outs++;
1542 }
1543 break;
1544 }
1545
1546 return 0;
1547}
1548
7b043899
SL		 1549
1550static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
1551{
1552 int i;
1553
1554 for (i = 0; i < spec->multiout.num_dacs; i++) {
1555 if (spec->multiout.dac_nids[i] == nid)
1556 return 1;
1557 }
1558
1559 return 0;
1560}
1561
3cc08dc6 1562/*
7b043899
SL		 1563 * Fill in the dac_nids table from the parsed pin configuration
1564 * This function only works when every pin in line_out_pins[]
1565 * contains atleast one DAC in its connection list. Some 92xx
1566 * codecs are not connected directly to a DAC, such as the 9200
1567 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 1568 */
19039bd0 1569static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 1570 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 1571{
1572 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1573 int i, j, conn_len = 0;
1574 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
1575 unsigned int wcaps, wtype;
1576
c7d4b2fa
M		 1577 for (i = 0; i < cfg->line_outs; i++) {
1578 nid = cfg->line_out_pins[i];
7b043899
SL		 1579 conn_len = snd_hda_get_connections(codec, nid, conn,
1580 HDA_MAX_CONNECTIONS);
1581 for (j = 0; j < conn_len; j++) {
1582 wcaps = snd_hda_param_read(codec, conn[j],
1583 AC_PAR_AUDIO_WIDGET_CAP);
1584 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1585
1586 if (wtype != AC_WID_AUD_OUT ||
1587 (wcaps & AC_WCAP_DIGITAL))
1588 continue;
1589 /* conn[j] is a DAC routed to this line-out */
1590 if (!is_in_dac_nids(spec, conn[j]))
1591 break;
1592 }
1593
1594 if (j == conn_len) {
df802952
TI		 1595 if (spec->multiout.num_dacs > 0) {
1596 /* we have already working output pins,
1597 * so let's drop the broken ones again
1598 */
1599 cfg->line_outs = spec->multiout.num_dacs;
1600 break;
1601 }
7b043899
SL		 1602 /* error out, no available DAC found */
1603 snd_printk(KERN_ERR
1604 "%s: No available DAC for pin 0x%x\n",
1605 __func__, nid);
1606 return -ENODEV;
1607 }
1608
1609 spec->multiout.dac_nids[i] = conn[j];
1610 spec->multiout.num_dacs++;
1611 if (conn_len > 1) {
1612 /* select this DAC in the pin's input mux */
82beb8fd
TI		 1613 snd_hda_codec_write_cache(codec, nid, 0,
1614 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 1615
7b043899
SL		 1616 }
1617 }
c7d4b2fa 1618
7b043899
SL		 1619 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
1620 spec->multiout.num_dacs,
1621 spec->multiout.dac_nids[0],
1622 spec->multiout.dac_nids[1],
1623 spec->multiout.dac_nids[2],
1624 spec->multiout.dac_nids[3],
1625 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 1626 return 0;
1627}
1628
eb06ed8f
TI		 1629/* create volume control/switch for the given prefx type */
1630static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
1631{
1632 char name[32];
1633 int err;
1634
1635 sprintf(name, "%s Playback Volume", pfx);
1636 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
1637 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1638 if (err < 0)
1639 return err;
1640 sprintf(name, "%s Playback Switch", pfx);
1641 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
1642 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1643 if (err < 0)
1644 return err;
1645 return 0;
1646}
1647
c7d4b2fa 1648/* add playback controls from the parsed DAC table */
19039bd0
TI		 1649static int stac92xx_auto_create_multi_out_ctls(struct sigmatel_spec *spec,
1650 const struct auto_pin_cfg *cfg)
c7d4b2fa 1651{
19039bd0
TI		 1652 static const char *chname[4] = {
1653 "Front", "Surround", NULL /*CLFE*/, "Side"
1654 };
c7d4b2fa
M		 1655 hda_nid_t nid;
1656 int i, err;
1657
1658 for (i = 0; i < cfg->line_outs; i++) {
403d1944 1659 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 1660 continue;
1661
1662 nid = spec->multiout.dac_nids[i];
1663
1664 if (i == 2) {
1665 /* Center/LFE */
eb06ed8f
TI		 1666 err = create_controls(spec, "Center", nid, 1);
1667 if (err < 0)
c7d4b2fa 1668 return err;
eb06ed8f
TI		 1669 err = create_controls(spec, "LFE", nid, 2);
1670 if (err < 0)
c7d4b2fa
M		 1671 return err;
1672 } else {
eb06ed8f
TI		 1673 err = create_controls(spec, chname[i], nid, 3);
1674 if (err < 0)
c7d4b2fa
M		 1675 return err;
1676 }
1677 }
1678
403d1944
MP		 1679 if (spec->line_switch)
1680 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
1681 return err;
1682
1683 if (spec->mic_switch)
1684 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
1685 return err;
1686
c7d4b2fa
M		 1687 return 0;
1688}
1689
eb06ed8f 1690static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 1691{
7b043899
SL		 1692 if (is_in_dac_nids(spec, nid))
1693 return 1;
eb06ed8f
TI		 1694 if (spec->multiout.hp_nid == nid)
1695 return 1;
1696 return 0;
1697}
c7d4b2fa 1698
eb06ed8f
TI		 1699static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
1700{
1701 if (!spec->multiout.hp_nid)
1702 spec->multiout.hp_nid = nid;
1703 else if (spec->multiout.num_dacs > 4) {
1704 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
1705 return 1;
1706 } else {
1707 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
1708 spec->multiout.num_dacs++;
1709 }
1710 return 0;
1711}
4e55096e 1712
eb06ed8f
TI		 1713/* add playback controls for Speaker and HP outputs */
1714static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
1715 struct auto_pin_cfg *cfg)
1716{
1717 struct sigmatel_spec *spec = codec->spec;
1718 hda_nid_t nid;
1719 int i, old_num_dacs, err;
1720
1721 old_num_dacs = spec->multiout.num_dacs;
1722 for (i = 0; i < cfg->hp_outs; i++) {
1723 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
1724 if (wid_caps & AC_WCAP_UNSOL_CAP)
1725 spec->hp_detect = 1;
1726 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
1727 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1728 if (check_in_dac_nids(spec, nid))
1729 nid = 0;
1730 if (! nid)
c7d4b2fa 1731 continue;
eb06ed8f
TI		 1732 add_spec_dacs(spec, nid);
1733 }
1734 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 1735 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 1736 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1737 if (check_in_dac_nids(spec, nid))
1738 nid = 0;
eb06ed8f
TI		 1739 if (! nid)
1740 continue;
1741 add_spec_dacs(spec, nid);
c7d4b2fa 1742 }
1b290a51
MR		 1743 for (i = 0; i < cfg->line_outs; i++) {
1744 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
1745 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1746 if (check_in_dac_nids(spec, nid))
1747 nid = 0;
1748 if (! nid)
1749 continue;
1750 add_spec_dacs(spec, nid);
1751 }
eb06ed8f
TI		 1752 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
1753 static const char *pfxs[] = {
1754 "Speaker", "External Speaker", "Speaker2",
1755 };
1756 err = create_controls(spec, pfxs[i - old_num_dacs],
1757 spec->multiout.dac_nids[i], 3);
1758 if (err < 0)
1759 return err;
1760 }
1761 if (spec->multiout.hp_nid) {
1762 const char *pfx;
1763 if (old_num_dacs == spec->multiout.num_dacs)
1764 pfx = "Master";
1765 else
1766 pfx = "Headphone";
1767 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
1768 if (err < 0)
1769 return err;
1770 }
c7d4b2fa
M		 1771
1772 return 0;
1773}
1774
8b65727b 1775/* labels for dmic mux inputs */
ddc2cec4 1776static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 1777 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
1778 "Digital Mic 3", "Digital Mic 4"
1779};
1780
1781/* create playback/capture controls for input pins on dmic capable codecs */
1782static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
1783 const struct auto_pin_cfg *cfg)
1784{
1785 struct sigmatel_spec *spec = codec->spec;
1786 struct hda_input_mux *dimux = &spec->private_dimux;
1787 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1788 int i, j;
1789
1790 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
1791 dimux->items[dimux->num_items].index = 0;
1792 dimux->num_items++;
1793
1794 for (i = 0; i < spec->num_dmics; i++) {
1795 int index;
1796 int num_cons;
1797 unsigned int def_conf;
1798
1799 def_conf = snd_hda_codec_read(codec,
1800 spec->dmic_nids[i],
1801 0,
1802 AC_VERB_GET_CONFIG_DEFAULT,
1803 0);
1804 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
1805 continue;
1806
1807 num_cons = snd_hda_get_connections(codec,
1808 spec->dmux_nid,
1809 con_lst,
1810 HDA_MAX_NUM_INPUTS);
1811 for (j = 0; j < num_cons; j++)
1812 if (con_lst[j] == spec->dmic_nids[i]) {
1813 index = j;
1814 goto found;
1815 }
1816 continue;
1817found:
1818 dimux->items[dimux->num_items].label =
1819 stac92xx_dmic_labels[dimux->num_items];
1820 dimux->items[dimux->num_items].index = index;
1821 dimux->num_items++;
1822 }
1823
1824 return 0;
1825}
1826
c7d4b2fa
M		 1827/* create playback/capture controls for input pins */
1828static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
1829{
1830 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 1831 struct hda_input_mux *imux = &spec->private_imux;
1832 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1833 int i, j, k;
1834
1835 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 1836 int index;
1837
1838 if (!cfg->input_pins[i])
1839 continue;
1840 index = -1;
1841 for (j = 0; j < spec->num_muxes; j++) {
1842 int num_cons;
1843 num_cons = snd_hda_get_connections(codec,
1844 spec->mux_nids[j],
1845 con_lst,
1846 HDA_MAX_NUM_INPUTS);
1847 for (k = 0; k < num_cons; k++)
1848 if (con_lst[k] == cfg->input_pins[i]) {
1849 index = k;
1850 goto found;
1851 }
c7d4b2fa 1852 }
314634bc
TI		 1853 continue;
1854 found:
1855 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
1856 imux->items[imux->num_items].index = index;
1857 imux->num_items++;
c7d4b2fa
M		 1858 }
1859
7b043899 1860 if (imux->num_items) {
62fe78e9
SR		 1861 /*
1862 * Set the current input for the muxes.
1863 * The STAC9221 has two input muxes with identical source
1864 * NID lists. Hopefully this won't get confused.
1865 */
1866 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 1867 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
1868 AC_VERB_SET_CONNECT_SEL,
1869 imux->items[0].index);
62fe78e9
SR		 1870 }
1871 }
1872
c7d4b2fa
M		 1873 return 0;
1874}
1875
c7d4b2fa
M		 1876static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
1877{
1878 struct sigmatel_spec *spec = codec->spec;
1879 int i;
1880
1881 for (i = 0; i < spec->autocfg.line_outs; i++) {
1882 hda_nid_t nid = spec->autocfg.line_out_pins[i];
1883 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
1884 }
1885}
1886
1887static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
1888{
1889 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 1890 int i;
c7d4b2fa 1891
eb06ed8f
TI		 1892 for (i = 0; i < spec->autocfg.hp_outs; i++) {
1893 hda_nid_t pin;
1894 pin = spec->autocfg.hp_pins[i];
1895 if (pin) /* connect to front */
1896 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
1897 }
1898 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
1899 hda_nid_t pin;
1900 pin = spec->autocfg.speaker_pins[i];
1901 if (pin) /* connect to front */
1902 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
1903 }
c7d4b2fa
M		 1904}
1905
3cc08dc6 1906static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 1907{
1908 struct sigmatel_spec *spec = codec->spec;
1909 int err;
1910
8b65727b
MP		 1911 if ((err = snd_hda_parse_pin_def_config(codec,
1912 &spec->autocfg,
1913 spec->dmic_nids)) < 0)
c7d4b2fa 1914 return err;
82bc955f 1915 if (! spec->autocfg.line_outs)
869264c4 1916 return 0; /* can't find valid pin config */
19039bd0 1917
403d1944
MP		 1918 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
1919 return err;
19039bd0
TI		 1920 if (spec->multiout.num_dacs == 0)
1921 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
1922 return err;
c7d4b2fa
M		 1923
1924 if ((err = stac92xx_auto_create_multi_out_ctls(spec, &spec->autocfg)) < 0 ||
1925 (err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg)) < 0 ||
1926 (err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
1927 return err;
1928
8b65727b
MP		 1929 if (spec->num_dmics > 0)
1930 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
1931 &spec->autocfg)) < 0)
1932 return err;
1933
c7d4b2fa 1934 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 1935 if (spec->multiout.max_channels > 2)
c7d4b2fa 1936 spec->surr_switch = 1;
c7d4b2fa 1937
82bc955f 1938 if (spec->autocfg.dig_out_pin)
3cc08dc6 1939 spec->multiout.dig_out_nid = dig_out;
82bc955f 1940 if (spec->autocfg.dig_in_pin)
3cc08dc6 1941 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 1942
1943 if (spec->kctl_alloc)
1944 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
1945
1946 spec->input_mux = &spec->private_imux;
8b65727b 1947 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 1948
1949 return 1;
1950}
1951
82bc955f
TI		 1952/* add playback controls for HP output */
1953static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
1954 struct auto_pin_cfg *cfg)
1955{
1956 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 1957 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 1958 unsigned int wid_caps;
1959
1960 if (! pin)
1961 return 0;
1962
1963 wid_caps = get_wcaps(codec, pin);
505cb341 1964 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 1965 spec->hp_detect = 1;
82bc955f
TI		 1966
1967 return 0;
1968}
1969
160ea0dc
RF		 1970/* add playback controls for LFE output */
1971static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
1972 struct auto_pin_cfg *cfg)
1973{
1974 struct sigmatel_spec *spec = codec->spec;
1975 int err;
1976 hda_nid_t lfe_pin = 0x0;
1977 int i;
1978
1979 /*
1980 * search speaker outs and line outs for a mono speaker pin
1981 * with an amp. If one is found, add LFE controls
1982 * for it.
1983 */
1984 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
1985 hda_nid_t pin = spec->autocfg.speaker_pins[i];
1986 unsigned long wcaps = get_wcaps(codec, pin);
1987 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
1988 if (wcaps == AC_WCAP_OUT_AMP)
1989 /* found a mono speaker with an amp, must be lfe */
1990 lfe_pin = pin;
1991 }
1992
1993 /* if speaker_outs is 0, then speakers may be in line_outs */
1994 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
1995 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
1996 hda_nid_t pin = spec->autocfg.line_out_pins[i];
1997 unsigned long cfg;
1998 cfg = snd_hda_codec_read(codec, pin, 0,
1999 AC_VERB_GET_CONFIG_DEFAULT,
2000 0x00);
2001 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2002 unsigned long wcaps = get_wcaps(codec, pin);
2003 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2004 if (wcaps == AC_WCAP_OUT_AMP)
2005 /* found a mono speaker with an amp,
2006 must be lfe */
2007 lfe_pin = pin;
2008 }
2009 }
2010 }
2011
2012 if (lfe_pin) {
eb06ed8f 2013 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2014 if (err < 0)
2015 return err;
2016 }
2017
2018 return 0;
2019}
2020
c7d4b2fa
M		 2021static int stac9200_parse_auto_config(struct hda_codec *codec)
2022{
2023 struct sigmatel_spec *spec = codec->spec;
2024 int err;
2025
df694daa 2026 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2027 return err;
2028
2029 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2030 return err;
2031
82bc955f
TI		 2032 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2033 return err;
2034
160ea0dc
RF		 2035 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2036 return err;
2037
82bc955f 2038 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2039 spec->multiout.dig_out_nid = 0x05;
82bc955f 2040 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2041 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2042
2043 if (spec->kctl_alloc)
2044 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2045
2046 spec->input_mux = &spec->private_imux;
8b65727b 2047 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2048
2049 return 1;
2050}
2051
62fe78e9
SR		 2052/*
2053 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2054 * funky external mute control using GPIO pins.
2055 */
2056
2057static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
2058{
2059 unsigned int gpiostate, gpiomask, gpiodir;
2060
2061 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2062 AC_VERB_GET_GPIO_DATA, 0);
2063
2064 if (!muted)
2065 gpiostate |= (1 << pin);
2066 else
2067 gpiostate &= ~(1 << pin);
2068
2069 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2070 AC_VERB_GET_GPIO_MASK, 0);
2071 gpiomask |= (1 << pin);
2072
2073 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2074 AC_VERB_GET_GPIO_DIRECTION, 0);
2075 gpiodir |= (1 << pin);
2076
2077 /* AppleHDA seems to do this -- WTF is this verb?? */
2078 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2079
2080 snd_hda_codec_write(codec, codec->afg, 0,
2081 AC_VERB_SET_GPIO_MASK, gpiomask);
2082 snd_hda_codec_write(codec, codec->afg, 0,
2083 AC_VERB_SET_GPIO_DIRECTION, gpiodir);
2084
2085 msleep(1);
2086
2087 snd_hda_codec_write(codec, codec->afg, 0,
2088 AC_VERB_SET_GPIO_DATA, gpiostate);
2089}
2090
314634bc
TI		 2091static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2092 unsigned int event)
2093{
2094 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
2095 snd_hda_codec_write(codec, nid, 0,
2096 AC_VERB_SET_UNSOLICITED_ENABLE,
2097 (AC_USRSP_EN | event));
2098}
2099
c7d4b2fa
M		 2100static int stac92xx_init(struct hda_codec *codec)
2101{
2102 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2103 struct auto_pin_cfg *cfg = &spec->autocfg;
2104 int i;
c7d4b2fa 2105
c7d4b2fa
M		 2106 snd_hda_sequence_write(codec, spec->init);
2107
82bc955f
TI		 2108 /* set up pins */
2109 if (spec->hp_detect) {
505cb341 2110 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2111 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2112 enable_pin_detect(codec, cfg->hp_pins[i],
2113 STAC_HP_EVENT);
0a07acaf
TI		 2114 /* force to enable the first line-out; the others are set up
2115 * in unsol_event
2116 */
2117 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2118 AC_PINCTL_OUT_EN);
eb995a8c 2119 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2120 /* fake event to set up pins */
2121 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2122 } else {
2123 stac92xx_auto_init_multi_out(codec);
2124 stac92xx_auto_init_hp_out(codec);
2125 }
2126 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2127 hda_nid_t nid = cfg->input_pins[i];
2128 if (nid) {
2129 unsigned int pinctl = AC_PINCTL_IN_EN;
2130 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2131 pinctl |= stac92xx_get_vref(codec, nid);
2132 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2133 }
82bc955f 2134 }
8b65727b
MP		 2135 if (spec->num_dmics > 0)
2136 for (i = 0; i < spec->num_dmics; i++)
2137 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2138 AC_PINCTL_IN_EN);
2139
82bc955f
TI		 2140 if (cfg->dig_out_pin)
2141 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2142 AC_PINCTL_OUT_EN);
2143 if (cfg->dig_in_pin)
2144 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2145 AC_PINCTL_IN_EN);
2146
62fe78e9
SR		 2147 if (spec->gpio_mute) {
2148 stac922x_gpio_mute(codec, 0, 0);
2149 stac922x_gpio_mute(codec, 1, 0);
2150 }
2151
c7d4b2fa
M		 2152 return 0;
2153}
2154
2f2f4251
M		 2155static void stac92xx_free(struct hda_codec *codec)
2156{
c7d4b2fa
M		 2157 struct sigmatel_spec *spec = codec->spec;
2158 int i;
2159
2160 if (! spec)
2161 return;
2162
2163 if (spec->kctl_alloc) {
2164 for (i = 0; i < spec->num_kctl_used; i++)
2165 kfree(spec->kctl_alloc[i].name);
2166 kfree(spec->kctl_alloc);
2167 }
2168
11b44bbd
RF		 2169 if (spec->bios_pin_configs)
2170 kfree(spec->bios_pin_configs);
2171
c7d4b2fa 2172 kfree(spec);
2f2f4251
M		 2173}
2174
4e55096e
M		 2175static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2176 unsigned int flag)
2177{
2178 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2179 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2180
f9acba43
TI		 2181 if (pin_ctl & AC_PINCTL_IN_EN) {
2182 /*
2183 * we need to check the current set-up direction of
2184 * shared input pins since they can be switched via
2185 * "xxx as Output" mixer switch
2186 */
2187 struct sigmatel_spec *spec = codec->spec;
2188 struct auto_pin_cfg *cfg = &spec->autocfg;
2189 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2190 spec->line_switch) ||
2191 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2192 spec->mic_switch))
2193 return;
2194 }
2195
7b043899
SL		 2196 /* if setting pin direction bits, clear the current
2197 direction bits first */
2198 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2199 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2200
82beb8fd 2201 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2202 AC_VERB_SET_PIN_WIDGET_CONTROL,
2203 pin_ctl | flag);
2204}
2205
2206static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2207 unsigned int flag)
2208{
2209 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2210 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 2211 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2212 AC_VERB_SET_PIN_WIDGET_CONTROL,
2213 pin_ctl & ~flag);
2214}
2215
314634bc
TI		 2216static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
2217{
2218 if (!nid)
2219 return 0;
2220 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
2221 & (1 << 31))
2222 return 1;
2223 return 0;
2224}
2225
2226static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 2227{
2228 struct sigmatel_spec *spec = codec->spec;
2229 struct auto_pin_cfg *cfg = &spec->autocfg;
2230 int i, presence;
2231
eb06ed8f
TI		 2232 presence = 0;
2233 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 2234 presence = get_pin_presence(codec, cfg->hp_pins[i]);
2235 if (presence)
2236 break;
eb06ed8f 2237 }
4e55096e
M		 2238
2239 if (presence) {
2240 /* disable lineouts, enable hp */
2241 for (i = 0; i < cfg->line_outs; i++)
2242 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
2243 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2244 for (i = 0; i < cfg->speaker_outs; i++)
2245 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
2246 AC_PINCTL_OUT_EN);
4e55096e
M		 2247 } else {
2248 /* enable lineouts, disable hp */
2249 for (i = 0; i < cfg->line_outs; i++)
2250 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
2251 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2252 for (i = 0; i < cfg->speaker_outs; i++)
2253 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
2254 AC_PINCTL_OUT_EN);
4e55096e
M		 2255 }
2256}
2257
314634bc
TI		 2258static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
2259{
2260 switch (res >> 26) {
2261 case STAC_HP_EVENT:
2262 stac92xx_hp_detect(codec, res);
2263 break;
2264 }
2265}
2266
cb53c626 2267#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2268static int stac92xx_resume(struct hda_codec *codec)
2269{
11b44bbd 2270 stac92xx_set_config_regs(codec);
8259980e 2271 stac92xx_init(codec);
82beb8fd
TI		 2272 snd_hda_codec_resume_amp(codec);
2273 snd_hda_codec_resume_cache(codec);
ff6fdc37
M		 2274 return 0;
2275}
2276#endif
2277
2f2f4251
M		 2278static struct hda_codec_ops stac92xx_patch_ops = {
2279 .build_controls = stac92xx_build_controls,
2280 .build_pcms = stac92xx_build_pcms,
2281 .init = stac92xx_init,
2282 .free = stac92xx_free,
4e55096e 2283 .unsol_event = stac92xx_unsol_event,
cb53c626 2284#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2285 .resume = stac92xx_resume,
2286#endif
2f2f4251
M		 2287};
2288
2289static int patch_stac9200(struct hda_codec *codec)
2290{
2291 struct sigmatel_spec *spec;
c7d4b2fa 2292 int err;
2f2f4251 2293
e560d8d8 2294 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2295 if (spec == NULL)
2296 return -ENOMEM;
2297
2298 codec->spec = spec;
a4eed138 2299 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 2300 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 2301 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
2302 stac9200_models,
2303 stac9200_cfg_tbl);
11b44bbd
RF		 2304 if (spec->board_config < 0) {
2305 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
2306 err = stac92xx_save_bios_config_regs(codec);
2307 if (err < 0) {
2308 stac92xx_free(codec);
2309 return err;
2310 }
2311 spec->pin_configs = spec->bios_pin_configs;
2312 } else {
403d1944
MP		 2313 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
2314 stac92xx_set_config_regs(codec);
2315 }
2f2f4251
M		 2316
2317 spec->multiout.max_channels = 2;
2318 spec->multiout.num_dacs = 1;
2319 spec->multiout.dac_nids = stac9200_dac_nids;
2320 spec->adc_nids = stac9200_adc_nids;
2321 spec->mux_nids = stac9200_mux_nids;
dabbed6f 2322 spec->num_muxes = 1;
8b65727b 2323 spec->num_dmics = 0;
c7d4b2fa
M		 2324
2325 spec->init = stac9200_core_init;
2f2f4251 2326 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 2327
2328 err = stac9200_parse_auto_config(codec);
2329 if (err < 0) {
2330 stac92xx_free(codec);
2331 return err;
2332 }
2f2f4251
M		 2333
2334 codec->patch_ops = stac92xx_patch_ops;
2335
2336 return 0;
2337}
2338
8e21c34c
TD		 2339static int patch_stac925x(struct hda_codec *codec)
2340{
2341 struct sigmatel_spec *spec;
2342 int err;
2343
2344 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2345 if (spec == NULL)
2346 return -ENOMEM;
2347
2348 codec->spec = spec;
a4eed138 2349 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 2350 spec->pin_nids = stac925x_pin_nids;
2351 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
2352 stac925x_models,
2353 stac925x_cfg_tbl);
9e507abd 2354 again:
8e21c34c 2355 if (spec->board_config < 0) {
2c11f955
TD		 2356 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2357 "using BIOS defaults\n");
8e21c34c
TD		 2358 err = stac92xx_save_bios_config_regs(codec);
2359 if (err < 0) {
2360 stac92xx_free(codec);
2361 return err;
2362 }
2363 spec->pin_configs = spec->bios_pin_configs;
2364 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
2365 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
2366 stac92xx_set_config_regs(codec);
2367 }
2368
2369 spec->multiout.max_channels = 2;
2370 spec->multiout.num_dacs = 1;
2371 spec->multiout.dac_nids = stac925x_dac_nids;
2372 spec->adc_nids = stac925x_adc_nids;
2373 spec->mux_nids = stac925x_mux_nids;
2374 spec->num_muxes = 1;
2c11f955
TD		 2375 switch (codec->vendor_id) {
2376 case 0x83847632: /* STAC9202 */
2377 case 0x83847633: /* STAC9202D */
2378 case 0x83847636: /* STAC9251 */
2379 case 0x83847637: /* STAC9251D */
2380 spec->num_dmics = 1;
2381 spec->dmic_nids = stac925x_dmic_nids;
2382 break;
2383 default:
2384 spec->num_dmics = 0;
2385 break;
2386 }
8e21c34c
TD		 2387
2388 spec->init = stac925x_core_init;
2389 spec->mixer = stac925x_mixer;
2390
2391 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 2392 if (!err) {
2393 if (spec->board_config < 0) {
2394 printk(KERN_WARNING "hda_codec: No auto-config is "
2395 "available, default to model=ref\n");
2396 spec->board_config = STAC_925x_REF;
2397 goto again;
2398 }
2399 err = -EINVAL;
2400 }
8e21c34c
TD		 2401 if (err < 0) {
2402 stac92xx_free(codec);
2403 return err;
2404 }
2405
2406 codec->patch_ops = stac92xx_patch_ops;
2407
2408 return 0;
2409}
2410
2f2f4251
M		 2411static int patch_stac922x(struct hda_codec *codec)
2412{
2413 struct sigmatel_spec *spec;
c7d4b2fa 2414 int err;
2f2f4251 2415
e560d8d8 2416 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2417 if (spec == NULL)
2418 return -ENOMEM;
2419
2420 codec->spec = spec;
a4eed138 2421 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 2422 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 2423 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
2424 stac922x_models,
2425 stac922x_cfg_tbl);
5d5d3bc3 2426 if (spec->board_config == STAC_INTEL_MAC_V3) {
3fc24d85
TI		 2427 spec->gpio_mute = 1;
2428 /* Intel Macs have all same PCI SSID, so we need to check
2429 * codec SSID to distinguish the exact models
2430 */
6f0778d8 2431 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 2432 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 2433
2434 case 0x106b0800:
2435 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 2436 break;
5d5d3bc3
IZ		 2437 case 0x106b0600:
2438 case 0x106b0700:
2439 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 2440 break;
5d5d3bc3
IZ		 2441 case 0x106b0e00:
2442 case 0x106b0f00:
2443 case 0x106b1600:
2444 case 0x106b1700:
2445 case 0x106b0200:
2446 case 0x106b1e00:
2447 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 2448 break;
5d5d3bc3
IZ		 2449 case 0x106b1a00:
2450 case 0x00000100:
2451 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 2452 break;
5d5d3bc3
IZ		 2453 case 0x106b0a00:
2454 case 0x106b2200:
2455 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 2456 break;
3fc24d85
TI		 2457 }
2458 }
2459
9e507abd 2460 again:
11b44bbd
RF		 2461 if (spec->board_config < 0) {
2462 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
2463 "using BIOS defaults\n");
2464 err = stac92xx_save_bios_config_regs(codec);
2465 if (err < 0) {
2466 stac92xx_free(codec);
2467 return err;
2468 }
2469 spec->pin_configs = spec->bios_pin_configs;
2470 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 2471 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
2472 stac92xx_set_config_regs(codec);
2473 }
2f2f4251 2474
c7d4b2fa
M		 2475 spec->adc_nids = stac922x_adc_nids;
2476 spec->mux_nids = stac922x_mux_nids;
2549413e 2477 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
8b65727b 2478 spec->num_dmics = 0;
c7d4b2fa
M		 2479
2480 spec->init = stac922x_core_init;
2f2f4251 2481 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 2482
2483 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 2484
3cc08dc6 2485 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 2486 if (!err) {
2487 if (spec->board_config < 0) {
2488 printk(KERN_WARNING "hda_codec: No auto-config is "
2489 "available, default to model=ref\n");
2490 spec->board_config = STAC_D945_REF;
2491 goto again;
2492 }
2493 err = -EINVAL;
2494 }
3cc08dc6
MP		 2495 if (err < 0) {
2496 stac92xx_free(codec);
2497 return err;
2498 }
2499
2500 codec->patch_ops = stac92xx_patch_ops;
2501
807a4636
TI		 2502 /* Fix Mux capture level; max to 2 */
2503 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
2504 (0 << AC_AMPCAP_OFFSET_SHIFT) |
2505 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
2506 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
2507 (0 << AC_AMPCAP_MUTE_SHIFT));
2508
3cc08dc6
MP		 2509 return 0;
2510}
2511
2512static int patch_stac927x(struct hda_codec *codec)
2513{
2514 struct sigmatel_spec *spec;
2515 int err;
2516
2517 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2518 if (spec == NULL)
2519 return -ENOMEM;
2520
2521 codec->spec = spec;
a4eed138 2522 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 2523 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 2524 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
2525 stac927x_models,
2526 stac927x_cfg_tbl);
9e507abd 2527 again:
11b44bbd 2528 if (spec->board_config < 0) {
3cc08dc6 2529 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n");
11b44bbd
RF		 2530 err = stac92xx_save_bios_config_regs(codec);
2531 if (err < 0) {
2532 stac92xx_free(codec);
2533 return err;
2534 }
2535 spec->pin_configs = spec->bios_pin_configs;
2536 } else if (stac927x_brd_tbl[spec->board_config] != NULL) {
3cc08dc6
MP		 2537 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
2538 stac92xx_set_config_regs(codec);
2539 }
2540
81d3dbde 2541 switch (spec->board_config) {
93ed1503 2542 case STAC_D965_3ST:
81d3dbde
TD		 2543 spec->adc_nids = stac927x_adc_nids;
2544 spec->mux_nids = stac927x_mux_nids;
2549413e 2545 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
8b65727b 2546 spec->num_dmics = 0;
93ed1503 2547 spec->init = d965_core_init;
81d3dbde
TD		 2548 spec->mixer = stac9227_mixer;
2549 break;
93ed1503
TD		 2550 case STAC_D965_5ST:
2551 spec->adc_nids = stac927x_adc_nids;
2552 spec->mux_nids = stac927x_mux_nids;
2549413e 2553 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
8b65727b 2554 spec->num_dmics = 0;
93ed1503 2555 spec->init = d965_core_init;
81d3dbde
TD		 2556 spec->mixer = stac9227_mixer;
2557 break;
2558 default:
2559 spec->adc_nids = stac927x_adc_nids;
2560 spec->mux_nids = stac927x_mux_nids;
2549413e 2561 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
8b65727b 2562 spec->num_dmics = 0;
81d3dbde
TD		 2563 spec->init = stac927x_core_init;
2564 spec->mixer = stac927x_mixer;
2565 }
3cc08dc6
MP		 2566
2567 spec->multiout.dac_nids = spec->dac_nids;
87d48363 2568 /* GPIO0 High = Enable EAPD */
8259980e
TI		 2569 spec->gpio_mask = spec->gpio_data = 0x00000001;
2570 stac92xx_enable_gpio_mask(codec);
92a22beb 2571
3cc08dc6 2572 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 2573 if (!err) {
2574 if (spec->board_config < 0) {
2575 printk(KERN_WARNING "hda_codec: No auto-config is "
2576 "available, default to model=ref\n");
2577 spec->board_config = STAC_D965_REF;
2578 goto again;
2579 }
2580 err = -EINVAL;
2581 }
c7d4b2fa
M		 2582 if (err < 0) {
2583 stac92xx_free(codec);
2584 return err;
2585 }
2f2f4251
M		 2586
2587 codec->patch_ops = stac92xx_patch_ops;
2588
2589 return 0;
2590}
2591
f3302a59
MP		 2592static int patch_stac9205(struct hda_codec *codec)
2593{
2594 struct sigmatel_spec *spec;
8259980e 2595 int err;
f3302a59
MP		 2596
2597 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2598 if (spec == NULL)
2599 return -ENOMEM;
2600
2601 codec->spec = spec;
a4eed138 2602 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 2603 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 2604 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
2605 stac9205_models,
2606 stac9205_cfg_tbl);
9e507abd 2607 again:
11b44bbd
RF		 2608 if (spec->board_config < 0) {
2609 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
2610 err = stac92xx_save_bios_config_regs(codec);
2611 if (err < 0) {
2612 stac92xx_free(codec);
2613 return err;
2614 }
2615 spec->pin_configs = spec->bios_pin_configs;
2616 } else {
f3302a59
MP		 2617 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
2618 stac92xx_set_config_regs(codec);
2619 }
2620
2621 spec->adc_nids = stac9205_adc_nids;
2622 spec->mux_nids = stac9205_mux_nids;
2549413e 2623 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 2624 spec->dmic_nids = stac9205_dmic_nids;
2549413e 2625 spec->num_dmics = ARRAY_SIZE(stac9205_dmic_nids);
8b65727b 2626 spec->dmux_nid = 0x1d;
f3302a59
MP		 2627
2628 spec->init = stac9205_core_init;
2629 spec->mixer = stac9205_mixer;
2630
2631 spec->multiout.dac_nids = spec->dac_nids;
87d48363 2632
ae0a8ed8
TD		 2633 switch (spec->board_config){
2634 case STAC_9205_M43xx:
2635 case STAC_9205_DELL_M43:
87d48363
MR		 2636 /* Enable SPDIF in/out */
2637 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
2638 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
2639
8259980e 2640 spec->gpio_mask = 0x00000007; /* GPIO0-2 */
87d48363
MR		 2641 /* GPIO0 High = EAPD, GPIO1 Low = DRM,
2642 * GPIO2 High = Headphone Mute
2643 */
8259980e 2644 spec->gpio_data = 0x00000005;
ae0a8ed8
TD		 2645 break;
2646 default:
2647 /* GPIO0 High = EAPD */
2648 spec->gpio_mask = spec->gpio_data = 0x00000001;
2649 break;
2650 }
33382403 2651
8259980e 2652 stac92xx_enable_gpio_mask(codec);
f3302a59 2653 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 2654 if (!err) {
2655 if (spec->board_config < 0) {
2656 printk(KERN_WARNING "hda_codec: No auto-config is "
2657 "available, default to model=ref\n");
2658 spec->board_config = STAC_9205_REF;
2659 goto again;
2660 }
2661 err = -EINVAL;
2662 }
f3302a59
MP		 2663 if (err < 0) {
2664 stac92xx_free(codec);
2665 return err;
2666 }
2667
2668 codec->patch_ops = stac92xx_patch_ops;
2669
2670 return 0;
2671}
2672
db064e50 2673/*
6d859065 2674 * STAC9872 hack
db064e50
TI		 2675 */
2676
99ccc560 2677/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 2678static hda_nid_t vaio_dacs[] = { 0x2 };
2679#define VAIO_HP_DAC 0x5
2680static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
2681static hda_nid_t vaio_mux_nids[] = { 0x15 };
2682
2683static struct hda_input_mux vaio_mux = {
2684 .num_items = 2,
2685 .items = {
d773781c 2686 /* { "HP", 0x0 }, */
1624cb9a
TI		 2687 { "Mic Jack", 0x1 },
2688 { "Internal Mic", 0x2 },
db064e50
TI		 2689 { "PCM", 0x3 },
2690 }
2691};
2692
2693static struct hda_verb vaio_init[] = {
2694 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 2695 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 2696 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2697 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2698 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2699 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2700 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 2701 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2702 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2703 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2704 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2705 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2706 {}
2707};
2708
6d859065
GM		 2709static struct hda_verb vaio_ar_init[] = {
2710 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
2711 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2712 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2713 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2714/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
2715 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2716 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 2717 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2718 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2719/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
2720 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2721 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2722 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2723 {}
2724};
2725
db064e50 2726/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 2727static struct hda_bind_ctls vaio_bind_master_vol = {
2728 .ops = &snd_hda_bind_vol,
2729 .values = {
2730 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2731 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2732 0
2733 },
2734};
db064e50
TI		 2735
2736/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 2737static struct hda_bind_ctls vaio_bind_master_sw = {
2738 .ops = &snd_hda_bind_sw,
2739 .values = {
2740 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2741 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2742 0,
2743 },
2744};
db064e50
TI		 2745
2746static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 2747 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2748 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 2749 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2750 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2751 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2752 {
2753 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2754 .name = "Capture Source",
2755 .count = 1,
2756 .info = stac92xx_mux_enum_info,
2757 .get = stac92xx_mux_enum_get,
2758 .put = stac92xx_mux_enum_put,
2759 },
2760 {}
2761};
2762
6d859065 2763static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 2764 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2765 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 2766 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2767 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2768 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2769 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
2770 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
2771 {
2772 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2773 .name = "Capture Source",
2774 .count = 1,
2775 .info = stac92xx_mux_enum_info,
2776 .get = stac92xx_mux_enum_get,
2777 .put = stac92xx_mux_enum_put,
2778 },
2779 {}
2780};
2781
2782static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 2783 .build_controls = stac92xx_build_controls,
2784 .build_pcms = stac92xx_build_pcms,
2785 .init = stac92xx_init,
2786 .free = stac92xx_free,
cb53c626 2787#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 2788 .resume = stac92xx_resume,
2789#endif
2790};
2791
72e7b0dd
TI		 2792static int stac9872_vaio_init(struct hda_codec *codec)
2793{
2794 int err;
2795
2796 err = stac92xx_init(codec);
2797 if (err < 0)
2798 return err;
2799 if (codec->patch_ops.unsol_event)
2800 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2801 return 0;
2802}
2803
2804static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
2805{
2806 if (get_pin_presence(codec, 0x0a)) {
2807 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
2808 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
2809 } else {
2810 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
2811 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
2812 }
2813}
2814
2815static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
2816{
2817 switch (res >> 26) {
2818 case STAC_HP_EVENT:
2819 stac9872_vaio_hp_detect(codec, res);
2820 break;
2821 }
2822}
2823
2824static struct hda_codec_ops stac9872_vaio_patch_ops = {
2825 .build_controls = stac92xx_build_controls,
2826 .build_pcms = stac92xx_build_pcms,
2827 .init = stac9872_vaio_init,
2828 .free = stac92xx_free,
2829 .unsol_event = stac9872_vaio_unsol_event,
2830#ifdef CONFIG_PM
2831 .resume = stac92xx_resume,
2832#endif
2833};
2834
6d859065
GM		 2835enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
2836 CXD9872RD_VAIO,
2837 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
2838 STAC9872AK_VAIO,
2839 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
2840 STAC9872K_VAIO,
2841 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 2842 CXD9872AKD_VAIO,
2843 STAC_9872_MODELS,
2844};
2845
2846static const char *stac9872_models[STAC_9872_MODELS] = {
2847 [CXD9872RD_VAIO] = "vaio",
2848 [CXD9872AKD_VAIO] = "vaio-ar",
2849};
2850
2851static struct snd_pci_quirk stac9872_cfg_tbl[] = {
2852 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
2853 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
2854 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 2855 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 2856 {}
2857};
2858
6d859065 2859static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 2860{
2861 struct sigmatel_spec *spec;
2862 int board_config;
2863
f5fcc13c
TI		 2864 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
2865 stac9872_models,
2866 stac9872_cfg_tbl);
db064e50
TI		 2867 if (board_config < 0)
2868 /* unknown config, let generic-parser do its job... */
2869 return snd_hda_parse_generic_codec(codec);
2870
2871 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2872 if (spec == NULL)
2873 return -ENOMEM;
2874
2875 codec->spec = spec;
2876 switch (board_config) {
6d859065
GM		 2877 case CXD9872RD_VAIO:
2878 case STAC9872AK_VAIO:
2879 case STAC9872K_VAIO:
db064e50
TI		 2880 spec->mixer = vaio_mixer;
2881 spec->init = vaio_init;
2882 spec->multiout.max_channels = 2;
2883 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
2884 spec->multiout.dac_nids = vaio_dacs;
2885 spec->multiout.hp_nid = VAIO_HP_DAC;
2886 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
2887 spec->adc_nids = vaio_adcs;
2888 spec->input_mux = &vaio_mux;
2889 spec->mux_nids = vaio_mux_nids;
72e7b0dd 2890 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 2891 break;
6d859065
GM		 2892
2893 case CXD9872AKD_VAIO:
2894 spec->mixer = vaio_ar_mixer;
2895 spec->init = vaio_ar_init;
2896 spec->multiout.max_channels = 2;
2897 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
2898 spec->multiout.dac_nids = vaio_dacs;
2899 spec->multiout.hp_nid = VAIO_HP_DAC;
2900 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
2901 spec->adc_nids = vaio_adcs;
2902 spec->input_mux = &vaio_mux;
2903 spec->mux_nids = vaio_mux_nids;
72e7b0dd 2904 codec->patch_ops = stac9872_patch_ops;
6d859065 2905 break;
db064e50
TI		 2906 }
2907
db064e50
TI		 2908 return 0;
2909}
2910
2911
2f2f4251
M		 2912/*
2913 * patch entries
2914 */
2915struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2916 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
2917 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
2918 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
2919 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
2920 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
2921 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
2922 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 2923 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
2924 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
2925 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
2926 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
2927 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
2928 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 2929 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
2930 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
2931 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
2932 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
2933 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
2934 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
2935 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
2936 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
2937 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
2938 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 2939 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
2940 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
2941 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
2942 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
2943 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
2944 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 2945 /* The following does not take into account .id=0x83847661 when subsys =
2946 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
2947 * currently not fully supported.
2948 */
2949 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
2950 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
2951 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 2952 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
2953 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
2954 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
2955 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
2956 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
2957 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
2958 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
2959 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
2f2f4251
M		 2960 {} /* terminator */
2961};
Clone of davem's net-next-2.6 tree