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ALSA: patch_sigmatel: Add missing Gateway entries and autodetection
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
TI		 38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
1194b5b7 58 STAC_9200_GATEWAY,
117f257d 59 STAC_9200_PANASONIC,
f5fcc13c
TI		 60 STAC_9200_MODELS
61};
62
63enum {
64 STAC_9205_REF,
dfe495d0 65 STAC_9205_DELL_M42,
ae0a8ed8
TD		 66 STAC_9205_DELL_M43,
67 STAC_9205_DELL_M44,
f5fcc13c
TI		 68 STAC_9205_MODELS
69};
70
e1f0d669
MR		 71enum {
72 STAC_92HD73XX_REF,
661cd8fb
TI		 73 STAC_DELL_M6_AMIC,
74 STAC_DELL_M6_DMIC,
75 STAC_DELL_M6_BOTH,
6b3ab21e 76 STAC_DELL_EQ,
e1f0d669
MR		 77 STAC_92HD73XX_MODELS
78};
79
d0513fc6
MR		 80enum {
81 STAC_92HD83XXX_REF,
82 STAC_92HD83XXX_MODELS
83};
84
e035b841
MR		 85enum {
86 STAC_92HD71BXX_REF,
a7662640
MR		 87 STAC_DELL_M4_1,
88 STAC_DELL_M4_2,
3a7abfd2 89 STAC_DELL_M4_3,
6a14f585 90 STAC_HP_M4,
e035b841
MR		 91 STAC_92HD71BXX_MODELS
92};
93
8e21c34c
TD		 94enum {
95 STAC_925x_REF,
9cb36c2a
MCC		 96 STAC_M1,
97 STAC_M1_2,
98 STAC_M2,
8e21c34c 99 STAC_M2_2,
9cb36c2a
MCC		 100 STAC_M3,
101 STAC_M5,
102 STAC_M6,
8e21c34c 103 STAC_MA6,
2c11f955 104 STAC_PA6,
8e21c34c
TD		 105 STAC_925x_MODELS
106};
107
f5fcc13c
TI		 108enum {
109 STAC_D945_REF,
110 STAC_D945GTP3,
111 STAC_D945GTP5,
5d5d3bc3
IZ		 112 STAC_INTEL_MAC_V1,
113 STAC_INTEL_MAC_V2,
114 STAC_INTEL_MAC_V3,
115 STAC_INTEL_MAC_V4,
116 STAC_INTEL_MAC_V5,
536319af
NB		 117 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
118 * is given, one of the above models will be
119 * chosen according to the subsystem id. */
dfe495d0 120 /* for backward compatibility */
f5fcc13c 121 STAC_MACMINI,
3fc24d85 122 STAC_MACBOOK,
6f0778d8
NB		 123 STAC_MACBOOK_PRO_V1,
124 STAC_MACBOOK_PRO_V2,
f16928fb 125 STAC_IMAC_INTEL,
0dae0f83 126 STAC_IMAC_INTEL_20,
8c650087 127 STAC_ECS_202,
dfe495d0
TI		 128 STAC_922X_DELL_D81,
129 STAC_922X_DELL_D82,
130 STAC_922X_DELL_M81,
131 STAC_922X_DELL_M82,
f5fcc13c
TI		 132 STAC_922X_MODELS
133};
134
135enum {
136 STAC_D965_REF,
137 STAC_D965_3ST,
138 STAC_D965_5ST,
4ff076e5 139 STAC_DELL_3ST,
8e9068b1 140 STAC_DELL_BIOS,
f5fcc13c
TI		 141 STAC_927X_MODELS
142};
403d1944 143
74aeaabc
MR		 144struct sigmatel_event {
145 hda_nid_t nid;
c6e4c666
TI		 146 unsigned char type;
147 unsigned char tag;
74aeaabc
MR		 148 int data;
149};
150
151struct sigmatel_jack {
152 hda_nid_t nid;
153 int type;
154 struct snd_jack *jack;
155};
156
2f2f4251 157struct sigmatel_spec {
c8b6bf9b 158 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 159 unsigned int num_mixers;
160
403d1944 161 int board_config;
c0cea0d0 162 unsigned int eapd_switch: 1;
c7d4b2fa 163 unsigned int surr_switch: 1;
403d1944
MP		 164 unsigned int line_switch: 1;
165 unsigned int mic_switch: 1;
3cc08dc6 166 unsigned int alt_switch: 1;
82bc955f 167 unsigned int hp_detect: 1;
00ef50c2 168 unsigned int spdif_mute: 1;
c7d4b2fa 169
4fe5195c 170 /* gpio lines */
0fc9dec4 171 unsigned int eapd_mask;
4fe5195c
MR		 172 unsigned int gpio_mask;
173 unsigned int gpio_dir;
174 unsigned int gpio_data;
175 unsigned int gpio_mute;
176
8daaaa97
MR		 177 /* stream */
178 unsigned int stream_delay;
179
4fe5195c 180 /* analog loopback */
e1f0d669
MR		 181 unsigned char aloopback_mask;
182 unsigned char aloopback_shift;
8259980e 183
a64135a2
MR		 184 /* power management */
185 unsigned int num_pwrs;
d0513fc6 186 unsigned int *pwr_mapping;
a64135a2 187 hda_nid_t *pwr_nids;
b76c850f 188 hda_nid_t *dac_list;
a64135a2 189
74aeaabc
MR		 190 /* jack detection */
191 struct snd_array jacks;
192
193 /* events */
194 struct snd_array events;
195
2f2f4251 196 /* playback */
b22b4821 197 struct hda_input_mux *mono_mux;
89385035 198 struct hda_input_mux *amp_mux;
b22b4821 199 unsigned int cur_mmux;
2f2f4251 200 struct hda_multi_out multiout;
3cc08dc6 201 hda_nid_t dac_nids[5];
2f2f4251
M		 202
203 /* capture */
204 hda_nid_t *adc_nids;
2f2f4251 205 unsigned int num_adcs;
dabbed6f
M		 206 hda_nid_t *mux_nids;
207 unsigned int num_muxes;
8b65727b
MP		 208 hda_nid_t *dmic_nids;
209 unsigned int num_dmics;
e1f0d669 210 hda_nid_t *dmux_nids;
1697055e 211 unsigned int num_dmuxes;
d9737751
MR		 212 hda_nid_t *smux_nids;
213 unsigned int num_smuxes;
65973632 214 const char **spdif_labels;
d9737751 215
dabbed6f 216 hda_nid_t dig_in_nid;
b22b4821 217 hda_nid_t mono_nid;
1cd2224c
MR		 218 hda_nid_t anabeep_nid;
219 hda_nid_t digbeep_nid;
2f2f4251 220
2f2f4251
M		 221 /* pin widgets */
222 hda_nid_t *pin_nids;
223 unsigned int num_pins;
2f2f4251 224 unsigned int *pin_configs;
2f2f4251
M		 225
226 /* codec specific stuff */
227 struct hda_verb *init;
c8b6bf9b 228 struct snd_kcontrol_new *mixer;
2f2f4251
M		 229
230 /* capture source */
8b65727b 231 struct hda_input_mux *dinput_mux;
e1f0d669 232 unsigned int cur_dmux[2];
c7d4b2fa 233 struct hda_input_mux *input_mux;
3cc08dc6 234 unsigned int cur_mux[3];
d9737751
MR		 235 struct hda_input_mux *sinput_mux;
236 unsigned int cur_smux[2];
2a9c7816
MR		 237 unsigned int cur_amux;
238 hda_nid_t *amp_nids;
239 unsigned int num_amps;
8daaaa97 240 unsigned int powerdown_adcs;
2f2f4251 241
403d1944
MP		 242 /* i/o switches */
243 unsigned int io_switch[2];
0fb87bb4 244 unsigned int clfe_swap;
d7a89436 245 unsigned int hp_switch; /* NID of HP as line-out */
5f10c4a9 246 unsigned int aloopback;
2f2f4251 247
c7d4b2fa
M		 248 struct hda_pcm pcm_rec[2]; /* PCM information */
249
250 /* dynamic controls and input_mux */
251 struct auto_pin_cfg autocfg;
603c4019 252 struct snd_array kctls;
8b65727b 253 struct hda_input_mux private_dimux;
c7d4b2fa 254 struct hda_input_mux private_imux;
d9737751 255 struct hda_input_mux private_smux;
89385035 256 struct hda_input_mux private_amp_mux;
b22b4821 257 struct hda_input_mux private_mono_mux;
2f2f4251
M		 258};
259
260static hda_nid_t stac9200_adc_nids[1] = {
261 0x03,
262};
263
264static hda_nid_t stac9200_mux_nids[1] = {
265 0x0c,
266};
267
268static hda_nid_t stac9200_dac_nids[1] = {
269 0x02,
270};
271
a64135a2
MR		 272static hda_nid_t stac92hd73xx_pwr_nids[8] = {
273 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
274 0x0f, 0x10, 0x11
275};
276
0ffa9807
MR		 277static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
278 0x26, 0,
279};
280
e1f0d669
MR		 281static hda_nid_t stac92hd73xx_adc_nids[2] = {
282 0x1a, 0x1b
283};
284
2a9c7816
MR		 285#define DELL_M6_AMP 2
286static hda_nid_t stac92hd73xx_amp_nids[3] = {
287 0x0b, 0x0c, 0x0e
89385035
MR		 288};
289
e1f0d669
MR		 290#define STAC92HD73XX_NUM_DMICS 2
291static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
292 0x13, 0x14, 0
293};
294
295#define STAC92HD73_DAC_COUNT 5
296static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
297 0x15, 0x16, 0x17, 0x18, 0x19,
298};
299
300static hda_nid_t stac92hd73xx_mux_nids[4] = {
301 0x28, 0x29, 0x2a, 0x2b,
302};
303
304static hda_nid_t stac92hd73xx_dmux_nids[2] = {
305 0x20, 0x21,
306};
307
d9737751
MR		 308static hda_nid_t stac92hd73xx_smux_nids[2] = {
309 0x22, 0x23,
310};
311
d0513fc6
MR		 312#define STAC92HD83XXX_NUM_DMICS 2
313static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
314 0x11, 0x12, 0
315};
316
317#define STAC92HD81_DAC_COUNT 2
318#define STAC92HD83_DAC_COUNT 3
319static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
320 0x13, 0x14, 0x22,
321};
322
323static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
324 0x17, 0x18,
325};
326
327static hda_nid_t stac92hd83xxx_adc_nids[2] = {
328 0x15, 0x16,
329};
330
331static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
332 0xa, 0xb, 0xd, 0xe,
333};
334
0ffa9807
MR		 335static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
336 0x1e, 0,
337};
338
d0513fc6
MR		 339static unsigned int stac92hd83xxx_pwr_mapping[4] = {
340 0x03, 0x0c, 0x10, 0x40,
341};
342
a64135a2
MR		 343static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
344 0x0a, 0x0d, 0x0f
345};
346
e035b841
MR		 347static hda_nid_t stac92hd71bxx_adc_nids[2] = {
348 0x12, 0x13,
349};
350
351static hda_nid_t stac92hd71bxx_mux_nids[2] = {
352 0x1a, 0x1b
353};
354
4b33c767
MR		 355static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
356 0x1c, 0x1d,
e1f0d669
MR		 357};
358
d9737751
MR		 359static hda_nid_t stac92hd71bxx_smux_nids[2] = {
360 0x24, 0x25,
361};
362
aea7bb0a 363static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 364 0x10, /*0x11, */
365};
366
367#define STAC92HD71BXX_NUM_DMICS 2
368static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
369 0x18, 0x19, 0
370};
371
0ffa9807
MR		 372static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
373 0x22, 0
374};
375
8e21c34c
TD		 376static hda_nid_t stac925x_adc_nids[1] = {
377 0x03,
378};
379
380static hda_nid_t stac925x_mux_nids[1] = {
381 0x0f,
382};
383
384static hda_nid_t stac925x_dac_nids[1] = {
385 0x02,
386};
387
f6e9852a
TI		 388#define STAC925X_NUM_DMICS 1
389static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
390 0x15, 0
2c11f955
TD		 391};
392
1697055e
TI		 393static hda_nid_t stac925x_dmux_nids[1] = {
394 0x14,
395};
396
2f2f4251
M		 397static hda_nid_t stac922x_adc_nids[2] = {
398 0x06, 0x07,
399};
400
401static hda_nid_t stac922x_mux_nids[2] = {
402 0x12, 0x13,
403};
404
3cc08dc6
MP		 405static hda_nid_t stac927x_adc_nids[3] = {
406 0x07, 0x08, 0x09
407};
408
409static hda_nid_t stac927x_mux_nids[3] = {
410 0x15, 0x16, 0x17
411};
412
d9737751
MR		 413static hda_nid_t stac927x_smux_nids[1] = {
414 0x21,
415};
416
b76c850f
MR		 417static hda_nid_t stac927x_dac_nids[6] = {
418 0x02, 0x03, 0x04, 0x05, 0x06, 0
419};
420
e1f0d669
MR		 421static hda_nid_t stac927x_dmux_nids[1] = {
422 0x1b,
423};
424
7f16859a
MR		 425#define STAC927X_NUM_DMICS 2
426static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
427 0x13, 0x14, 0
428};
429
65973632
MR		 430static const char *stac927x_spdif_labels[5] = {
431 "Digital Playback", "ADAT", "Analog Mux 1",
432 "Analog Mux 2", "Analog Mux 3"
433};
434
f3302a59
MP		 435static hda_nid_t stac9205_adc_nids[2] = {
436 0x12, 0x13
437};
438
439static hda_nid_t stac9205_mux_nids[2] = {
440 0x19, 0x1a
441};
442
e1f0d669 443static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 444 0x1d,
e1f0d669
MR		 445};
446
d9737751
MR		 447static hda_nid_t stac9205_smux_nids[1] = {
448 0x21,
449};
450
f6e9852a
TI		 451#define STAC9205_NUM_DMICS 2
452static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
453 0x17, 0x18, 0
8b65727b
MP		 454};
455
c7d4b2fa 456static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 457 0x08, 0x09, 0x0d, 0x0e,
458 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 459};
460
8e21c34c
TD		 461static hda_nid_t stac925x_pin_nids[8] = {
462 0x07, 0x08, 0x0a, 0x0b,
463 0x0c, 0x0d, 0x10, 0x11,
464};
465
2f2f4251
M		 466static hda_nid_t stac922x_pin_nids[10] = {
467 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
468 0x0f, 0x10, 0x11, 0x15, 0x1b,
469};
470
a7662640 471static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 472 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
473 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 474 0x14, 0x22, 0x23
e1f0d669
MR		 475};
476
d0513fc6
MR		 477static hda_nid_t stac92hd83xxx_pin_nids[14] = {
478 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
479 0x0f, 0x10, 0x11, 0x12, 0x13,
480 0x1d, 0x1e, 0x1f, 0x20
481};
0ffa9807 482static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 483 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
484 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 485 0x1f,
e035b841
MR		 486};
487
3cc08dc6
MP		 488static hda_nid_t stac927x_pin_nids[14] = {
489 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
490 0x0f, 0x10, 0x11, 0x12, 0x13,
491 0x14, 0x21, 0x22, 0x23,
492};
493
f3302a59
MP		 494static hda_nid_t stac9205_pin_nids[12] = {
495 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
496 0x0f, 0x14, 0x16, 0x17, 0x18,
497 0x21, 0x22,
f3302a59
MP		 498};
499
89385035
MR		 500#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
501
502static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
503 struct snd_ctl_elem_value *ucontrol)
504{
505 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
506 struct sigmatel_spec *spec = codec->spec;
507 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
508
509 kcontrol->private_value ^= get_amp_nid(kcontrol);
510 kcontrol->private_value |= nid;
511
512 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
513}
514
515static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
516 struct snd_ctl_elem_value *ucontrol)
517{
518 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
519 struct sigmatel_spec *spec = codec->spec;
520 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
521
522 kcontrol->private_value ^= get_amp_nid(kcontrol);
523 kcontrol->private_value |= nid;
524
525 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
526}
527
8b65727b
MP		 528static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
529 struct snd_ctl_elem_info *uinfo)
530{
531 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
532 struct sigmatel_spec *spec = codec->spec;
533 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
534}
535
536static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
537 struct snd_ctl_elem_value *ucontrol)
538{
539 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
540 struct sigmatel_spec *spec = codec->spec;
e1f0d669 541 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 542
e1f0d669 543 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 544 return 0;
545}
546
547static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
548 struct snd_ctl_elem_value *ucontrol)
549{
550 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
551 struct sigmatel_spec *spec = codec->spec;
e1f0d669 552 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 553
554 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 555 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 556}
557
d9737751
MR		 558static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
559 struct snd_ctl_elem_info *uinfo)
560{
561 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
562 struct sigmatel_spec *spec = codec->spec;
563 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
564}
565
566static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
567 struct snd_ctl_elem_value *ucontrol)
568{
569 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
570 struct sigmatel_spec *spec = codec->spec;
571 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
572
573 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
574 return 0;
575}
576
577static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
578 struct snd_ctl_elem_value *ucontrol)
579{
580 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
581 struct sigmatel_spec *spec = codec->spec;
00ef50c2 582 struct hda_input_mux *smux = &spec->private_smux;
d9737751 583 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 584 int err, val;
585 hda_nid_t nid;
d9737751 586
00ef50c2 587 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 588 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 589 if (err < 0)
590 return err;
591
592 if (spec->spdif_mute) {
593 if (smux_idx == 0)
594 nid = spec->multiout.dig_out_nid;
595 else
596 nid = codec->slave_dig_outs[smux_idx - 1];
597 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
598 val = AMP_OUT_MUTE;
00ef50c2 599 else
c1e99bd9 600 val = AMP_OUT_UNMUTE;
00ef50c2
MR		 601 /* un/mute SPDIF out */
602 snd_hda_codec_write_cache(codec, nid, 0,
603 AC_VERB_SET_AMP_GAIN_MUTE, val);
604 }
605 return 0;
d9737751
MR		 606}
607
c8b6bf9b 608static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 609{
610 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
611 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 612 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 613}
614
c8b6bf9b 615static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 616{
617 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
618 struct sigmatel_spec *spec = codec->spec;
619 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
620
621 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
622 return 0;
623}
624
c8b6bf9b 625static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 626{
627 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
628 struct sigmatel_spec *spec = codec->spec;
629 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
630
c7d4b2fa 631 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 632 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
633}
634
b22b4821
MR		 635static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
636 struct snd_ctl_elem_info *uinfo)
637{
638 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
639 struct sigmatel_spec *spec = codec->spec;
640 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
641}
642
643static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
644 struct snd_ctl_elem_value *ucontrol)
645{
646 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
647 struct sigmatel_spec *spec = codec->spec;
648
649 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
650 return 0;
651}
652
653static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
654 struct snd_ctl_elem_value *ucontrol)
655{
656 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
657 struct sigmatel_spec *spec = codec->spec;
658
659 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
660 spec->mono_nid, &spec->cur_mmux);
661}
662
89385035
MR		 663static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
664 struct snd_ctl_elem_info *uinfo)
665{
666 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
667 struct sigmatel_spec *spec = codec->spec;
668 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
669}
670
671static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
672 struct snd_ctl_elem_value *ucontrol)
673{
674 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
675 struct sigmatel_spec *spec = codec->spec;
676
677 ucontrol->value.enumerated.item[0] = spec->cur_amux;
678 return 0;
679}
680
681static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
682 struct snd_ctl_elem_value *ucontrol)
683{
684 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
685 struct sigmatel_spec *spec = codec->spec;
686 struct snd_kcontrol *ctl =
687 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
688 if (!ctl)
689 return -EINVAL;
690
691 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
692 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
693
694 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
695 0, &spec->cur_amux);
696}
697
5f10c4a9
ML		 698#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
699
700static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
701 struct snd_ctl_elem_value *ucontrol)
702{
703 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 704 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 705 struct sigmatel_spec *spec = codec->spec;
706
e1f0d669
MR		 707 ucontrol->value.integer.value[0] = !!(spec->aloopback &
708 (spec->aloopback_mask << idx));
5f10c4a9
ML		 709 return 0;
710}
711
712static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
713 struct snd_ctl_elem_value *ucontrol)
714{
715 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
716 struct sigmatel_spec *spec = codec->spec;
e1f0d669 717 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 718 unsigned int dac_mode;
e1f0d669 719 unsigned int val, idx_val;
5f10c4a9 720
e1f0d669
MR		 721 idx_val = spec->aloopback_mask << idx;
722 if (ucontrol->value.integer.value[0])
723 val = spec->aloopback | idx_val;
724 else
725 val = spec->aloopback & ~idx_val;
68ea7b2f 726 if (spec->aloopback == val)
5f10c4a9
ML		 727 return 0;
728
68ea7b2f 729 spec->aloopback = val;
5f10c4a9 730
e1f0d669
MR		 731 /* Only return the bits defined by the shift value of the
732 * first two bytes of the mask
733 */
5f10c4a9 734 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 735 kcontrol->private_value & 0xFFFF, 0x0);
736 dac_mode >>= spec->aloopback_shift;
5f10c4a9 737
e1f0d669 738 if (spec->aloopback & idx_val) {
5f10c4a9 739 snd_hda_power_up(codec);
e1f0d669 740 dac_mode |= idx_val;
5f10c4a9
ML		 741 } else {
742 snd_hda_power_down(codec);
e1f0d669 743 dac_mode &= ~idx_val;
5f10c4a9
ML		 744 }
745
746 snd_hda_codec_write_cache(codec, codec->afg, 0,
747 kcontrol->private_value >> 16, dac_mode);
748
749 return 1;
750}
751
c7d4b2fa 752static struct hda_verb stac9200_core_init[] = {
2f2f4251 753 /* set dac0mux for dac converter */
c7d4b2fa 754 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 755 {}
756};
757
1194b5b7
TI		 758static struct hda_verb stac9200_eapd_init[] = {
759 /* set dac0mux for dac converter */
760 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
761 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
762 {}
763};
764
e1f0d669
MR		 765static struct hda_verb stac92hd73xx_6ch_core_init[] = {
766 /* set master volume and direct control */
767 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
768 /* setup audio connections */
769 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
770 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
771 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
772 /* setup adcs to point to mixer */
773 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
774 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 775 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
776 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
777 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
778 /* setup import muxs */
779 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
780 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
781 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
782 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
783 {}
784};
785
d654a660
MR		 786static struct hda_verb dell_eq_core_init[] = {
787 /* set master volume to max value without distortion
788 * and direct control */
789 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
790 /* setup audio connections */
791 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 792 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
793 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 794 /* setup adcs to point to mixer */
795 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
796 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
797 /* setup import muxs */
798 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
799 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
800 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
801 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
802 {}
803};
804
52fe0f9d 805static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 806 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d 807 /* setup audio connections */
7747ecce
MR		 808 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
809 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 810 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
811 /* setup adcs to point to mixer */
812 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
813 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
814 /* setup import muxs */
815 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
816 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
817 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
818 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
819 {}
820};
821
e1f0d669
MR		 822static struct hda_verb stac92hd73xx_8ch_core_init[] = {
823 /* set master volume and direct control */
824 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
825 /* setup audio connections */
826 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
827 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
828 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
829 /* connect hp ports to dac3 */
830 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
831 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
832 /* setup adcs to point to mixer */
833 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
834 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 835 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
836 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
837 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
838 /* setup import muxs */
839 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
840 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
841 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
842 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
843 {}
844};
845
846static struct hda_verb stac92hd73xx_10ch_core_init[] = {
847 /* set master volume and direct control */
848 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
849 /* setup audio connections */
850 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
851 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
852 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
853 /* dac3 is connected to import3 mux */
854 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
855 /* connect hp ports to dac4 */
856 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
857 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
858 /* setup adcs to point to mixer */
859 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
860 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 861 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
862 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
863 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
864 /* setup import muxs */
865 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
866 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
867 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
868 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
869 {}
870};
871
d0513fc6
MR		 872static struct hda_verb stac92hd83xxx_core_init[] = {
873 /* start of config #1 */
874 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
875
876 /* start of config #2 */
877 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
878 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
879 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
880
881 /* power state controls amps */
882 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
883};
884
e035b841 885static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 886 /* set master volume and direct control */
887 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
888 /* connect headphone jack to dac1 */
889 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
541eee87
MR		 890 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
891 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
892 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
893 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 894};
895
4b33c767 896#define HD_DISABLE_PORTF 2
541eee87 897static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 898 /* start of config #1 */
899
900 /* connect port 0f to audio mixer */
901 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 902 /* unmute right and left channels for node 0x0f */
903 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
904 /* start of config #2 */
905
e035b841
MR		 906 /* set master volume and direct control */
907 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
908 /* connect headphone jack to dac1 */
909 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 910 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 911 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
912 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 913 {}
914};
915
8e21c34c
TD		 916static struct hda_verb stac925x_core_init[] = {
917 /* set dac0mux for dac converter */
918 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
919 {}
920};
921
c7d4b2fa 922static struct hda_verb stac922x_core_init[] = {
2f2f4251 923 /* set master volume and direct control */
c7d4b2fa 924 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 925 {}
926};
927
93ed1503 928static struct hda_verb d965_core_init[] = {
19039bd0 929 /* set master volume and direct control */
93ed1503 930 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 931 /* unmute node 0x1b */
932 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
933 /* select node 0x03 as DAC */
934 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
935 {}
936};
937
3cc08dc6
MP		 938static struct hda_verb stac927x_core_init[] = {
939 /* set master volume and direct control */
940 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 941 /* enable analog pc beep path */
942 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 943 {}
944};
945
f3302a59
MP		 946static struct hda_verb stac9205_core_init[] = {
947 /* set master volume and direct control */
948 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 949 /* enable analog pc beep path */
950 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 951 {}
952};
953
b22b4821
MR		 954#define STAC_MONO_MUX \
955 { \
956 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
957 .name = "Mono Mux", \
958 .count = 1, \
959 .info = stac92xx_mono_mux_enum_info, \
960 .get = stac92xx_mono_mux_enum_get, \
961 .put = stac92xx_mono_mux_enum_put, \
962 }
963
89385035
MR		 964#define STAC_AMP_MUX \
965 { \
966 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
967 .name = "Amp Selector Capture Switch", \
968 .count = 1, \
969 .info = stac92xx_amp_mux_enum_info, \
970 .get = stac92xx_amp_mux_enum_get, \
971 .put = stac92xx_amp_mux_enum_put, \
972 }
973
974#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
975 { \
976 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
977 .name = xname, \
978 .index = 0, \
979 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
980 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
981 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
982 .info = stac92xx_amp_volume_info, \
983 .get = stac92xx_amp_volume_get, \
984 .put = stac92xx_amp_volume_put, \
985 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
986 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
987 }
988
9e05b7a3 989#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 990 { \
991 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
992 .name = "Input Source", \
9e05b7a3 993 .count = cnt, \
ca7c5a8b
ML		 994 .info = stac92xx_mux_enum_info, \
995 .get = stac92xx_mux_enum_get, \
996 .put = stac92xx_mux_enum_put, \
997 }
998
e1f0d669 999#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 1000 { \
1001 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1002 .name = "Analog Loopback", \
e1f0d669 1003 .count = cnt, \
5f10c4a9
ML		 1004 .info = stac92xx_aloopback_info, \
1005 .get = stac92xx_aloopback_get, \
1006 .put = stac92xx_aloopback_put, \
1007 .private_value = verb_read | (verb_write << 16), \
1008 }
1009
c8b6bf9b 1010static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 1011 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
1012 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 1013 STAC_INPUT_SOURCE(1),
2f2f4251
M		 1014 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1015 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 1016 { } /* end */
1017};
1018
2a9c7816 1019#define DELL_M6_MIXER 6
e1f0d669 1020static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 1021 /* start of config #1 */
e1f0d669
MR		 1022 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1023 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1024
e1f0d669
MR		 1025 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1026 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1027
2a9c7816
MR		 1028 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1029 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1030
1031 /* start of config #2 */
1032 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1033 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1034
e1f0d669
MR		 1035 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1036 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1037
2a9c7816
MR		 1038 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1039
1040 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1041 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1042
1043 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1044 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1045
e1f0d669
MR		 1046 { } /* end */
1047};
1048
1049static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1050 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1051
e1f0d669
MR		 1052 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1053 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1054
1055 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1056 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1057
1058 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1059 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1060
1061 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1062 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1063
1064 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1065 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1066
1067 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1068 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1069
1070 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1071 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1072 { } /* end */
1073};
1074
1075static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1076 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1077
e1f0d669
MR		 1078 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1079 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1080
1081 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1082 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1083
1084 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1085 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1086
1087 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1088 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1089
1090 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1091 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1092
1093 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1094 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1095
1096 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1097 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1098 { } /* end */
1099};
1100
d0513fc6
MR		 1101
1102static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1103 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1104 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1105
1106 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1107 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1108
1109 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1110 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1111
1112 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1113 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1114
1115 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1116 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1117
1118 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1119 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1120
1121 /*
1122 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1123 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1124 */
1125 { } /* end */
1126};
1127
541eee87 1128static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1129 STAC_INPUT_SOURCE(2),
4b33c767 1130 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1131
9b35947f
MR		 1132 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1133 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1134
1135 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1136 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1137 /* analog pc-beep replaced with digital beep support */
1138 /*
f7c5dda2
MR		 1139 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1140 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1141 */
f7c5dda2 1142
687cb98e
MR		 1143 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1144 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1145
687cb98e
MR		 1146 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1147 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1148
1149 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1150 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1151
1152 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1153 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1154 { } /* end */
1155};
1156
541eee87 1157static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1158 STAC_INPUT_SOURCE(2),
1159 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1160
541eee87
MR		 1161 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1162 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1163
1164 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1165 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1166 { } /* end */
1167};
1168
8e21c34c 1169static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1170 STAC_INPUT_SOURCE(1),
8e21c34c 1171 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1172 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1173 { } /* end */
1174};
1175
9e05b7a3 1176static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1177 STAC_INPUT_SOURCE(2),
e1f0d669 1178 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1179
1180 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1181 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1182
1183 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1184 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1185 { } /* end */
1186};
1187
19039bd0 1188/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1189static struct snd_kcontrol_new stac922x_mixer[] = {
1190 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1191 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1192 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1193
1194 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1195 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1196 { } /* end */
1197};
1198
9e05b7a3 1199
d1d985f0 1200static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1201 STAC_INPUT_SOURCE(3),
e1f0d669 1202 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1203
9e05b7a3
ML		 1204 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1205 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1206
1207 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1208 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1209
1210 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1211 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1212 { } /* end */
1213};
1214
1697055e
TI		 1215static struct snd_kcontrol_new stac_dmux_mixer = {
1216 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1217 .name = "Digital Input Source",
1218 /* count set later */
1219 .info = stac92xx_dmux_enum_info,
1220 .get = stac92xx_dmux_enum_get,
1221 .put = stac92xx_dmux_enum_put,
1222};
1223
d9737751
MR		 1224static struct snd_kcontrol_new stac_smux_mixer = {
1225 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1226 .name = "IEC958 Playback Source",
d9737751
MR		 1227 /* count set later */
1228 .info = stac92xx_smux_enum_info,
1229 .get = stac92xx_smux_enum_get,
1230 .put = stac92xx_smux_enum_put,
1231};
1232
2134ea4f
TI		 1233static const char *slave_vols[] = {
1234 "Front Playback Volume",
1235 "Surround Playback Volume",
1236 "Center Playback Volume",
1237 "LFE Playback Volume",
1238 "Side Playback Volume",
1239 "Headphone Playback Volume",
1240 "Headphone Playback Volume",
1241 "Speaker Playback Volume",
1242 "External Speaker Playback Volume",
1243 "Speaker2 Playback Volume",
1244 NULL
1245};
1246
1247static const char *slave_sws[] = {
1248 "Front Playback Switch",
1249 "Surround Playback Switch",
1250 "Center Playback Switch",
1251 "LFE Playback Switch",
1252 "Side Playback Switch",
1253 "Headphone Playback Switch",
1254 "Headphone Playback Switch",
1255 "Speaker Playback Switch",
1256 "External Speaker Playback Switch",
1257 "Speaker2 Playback Switch",
edb54a55 1258 "IEC958 Playback Switch",
2134ea4f
TI		 1259 NULL
1260};
1261
603c4019 1262static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1263static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1264
2f2f4251
M		 1265static int stac92xx_build_controls(struct hda_codec *codec)
1266{
1267 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1268 struct auto_pin_cfg *cfg = &spec->autocfg;
1269 hda_nid_t nid;
2f2f4251 1270 int err;
c7d4b2fa 1271 int i;
2f2f4251
M		 1272
1273 err = snd_hda_add_new_ctls(codec, spec->mixer);
1274 if (err < 0)
1275 return err;
c7d4b2fa
M		 1276
1277 for (i = 0; i < spec->num_mixers; i++) {
1278 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1279 if (err < 0)
1280 return err;
1281 }
1697055e
TI		 1282 if (spec->num_dmuxes > 0) {
1283 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1284 err = snd_hda_ctl_add(codec,
1697055e
TI		 1285 snd_ctl_new1(&stac_dmux_mixer, codec));
1286 if (err < 0)
1287 return err;
1288 }
d9737751 1289 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1290 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1291 struct hda_input_mux *smux = &spec->private_smux;
1292 /* check for mute support on SPDIF out */
1293 if (wcaps & AC_WCAP_OUT_AMP) {
1294 smux->items[smux->num_items].label = "Off";
1295 smux->items[smux->num_items].index = 0;
1296 smux->num_items++;
1297 spec->spdif_mute = 1;
1298 }
d9737751
MR		 1299 stac_smux_mixer.count = spec->num_smuxes;
1300 err = snd_ctl_add(codec->bus->card,
1301 snd_ctl_new1(&stac_smux_mixer, codec));
1302 if (err < 0)
1303 return err;
1304 }
c7d4b2fa 1305
dabbed6f
M		 1306 if (spec->multiout.dig_out_nid) {
1307 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1308 if (err < 0)
1309 return err;
9a08160b
TI		 1310 err = snd_hda_create_spdif_share_sw(codec,
1311 &spec->multiout);
1312 if (err < 0)
1313 return err;
1314 spec->multiout.share_spdif = 1;
dabbed6f 1315 }
da74ae3e 1316 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1317 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1318 if (err < 0)
1319 return err;
1320 }
2134ea4f
TI		 1321
1322 /* if we have no master control, let's create it */
1323 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1324 unsigned int vmaster_tlv[4];
2134ea4f 1325 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1326 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1327 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1328 vmaster_tlv, slave_vols);
2134ea4f
TI		 1329 if (err < 0)
1330 return err;
1331 }
1332 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1333 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1334 NULL, slave_sws);
1335 if (err < 0)
1336 return err;
1337 }
1338
603c4019 1339 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1340
1341 /* create jack input elements */
1342 if (spec->hp_detect) {
1343 for (i = 0; i < cfg->hp_outs; i++) {
1344 int type = SND_JACK_HEADPHONE;
1345 nid = cfg->hp_pins[i];
1346 /* jack detection */
1347 if (cfg->hp_outs == i)
1348 type |= SND_JACK_LINEOUT;
1349 err = stac92xx_add_jack(codec, nid, type);
1350 if (err < 0)
1351 return err;
1352 }
1353 }
1354 for (i = 0; i < cfg->line_outs; i++) {
1355 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1356 SND_JACK_LINEOUT);
1357 if (err < 0)
1358 return err;
1359 }
1360 for (i = 0; i < AUTO_PIN_LAST; i++) {
1361 nid = cfg->input_pins[i];
1362 if (nid) {
1363 err = stac92xx_add_jack(codec, nid,
1364 SND_JACK_MICROPHONE);
1365 if (err < 0)
1366 return err;
1367 }
1368 }
1369
dabbed6f 1370 return 0;
2f2f4251
M		 1371}
1372
403d1944 1373static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1374 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1375 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1376};
1377
dfe495d0
TI		 1378/*
1379 STAC 9200 pin configs for
1380 102801A8
1381 102801DE
1382 102801E8
1383*/
1384static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1385 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1386 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1387};
1388
1389/*
1390 STAC 9200 pin configs for
1391 102801C0
1392 102801C1
1393*/
1394static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1395 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1396 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1397};
1398
1399/*
1400 STAC 9200 pin configs for
1401 102801C4 (Dell Dimension E310)
1402 102801C5
1403 102801C7
1404 102801D9
1405 102801DA
1406 102801E3
1407*/
1408static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1409 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1410 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1411};
1412
1413
1414/*
1415 STAC 9200-32 pin configs for
1416 102801B5 (Dell Inspiron 630m)
1417 102801D8 (Dell Inspiron 640m)
1418*/
1419static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1420 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1421 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1422};
1423
1424/*
1425 STAC 9200-32 pin configs for
1426 102801C2 (Dell Latitude D620)
1427 102801C8
1428 102801CC (Dell Latitude D820)
1429 102801D4
1430 102801D6
1431*/
1432static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1433 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1434 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1435};
1436
1437/*
1438 STAC 9200-32 pin configs for
1439 102801CE (Dell XPS M1710)
1440 102801CF (Dell Precision M90)
1441*/
1442static unsigned int dell9200_m23_pin_configs[8] = {
1443 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1444 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1445};
1446
1447/*
1448 STAC 9200-32 pin configs for
1449 102801C9
1450 102801CA
1451 102801CB (Dell Latitude 120L)
1452 102801D3
1453*/
1454static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1455 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1456 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1457};
1458
1459/*
1460 STAC 9200-32 pin configs for
1461 102801BD (Dell Inspiron E1505n)
1462 102801EE
1463 102801EF
1464*/
1465static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1466 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1467 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1468};
1469
1470/*
1471 STAC 9200-32 pin configs for
1472 102801F5 (Dell Inspiron 1501)
1473 102801F6
1474*/
1475static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1476 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1477 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1478};
1479
1480/*
1481 STAC 9200-32
1482 102801CD (Dell Inspiron E1705/9400)
1483*/
1484static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1485 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1486 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1487};
1488
bf277785
TD		 1489static unsigned int oqo9200_pin_configs[8] = {
1490 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1491 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1492};
1493
dfe495d0 1494
f5fcc13c
TI		 1495static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1496 [STAC_REF] = ref9200_pin_configs,
bf277785 1497 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1498 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1499 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1500 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1501 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1502 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1503 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1504 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1505 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1506 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1507 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1508 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1509};
1510
f5fcc13c
TI		 1511static const char *stac9200_models[STAC_9200_MODELS] = {
1512 [STAC_REF] = "ref",
bf277785 1513 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1514 [STAC_9200_DELL_D21] = "dell-d21",
1515 [STAC_9200_DELL_D22] = "dell-d22",
1516 [STAC_9200_DELL_D23] = "dell-d23",
1517 [STAC_9200_DELL_M21] = "dell-m21",
1518 [STAC_9200_DELL_M22] = "dell-m22",
1519 [STAC_9200_DELL_M23] = "dell-m23",
1520 [STAC_9200_DELL_M24] = "dell-m24",
1521 [STAC_9200_DELL_M25] = "dell-m25",
1522 [STAC_9200_DELL_M26] = "dell-m26",
1523 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1524 [STAC_9200_GATEWAY] = "gateway",
117f257d 1525 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1526};
1527
1528static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1529 /* SigmaTel reference board */
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1531 "DFI LanParty", STAC_REF),
e7377071 1532 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1534 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1536 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1538 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1540 "unknown Dell", STAC_9200_DELL_D22),
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1542 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1544 "Dell Latitude D620", STAC_9200_DELL_M22),
1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1546 "unknown Dell", STAC_9200_DELL_D23),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1548 "unknown Dell", STAC_9200_DELL_D23),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1550 "unknown Dell", STAC_9200_DELL_M22),
1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1552 "unknown Dell", STAC_9200_DELL_M24),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1554 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1556 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1558 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1560 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1562 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1564 "Dell Precision M90", STAC_9200_DELL_M23),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1566 "unknown Dell", STAC_9200_DELL_M22),
1567 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1568 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1569 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1570 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1571 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1572 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1573 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1574 "unknown Dell", STAC_9200_DELL_D23),
1575 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1576 "unknown Dell", STAC_9200_DELL_D23),
1577 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1578 "unknown Dell", STAC_9200_DELL_D21),
1579 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1580 "unknown Dell", STAC_9200_DELL_D23),
1581 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1582 "unknown Dell", STAC_9200_DELL_D21),
1583 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1584 "unknown Dell", STAC_9200_DELL_M25),
1585 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1586 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1587 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1588 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1589 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1590 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1591 /* Panasonic */
117f257d 1592 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1593 /* Gateway machines needs EAPD to be set on resume */
1594 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1595 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1596 STAC_9200_GATEWAY),
1597 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1598 STAC_9200_GATEWAY),
bf277785
TD		 1599 /* OQO Mobile */
1600 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1601 {} /* terminator */
1602};
1603
8e21c34c
TD		 1604static unsigned int ref925x_pin_configs[8] = {
1605 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1606 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1607};
1608
9cb36c2a
MCC		 1609static unsigned int stac925xM1_pin_configs[8] = {
1610 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1611 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1612};
1613static unsigned int stac925xM1_2_pin_configs[8] = {
1614 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1615 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1616};
1617static unsigned int stac925xM2_pin_configs[8] = {
1618 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1619 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1620};
1621
1622static unsigned int stac925xM3_pin_configs[8] = {
1623 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1624 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1625};
1626static unsigned int stac925xM5_pin_configs[8] = {
1627 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1628 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1629};
1630
1631/* Original M6 entry at .ini file */
1632static unsigned int stac925xM6_pin_configs[8] = {
1633 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1634 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
1635};
1636
8e21c34c
TD		 1637static unsigned int stac925x_MA6_pin_configs[8] = {
1638 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1639 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1640};
1641
9cb36c2a 1642/* This entry should be M2 */
2c11f955
TD		 1643static unsigned int stac925x_PA6_pin_configs[8] = {
1644 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1645 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1646};
1647
8e21c34c 1648static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1649 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1650 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1651};
1652
1653static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1654 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1655 [STAC_M1] = stac925xM1_pin_configs,
1656 [STAC_M1_2] = stac925xM1_2_pin_configs,
1657 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1658 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1659 [STAC_M3] = stac925xM3_pin_configs,
1660 [STAC_M5] = stac925xM5_pin_configs,
1661 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c 1662 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1663 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1664};
1665
1666static const char *stac925x_models[STAC_925x_MODELS] = {
1667 [STAC_REF] = "ref",
9cb36c2a
MCC		 1668 [STAC_M1] = "m1",
1669 [STAC_M1_2] = "m1-2",
1670 [STAC_M2] = "m2",
8e21c34c 1671 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1672 [STAC_M3] = "m3",
1673 [STAC_M5] = "m5",
1674 [STAC_M6] = "m6",
1675 [STAC_MA6] = "ma6",
2c11f955 1676 [STAC_PA6] = "pa6",
8e21c34c
TD		 1677};
1678
9cb36c2a 1679static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
8e21c34c
TD		 1680 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1681 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
9cb36c2a 1682
8e21c34c 1683 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1684 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
9cb36c2a
MCC		 1685 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
1686
1687 /* Not sure about the brand name for those */
1688 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1689 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1690 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1691 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
1692
1693 {} /* terminator */
1694};
1695
1696static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1697 /* SigmaTel reference board */
1698 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1699 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1700
1701 /* Default table for unknown ID */
1702 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1703
8e21c34c
TD		 1704 {} /* terminator */
1705};
1706
a7662640 1707static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1708 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1709 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1710 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1711 0x01452050,
1712};
1713
1714static unsigned int dell_m6_pin_configs[13] = {
1715 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1716 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1717 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1718 0x4f0000f0,
e1f0d669
MR		 1719};
1720
1721static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1722 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1723 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1724 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1725 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1726 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1727};
1728
1729static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1730 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI		 1731 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1732 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1733 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1734 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1735};
1736
1737static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1738 /* SigmaTel reference board */
1739 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1740 "DFI LanParty", STAC_92HD73XX_REF),
1741 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1742 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1743 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1744 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1745 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1746 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1747 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1748 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1749 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1750 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1751 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1752 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1753 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1754 "unknown Dell", STAC_DELL_M6_DMIC),
1755 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1756 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1757 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1758 "Dell Studio 1537", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1759 {} /* terminator */
1760};
1761
d0513fc6
MR		 1762static unsigned int ref92hd83xxx_pin_configs[14] = {
1763 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1764 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1765 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1766 0x01451160, 0x98560170,
1767};
1768
1769static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1770 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1771};
1772
1773static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1774 [STAC_92HD83XXX_REF] = "ref",
1775};
1776
1777static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1778 /* SigmaTel reference board */
1779 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1780 "DFI LanParty", STAC_92HD71BXX_REF),
1781};
1782
0ffa9807 1783static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1784 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1785 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1786 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1787};
1788
0ffa9807 1789static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1790 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1791 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1792 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1793};
1794
0ffa9807 1795static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1796 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1797 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1798 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1799};
1800
3a7abfd2
MR		 1801static unsigned int dell_m4_3_pin_configs[11] = {
1802 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1803 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1804 0x40f000f0, 0x044413b0, 0x044413b0,
1805};
1806
e035b841
MR		 1807static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1808 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1809 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1810 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1811 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1812 [STAC_HP_M4] = NULL,
e035b841
MR		 1813};
1814
1815static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1816 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1817 [STAC_DELL_M4_1] = "dell-m4-1",
1818 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1819 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1820 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1821};
1822
1823static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1824 /* SigmaTel reference board */
1825 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1826 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1827 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1828 "HP dv5", STAC_HP_M4),
1829 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1830 "HP dv7", STAC_HP_M4),
9a9e2359
MR		 1831 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1832 "unknown HP", STAC_HP_M4),
a7662640
MR		 1833 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1834 "unknown Dell", STAC_DELL_M4_1),
1835 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1836 "unknown Dell", STAC_DELL_M4_1),
1837 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1838 "unknown Dell", STAC_DELL_M4_1),
1839 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1840 "unknown Dell", STAC_DELL_M4_1),
1841 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1842 "unknown Dell", STAC_DELL_M4_1),
1843 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1844 "unknown Dell", STAC_DELL_M4_1),
1845 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1846 "unknown Dell", STAC_DELL_M4_1),
1847 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1848 "unknown Dell", STAC_DELL_M4_2),
1849 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1850 "unknown Dell", STAC_DELL_M4_2),
1851 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1852 "unknown Dell", STAC_DELL_M4_2),
1853 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1854 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1855 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1856 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1857 {} /* terminator */
1858};
1859
403d1944
MP		 1860static unsigned int ref922x_pin_configs[10] = {
1861 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1862 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1863 0x40000100, 0x40000100,
1864};
1865
dfe495d0
TI		 1866/*
1867 STAC 922X pin configs for
1868 102801A7
1869 102801AB
1870 102801A9
1871 102801D1
1872 102801D2
1873*/
1874static unsigned int dell_922x_d81_pin_configs[10] = {
1875 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1876 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1877 0x01813122, 0x400001f2,
1878};
1879
1880/*
1881 STAC 922X pin configs for
1882 102801AC
1883 102801D0
1884*/
1885static unsigned int dell_922x_d82_pin_configs[10] = {
1886 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1887 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1888 0x01813122, 0x400001f1,
1889};
1890
1891/*
1892 STAC 922X pin configs for
1893 102801BF
1894*/
1895static unsigned int dell_922x_m81_pin_configs[10] = {
1896 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1897 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1898 0x40C003f1, 0x405003f0,
1899};
1900
1901/*
1902 STAC 9221 A1 pin configs for
1903 102801D7 (Dell XPS M1210)
1904*/
1905static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1906 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1907 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1908 0x508003f3, 0x405003f4,
1909};
1910
403d1944 1911static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1912 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1913 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1914 0x02a19120, 0x40000100,
1915};
1916
1917static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1918 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1919 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1920 0x02a19320, 0x40000100,
1921};
1922
5d5d3bc3
IZ		 1923static unsigned int intel_mac_v1_pin_configs[10] = {
1924 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1925 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1926 0x400000fc, 0x400000fb,
1927};
1928
1929static unsigned int intel_mac_v2_pin_configs[10] = {
1930 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1931 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1932 0x400000fc, 0x400000fb,
6f0778d8
NB		 1933};
1934
5d5d3bc3
IZ		 1935static unsigned int intel_mac_v3_pin_configs[10] = {
1936 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1937 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1938 0x400000fc, 0x400000fb,
1939};
1940
5d5d3bc3
IZ		 1941static unsigned int intel_mac_v4_pin_configs[10] = {
1942 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1943 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1944 0x400000fc, 0x400000fb,
1945};
1946
5d5d3bc3
IZ		 1947static unsigned int intel_mac_v5_pin_configs[10] = {
1948 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1949 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1950 0x400000fc, 0x400000fb,
0dae0f83
TI		 1951};
1952
8c650087
MCC		 1953static unsigned int ecs202_pin_configs[10] = {
1954 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1955 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1956 0x9037012e, 0x40e000f2,
1957};
76c08828 1958
19039bd0 1959static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1960 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1961 [STAC_D945GTP3] = d945gtp3_pin_configs,
1962 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1963 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1964 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1965 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1966 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1967 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1968 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1969 /* for backward compatibility */
5d5d3bc3
IZ		 1970 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1971 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1972 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1973 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1974 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1975 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1976 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1977 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1978 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1979 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1980 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1981};
1982
f5fcc13c
TI		 1983static const char *stac922x_models[STAC_922X_MODELS] = {
1984 [STAC_D945_REF] = "ref",
1985 [STAC_D945GTP5] = "5stack",
1986 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1987 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1988 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1989 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1990 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1991 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1992 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1993 /* for backward compatibility */
f5fcc13c 1994 [STAC_MACMINI] = "macmini",
3fc24d85 1995 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1996 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1997 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1998 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1999 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 2000 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 2001 [STAC_922X_DELL_D81] = "dell-d81",
2002 [STAC_922X_DELL_D82] = "dell-d82",
2003 [STAC_922X_DELL_M81] = "dell-m81",
2004 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 2005};
2006
2007static struct snd_pci_quirk stac922x_cfg_tbl[] = {
2008 /* SigmaTel reference board */
2009 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2010 "DFI LanParty", STAC_D945_REF),
2011 /* Intel 945G based systems */
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
2013 "Intel D945G", STAC_D945GTP3),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
2015 "Intel D945G", STAC_D945GTP3),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2017 "Intel D945G", STAC_D945GTP3),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2019 "Intel D945G", STAC_D945GTP3),
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2021 "Intel D945G", STAC_D945GTP3),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2023 "Intel D945G", STAC_D945GTP3),
2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2025 "Intel D945G", STAC_D945GTP3),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2027 "Intel D945G", STAC_D945GTP3),
2028 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2029 "Intel D945G", STAC_D945GTP3),
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2031 "Intel D945G", STAC_D945GTP3),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2033 "Intel D945G", STAC_D945GTP3),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2035 "Intel D945G", STAC_D945GTP3),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2037 "Intel D945G", STAC_D945GTP3),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2039 "Intel D945G", STAC_D945GTP3),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2041 "Intel D945G", STAC_D945GTP3),
2042 /* Intel D945G 5-stack systems */
2043 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2044 "Intel D945G", STAC_D945GTP5),
2045 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2046 "Intel D945G", STAC_D945GTP5),
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2048 "Intel D945G", STAC_D945GTP5),
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2050 "Intel D945G", STAC_D945GTP5),
2051 /* Intel 945P based systems */
2052 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2053 "Intel D945P", STAC_D945GTP3),
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2055 "Intel D945P", STAC_D945GTP3),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2057 "Intel D945P", STAC_D945GTP3),
2058 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2059 "Intel D945P", STAC_D945GTP3),
2060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2061 "Intel D945P", STAC_D945GTP3),
2062 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2063 "Intel D945P", STAC_D945GTP5),
2064 /* other systems */
536319af 2065 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2066 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2067 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2068 /* Dell systems */
2069 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2070 "unknown Dell", STAC_922X_DELL_D81),
2071 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2072 "unknown Dell", STAC_922X_DELL_D81),
2073 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2074 "unknown Dell", STAC_922X_DELL_D81),
2075 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2076 "unknown Dell", STAC_922X_DELL_D82),
2077 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2078 "unknown Dell", STAC_922X_DELL_M81),
2079 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2080 "unknown Dell", STAC_922X_DELL_D82),
2081 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2082 "unknown Dell", STAC_922X_DELL_D81),
2083 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2084 "unknown Dell", STAC_922X_DELL_D81),
2085 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2086 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 2087 /* ECS/PC Chips boards */
2088 SND_PCI_QUIRK(0x1019, 0x2144,
2089 "ECS/PC chips", STAC_ECS_202),
2090 SND_PCI_QUIRK(0x1019, 0x2608,
2091 "ECS/PC chips", STAC_ECS_202),
2092 SND_PCI_QUIRK(0x1019, 0x2633,
2093 "ECS/PC chips P17G/1333", STAC_ECS_202),
2094 SND_PCI_QUIRK(0x1019, 0x2811,
2095 "ECS/PC chips", STAC_ECS_202),
2096 SND_PCI_QUIRK(0x1019, 0x2812,
2097 "ECS/PC chips", STAC_ECS_202),
2098 SND_PCI_QUIRK(0x1019, 0x2813,
2099 "ECS/PC chips", STAC_ECS_202),
2100 SND_PCI_QUIRK(0x1019, 0x2814,
2101 "ECS/PC chips", STAC_ECS_202),
2102 SND_PCI_QUIRK(0x1019, 0x2815,
2103 "ECS/PC chips", STAC_ECS_202),
2104 SND_PCI_QUIRK(0x1019, 0x2816,
2105 "ECS/PC chips", STAC_ECS_202),
2106 SND_PCI_QUIRK(0x1019, 0x2817,
2107 "ECS/PC chips", STAC_ECS_202),
2108 SND_PCI_QUIRK(0x1019, 0x2818,
2109 "ECS/PC chips", STAC_ECS_202),
2110 SND_PCI_QUIRK(0x1019, 0x2819,
2111 "ECS/PC chips", STAC_ECS_202),
2112 SND_PCI_QUIRK(0x1019, 0x2820,
2113 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2114 {} /* terminator */
2115};
2116
3cc08dc6 2117static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2118 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2119 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2120 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2121 0x01c42190, 0x40000100,
3cc08dc6
MP		 2122};
2123
93ed1503 2124static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2125 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2126 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2127 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2128 0x40000100, 0x40000100
2129};
2130
93ed1503
TD		 2131static unsigned int d965_5st_pin_configs[14] = {
2132 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2133 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2134 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2135 0x40000100, 0x40000100
2136};
2137
4ff076e5
TD		 2138static unsigned int dell_3st_pin_configs[14] = {
2139 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2140 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2141 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2142 0x40c003fc, 0x40000100
2143};
2144
93ed1503 2145static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 2146 [STAC_D965_REF] = ref927x_pin_configs,
2147 [STAC_D965_3ST] = d965_3st_pin_configs,
2148 [STAC_D965_5ST] = d965_5st_pin_configs,
2149 [STAC_DELL_3ST] = dell_3st_pin_configs,
2150 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2151};
2152
f5fcc13c 2153static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 2154 [STAC_D965_REF] = "ref",
2155 [STAC_D965_3ST] = "3stack",
2156 [STAC_D965_5ST] = "5stack",
2157 [STAC_DELL_3ST] = "dell-3stack",
2158 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2159};
2160
2161static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2162 /* SigmaTel reference board */
2163 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2164 "DFI LanParty", STAC_D965_REF),
81d3dbde 2165 /* Intel 946 based systems */
f5fcc13c
TI		 2166 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2167 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2168 /* 965 based 3 stack systems */
f5fcc13c
TI		 2169 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2170 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2171 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2172 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2173 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2174 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2175 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2176 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2177 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2178 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2179 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2181 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2182 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2183 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2184 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2185 /* Dell 3 stack systems */
8e9068b1 2186 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2187 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2189 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2190 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2191 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2199 /* 965 based 5 stack systems */
f5fcc13c
TI		 2200 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2201 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2202 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2203 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2204 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2205 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2206 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2207 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2208 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2209 {} /* terminator */
2210};
2211
f3302a59
MP		 2212static unsigned int ref9205_pin_configs[12] = {
2213 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2214 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2215 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2216};
2217
dfe495d0
TI		 2218/*
2219 STAC 9205 pin configs for
2220 102801F1
2221 102801F2
2222 102801FC
2223 102801FD
2224 10280204
2225 1028021F
3fa2ef74 2226 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2227*/
2228static unsigned int dell_9205_m42_pin_configs[12] = {
2229 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2230 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2231 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2232};
2233
2234/*
2235 STAC 9205 pin configs for
2236 102801F9
2237 102801FA
2238 102801FE
2239 102801FF (Dell Precision M4300)
2240 10280206
2241 10280200
2242 10280201
2243*/
2244static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2245 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2246 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2247 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2248};
2249
dfe495d0 2250static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2251 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2252 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2253 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2254};
2255
f5fcc13c 2256static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2257 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2258 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2259 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2260 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2261};
2262
f5fcc13c
TI		 2263static const char *stac9205_models[STAC_9205_MODELS] = {
2264 [STAC_9205_REF] = "ref",
dfe495d0 2265 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2266 [STAC_9205_DELL_M43] = "dell-m43",
2267 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2268};
2269
2270static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2271 /* SigmaTel reference board */
2272 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2273 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2275 "unknown Dell", STAC_9205_DELL_M42),
2276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2277 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2279 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2281 "Dell Precision", STAC_9205_DELL_M43),
2282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2283 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2285 "unknown Dell", STAC_9205_DELL_M42),
2286 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2287 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2288 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2289 "Dell Precision", STAC_9205_DELL_M43),
2290 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2291 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2292 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2293 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2294 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2295 "Dell Precision", STAC_9205_DELL_M43),
2296 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2297 "Dell Precision", STAC_9205_DELL_M43),
2298 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2299 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2300 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2301 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2302 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2303 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2304 {} /* terminator */
2305};
2306
11b44bbd
RF		 2307static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2308{
2309 int i;
2310 struct sigmatel_spec *spec = codec->spec;
2311
af9f341a
TI		 2312 kfree(spec->pin_configs);
2313 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2314 GFP_KERNEL);
2315 if (!spec->pin_configs)
2316 return -ENOMEM;
11b44bbd
RF		 2317
2318 for (i = 0; i < spec->num_pins; i++) {
2319 hda_nid_t nid = spec->pin_nids[i];
2320 unsigned int pin_cfg;
2321
2322 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2323 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2324 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2325 nid, pin_cfg);
af9f341a 2326 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF		 2327 }
2328
2329 return 0;
2330}
2331
87d48363
MR		 2332static void stac92xx_set_config_reg(struct hda_codec *codec,
2333 hda_nid_t pin_nid, unsigned int pin_config)
2334{
2335 int i;
2336 snd_hda_codec_write(codec, pin_nid, 0,
2337 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2338 pin_config & 0x000000ff);
2339 snd_hda_codec_write(codec, pin_nid, 0,
2340 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2341 (pin_config & 0x0000ff00) >> 8);
2342 snd_hda_codec_write(codec, pin_nid, 0,
2343 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2344 (pin_config & 0x00ff0000) >> 16);
2345 snd_hda_codec_write(codec, pin_nid, 0,
2346 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2347 pin_config >> 24);
2348 i = snd_hda_codec_read(codec, pin_nid, 0,
2349 AC_VERB_GET_CONFIG_DEFAULT,
2350 0x00);
2351 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2352 pin_nid, i);
2353}
2354
2f2f4251
M		 2355static void stac92xx_set_config_regs(struct hda_codec *codec)
2356{
2357 int i;
2358 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2359
87d48363
MR		 2360 if (!spec->pin_configs)
2361 return;
11b44bbd 2362
87d48363
MR		 2363 for (i = 0; i < spec->num_pins; i++)
2364 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2365 spec->pin_configs[i]);
2f2f4251 2366}
2f2f4251 2367
af9f341a
TI		 2368static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2369{
2370 struct sigmatel_spec *spec = codec->spec;
2371
2372 if (!pins)
2373 return stac92xx_save_bios_config_regs(codec);
2374
2375 kfree(spec->pin_configs);
2376 spec->pin_configs = kmemdup(pins,
2377 spec->num_pins * sizeof(*pins),
2378 GFP_KERNEL);
2379 if (!spec->pin_configs)
2380 return -ENOMEM;
2381
2382 stac92xx_set_config_regs(codec);
2383 return 0;
2384}
2385
2386static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2387 unsigned int cfg)
2388{
2389 struct sigmatel_spec *spec = codec->spec;
2390 int i;
2391
2392 for (i = 0; i < spec->num_pins; i++) {
2393 if (spec->pin_nids[i] == nid) {
2394 spec->pin_configs[i] = cfg;
2395 stac92xx_set_config_reg(codec, nid, cfg);
2396 break;
2397 }
2398 }
2399}
2400
dabbed6f 2401/*
c7d4b2fa 2402 * Analog playback callbacks
dabbed6f 2403 */
c7d4b2fa
M		 2404static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2405 struct hda_codec *codec,
c8b6bf9b 2406 struct snd_pcm_substream *substream)
2f2f4251 2407{
dabbed6f 2408 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2409 if (spec->stream_delay)
2410 msleep(spec->stream_delay);
9a08160b
TI		 2411 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2412 hinfo);
2f2f4251
M		 2413}
2414
2f2f4251
M		 2415static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2416 struct hda_codec *codec,
2417 unsigned int stream_tag,
2418 unsigned int format,
c8b6bf9b 2419 struct snd_pcm_substream *substream)
2f2f4251
M		 2420{
2421 struct sigmatel_spec *spec = codec->spec;
403d1944 2422 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2423}
2424
2425static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2426 struct hda_codec *codec,
c8b6bf9b 2427 struct snd_pcm_substream *substream)
2f2f4251
M		 2428{
2429 struct sigmatel_spec *spec = codec->spec;
2430 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2431}
2432
dabbed6f
M		 2433/*
2434 * Digital playback callbacks
2435 */
2436static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2437 struct hda_codec *codec,
c8b6bf9b 2438 struct snd_pcm_substream *substream)
dabbed6f
M		 2439{
2440 struct sigmatel_spec *spec = codec->spec;
2441 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2442}
2443
2444static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2445 struct hda_codec *codec,
c8b6bf9b 2446 struct snd_pcm_substream *substream)
dabbed6f
M		 2447{
2448 struct sigmatel_spec *spec = codec->spec;
2449 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2450}
2451
6b97eb45
TI		 2452static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2453 struct hda_codec *codec,
2454 unsigned int stream_tag,
2455 unsigned int format,
2456 struct snd_pcm_substream *substream)
2457{
2458 struct sigmatel_spec *spec = codec->spec;
2459 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2460 stream_tag, format, substream);
2461}
2462
dabbed6f 2463
2f2f4251
M		 2464/*
2465 * Analog capture callbacks
2466 */
2467static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2468 struct hda_codec *codec,
2469 unsigned int stream_tag,
2470 unsigned int format,
c8b6bf9b 2471 struct snd_pcm_substream *substream)
2f2f4251
M		 2472{
2473 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2474 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2475
8daaaa97
MR		 2476 if (spec->powerdown_adcs) {
2477 msleep(40);
2478 snd_hda_codec_write_cache(codec, nid, 0,
2479 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2480 }
2481 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2482 return 0;
2483}
2484
2485static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2486 struct hda_codec *codec,
c8b6bf9b 2487 struct snd_pcm_substream *substream)
2f2f4251
M		 2488{
2489 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2490 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2491
8daaaa97
MR		 2492 snd_hda_codec_cleanup_stream(codec, nid);
2493 if (spec->powerdown_adcs)
2494 snd_hda_codec_write_cache(codec, nid, 0,
2495 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2496 return 0;
2497}
2498
dabbed6f
M		 2499static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2500 .substreams = 1,
2501 .channels_min = 2,
2502 .channels_max = 2,
2503 /* NID is set in stac92xx_build_pcms */
2504 .ops = {
2505 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2506 .close = stac92xx_dig_playback_pcm_close,
2507 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2508 },
2509};
2510
2511static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2512 .substreams = 1,
2513 .channels_min = 2,
2514 .channels_max = 2,
2515 /* NID is set in stac92xx_build_pcms */
2516};
2517
2f2f4251
M		 2518static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2519 .substreams = 1,
2520 .channels_min = 2,
c7d4b2fa 2521 .channels_max = 8,
2f2f4251
M		 2522 .nid = 0x02, /* NID to query formats and rates */
2523 .ops = {
2524 .open = stac92xx_playback_pcm_open,
2525 .prepare = stac92xx_playback_pcm_prepare,
2526 .cleanup = stac92xx_playback_pcm_cleanup
2527 },
2528};
2529
3cc08dc6
MP		 2530static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2531 .substreams = 1,
2532 .channels_min = 2,
2533 .channels_max = 2,
2534 .nid = 0x06, /* NID to query formats and rates */
2535 .ops = {
2536 .open = stac92xx_playback_pcm_open,
2537 .prepare = stac92xx_playback_pcm_prepare,
2538 .cleanup = stac92xx_playback_pcm_cleanup
2539 },
2540};
2541
2f2f4251 2542static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2543 .channels_min = 2,
2544 .channels_max = 2,
9e05b7a3 2545 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2546 .ops = {
2547 .prepare = stac92xx_capture_pcm_prepare,
2548 .cleanup = stac92xx_capture_pcm_cleanup
2549 },
2550};
2551
2552static int stac92xx_build_pcms(struct hda_codec *codec)
2553{
2554 struct sigmatel_spec *spec = codec->spec;
2555 struct hda_pcm *info = spec->pcm_rec;
2556
2557 codec->num_pcms = 1;
2558 codec->pcm_info = info;
2559
c7d4b2fa 2560 info->name = "STAC92xx Analog";
2f2f4251 2561 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2562 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2563 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2564 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2565
2566 if (spec->alt_switch) {
2567 codec->num_pcms++;
2568 info++;
2569 info->name = "STAC92xx Analog Alt";
2570 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2571 }
2f2f4251 2572
dabbed6f
M		 2573 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2574 codec->num_pcms++;
2575 info++;
2576 info->name = "STAC92xx Digital";
7ba72ba1 2577 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2578 if (spec->multiout.dig_out_nid) {
2579 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2580 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2581 }
2582 if (spec->dig_in_nid) {
2583 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2584 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2585 }
2586 }
2587
2f2f4251
M		 2588 return 0;
2589}
2590
c960a03b
TI		 2591static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2592{
2593 unsigned int pincap = snd_hda_param_read(codec, nid,
2594 AC_PAR_PIN_CAP);
2595 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2596 if (pincap & AC_PINCAP_VREF_100)
2597 return AC_PINCTL_VREF_100;
2598 if (pincap & AC_PINCAP_VREF_80)
2599 return AC_PINCTL_VREF_80;
2600 if (pincap & AC_PINCAP_VREF_50)
2601 return AC_PINCTL_VREF_50;
2602 if (pincap & AC_PINCAP_VREF_GRD)
2603 return AC_PINCTL_VREF_GRD;
2604 return 0;
2605}
2606
403d1944
MP		 2607static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2608
2609{
82beb8fd
TI		 2610 snd_hda_codec_write_cache(codec, nid, 0,
2611 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2612}
2613
7c2ba97b
MR		 2614#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2615
2616static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2617 struct snd_ctl_elem_value *ucontrol)
2618{
2619 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2620 struct sigmatel_spec *spec = codec->spec;
2621
d7a89436 2622 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2623 return 0;
2624}
2625
c6e4c666
TI		 2626static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2627 unsigned char type);
2628
7c2ba97b
MR		 2629static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2630 struct snd_ctl_elem_value *ucontrol)
2631{
2632 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2633 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2634 int nid = kcontrol->private_value;
2635
2636 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2637
2638 /* check to be sure that the ports are upto date with
2639 * switch changes
2640 */
c6e4c666 2641 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR		 2642
2643 return 1;
2644}
2645
a5ce8890 2646#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2647
2648static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2649{
2650 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2651 struct sigmatel_spec *spec = codec->spec;
2652 int io_idx = kcontrol-> private_value & 0xff;
2653
2654 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2655 return 0;
2656}
2657
2658static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2659{
2660 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2661 struct sigmatel_spec *spec = codec->spec;
2662 hda_nid_t nid = kcontrol->private_value >> 8;
2663 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2664 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2665
2666 spec->io_switch[io_idx] = val;
2667
2668 if (val)
2669 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2670 else {
2671 unsigned int pinctl = AC_PINCTL_IN_EN;
2672 if (io_idx) /* set VREF for mic */
2673 pinctl |= stac92xx_get_vref(codec, nid);
2674 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2675 }
40c1d308
JZ		 2676
2677 /* check the auto-mute again: we need to mute/unmute the speaker
2678 * appropriately according to the pin direction
2679 */
2680 if (spec->hp_detect)
c6e4c666 2681 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2682
403d1944
MP		 2683 return 1;
2684}
2685
0fb87bb4
ML		 2686#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2687
2688static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2689 struct snd_ctl_elem_value *ucontrol)
2690{
2691 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2692 struct sigmatel_spec *spec = codec->spec;
2693
2694 ucontrol->value.integer.value[0] = spec->clfe_swap;
2695 return 0;
2696}
2697
2698static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2699 struct snd_ctl_elem_value *ucontrol)
2700{
2701 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2702 struct sigmatel_spec *spec = codec->spec;
2703 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2704 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2705
68ea7b2f 2706 if (spec->clfe_swap == val)
0fb87bb4
ML		 2707 return 0;
2708
68ea7b2f 2709 spec->clfe_swap = val;
0fb87bb4
ML		 2710
2711 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2712 spec->clfe_swap ? 0x4 : 0x0);
2713
2714 return 1;
2715}
2716
7c2ba97b
MR		 2717#define STAC_CODEC_HP_SWITCH(xname) \
2718 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2719 .name = xname, \
2720 .index = 0, \
2721 .info = stac92xx_hp_switch_info, \
2722 .get = stac92xx_hp_switch_get, \
2723 .put = stac92xx_hp_switch_put, \
2724 }
2725
403d1944
MP		 2726#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2727 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2728 .name = xname, \
2729 .index = 0, \
2730 .info = stac92xx_io_switch_info, \
2731 .get = stac92xx_io_switch_get, \
2732 .put = stac92xx_io_switch_put, \
2733 .private_value = xpval, \
2734 }
2735
0fb87bb4
ML		 2736#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2737 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2738 .name = xname, \
2739 .index = 0, \
2740 .info = stac92xx_clfe_switch_info, \
2741 .get = stac92xx_clfe_switch_get, \
2742 .put = stac92xx_clfe_switch_put, \
2743 .private_value = xpval, \
2744 }
403d1944 2745
c7d4b2fa
M		 2746enum {
2747 STAC_CTL_WIDGET_VOL,
2748 STAC_CTL_WIDGET_MUTE,
09a99959 2749 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2750 STAC_CTL_WIDGET_AMP_MUX,
2751 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2752 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2753 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2754 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2755};
2756
c8b6bf9b 2757static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2758 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2759 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2760 STAC_MONO_MUX,
89385035
MR		 2761 STAC_AMP_MUX,
2762 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2763 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2764 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2765 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2766};
2767
2768/* add dynamic controls */
4d4e9bb3
TI		 2769static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2770 struct snd_kcontrol_new *ktemp,
2771 int idx, const char *name,
2772 unsigned long val)
c7d4b2fa 2773{
c8b6bf9b 2774 struct snd_kcontrol_new *knew;
c7d4b2fa 2775
603c4019
TI		 2776 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2777 knew = snd_array_new(&spec->kctls);
2778 if (!knew)
2779 return -ENOMEM;
4d4e9bb3 2780 *knew = *ktemp;
4682eee0 2781 knew->index = idx;
82fe0c58 2782 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2783 if (!knew->name)
c7d4b2fa
M		 2784 return -ENOMEM;
2785 knew->private_value = val;
c7d4b2fa
M		 2786 return 0;
2787}
2788
4d4e9bb3
TI		 2789static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2790 int type, int idx, const char *name,
2791 unsigned long val)
2792{
2793 return stac92xx_add_control_temp(spec,
2794 &stac92xx_control_templates[type],
2795 idx, name, val);
2796}
2797
4682eee0
MR		 2798
2799/* add dynamic controls */
4d4e9bb3
TI		 2800static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2801 const char *name, unsigned long val)
4682eee0
MR		 2802{
2803 return stac92xx_add_control_idx(spec, type, 0, name, val);
2804}
2805
403d1944
MP		 2806/* flag inputs as additional dynamic lineouts */
2807static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2808{
2809 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2810 unsigned int wcaps, wtype;
2811 int i, num_dacs = 0;
2812
2813 /* use the wcaps cache to count all DACs available for line-outs */
2814 for (i = 0; i < codec->num_nodes; i++) {
2815 wcaps = codec->wcaps[i];
2816 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2817
7b043899
SL		 2818 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2819 num_dacs++;
2820 }
403d1944 2821
7b043899
SL		 2822 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2823
403d1944
MP		 2824 switch (cfg->line_outs) {
2825 case 3:
2826 /* add line-in as side */
7b043899 2827 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2828 cfg->line_out_pins[cfg->line_outs] =
2829 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2830 spec->line_switch = 1;
2831 cfg->line_outs++;
2832 }
2833 break;
2834 case 2:
2835 /* add line-in as clfe and mic as side */
7b043899 2836 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2837 cfg->line_out_pins[cfg->line_outs] =
2838 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2839 spec->line_switch = 1;
2840 cfg->line_outs++;
2841 }
7b043899 2842 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2843 cfg->line_out_pins[cfg->line_outs] =
2844 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2845 spec->mic_switch = 1;
2846 cfg->line_outs++;
2847 }
2848 break;
2849 case 1:
2850 /* add line-in as surr and mic as clfe */
7b043899 2851 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2852 cfg->line_out_pins[cfg->line_outs] =
2853 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2854 spec->line_switch = 1;
2855 cfg->line_outs++;
2856 }
7b043899 2857 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2858 cfg->line_out_pins[cfg->line_outs] =
2859 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2860 spec->mic_switch = 1;
2861 cfg->line_outs++;
2862 }
2863 break;
2864 }
2865
2866 return 0;
2867}
2868
7b043899
SL		 2869
2870static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2871{
2872 int i;
2873
2874 for (i = 0; i < spec->multiout.num_dacs; i++) {
2875 if (spec->multiout.dac_nids[i] == nid)
2876 return 1;
2877 }
2878
2879 return 0;
2880}
2881
3cc08dc6 2882/*
7b043899
SL		 2883 * Fill in the dac_nids table from the parsed pin configuration
2884 * This function only works when every pin in line_out_pins[]
2885 * contains atleast one DAC in its connection list. Some 92xx
2886 * codecs are not connected directly to a DAC, such as the 9200
2887 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2888 */
19039bd0 2889static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2890 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2891{
2892 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2893 int i, j, conn_len = 0;
2894 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2895 unsigned int wcaps, wtype;
2896
c7d4b2fa
M		 2897 for (i = 0; i < cfg->line_outs; i++) {
2898 nid = cfg->line_out_pins[i];
7b043899
SL		 2899 conn_len = snd_hda_get_connections(codec, nid, conn,
2900 HDA_MAX_CONNECTIONS);
2901 for (j = 0; j < conn_len; j++) {
2902 wcaps = snd_hda_param_read(codec, conn[j],
2903 AC_PAR_AUDIO_WIDGET_CAP);
2904 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2905 if (wtype != AC_WID_AUD_OUT ||
2906 (wcaps & AC_WCAP_DIGITAL))
2907 continue;
2908 /* conn[j] is a DAC routed to this line-out */
2909 if (!is_in_dac_nids(spec, conn[j]))
2910 break;
2911 }
2912
2913 if (j == conn_len) {
df802952
TI		 2914 if (spec->multiout.num_dacs > 0) {
2915 /* we have already working output pins,
2916 * so let's drop the broken ones again
2917 */
2918 cfg->line_outs = spec->multiout.num_dacs;
2919 break;
2920 }
7b043899
SL		 2921 /* error out, no available DAC found */
2922 snd_printk(KERN_ERR
2923 "%s: No available DAC for pin 0x%x\n",
2924 __func__, nid);
2925 return -ENODEV;
2926 }
2927
2928 spec->multiout.dac_nids[i] = conn[j];
2929 spec->multiout.num_dacs++;
2930 if (conn_len > 1) {
2931 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2932 snd_hda_codec_write_cache(codec, nid, 0,
2933 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2934
7b043899
SL		 2935 }
2936 }
c7d4b2fa 2937
7b043899
SL		 2938 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2939 spec->multiout.num_dacs,
2940 spec->multiout.dac_nids[0],
2941 spec->multiout.dac_nids[1],
2942 spec->multiout.dac_nids[2],
2943 spec->multiout.dac_nids[3],
2944 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2945 return 0;
2946}
2947
eb06ed8f
TI		 2948/* create volume control/switch for the given prefx type */
2949static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2950{
2951 char name[32];
2952 int err;
2953
2954 sprintf(name, "%s Playback Volume", pfx);
2955 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2956 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2957 if (err < 0)
2958 return err;
2959 sprintf(name, "%s Playback Switch", pfx);
2960 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2961 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2962 if (err < 0)
2963 return err;
2964 return 0;
2965}
2966
ae0afd81
MR		 2967static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2968{
2969 if (!spec->multiout.hp_nid)
2970 spec->multiout.hp_nid = nid;
2971 else if (spec->multiout.num_dacs > 4) {
2972 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2973 return 1;
2974 } else {
2975 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2976 spec->multiout.num_dacs++;
2977 }
2978 return 0;
2979}
2980
2981static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2982{
2983 if (is_in_dac_nids(spec, nid))
2984 return 1;
2985 if (spec->multiout.hp_nid == nid)
2986 return 1;
2987 return 0;
2988}
2989
c7d4b2fa 2990/* add playback controls from the parsed DAC table */
0fb87bb4 2991static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2992 const struct auto_pin_cfg *cfg)
c7d4b2fa 2993{
19039bd0
TI		 2994 static const char *chname[4] = {
2995 "Front", "Surround", NULL /*CLFE*/, "Side"
2996 };
d21995e3 2997 hda_nid_t nid = 0;
c7d4b2fa
M		 2998 int i, err;
2999
0fb87bb4 3000 struct sigmatel_spec *spec = codec->spec;
b5895dc8 3001 unsigned int wid_caps, pincap;
0fb87bb4
ML		 3002
3003
40ac8c4f 3004 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 3005 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 3006 continue;
3007
3008 nid = spec->multiout.dac_nids[i];
3009
3010 if (i == 2) {
3011 /* Center/LFE */
eb06ed8f
TI		 3012 err = create_controls(spec, "Center", nid, 1);
3013 if (err < 0)
c7d4b2fa 3014 return err;
eb06ed8f
TI		 3015 err = create_controls(spec, "LFE", nid, 2);
3016 if (err < 0)
c7d4b2fa 3017 return err;
0fb87bb4
ML		 3018
3019 wid_caps = get_wcaps(codec, nid);
3020
3021 if (wid_caps & AC_WCAP_LR_SWAP) {
3022 err = stac92xx_add_control(spec,
3023 STAC_CTL_WIDGET_CLFE_SWITCH,
3024 "Swap Center/LFE Playback Switch", nid);
3025
3026 if (err < 0)
3027 return err;
3028 }
3029
c7d4b2fa 3030 } else {
eb06ed8f
TI		 3031 err = create_controls(spec, chname[i], nid, 3);
3032 if (err < 0)
c7d4b2fa
M		 3033 return err;
3034 }
3035 }
3036
fedb7569
MR		 3037 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
3038 cfg->hp_outs && !spec->multiout.hp_nid)
3039 spec->multiout.hp_nid = nid;
3040
a9cb5c90 3041 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3042 err = stac92xx_add_control(spec,
3043 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3044 "Headphone as Line Out Switch",
3045 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3046 if (err < 0)
3047 return err;
3048 }
3049
b5895dc8
MR		 3050 if (spec->line_switch) {
3051 nid = cfg->input_pins[AUTO_PIN_LINE];
3052 pincap = snd_hda_param_read(codec, nid,
3053 AC_PAR_PIN_CAP);
3054 if (pincap & AC_PINCAP_OUT) {
3055 err = stac92xx_add_control(spec,
3056 STAC_CTL_WIDGET_IO_SWITCH,
3057 "Line In as Output Switch", nid << 8);
3058 if (err < 0)
3059 return err;
3060 }
3061 }
403d1944 3062
b5895dc8 3063 if (spec->mic_switch) {
cace16f1 3064 unsigned int def_conf;
ae0afd81
MR		 3065 unsigned int mic_pin = AUTO_PIN_MIC;
3066again:
3067 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 3068 def_conf = snd_hda_codec_read(codec, nid, 0,
3069 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 3070 /* some laptops have an internal analog microphone
3071 * which can't be used as a output */
3072 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
3073 pincap = snd_hda_param_read(codec, nid,
3074 AC_PAR_PIN_CAP);
3075 if (pincap & AC_PINCAP_OUT) {
3076 err = stac92xx_add_control(spec,
3077 STAC_CTL_WIDGET_IO_SWITCH,
3078 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 3079 nid = snd_hda_codec_read(codec, nid, 0,
3080 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3081 if (!check_in_dac_nids(spec, nid))
3082 add_spec_dacs(spec, nid);
cace16f1
MR		 3083 if (err < 0)
3084 return err;
3085 }
ae0afd81
MR		 3086 } else if (mic_pin == AUTO_PIN_MIC) {
3087 mic_pin = AUTO_PIN_FRONT_MIC;
3088 goto again;
b5895dc8
MR		 3089 }
3090 }
403d1944 3091
c7d4b2fa
M		 3092 return 0;
3093}
3094
eb06ed8f
TI		 3095/* add playback controls for Speaker and HP outputs */
3096static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3097 struct auto_pin_cfg *cfg)
3098{
3099 struct sigmatel_spec *spec = codec->spec;
3100 hda_nid_t nid;
3101 int i, old_num_dacs, err;
3102
3103 old_num_dacs = spec->multiout.num_dacs;
3104 for (i = 0; i < cfg->hp_outs; i++) {
3105 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3106 if (wid_caps & AC_WCAP_UNSOL_CAP)
3107 spec->hp_detect = 1;
3108 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
3109 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3110 if (check_in_dac_nids(spec, nid))
3111 nid = 0;
3112 if (! nid)
c7d4b2fa 3113 continue;
eb06ed8f
TI		 3114 add_spec_dacs(spec, nid);
3115 }
3116 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 3117 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 3118 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3119 if (check_in_dac_nids(spec, nid))
3120 nid = 0;
eb06ed8f
TI		 3121 if (! nid)
3122 continue;
3123 add_spec_dacs(spec, nid);
c7d4b2fa 3124 }
1b290a51
MR		 3125 for (i = 0; i < cfg->line_outs; i++) {
3126 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
3127 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3128 if (check_in_dac_nids(spec, nid))
3129 nid = 0;
3130 if (! nid)
3131 continue;
3132 add_spec_dacs(spec, nid);
3133 }
eb06ed8f
TI		 3134 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
3135 static const char *pfxs[] = {
3136 "Speaker", "External Speaker", "Speaker2",
3137 };
3138 err = create_controls(spec, pfxs[i - old_num_dacs],
3139 spec->multiout.dac_nids[i], 3);
3140 if (err < 0)
3141 return err;
3142 }
3143 if (spec->multiout.hp_nid) {
2626a263
TI		 3144 err = create_controls(spec, "Headphone",
3145 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 3146 if (err < 0)
3147 return err;
3148 }
c7d4b2fa
M		 3149
3150 return 0;
3151}
3152
b22b4821 3153/* labels for mono mux outputs */
d0513fc6
MR		 3154static const char *stac92xx_mono_labels[4] = {
3155 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3156};
3157
3158/* create mono mux for mono out on capable codecs */
3159static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3160{
3161 struct sigmatel_spec *spec = codec->spec;
3162 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3163 int i, num_cons;
3164 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3165
3166 num_cons = snd_hda_get_connections(codec,
3167 spec->mono_nid,
3168 con_lst,
3169 HDA_MAX_NUM_INPUTS);
3170 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3171 return -EINVAL;
3172
3173 for (i = 0; i < num_cons; i++) {
3174 mono_mux->items[mono_mux->num_items].label =
3175 stac92xx_mono_labels[i];
3176 mono_mux->items[mono_mux->num_items].index = i;
3177 mono_mux->num_items++;
3178 }
09a99959
MR		 3179
3180 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3181 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3182}
3183
89385035
MR		 3184/* labels for amp mux outputs */
3185static const char *stac92xx_amp_labels[3] = {
4b33c767 3186 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3187};
3188
3189/* create amp out controls mux on capable codecs */
3190static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3191{
3192 struct sigmatel_spec *spec = codec->spec;
3193 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3194 int i, err;
3195
2a9c7816 3196 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3197 amp_mux->items[amp_mux->num_items].label =
3198 stac92xx_amp_labels[i];
3199 amp_mux->items[amp_mux->num_items].index = i;
3200 amp_mux->num_items++;
3201 }
3202
2a9c7816
MR		 3203 if (spec->num_amps > 1) {
3204 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3205 "Amp Selector Capture Switch", 0);
3206 if (err < 0)
3207 return err;
3208 }
89385035
MR		 3209 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3210 "Amp Capture Volume",
3211 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3212}
3213
3214
1cd2224c
MR		 3215/* create PC beep volume controls */
3216static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3217 hda_nid_t nid)
3218{
3219 struct sigmatel_spec *spec = codec->spec;
3220 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3221 int err;
3222
3223 /* check for mute support for the the amp */
3224 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3225 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3226 "PC Beep Playback Switch",
3227 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3228 if (err < 0)
3229 return err;
3230 }
3231
3232 /* check to see if there is volume support for the amp */
3233 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3234 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3235 "PC Beep Playback Volume",
3236 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3237 if (err < 0)
3238 return err;
3239 }
3240 return 0;
3241}
3242
4d4e9bb3
TI		 3243#ifdef CONFIG_SND_HDA_INPUT_BEEP
3244#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3245
3246static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3247 struct snd_ctl_elem_value *ucontrol)
3248{
3249 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3250 ucontrol->value.integer.value[0] = codec->beep->enabled;
3251 return 0;
3252}
3253
3254static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3255 struct snd_ctl_elem_value *ucontrol)
3256{
3257 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3258 int enabled = !!ucontrol->value.integer.value[0];
3259 if (codec->beep->enabled != enabled) {
3260 codec->beep->enabled = enabled;
3261 return 1;
3262 }
3263 return 0;
3264}
3265
3266static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3267 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3268 .info = stac92xx_dig_beep_switch_info,
3269 .get = stac92xx_dig_beep_switch_get,
3270 .put = stac92xx_dig_beep_switch_put,
3271};
3272
3273static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3274{
3275 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3276 0, "PC Beep Playback Switch", 0);
3277}
3278#endif
3279
4682eee0
MR		 3280static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3281{
3282 struct sigmatel_spec *spec = codec->spec;
3283 int wcaps, nid, i, err = 0;
3284
3285 for (i = 0; i < spec->num_muxes; i++) {
3286 nid = spec->mux_nids[i];
3287 wcaps = get_wcaps(codec, nid);
3288
3289 if (wcaps & AC_WCAP_OUT_AMP) {
3290 err = stac92xx_add_control_idx(spec,
3291 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3292 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3293 if (err < 0)
3294 return err;
3295 }
3296 }
3297 return 0;
3298};
3299
d9737751 3300static const char *stac92xx_spdif_labels[3] = {
65973632 3301 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3302};
3303
3304static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3305{
3306 struct sigmatel_spec *spec = codec->spec;
3307 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3308 const char **labels = spec->spdif_labels;
d9737751 3309 int i, num_cons;
65973632 3310 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3311
3312 num_cons = snd_hda_get_connections(codec,
3313 spec->smux_nids[0],
3314 con_lst,
3315 HDA_MAX_NUM_INPUTS);
65973632 3316 if (!num_cons)
d9737751
MR		 3317 return -EINVAL;
3318
65973632
MR		 3319 if (!labels)
3320 labels = stac92xx_spdif_labels;
3321
d9737751 3322 for (i = 0; i < num_cons; i++) {
65973632 3323 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3324 spdif_mux->items[spdif_mux->num_items].index = i;
3325 spdif_mux->num_items++;
3326 }
3327
3328 return 0;
3329}
3330
8b65727b 3331/* labels for dmic mux inputs */
ddc2cec4 3332static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3333 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3334 "Digital Mic 3", "Digital Mic 4"
3335};
3336
3337/* create playback/capture controls for input pins on dmic capable codecs */
3338static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3339 const struct auto_pin_cfg *cfg)
3340{
3341 struct sigmatel_spec *spec = codec->spec;
3342 struct hda_input_mux *dimux = &spec->private_dimux;
3343 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3344 int err, i, j;
3345 char name[32];
8b65727b
MP		 3346
3347 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3348 dimux->items[dimux->num_items].index = 0;
3349 dimux->num_items++;
3350
3351 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3352 hda_nid_t nid;
8b65727b
MP		 3353 int index;
3354 int num_cons;
0678accd 3355 unsigned int wcaps;
8b65727b
MP		 3356 unsigned int def_conf;
3357
3358 def_conf = snd_hda_codec_read(codec,
3359 spec->dmic_nids[i],
3360 0,
3361 AC_VERB_GET_CONFIG_DEFAULT,
3362 0);
3363 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3364 continue;
3365
0678accd 3366 nid = spec->dmic_nids[i];
8b65727b 3367 num_cons = snd_hda_get_connections(codec,
e1f0d669 3368 spec->dmux_nids[0],
8b65727b
MP		 3369 con_lst,
3370 HDA_MAX_NUM_INPUTS);
3371 for (j = 0; j < num_cons; j++)
0678accd 3372 if (con_lst[j] == nid) {
8b65727b
MP		 3373 index = j;
3374 goto found;
3375 }
3376 continue;
3377found:
d0513fc6
MR		 3378 wcaps = get_wcaps(codec, nid) &
3379 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3380
d0513fc6 3381 if (wcaps) {
0678accd
MR		 3382 sprintf(name, "%s Capture Volume",
3383 stac92xx_dmic_labels[dimux->num_items]);
3384
3385 err = stac92xx_add_control(spec,
3386 STAC_CTL_WIDGET_VOL,
3387 name,
d0513fc6
MR		 3388 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3389 (wcaps & AC_WCAP_OUT_AMP) ?
3390 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3391 if (err < 0)
3392 return err;
3393 }
3394
8b65727b
MP		 3395 dimux->items[dimux->num_items].label =
3396 stac92xx_dmic_labels[dimux->num_items];
3397 dimux->items[dimux->num_items].index = index;
3398 dimux->num_items++;
3399 }
3400
3401 return 0;
3402}
3403
c7d4b2fa
M		 3404/* create playback/capture controls for input pins */
3405static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3406{
3407 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3408 struct hda_input_mux *imux = &spec->private_imux;
3409 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3410 int i, j, k;
3411
3412 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3413 int index;
3414
3415 if (!cfg->input_pins[i])
3416 continue;
3417 index = -1;
3418 for (j = 0; j < spec->num_muxes; j++) {
3419 int num_cons;
3420 num_cons = snd_hda_get_connections(codec,
3421 spec->mux_nids[j],
3422 con_lst,
3423 HDA_MAX_NUM_INPUTS);
3424 for (k = 0; k < num_cons; k++)
3425 if (con_lst[k] == cfg->input_pins[i]) {
3426 index = k;
3427 goto found;
3428 }
c7d4b2fa 3429 }
314634bc
TI		 3430 continue;
3431 found:
3432 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3433 imux->items[imux->num_items].index = index;
3434 imux->num_items++;
c7d4b2fa
M		 3435 }
3436
7b043899 3437 if (imux->num_items) {
62fe78e9
SR		 3438 /*
3439 * Set the current input for the muxes.
3440 * The STAC9221 has two input muxes with identical source
3441 * NID lists. Hopefully this won't get confused.
3442 */
3443 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3444 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3445 AC_VERB_SET_CONNECT_SEL,
3446 imux->items[0].index);
62fe78e9
SR		 3447 }
3448 }
3449
c7d4b2fa
M		 3450 return 0;
3451}
3452
c7d4b2fa
M		 3453static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3454{
3455 struct sigmatel_spec *spec = codec->spec;
3456 int i;
3457
3458 for (i = 0; i < spec->autocfg.line_outs; i++) {
3459 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3460 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3461 }
3462}
3463
3464static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3465{
3466 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3467 int i;
c7d4b2fa 3468
eb06ed8f
TI		 3469 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3470 hda_nid_t pin;
3471 pin = spec->autocfg.hp_pins[i];
3472 if (pin) /* connect to front */
3473 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3474 }
3475 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3476 hda_nid_t pin;
3477 pin = spec->autocfg.speaker_pins[i];
3478 if (pin) /* connect to front */
3479 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3480 }
c7d4b2fa
M		 3481}
3482
3cc08dc6 3483static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3484{
3485 struct sigmatel_spec *spec = codec->spec;
3486 int err;
bcecd9bd 3487 int hp_speaker_swap = 0;
c7d4b2fa 3488
8b65727b
MP		 3489 if ((err = snd_hda_parse_pin_def_config(codec,
3490 &spec->autocfg,
3491 spec->dmic_nids)) < 0)
c7d4b2fa 3492 return err;
82bc955f 3493 if (! spec->autocfg.line_outs)
869264c4 3494 return 0; /* can't find valid pin config */
19039bd0 3495
bcecd9bd
JZ		 3496 /* If we have no real line-out pin and multiple hp-outs, HPs should
3497 * be set up as multi-channel outputs.
3498 */
3499 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3500 spec->autocfg.hp_outs > 1) {
3501 /* Copy hp_outs to line_outs, backup line_outs in
3502 * speaker_outs so that the following routines can handle
3503 * HP pins as primary outputs.
3504 */
3505 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3506 sizeof(spec->autocfg.line_out_pins));
3507 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3508 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3509 sizeof(spec->autocfg.hp_pins));
3510 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3511 hp_speaker_swap = 1;
3512 }
09a99959 3513 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3514 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3515 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3516 u32 caps = query_amp_caps(codec,
3517 spec->autocfg.mono_out_pin, dir);
3518 hda_nid_t conn_list[1];
3519
3520 /* get the mixer node and then the mono mux if it exists */
3521 if (snd_hda_get_connections(codec,
3522 spec->autocfg.mono_out_pin, conn_list, 1) &&
3523 snd_hda_get_connections(codec, conn_list[0],
3524 conn_list, 1)) {
3525
3526 int wcaps = get_wcaps(codec, conn_list[0]);
3527 int wid_type = (wcaps & AC_WCAP_TYPE)
3528 >> AC_WCAP_TYPE_SHIFT;
3529 /* LR swap check, some stac925x have a mux that
3530 * changes the DACs output path instead of the
3531 * mono-mux path.
3532 */
3533 if (wid_type == AC_WID_AUD_SEL &&
3534 !(wcaps & AC_WCAP_LR_SWAP))
3535 spec->mono_nid = conn_list[0];
3536 }
d0513fc6
MR		 3537 if (dir) {
3538 hda_nid_t nid = spec->autocfg.mono_out_pin;
3539
3540 /* most mono outs have a least a mute/unmute switch */
3541 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3542 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3543 "Mono Playback Switch",
3544 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3545 if (err < 0)
3546 return err;
d0513fc6
MR		 3547 /* check for volume support for the amp */
3548 if ((caps & AC_AMPCAP_NUM_STEPS)
3549 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3550 err = stac92xx_add_control(spec,
3551 STAC_CTL_WIDGET_VOL,
3552 "Mono Playback Volume",
3553 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3554 if (err < 0)
3555 return err;
3556 }
09a99959
MR		 3557 }
3558
3559 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3560 AC_PINCTL_OUT_EN);
3561 }
bcecd9bd 3562
403d1944
MP		 3563 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3564 return err;
19039bd0
TI		 3565 if (spec->multiout.num_dacs == 0)
3566 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3567 return err;
c7d4b2fa 3568
0fb87bb4
ML		 3569 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3570
3571 if (err < 0)
3572 return err;
3573
1cd2224c
MR		 3574 /* setup analog beep controls */
3575 if (spec->anabeep_nid > 0) {
3576 err = stac92xx_auto_create_beep_ctls(codec,
3577 spec->anabeep_nid);
3578 if (err < 0)
3579 return err;
3580 }
3581
3582 /* setup digital beep controls and input device */
3583#ifdef CONFIG_SND_HDA_INPUT_BEEP
3584 if (spec->digbeep_nid > 0) {
3585 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3586 unsigned int caps;
1cd2224c
MR		 3587
3588 err = stac92xx_auto_create_beep_ctls(codec, nid);
3589 if (err < 0)
3590 return err;
3591 err = snd_hda_attach_beep_device(codec, nid);
3592 if (err < 0)
3593 return err;
4d4e9bb3
TI		 3594 /* if no beep switch is available, make its own one */
3595 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3596 if (codec->beep &&
3597 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3598 err = stac92xx_beep_switch_ctl(codec);
3599 if (err < 0)
3600 return err;
3601 }
1cd2224c
MR		 3602 }
3603#endif
3604
bcecd9bd
JZ		 3605 if (hp_speaker_swap == 1) {
3606 /* Restore the hp_outs and line_outs */
3607 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3608 sizeof(spec->autocfg.line_out_pins));
3609 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3610 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3611 sizeof(spec->autocfg.speaker_pins));
3612 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3613 memset(spec->autocfg.speaker_pins, 0,
3614 sizeof(spec->autocfg.speaker_pins));
3615 spec->autocfg.speaker_outs = 0;
3616 }
3617
0fb87bb4
ML		 3618 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3619
3620 if (err < 0)
3621 return err;
3622
3623 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3624
3625 if (err < 0)
c7d4b2fa
M		 3626 return err;
3627
b22b4821
MR		 3628 if (spec->mono_nid > 0) {
3629 err = stac92xx_auto_create_mono_output_ctls(codec);
3630 if (err < 0)
3631 return err;
3632 }
2a9c7816 3633 if (spec->num_amps > 0) {
89385035
MR		 3634 err = stac92xx_auto_create_amp_output_ctls(codec);
3635 if (err < 0)
3636 return err;
3637 }
2a9c7816 3638 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3639 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3640 &spec->autocfg)) < 0)
3641 return err;
4682eee0
MR		 3642 if (spec->num_muxes > 0) {
3643 err = stac92xx_auto_create_mux_input_ctls(codec);
3644 if (err < 0)
3645 return err;
3646 }
d9737751
MR		 3647 if (spec->num_smuxes > 0) {
3648 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3649 if (err < 0)
3650 return err;
3651 }
8b65727b 3652
c7d4b2fa 3653 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3654 if (spec->multiout.max_channels > 2)
c7d4b2fa 3655 spec->surr_switch = 1;
c7d4b2fa 3656
82bc955f 3657 if (spec->autocfg.dig_out_pin)
3cc08dc6 3658 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3659 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3660 spec->dig_in_nid = dig_in;
c7d4b2fa 3661
603c4019
TI		 3662 if (spec->kctls.list)
3663 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3664
3665 spec->input_mux = &spec->private_imux;
2a9c7816 3666 spec->dinput_mux = &spec->private_dimux;
d9737751 3667 spec->sinput_mux = &spec->private_smux;
b22b4821 3668 spec->mono_mux = &spec->private_mono_mux;
89385035 3669 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3670 return 1;
3671}
3672
82bc955f
TI		 3673/* add playback controls for HP output */
3674static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3675 struct auto_pin_cfg *cfg)
3676{
3677 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3678 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3679 unsigned int wid_caps;
3680
3681 if (! pin)
3682 return 0;
3683
3684 wid_caps = get_wcaps(codec, pin);
505cb341 3685 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3686 spec->hp_detect = 1;
82bc955f
TI		 3687
3688 return 0;
3689}
3690
160ea0dc
RF		 3691/* add playback controls for LFE output */
3692static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3693 struct auto_pin_cfg *cfg)
3694{
3695 struct sigmatel_spec *spec = codec->spec;
3696 int err;
3697 hda_nid_t lfe_pin = 0x0;
3698 int i;
3699
3700 /*
3701 * search speaker outs and line outs for a mono speaker pin
3702 * with an amp. If one is found, add LFE controls
3703 * for it.
3704 */
3705 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3706 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3707 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3708 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3709 if (wcaps == AC_WCAP_OUT_AMP)
3710 /* found a mono speaker with an amp, must be lfe */
3711 lfe_pin = pin;
3712 }
3713
3714 /* if speaker_outs is 0, then speakers may be in line_outs */
3715 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3716 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3717 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3718 unsigned int defcfg;
8b551785 3719 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3720 AC_VERB_GET_CONFIG_DEFAULT,
3721 0x00);
8b551785 3722 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3723 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3724 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3725 if (wcaps == AC_WCAP_OUT_AMP)
3726 /* found a mono speaker with an amp,
3727 must be lfe */
3728 lfe_pin = pin;
3729 }
3730 }
3731 }
3732
3733 if (lfe_pin) {
eb06ed8f 3734 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3735 if (err < 0)
3736 return err;
3737 }
3738
3739 return 0;
3740}
3741
c7d4b2fa
M		 3742static int stac9200_parse_auto_config(struct hda_codec *codec)
3743{
3744 struct sigmatel_spec *spec = codec->spec;
3745 int err;
3746
df694daa 3747 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3748 return err;
3749
3750 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3751 return err;
3752
82bc955f
TI		 3753 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3754 return err;
3755
160ea0dc
RF		 3756 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3757 return err;
3758
355a0ec4
TI		 3759 if (spec->num_muxes > 0) {
3760 err = stac92xx_auto_create_mux_input_ctls(codec);
3761 if (err < 0)
3762 return err;
3763 }
3764
82bc955f 3765 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3766 spec->multiout.dig_out_nid = 0x05;
82bc955f 3767 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3768 spec->dig_in_nid = 0x04;
c7d4b2fa 3769
603c4019
TI		 3770 if (spec->kctls.list)
3771 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3772
3773 spec->input_mux = &spec->private_imux;
8b65727b 3774 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3775
3776 return 1;
3777}
3778
62fe78e9
SR		 3779/*
3780 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3781 * funky external mute control using GPIO pins.
3782 */
3783
76e1ddfb 3784static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3785 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3786{
3787 unsigned int gpiostate, gpiomask, gpiodir;
3788
3789 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3790 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3791 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3792
3793 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3794 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3795 gpiomask |= mask;
62fe78e9
SR		 3796
3797 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3798 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3799 gpiodir |= dir_mask;
62fe78e9 3800
76e1ddfb 3801 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3802 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3803
3804 snd_hda_codec_write(codec, codec->afg, 0,
3805 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3806 snd_hda_codec_read(codec, codec->afg, 0,
3807 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3808
3809 msleep(1);
3810
76e1ddfb
TI		 3811 snd_hda_codec_read(codec, codec->afg, 0,
3812 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3813}
3814
74aeaabc
MR		 3815static int stac92xx_add_jack(struct hda_codec *codec,
3816 hda_nid_t nid, int type)
3817{
e4973e1e 3818#ifdef CONFIG_SND_JACK
74aeaabc
MR		 3819 struct sigmatel_spec *spec = codec->spec;
3820 struct sigmatel_jack *jack;
3821 int def_conf = snd_hda_codec_read(codec, nid,
3822 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3823 int connectivity = get_defcfg_connect(def_conf);
3824 char name[32];
3825
3826 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3827 return 0;
3828
3829 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3830 jack = snd_array_new(&spec->jacks);
3831 if (!jack)
3832 return -ENOMEM;
3833 jack->nid = nid;
3834 jack->type = type;
3835
3836 sprintf(name, "%s at %s %s Jack",
3837 snd_hda_get_jack_type(def_conf),
3838 snd_hda_get_jack_connectivity(def_conf),
3839 snd_hda_get_jack_location(def_conf));
3840
3841 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI		 3842#else
3843 return 0;
3844#endif
74aeaabc
MR		 3845}
3846
c6e4c666
TI		 3847static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3848 unsigned char type, int data)
74aeaabc
MR		 3849{
3850 struct sigmatel_event *event;
3851
3852 snd_array_init(&spec->events, sizeof(*event), 32);
3853 event = snd_array_new(&spec->events);
3854 if (!event)
3855 return -ENOMEM;
3856 event->nid = nid;
c6e4c666
TI		 3857 event->type = type;
3858 event->tag = spec->events.used;
74aeaabc
MR		 3859 event->data = data;
3860
c6e4c666 3861 return event->tag;
74aeaabc
MR		 3862}
3863
c6e4c666
TI		 3864static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3865 hda_nid_t nid, unsigned char type)
74aeaabc
MR		 3866{
3867 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 3868 struct sigmatel_event *event = spec->events.list;
3869 int i;
3870
3871 for (i = 0; i < spec->events.used; i++, event++) {
3872 if (event->nid == nid && event->type == type)
3873 return event;
74aeaabc 3874 }
c6e4c666 3875 return NULL;
74aeaabc
MR		 3876}
3877
c6e4c666
TI		 3878static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3879 unsigned char tag)
314634bc 3880{
c6e4c666
TI		 3881 struct sigmatel_spec *spec = codec->spec;
3882 struct sigmatel_event *event = spec->events.list;
3883 int i;
3884
3885 for (i = 0; i < spec->events.used; i++, event++) {
3886 if (event->tag == tag)
3887 return event;
74aeaabc 3888 }
c6e4c666
TI		 3889 return NULL;
3890}
3891
3892static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3893 unsigned int type)
3894{
3895 struct sigmatel_event *event;
3896 int tag;
3897
3898 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3899 return;
3900 event = stac_get_event(codec, nid, type);
3901 if (event)
3902 tag = event->tag;
3903 else
3904 tag = stac_add_event(codec->spec, nid, type, 0);
3905 if (tag < 0)
3906 return;
3907 snd_hda_codec_write_cache(codec, nid, 0,
3908 AC_VERB_SET_UNSOLICITED_ENABLE,
3909 AC_USRSP_EN | tag);
314634bc
TI		 3910}
3911
a64135a2
MR		 3912static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3913{
3914 int i;
3915 for (i = 0; i < cfg->hp_outs; i++)
3916 if (cfg->hp_pins[i] == nid)
3917 return 1; /* nid is a HP-Out */
3918
3919 return 0; /* nid is not a HP-Out */
3920};
3921
b76c850f
MR		 3922static void stac92xx_power_down(struct hda_codec *codec)
3923{
3924 struct sigmatel_spec *spec = codec->spec;
3925
3926 /* power down inactive DACs */
3927 hda_nid_t *dac;
3928 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3929 if (!is_in_dac_nids(spec, *dac) &&
3930 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3931 snd_hda_codec_write_cache(codec, *dac, 0,
3932 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3933}
3934
f73d3585
TI		 3935static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3936 int enable);
3937
c7d4b2fa
M		 3938static int stac92xx_init(struct hda_codec *codec)
3939{
3940 struct sigmatel_spec *spec = codec->spec;
82bc955f 3941 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3942 unsigned int gpio;
e4973e1e 3943 int i;
c7d4b2fa 3944
c7d4b2fa
M		 3945 snd_hda_sequence_write(codec, spec->init);
3946
8daaaa97
MR		 3947 /* power down adcs initially */
3948 if (spec->powerdown_adcs)
3949 for (i = 0; i < spec->num_adcs; i++)
3950 snd_hda_codec_write_cache(codec,
3951 spec->adc_nids[i], 0,
3952 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI		 3953
3954 /* set up GPIO */
3955 gpio = spec->gpio_data;
3956 /* turn on EAPD statically when spec->eapd_switch isn't set.
3957 * otherwise, unsol event will turn it on/off dynamically
3958 */
3959 if (!spec->eapd_switch)
3960 gpio |= spec->eapd_mask;
3961 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3962
82bc955f
TI		 3963 /* set up pins */
3964 if (spec->hp_detect) {
505cb341 3965 /* Enable unsolicited responses on the HP widget */
74aeaabc 3966 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 3967 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 3968 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 3969 }
0a07acaf
TI		 3970 /* force to enable the first line-out; the others are set up
3971 * in unsol_event
3972 */
3973 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3974 AC_PINCTL_OUT_EN);
82bc955f 3975 /* fake event to set up pins */
c6e4c666
TI		 3976 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
3977 STAC_HP_EVENT);
82bc955f
TI		 3978 } else {
3979 stac92xx_auto_init_multi_out(codec);
3980 stac92xx_auto_init_hp_out(codec);
3981 }
3982 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3983 hda_nid_t nid = cfg->input_pins[i];
3984 if (nid) {
4f1e6bc3
TI		 3985 unsigned int pinctl;
3986 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3987 /* for mic pins, force to initialize */
3988 pinctl = stac92xx_get_vref(codec, nid);
3989 } else {
3990 pinctl = snd_hda_codec_read(codec, nid, 0,
3991 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3992 /* if PINCTL already set then skip */
3993 if (pinctl & AC_PINCTL_IN_EN)
3994 continue;
3995 }
3996 pinctl |= AC_PINCTL_IN_EN;
c960a03b 3997 stac92xx_auto_set_pinctl(codec, nid, pinctl);
c6e4c666 3998 enable_pin_detect(codec, nid, STAC_INSERT_EVENT);
c960a03b 3999 }
82bc955f 4000 }
a64135a2
MR		 4001 for (i = 0; i < spec->num_dmics; i++)
4002 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4003 AC_PINCTL_IN_EN);
f73d3585
TI		 4004 if (cfg->dig_out_pin)
4005 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
4006 AC_PINCTL_OUT_EN);
4007 if (cfg->dig_in_pin)
4008 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4009 AC_PINCTL_IN_EN);
a64135a2 4010 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4011 hda_nid_t nid = spec->pwr_nids[i];
4012 int pinctl, def_conf;
f73d3585
TI		 4013
4014 if (is_nid_hp_pin(cfg, nid) && spec->hp_detect)
4015 continue; /* already has an unsol event */
4016
4017 pinctl = snd_hda_codec_read(codec, nid, 0,
4018 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4019 /* outputs are only ports capable of power management
4020 * any attempts on powering down a input port cause the
4021 * referenced VREF to act quirky.
4022 */
4023 if (pinctl & AC_PINCTL_IN_EN)
4024 continue;
f73d3585
TI		 4025 def_conf = snd_hda_codec_read(codec, nid, 0,
4026 AC_VERB_GET_CONFIG_DEFAULT, 0);
4027 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4028 /* skip any ports that don't have jacks since presence
4029 * detection is useless */
f73d3585
TI		 4030 if (def_conf != AC_JACK_PORT_COMPLEX) {
4031 if (def_conf != AC_JACK_PORT_NONE)
4032 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4033 continue;
f73d3585 4034 }
c6e4c666
TI		 4035 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4036 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
a64135a2 4037 }
b76c850f
MR		 4038 if (spec->dac_list)
4039 stac92xx_power_down(codec);
c7d4b2fa
M		 4040 return 0;
4041}
4042
74aeaabc
MR		 4043static void stac92xx_free_jacks(struct hda_codec *codec)
4044{
e4973e1e 4045#ifdef CONFIG_SND_JACK
b94d3539 4046 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4047 struct sigmatel_spec *spec = codec->spec;
b94d3539 4048 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 4049 struct sigmatel_jack *jacks = spec->jacks.list;
4050 int i;
4051 for (i = 0; i < spec->jacks.used; i++)
4052 snd_device_free(codec->bus->card, &jacks[i].jack);
4053 }
4054 snd_array_free(&spec->jacks);
e4973e1e 4055#endif
74aeaabc
MR		 4056}
4057
603c4019
TI		 4058static void stac92xx_free_kctls(struct hda_codec *codec)
4059{
4060 struct sigmatel_spec *spec = codec->spec;
4061
4062 if (spec->kctls.list) {
4063 struct snd_kcontrol_new *kctl = spec->kctls.list;
4064 int i;
4065 for (i = 0; i < spec->kctls.used; i++)
4066 kfree(kctl[i].name);
4067 }
4068 snd_array_free(&spec->kctls);
4069}
4070
2f2f4251
M		 4071static void stac92xx_free(struct hda_codec *codec)
4072{
c7d4b2fa 4073 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4074
4075 if (! spec)
4076 return;
4077
af9f341a 4078 kfree(spec->pin_configs);
74aeaabc
MR		 4079 stac92xx_free_jacks(codec);
4080 snd_array_free(&spec->events);
11b44bbd 4081
c7d4b2fa 4082 kfree(spec);
1cd2224c 4083 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4084}
4085
4e55096e
M		 4086static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4087 unsigned int flag)
4088{
4089 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4090 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4091
f9acba43
TI		 4092 if (pin_ctl & AC_PINCTL_IN_EN) {
4093 /*
4094 * we need to check the current set-up direction of
4095 * shared input pins since they can be switched via
4096 * "xxx as Output" mixer switch
4097 */
4098 struct sigmatel_spec *spec = codec->spec;
4099 struct auto_pin_cfg *cfg = &spec->autocfg;
4100 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
4101 spec->line_switch) ||
4102 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
4103 spec->mic_switch))
4104 return;
4105 }
4106
7b043899
SL		 4107 /* if setting pin direction bits, clear the current
4108 direction bits first */
4109 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4110 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4111
82beb8fd 4112 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4113 AC_VERB_SET_PIN_WIDGET_CONTROL,
4114 pin_ctl | flag);
4115}
4116
4117static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4118 unsigned int flag)
4119{
4120 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4121 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 4122 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4123 AC_VERB_SET_PIN_WIDGET_CONTROL,
4124 pin_ctl & ~flag);
4125}
4126
40c1d308 4127static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4128{
4129 if (!nid)
4130 return 0;
4131 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 4132 & (1 << 31)) {
4133 unsigned int pinctl;
4134 pinctl = snd_hda_codec_read(codec, nid, 0,
4135 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4136 if (pinctl & AC_PINCTL_IN_EN)
4137 return 0; /* mic- or line-input */
4138 else
4139 return 1; /* HP-output */
4140 }
314634bc
TI		 4141 return 0;
4142}
4143
d7a89436
TI		 4144/* return non-zero if the hp-pin of the given array index isn't
4145 * a jack-detection target
4146 */
4147static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4148{
4149 struct auto_pin_cfg *cfg = &spec->autocfg;
4150
4151 /* ignore sensing of shared line and mic jacks */
4152 if (spec->line_switch &&
4153 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_LINE])
4154 return 1;
4155 if (spec->mic_switch &&
4156 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_MIC])
4157 return 1;
4158 /* ignore if the pin is set as line-out */
4159 if (cfg->hp_pins[i] == spec->hp_switch)
4160 return 1;
4161 return 0;
4162}
4163
c6e4c666 4164static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4165{
4166 struct sigmatel_spec *spec = codec->spec;
4167 struct auto_pin_cfg *cfg = &spec->autocfg;
4168 int i, presence;
4169
eb06ed8f 4170 presence = 0;
4fe5195c
MR		 4171 if (spec->gpio_mute)
4172 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4173 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4174
eb06ed8f 4175 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4176 if (presence)
4177 break;
d7a89436
TI		 4178 if (no_hp_sensing(spec, i))
4179 continue;
4fe5195c 4180 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 4181 }
4e55096e
M		 4182
4183 if (presence) {
d7a89436 4184 /* disable lineouts */
7c2ba97b 4185 if (spec->hp_switch)
d7a89436
TI		 4186 stac92xx_reset_pinctl(codec, spec->hp_switch,
4187 AC_PINCTL_OUT_EN);
4e55096e
M		 4188 for (i = 0; i < cfg->line_outs; i++)
4189 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4190 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4191 for (i = 0; i < cfg->speaker_outs; i++)
4192 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4193 AC_PINCTL_OUT_EN);
c0cea0d0 4194 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4195 stac_gpio_set(codec, spec->gpio_mask,
4196 spec->gpio_dir, spec->gpio_data &
4197 ~spec->eapd_mask);
4e55096e 4198 } else {
d7a89436 4199 /* enable lineouts */
7c2ba97b 4200 if (spec->hp_switch)
d7a89436
TI		 4201 stac92xx_set_pinctl(codec, spec->hp_switch,
4202 AC_PINCTL_OUT_EN);
4e55096e
M		 4203 for (i = 0; i < cfg->line_outs; i++)
4204 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4205 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4206 for (i = 0; i < cfg->speaker_outs; i++)
4207 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4208 AC_PINCTL_OUT_EN);
c0cea0d0 4209 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4210 stac_gpio_set(codec, spec->gpio_mask,
4211 spec->gpio_dir, spec->gpio_data |
4212 spec->eapd_mask);
4e55096e 4213 }
d7a89436
TI		 4214 /* toggle hp outs */
4215 for (i = 0; i < cfg->hp_outs; i++) {
4216 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4217 if (no_hp_sensing(spec, i))
4218 continue;
4219 if (presence)
4220 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
4221 else
4222 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
4223 }
4e55096e
M		 4224}
4225
f73d3585
TI		 4226static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4227 int enable)
a64135a2
MR		 4228{
4229 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4230 unsigned int idx, val;
4231
4232 for (idx = 0; idx < spec->num_pwrs; idx++) {
4233 if (spec->pwr_nids[idx] == nid)
4234 break;
4235 }
4236 if (idx >= spec->num_pwrs)
4237 return;
d0513fc6
MR		 4238
4239 /* several codecs have two power down bits */
4240 if (spec->pwr_mapping)
4241 idx = spec->pwr_mapping[idx];
4242 else
4243 idx = 1 << idx;
a64135a2 4244
f73d3585
TI		 4245 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4246 if (enable)
a64135a2
MR		 4247 val &= ~idx;
4248 else
4249 val |= idx;
4250
4251 /* power down unused output ports */
4252 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4253}
4254
f73d3585
TI		 4255static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4256{
4257 stac_toggle_power_map(codec, nid, get_hp_pin_presence(codec, nid));
4258}
a64135a2 4259
74aeaabc
MR		 4260static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4261{
4262 struct sigmatel_spec *spec = codec->spec;
4263 struct sigmatel_jack *jacks = spec->jacks.list;
4264
4265 if (jacks) {
4266 int i;
4267 for (i = 0; i < spec->jacks.used; i++) {
4268 if (jacks->nid == nid) {
4269 unsigned int pin_ctl =
4270 snd_hda_codec_read(codec, nid,
4271 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4272 0x00);
4273 int type = jacks->type;
4274 if (type == (SND_JACK_LINEOUT
4275 | SND_JACK_HEADPHONE))
4276 type = (pin_ctl & AC_PINCTL_HP_EN)
4277 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4278 snd_jack_report(jacks->jack,
4279 get_hp_pin_presence(codec, nid)
4280 ? type : 0);
4281 }
4282 jacks++;
4283 }
4284 }
4285}
a64135a2 4286
c6e4c666
TI		 4287static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4288 unsigned char type)
4289{
4290 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4291 if (!event)
4292 return;
4293 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4294}
4295
314634bc
TI		 4296static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4297{
a64135a2 4298 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4299 struct sigmatel_event *event;
4300 int tag, data;
a64135a2 4301
c6e4c666
TI		 4302 tag = (res >> 26) & 0x7f;
4303 event = stac_get_event_from_tag(codec, tag);
4304 if (!event)
4305 return;
4306
4307 switch (event->type) {
314634bc 4308 case STAC_HP_EVENT:
c6e4c666 4309 stac92xx_hp_detect(codec);
a64135a2 4310 /* fallthru */
74aeaabc 4311 case STAC_INSERT_EVENT:
a64135a2 4312 case STAC_PWR_EVENT:
c6e4c666
TI		 4313 if (spec->num_pwrs > 0)
4314 stac92xx_pin_sense(codec, event->nid);
4315 stac92xx_report_jack(codec, event->nid);
72474be6 4316 break;
c6e4c666
TI		 4317 case STAC_VREF_EVENT:
4318 data = snd_hda_codec_read(codec, codec->afg, 0,
4319 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4320 /* toggle VREF state based on GPIOx status */
4321 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4322 !!(data & (1 << event->data)));
72474be6 4323 break;
314634bc
TI		 4324 }
4325}
4326
cb53c626 4327#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4328static int stac92xx_resume(struct hda_codec *codec)
4329{
dc81bed1
TI		 4330 struct sigmatel_spec *spec = codec->spec;
4331
11b44bbd 4332 stac92xx_set_config_regs(codec);
2c885878 4333 stac92xx_init(codec);
82beb8fd
TI		 4334 snd_hda_codec_resume_amp(codec);
4335 snd_hda_codec_resume_cache(codec);
2c885878 4336 /* fake event to set up pins again to override cached values */
dc81bed1 4337 if (spec->hp_detect)
c6e4c666
TI		 4338 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4339 STAC_HP_EVENT);
ff6fdc37
M		 4340 return 0;
4341}
c6798d2b
MR		 4342
4343static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4344{
4345 struct sigmatel_spec *spec = codec->spec;
4346 if (spec->eapd_mask)
4347 stac_gpio_set(codec, spec->gpio_mask,
4348 spec->gpio_dir, spec->gpio_data &
4349 ~spec->eapd_mask);
4350 return 0;
4351}
ff6fdc37
M		 4352#endif
4353
2f2f4251
M		 4354static struct hda_codec_ops stac92xx_patch_ops = {
4355 .build_controls = stac92xx_build_controls,
4356 .build_pcms = stac92xx_build_pcms,
4357 .init = stac92xx_init,
4358 .free = stac92xx_free,
4e55096e 4359 .unsol_event = stac92xx_unsol_event,
cb53c626 4360#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4361 .suspend = stac92xx_suspend,
ff6fdc37
M		 4362 .resume = stac92xx_resume,
4363#endif
2f2f4251
M		 4364};
4365
4366static int patch_stac9200(struct hda_codec *codec)
4367{
4368 struct sigmatel_spec *spec;
c7d4b2fa 4369 int err;
2f2f4251 4370
e560d8d8 4371 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4372 if (spec == NULL)
4373 return -ENOMEM;
4374
4375 codec->spec = spec;
a4eed138 4376 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4377 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4378 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4379 stac9200_models,
4380 stac9200_cfg_tbl);
11b44bbd
RF		 4381 if (spec->board_config < 0) {
4382 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4383 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4384 } else
4385 err = stac_save_pin_cfgs(codec,
4386 stac9200_brd_tbl[spec->board_config]);
4387 if (err < 0) {
4388 stac92xx_free(codec);
4389 return err;
403d1944 4390 }
2f2f4251
M		 4391
4392 spec->multiout.max_channels = 2;
4393 spec->multiout.num_dacs = 1;
4394 spec->multiout.dac_nids = stac9200_dac_nids;
4395 spec->adc_nids = stac9200_adc_nids;
4396 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4397 spec->num_muxes = 1;
8b65727b 4398 spec->num_dmics = 0;
9e05b7a3 4399 spec->num_adcs = 1;
a64135a2 4400 spec->num_pwrs = 0;
c7d4b2fa 4401
bf277785
TD		 4402 if (spec->board_config == STAC_9200_GATEWAY ||
4403 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4404 spec->init = stac9200_eapd_init;
4405 else
4406 spec->init = stac9200_core_init;
2f2f4251 4407 spec->mixer = stac9200_mixer;
c7d4b2fa 4408
117f257d
TI		 4409 if (spec->board_config == STAC_9200_PANASONIC) {
4410 spec->gpio_mask = spec->gpio_dir = 0x09;
4411 spec->gpio_data = 0x00;
4412 }
4413
c7d4b2fa
M		 4414 err = stac9200_parse_auto_config(codec);
4415 if (err < 0) {
4416 stac92xx_free(codec);
4417 return err;
4418 }
2f2f4251
M		 4419
4420 codec->patch_ops = stac92xx_patch_ops;
4421
4422 return 0;
4423}
4424
8e21c34c
TD		 4425static int patch_stac925x(struct hda_codec *codec)
4426{
4427 struct sigmatel_spec *spec;
4428 int err;
4429
4430 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4431 if (spec == NULL)
4432 return -ENOMEM;
4433
4434 codec->spec = spec;
a4eed138 4435 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4436 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 4437
4438 /* Check first for codec ID */
4439 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4440 STAC_925x_MODELS,
4441 stac925x_models,
4442 stac925x_codec_id_cfg_tbl);
4443
4444 /* Now checks for PCI ID, if codec ID is not found */
4445 if (spec->board_config < 0)
4446 spec->board_config = snd_hda_check_board_config(codec,
4447 STAC_925x_MODELS,
8e21c34c
TD		 4448 stac925x_models,
4449 stac925x_cfg_tbl);
9e507abd 4450 again:
8e21c34c 4451 if (spec->board_config < 0) {
9cb36c2a 4452 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4453 "using BIOS defaults\n");
8e21c34c 4454 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4455 } else
4456 err = stac_save_pin_cfgs(codec,
4457 stac925x_brd_tbl[spec->board_config]);
4458 if (err < 0) {
4459 stac92xx_free(codec);
4460 return err;
8e21c34c
TD		 4461 }
4462
4463 spec->multiout.max_channels = 2;
4464 spec->multiout.num_dacs = 1;
4465 spec->multiout.dac_nids = stac925x_dac_nids;
4466 spec->adc_nids = stac925x_adc_nids;
4467 spec->mux_nids = stac925x_mux_nids;
4468 spec->num_muxes = 1;
9e05b7a3 4469 spec->num_adcs = 1;
a64135a2 4470 spec->num_pwrs = 0;
2c11f955
TD		 4471 switch (codec->vendor_id) {
4472 case 0x83847632: /* STAC9202 */
4473 case 0x83847633: /* STAC9202D */
4474 case 0x83847636: /* STAC9251 */
4475 case 0x83847637: /* STAC9251D */
f6e9852a 4476 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4477 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4478 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4479 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4480 break;
4481 default:
4482 spec->num_dmics = 0;
4483 break;
4484 }
8e21c34c
TD		 4485
4486 spec->init = stac925x_core_init;
4487 spec->mixer = stac925x_mixer;
4488
4489 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4490 if (!err) {
4491 if (spec->board_config < 0) {
4492 printk(KERN_WARNING "hda_codec: No auto-config is "
4493 "available, default to model=ref\n");
4494 spec->board_config = STAC_925x_REF;
4495 goto again;
4496 }
4497 err = -EINVAL;
4498 }
8e21c34c
TD		 4499 if (err < 0) {
4500 stac92xx_free(codec);
4501 return err;
4502 }
4503
4504 codec->patch_ops = stac92xx_patch_ops;
4505
4506 return 0;
4507}
4508
e1f0d669
MR		 4509static struct hda_input_mux stac92hd73xx_dmux = {
4510 .num_items = 4,
4511 .items = {
4512 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4513 { "Digital Mic 1", 0x09 },
4514 { "Digital Mic 2", 0x0a },
2a9c7816 4515 { "CD", 0x08 },
e1f0d669
MR		 4516 }
4517};
4518
4519static int patch_stac92hd73xx(struct hda_codec *codec)
4520{
4521 struct sigmatel_spec *spec;
4522 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4523 int err = 0;
4524
4525 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4526 if (spec == NULL)
4527 return -ENOMEM;
4528
4529 codec->spec = spec;
e99d32b3 4530 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4531 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4532 spec->pin_nids = stac92hd73xx_pin_nids;
4533 spec->board_config = snd_hda_check_board_config(codec,
4534 STAC_92HD73XX_MODELS,
4535 stac92hd73xx_models,
4536 stac92hd73xx_cfg_tbl);
4537again:
4538 if (spec->board_config < 0) {
4539 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4540 " STAC92HD73XX, using BIOS defaults\n");
4541 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4542 } else
4543 err = stac_save_pin_cfgs(codec,
4544 stac92hd73xx_brd_tbl[spec->board_config]);
4545 if (err < 0) {
4546 stac92xx_free(codec);
4547 return err;
e1f0d669
MR		 4548 }
4549
4550 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4551 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4552
4553 if (spec->multiout.num_dacs < 0) {
4554 printk(KERN_WARNING "hda_codec: Could not determine "
4555 "number of channels defaulting to DAC count\n");
4556 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4557 }
4558
4559 switch (spec->multiout.num_dacs) {
4560 case 0x3: /* 6 Channel */
4561 spec->mixer = stac92hd73xx_6ch_mixer;
4562 spec->init = stac92hd73xx_6ch_core_init;
4563 break;
4564 case 0x4: /* 8 Channel */
e1f0d669
MR		 4565 spec->mixer = stac92hd73xx_8ch_mixer;
4566 spec->init = stac92hd73xx_8ch_core_init;
4567 break;
4568 case 0x5: /* 10 Channel */
e1f0d669
MR		 4569 spec->mixer = stac92hd73xx_10ch_mixer;
4570 spec->init = stac92hd73xx_10ch_core_init;
4571 };
4572
4573 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4574 spec->aloopback_mask = 0x01;
4575 spec->aloopback_shift = 8;
4576
1cd2224c 4577 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4578 spec->mux_nids = stac92hd73xx_mux_nids;
4579 spec->adc_nids = stac92hd73xx_adc_nids;
4580 spec->dmic_nids = stac92hd73xx_dmic_nids;
4581 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4582 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4583 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4584 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4585
4586 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4587 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4588 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4589 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4590 sizeof(stac92hd73xx_dmux));
4591
a7662640 4592 switch (spec->board_config) {
6b3ab21e 4593 case STAC_DELL_EQ:
d654a660 4594 spec->init = dell_eq_core_init;
6b3ab21e 4595 /* fallthru */
661cd8fb
TI		 4596 case STAC_DELL_M6_AMIC:
4597 case STAC_DELL_M6_DMIC:
4598 case STAC_DELL_M6_BOTH:
2a9c7816 4599 spec->num_smuxes = 0;
2a9c7816
MR		 4600 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4601 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4602 spec->eapd_switch = 0;
2a9c7816 4603 spec->num_amps = 1;
6b3ab21e
MR		 4604
4605 if (!spec->init)
4606 spec->init = dell_m6_core_init;
661cd8fb
TI		 4607 switch (spec->board_config) {
4608 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR		 4609 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4610 spec->num_dmics = 0;
2a9c7816 4611 spec->private_dimux.num_items = 1;
a7662640 4612 break;
661cd8fb 4613 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR		 4614 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4615 spec->num_dmics = 1;
2a9c7816 4616 spec->private_dimux.num_items = 2;
a7662640 4617 break;
661cd8fb 4618 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR		 4619 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4620 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4621 spec->num_dmics = 1;
2a9c7816 4622 spec->private_dimux.num_items = 2;
a7662640
MR		 4623 break;
4624 }
4625 break;
4626 default:
4627 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4628 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4629 spec->eapd_switch = 1;
a7662640 4630 }
b2c4f4d7
MR		 4631 if (spec->board_config > STAC_92HD73XX_REF) {
4632 /* GPIO0 High = Enable EAPD */
4633 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4634 spec->gpio_data = 0x01;
4635 }
2a9c7816 4636 spec->dinput_mux = &spec->private_dimux;
a7662640 4637
a64135a2
MR		 4638 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4639 spec->pwr_nids = stac92hd73xx_pwr_nids;
4640
d9737751 4641 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4642
4643 if (!err) {
4644 if (spec->board_config < 0) {
4645 printk(KERN_WARNING "hda_codec: No auto-config is "
4646 "available, default to model=ref\n");
4647 spec->board_config = STAC_92HD73XX_REF;
4648 goto again;
4649 }
4650 err = -EINVAL;
4651 }
4652
4653 if (err < 0) {
4654 stac92xx_free(codec);
4655 return err;
4656 }
4657
4658 codec->patch_ops = stac92xx_patch_ops;
4659
4660 return 0;
4661}
4662
d0513fc6
MR		 4663static struct hda_input_mux stac92hd83xxx_dmux = {
4664 .num_items = 3,
4665 .items = {
4666 { "Analog Inputs", 0x03 },
4667 { "Digital Mic 1", 0x04 },
4668 { "Digital Mic 2", 0x05 },
4669 }
4670};
4671
4672static int patch_stac92hd83xxx(struct hda_codec *codec)
4673{
4674 struct sigmatel_spec *spec;
4675 int err;
4676
4677 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4678 if (spec == NULL)
4679 return -ENOMEM;
4680
4681 codec->spec = spec;
0ffa9807 4682 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4683 spec->mono_nid = 0x19;
4684 spec->digbeep_nid = 0x21;
4685 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4686 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4687 spec->adc_nids = stac92hd83xxx_adc_nids;
4688 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4689 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4690 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4691 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4692
4693 spec->init = stac92hd83xxx_core_init;
4694 switch (codec->vendor_id) {
4695 case 0x111d7605:
4696 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4697 break;
4698 default:
4699 spec->num_pwrs--;
4700 spec->init++; /* switch to config #2 */
4701 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4702 }
4703
4704 spec->mixer = stac92hd83xxx_mixer;
4705 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4706 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4707 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4708 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4709 spec->dinput_mux = &stac92hd83xxx_dmux;
4710 spec->pin_nids = stac92hd83xxx_pin_nids;
4711 spec->board_config = snd_hda_check_board_config(codec,
4712 STAC_92HD83XXX_MODELS,
4713 stac92hd83xxx_models,
4714 stac92hd83xxx_cfg_tbl);
4715again:
4716 if (spec->board_config < 0) {
4717 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4718 " STAC92HD83XXX, using BIOS defaults\n");
4719 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4720 } else
4721 err = stac_save_pin_cfgs(codec,
4722 stac92hd83xxx_brd_tbl[spec->board_config]);
4723 if (err < 0) {
4724 stac92xx_free(codec);
4725 return err;
d0513fc6
MR		 4726 }
4727
4728 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4729 if (!err) {
4730 if (spec->board_config < 0) {
4731 printk(KERN_WARNING "hda_codec: No auto-config is "
4732 "available, default to model=ref\n");
4733 spec->board_config = STAC_92HD83XXX_REF;
4734 goto again;
4735 }
4736 err = -EINVAL;
4737 }
4738
4739 if (err < 0) {
4740 stac92xx_free(codec);
4741 return err;
4742 }
4743
4744 codec->patch_ops = stac92xx_patch_ops;
4745
4746 return 0;
4747}
4748
8daaaa97
MR		 4749#ifdef SND_HDA_NEEDS_RESUME
4750static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4751{
4752 struct sigmatel_spec *spec = codec->spec;
4753 int i;
4754 snd_hda_codec_write_cache(codec, codec->afg, 0,
4755 AC_VERB_SET_POWER_STATE, pwr);
4756
4757 msleep(1);
4758 for (i = 0; i < spec->num_adcs; i++) {
4759 snd_hda_codec_write_cache(codec,
4760 spec->adc_nids[i], 0,
4761 AC_VERB_SET_POWER_STATE, pwr);
4762 }
4763};
4764
4765static int stac92hd71xx_resume(struct hda_codec *codec)
4766{
4767 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4768 return stac92xx_resume(codec);
4769}
4770
4771static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4772{
4773 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
c6798d2b 4774 return stac92xx_suspend(codec, state);
8daaaa97
MR		 4775};
4776
4777#endif
4778
4779static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4780 .build_controls = stac92xx_build_controls,
4781 .build_pcms = stac92xx_build_pcms,
4782 .init = stac92xx_init,
4783 .free = stac92xx_free,
4784 .unsol_event = stac92xx_unsol_event,
4785#ifdef SND_HDA_NEEDS_RESUME
8daaaa97 4786 .suspend = stac92hd71xx_suspend,
c6798d2b 4787 .resume = stac92hd71xx_resume,
8daaaa97
MR		 4788#endif
4789};
d0513fc6 4790
4b33c767
MR		 4791static struct hda_input_mux stac92hd71bxx_dmux = {
4792 .num_items = 4,
4793 .items = {
4794 { "Analog Inputs", 0x00 },
4795 { "Mixer", 0x01 },
4796 { "Digital Mic 1", 0x02 },
4797 { "Digital Mic 2", 0x03 },
4798 }
4799};
4800
e035b841
MR		 4801static int patch_stac92hd71bxx(struct hda_codec *codec)
4802{
4803 struct sigmatel_spec *spec;
4804 int err = 0;
4805
4806 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4807 if (spec == NULL)
4808 return -ENOMEM;
4809
4810 codec->spec = spec;
8daaaa97 4811 codec->patch_ops = stac92xx_patch_ops;
e035b841 4812 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4813 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4814 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4815 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4816 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4817 spec->board_config = snd_hda_check_board_config(codec,
4818 STAC_92HD71BXX_MODELS,
4819 stac92hd71bxx_models,
4820 stac92hd71bxx_cfg_tbl);
4821again:
4822 if (spec->board_config < 0) {
4823 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4824 " STAC92HD71BXX, using BIOS defaults\n");
4825 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4826 } else
4827 err = stac_save_pin_cfgs(codec,
4828 stac92hd71bxx_brd_tbl[spec->board_config]);
4829 if (err < 0) {
4830 stac92xx_free(codec);
4831 return err;
e035b841
MR		 4832 }
4833
41c3b648
TI		 4834 if (spec->board_config > STAC_92HD71BXX_REF) {
4835 /* GPIO0 = EAPD */
4836 spec->gpio_mask = 0x01;
4837 spec->gpio_dir = 0x01;
4838 spec->gpio_data = 0x01;
4839 }
4840
541eee87
MR		 4841 switch (codec->vendor_id) {
4842 case 0x111d76b6: /* 4 Port without Analog Mixer */
4843 case 0x111d76b7:
4844 case 0x111d76b4: /* 6 Port without Analog Mixer */
4845 case 0x111d76b5:
4846 spec->mixer = stac92hd71bxx_mixer;
4847 spec->init = stac92hd71bxx_core_init;
0ffa9807 4848 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4849 break;
aafc4412 4850 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4851 switch (spec->board_config) {
4852 case STAC_HP_M4:
72474be6 4853 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 4854 err = stac_add_event(spec, codec->afg,
4855 STAC_VREF_EVENT, 0x02);
4856 if (err < 0)
4857 return err;
c5d08bb5 4858 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4859 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4860 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4861 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4862 AC_USRSP_EN | err);
72474be6
MR		 4863 spec->gpio_mask |= 0x02;
4864 break;
4865 }
8daaaa97
MR		 4866 if ((codec->revision_id & 0xf) == 0 ||
4867 (codec->revision_id & 0xf) == 1) {
4868#ifdef SND_HDA_NEEDS_RESUME
4869 codec->patch_ops = stac92hd71bxx_patch_ops;
4870#endif
4871 spec->stream_delay = 40; /* 40 milliseconds */
4872 }
4873
aafc4412
MR		 4874 /* no output amps */
4875 spec->num_pwrs = 0;
4876 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4877 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4878
4879 /* disable VSW */
4880 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4881 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR		 4882 break;
4883 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4884 if ((codec->revision_id & 0xf) == 1) {
4885#ifdef SND_HDA_NEEDS_RESUME
4886 codec->patch_ops = stac92hd71bxx_patch_ops;
4887#endif
4888 spec->stream_delay = 40; /* 40 milliseconds */
4889 }
4890
aafc4412
MR		 4891 /* no output amps */
4892 spec->num_pwrs = 0;
4893 /* fallthru */
541eee87 4894 default:
4b33c767 4895 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4896 spec->mixer = stac92hd71bxx_analog_mixer;
4897 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4898 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4899 }
4900
4b33c767 4901 spec->aloopback_mask = 0x50;
541eee87
MR		 4902 spec->aloopback_shift = 0;
4903
8daaaa97 4904 spec->powerdown_adcs = 1;
1cd2224c 4905 spec->digbeep_nid = 0x26;
e035b841
MR		 4906 spec->mux_nids = stac92hd71bxx_mux_nids;
4907 spec->adc_nids = stac92hd71bxx_adc_nids;
4908 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4909 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4910 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4911 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4912
4913 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4914 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4915
6a14f585
MR		 4916 switch (spec->board_config) {
4917 case STAC_HP_M4:
6a14f585 4918 /* enable internal microphone */
af9f341a 4919 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR		 4920 stac92xx_auto_set_pinctl(codec, 0x0e,
4921 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4922 /* fallthru */
4923 case STAC_DELL_M4_2:
4924 spec->num_dmics = 0;
4925 spec->num_smuxes = 0;
4926 spec->num_dmuxes = 0;
4927 break;
4928 case STAC_DELL_M4_1:
4929 case STAC_DELL_M4_3:
4930 spec->num_dmics = 1;
4931 spec->num_smuxes = 0;
4932 spec->num_dmuxes = 0;
6a14f585
MR		 4933 break;
4934 default:
4935 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4936 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4937 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4938 };
4939
aea7bb0a 4940 spec->multiout.num_dacs = 1;
e035b841
MR		 4941 spec->multiout.hp_nid = 0x11;
4942 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4b33c767
MR		 4943 if (spec->dinput_mux)
4944 spec->private_dimux.num_items +=
4945 spec->num_dmics -
4946 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4947
4948 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4949 if (!err) {
4950 if (spec->board_config < 0) {
4951 printk(KERN_WARNING "hda_codec: No auto-config is "
4952 "available, default to model=ref\n");
4953 spec->board_config = STAC_92HD71BXX_REF;
4954 goto again;
4955 }
4956 err = -EINVAL;
4957 }
4958
4959 if (err < 0) {
4960 stac92xx_free(codec);
4961 return err;
4962 }
4963
e035b841
MR		 4964 return 0;
4965};
4966
2f2f4251
M		 4967static int patch_stac922x(struct hda_codec *codec)
4968{
4969 struct sigmatel_spec *spec;
c7d4b2fa 4970 int err;
2f2f4251 4971
e560d8d8 4972 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4973 if (spec == NULL)
4974 return -ENOMEM;
4975
4976 codec->spec = spec;
a4eed138 4977 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4978 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4979 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4980 stac922x_models,
4981 stac922x_cfg_tbl);
536319af 4982 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4983 spec->gpio_mask = spec->gpio_dir = 0x03;
4984 spec->gpio_data = 0x03;
3fc24d85
TI		 4985 /* Intel Macs have all same PCI SSID, so we need to check
4986 * codec SSID to distinguish the exact models
4987 */
6f0778d8 4988 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4989 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4990
4991 case 0x106b0800:
4992 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4993 break;
5d5d3bc3
IZ		 4994 case 0x106b0600:
4995 case 0x106b0700:
4996 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4997 break;
5d5d3bc3
IZ		 4998 case 0x106b0e00:
4999 case 0x106b0f00:
5000 case 0x106b1600:
5001 case 0x106b1700:
5002 case 0x106b0200:
5003 case 0x106b1e00:
5004 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5005 break;
5d5d3bc3
IZ		 5006 case 0x106b1a00:
5007 case 0x00000100:
5008 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5009 break;
5d5d3bc3
IZ		 5010 case 0x106b0a00:
5011 case 0x106b2200:
5012 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5013 break;
536319af
NB		 5014 default:
5015 spec->board_config = STAC_INTEL_MAC_V3;
5016 break;
3fc24d85
TI		 5017 }
5018 }
5019
9e507abd 5020 again:
11b44bbd
RF		 5021 if (spec->board_config < 0) {
5022 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5023 "using BIOS defaults\n");
5024 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5025 } else
5026 err = stac_save_pin_cfgs(codec,
5027 stac922x_brd_tbl[spec->board_config]);
5028 if (err < 0) {
5029 stac92xx_free(codec);
5030 return err;
403d1944 5031 }
2f2f4251 5032
c7d4b2fa
M		 5033 spec->adc_nids = stac922x_adc_nids;
5034 spec->mux_nids = stac922x_mux_nids;
2549413e 5035 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5036 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5037 spec->num_dmics = 0;
a64135a2 5038 spec->num_pwrs = 0;
c7d4b2fa
M		 5039
5040 spec->init = stac922x_core_init;
2f2f4251 5041 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 5042
5043 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5044
3cc08dc6 5045 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 5046 if (!err) {
5047 if (spec->board_config < 0) {
5048 printk(KERN_WARNING "hda_codec: No auto-config is "
5049 "available, default to model=ref\n");
5050 spec->board_config = STAC_D945_REF;
5051 goto again;
5052 }
5053 err = -EINVAL;
5054 }
3cc08dc6
MP		 5055 if (err < 0) {
5056 stac92xx_free(codec);
5057 return err;
5058 }
5059
5060 codec->patch_ops = stac92xx_patch_ops;
5061
807a4636
TI		 5062 /* Fix Mux capture level; max to 2 */
5063 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5064 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5065 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5066 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5067 (0 << AC_AMPCAP_MUTE_SHIFT));
5068
3cc08dc6
MP		 5069 return 0;
5070}
5071
5072static int patch_stac927x(struct hda_codec *codec)
5073{
5074 struct sigmatel_spec *spec;
5075 int err;
5076
5077 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5078 if (spec == NULL)
5079 return -ENOMEM;
5080
5081 codec->spec = spec;
a4eed138 5082 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5083 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 5084 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5085 stac927x_models,
5086 stac927x_cfg_tbl);
9e507abd 5087 again:
8e9068b1
MR		 5088 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5089 if (spec->board_config < 0)
5090 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5091 "STAC927x, using BIOS defaults\n");
11b44bbd 5092 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5093 } else
5094 err = stac_save_pin_cfgs(codec,
5095 stac927x_brd_tbl[spec->board_config]);
5096 if (err < 0) {
5097 stac92xx_free(codec);
5098 return err;
3cc08dc6
MP		 5099 }
5100
1cd2224c 5101 spec->digbeep_nid = 0x23;
8e9068b1
MR		 5102 spec->adc_nids = stac927x_adc_nids;
5103 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5104 spec->mux_nids = stac927x_mux_nids;
5105 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 5106 spec->smux_nids = stac927x_smux_nids;
5107 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5108 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5109 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 5110 spec->multiout.dac_nids = spec->dac_nids;
5111
81d3dbde 5112 switch (spec->board_config) {
93ed1503 5113 case STAC_D965_3ST:
93ed1503 5114 case STAC_D965_5ST:
8e9068b1 5115 /* GPIO0 High = Enable EAPD */
0fc9dec4 5116 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5117 spec->gpio_data = 0x01;
8e9068b1
MR		 5118 spec->num_dmics = 0;
5119
93ed1503 5120 spec->init = d965_core_init;
9e05b7a3 5121 spec->mixer = stac927x_mixer;
81d3dbde 5122 break;
8e9068b1 5123 case STAC_DELL_BIOS:
780c8be4
MR		 5124 switch (codec->subsystem_id) {
5125 case 0x10280209:
5126 case 0x1028022e:
5127 /* correct the device field to SPDIF out */
af9f341a 5128 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR		 5129 break;
5130 };
03d7ca17 5131 /* configure the analog microphone on some laptops */
af9f341a 5132 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5133 /* correct the front output jack as a hp out */
af9f341a 5134 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5135 /* correct the front input jack as a mic */
af9f341a 5136 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5137 /* fallthru */
8e9068b1
MR		 5138 case STAC_DELL_3ST:
5139 /* GPIO2 High = Enable EAPD */
0fc9dec4 5140 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5141 spec->gpio_data = 0x04;
7f16859a
MR		 5142 spec->dmic_nids = stac927x_dmic_nids;
5143 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5144
8e9068b1
MR		 5145 spec->init = d965_core_init;
5146 spec->mixer = stac927x_mixer;
5147 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5148 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 5149 break;
5150 default:
b2c4f4d7
MR		 5151 if (spec->board_config > STAC_D965_REF) {
5152 /* GPIO0 High = Enable EAPD */
5153 spec->eapd_mask = spec->gpio_mask = 0x01;
5154 spec->gpio_dir = spec->gpio_data = 0x01;
5155 }
8e9068b1
MR		 5156 spec->num_dmics = 0;
5157
5158 spec->init = stac927x_core_init;
5159 spec->mixer = stac927x_mixer;
7f16859a
MR		 5160 }
5161
a64135a2 5162 spec->num_pwrs = 0;
e1f0d669
MR		 5163 spec->aloopback_mask = 0x40;
5164 spec->aloopback_shift = 0;
c0cea0d0 5165 spec->eapd_switch = 1;
8e9068b1 5166
3cc08dc6 5167 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5168 if (!err) {
5169 if (spec->board_config < 0) {
5170 printk(KERN_WARNING "hda_codec: No auto-config is "
5171 "available, default to model=ref\n");
5172 spec->board_config = STAC_D965_REF;
5173 goto again;
5174 }
5175 err = -EINVAL;
5176 }
c7d4b2fa
M		 5177 if (err < 0) {
5178 stac92xx_free(codec);
5179 return err;
5180 }
2f2f4251
M		 5181
5182 codec->patch_ops = stac92xx_patch_ops;
5183
52987656
TI		 5184 /*
5185 * !!FIXME!!
5186 * The STAC927x seem to require fairly long delays for certain
5187 * command sequences. With too short delays (even if the answer
5188 * is set to RIRB properly), it results in the silence output
5189 * on some hardwares like Dell.
5190 *
5191 * The below flag enables the longer delay (see get_response
5192 * in hda_intel.c).
5193 */
5194 codec->bus->needs_damn_long_delay = 1;
5195
2f2f4251
M		 5196 return 0;
5197}
5198
f3302a59
MP		 5199static int patch_stac9205(struct hda_codec *codec)
5200{
5201 struct sigmatel_spec *spec;
8259980e 5202 int err;
f3302a59
MP		 5203
5204 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5205 if (spec == NULL)
5206 return -ENOMEM;
5207
5208 codec->spec = spec;
a4eed138 5209 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5210 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 5211 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5212 stac9205_models,
5213 stac9205_cfg_tbl);
9e507abd 5214 again:
11b44bbd
RF		 5215 if (spec->board_config < 0) {
5216 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5217 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5218 } else
5219 err = stac_save_pin_cfgs(codec,
5220 stac9205_brd_tbl[spec->board_config]);
5221 if (err < 0) {
5222 stac92xx_free(codec);
5223 return err;
f3302a59
MP		 5224 }
5225
1cd2224c 5226 spec->digbeep_nid = 0x23;
f3302a59 5227 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5228 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5229 spec->mux_nids = stac9205_mux_nids;
2549413e 5230 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 5231 spec->smux_nids = stac9205_smux_nids;
5232 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5233 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5234 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5235 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5236 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5237 spec->num_pwrs = 0;
f3302a59
MP		 5238
5239 spec->init = stac9205_core_init;
5240 spec->mixer = stac9205_mixer;
5241
e1f0d669
MR		 5242 spec->aloopback_mask = 0x40;
5243 spec->aloopback_shift = 0;
c0cea0d0 5244 spec->eapd_switch = 1;
f3302a59 5245 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5246
ae0a8ed8 5247 switch (spec->board_config){
ae0a8ed8 5248 case STAC_9205_DELL_M43:
87d48363 5249 /* Enable SPDIF in/out */
af9f341a
TI		 5250 stac_change_pin_config(codec, 0x1f, 0x01441030);
5251 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5252
4fe5195c 5253 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 5254 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5255 if (err < 0)
5256 return err;
c5d08bb5 5257 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 5258 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5259 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 5260 AC_VERB_SET_UNSOLICITED_ENABLE,
5261 AC_USRSP_EN | err);
4fe5195c
MR		 5262
5263 spec->gpio_dir = 0x0b;
0fc9dec4 5264 spec->eapd_mask = 0x01;
4fe5195c
MR		 5265 spec->gpio_mask = 0x1b;
5266 spec->gpio_mute = 0x10;
e2e7d624 5267 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5268 * GPIO3 Low = DRM
87d48363 5269 */
4fe5195c 5270 spec->gpio_data = 0x01;
ae0a8ed8 5271 break;
b2c4f4d7
MR		 5272 case STAC_9205_REF:
5273 /* SPDIF-In enabled */
5274 break;
ae0a8ed8
TD		 5275 default:
5276 /* GPIO0 High = EAPD */
0fc9dec4 5277 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5278 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5279 break;
5280 }
33382403 5281
f3302a59 5282 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5283 if (!err) {
5284 if (spec->board_config < 0) {
5285 printk(KERN_WARNING "hda_codec: No auto-config is "
5286 "available, default to model=ref\n");
5287 spec->board_config = STAC_9205_REF;
5288 goto again;
5289 }
5290 err = -EINVAL;
5291 }
f3302a59
MP		 5292 if (err < 0) {
5293 stac92xx_free(codec);
5294 return err;
5295 }
5296
5297 codec->patch_ops = stac92xx_patch_ops;
5298
5299 return 0;
5300}
5301
db064e50 5302/*
6d859065 5303 * STAC9872 hack
db064e50
TI		 5304 */
5305
99ccc560 5306/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 5307static hda_nid_t vaio_dacs[] = { 0x2 };
5308#define VAIO_HP_DAC 0x5
5309static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5310static hda_nid_t vaio_mux_nids[] = { 0x15 };
5311
5312static struct hda_input_mux vaio_mux = {
a3a2f429 5313 .num_items = 3,
db064e50 5314 .items = {
d773781c 5315 /* { "HP", 0x0 }, */
1624cb9a
TI		 5316 { "Mic Jack", 0x1 },
5317 { "Internal Mic", 0x2 },
db064e50
TI		 5318 { "PCM", 0x3 },
5319 }
5320};
5321
5322static struct hda_verb vaio_init[] = {
5323 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5324 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 5325 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5326 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5327 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5328 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5329 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 5330 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5331 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5332 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5333 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5334 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5335 {}
5336};
5337
6d859065
GM		 5338static struct hda_verb vaio_ar_init[] = {
5339 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5340 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5341 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5342 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5343/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5344 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5345 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5346 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5347 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5348/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5349 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5350 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5351 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5352 {}
5353};
5354
db064e50 5355static struct snd_kcontrol_new vaio_mixer[] = {
127e82e3
TI		 5356 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5357 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5358 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5359 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
db064e50
TI		 5360 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5361 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5362 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5363 {
5364 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5365 .name = "Capture Source",
5366 .count = 1,
5367 .info = stac92xx_mux_enum_info,
5368 .get = stac92xx_mux_enum_get,
5369 .put = stac92xx_mux_enum_put,
5370 },
5371 {}
5372};
5373
6d859065 5374static struct snd_kcontrol_new vaio_ar_mixer[] = {
127e82e3
TI		 5375 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5376 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5377 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5378 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
6d859065
GM		 5379 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5380 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5381 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5382 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5383 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5384 {
5385 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5386 .name = "Capture Source",
5387 .count = 1,
5388 .info = stac92xx_mux_enum_info,
5389 .get = stac92xx_mux_enum_get,
5390 .put = stac92xx_mux_enum_put,
5391 },
5392 {}
5393};
5394
5395static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5396 .build_controls = stac92xx_build_controls,
5397 .build_pcms = stac92xx_build_pcms,
5398 .init = stac92xx_init,
5399 .free = stac92xx_free,
cb53c626 5400#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5401 .resume = stac92xx_resume,
5402#endif
5403};
5404
72e7b0dd
TI		 5405static int stac9872_vaio_init(struct hda_codec *codec)
5406{
5407 int err;
5408
5409 err = stac92xx_init(codec);
5410 if (err < 0)
5411 return err;
5412 if (codec->patch_ops.unsol_event)
5413 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5414 return 0;
5415}
5416
5417static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5418{
40c1d308 5419 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5420 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5421 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5422 } else {
5423 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5424 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5425 }
5426}
5427
5428static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5429{
5430 switch (res >> 26) {
5431 case STAC_HP_EVENT:
5432 stac9872_vaio_hp_detect(codec, res);
5433 break;
5434 }
5435}
5436
5437static struct hda_codec_ops stac9872_vaio_patch_ops = {
5438 .build_controls = stac92xx_build_controls,
5439 .build_pcms = stac92xx_build_pcms,
5440 .init = stac9872_vaio_init,
5441 .free = stac92xx_free,
5442 .unsol_event = stac9872_vaio_unsol_event,
5443#ifdef CONFIG_PM
5444 .resume = stac92xx_resume,
5445#endif
5446};
5447
6d859065
GM		 5448enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5449 CXD9872RD_VAIO,
5450 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5451 STAC9872AK_VAIO,
5452 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5453 STAC9872K_VAIO,
5454 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5455 CXD9872AKD_VAIO,
5456 STAC_9872_MODELS,
5457};
5458
5459static const char *stac9872_models[STAC_9872_MODELS] = {
5460 [CXD9872RD_VAIO] = "vaio",
5461 [CXD9872AKD_VAIO] = "vaio-ar",
5462};
5463
5464static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5465 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5466 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5467 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5468 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5469 {}
5470};
5471
6d859065 5472static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5473{
5474 struct sigmatel_spec *spec;
5475 int board_config;
5476
f5fcc13c
TI		 5477 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5478 stac9872_models,
5479 stac9872_cfg_tbl);
db064e50
TI		 5480 if (board_config < 0)
5481 /* unknown config, let generic-parser do its job... */
5482 return snd_hda_parse_generic_codec(codec);
5483
5484 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5485 if (spec == NULL)
5486 return -ENOMEM;
5487
5488 codec->spec = spec;
5489 switch (board_config) {
6d859065
GM		 5490 case CXD9872RD_VAIO:
5491 case STAC9872AK_VAIO:
5492 case STAC9872K_VAIO:
db064e50
TI		 5493 spec->mixer = vaio_mixer;
5494 spec->init = vaio_init;
5495 spec->multiout.max_channels = 2;
5496 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5497 spec->multiout.dac_nids = vaio_dacs;
5498 spec->multiout.hp_nid = VAIO_HP_DAC;
5499 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5500 spec->adc_nids = vaio_adcs;
a64135a2 5501 spec->num_pwrs = 0;
db064e50
TI		 5502 spec->input_mux = &vaio_mux;
5503 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5504 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5505 break;
6d859065
GM		 5506
5507 case CXD9872AKD_VAIO:
5508 spec->mixer = vaio_ar_mixer;
5509 spec->init = vaio_ar_init;
5510 spec->multiout.max_channels = 2;
5511 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5512 spec->multiout.dac_nids = vaio_dacs;
5513 spec->multiout.hp_nid = VAIO_HP_DAC;
5514 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5515 spec->num_pwrs = 0;
6d859065
GM		 5516 spec->adc_nids = vaio_adcs;
5517 spec->input_mux = &vaio_mux;
5518 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5519 codec->patch_ops = stac9872_patch_ops;
6d859065 5520 break;
db064e50
TI		 5521 }
5522
db064e50
TI		 5523 return 0;
5524}
5525
5526
2f2f4251
M		 5527/*
5528 * patch entries
5529 */
1289e9e8 5530static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 5531 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5532 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5533 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5534 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5535 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5536 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5537 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5538 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5539 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5540 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5541 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5542 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5543 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5544 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5545 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5546 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5547 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5548 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5549 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5550 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5551 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5552 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5553 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5554 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5555 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5556 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5557 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5558 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5559 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5560 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5561 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5562 /* The following does not take into account .id=0x83847661 when subsys =
5563 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5564 * currently not fully supported.
5565 */
5566 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5567 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5568 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5569 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5570 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5571 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5572 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5573 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5574 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5575 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5576 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5577 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5578 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5579 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5580 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5581 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5582 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5583 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5584 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5585 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5586 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5587 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5588 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5589 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5590 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5591 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5592 {} /* terminator */
5593};
1289e9e8
TI		 5594
5595MODULE_ALIAS("snd-hda-codec-id:8384*");
5596MODULE_ALIAS("snd-hda-codec-id:111d*");
5597
5598MODULE_LICENSE("GPL");
5599MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5600
5601static struct hda_codec_preset_list sigmatel_list = {
5602 .preset = snd_hda_preset_sigmatel,
5603 .owner = THIS_MODULE,
5604};
5605
5606static int __init patch_sigmatel_init(void)
5607{
5608 return snd_hda_add_codec_preset(&sigmatel_list);
5609}
5610
5611static void __exit patch_sigmatel_exit(void)
5612{
5613 snd_hda_delete_codec_preset(&sigmatel_list);
5614}
5615
5616module_init(patch_sigmatel_init)
5617module_exit(patch_sigmatel_exit)
Clone of davem's net-next-2.6 tree