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ALSA: hda: fix oopses in snd-hda-intel after digital slave support additions
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
4e55096e 38#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 39#define STAC_PWR_EVENT 0x20
40#define STAC_HP_EVENT 0x30
4e55096e 41
f5fcc13c
TI		 42enum {
43 STAC_REF,
bf277785 44 STAC_9200_OQO,
dfe495d0
TI		 45 STAC_9200_DELL_D21,
46 STAC_9200_DELL_D22,
47 STAC_9200_DELL_D23,
48 STAC_9200_DELL_M21,
49 STAC_9200_DELL_M22,
50 STAC_9200_DELL_M23,
51 STAC_9200_DELL_M24,
52 STAC_9200_DELL_M25,
53 STAC_9200_DELL_M26,
54 STAC_9200_DELL_M27,
1194b5b7 55 STAC_9200_GATEWAY,
117f257d 56 STAC_9200_PANASONIC,
f5fcc13c
TI		 57 STAC_9200_MODELS
58};
59
60enum {
61 STAC_9205_REF,
dfe495d0 62 STAC_9205_DELL_M42,
ae0a8ed8
TD		 63 STAC_9205_DELL_M43,
64 STAC_9205_DELL_M44,
f5fcc13c
TI		 65 STAC_9205_MODELS
66};
67
e1f0d669
MR		 68enum {
69 STAC_92HD73XX_REF,
a7662640 70 STAC_DELL_M6,
e1f0d669
MR		 71 STAC_92HD73XX_MODELS
72};
73
d0513fc6
MR		 74enum {
75 STAC_92HD83XXX_REF,
76 STAC_92HD83XXX_MODELS
77};
78
e035b841
MR		 79enum {
80 STAC_92HD71BXX_REF,
a7662640
MR		 81 STAC_DELL_M4_1,
82 STAC_DELL_M4_2,
e035b841
MR		 83 STAC_92HD71BXX_MODELS
84};
85
8e21c34c
TD		 86enum {
87 STAC_925x_REF,
88 STAC_M2_2,
89 STAC_MA6,
2c11f955 90 STAC_PA6,
8e21c34c
TD		 91 STAC_925x_MODELS
92};
93
f5fcc13c
TI		 94enum {
95 STAC_D945_REF,
96 STAC_D945GTP3,
97 STAC_D945GTP5,
5d5d3bc3
IZ		 98 STAC_INTEL_MAC_V1,
99 STAC_INTEL_MAC_V2,
100 STAC_INTEL_MAC_V3,
101 STAC_INTEL_MAC_V4,
102 STAC_INTEL_MAC_V5,
536319af
NB		 103 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
104 * is given, one of the above models will be
105 * chosen according to the subsystem id. */
dfe495d0 106 /* for backward compatibility */
f5fcc13c 107 STAC_MACMINI,
3fc24d85 108 STAC_MACBOOK,
6f0778d8
NB		 109 STAC_MACBOOK_PRO_V1,
110 STAC_MACBOOK_PRO_V2,
f16928fb 111 STAC_IMAC_INTEL,
0dae0f83 112 STAC_IMAC_INTEL_20,
8c650087 113 STAC_ECS_202,
dfe495d0
TI		 114 STAC_922X_DELL_D81,
115 STAC_922X_DELL_D82,
116 STAC_922X_DELL_M81,
117 STAC_922X_DELL_M82,
f5fcc13c
TI		 118 STAC_922X_MODELS
119};
120
121enum {
122 STAC_D965_REF,
123 STAC_D965_3ST,
124 STAC_D965_5ST,
4ff076e5 125 STAC_DELL_3ST,
8e9068b1 126 STAC_DELL_BIOS,
f5fcc13c
TI		 127 STAC_927X_MODELS
128};
403d1944 129
2f2f4251 130struct sigmatel_spec {
c8b6bf9b 131 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 132 unsigned int num_mixers;
133
403d1944 134 int board_config;
c7d4b2fa 135 unsigned int surr_switch: 1;
403d1944
MP		 136 unsigned int line_switch: 1;
137 unsigned int mic_switch: 1;
3cc08dc6 138 unsigned int alt_switch: 1;
82bc955f 139 unsigned int hp_detect: 1;
c7d4b2fa 140
4fe5195c 141 /* gpio lines */
0fc9dec4 142 unsigned int eapd_mask;
4fe5195c
MR		 143 unsigned int gpio_mask;
144 unsigned int gpio_dir;
145 unsigned int gpio_data;
146 unsigned int gpio_mute;
147
8daaaa97
MR		 148 /* stream */
149 unsigned int stream_delay;
150
4fe5195c 151 /* analog loopback */
e1f0d669
MR		 152 unsigned char aloopback_mask;
153 unsigned char aloopback_shift;
8259980e 154
a64135a2
MR		 155 /* power management */
156 unsigned int num_pwrs;
d0513fc6 157 unsigned int *pwr_mapping;
a64135a2 158 hda_nid_t *pwr_nids;
b76c850f 159 hda_nid_t *dac_list;
a64135a2 160
2f2f4251 161 /* playback */
b22b4821
MR		 162 struct hda_input_mux *mono_mux;
163 unsigned int cur_mmux;
2f2f4251 164 struct hda_multi_out multiout;
3cc08dc6 165 hda_nid_t dac_nids[5];
2f2f4251
M		 166
167 /* capture */
168 hda_nid_t *adc_nids;
2f2f4251 169 unsigned int num_adcs;
dabbed6f
M		 170 hda_nid_t *mux_nids;
171 unsigned int num_muxes;
8b65727b
MP		 172 hda_nid_t *dmic_nids;
173 unsigned int num_dmics;
e1f0d669 174 hda_nid_t *dmux_nids;
1697055e 175 unsigned int num_dmuxes;
d9737751
MR		 176 hda_nid_t *smux_nids;
177 unsigned int num_smuxes;
178
dabbed6f 179 hda_nid_t dig_in_nid;
b22b4821 180 hda_nid_t mono_nid;
1cd2224c
MR		 181 hda_nid_t anabeep_nid;
182 hda_nid_t digbeep_nid;
2f2f4251 183
2f2f4251
M		 184 /* pin widgets */
185 hda_nid_t *pin_nids;
186 unsigned int num_pins;
2f2f4251 187 unsigned int *pin_configs;
11b44bbd 188 unsigned int *bios_pin_configs;
2f2f4251
M		 189
190 /* codec specific stuff */
191 struct hda_verb *init;
c8b6bf9b 192 struct snd_kcontrol_new *mixer;
2f2f4251
M		 193
194 /* capture source */
8b65727b 195 struct hda_input_mux *dinput_mux;
e1f0d669 196 unsigned int cur_dmux[2];
c7d4b2fa 197 struct hda_input_mux *input_mux;
3cc08dc6 198 unsigned int cur_mux[3];
d9737751
MR		 199 struct hda_input_mux *sinput_mux;
200 unsigned int cur_smux[2];
8daaaa97 201 unsigned int powerdown_adcs;
2f2f4251 202
403d1944
MP		 203 /* i/o switches */
204 unsigned int io_switch[2];
0fb87bb4 205 unsigned int clfe_swap;
7c2ba97b 206 unsigned int hp_switch;
5f10c4a9 207 unsigned int aloopback;
2f2f4251 208
c7d4b2fa
M		 209 struct hda_pcm pcm_rec[2]; /* PCM information */
210
211 /* dynamic controls and input_mux */
212 struct auto_pin_cfg autocfg;
213 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 214 struct snd_kcontrol_new *kctl_alloc;
8b65727b 215 struct hda_input_mux private_dimux;
c7d4b2fa 216 struct hda_input_mux private_imux;
d9737751 217 struct hda_input_mux private_smux;
b22b4821 218 struct hda_input_mux private_mono_mux;
2f2f4251
M		 219};
220
221static hda_nid_t stac9200_adc_nids[1] = {
222 0x03,
223};
224
225static hda_nid_t stac9200_mux_nids[1] = {
226 0x0c,
227};
228
229static hda_nid_t stac9200_dac_nids[1] = {
230 0x02,
231};
232
a64135a2
MR		 233static hda_nid_t stac92hd73xx_pwr_nids[8] = {
234 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
235 0x0f, 0x10, 0x11
236};
237
0ffa9807
MR		 238static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
239 0x26, 0,
240};
241
e1f0d669
MR		 242static hda_nid_t stac92hd73xx_adc_nids[2] = {
243 0x1a, 0x1b
244};
245
246#define STAC92HD73XX_NUM_DMICS 2
247static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
248 0x13, 0x14, 0
249};
250
251#define STAC92HD73_DAC_COUNT 5
252static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
253 0x15, 0x16, 0x17, 0x18, 0x19,
254};
255
256static hda_nid_t stac92hd73xx_mux_nids[4] = {
257 0x28, 0x29, 0x2a, 0x2b,
258};
259
260static hda_nid_t stac92hd73xx_dmux_nids[2] = {
261 0x20, 0x21,
262};
263
d9737751
MR		 264static hda_nid_t stac92hd73xx_smux_nids[2] = {
265 0x22, 0x23,
266};
267
d0513fc6
MR		 268#define STAC92HD83XXX_NUM_DMICS 2
269static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
270 0x11, 0x12, 0
271};
272
273#define STAC92HD81_DAC_COUNT 2
274#define STAC92HD83_DAC_COUNT 3
275static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
276 0x13, 0x14, 0x22,
277};
278
279static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
280 0x17, 0x18,
281};
282
283static hda_nid_t stac92hd83xxx_adc_nids[2] = {
284 0x15, 0x16,
285};
286
287static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
288 0xa, 0xb, 0xd, 0xe,
289};
290
0ffa9807
MR		 291static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
292 0x1e, 0,
293};
294
d0513fc6
MR		 295static unsigned int stac92hd83xxx_pwr_mapping[4] = {
296 0x03, 0x0c, 0x10, 0x40,
297};
298
a64135a2
MR		 299static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
300 0x0a, 0x0d, 0x0f
301};
302
e035b841
MR		 303static hda_nid_t stac92hd71bxx_adc_nids[2] = {
304 0x12, 0x13,
305};
306
307static hda_nid_t stac92hd71bxx_mux_nids[2] = {
308 0x1a, 0x1b
309};
310
e1f0d669
MR		 311static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
312 0x1c,
313};
314
d9737751
MR		 315static hda_nid_t stac92hd71bxx_smux_nids[2] = {
316 0x24, 0x25,
317};
318
aea7bb0a 319static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 320 0x10, /*0x11, */
321};
322
323#define STAC92HD71BXX_NUM_DMICS 2
324static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
325 0x18, 0x19, 0
326};
327
0ffa9807
MR		 328static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
329 0x22, 0
330};
331
8e21c34c
TD		 332static hda_nid_t stac925x_adc_nids[1] = {
333 0x03,
334};
335
336static hda_nid_t stac925x_mux_nids[1] = {
337 0x0f,
338};
339
340static hda_nid_t stac925x_dac_nids[1] = {
341 0x02,
342};
343
f6e9852a
TI		 344#define STAC925X_NUM_DMICS 1
345static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
346 0x15, 0
2c11f955
TD		 347};
348
1697055e
TI		 349static hda_nid_t stac925x_dmux_nids[1] = {
350 0x14,
351};
352
2f2f4251
M		 353static hda_nid_t stac922x_adc_nids[2] = {
354 0x06, 0x07,
355};
356
357static hda_nid_t stac922x_mux_nids[2] = {
358 0x12, 0x13,
359};
360
3cc08dc6
MP		 361static hda_nid_t stac927x_adc_nids[3] = {
362 0x07, 0x08, 0x09
363};
364
365static hda_nid_t stac927x_mux_nids[3] = {
366 0x15, 0x16, 0x17
367};
368
d9737751
MR		 369static hda_nid_t stac927x_smux_nids[1] = {
370 0x21,
371};
372
b76c850f
MR		 373static hda_nid_t stac927x_dac_nids[6] = {
374 0x02, 0x03, 0x04, 0x05, 0x06, 0
375};
376
e1f0d669
MR		 377static hda_nid_t stac927x_dmux_nids[1] = {
378 0x1b,
379};
380
7f16859a
MR		 381#define STAC927X_NUM_DMICS 2
382static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
383 0x13, 0x14, 0
384};
385
f3302a59
MP		 386static hda_nid_t stac9205_adc_nids[2] = {
387 0x12, 0x13
388};
389
390static hda_nid_t stac9205_mux_nids[2] = {
391 0x19, 0x1a
392};
393
e1f0d669 394static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 395 0x1d,
e1f0d669
MR		 396};
397
d9737751
MR		 398static hda_nid_t stac9205_smux_nids[1] = {
399 0x21,
400};
401
f6e9852a
TI		 402#define STAC9205_NUM_DMICS 2
403static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
404 0x17, 0x18, 0
8b65727b
MP		 405};
406
c7d4b2fa 407static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 408 0x08, 0x09, 0x0d, 0x0e,
409 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 410};
411
8e21c34c
TD		 412static hda_nid_t stac925x_pin_nids[8] = {
413 0x07, 0x08, 0x0a, 0x0b,
414 0x0c, 0x0d, 0x10, 0x11,
415};
416
2f2f4251
M		 417static hda_nid_t stac922x_pin_nids[10] = {
418 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
419 0x0f, 0x10, 0x11, 0x15, 0x1b,
420};
421
a7662640 422static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 423 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
424 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 425 0x14, 0x22, 0x23
e1f0d669
MR		 426};
427
d0513fc6
MR		 428static hda_nid_t stac92hd83xxx_pin_nids[14] = {
429 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
430 0x0f, 0x10, 0x11, 0x12, 0x13,
431 0x1d, 0x1e, 0x1f, 0x20
432};
0ffa9807 433static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 434 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
435 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 436 0x1f,
e035b841
MR		 437};
438
3cc08dc6
MP		 439static hda_nid_t stac927x_pin_nids[14] = {
440 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
441 0x0f, 0x10, 0x11, 0x12, 0x13,
442 0x14, 0x21, 0x22, 0x23,
443};
444
f3302a59
MP		 445static hda_nid_t stac9205_pin_nids[12] = {
446 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
447 0x0f, 0x14, 0x16, 0x17, 0x18,
448 0x21, 0x22,
f3302a59
MP		 449};
450
8b65727b
MP		 451static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
452 struct snd_ctl_elem_info *uinfo)
453{
454 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
455 struct sigmatel_spec *spec = codec->spec;
456 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
457}
458
459static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
460 struct snd_ctl_elem_value *ucontrol)
461{
462 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
463 struct sigmatel_spec *spec = codec->spec;
e1f0d669 464 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 465
e1f0d669 466 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 467 return 0;
468}
469
470static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
471 struct snd_ctl_elem_value *ucontrol)
472{
473 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
474 struct sigmatel_spec *spec = codec->spec;
e1f0d669 475 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 476
477 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 478 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 479}
480
d9737751
MR		 481static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
482 struct snd_ctl_elem_info *uinfo)
483{
484 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
485 struct sigmatel_spec *spec = codec->spec;
486 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
487}
488
489static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
490 struct snd_ctl_elem_value *ucontrol)
491{
492 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
493 struct sigmatel_spec *spec = codec->spec;
494 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
495
496 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
497 return 0;
498}
499
500static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
501 struct snd_ctl_elem_value *ucontrol)
502{
503 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
504 struct sigmatel_spec *spec = codec->spec;
505 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
506
507 return snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
508 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
509}
510
c8b6bf9b 511static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 512{
513 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
514 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 515 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 516}
517
c8b6bf9b 518static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 519{
520 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
521 struct sigmatel_spec *spec = codec->spec;
522 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
523
524 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
525 return 0;
526}
527
c8b6bf9b 528static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 529{
530 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
531 struct sigmatel_spec *spec = codec->spec;
532 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
533
c7d4b2fa 534 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 535 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
536}
537
b22b4821
MR		 538static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
539 struct snd_ctl_elem_info *uinfo)
540{
541 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
542 struct sigmatel_spec *spec = codec->spec;
543 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
544}
545
546static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
547 struct snd_ctl_elem_value *ucontrol)
548{
549 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
550 struct sigmatel_spec *spec = codec->spec;
551
552 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
553 return 0;
554}
555
556static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
557 struct snd_ctl_elem_value *ucontrol)
558{
559 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
560 struct sigmatel_spec *spec = codec->spec;
561
562 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
563 spec->mono_nid, &spec->cur_mmux);
564}
565
5f10c4a9
ML		 566#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
567
568static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
569 struct snd_ctl_elem_value *ucontrol)
570{
571 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 572 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 573 struct sigmatel_spec *spec = codec->spec;
574
e1f0d669
MR		 575 ucontrol->value.integer.value[0] = !!(spec->aloopback &
576 (spec->aloopback_mask << idx));
5f10c4a9
ML		 577 return 0;
578}
579
580static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
581 struct snd_ctl_elem_value *ucontrol)
582{
583 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
584 struct sigmatel_spec *spec = codec->spec;
e1f0d669 585 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 586 unsigned int dac_mode;
e1f0d669 587 unsigned int val, idx_val;
5f10c4a9 588
e1f0d669
MR		 589 idx_val = spec->aloopback_mask << idx;
590 if (ucontrol->value.integer.value[0])
591 val = spec->aloopback | idx_val;
592 else
593 val = spec->aloopback & ~idx_val;
68ea7b2f 594 if (spec->aloopback == val)
5f10c4a9
ML		 595 return 0;
596
68ea7b2f 597 spec->aloopback = val;
5f10c4a9 598
e1f0d669
MR		 599 /* Only return the bits defined by the shift value of the
600 * first two bytes of the mask
601 */
5f10c4a9 602 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 603 kcontrol->private_value & 0xFFFF, 0x0);
604 dac_mode >>= spec->aloopback_shift;
5f10c4a9 605
e1f0d669 606 if (spec->aloopback & idx_val) {
5f10c4a9 607 snd_hda_power_up(codec);
e1f0d669 608 dac_mode |= idx_val;
5f10c4a9
ML		 609 } else {
610 snd_hda_power_down(codec);
e1f0d669 611 dac_mode &= ~idx_val;
5f10c4a9
ML		 612 }
613
614 snd_hda_codec_write_cache(codec, codec->afg, 0,
615 kcontrol->private_value >> 16, dac_mode);
616
617 return 1;
618}
619
c7d4b2fa 620static struct hda_verb stac9200_core_init[] = {
2f2f4251 621 /* set dac0mux for dac converter */
c7d4b2fa 622 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 623 {}
624};
625
1194b5b7
TI		 626static struct hda_verb stac9200_eapd_init[] = {
627 /* set dac0mux for dac converter */
628 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
629 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
630 {}
631};
632
e1f0d669
MR		 633static struct hda_verb stac92hd73xx_6ch_core_init[] = {
634 /* set master volume and direct control */
635 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
636 /* setup audio connections */
637 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
638 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
639 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
640 /* setup adcs to point to mixer */
641 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
642 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 643 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
644 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
645 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
646 /* setup import muxs */
647 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
648 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
649 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
650 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
651 {}
652};
653
d654a660
MR		 654static struct hda_verb dell_eq_core_init[] = {
655 /* set master volume to max value without distortion
656 * and direct control */
657 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
658 /* setup audio connections */
659 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
660 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
661 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
662 /* setup adcs to point to mixer */
663 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
664 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
665 /* setup import muxs */
666 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
667 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
668 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
669 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
670 {}
671};
672
52fe0f9d 673static struct hda_verb dell_m6_core_init[] = {
20f5f95d
MR		 674 /* set master volume to max value without distortion
675 * and direct control */
676 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
52fe0f9d 677 /* setup audio connections */
7747ecce
MR		 678 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
679 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 680 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
681 /* setup adcs to point to mixer */
682 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
683 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
684 /* setup import muxs */
685 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
686 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
687 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
688 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
689 {}
690};
691
e1f0d669
MR		 692static struct hda_verb stac92hd73xx_8ch_core_init[] = {
693 /* set master volume and direct control */
694 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
695 /* setup audio connections */
696 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
697 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
698 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
699 /* connect hp ports to dac3 */
700 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
701 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
702 /* setup adcs to point to mixer */
703 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
704 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 705 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
706 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
707 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
708 /* setup import muxs */
709 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
710 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
711 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
712 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
713 {}
714};
715
716static struct hda_verb stac92hd73xx_10ch_core_init[] = {
717 /* set master volume and direct control */
718 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
719 /* setup audio connections */
720 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
721 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
722 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
723 /* dac3 is connected to import3 mux */
724 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
725 /* connect hp ports to dac4 */
726 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
727 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
728 /* setup adcs to point to mixer */
729 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
730 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 731 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
732 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
733 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
734 /* setup import muxs */
735 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
736 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
737 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
738 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
739 {}
740};
741
d0513fc6
MR		 742static struct hda_verb stac92hd83xxx_core_init[] = {
743 /* start of config #1 */
744 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
745
746 /* start of config #2 */
747 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
748 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
749 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
750
751 /* power state controls amps */
752 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
753};
754
e035b841 755static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 756 /* set master volume and direct control */
757 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
758 /* connect headphone jack to dac1 */
759 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
760 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
761 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
762 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
763 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
764 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 765};
766
aafc4412 767#define HD_DISABLE_PORTF 3
541eee87 768static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 769 /* start of config #1 */
770
771 /* connect port 0f to audio mixer */
772 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
773 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
774 /* unmute right and left channels for node 0x0f */
775 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
776 /* start of config #2 */
777
e035b841
MR		 778 /* set master volume and direct control */
779 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
780 /* connect headphone jack to dac1 */
781 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 782 /* connect port 0d to audio mixer */
9b35947f 783 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
9b35947f
MR		 784 /* unmute dac0 input in audio mixer */
785 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
aafc4412 786 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 787 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
788 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 789 {}
790};
791
8e21c34c
TD		 792static struct hda_verb stac925x_core_init[] = {
793 /* set dac0mux for dac converter */
794 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
795 {}
796};
797
c7d4b2fa 798static struct hda_verb stac922x_core_init[] = {
2f2f4251 799 /* set master volume and direct control */
c7d4b2fa 800 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 801 {}
802};
803
93ed1503 804static struct hda_verb d965_core_init[] = {
19039bd0 805 /* set master volume and direct control */
93ed1503 806 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 807 /* unmute node 0x1b */
808 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
809 /* select node 0x03 as DAC */
810 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
811 {}
812};
813
3cc08dc6
MP		 814static struct hda_verb stac927x_core_init[] = {
815 /* set master volume and direct control */
816 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 817 /* enable analog pc beep path */
818 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 819 {}
820};
821
f3302a59
MP		 822static struct hda_verb stac9205_core_init[] = {
823 /* set master volume and direct control */
824 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 825 /* enable analog pc beep path */
826 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 827 {}
828};
829
b22b4821
MR		 830#define STAC_MONO_MUX \
831 { \
832 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
833 .name = "Mono Mux", \
834 .count = 1, \
835 .info = stac92xx_mono_mux_enum_info, \
836 .get = stac92xx_mono_mux_enum_get, \
837 .put = stac92xx_mono_mux_enum_put, \
838 }
839
9e05b7a3 840#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 841 { \
842 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
843 .name = "Input Source", \
9e05b7a3 844 .count = cnt, \
ca7c5a8b
ML		 845 .info = stac92xx_mux_enum_info, \
846 .get = stac92xx_mux_enum_get, \
847 .put = stac92xx_mux_enum_put, \
848 }
849
e1f0d669 850#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 851 { \
852 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
853 .name = "Analog Loopback", \
e1f0d669 854 .count = cnt, \
5f10c4a9
ML		 855 .info = stac92xx_aloopback_info, \
856 .get = stac92xx_aloopback_get, \
857 .put = stac92xx_aloopback_put, \
858 .private_value = verb_read | (verb_write << 16), \
859 }
860
c8b6bf9b 861static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 862 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
863 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 864 STAC_INPUT_SOURCE(1),
2f2f4251
M		 865 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
866 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 867 { } /* end */
868};
869
e1f0d669 870static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 871 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
872
e1f0d669
MR		 873 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
874 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
875
876 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
877 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
878
879 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
880 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
881
882 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
883 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
884
885 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
886 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
887
888 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
889 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
890
891 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
892 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
893 { } /* end */
894};
895
896static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 897 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
898
e1f0d669
MR		 899 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
900 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
901
902 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
903 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
904
905 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
906 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
907
908 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
909 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
910
911 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
912 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
913
914 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
915 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
916
917 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
918 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
919 { } /* end */
920};
921
922static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 923 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
924
e1f0d669
MR		 925 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
926 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
927
928 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
929 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
930
931 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
932 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
933
934 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
935 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
936
937 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
938 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
939
940 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
941 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
942
943 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
944 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
945 { } /* end */
946};
947
d0513fc6
MR		 948
949static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
950 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
951 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
952
953 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
954 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
955
956 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
957 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
958
959 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
960 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
961
962 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
963 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
964
965 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
966 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
967
968 /*
969 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
970 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
971 */
972 { } /* end */
973};
974
541eee87 975static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 976 STAC_INPUT_SOURCE(2),
e035b841 977
9b35947f
MR		 978 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
979 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 980
981 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
982 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 983 /* analog pc-beep replaced with digital beep support */
984 /*
f7c5dda2
MR		 985 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
986 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 987 */
f7c5dda2 988
9b35947f
MR		 989 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
990 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 991 { } /* end */
992};
993
541eee87 994static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 995 STAC_INPUT_SOURCE(2),
996 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
997
541eee87
MR		 998 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
999 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1000
1001 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1002 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1003 { } /* end */
1004};
1005
8e21c34c 1006static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1007 STAC_INPUT_SOURCE(1),
8e21c34c 1008 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1009 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1010 { } /* end */
1011};
1012
9e05b7a3 1013static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1014 STAC_INPUT_SOURCE(2),
e1f0d669 1015 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1016
1017 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1018 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1019
1020 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1021 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1022 { } /* end */
1023};
1024
19039bd0 1025/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1026static struct snd_kcontrol_new stac922x_mixer[] = {
1027 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1028 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1029 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1030
1031 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1032 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1033 { } /* end */
1034};
1035
9e05b7a3 1036
d1d985f0 1037static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1038 STAC_INPUT_SOURCE(3),
e1f0d669 1039 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1040
9e05b7a3
ML		 1041 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1042 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1043
1044 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1045 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1046
1047 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1048 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1049 { } /* end */
1050};
1051
1697055e
TI		 1052static struct snd_kcontrol_new stac_dmux_mixer = {
1053 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1054 .name = "Digital Input Source",
1055 /* count set later */
1056 .info = stac92xx_dmux_enum_info,
1057 .get = stac92xx_dmux_enum_get,
1058 .put = stac92xx_dmux_enum_put,
1059};
1060
d9737751
MR		 1061static struct snd_kcontrol_new stac_smux_mixer = {
1062 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1063 .name = "IEC958 Playback Source",
d9737751
MR		 1064 /* count set later */
1065 .info = stac92xx_smux_enum_info,
1066 .get = stac92xx_smux_enum_get,
1067 .put = stac92xx_smux_enum_put,
1068};
1069
2134ea4f
TI		 1070static const char *slave_vols[] = {
1071 "Front Playback Volume",
1072 "Surround Playback Volume",
1073 "Center Playback Volume",
1074 "LFE Playback Volume",
1075 "Side Playback Volume",
1076 "Headphone Playback Volume",
1077 "Headphone Playback Volume",
1078 "Speaker Playback Volume",
1079 "External Speaker Playback Volume",
1080 "Speaker2 Playback Volume",
1081 NULL
1082};
1083
1084static const char *slave_sws[] = {
1085 "Front Playback Switch",
1086 "Surround Playback Switch",
1087 "Center Playback Switch",
1088 "LFE Playback Switch",
1089 "Side Playback Switch",
1090 "Headphone Playback Switch",
1091 "Headphone Playback Switch",
1092 "Speaker Playback Switch",
1093 "External Speaker Playback Switch",
1094 "Speaker2 Playback Switch",
edb54a55 1095 "IEC958 Playback Switch",
2134ea4f
TI		 1096 NULL
1097};
1098
2f2f4251
M		 1099static int stac92xx_build_controls(struct hda_codec *codec)
1100{
1101 struct sigmatel_spec *spec = codec->spec;
1102 int err;
c7d4b2fa 1103 int i;
2f2f4251
M		 1104
1105 err = snd_hda_add_new_ctls(codec, spec->mixer);
1106 if (err < 0)
1107 return err;
c7d4b2fa
M		 1108
1109 for (i = 0; i < spec->num_mixers; i++) {
1110 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1111 if (err < 0)
1112 return err;
1113 }
1697055e
TI		 1114 if (spec->num_dmuxes > 0) {
1115 stac_dmux_mixer.count = spec->num_dmuxes;
1116 err = snd_ctl_add(codec->bus->card,
1117 snd_ctl_new1(&stac_dmux_mixer, codec));
1118 if (err < 0)
1119 return err;
1120 }
d9737751
MR		 1121 if (spec->num_smuxes > 0) {
1122 stac_smux_mixer.count = spec->num_smuxes;
1123 err = snd_ctl_add(codec->bus->card,
1124 snd_ctl_new1(&stac_smux_mixer, codec));
1125 if (err < 0)
1126 return err;
1127 }
c7d4b2fa 1128
dabbed6f
M		 1129 if (spec->multiout.dig_out_nid) {
1130 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1131 if (err < 0)
1132 return err;
9a08160b
TI		 1133 err = snd_hda_create_spdif_share_sw(codec,
1134 &spec->multiout);
1135 if (err < 0)
1136 return err;
1137 spec->multiout.share_spdif = 1;
dabbed6f
M		 1138 }
1139 if (spec->dig_in_nid) {
1140 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1141 if (err < 0)
1142 return err;
1143 }
2134ea4f
TI		 1144
1145 /* if we have no master control, let's create it */
1146 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1147 unsigned int vmaster_tlv[4];
2134ea4f 1148 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1149 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1150 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1151 vmaster_tlv, slave_vols);
2134ea4f
TI		 1152 if (err < 0)
1153 return err;
1154 }
1155 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1156 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1157 NULL, slave_sws);
1158 if (err < 0)
1159 return err;
1160 }
1161
dabbed6f 1162 return 0;
2f2f4251
M		 1163}
1164
403d1944 1165static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1166 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1167 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1168};
1169
dfe495d0
TI		 1170/*
1171 STAC 9200 pin configs for
1172 102801A8
1173 102801DE
1174 102801E8
1175*/
1176static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1177 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1178 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1179};
1180
1181/*
1182 STAC 9200 pin configs for
1183 102801C0
1184 102801C1
1185*/
1186static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1187 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1188 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1189};
1190
1191/*
1192 STAC 9200 pin configs for
1193 102801C4 (Dell Dimension E310)
1194 102801C5
1195 102801C7
1196 102801D9
1197 102801DA
1198 102801E3
1199*/
1200static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1201 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1202 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1203};
1204
1205
1206/*
1207 STAC 9200-32 pin configs for
1208 102801B5 (Dell Inspiron 630m)
1209 102801D8 (Dell Inspiron 640m)
1210*/
1211static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1212 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1213 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1214};
1215
1216/*
1217 STAC 9200-32 pin configs for
1218 102801C2 (Dell Latitude D620)
1219 102801C8
1220 102801CC (Dell Latitude D820)
1221 102801D4
1222 102801D6
1223*/
1224static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1225 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1226 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1227};
1228
1229/*
1230 STAC 9200-32 pin configs for
1231 102801CE (Dell XPS M1710)
1232 102801CF (Dell Precision M90)
1233*/
1234static unsigned int dell9200_m23_pin_configs[8] = {
1235 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1236 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1237};
1238
1239/*
1240 STAC 9200-32 pin configs for
1241 102801C9
1242 102801CA
1243 102801CB (Dell Latitude 120L)
1244 102801D3
1245*/
1246static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1247 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1248 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1249};
1250
1251/*
1252 STAC 9200-32 pin configs for
1253 102801BD (Dell Inspiron E1505n)
1254 102801EE
1255 102801EF
1256*/
1257static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1258 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1259 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1260};
1261
1262/*
1263 STAC 9200-32 pin configs for
1264 102801F5 (Dell Inspiron 1501)
1265 102801F6
1266*/
1267static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1268 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1269 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1270};
1271
1272/*
1273 STAC 9200-32
1274 102801CD (Dell Inspiron E1705/9400)
1275*/
1276static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1277 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1278 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1279};
1280
bf277785
TD		 1281static unsigned int oqo9200_pin_configs[8] = {
1282 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1283 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1284};
1285
dfe495d0 1286
f5fcc13c
TI		 1287static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1288 [STAC_REF] = ref9200_pin_configs,
bf277785 1289 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1290 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1291 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1292 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1293 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1294 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1295 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1296 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1297 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1298 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1299 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1300 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1301};
1302
f5fcc13c
TI		 1303static const char *stac9200_models[STAC_9200_MODELS] = {
1304 [STAC_REF] = "ref",
bf277785 1305 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1306 [STAC_9200_DELL_D21] = "dell-d21",
1307 [STAC_9200_DELL_D22] = "dell-d22",
1308 [STAC_9200_DELL_D23] = "dell-d23",
1309 [STAC_9200_DELL_M21] = "dell-m21",
1310 [STAC_9200_DELL_M22] = "dell-m22",
1311 [STAC_9200_DELL_M23] = "dell-m23",
1312 [STAC_9200_DELL_M24] = "dell-m24",
1313 [STAC_9200_DELL_M25] = "dell-m25",
1314 [STAC_9200_DELL_M26] = "dell-m26",
1315 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1316 [STAC_9200_GATEWAY] = "gateway",
117f257d 1317 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1318};
1319
1320static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1321 /* SigmaTel reference board */
1322 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1323 "DFI LanParty", STAC_REF),
e7377071 1324 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1325 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1326 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1327 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1328 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1329 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1330 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1331 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1332 "unknown Dell", STAC_9200_DELL_D22),
1333 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1334 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1335 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1336 "Dell Latitude D620", STAC_9200_DELL_M22),
1337 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1338 "unknown Dell", STAC_9200_DELL_D23),
1339 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1340 "unknown Dell", STAC_9200_DELL_D23),
1341 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1342 "unknown Dell", STAC_9200_DELL_M22),
1343 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1344 "unknown Dell", STAC_9200_DELL_M24),
1345 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1346 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1347 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1348 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1349 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1350 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1351 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1352 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1353 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1354 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1355 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1356 "Dell Precision M90", STAC_9200_DELL_M23),
1357 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1358 "unknown Dell", STAC_9200_DELL_M22),
1359 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1360 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1361 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1362 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1363 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1364 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1365 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1366 "unknown Dell", STAC_9200_DELL_D23),
1367 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1368 "unknown Dell", STAC_9200_DELL_D23),
1369 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1370 "unknown Dell", STAC_9200_DELL_D21),
1371 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1372 "unknown Dell", STAC_9200_DELL_D23),
1373 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1374 "unknown Dell", STAC_9200_DELL_D21),
1375 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1376 "unknown Dell", STAC_9200_DELL_M25),
1377 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1378 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1379 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1380 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1381 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1382 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1383 /* Panasonic */
117f257d 1384 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1385 /* Gateway machines needs EAPD to be set on resume */
1386 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1387 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1388 STAC_9200_GATEWAY),
1389 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1390 STAC_9200_GATEWAY),
bf277785
TD		 1391 /* OQO Mobile */
1392 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1393 {} /* terminator */
1394};
1395
8e21c34c
TD		 1396static unsigned int ref925x_pin_configs[8] = {
1397 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1398 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1399};
1400
1401static unsigned int stac925x_MA6_pin_configs[8] = {
1402 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1403 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1404};
1405
2c11f955
TD		 1406static unsigned int stac925x_PA6_pin_configs[8] = {
1407 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1408 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1409};
1410
8e21c34c 1411static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1412 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1413 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1414};
1415
1416static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1417 [STAC_REF] = ref925x_pin_configs,
1418 [STAC_M2_2] = stac925xM2_2_pin_configs,
1419 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1420 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1421};
1422
1423static const char *stac925x_models[STAC_925x_MODELS] = {
1424 [STAC_REF] = "ref",
1425 [STAC_M2_2] = "m2-2",
1426 [STAC_MA6] = "m6",
2c11f955 1427 [STAC_PA6] = "pa6",
8e21c34c
TD		 1428};
1429
1430static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1431 /* SigmaTel reference board */
1432 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1433 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1434 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1435 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1436 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1437 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1438 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1439 {} /* terminator */
1440};
1441
a7662640 1442static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1443 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1444 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1445 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1446 0x01452050,
1447};
1448
1449static unsigned int dell_m6_pin_configs[13] = {
1450 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1451 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1452 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1453 0x4f0000f0,
e1f0d669
MR		 1454};
1455
1456static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1457 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1458 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1459};
1460
1461static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1462 [STAC_92HD73XX_REF] = "ref",
a7662640 1463 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1464};
1465
1466static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1467 /* SigmaTel reference board */
1468 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1469 "DFI LanParty", STAC_92HD73XX_REF),
1470 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1471 "unknown Dell", STAC_DELL_M6),
1472 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1473 "unknown Dell", STAC_DELL_M6),
1474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1475 "unknown Dell", STAC_DELL_M6),
1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1477 "unknown Dell", STAC_DELL_M6),
1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1479 "unknown Dell", STAC_DELL_M6),
1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1481 "unknown Dell", STAC_DELL_M6),
1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1483 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1484 {} /* terminator */
1485};
1486
d0513fc6
MR		 1487static unsigned int ref92hd83xxx_pin_configs[14] = {
1488 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1489 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1490 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1491 0x01451160, 0x98560170,
1492};
1493
1494static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1495 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1496};
1497
1498static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1499 [STAC_92HD83XXX_REF] = "ref",
1500};
1501
1502static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1503 /* SigmaTel reference board */
1504 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1505 "DFI LanParty", STAC_92HD71BXX_REF),
1506};
1507
0ffa9807 1508static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1509 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1510 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
0ffa9807 1511 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1512};
1513
0ffa9807 1514static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1515 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1516 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1517 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1518};
1519
0ffa9807 1520static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1521 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1522 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1523 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1524};
1525
e035b841
MR		 1526static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1527 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1528 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1529 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
e035b841
MR		 1530};
1531
1532static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1533 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1534 [STAC_DELL_M4_1] = "dell-m4-1",
1535 [STAC_DELL_M4_2] = "dell-m4-2",
e035b841
MR		 1536};
1537
1538static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1539 /* SigmaTel reference board */
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1541 "DFI LanParty", STAC_92HD71BXX_REF),
a7662640
MR		 1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1543 "unknown Dell", STAC_DELL_M4_1),
1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1545 "unknown Dell", STAC_DELL_M4_1),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1547 "unknown Dell", STAC_DELL_M4_1),
1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1549 "unknown Dell", STAC_DELL_M4_1),
1550 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1551 "unknown Dell", STAC_DELL_M4_1),
1552 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1553 "unknown Dell", STAC_DELL_M4_1),
1554 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1555 "unknown Dell", STAC_DELL_M4_1),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1557 "unknown Dell", STAC_DELL_M4_2),
1558 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1559 "unknown Dell", STAC_DELL_M4_2),
1560 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1561 "unknown Dell", STAC_DELL_M4_2),
1562 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1563 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1564 {} /* terminator */
1565};
1566
403d1944
MP		 1567static unsigned int ref922x_pin_configs[10] = {
1568 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1569 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1570 0x40000100, 0x40000100,
1571};
1572
dfe495d0
TI		 1573/*
1574 STAC 922X pin configs for
1575 102801A7
1576 102801AB
1577 102801A9
1578 102801D1
1579 102801D2
1580*/
1581static unsigned int dell_922x_d81_pin_configs[10] = {
1582 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1583 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1584 0x01813122, 0x400001f2,
1585};
1586
1587/*
1588 STAC 922X pin configs for
1589 102801AC
1590 102801D0
1591*/
1592static unsigned int dell_922x_d82_pin_configs[10] = {
1593 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1594 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1595 0x01813122, 0x400001f1,
1596};
1597
1598/*
1599 STAC 922X pin configs for
1600 102801BF
1601*/
1602static unsigned int dell_922x_m81_pin_configs[10] = {
1603 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1604 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1605 0x40C003f1, 0x405003f0,
1606};
1607
1608/*
1609 STAC 9221 A1 pin configs for
1610 102801D7 (Dell XPS M1210)
1611*/
1612static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1613 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1614 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1615 0x508003f3, 0x405003f4,
1616};
1617
403d1944 1618static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1619 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1620 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1621 0x02a19120, 0x40000100,
1622};
1623
1624static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1625 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1626 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1627 0x02a19320, 0x40000100,
1628};
1629
5d5d3bc3
IZ		 1630static unsigned int intel_mac_v1_pin_configs[10] = {
1631 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1632 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1633 0x400000fc, 0x400000fb,
1634};
1635
1636static unsigned int intel_mac_v2_pin_configs[10] = {
1637 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1638 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1639 0x400000fc, 0x400000fb,
6f0778d8
NB		 1640};
1641
5d5d3bc3
IZ		 1642static unsigned int intel_mac_v3_pin_configs[10] = {
1643 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1644 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1645 0x400000fc, 0x400000fb,
1646};
1647
5d5d3bc3
IZ		 1648static unsigned int intel_mac_v4_pin_configs[10] = {
1649 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1650 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1651 0x400000fc, 0x400000fb,
1652};
1653
5d5d3bc3
IZ		 1654static unsigned int intel_mac_v5_pin_configs[10] = {
1655 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1656 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1657 0x400000fc, 0x400000fb,
0dae0f83
TI		 1658};
1659
8c650087
MCC		 1660static unsigned int ecs202_pin_configs[10] = {
1661 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1662 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1663 0x9037012e, 0x40e000f2,
1664};
76c08828 1665
19039bd0 1666static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1667 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1668 [STAC_D945GTP3] = d945gtp3_pin_configs,
1669 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1670 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1671 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1672 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1673 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1674 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1675 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1676 /* for backward compatibility */
5d5d3bc3
IZ		 1677 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1678 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1679 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1680 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1681 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1682 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1683 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1684 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1685 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1686 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1687 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1688};
1689
f5fcc13c
TI		 1690static const char *stac922x_models[STAC_922X_MODELS] = {
1691 [STAC_D945_REF] = "ref",
1692 [STAC_D945GTP5] = "5stack",
1693 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1694 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1695 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1696 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1697 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1698 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1699 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1700 /* for backward compatibility */
f5fcc13c 1701 [STAC_MACMINI] = "macmini",
3fc24d85 1702 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1703 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1704 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1705 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1706 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1707 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1708 [STAC_922X_DELL_D81] = "dell-d81",
1709 [STAC_922X_DELL_D82] = "dell-d82",
1710 [STAC_922X_DELL_M81] = "dell-m81",
1711 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1712};
1713
1714static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1715 /* SigmaTel reference board */
1716 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1717 "DFI LanParty", STAC_D945_REF),
1718 /* Intel 945G based systems */
1719 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1720 "Intel D945G", STAC_D945GTP3),
1721 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1722 "Intel D945G", STAC_D945GTP3),
1723 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1724 "Intel D945G", STAC_D945GTP3),
1725 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1726 "Intel D945G", STAC_D945GTP3),
1727 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1728 "Intel D945G", STAC_D945GTP3),
1729 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1730 "Intel D945G", STAC_D945GTP3),
1731 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1732 "Intel D945G", STAC_D945GTP3),
1733 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1734 "Intel D945G", STAC_D945GTP3),
1735 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1736 "Intel D945G", STAC_D945GTP3),
1737 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1738 "Intel D945G", STAC_D945GTP3),
1739 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1740 "Intel D945G", STAC_D945GTP3),
1741 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1742 "Intel D945G", STAC_D945GTP3),
1743 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1744 "Intel D945G", STAC_D945GTP3),
1745 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1746 "Intel D945G", STAC_D945GTP3),
1747 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1748 "Intel D945G", STAC_D945GTP3),
1749 /* Intel D945G 5-stack systems */
1750 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1751 "Intel D945G", STAC_D945GTP5),
1752 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1753 "Intel D945G", STAC_D945GTP5),
1754 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1755 "Intel D945G", STAC_D945GTP5),
1756 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1757 "Intel D945G", STAC_D945GTP5),
1758 /* Intel 945P based systems */
1759 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1760 "Intel D945P", STAC_D945GTP3),
1761 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1762 "Intel D945P", STAC_D945GTP3),
1763 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1764 "Intel D945P", STAC_D945GTP3),
1765 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1766 "Intel D945P", STAC_D945GTP3),
1767 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1768 "Intel D945P", STAC_D945GTP3),
1769 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1770 "Intel D945P", STAC_D945GTP5),
1771 /* other systems */
536319af 1772 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1773 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1774 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1775 /* Dell systems */
1776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1777 "unknown Dell", STAC_922X_DELL_D81),
1778 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1779 "unknown Dell", STAC_922X_DELL_D81),
1780 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1781 "unknown Dell", STAC_922X_DELL_D81),
1782 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1783 "unknown Dell", STAC_922X_DELL_D82),
1784 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1785 "unknown Dell", STAC_922X_DELL_M81),
1786 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1787 "unknown Dell", STAC_922X_DELL_D82),
1788 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1789 "unknown Dell", STAC_922X_DELL_D81),
1790 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1791 "unknown Dell", STAC_922X_DELL_D81),
1792 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1793 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1794 /* ECS/PC Chips boards */
1795 SND_PCI_QUIRK(0x1019, 0x2144,
1796 "ECS/PC chips", STAC_ECS_202),
1797 SND_PCI_QUIRK(0x1019, 0x2608,
1798 "ECS/PC chips", STAC_ECS_202),
1799 SND_PCI_QUIRK(0x1019, 0x2633,
1800 "ECS/PC chips P17G/1333", STAC_ECS_202),
1801 SND_PCI_QUIRK(0x1019, 0x2811,
1802 "ECS/PC chips", STAC_ECS_202),
1803 SND_PCI_QUIRK(0x1019, 0x2812,
1804 "ECS/PC chips", STAC_ECS_202),
1805 SND_PCI_QUIRK(0x1019, 0x2813,
1806 "ECS/PC chips", STAC_ECS_202),
1807 SND_PCI_QUIRK(0x1019, 0x2814,
1808 "ECS/PC chips", STAC_ECS_202),
1809 SND_PCI_QUIRK(0x1019, 0x2815,
1810 "ECS/PC chips", STAC_ECS_202),
1811 SND_PCI_QUIRK(0x1019, 0x2816,
1812 "ECS/PC chips", STAC_ECS_202),
1813 SND_PCI_QUIRK(0x1019, 0x2817,
1814 "ECS/PC chips", STAC_ECS_202),
1815 SND_PCI_QUIRK(0x1019, 0x2818,
1816 "ECS/PC chips", STAC_ECS_202),
1817 SND_PCI_QUIRK(0x1019, 0x2819,
1818 "ECS/PC chips", STAC_ECS_202),
1819 SND_PCI_QUIRK(0x1019, 0x2820,
1820 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 1821 {} /* terminator */
1822};
1823
3cc08dc6 1824static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1825 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1826 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1827 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1828 0x01c42190, 0x40000100,
3cc08dc6
MP		 1829};
1830
93ed1503 1831static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1832 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1833 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1834 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1835 0x40000100, 0x40000100
1836};
1837
93ed1503
TD		 1838static unsigned int d965_5st_pin_configs[14] = {
1839 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1840 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1841 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1842 0x40000100, 0x40000100
1843};
1844
4ff076e5
TD		 1845static unsigned int dell_3st_pin_configs[14] = {
1846 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1847 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1848 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1849 0x40c003fc, 0x40000100
1850};
1851
93ed1503 1852static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1853 [STAC_D965_REF] = ref927x_pin_configs,
1854 [STAC_D965_3ST] = d965_3st_pin_configs,
1855 [STAC_D965_5ST] = d965_5st_pin_configs,
1856 [STAC_DELL_3ST] = dell_3st_pin_configs,
1857 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1858};
1859
f5fcc13c 1860static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1861 [STAC_D965_REF] = "ref",
1862 [STAC_D965_3ST] = "3stack",
1863 [STAC_D965_5ST] = "5stack",
1864 [STAC_DELL_3ST] = "dell-3stack",
1865 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1866};
1867
1868static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1869 /* SigmaTel reference board */
1870 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1871 "DFI LanParty", STAC_D965_REF),
81d3dbde 1872 /* Intel 946 based systems */
f5fcc13c
TI		 1873 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1874 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1875 /* 965 based 3 stack systems */
f5fcc13c
TI		 1876 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1877 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1878 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1879 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1880 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1881 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1882 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1883 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1884 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1885 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1886 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1887 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1888 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1889 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1890 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1891 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1892 /* Dell 3 stack systems */
8e9068b1 1893 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1894 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1895 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1896 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1897 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1898 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1899 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 1900 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 1901 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 1902 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1903 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1904 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1905 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1906 /* 965 based 5 stack systems */
f5fcc13c
TI		 1907 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1908 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1909 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1910 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1911 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1912 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1913 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1914 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1915 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1916 {} /* terminator */
1917};
1918
f3302a59
MP		 1919static unsigned int ref9205_pin_configs[12] = {
1920 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1921 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1922 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1923};
1924
dfe495d0
TI		 1925/*
1926 STAC 9205 pin configs for
1927 102801F1
1928 102801F2
1929 102801FC
1930 102801FD
1931 10280204
1932 1028021F
3fa2ef74 1933 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1934*/
1935static unsigned int dell_9205_m42_pin_configs[12] = {
1936 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1937 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1938 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1939};
1940
1941/*
1942 STAC 9205 pin configs for
1943 102801F9
1944 102801FA
1945 102801FE
1946 102801FF (Dell Precision M4300)
1947 10280206
1948 10280200
1949 10280201
1950*/
1951static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1952 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1953 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1954 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1955};
1956
dfe495d0 1957static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1958 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1959 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1960 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1961};
1962
f5fcc13c 1963static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1964 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1965 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1966 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1967 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1968};
1969
f5fcc13c
TI		 1970static const char *stac9205_models[STAC_9205_MODELS] = {
1971 [STAC_9205_REF] = "ref",
dfe495d0 1972 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1973 [STAC_9205_DELL_M43] = "dell-m43",
1974 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1975};
1976
1977static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1978 /* SigmaTel reference board */
1979 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1980 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1981 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1982 "unknown Dell", STAC_9205_DELL_M42),
1983 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1984 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1985 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 1986 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1987 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1988 "Dell Precision", STAC_9205_DELL_M43),
1989 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1990 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1991 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1992 "unknown Dell", STAC_9205_DELL_M42),
1993 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1994 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1995 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1996 "Dell Precision", STAC_9205_DELL_M43),
1997 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1998 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 1999 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2000 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2001 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2002 "Dell Precision", STAC_9205_DELL_M43),
2003 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2004 "Dell Precision", STAC_9205_DELL_M43),
2005 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2006 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2007 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2008 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2009 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2010 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2011 {} /* terminator */
2012};
2013
11b44bbd
RF		 2014static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2015{
2016 int i;
2017 struct sigmatel_spec *spec = codec->spec;
2018
2019 if (! spec->bios_pin_configs) {
2020 spec->bios_pin_configs = kcalloc(spec->num_pins,
2021 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
2022 if (! spec->bios_pin_configs)
2023 return -ENOMEM;
2024 }
2025
2026 for (i = 0; i < spec->num_pins; i++) {
2027 hda_nid_t nid = spec->pin_nids[i];
2028 unsigned int pin_cfg;
2029
2030 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2031 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2032 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2033 nid, pin_cfg);
2034 spec->bios_pin_configs[i] = pin_cfg;
2035 }
2036
2037 return 0;
2038}
2039
87d48363
MR		 2040static void stac92xx_set_config_reg(struct hda_codec *codec,
2041 hda_nid_t pin_nid, unsigned int pin_config)
2042{
2043 int i;
2044 snd_hda_codec_write(codec, pin_nid, 0,
2045 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2046 pin_config & 0x000000ff);
2047 snd_hda_codec_write(codec, pin_nid, 0,
2048 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2049 (pin_config & 0x0000ff00) >> 8);
2050 snd_hda_codec_write(codec, pin_nid, 0,
2051 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2052 (pin_config & 0x00ff0000) >> 16);
2053 snd_hda_codec_write(codec, pin_nid, 0,
2054 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2055 pin_config >> 24);
2056 i = snd_hda_codec_read(codec, pin_nid, 0,
2057 AC_VERB_GET_CONFIG_DEFAULT,
2058 0x00);
2059 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2060 pin_nid, i);
2061}
2062
2f2f4251
M		 2063static void stac92xx_set_config_regs(struct hda_codec *codec)
2064{
2065 int i;
2066 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2067
87d48363
MR		 2068 if (!spec->pin_configs)
2069 return;
11b44bbd 2070
87d48363
MR		 2071 for (i = 0; i < spec->num_pins; i++)
2072 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2073 spec->pin_configs[i]);
2f2f4251 2074}
2f2f4251 2075
dabbed6f 2076/*
c7d4b2fa 2077 * Analog playback callbacks
dabbed6f 2078 */
c7d4b2fa
M		 2079static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2080 struct hda_codec *codec,
c8b6bf9b 2081 struct snd_pcm_substream *substream)
2f2f4251 2082{
dabbed6f 2083 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2084 if (spec->stream_delay)
2085 msleep(spec->stream_delay);
9a08160b
TI		 2086 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2087 hinfo);
2f2f4251
M		 2088}
2089
2f2f4251
M		 2090static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2091 struct hda_codec *codec,
2092 unsigned int stream_tag,
2093 unsigned int format,
c8b6bf9b 2094 struct snd_pcm_substream *substream)
2f2f4251
M		 2095{
2096 struct sigmatel_spec *spec = codec->spec;
403d1944 2097 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2098}
2099
2100static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2101 struct hda_codec *codec,
c8b6bf9b 2102 struct snd_pcm_substream *substream)
2f2f4251
M		 2103{
2104 struct sigmatel_spec *spec = codec->spec;
2105 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2106}
2107
dabbed6f
M		 2108/*
2109 * Digital playback callbacks
2110 */
2111static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2112 struct hda_codec *codec,
c8b6bf9b 2113 struct snd_pcm_substream *substream)
dabbed6f
M		 2114{
2115 struct sigmatel_spec *spec = codec->spec;
2116 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2117}
2118
2119static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2120 struct hda_codec *codec,
c8b6bf9b 2121 struct snd_pcm_substream *substream)
dabbed6f
M		 2122{
2123 struct sigmatel_spec *spec = codec->spec;
2124 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2125}
2126
6b97eb45
TI		 2127static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2128 struct hda_codec *codec,
2129 unsigned int stream_tag,
2130 unsigned int format,
2131 struct snd_pcm_substream *substream)
2132{
2133 struct sigmatel_spec *spec = codec->spec;
2134 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2135 stream_tag, format, substream);
2136}
2137
dabbed6f 2138
2f2f4251
M		 2139/*
2140 * Analog capture callbacks
2141 */
2142static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2143 struct hda_codec *codec,
2144 unsigned int stream_tag,
2145 unsigned int format,
c8b6bf9b 2146 struct snd_pcm_substream *substream)
2f2f4251
M		 2147{
2148 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2149 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2150
8daaaa97
MR		 2151 if (spec->powerdown_adcs) {
2152 msleep(40);
2153 snd_hda_codec_write_cache(codec, nid, 0,
2154 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2155 }
2156 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2157 return 0;
2158}
2159
2160static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2161 struct hda_codec *codec,
c8b6bf9b 2162 struct snd_pcm_substream *substream)
2f2f4251
M		 2163{
2164 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2165 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2166
8daaaa97
MR		 2167 snd_hda_codec_cleanup_stream(codec, nid);
2168 if (spec->powerdown_adcs)
2169 snd_hda_codec_write_cache(codec, nid, 0,
2170 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2171 return 0;
2172}
2173
dabbed6f
M		 2174static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2175 .substreams = 1,
2176 .channels_min = 2,
2177 .channels_max = 2,
2178 /* NID is set in stac92xx_build_pcms */
2179 .ops = {
2180 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2181 .close = stac92xx_dig_playback_pcm_close,
2182 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2183 },
2184};
2185
2186static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2187 .substreams = 1,
2188 .channels_min = 2,
2189 .channels_max = 2,
2190 /* NID is set in stac92xx_build_pcms */
2191};
2192
2f2f4251
M		 2193static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2194 .substreams = 1,
2195 .channels_min = 2,
c7d4b2fa 2196 .channels_max = 8,
2f2f4251
M		 2197 .nid = 0x02, /* NID to query formats and rates */
2198 .ops = {
2199 .open = stac92xx_playback_pcm_open,
2200 .prepare = stac92xx_playback_pcm_prepare,
2201 .cleanup = stac92xx_playback_pcm_cleanup
2202 },
2203};
2204
3cc08dc6
MP		 2205static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2206 .substreams = 1,
2207 .channels_min = 2,
2208 .channels_max = 2,
2209 .nid = 0x06, /* NID to query formats and rates */
2210 .ops = {
2211 .open = stac92xx_playback_pcm_open,
2212 .prepare = stac92xx_playback_pcm_prepare,
2213 .cleanup = stac92xx_playback_pcm_cleanup
2214 },
2215};
2216
2f2f4251 2217static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2218 .channels_min = 2,
2219 .channels_max = 2,
9e05b7a3 2220 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2221 .ops = {
2222 .prepare = stac92xx_capture_pcm_prepare,
2223 .cleanup = stac92xx_capture_pcm_cleanup
2224 },
2225};
2226
2227static int stac92xx_build_pcms(struct hda_codec *codec)
2228{
2229 struct sigmatel_spec *spec = codec->spec;
2230 struct hda_pcm *info = spec->pcm_rec;
2231
2232 codec->num_pcms = 1;
2233 codec->pcm_info = info;
2234
c7d4b2fa 2235 info->name = "STAC92xx Analog";
2f2f4251 2236 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2237 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2238 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2239 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2240
2241 if (spec->alt_switch) {
2242 codec->num_pcms++;
2243 info++;
2244 info->name = "STAC92xx Analog Alt";
2245 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2246 }
2f2f4251 2247
dabbed6f
M		 2248 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2249 codec->num_pcms++;
2250 info++;
2251 info->name = "STAC92xx Digital";
7ba72ba1 2252 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2253 if (spec->multiout.dig_out_nid) {
2254 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2255 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2256 }
2257 if (spec->dig_in_nid) {
2258 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2259 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2260 }
2261 }
2262
2f2f4251
M		 2263 return 0;
2264}
2265
c960a03b
TI		 2266static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2267{
2268 unsigned int pincap = snd_hda_param_read(codec, nid,
2269 AC_PAR_PIN_CAP);
2270 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2271 if (pincap & AC_PINCAP_VREF_100)
2272 return AC_PINCTL_VREF_100;
2273 if (pincap & AC_PINCAP_VREF_80)
2274 return AC_PINCTL_VREF_80;
2275 if (pincap & AC_PINCAP_VREF_50)
2276 return AC_PINCTL_VREF_50;
2277 if (pincap & AC_PINCAP_VREF_GRD)
2278 return AC_PINCTL_VREF_GRD;
2279 return 0;
2280}
2281
403d1944
MP		 2282static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2283
2284{
82beb8fd
TI		 2285 snd_hda_codec_write_cache(codec, nid, 0,
2286 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2287}
2288
7c2ba97b
MR		 2289#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2290
2291static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2292 struct snd_ctl_elem_value *ucontrol)
2293{
2294 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2295 struct sigmatel_spec *spec = codec->spec;
2296
2297 ucontrol->value.integer.value[0] = spec->hp_switch;
2298 return 0;
2299}
2300
2301static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2302 struct snd_ctl_elem_value *ucontrol)
2303{
2304 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2305 struct sigmatel_spec *spec = codec->spec;
2306
2307 spec->hp_switch = ucontrol->value.integer.value[0];
2308
2309 /* check to be sure that the ports are upto date with
2310 * switch changes
2311 */
2312 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2313
2314 return 1;
2315}
2316
a5ce8890 2317#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2318
2319static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2320{
2321 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2322 struct sigmatel_spec *spec = codec->spec;
2323 int io_idx = kcontrol-> private_value & 0xff;
2324
2325 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2326 return 0;
2327}
2328
2329static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2330{
2331 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2332 struct sigmatel_spec *spec = codec->spec;
2333 hda_nid_t nid = kcontrol->private_value >> 8;
2334 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2335 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2336
2337 spec->io_switch[io_idx] = val;
2338
2339 if (val)
2340 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2341 else {
2342 unsigned int pinctl = AC_PINCTL_IN_EN;
2343 if (io_idx) /* set VREF for mic */
2344 pinctl |= stac92xx_get_vref(codec, nid);
2345 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2346 }
40c1d308
JZ		 2347
2348 /* check the auto-mute again: we need to mute/unmute the speaker
2349 * appropriately according to the pin direction
2350 */
2351 if (spec->hp_detect)
2352 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2353
403d1944
MP		 2354 return 1;
2355}
2356
0fb87bb4
ML		 2357#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2358
2359static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2360 struct snd_ctl_elem_value *ucontrol)
2361{
2362 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2363 struct sigmatel_spec *spec = codec->spec;
2364
2365 ucontrol->value.integer.value[0] = spec->clfe_swap;
2366 return 0;
2367}
2368
2369static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2370 struct snd_ctl_elem_value *ucontrol)
2371{
2372 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2373 struct sigmatel_spec *spec = codec->spec;
2374 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2375 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2376
68ea7b2f 2377 if (spec->clfe_swap == val)
0fb87bb4
ML		 2378 return 0;
2379
68ea7b2f 2380 spec->clfe_swap = val;
0fb87bb4
ML		 2381
2382 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2383 spec->clfe_swap ? 0x4 : 0x0);
2384
2385 return 1;
2386}
2387
7c2ba97b
MR		 2388#define STAC_CODEC_HP_SWITCH(xname) \
2389 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2390 .name = xname, \
2391 .index = 0, \
2392 .info = stac92xx_hp_switch_info, \
2393 .get = stac92xx_hp_switch_get, \
2394 .put = stac92xx_hp_switch_put, \
2395 }
2396
403d1944
MP		 2397#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2398 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2399 .name = xname, \
2400 .index = 0, \
2401 .info = stac92xx_io_switch_info, \
2402 .get = stac92xx_io_switch_get, \
2403 .put = stac92xx_io_switch_put, \
2404 .private_value = xpval, \
2405 }
2406
0fb87bb4
ML		 2407#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2408 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2409 .name = xname, \
2410 .index = 0, \
2411 .info = stac92xx_clfe_switch_info, \
2412 .get = stac92xx_clfe_switch_get, \
2413 .put = stac92xx_clfe_switch_put, \
2414 .private_value = xpval, \
2415 }
403d1944 2416
c7d4b2fa
M		 2417enum {
2418 STAC_CTL_WIDGET_VOL,
2419 STAC_CTL_WIDGET_MUTE,
09a99959 2420 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2421 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2422 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2423 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2424};
2425
c8b6bf9b 2426static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2427 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2428 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2429 STAC_MONO_MUX,
7c2ba97b 2430 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2431 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2432 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2433};
2434
2435/* add dynamic controls */
4682eee0
MR		 2436static int stac92xx_add_control_idx(struct sigmatel_spec *spec, int type,
2437 int idx, const char *name, unsigned long val)
c7d4b2fa 2438{
c8b6bf9b 2439 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2440
2441 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2442 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2443
2444 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2445 if (! knew)
2446 return -ENOMEM;
2447 if (spec->kctl_alloc) {
2448 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2449 kfree(spec->kctl_alloc);
2450 }
2451 spec->kctl_alloc = knew;
2452 spec->num_kctl_alloc = num;
2453 }
2454
2455 knew = &spec->kctl_alloc[spec->num_kctl_used];
2456 *knew = stac92xx_control_templates[type];
4682eee0 2457 knew->index = idx;
82fe0c58 2458 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2459 if (! knew->name)
2460 return -ENOMEM;
2461 knew->private_value = val;
2462 spec->num_kctl_used++;
2463 return 0;
2464}
2465
4682eee0
MR		 2466
2467/* add dynamic controls */
2468static int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2469 const char *name, unsigned long val)
2470{
2471 return stac92xx_add_control_idx(spec, type, 0, name, val);
2472}
2473
403d1944
MP		 2474/* flag inputs as additional dynamic lineouts */
2475static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2476{
2477 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2478 unsigned int wcaps, wtype;
2479 int i, num_dacs = 0;
2480
2481 /* use the wcaps cache to count all DACs available for line-outs */
2482 for (i = 0; i < codec->num_nodes; i++) {
2483 wcaps = codec->wcaps[i];
2484 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2485
7b043899
SL		 2486 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2487 num_dacs++;
2488 }
403d1944 2489
7b043899
SL		 2490 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2491
403d1944
MP		 2492 switch (cfg->line_outs) {
2493 case 3:
2494 /* add line-in as side */
7b043899 2495 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2496 cfg->line_out_pins[cfg->line_outs] =
2497 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2498 spec->line_switch = 1;
2499 cfg->line_outs++;
2500 }
2501 break;
2502 case 2:
2503 /* add line-in as clfe and mic as side */
7b043899 2504 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2505 cfg->line_out_pins[cfg->line_outs] =
2506 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2507 spec->line_switch = 1;
2508 cfg->line_outs++;
2509 }
7b043899 2510 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2511 cfg->line_out_pins[cfg->line_outs] =
2512 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2513 spec->mic_switch = 1;
2514 cfg->line_outs++;
2515 }
2516 break;
2517 case 1:
2518 /* add line-in as surr and mic as clfe */
7b043899 2519 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2520 cfg->line_out_pins[cfg->line_outs] =
2521 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2522 spec->line_switch = 1;
2523 cfg->line_outs++;
2524 }
7b043899 2525 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2526 cfg->line_out_pins[cfg->line_outs] =
2527 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2528 spec->mic_switch = 1;
2529 cfg->line_outs++;
2530 }
2531 break;
2532 }
2533
2534 return 0;
2535}
2536
7b043899
SL		 2537
2538static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2539{
2540 int i;
2541
2542 for (i = 0; i < spec->multiout.num_dacs; i++) {
2543 if (spec->multiout.dac_nids[i] == nid)
2544 return 1;
2545 }
2546
2547 return 0;
2548}
2549
3cc08dc6 2550/*
7b043899
SL		 2551 * Fill in the dac_nids table from the parsed pin configuration
2552 * This function only works when every pin in line_out_pins[]
2553 * contains atleast one DAC in its connection list. Some 92xx
2554 * codecs are not connected directly to a DAC, such as the 9200
2555 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2556 */
19039bd0 2557static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2558 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2559{
2560 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2561 int i, j, conn_len = 0;
2562 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2563 unsigned int wcaps, wtype;
2564
c7d4b2fa
M		 2565 for (i = 0; i < cfg->line_outs; i++) {
2566 nid = cfg->line_out_pins[i];
7b043899
SL		 2567 conn_len = snd_hda_get_connections(codec, nid, conn,
2568 HDA_MAX_CONNECTIONS);
2569 for (j = 0; j < conn_len; j++) {
2570 wcaps = snd_hda_param_read(codec, conn[j],
2571 AC_PAR_AUDIO_WIDGET_CAP);
2572 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2573 if (wtype != AC_WID_AUD_OUT ||
2574 (wcaps & AC_WCAP_DIGITAL))
2575 continue;
2576 /* conn[j] is a DAC routed to this line-out */
2577 if (!is_in_dac_nids(spec, conn[j]))
2578 break;
2579 }
2580
2581 if (j == conn_len) {
df802952
TI		 2582 if (spec->multiout.num_dacs > 0) {
2583 /* we have already working output pins,
2584 * so let's drop the broken ones again
2585 */
2586 cfg->line_outs = spec->multiout.num_dacs;
2587 break;
2588 }
7b043899
SL		 2589 /* error out, no available DAC found */
2590 snd_printk(KERN_ERR
2591 "%s: No available DAC for pin 0x%x\n",
2592 __func__, nid);
2593 return -ENODEV;
2594 }
2595
2596 spec->multiout.dac_nids[i] = conn[j];
2597 spec->multiout.num_dacs++;
2598 if (conn_len > 1) {
2599 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2600 snd_hda_codec_write_cache(codec, nid, 0,
2601 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2602
7b043899
SL		 2603 }
2604 }
c7d4b2fa 2605
7b043899
SL		 2606 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2607 spec->multiout.num_dacs,
2608 spec->multiout.dac_nids[0],
2609 spec->multiout.dac_nids[1],
2610 spec->multiout.dac_nids[2],
2611 spec->multiout.dac_nids[3],
2612 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2613 return 0;
2614}
2615
eb06ed8f
TI		 2616/* create volume control/switch for the given prefx type */
2617static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2618{
2619 char name[32];
2620 int err;
2621
2622 sprintf(name, "%s Playback Volume", pfx);
2623 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2624 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2625 if (err < 0)
2626 return err;
2627 sprintf(name, "%s Playback Switch", pfx);
2628 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2629 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2630 if (err < 0)
2631 return err;
2632 return 0;
2633}
2634
ae0afd81
MR		 2635static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2636{
2637 if (!spec->multiout.hp_nid)
2638 spec->multiout.hp_nid = nid;
2639 else if (spec->multiout.num_dacs > 4) {
2640 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2641 return 1;
2642 } else {
2643 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2644 spec->multiout.num_dacs++;
2645 }
2646 return 0;
2647}
2648
2649static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2650{
2651 if (is_in_dac_nids(spec, nid))
2652 return 1;
2653 if (spec->multiout.hp_nid == nid)
2654 return 1;
2655 return 0;
2656}
2657
c7d4b2fa 2658/* add playback controls from the parsed DAC table */
0fb87bb4 2659static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2660 const struct auto_pin_cfg *cfg)
c7d4b2fa 2661{
19039bd0
TI		 2662 static const char *chname[4] = {
2663 "Front", "Surround", NULL /*CLFE*/, "Side"
2664 };
c7d4b2fa
M		 2665 hda_nid_t nid;
2666 int i, err;
2667
0fb87bb4 2668 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2669 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2670
2671
40ac8c4f 2672 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2673 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2674 continue;
2675
2676 nid = spec->multiout.dac_nids[i];
2677
2678 if (i == 2) {
2679 /* Center/LFE */
eb06ed8f
TI		 2680 err = create_controls(spec, "Center", nid, 1);
2681 if (err < 0)
c7d4b2fa 2682 return err;
eb06ed8f
TI		 2683 err = create_controls(spec, "LFE", nid, 2);
2684 if (err < 0)
c7d4b2fa 2685 return err;
0fb87bb4
ML		 2686
2687 wid_caps = get_wcaps(codec, nid);
2688
2689 if (wid_caps & AC_WCAP_LR_SWAP) {
2690 err = stac92xx_add_control(spec,
2691 STAC_CTL_WIDGET_CLFE_SWITCH,
2692 "Swap Center/LFE Playback Switch", nid);
2693
2694 if (err < 0)
2695 return err;
2696 }
2697
c7d4b2fa 2698 } else {
eb06ed8f
TI		 2699 err = create_controls(spec, chname[i], nid, 3);
2700 if (err < 0)
c7d4b2fa
M		 2701 return err;
2702 }
2703 }
2704
7c2ba97b
MR		 2705 if (cfg->hp_outs > 1) {
2706 err = stac92xx_add_control(spec,
2707 STAC_CTL_WIDGET_HP_SWITCH,
2708 "Headphone as Line Out Switch", 0);
2709 if (err < 0)
2710 return err;
2711 }
2712
b5895dc8
MR		 2713 if (spec->line_switch) {
2714 nid = cfg->input_pins[AUTO_PIN_LINE];
2715 pincap = snd_hda_param_read(codec, nid,
2716 AC_PAR_PIN_CAP);
2717 if (pincap & AC_PINCAP_OUT) {
2718 err = stac92xx_add_control(spec,
2719 STAC_CTL_WIDGET_IO_SWITCH,
2720 "Line In as Output Switch", nid << 8);
2721 if (err < 0)
2722 return err;
2723 }
2724 }
403d1944 2725
b5895dc8 2726 if (spec->mic_switch) {
cace16f1 2727 unsigned int def_conf;
ae0afd81
MR		 2728 unsigned int mic_pin = AUTO_PIN_MIC;
2729again:
2730 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2731 def_conf = snd_hda_codec_read(codec, nid, 0,
2732 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2733 /* some laptops have an internal analog microphone
2734 * which can't be used as a output */
2735 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2736 pincap = snd_hda_param_read(codec, nid,
2737 AC_PAR_PIN_CAP);
2738 if (pincap & AC_PINCAP_OUT) {
2739 err = stac92xx_add_control(spec,
2740 STAC_CTL_WIDGET_IO_SWITCH,
2741 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2742 nid = snd_hda_codec_read(codec, nid, 0,
2743 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2744 if (!check_in_dac_nids(spec, nid))
2745 add_spec_dacs(spec, nid);
cace16f1
MR		 2746 if (err < 0)
2747 return err;
2748 }
ae0afd81
MR		 2749 } else if (mic_pin == AUTO_PIN_MIC) {
2750 mic_pin = AUTO_PIN_FRONT_MIC;
2751 goto again;
b5895dc8
MR		 2752 }
2753 }
403d1944 2754
c7d4b2fa
M		 2755 return 0;
2756}
2757
eb06ed8f
TI		 2758/* add playback controls for Speaker and HP outputs */
2759static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2760 struct auto_pin_cfg *cfg)
2761{
2762 struct sigmatel_spec *spec = codec->spec;
2763 hda_nid_t nid;
2764 int i, old_num_dacs, err;
2765
2766 old_num_dacs = spec->multiout.num_dacs;
2767 for (i = 0; i < cfg->hp_outs; i++) {
2768 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2769 if (wid_caps & AC_WCAP_UNSOL_CAP)
2770 spec->hp_detect = 1;
2771 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2772 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2773 if (check_in_dac_nids(spec, nid))
2774 nid = 0;
2775 if (! nid)
c7d4b2fa 2776 continue;
eb06ed8f
TI		 2777 add_spec_dacs(spec, nid);
2778 }
2779 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2780 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2781 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2782 if (check_in_dac_nids(spec, nid))
2783 nid = 0;
eb06ed8f
TI		 2784 if (! nid)
2785 continue;
2786 add_spec_dacs(spec, nid);
c7d4b2fa 2787 }
1b290a51
MR		 2788 for (i = 0; i < cfg->line_outs; i++) {
2789 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2790 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2791 if (check_in_dac_nids(spec, nid))
2792 nid = 0;
2793 if (! nid)
2794 continue;
2795 add_spec_dacs(spec, nid);
2796 }
eb06ed8f
TI		 2797 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2798 static const char *pfxs[] = {
2799 "Speaker", "External Speaker", "Speaker2",
2800 };
2801 err = create_controls(spec, pfxs[i - old_num_dacs],
2802 spec->multiout.dac_nids[i], 3);
2803 if (err < 0)
2804 return err;
2805 }
2806 if (spec->multiout.hp_nid) {
2626a263
TI		 2807 err = create_controls(spec, "Headphone",
2808 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2809 if (err < 0)
2810 return err;
2811 }
c7d4b2fa
M		 2812
2813 return 0;
2814}
2815
b22b4821 2816/* labels for mono mux outputs */
d0513fc6
MR		 2817static const char *stac92xx_mono_labels[4] = {
2818 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 2819};
2820
2821/* create mono mux for mono out on capable codecs */
2822static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2823{
2824 struct sigmatel_spec *spec = codec->spec;
2825 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2826 int i, num_cons;
2827 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2828
2829 num_cons = snd_hda_get_connections(codec,
2830 spec->mono_nid,
2831 con_lst,
2832 HDA_MAX_NUM_INPUTS);
2833 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2834 return -EINVAL;
2835
2836 for (i = 0; i < num_cons; i++) {
2837 mono_mux->items[mono_mux->num_items].label =
2838 stac92xx_mono_labels[i];
2839 mono_mux->items[mono_mux->num_items].index = i;
2840 mono_mux->num_items++;
2841 }
09a99959
MR		 2842
2843 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2844 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2845}
2846
1cd2224c
MR		 2847/* create PC beep volume controls */
2848static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
2849 hda_nid_t nid)
2850{
2851 struct sigmatel_spec *spec = codec->spec;
2852 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
2853 int err;
2854
2855 /* check for mute support for the the amp */
2856 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
2857 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2858 "PC Beep Playback Switch",
2859 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
2860 if (err < 0)
2861 return err;
2862 }
2863
2864 /* check to see if there is volume support for the amp */
2865 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2866 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2867 "PC Beep Playback Volume",
2868 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
2869 if (err < 0)
2870 return err;
2871 }
2872 return 0;
2873}
2874
4682eee0
MR		 2875static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
2876{
2877 struct sigmatel_spec *spec = codec->spec;
2878 int wcaps, nid, i, err = 0;
2879
2880 for (i = 0; i < spec->num_muxes; i++) {
2881 nid = spec->mux_nids[i];
2882 wcaps = get_wcaps(codec, nid);
2883
2884 if (wcaps & AC_WCAP_OUT_AMP) {
2885 err = stac92xx_add_control_idx(spec,
2886 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
2887 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2888 if (err < 0)
2889 return err;
2890 }
2891 }
2892 return 0;
2893};
2894
d9737751
MR		 2895static const char *stac92xx_spdif_labels[3] = {
2896 "Digital Playback", "Analog Mux 1", "Analog Mux 2"
2897};
2898
2899static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
2900{
2901 struct sigmatel_spec *spec = codec->spec;
2902 struct hda_input_mux *spdif_mux = &spec->private_smux;
2903 int i, num_cons;
2904 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_spdif_labels)];
2905
2906 num_cons = snd_hda_get_connections(codec,
2907 spec->smux_nids[0],
2908 con_lst,
2909 HDA_MAX_NUM_INPUTS);
2910 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_spdif_labels))
2911 return -EINVAL;
2912
2913 for (i = 0; i < num_cons; i++) {
2914 spdif_mux->items[spdif_mux->num_items].label =
2915 stac92xx_spdif_labels[i];
2916 spdif_mux->items[spdif_mux->num_items].index = i;
2917 spdif_mux->num_items++;
2918 }
2919
2920 return 0;
2921}
2922
8b65727b 2923/* labels for dmic mux inputs */
ddc2cec4 2924static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2925 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2926 "Digital Mic 3", "Digital Mic 4"
2927};
2928
2929/* create playback/capture controls for input pins on dmic capable codecs */
2930static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2931 const struct auto_pin_cfg *cfg)
2932{
2933 struct sigmatel_spec *spec = codec->spec;
2934 struct hda_input_mux *dimux = &spec->private_dimux;
2935 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2936 int err, i, j;
2937 char name[32];
8b65727b
MP		 2938
2939 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2940 dimux->items[dimux->num_items].index = 0;
2941 dimux->num_items++;
2942
2943 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2944 hda_nid_t nid;
8b65727b
MP		 2945 int index;
2946 int num_cons;
0678accd 2947 unsigned int wcaps;
8b65727b
MP		 2948 unsigned int def_conf;
2949
2950 def_conf = snd_hda_codec_read(codec,
2951 spec->dmic_nids[i],
2952 0,
2953 AC_VERB_GET_CONFIG_DEFAULT,
2954 0);
2955 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2956 continue;
2957
0678accd 2958 nid = spec->dmic_nids[i];
8b65727b 2959 num_cons = snd_hda_get_connections(codec,
e1f0d669 2960 spec->dmux_nids[0],
8b65727b
MP		 2961 con_lst,
2962 HDA_MAX_NUM_INPUTS);
2963 for (j = 0; j < num_cons; j++)
0678accd 2964 if (con_lst[j] == nid) {
8b65727b
MP		 2965 index = j;
2966 goto found;
2967 }
2968 continue;
2969found:
d0513fc6
MR		 2970 wcaps = get_wcaps(codec, nid) &
2971 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 2972
d0513fc6 2973 if (wcaps) {
0678accd
MR		 2974 sprintf(name, "%s Capture Volume",
2975 stac92xx_dmic_labels[dimux->num_items]);
2976
2977 err = stac92xx_add_control(spec,
2978 STAC_CTL_WIDGET_VOL,
2979 name,
d0513fc6
MR		 2980 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
2981 (wcaps & AC_WCAP_OUT_AMP) ?
2982 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 2983 if (err < 0)
2984 return err;
2985 }
2986
8b65727b
MP		 2987 dimux->items[dimux->num_items].label =
2988 stac92xx_dmic_labels[dimux->num_items];
2989 dimux->items[dimux->num_items].index = index;
2990 dimux->num_items++;
2991 }
2992
2993 return 0;
2994}
2995
c7d4b2fa
M		 2996/* create playback/capture controls for input pins */
2997static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2998{
2999 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3000 struct hda_input_mux *imux = &spec->private_imux;
3001 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3002 int i, j, k;
3003
3004 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3005 int index;
3006
3007 if (!cfg->input_pins[i])
3008 continue;
3009 index = -1;
3010 for (j = 0; j < spec->num_muxes; j++) {
3011 int num_cons;
3012 num_cons = snd_hda_get_connections(codec,
3013 spec->mux_nids[j],
3014 con_lst,
3015 HDA_MAX_NUM_INPUTS);
3016 for (k = 0; k < num_cons; k++)
3017 if (con_lst[k] == cfg->input_pins[i]) {
3018 index = k;
3019 goto found;
3020 }
c7d4b2fa 3021 }
314634bc
TI		 3022 continue;
3023 found:
3024 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3025 imux->items[imux->num_items].index = index;
3026 imux->num_items++;
c7d4b2fa
M		 3027 }
3028
7b043899 3029 if (imux->num_items) {
62fe78e9
SR		 3030 /*
3031 * Set the current input for the muxes.
3032 * The STAC9221 has two input muxes with identical source
3033 * NID lists. Hopefully this won't get confused.
3034 */
3035 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3036 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3037 AC_VERB_SET_CONNECT_SEL,
3038 imux->items[0].index);
62fe78e9
SR		 3039 }
3040 }
3041
c7d4b2fa
M		 3042 return 0;
3043}
3044
c7d4b2fa
M		 3045static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3046{
3047 struct sigmatel_spec *spec = codec->spec;
3048 int i;
3049
3050 for (i = 0; i < spec->autocfg.line_outs; i++) {
3051 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3052 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3053 }
3054}
3055
3056static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3057{
3058 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3059 int i;
c7d4b2fa 3060
eb06ed8f
TI		 3061 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3062 hda_nid_t pin;
3063 pin = spec->autocfg.hp_pins[i];
3064 if (pin) /* connect to front */
3065 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3066 }
3067 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3068 hda_nid_t pin;
3069 pin = spec->autocfg.speaker_pins[i];
3070 if (pin) /* connect to front */
3071 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3072 }
c7d4b2fa
M		 3073}
3074
3cc08dc6 3075static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3076{
3077 struct sigmatel_spec *spec = codec->spec;
3078 int err;
bcecd9bd 3079 int hp_speaker_swap = 0;
c7d4b2fa 3080
8b65727b
MP		 3081 if ((err = snd_hda_parse_pin_def_config(codec,
3082 &spec->autocfg,
3083 spec->dmic_nids)) < 0)
c7d4b2fa 3084 return err;
82bc955f 3085 if (! spec->autocfg.line_outs)
869264c4 3086 return 0; /* can't find valid pin config */
19039bd0 3087
bcecd9bd
JZ		 3088 /* If we have no real line-out pin and multiple hp-outs, HPs should
3089 * be set up as multi-channel outputs.
3090 */
3091 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3092 spec->autocfg.hp_outs > 1) {
3093 /* Copy hp_outs to line_outs, backup line_outs in
3094 * speaker_outs so that the following routines can handle
3095 * HP pins as primary outputs.
3096 */
3097 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3098 sizeof(spec->autocfg.line_out_pins));
3099 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3100 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3101 sizeof(spec->autocfg.hp_pins));
3102 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3103 hp_speaker_swap = 1;
3104 }
09a99959 3105 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3106 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3107 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3108 u32 caps = query_amp_caps(codec,
3109 spec->autocfg.mono_out_pin, dir);
3110 hda_nid_t conn_list[1];
3111
3112 /* get the mixer node and then the mono mux if it exists */
3113 if (snd_hda_get_connections(codec,
3114 spec->autocfg.mono_out_pin, conn_list, 1) &&
3115 snd_hda_get_connections(codec, conn_list[0],
3116 conn_list, 1)) {
3117
3118 int wcaps = get_wcaps(codec, conn_list[0]);
3119 int wid_type = (wcaps & AC_WCAP_TYPE)
3120 >> AC_WCAP_TYPE_SHIFT;
3121 /* LR swap check, some stac925x have a mux that
3122 * changes the DACs output path instead of the
3123 * mono-mux path.
3124 */
3125 if (wid_type == AC_WID_AUD_SEL &&
3126 !(wcaps & AC_WCAP_LR_SWAP))
3127 spec->mono_nid = conn_list[0];
3128 }
d0513fc6
MR		 3129 if (dir) {
3130 hda_nid_t nid = spec->autocfg.mono_out_pin;
3131
3132 /* most mono outs have a least a mute/unmute switch */
3133 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3134 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3135 "Mono Playback Switch",
3136 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3137 if (err < 0)
3138 return err;
d0513fc6
MR		 3139 /* check for volume support for the amp */
3140 if ((caps & AC_AMPCAP_NUM_STEPS)
3141 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3142 err = stac92xx_add_control(spec,
3143 STAC_CTL_WIDGET_VOL,
3144 "Mono Playback Volume",
3145 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3146 if (err < 0)
3147 return err;
3148 }
09a99959
MR		 3149 }
3150
3151 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3152 AC_PINCTL_OUT_EN);
3153 }
bcecd9bd 3154
403d1944
MP		 3155 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3156 return err;
19039bd0
TI		 3157 if (spec->multiout.num_dacs == 0)
3158 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3159 return err;
c7d4b2fa 3160
0fb87bb4
ML		 3161 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3162
3163 if (err < 0)
3164 return err;
3165
1cd2224c
MR		 3166 /* setup analog beep controls */
3167 if (spec->anabeep_nid > 0) {
3168 err = stac92xx_auto_create_beep_ctls(codec,
3169 spec->anabeep_nid);
3170 if (err < 0)
3171 return err;
3172 }
3173
3174 /* setup digital beep controls and input device */
3175#ifdef CONFIG_SND_HDA_INPUT_BEEP
3176 if (spec->digbeep_nid > 0) {
3177 hda_nid_t nid = spec->digbeep_nid;
3178
3179 err = stac92xx_auto_create_beep_ctls(codec, nid);
3180 if (err < 0)
3181 return err;
3182 err = snd_hda_attach_beep_device(codec, nid);
3183 if (err < 0)
3184 return err;
3185 }
3186#endif
3187
bcecd9bd
JZ		 3188 if (hp_speaker_swap == 1) {
3189 /* Restore the hp_outs and line_outs */
3190 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3191 sizeof(spec->autocfg.line_out_pins));
3192 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3193 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3194 sizeof(spec->autocfg.speaker_pins));
3195 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3196 memset(spec->autocfg.speaker_pins, 0,
3197 sizeof(spec->autocfg.speaker_pins));
3198 spec->autocfg.speaker_outs = 0;
3199 }
3200
0fb87bb4
ML		 3201 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3202
3203 if (err < 0)
3204 return err;
3205
3206 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3207
3208 if (err < 0)
c7d4b2fa
M		 3209 return err;
3210
b22b4821
MR		 3211 if (spec->mono_nid > 0) {
3212 err = stac92xx_auto_create_mono_output_ctls(codec);
3213 if (err < 0)
3214 return err;
3215 }
3216
8b65727b
MP		 3217 if (spec->num_dmics > 0)
3218 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3219 &spec->autocfg)) < 0)
3220 return err;
4682eee0
MR		 3221 if (spec->num_muxes > 0) {
3222 err = stac92xx_auto_create_mux_input_ctls(codec);
3223 if (err < 0)
3224 return err;
3225 }
d9737751
MR		 3226 if (spec->num_smuxes > 0) {
3227 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3228 if (err < 0)
3229 return err;
3230 }
8b65727b 3231
c7d4b2fa 3232 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3233 if (spec->multiout.max_channels > 2)
c7d4b2fa 3234 spec->surr_switch = 1;
c7d4b2fa 3235
82bc955f 3236 if (spec->autocfg.dig_out_pin)
3cc08dc6 3237 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3238 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3239 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 3240
3241 if (spec->kctl_alloc)
3242 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3243
3244 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 3245 if (!spec->dinput_mux)
3246 spec->dinput_mux = &spec->private_dimux;
d9737751 3247 spec->sinput_mux = &spec->private_smux;
b22b4821 3248 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 3249
3250 return 1;
3251}
3252
82bc955f
TI		 3253/* add playback controls for HP output */
3254static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3255 struct auto_pin_cfg *cfg)
3256{
3257 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3258 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3259 unsigned int wid_caps;
3260
3261 if (! pin)
3262 return 0;
3263
3264 wid_caps = get_wcaps(codec, pin);
505cb341 3265 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3266 spec->hp_detect = 1;
82bc955f
TI		 3267
3268 return 0;
3269}
3270
160ea0dc
RF		 3271/* add playback controls for LFE output */
3272static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3273 struct auto_pin_cfg *cfg)
3274{
3275 struct sigmatel_spec *spec = codec->spec;
3276 int err;
3277 hda_nid_t lfe_pin = 0x0;
3278 int i;
3279
3280 /*
3281 * search speaker outs and line outs for a mono speaker pin
3282 * with an amp. If one is found, add LFE controls
3283 * for it.
3284 */
3285 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3286 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3287 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3288 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3289 if (wcaps == AC_WCAP_OUT_AMP)
3290 /* found a mono speaker with an amp, must be lfe */
3291 lfe_pin = pin;
3292 }
3293
3294 /* if speaker_outs is 0, then speakers may be in line_outs */
3295 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3296 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3297 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3298 unsigned int defcfg;
8b551785 3299 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3300 AC_VERB_GET_CONFIG_DEFAULT,
3301 0x00);
8b551785 3302 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3303 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3304 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3305 if (wcaps == AC_WCAP_OUT_AMP)
3306 /* found a mono speaker with an amp,
3307 must be lfe */
3308 lfe_pin = pin;
3309 }
3310 }
3311 }
3312
3313 if (lfe_pin) {
eb06ed8f 3314 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3315 if (err < 0)
3316 return err;
3317 }
3318
3319 return 0;
3320}
3321
c7d4b2fa
M		 3322static int stac9200_parse_auto_config(struct hda_codec *codec)
3323{
3324 struct sigmatel_spec *spec = codec->spec;
3325 int err;
3326
df694daa 3327 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3328 return err;
3329
3330 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3331 return err;
3332
82bc955f
TI		 3333 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3334 return err;
3335
160ea0dc
RF		 3336 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3337 return err;
3338
82bc955f 3339 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3340 spec->multiout.dig_out_nid = 0x05;
82bc955f 3341 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3342 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 3343
3344 if (spec->kctl_alloc)
3345 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3346
3347 spec->input_mux = &spec->private_imux;
8b65727b 3348 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3349
3350 return 1;
3351}
3352
62fe78e9
SR		 3353/*
3354 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3355 * funky external mute control using GPIO pins.
3356 */
3357
76e1ddfb 3358static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3359 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3360{
3361 unsigned int gpiostate, gpiomask, gpiodir;
3362
3363 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3364 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3365 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3366
3367 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3368 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3369 gpiomask |= mask;
62fe78e9
SR		 3370
3371 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3372 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3373 gpiodir |= dir_mask;
62fe78e9 3374
76e1ddfb 3375 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3376 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3377
3378 snd_hda_codec_write(codec, codec->afg, 0,
3379 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3380 snd_hda_codec_read(codec, codec->afg, 0,
3381 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3382
3383 msleep(1);
3384
76e1ddfb
TI		 3385 snd_hda_codec_read(codec, codec->afg, 0,
3386 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3387}
3388
314634bc
TI		 3389static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3390 unsigned int event)
3391{
3392 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3393 snd_hda_codec_write_cache(codec, nid, 0,
3394 AC_VERB_SET_UNSOLICITED_ENABLE,
3395 (AC_USRSP_EN | event));
314634bc
TI		 3396}
3397
a64135a2
MR		 3398static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3399{
3400 int i;
3401 for (i = 0; i < cfg->hp_outs; i++)
3402 if (cfg->hp_pins[i] == nid)
3403 return 1; /* nid is a HP-Out */
3404
3405 return 0; /* nid is not a HP-Out */
3406};
3407
b76c850f
MR		 3408static void stac92xx_power_down(struct hda_codec *codec)
3409{
3410 struct sigmatel_spec *spec = codec->spec;
3411
3412 /* power down inactive DACs */
3413 hda_nid_t *dac;
3414 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3415 if (!is_in_dac_nids(spec, *dac) &&
3416 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3417 snd_hda_codec_write_cache(codec, *dac, 0,
3418 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3419}
3420
c7d4b2fa
M		 3421static int stac92xx_init(struct hda_codec *codec)
3422{
3423 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3424 struct auto_pin_cfg *cfg = &spec->autocfg;
3425 int i;
c7d4b2fa 3426
c7d4b2fa
M		 3427 snd_hda_sequence_write(codec, spec->init);
3428
8daaaa97
MR		 3429 /* power down adcs initially */
3430 if (spec->powerdown_adcs)
3431 for (i = 0; i < spec->num_adcs; i++)
3432 snd_hda_codec_write_cache(codec,
3433 spec->adc_nids[i], 0,
3434 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
82bc955f
TI		 3435 /* set up pins */
3436 if (spec->hp_detect) {
505cb341 3437 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3438 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3439 enable_pin_detect(codec, cfg->hp_pins[i],
3440 STAC_HP_EVENT);
0a07acaf
TI		 3441 /* force to enable the first line-out; the others are set up
3442 * in unsol_event
3443 */
3444 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3445 AC_PINCTL_OUT_EN);
eb995a8c 3446 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3447 /* fake event to set up pins */
3448 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3449 } else {
3450 stac92xx_auto_init_multi_out(codec);
3451 stac92xx_auto_init_hp_out(codec);
3452 }
3453 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3454 hda_nid_t nid = cfg->input_pins[i];
3455 if (nid) {
3456 unsigned int pinctl = AC_PINCTL_IN_EN;
3457 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3458 pinctl |= stac92xx_get_vref(codec, nid);
3459 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3460 }
82bc955f 3461 }
a64135a2
MR		 3462 for (i = 0; i < spec->num_dmics; i++)
3463 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3464 AC_PINCTL_IN_EN);
3465 for (i = 0; i < spec->num_pwrs; i++) {
3466 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3467 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3468 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3469 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3470 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3471 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3472 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3473 /* outputs are only ports capable of power management
3474 * any attempts on powering down a input port cause the
3475 * referenced VREF to act quirky.
3476 */
3477 if (pinctl & AC_PINCTL_IN_EN)
3478 continue;
aafc4412
MR		 3479 /* skip any ports that don't have jacks since presence
3480 * detection is useless */
3481 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3482 continue;
a64135a2
MR		 3483 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3484 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3485 }
b76c850f
MR		 3486 if (spec->dac_list)
3487 stac92xx_power_down(codec);
82bc955f
TI		 3488 if (cfg->dig_out_pin)
3489 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3490 AC_PINCTL_OUT_EN);
3491 if (cfg->dig_in_pin)
3492 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3493 AC_PINCTL_IN_EN);
3494
4fe5195c
MR		 3495 stac_gpio_set(codec, spec->gpio_mask,
3496 spec->gpio_dir, spec->gpio_data);
62fe78e9 3497
c7d4b2fa
M		 3498 return 0;
3499}
3500
2f2f4251
M		 3501static void stac92xx_free(struct hda_codec *codec)
3502{
c7d4b2fa
M		 3503 struct sigmatel_spec *spec = codec->spec;
3504 int i;
3505
3506 if (! spec)
3507 return;
3508
3509 if (spec->kctl_alloc) {
3510 for (i = 0; i < spec->num_kctl_used; i++)
3511 kfree(spec->kctl_alloc[i].name);
3512 kfree(spec->kctl_alloc);
3513 }
3514
11b44bbd
RF		 3515 if (spec->bios_pin_configs)
3516 kfree(spec->bios_pin_configs);
3517
c7d4b2fa 3518 kfree(spec);
1cd2224c 3519 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3520}
3521
4e55096e
M		 3522static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3523 unsigned int flag)
3524{
3525 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3526 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3527
f9acba43
TI		 3528 if (pin_ctl & AC_PINCTL_IN_EN) {
3529 /*
3530 * we need to check the current set-up direction of
3531 * shared input pins since they can be switched via
3532 * "xxx as Output" mixer switch
3533 */
3534 struct sigmatel_spec *spec = codec->spec;
3535 struct auto_pin_cfg *cfg = &spec->autocfg;
3536 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3537 spec->line_switch) ||
3538 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3539 spec->mic_switch))
3540 return;
3541 }
3542
7b043899
SL		 3543 /* if setting pin direction bits, clear the current
3544 direction bits first */
3545 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3546 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3547
82beb8fd 3548 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3549 AC_VERB_SET_PIN_WIDGET_CONTROL,
3550 pin_ctl | flag);
3551}
3552
3553static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3554 unsigned int flag)
3555{
3556 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3557 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3558 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3559 AC_VERB_SET_PIN_WIDGET_CONTROL,
3560 pin_ctl & ~flag);
3561}
3562
40c1d308 3563static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3564{
3565 if (!nid)
3566 return 0;
3567 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3568 & (1 << 31)) {
3569 unsigned int pinctl;
3570 pinctl = snd_hda_codec_read(codec, nid, 0,
3571 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3572 if (pinctl & AC_PINCTL_IN_EN)
3573 return 0; /* mic- or line-input */
3574 else
3575 return 1; /* HP-output */
3576 }
314634bc
TI		 3577 return 0;
3578}
3579
3580static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3581{
3582 struct sigmatel_spec *spec = codec->spec;
3583 struct auto_pin_cfg *cfg = &spec->autocfg;
7c2ba97b 3584 int nid = cfg->hp_pins[cfg->hp_outs - 1];
4e55096e
M		 3585 int i, presence;
3586
eb06ed8f 3587 presence = 0;
4fe5195c
MR		 3588 if (spec->gpio_mute)
3589 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3590 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3591
eb06ed8f 3592 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3593 if (presence)
3594 break;
7c2ba97b
MR		 3595 if (spec->hp_switch && cfg->hp_pins[i] == nid)
3596 break;
4fe5195c 3597 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3598 }
4e55096e
M		 3599
3600 if (presence) {
3601 /* disable lineouts, enable hp */
7c2ba97b
MR		 3602 if (spec->hp_switch)
3603 stac92xx_reset_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3604 for (i = 0; i < cfg->line_outs; i++)
3605 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3606 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3607 for (i = 0; i < cfg->speaker_outs; i++)
3608 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3609 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3610 if (spec->eapd_mask)
3611 stac_gpio_set(codec, spec->gpio_mask,
3612 spec->gpio_dir, spec->gpio_data &
3613 ~spec->eapd_mask);
4e55096e
M		 3614 } else {
3615 /* enable lineouts, disable hp */
7c2ba97b
MR		 3616 if (spec->hp_switch)
3617 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3618 for (i = 0; i < cfg->line_outs; i++)
3619 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3620 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3621 for (i = 0; i < cfg->speaker_outs; i++)
3622 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3623 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3624 if (spec->eapd_mask)
3625 stac_gpio_set(codec, spec->gpio_mask,
3626 spec->gpio_dir, spec->gpio_data |
3627 spec->eapd_mask);
4e55096e 3628 }
7c2ba97b
MR		 3629 if (!spec->hp_switch && cfg->hp_outs > 1 && presence)
3630 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3631}
3632
a64135a2
MR		 3633static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3634{
3635 struct sigmatel_spec *spec = codec->spec;
3636 hda_nid_t nid = spec->pwr_nids[idx];
3637 int presence, val;
3638 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3639 & 0x000000ff;
3640 presence = get_hp_pin_presence(codec, nid);
d0513fc6
MR		 3641
3642 /* several codecs have two power down bits */
3643 if (spec->pwr_mapping)
3644 idx = spec->pwr_mapping[idx];
3645 else
3646 idx = 1 << idx;
a64135a2
MR		 3647
3648 if (presence)
3649 val &= ~idx;
3650 else
3651 val |= idx;
3652
3653 /* power down unused output ports */
3654 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3655};
3656
314634bc
TI		 3657static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3658{
a64135a2
MR		 3659 struct sigmatel_spec *spec = codec->spec;
3660 int idx = res >> 26 & 0x0f;
3661
3662 switch ((res >> 26) & 0x30) {
314634bc
TI		 3663 case STAC_HP_EVENT:
3664 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3665 /* fallthru */
3666 case STAC_PWR_EVENT:
3667 if (spec->num_pwrs > 0)
3668 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3669 }
3670}
3671
cb53c626 3672#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3673static int stac92xx_resume(struct hda_codec *codec)
3674{
dc81bed1
TI		 3675 struct sigmatel_spec *spec = codec->spec;
3676
11b44bbd 3677 stac92xx_set_config_regs(codec);
dc81bed1 3678 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3679 stac_gpio_set(codec, spec->gpio_mask,
3680 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3681 snd_hda_codec_resume_amp(codec);
3682 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3683 /* power down inactive DACs */
3684 if (spec->dac_list)
3685 stac92xx_power_down(codec);
dc81bed1
TI		 3686 /* invoke unsolicited event to reset the HP state */
3687 if (spec->hp_detect)
3688 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3689 return 0;
3690}
3691#endif
3692
2f2f4251
M		 3693static struct hda_codec_ops stac92xx_patch_ops = {
3694 .build_controls = stac92xx_build_controls,
3695 .build_pcms = stac92xx_build_pcms,
3696 .init = stac92xx_init,
3697 .free = stac92xx_free,
4e55096e 3698 .unsol_event = stac92xx_unsol_event,
cb53c626 3699#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3700 .resume = stac92xx_resume,
3701#endif
2f2f4251
M		 3702};
3703
3704static int patch_stac9200(struct hda_codec *codec)
3705{
3706 struct sigmatel_spec *spec;
c7d4b2fa 3707 int err;
2f2f4251 3708
e560d8d8 3709 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3710 if (spec == NULL)
3711 return -ENOMEM;
3712
3713 codec->spec = spec;
a4eed138 3714 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3715 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3716 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3717 stac9200_models,
3718 stac9200_cfg_tbl);
11b44bbd
RF		 3719 if (spec->board_config < 0) {
3720 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3721 err = stac92xx_save_bios_config_regs(codec);
3722 if (err < 0) {
3723 stac92xx_free(codec);
3724 return err;
3725 }
3726 spec->pin_configs = spec->bios_pin_configs;
3727 } else {
403d1944
MP		 3728 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3729 stac92xx_set_config_regs(codec);
3730 }
2f2f4251
M		 3731
3732 spec->multiout.max_channels = 2;
3733 spec->multiout.num_dacs = 1;
3734 spec->multiout.dac_nids = stac9200_dac_nids;
3735 spec->adc_nids = stac9200_adc_nids;
3736 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3737 spec->num_muxes = 1;
8b65727b 3738 spec->num_dmics = 0;
9e05b7a3 3739 spec->num_adcs = 1;
a64135a2 3740 spec->num_pwrs = 0;
c7d4b2fa 3741
bf277785
TD		 3742 if (spec->board_config == STAC_9200_GATEWAY ||
3743 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3744 spec->init = stac9200_eapd_init;
3745 else
3746 spec->init = stac9200_core_init;
2f2f4251 3747 spec->mixer = stac9200_mixer;
c7d4b2fa 3748
117f257d
TI		 3749 if (spec->board_config == STAC_9200_PANASONIC) {
3750 spec->gpio_mask = spec->gpio_dir = 0x09;
3751 spec->gpio_data = 0x00;
3752 }
3753
c7d4b2fa
M		 3754 err = stac9200_parse_auto_config(codec);
3755 if (err < 0) {
3756 stac92xx_free(codec);
3757 return err;
3758 }
2f2f4251
M		 3759
3760 codec->patch_ops = stac92xx_patch_ops;
3761
3762 return 0;
3763}
3764
8e21c34c
TD		 3765static int patch_stac925x(struct hda_codec *codec)
3766{
3767 struct sigmatel_spec *spec;
3768 int err;
3769
3770 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3771 if (spec == NULL)
3772 return -ENOMEM;
3773
3774 codec->spec = spec;
a4eed138 3775 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3776 spec->pin_nids = stac925x_pin_nids;
3777 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3778 stac925x_models,
3779 stac925x_cfg_tbl);
9e507abd 3780 again:
8e21c34c 3781 if (spec->board_config < 0) {
2c11f955
TD		 3782 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3783 "using BIOS defaults\n");
8e21c34c
TD		 3784 err = stac92xx_save_bios_config_regs(codec);
3785 if (err < 0) {
3786 stac92xx_free(codec);
3787 return err;
3788 }
3789 spec->pin_configs = spec->bios_pin_configs;
3790 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3791 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3792 stac92xx_set_config_regs(codec);
3793 }
3794
3795 spec->multiout.max_channels = 2;
3796 spec->multiout.num_dacs = 1;
3797 spec->multiout.dac_nids = stac925x_dac_nids;
3798 spec->adc_nids = stac925x_adc_nids;
3799 spec->mux_nids = stac925x_mux_nids;
3800 spec->num_muxes = 1;
9e05b7a3 3801 spec->num_adcs = 1;
a64135a2 3802 spec->num_pwrs = 0;
2c11f955
TD		 3803 switch (codec->vendor_id) {
3804 case 0x83847632: /* STAC9202 */
3805 case 0x83847633: /* STAC9202D */
3806 case 0x83847636: /* STAC9251 */
3807 case 0x83847637: /* STAC9251D */
f6e9852a 3808 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3809 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3810 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3811 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3812 break;
3813 default:
3814 spec->num_dmics = 0;
3815 break;
3816 }
8e21c34c
TD		 3817
3818 spec->init = stac925x_core_init;
3819 spec->mixer = stac925x_mixer;
3820
3821 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3822 if (!err) {
3823 if (spec->board_config < 0) {
3824 printk(KERN_WARNING "hda_codec: No auto-config is "
3825 "available, default to model=ref\n");
3826 spec->board_config = STAC_925x_REF;
3827 goto again;
3828 }
3829 err = -EINVAL;
3830 }
8e21c34c
TD		 3831 if (err < 0) {
3832 stac92xx_free(codec);
3833 return err;
3834 }
3835
3836 codec->patch_ops = stac92xx_patch_ops;
3837
3838 return 0;
3839}
3840
e1f0d669
MR		 3841static struct hda_input_mux stac92hd73xx_dmux = {
3842 .num_items = 4,
3843 .items = {
3844 { "Analog Inputs", 0x0b },
3845 { "CD", 0x08 },
3846 { "Digital Mic 1", 0x09 },
3847 { "Digital Mic 2", 0x0a },
3848 }
3849};
3850
3851static int patch_stac92hd73xx(struct hda_codec *codec)
3852{
3853 struct sigmatel_spec *spec;
3854 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3855 int err = 0;
3856
3857 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3858 if (spec == NULL)
3859 return -ENOMEM;
3860
3861 codec->spec = spec;
e99d32b3 3862 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 3863 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3864 spec->pin_nids = stac92hd73xx_pin_nids;
3865 spec->board_config = snd_hda_check_board_config(codec,
3866 STAC_92HD73XX_MODELS,
3867 stac92hd73xx_models,
3868 stac92hd73xx_cfg_tbl);
3869again:
3870 if (spec->board_config < 0) {
3871 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3872 " STAC92HD73XX, using BIOS defaults\n");
3873 err = stac92xx_save_bios_config_regs(codec);
3874 if (err < 0) {
3875 stac92xx_free(codec);
3876 return err;
3877 }
3878 spec->pin_configs = spec->bios_pin_configs;
3879 } else {
3880 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3881 stac92xx_set_config_regs(codec);
3882 }
3883
3884 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3885 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3886
3887 if (spec->multiout.num_dacs < 0) {
3888 printk(KERN_WARNING "hda_codec: Could not determine "
3889 "number of channels defaulting to DAC count\n");
3890 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3891 }
3892
3893 switch (spec->multiout.num_dacs) {
3894 case 0x3: /* 6 Channel */
3895 spec->mixer = stac92hd73xx_6ch_mixer;
3896 spec->init = stac92hd73xx_6ch_core_init;
3897 break;
3898 case 0x4: /* 8 Channel */
e1f0d669
MR		 3899 spec->mixer = stac92hd73xx_8ch_mixer;
3900 spec->init = stac92hd73xx_8ch_core_init;
3901 break;
3902 case 0x5: /* 10 Channel */
e1f0d669
MR		 3903 spec->mixer = stac92hd73xx_10ch_mixer;
3904 spec->init = stac92hd73xx_10ch_core_init;
3905 };
3906
3907 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3908 spec->aloopback_mask = 0x01;
3909 spec->aloopback_shift = 8;
3910
1cd2224c 3911 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 3912 spec->mux_nids = stac92hd73xx_mux_nids;
3913 spec->adc_nids = stac92hd73xx_adc_nids;
3914 spec->dmic_nids = stac92hd73xx_dmic_nids;
3915 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 3916 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR		 3917
3918 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3919 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 3920 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
d9737751 3921 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
e1f0d669
MR		 3922 spec->dinput_mux = &stac92hd73xx_dmux;
3923 /* GPIO0 High = Enable EAPD */
0fc9dec4 3924 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 3925 spec->gpio_data = 0x01;
e1f0d669 3926
a7662640
MR		 3927 switch (spec->board_config) {
3928 case STAC_DELL_M6:
d654a660 3929 spec->init = dell_eq_core_init;
a7662640
MR		 3930 switch (codec->subsystem_id) {
3931 case 0x1028025e: /* Analog Mics */
3932 case 0x1028025f:
3933 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3934 spec->num_dmics = 0;
3935 break;
d654a660 3936 case 0x10280271: /* Digital Mics */
a7662640 3937 case 0x10280272:
d654a660
MR		 3938 spec->init = dell_m6_core_init;
3939 /* fall-through */
3940 case 0x10280254:
3941 case 0x10280255:
a7662640
MR		 3942 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3943 spec->num_dmics = 1;
3944 break;
3945 case 0x10280256: /* Both */
3946 case 0x10280057:
3947 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3948 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3949 spec->num_dmics = 1;
3950 break;
3951 }
3952 break;
3953 default:
3954 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
3955 }
3956
a64135a2
MR		 3957 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3958 spec->pwr_nids = stac92hd73xx_pwr_nids;
3959
d9737751 3960 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 3961
3962 if (!err) {
3963 if (spec->board_config < 0) {
3964 printk(KERN_WARNING "hda_codec: No auto-config is "
3965 "available, default to model=ref\n");
3966 spec->board_config = STAC_92HD73XX_REF;
3967 goto again;
3968 }
3969 err = -EINVAL;
3970 }
3971
3972 if (err < 0) {
3973 stac92xx_free(codec);
3974 return err;
3975 }
3976
3977 codec->patch_ops = stac92xx_patch_ops;
3978
3979 return 0;
3980}
3981
d0513fc6
MR		 3982static struct hda_input_mux stac92hd83xxx_dmux = {
3983 .num_items = 3,
3984 .items = {
3985 { "Analog Inputs", 0x03 },
3986 { "Digital Mic 1", 0x04 },
3987 { "Digital Mic 2", 0x05 },
3988 }
3989};
3990
3991static int patch_stac92hd83xxx(struct hda_codec *codec)
3992{
3993 struct sigmatel_spec *spec;
3994 int err;
3995
3996 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3997 if (spec == NULL)
3998 return -ENOMEM;
3999
4000 codec->spec = spec;
0ffa9807 4001 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4002 spec->mono_nid = 0x19;
4003 spec->digbeep_nid = 0x21;
4004 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4005 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4006 spec->adc_nids = stac92hd83xxx_adc_nids;
4007 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4008 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4009 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4010 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4011
4012 spec->init = stac92hd83xxx_core_init;
4013 switch (codec->vendor_id) {
4014 case 0x111d7605:
4015 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4016 break;
4017 default:
4018 spec->num_pwrs--;
4019 spec->init++; /* switch to config #2 */
4020 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4021 }
4022
4023 spec->mixer = stac92hd83xxx_mixer;
4024 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4025 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4026 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4027 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4028 spec->dinput_mux = &stac92hd83xxx_dmux;
4029 spec->pin_nids = stac92hd83xxx_pin_nids;
4030 spec->board_config = snd_hda_check_board_config(codec,
4031 STAC_92HD83XXX_MODELS,
4032 stac92hd83xxx_models,
4033 stac92hd83xxx_cfg_tbl);
4034again:
4035 if (spec->board_config < 0) {
4036 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4037 " STAC92HD83XXX, using BIOS defaults\n");
4038 err = stac92xx_save_bios_config_regs(codec);
4039 if (err < 0) {
4040 stac92xx_free(codec);
4041 return err;
4042 }
4043 spec->pin_configs = spec->bios_pin_configs;
4044 } else {
4045 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
4046 stac92xx_set_config_regs(codec);
4047 }
4048
4049 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4050 if (!err) {
4051 if (spec->board_config < 0) {
4052 printk(KERN_WARNING "hda_codec: No auto-config is "
4053 "available, default to model=ref\n");
4054 spec->board_config = STAC_92HD83XXX_REF;
4055 goto again;
4056 }
4057 err = -EINVAL;
4058 }
4059
4060 if (err < 0) {
4061 stac92xx_free(codec);
4062 return err;
4063 }
4064
4065 codec->patch_ops = stac92xx_patch_ops;
4066
4067 return 0;
4068}
4069
8daaaa97
MR		 4070#ifdef SND_HDA_NEEDS_RESUME
4071static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4072{
4073 struct sigmatel_spec *spec = codec->spec;
4074 int i;
4075 snd_hda_codec_write_cache(codec, codec->afg, 0,
4076 AC_VERB_SET_POWER_STATE, pwr);
4077
4078 msleep(1);
4079 for (i = 0; i < spec->num_adcs; i++) {
4080 snd_hda_codec_write_cache(codec,
4081 spec->adc_nids[i], 0,
4082 AC_VERB_SET_POWER_STATE, pwr);
4083 }
4084};
4085
4086static int stac92hd71xx_resume(struct hda_codec *codec)
4087{
4088 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4089 return stac92xx_resume(codec);
4090}
4091
4092static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4093{
4094 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
4095 return 0;
4096};
4097
4098#endif
4099
4100static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4101 .build_controls = stac92xx_build_controls,
4102 .build_pcms = stac92xx_build_pcms,
4103 .init = stac92xx_init,
4104 .free = stac92xx_free,
4105 .unsol_event = stac92xx_unsol_event,
4106#ifdef SND_HDA_NEEDS_RESUME
4107 .resume = stac92hd71xx_resume,
4108 .suspend = stac92hd71xx_suspend,
4109#endif
4110};
d0513fc6 4111
e035b841
MR		 4112static int patch_stac92hd71bxx(struct hda_codec *codec)
4113{
4114 struct sigmatel_spec *spec;
4115 int err = 0;
4116
4117 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4118 if (spec == NULL)
4119 return -ENOMEM;
4120
4121 codec->spec = spec;
8daaaa97 4122 codec->patch_ops = stac92xx_patch_ops;
e035b841 4123 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4124 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 4125 spec->pin_nids = stac92hd71bxx_pin_nids;
4126 spec->board_config = snd_hda_check_board_config(codec,
4127 STAC_92HD71BXX_MODELS,
4128 stac92hd71bxx_models,
4129 stac92hd71bxx_cfg_tbl);
4130again:
4131 if (spec->board_config < 0) {
4132 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4133 " STAC92HD71BXX, using BIOS defaults\n");
4134 err = stac92xx_save_bios_config_regs(codec);
4135 if (err < 0) {
4136 stac92xx_free(codec);
4137 return err;
4138 }
4139 spec->pin_configs = spec->bios_pin_configs;
4140 } else {
4141 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
4142 stac92xx_set_config_regs(codec);
4143 }
4144
541eee87
MR		 4145 switch (codec->vendor_id) {
4146 case 0x111d76b6: /* 4 Port without Analog Mixer */
4147 case 0x111d76b7:
4148 case 0x111d76b4: /* 6 Port without Analog Mixer */
4149 case 0x111d76b5:
4150 spec->mixer = stac92hd71bxx_mixer;
4151 spec->init = stac92hd71bxx_core_init;
0ffa9807 4152 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4153 break;
aafc4412 4154 case 0x111d7608: /* 5 Port with Analog Mixer */
8daaaa97
MR		 4155 if ((codec->revision_id & 0xf) == 0 ||
4156 (codec->revision_id & 0xf) == 1) {
4157#ifdef SND_HDA_NEEDS_RESUME
4158 codec->patch_ops = stac92hd71bxx_patch_ops;
4159#endif
4160 spec->stream_delay = 40; /* 40 milliseconds */
4161 }
4162
aafc4412
MR		 4163 /* no output amps */
4164 spec->num_pwrs = 0;
4165 spec->mixer = stac92hd71bxx_analog_mixer;
4166
4167 /* disable VSW */
4168 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
4169 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
4170 break;
4171 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4172 if ((codec->revision_id & 0xf) == 1) {
4173#ifdef SND_HDA_NEEDS_RESUME
4174 codec->patch_ops = stac92hd71bxx_patch_ops;
4175#endif
4176 spec->stream_delay = 40; /* 40 milliseconds */
4177 }
4178
aafc4412
MR		 4179 /* no output amps */
4180 spec->num_pwrs = 0;
4181 /* fallthru */
541eee87
MR		 4182 default:
4183 spec->mixer = stac92hd71bxx_analog_mixer;
4184 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4185 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4186 }
4187
4188 spec->aloopback_mask = 0x20;
4189 spec->aloopback_shift = 0;
4190
4fe5195c 4191 /* GPIO0 High = EAPD */
0fc9dec4
MR		 4192 spec->gpio_mask = 0x01;
4193 spec->gpio_dir = 0x01;
0fc9dec4 4194 spec->gpio_data = 0x01;
e035b841 4195
8daaaa97 4196 spec->powerdown_adcs = 1;
1cd2224c 4197 spec->digbeep_nid = 0x26;
e035b841
MR		 4198 spec->mux_nids = stac92hd71bxx_mux_nids;
4199 spec->adc_nids = stac92hd71bxx_adc_nids;
4200 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4201 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4202 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4203 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4204
4205 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4206 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
4207 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
d9737751 4208 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
1697055e 4209 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 4210
aea7bb0a 4211 spec->multiout.num_dacs = 1;
e035b841
MR		 4212 spec->multiout.hp_nid = 0x11;
4213 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4214
4215 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4216 if (!err) {
4217 if (spec->board_config < 0) {
4218 printk(KERN_WARNING "hda_codec: No auto-config is "
4219 "available, default to model=ref\n");
4220 spec->board_config = STAC_92HD71BXX_REF;
4221 goto again;
4222 }
4223 err = -EINVAL;
4224 }
4225
4226 if (err < 0) {
4227 stac92xx_free(codec);
4228 return err;
4229 }
4230
e035b841
MR		 4231 return 0;
4232};
4233
2f2f4251
M		 4234static int patch_stac922x(struct hda_codec *codec)
4235{
4236 struct sigmatel_spec *spec;
c7d4b2fa 4237 int err;
2f2f4251 4238
e560d8d8 4239 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4240 if (spec == NULL)
4241 return -ENOMEM;
4242
4243 codec->spec = spec;
a4eed138 4244 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4245 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4246 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4247 stac922x_models,
4248 stac922x_cfg_tbl);
536319af 4249 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4250 spec->gpio_mask = spec->gpio_dir = 0x03;
4251 spec->gpio_data = 0x03;
3fc24d85
TI		 4252 /* Intel Macs have all same PCI SSID, so we need to check
4253 * codec SSID to distinguish the exact models
4254 */
6f0778d8 4255 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4256 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4257
4258 case 0x106b0800:
4259 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4260 break;
5d5d3bc3
IZ		 4261 case 0x106b0600:
4262 case 0x106b0700:
4263 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4264 break;
5d5d3bc3
IZ		 4265 case 0x106b0e00:
4266 case 0x106b0f00:
4267 case 0x106b1600:
4268 case 0x106b1700:
4269 case 0x106b0200:
4270 case 0x106b1e00:
4271 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4272 break;
5d5d3bc3
IZ		 4273 case 0x106b1a00:
4274 case 0x00000100:
4275 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4276 break;
5d5d3bc3
IZ		 4277 case 0x106b0a00:
4278 case 0x106b2200:
4279 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4280 break;
536319af
NB		 4281 default:
4282 spec->board_config = STAC_INTEL_MAC_V3;
4283 break;
3fc24d85
TI		 4284 }
4285 }
4286
9e507abd 4287 again:
11b44bbd
RF		 4288 if (spec->board_config < 0) {
4289 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4290 "using BIOS defaults\n");
4291 err = stac92xx_save_bios_config_regs(codec);
4292 if (err < 0) {
4293 stac92xx_free(codec);
4294 return err;
4295 }
4296 spec->pin_configs = spec->bios_pin_configs;
4297 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4298 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4299 stac92xx_set_config_regs(codec);
4300 }
2f2f4251 4301
c7d4b2fa
M		 4302 spec->adc_nids = stac922x_adc_nids;
4303 spec->mux_nids = stac922x_mux_nids;
2549413e 4304 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4305 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4306 spec->num_dmics = 0;
a64135a2 4307 spec->num_pwrs = 0;
c7d4b2fa
M		 4308
4309 spec->init = stac922x_core_init;
2f2f4251 4310 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4311
4312 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4313
3cc08dc6 4314 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4315 if (!err) {
4316 if (spec->board_config < 0) {
4317 printk(KERN_WARNING "hda_codec: No auto-config is "
4318 "available, default to model=ref\n");
4319 spec->board_config = STAC_D945_REF;
4320 goto again;
4321 }
4322 err = -EINVAL;
4323 }
3cc08dc6
MP		 4324 if (err < 0) {
4325 stac92xx_free(codec);
4326 return err;
4327 }
4328
4329 codec->patch_ops = stac92xx_patch_ops;
4330
807a4636
TI		 4331 /* Fix Mux capture level; max to 2 */
4332 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4333 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4334 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4335 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4336 (0 << AC_AMPCAP_MUTE_SHIFT));
4337
3cc08dc6
MP		 4338 return 0;
4339}
4340
4341static int patch_stac927x(struct hda_codec *codec)
4342{
4343 struct sigmatel_spec *spec;
4344 int err;
4345
4346 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4347 if (spec == NULL)
4348 return -ENOMEM;
4349
4350 codec->spec = spec;
a4eed138 4351 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4352 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4353 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4354 stac927x_models,
4355 stac927x_cfg_tbl);
9e507abd 4356 again:
8e9068b1
MR		 4357 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4358 if (spec->board_config < 0)
4359 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4360 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4361 err = stac92xx_save_bios_config_regs(codec);
4362 if (err < 0) {
4363 stac92xx_free(codec);
4364 return err;
4365 }
4366 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4367 } else {
3cc08dc6
MP		 4368 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4369 stac92xx_set_config_regs(codec);
4370 }
4371
1cd2224c 4372 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4373 spec->adc_nids = stac927x_adc_nids;
4374 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4375 spec->mux_nids = stac927x_mux_nids;
4376 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4377 spec->smux_nids = stac927x_smux_nids;
4378 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
b76c850f 4379 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4380 spec->multiout.dac_nids = spec->dac_nids;
4381
81d3dbde 4382 switch (spec->board_config) {
93ed1503 4383 case STAC_D965_3ST:
93ed1503 4384 case STAC_D965_5ST:
8e9068b1 4385 /* GPIO0 High = Enable EAPD */
0fc9dec4 4386 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4387 spec->gpio_data = 0x01;
8e9068b1
MR		 4388 spec->num_dmics = 0;
4389
93ed1503 4390 spec->init = d965_core_init;
9e05b7a3 4391 spec->mixer = stac927x_mixer;
81d3dbde 4392 break;
8e9068b1 4393 case STAC_DELL_BIOS:
780c8be4
MR		 4394 switch (codec->subsystem_id) {
4395 case 0x10280209:
4396 case 0x1028022e:
4397 /* correct the device field to SPDIF out */
4398 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4399 break;
4400 };
03d7ca17
MR		 4401 /* configure the analog microphone on some laptops */
4402 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4403 /* correct the front output jack as a hp out */
7989fba9 4404 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4405 /* correct the front input jack as a mic */
4406 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4407 /* fallthru */
8e9068b1
MR		 4408 case STAC_DELL_3ST:
4409 /* GPIO2 High = Enable EAPD */
0fc9dec4 4410 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4411 spec->gpio_data = 0x04;
7f16859a
MR		 4412 spec->dmic_nids = stac927x_dmic_nids;
4413 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4414
8e9068b1
MR		 4415 spec->init = d965_core_init;
4416 spec->mixer = stac927x_mixer;
4417 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4418 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4419 break;
4420 default:
f1f208d0 4421 /* GPIO0 High = Enable EAPD */
0fc9dec4 4422 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4423 spec->gpio_data = 0x01;
8e9068b1
MR		 4424 spec->num_dmics = 0;
4425
4426 spec->init = stac927x_core_init;
4427 spec->mixer = stac927x_mixer;
7f16859a
MR		 4428 }
4429
a64135a2 4430 spec->num_pwrs = 0;
e1f0d669
MR		 4431 spec->aloopback_mask = 0x40;
4432 spec->aloopback_shift = 0;
8e9068b1 4433
3cc08dc6 4434 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4435 if (!err) {
4436 if (spec->board_config < 0) {
4437 printk(KERN_WARNING "hda_codec: No auto-config is "
4438 "available, default to model=ref\n");
4439 spec->board_config = STAC_D965_REF;
4440 goto again;
4441 }
4442 err = -EINVAL;
4443 }
c7d4b2fa
M		 4444 if (err < 0) {
4445 stac92xx_free(codec);
4446 return err;
4447 }
2f2f4251
M		 4448
4449 codec->patch_ops = stac92xx_patch_ops;
4450
52987656
TI		 4451 /*
4452 * !!FIXME!!
4453 * The STAC927x seem to require fairly long delays for certain
4454 * command sequences. With too short delays (even if the answer
4455 * is set to RIRB properly), it results in the silence output
4456 * on some hardwares like Dell.
4457 *
4458 * The below flag enables the longer delay (see get_response
4459 * in hda_intel.c).
4460 */
4461 codec->bus->needs_damn_long_delay = 1;
4462
2f2f4251
M		 4463 return 0;
4464}
4465
f3302a59
MP		 4466static int patch_stac9205(struct hda_codec *codec)
4467{
4468 struct sigmatel_spec *spec;
8259980e 4469 int err;
f3302a59
MP		 4470
4471 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4472 if (spec == NULL)
4473 return -ENOMEM;
4474
4475 codec->spec = spec;
a4eed138 4476 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4477 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4478 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4479 stac9205_models,
4480 stac9205_cfg_tbl);
9e507abd 4481 again:
11b44bbd
RF		 4482 if (spec->board_config < 0) {
4483 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4484 err = stac92xx_save_bios_config_regs(codec);
4485 if (err < 0) {
4486 stac92xx_free(codec);
4487 return err;
4488 }
4489 spec->pin_configs = spec->bios_pin_configs;
4490 } else {
f3302a59
MP		 4491 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4492 stac92xx_set_config_regs(codec);
4493 }
4494
1cd2224c 4495 spec->digbeep_nid = 0x23;
f3302a59 4496 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4497 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4498 spec->mux_nids = stac9205_mux_nids;
2549413e 4499 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 4500 spec->smux_nids = stac9205_smux_nids;
4501 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 4502 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4503 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4504 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4505 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4506 spec->num_pwrs = 0;
f3302a59
MP		 4507
4508 spec->init = stac9205_core_init;
4509 spec->mixer = stac9205_mixer;
4510
e1f0d669
MR		 4511 spec->aloopback_mask = 0x40;
4512 spec->aloopback_shift = 0;
f3302a59 4513 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4514
ae0a8ed8 4515 switch (spec->board_config){
ae0a8ed8 4516 case STAC_9205_DELL_M43:
87d48363
MR		 4517 /* Enable SPDIF in/out */
4518 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4519 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4520
4fe5195c
MR		 4521 /* Enable unsol response for GPIO4/Dock HP connection */
4522 snd_hda_codec_write(codec, codec->afg, 0,
4523 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4524 snd_hda_codec_write_cache(codec, codec->afg, 0,
4525 AC_VERB_SET_UNSOLICITED_ENABLE,
4526 (AC_USRSP_EN | STAC_HP_EVENT));
4527
4528 spec->gpio_dir = 0x0b;
0fc9dec4 4529 spec->eapd_mask = 0x01;
4fe5195c
MR		 4530 spec->gpio_mask = 0x1b;
4531 spec->gpio_mute = 0x10;
e2e7d624 4532 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4533 * GPIO3 Low = DRM
87d48363 4534 */
4fe5195c 4535 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4536 break;
4537 default:
4538 /* GPIO0 High = EAPD */
0fc9dec4 4539 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4540 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4541 break;
4542 }
33382403 4543
f3302a59 4544 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 4545 if (!err) {
4546 if (spec->board_config < 0) {
4547 printk(KERN_WARNING "hda_codec: No auto-config is "
4548 "available, default to model=ref\n");
4549 spec->board_config = STAC_9205_REF;
4550 goto again;
4551 }
4552 err = -EINVAL;
4553 }
f3302a59
MP		 4554 if (err < 0) {
4555 stac92xx_free(codec);
4556 return err;
4557 }
4558
4559 codec->patch_ops = stac92xx_patch_ops;
4560
4561 return 0;
4562}
4563
db064e50 4564/*
6d859065 4565 * STAC9872 hack
db064e50
TI		 4566 */
4567
99ccc560 4568/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 4569static hda_nid_t vaio_dacs[] = { 0x2 };
4570#define VAIO_HP_DAC 0x5
4571static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
4572static hda_nid_t vaio_mux_nids[] = { 0x15 };
4573
4574static struct hda_input_mux vaio_mux = {
a3a2f429 4575 .num_items = 3,
db064e50 4576 .items = {
d773781c 4577 /* { "HP", 0x0 }, */
1624cb9a
TI		 4578 { "Mic Jack", 0x1 },
4579 { "Internal Mic", 0x2 },
db064e50
TI		 4580 { "PCM", 0x3 },
4581 }
4582};
4583
4584static struct hda_verb vaio_init[] = {
4585 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 4586 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 4587 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4588 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4589 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4590 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4591 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 4592 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4593 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4594 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4595 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4596 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4597 {}
4598};
4599
6d859065
GM		 4600static struct hda_verb vaio_ar_init[] = {
4601 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
4602 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4603 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4604 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4605/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
4606 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4607 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4608 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4609 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4610/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
4611 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4612 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4613 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4614 {}
4615};
4616
db064e50 4617/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4618static struct hda_bind_ctls vaio_bind_master_vol = {
4619 .ops = &snd_hda_bind_vol,
4620 .values = {
4621 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4622 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4623 0
4624 },
4625};
db064e50
TI		 4626
4627/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4628static struct hda_bind_ctls vaio_bind_master_sw = {
4629 .ops = &snd_hda_bind_sw,
4630 .values = {
4631 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4632 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4633 0,
4634 },
4635};
db064e50
TI		 4636
4637static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 4638 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4639 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 4640 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4641 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4642 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4643 {
4644 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4645 .name = "Capture Source",
4646 .count = 1,
4647 .info = stac92xx_mux_enum_info,
4648 .get = stac92xx_mux_enum_get,
4649 .put = stac92xx_mux_enum_put,
4650 },
4651 {}
4652};
4653
6d859065 4654static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 4655 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4656 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 4657 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4658 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4659 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4660 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
4661 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
4662 {
4663 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4664 .name = "Capture Source",
4665 .count = 1,
4666 .info = stac92xx_mux_enum_info,
4667 .get = stac92xx_mux_enum_get,
4668 .put = stac92xx_mux_enum_put,
4669 },
4670 {}
4671};
4672
4673static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4674 .build_controls = stac92xx_build_controls,
4675 .build_pcms = stac92xx_build_pcms,
4676 .init = stac92xx_init,
4677 .free = stac92xx_free,
cb53c626 4678#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4679 .resume = stac92xx_resume,
4680#endif
4681};
4682
72e7b0dd
TI		 4683static int stac9872_vaio_init(struct hda_codec *codec)
4684{
4685 int err;
4686
4687 err = stac92xx_init(codec);
4688 if (err < 0)
4689 return err;
4690 if (codec->patch_ops.unsol_event)
4691 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4692 return 0;
4693}
4694
4695static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4696{
40c1d308 4697 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4698 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4699 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4700 } else {
4701 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4702 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4703 }
4704}
4705
4706static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4707{
4708 switch (res >> 26) {
4709 case STAC_HP_EVENT:
4710 stac9872_vaio_hp_detect(codec, res);
4711 break;
4712 }
4713}
4714
4715static struct hda_codec_ops stac9872_vaio_patch_ops = {
4716 .build_controls = stac92xx_build_controls,
4717 .build_pcms = stac92xx_build_pcms,
4718 .init = stac9872_vaio_init,
4719 .free = stac92xx_free,
4720 .unsol_event = stac9872_vaio_unsol_event,
4721#ifdef CONFIG_PM
4722 .resume = stac92xx_resume,
4723#endif
4724};
4725
6d859065
GM		 4726enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4727 CXD9872RD_VAIO,
4728 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
4729 STAC9872AK_VAIO,
4730 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
4731 STAC9872K_VAIO,
4732 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 4733 CXD9872AKD_VAIO,
4734 STAC_9872_MODELS,
4735};
4736
4737static const char *stac9872_models[STAC_9872_MODELS] = {
4738 [CXD9872RD_VAIO] = "vaio",
4739 [CXD9872AKD_VAIO] = "vaio-ar",
4740};
4741
4742static struct snd_pci_quirk stac9872_cfg_tbl[] = {
4743 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
4744 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
4745 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 4746 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 4747 {}
4748};
4749
6d859065 4750static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4751{
4752 struct sigmatel_spec *spec;
4753 int board_config;
4754
f5fcc13c
TI		 4755 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
4756 stac9872_models,
4757 stac9872_cfg_tbl);
db064e50
TI		 4758 if (board_config < 0)
4759 /* unknown config, let generic-parser do its job... */
4760 return snd_hda_parse_generic_codec(codec);
4761
4762 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4763 if (spec == NULL)
4764 return -ENOMEM;
4765
4766 codec->spec = spec;
4767 switch (board_config) {
6d859065
GM		 4768 case CXD9872RD_VAIO:
4769 case STAC9872AK_VAIO:
4770 case STAC9872K_VAIO:
db064e50
TI		 4771 spec->mixer = vaio_mixer;
4772 spec->init = vaio_init;
4773 spec->multiout.max_channels = 2;
4774 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4775 spec->multiout.dac_nids = vaio_dacs;
4776 spec->multiout.hp_nid = VAIO_HP_DAC;
4777 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
4778 spec->adc_nids = vaio_adcs;
a64135a2 4779 spec->num_pwrs = 0;
db064e50
TI		 4780 spec->input_mux = &vaio_mux;
4781 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4782 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 4783 break;
6d859065
GM		 4784
4785 case CXD9872AKD_VAIO:
4786 spec->mixer = vaio_ar_mixer;
4787 spec->init = vaio_ar_init;
4788 spec->multiout.max_channels = 2;
4789 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4790 spec->multiout.dac_nids = vaio_dacs;
4791 spec->multiout.hp_nid = VAIO_HP_DAC;
4792 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 4793 spec->num_pwrs = 0;
6d859065
GM		 4794 spec->adc_nids = vaio_adcs;
4795 spec->input_mux = &vaio_mux;
4796 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4797 codec->patch_ops = stac9872_patch_ops;
6d859065 4798 break;
db064e50
TI		 4799 }
4800
db064e50
TI		 4801 return 0;
4802}
4803
4804
2f2f4251
M		 4805/*
4806 * patch entries
4807 */
4808struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4809 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4810 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4811 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4812 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4813 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4814 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4815 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4816 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4817 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4818 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4819 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4820 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4821 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4822 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4823 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4824 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4825 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4826 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4827 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4828 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4829 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4830 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4831 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4832 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4833 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4834 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4835 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4836 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4837 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 4838 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
4839 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 4840 /* The following does not take into account .id=0x83847661 when subsys =
4841 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4842 * currently not fully supported.
4843 */
4844 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4845 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4846 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 4847 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4848 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4849 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4850 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4851 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4852 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4853 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4854 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 4855 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 4856 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
4857 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 4858 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 4859 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4860 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4861 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 4862 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4863 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4864 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4865 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4866 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4867 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4868 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4869 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 4870 {} /* terminator */
4871};
Clone of davem's net-next-2.6 tree