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[ALSA] pcsp: Fix build with CONFIG_PM=n
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
2f2f4251 36
4e55096e 37#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 38#define STAC_PWR_EVENT 0x20
39#define STAC_HP_EVENT 0x30
4e55096e 40
f5fcc13c
TI		 41enum {
42 STAC_REF,
bf277785 43 STAC_9200_OQO,
dfe495d0
TI		 44 STAC_9200_DELL_D21,
45 STAC_9200_DELL_D22,
46 STAC_9200_DELL_D23,
47 STAC_9200_DELL_M21,
48 STAC_9200_DELL_M22,
49 STAC_9200_DELL_M23,
50 STAC_9200_DELL_M24,
51 STAC_9200_DELL_M25,
52 STAC_9200_DELL_M26,
53 STAC_9200_DELL_M27,
1194b5b7 54 STAC_9200_GATEWAY,
117f257d 55 STAC_9200_PANASONIC,
f5fcc13c
TI		 56 STAC_9200_MODELS
57};
58
59enum {
60 STAC_9205_REF,
dfe495d0 61 STAC_9205_DELL_M42,
ae0a8ed8
TD		 62 STAC_9205_DELL_M43,
63 STAC_9205_DELL_M44,
f5fcc13c
TI		 64 STAC_9205_MODELS
65};
66
e1f0d669
MR		 67enum {
68 STAC_92HD73XX_REF,
a7662640 69 STAC_DELL_M6,
e1f0d669
MR		 70 STAC_92HD73XX_MODELS
71};
72
e035b841
MR		 73enum {
74 STAC_92HD71BXX_REF,
a7662640
MR		 75 STAC_DELL_M4_1,
76 STAC_DELL_M4_2,
e035b841
MR		 77 STAC_92HD71BXX_MODELS
78};
79
8e21c34c
TD		 80enum {
81 STAC_925x_REF,
82 STAC_M2_2,
83 STAC_MA6,
2c11f955 84 STAC_PA6,
8e21c34c
TD		 85 STAC_925x_MODELS
86};
87
f5fcc13c
TI		 88enum {
89 STAC_D945_REF,
90 STAC_D945GTP3,
91 STAC_D945GTP5,
5d5d3bc3
IZ		 92 STAC_INTEL_MAC_V1,
93 STAC_INTEL_MAC_V2,
94 STAC_INTEL_MAC_V3,
95 STAC_INTEL_MAC_V4,
96 STAC_INTEL_MAC_V5,
dfe495d0 97 /* for backward compatibility */
f5fcc13c 98 STAC_MACMINI,
3fc24d85 99 STAC_MACBOOK,
6f0778d8
NB		 100 STAC_MACBOOK_PRO_V1,
101 STAC_MACBOOK_PRO_V2,
f16928fb 102 STAC_IMAC_INTEL,
0dae0f83 103 STAC_IMAC_INTEL_20,
dfe495d0
TI		 104 STAC_922X_DELL_D81,
105 STAC_922X_DELL_D82,
106 STAC_922X_DELL_M81,
107 STAC_922X_DELL_M82,
f5fcc13c
TI		 108 STAC_922X_MODELS
109};
110
111enum {
112 STAC_D965_REF,
113 STAC_D965_3ST,
114 STAC_D965_5ST,
4ff076e5 115 STAC_DELL_3ST,
8e9068b1 116 STAC_DELL_BIOS,
f5fcc13c
TI		 117 STAC_927X_MODELS
118};
403d1944 119
2f2f4251 120struct sigmatel_spec {
c8b6bf9b 121 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 122 unsigned int num_mixers;
123
403d1944 124 int board_config;
c7d4b2fa 125 unsigned int surr_switch: 1;
403d1944
MP		 126 unsigned int line_switch: 1;
127 unsigned int mic_switch: 1;
3cc08dc6 128 unsigned int alt_switch: 1;
82bc955f 129 unsigned int hp_detect: 1;
c7d4b2fa 130
4fe5195c 131 /* gpio lines */
0fc9dec4 132 unsigned int eapd_mask;
4fe5195c
MR		 133 unsigned int gpio_mask;
134 unsigned int gpio_dir;
135 unsigned int gpio_data;
136 unsigned int gpio_mute;
137
138 /* analog loopback */
e1f0d669
MR		 139 unsigned char aloopback_mask;
140 unsigned char aloopback_shift;
8259980e 141
a64135a2
MR		 142 /* power management */
143 unsigned int num_pwrs;
144 hda_nid_t *pwr_nids;
b76c850f 145 hda_nid_t *dac_list;
a64135a2 146
2f2f4251 147 /* playback */
b22b4821
MR		 148 struct hda_input_mux *mono_mux;
149 unsigned int cur_mmux;
2f2f4251 150 struct hda_multi_out multiout;
3cc08dc6 151 hda_nid_t dac_nids[5];
2f2f4251
M		 152
153 /* capture */
154 hda_nid_t *adc_nids;
2f2f4251 155 unsigned int num_adcs;
dabbed6f
M		 156 hda_nid_t *mux_nids;
157 unsigned int num_muxes;
8b65727b
MP		 158 hda_nid_t *dmic_nids;
159 unsigned int num_dmics;
e1f0d669 160 hda_nid_t *dmux_nids;
1697055e 161 unsigned int num_dmuxes;
dabbed6f 162 hda_nid_t dig_in_nid;
b22b4821 163 hda_nid_t mono_nid;
2f2f4251 164
2f2f4251
M		 165 /* pin widgets */
166 hda_nid_t *pin_nids;
167 unsigned int num_pins;
2f2f4251 168 unsigned int *pin_configs;
11b44bbd 169 unsigned int *bios_pin_configs;
2f2f4251
M		 170
171 /* codec specific stuff */
172 struct hda_verb *init;
c8b6bf9b 173 struct snd_kcontrol_new *mixer;
2f2f4251
M		 174
175 /* capture source */
8b65727b 176 struct hda_input_mux *dinput_mux;
e1f0d669 177 unsigned int cur_dmux[2];
c7d4b2fa 178 struct hda_input_mux *input_mux;
3cc08dc6 179 unsigned int cur_mux[3];
2f2f4251 180
403d1944
MP		 181 /* i/o switches */
182 unsigned int io_switch[2];
0fb87bb4 183 unsigned int clfe_swap;
7c2ba97b 184 unsigned int hp_switch;
5f10c4a9 185 unsigned int aloopback;
2f2f4251 186
c7d4b2fa
M		 187 struct hda_pcm pcm_rec[2]; /* PCM information */
188
189 /* dynamic controls and input_mux */
190 struct auto_pin_cfg autocfg;
191 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 192 struct snd_kcontrol_new *kctl_alloc;
8b65727b 193 struct hda_input_mux private_dimux;
c7d4b2fa 194 struct hda_input_mux private_imux;
b22b4821 195 struct hda_input_mux private_mono_mux;
2f2f4251
M		 196};
197
198static hda_nid_t stac9200_adc_nids[1] = {
199 0x03,
200};
201
202static hda_nid_t stac9200_mux_nids[1] = {
203 0x0c,
204};
205
206static hda_nid_t stac9200_dac_nids[1] = {
207 0x02,
208};
209
a64135a2
MR		 210static hda_nid_t stac92hd73xx_pwr_nids[8] = {
211 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
212 0x0f, 0x10, 0x11
213};
214
e1f0d669
MR		 215static hda_nid_t stac92hd73xx_adc_nids[2] = {
216 0x1a, 0x1b
217};
218
219#define STAC92HD73XX_NUM_DMICS 2
220static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
221 0x13, 0x14, 0
222};
223
224#define STAC92HD73_DAC_COUNT 5
225static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
226 0x15, 0x16, 0x17, 0x18, 0x19,
227};
228
229static hda_nid_t stac92hd73xx_mux_nids[4] = {
230 0x28, 0x29, 0x2a, 0x2b,
231};
232
233static hda_nid_t stac92hd73xx_dmux_nids[2] = {
234 0x20, 0x21,
235};
236
a64135a2
MR		 237static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
238 0x0a, 0x0d, 0x0f
239};
240
e035b841
MR		 241static hda_nid_t stac92hd71bxx_adc_nids[2] = {
242 0x12, 0x13,
243};
244
245static hda_nid_t stac92hd71bxx_mux_nids[2] = {
246 0x1a, 0x1b
247};
248
e1f0d669
MR		 249static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
250 0x1c,
251};
252
aea7bb0a 253static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 254 0x10, /*0x11, */
255};
256
257#define STAC92HD71BXX_NUM_DMICS 2
258static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
259 0x18, 0x19, 0
260};
261
8e21c34c
TD		 262static hda_nid_t stac925x_adc_nids[1] = {
263 0x03,
264};
265
266static hda_nid_t stac925x_mux_nids[1] = {
267 0x0f,
268};
269
270static hda_nid_t stac925x_dac_nids[1] = {
271 0x02,
272};
273
f6e9852a
TI		 274#define STAC925X_NUM_DMICS 1
275static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
276 0x15, 0
2c11f955
TD		 277};
278
1697055e
TI		 279static hda_nid_t stac925x_dmux_nids[1] = {
280 0x14,
281};
282
2f2f4251
M		 283static hda_nid_t stac922x_adc_nids[2] = {
284 0x06, 0x07,
285};
286
287static hda_nid_t stac922x_mux_nids[2] = {
288 0x12, 0x13,
289};
290
3cc08dc6
MP		 291static hda_nid_t stac927x_adc_nids[3] = {
292 0x07, 0x08, 0x09
293};
294
295static hda_nid_t stac927x_mux_nids[3] = {
296 0x15, 0x16, 0x17
297};
298
b76c850f
MR		 299static hda_nid_t stac927x_dac_nids[6] = {
300 0x02, 0x03, 0x04, 0x05, 0x06, 0
301};
302
e1f0d669
MR		 303static hda_nid_t stac927x_dmux_nids[1] = {
304 0x1b,
305};
306
7f16859a
MR		 307#define STAC927X_NUM_DMICS 2
308static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
309 0x13, 0x14, 0
310};
311
f3302a59
MP		 312static hda_nid_t stac9205_adc_nids[2] = {
313 0x12, 0x13
314};
315
316static hda_nid_t stac9205_mux_nids[2] = {
317 0x19, 0x1a
318};
319
e1f0d669 320static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 321 0x1d,
e1f0d669
MR		 322};
323
f6e9852a
TI		 324#define STAC9205_NUM_DMICS 2
325static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
326 0x17, 0x18, 0
8b65727b
MP		 327};
328
c7d4b2fa 329static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 330 0x08, 0x09, 0x0d, 0x0e,
331 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 332};
333
8e21c34c
TD		 334static hda_nid_t stac925x_pin_nids[8] = {
335 0x07, 0x08, 0x0a, 0x0b,
336 0x0c, 0x0d, 0x10, 0x11,
337};
338
2f2f4251
M		 339static hda_nid_t stac922x_pin_nids[10] = {
340 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
341 0x0f, 0x10, 0x11, 0x15, 0x1b,
342};
343
a7662640 344static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 345 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
346 0x0f, 0x10, 0x11, 0x12, 0x13,
a7662640 347 0x14, 0x1e, 0x22
e1f0d669
MR		 348};
349
e035b841
MR		 350static hda_nid_t stac92hd71bxx_pin_nids[10] = {
351 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
352 0x0f, 0x14, 0x18, 0x19, 0x1e,
353};
354
3cc08dc6
MP		 355static hda_nid_t stac927x_pin_nids[14] = {
356 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
357 0x0f, 0x10, 0x11, 0x12, 0x13,
358 0x14, 0x21, 0x22, 0x23,
359};
360
f3302a59
MP		 361static hda_nid_t stac9205_pin_nids[12] = {
362 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
363 0x0f, 0x14, 0x16, 0x17, 0x18,
364 0x21, 0x22,
f3302a59
MP		 365};
366
8b65727b
MP		 367static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
368 struct snd_ctl_elem_info *uinfo)
369{
370 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
371 struct sigmatel_spec *spec = codec->spec;
372 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
373}
374
375static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
376 struct snd_ctl_elem_value *ucontrol)
377{
378 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
379 struct sigmatel_spec *spec = codec->spec;
e1f0d669 380 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 381
e1f0d669 382 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 383 return 0;
384}
385
386static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
387 struct snd_ctl_elem_value *ucontrol)
388{
389 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
390 struct sigmatel_spec *spec = codec->spec;
e1f0d669 391 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 392
393 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 394 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 395}
396
c8b6bf9b 397static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 398{
399 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
400 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 401 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 402}
403
c8b6bf9b 404static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 405{
406 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
407 struct sigmatel_spec *spec = codec->spec;
408 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
409
410 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
411 return 0;
412}
413
c8b6bf9b 414static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 415{
416 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
417 struct sigmatel_spec *spec = codec->spec;
418 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
419
c7d4b2fa 420 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 421 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
422}
423
b22b4821
MR		 424static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
425 struct snd_ctl_elem_info *uinfo)
426{
427 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
428 struct sigmatel_spec *spec = codec->spec;
429 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
430}
431
432static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
433 struct snd_ctl_elem_value *ucontrol)
434{
435 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
436 struct sigmatel_spec *spec = codec->spec;
437
438 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
439 return 0;
440}
441
442static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
443 struct snd_ctl_elem_value *ucontrol)
444{
445 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
446 struct sigmatel_spec *spec = codec->spec;
447
448 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
449 spec->mono_nid, &spec->cur_mmux);
450}
451
5f10c4a9
ML		 452#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
453
454static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
455 struct snd_ctl_elem_value *ucontrol)
456{
457 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 458 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 459 struct sigmatel_spec *spec = codec->spec;
460
e1f0d669
MR		 461 ucontrol->value.integer.value[0] = !!(spec->aloopback &
462 (spec->aloopback_mask << idx));
5f10c4a9
ML		 463 return 0;
464}
465
466static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
467 struct snd_ctl_elem_value *ucontrol)
468{
469 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
470 struct sigmatel_spec *spec = codec->spec;
e1f0d669 471 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 472 unsigned int dac_mode;
e1f0d669 473 unsigned int val, idx_val;
5f10c4a9 474
e1f0d669
MR		 475 idx_val = spec->aloopback_mask << idx;
476 if (ucontrol->value.integer.value[0])
477 val = spec->aloopback | idx_val;
478 else
479 val = spec->aloopback & ~idx_val;
68ea7b2f 480 if (spec->aloopback == val)
5f10c4a9
ML		 481 return 0;
482
68ea7b2f 483 spec->aloopback = val;
5f10c4a9 484
e1f0d669
MR		 485 /* Only return the bits defined by the shift value of the
486 * first two bytes of the mask
487 */
5f10c4a9 488 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 489 kcontrol->private_value & 0xFFFF, 0x0);
490 dac_mode >>= spec->aloopback_shift;
5f10c4a9 491
e1f0d669 492 if (spec->aloopback & idx_val) {
5f10c4a9 493 snd_hda_power_up(codec);
e1f0d669 494 dac_mode |= idx_val;
5f10c4a9
ML		 495 } else {
496 snd_hda_power_down(codec);
e1f0d669 497 dac_mode &= ~idx_val;
5f10c4a9
ML		 498 }
499
500 snd_hda_codec_write_cache(codec, codec->afg, 0,
501 kcontrol->private_value >> 16, dac_mode);
502
503 return 1;
504}
505
c7d4b2fa 506static struct hda_verb stac9200_core_init[] = {
2f2f4251 507 /* set dac0mux for dac converter */
c7d4b2fa 508 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 509 {}
510};
511
1194b5b7
TI		 512static struct hda_verb stac9200_eapd_init[] = {
513 /* set dac0mux for dac converter */
514 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
515 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
516 {}
517};
518
e1f0d669
MR		 519static struct hda_verb stac92hd73xx_6ch_core_init[] = {
520 /* set master volume and direct control */
521 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
522 /* setup audio connections */
523 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
524 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
525 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
526 /* setup adcs to point to mixer */
527 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
528 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 529 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
530 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
531 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
532 /* setup import muxs */
533 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
534 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
535 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
536 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
537 {}
538};
539
d654a660
MR		 540static struct hda_verb dell_eq_core_init[] = {
541 /* set master volume to max value without distortion
542 * and direct control */
543 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
544 /* setup audio connections */
545 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
546 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
547 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
548 /* setup adcs to point to mixer */
549 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
550 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
551 /* setup import muxs */
552 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
553 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
554 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
555 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
556 {}
557};
558
52fe0f9d
MR		 559static struct hda_verb dell_m6_core_init[] = {
560 /* set master volume and direct control */
561 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
562 /* setup audio connections */
7747ecce
MR		 563 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
564 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 565 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
566 /* setup adcs to point to mixer */
567 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
568 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
569 /* setup import muxs */
570 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
571 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
572 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
573 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
574 {}
575};
576
e1f0d669
MR		 577static struct hda_verb stac92hd73xx_8ch_core_init[] = {
578 /* set master volume and direct control */
579 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
580 /* setup audio connections */
581 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
582 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
583 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
584 /* connect hp ports to dac3 */
585 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
586 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
587 /* setup adcs to point to mixer */
588 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
589 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 590 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
591 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
592 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
593 /* setup import muxs */
594 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
595 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
596 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
597 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
598 {}
599};
600
601static struct hda_verb stac92hd73xx_10ch_core_init[] = {
602 /* set master volume and direct control */
603 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
604 /* setup audio connections */
605 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
606 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
607 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
608 /* dac3 is connected to import3 mux */
609 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
610 /* connect hp ports to dac4 */
611 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
612 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
613 /* setup adcs to point to mixer */
614 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
615 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 616 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
617 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
618 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
619 /* setup import muxs */
620 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
621 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
622 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
623 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
624 {}
625};
626
e035b841 627static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 628 /* set master volume and direct control */
629 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
630 /* connect headphone jack to dac1 */
631 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
632 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
633 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
634 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
635 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
636 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 637};
638
639static struct hda_verb stac92hd71bxx_analog_core_init[] = {
e035b841
MR		 640 /* set master volume and direct control */
641 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
642 /* connect headphone jack to dac1 */
643 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
9b35947f
MR		 644 /* connect ports 0d and 0f to audio mixer */
645 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
646 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
a64135a2 647 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
9b35947f
MR		 648 /* unmute dac0 input in audio mixer */
649 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
e035b841
MR		 650 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
651 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
652 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
653 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 654 {}
655};
656
8e21c34c
TD		 657static struct hda_verb stac925x_core_init[] = {
658 /* set dac0mux for dac converter */
659 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
660 {}
661};
662
c7d4b2fa 663static struct hda_verb stac922x_core_init[] = {
2f2f4251 664 /* set master volume and direct control */
c7d4b2fa 665 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 666 {}
667};
668
93ed1503 669static struct hda_verb d965_core_init[] = {
19039bd0 670 /* set master volume and direct control */
93ed1503 671 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 672 /* unmute node 0x1b */
673 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
674 /* select node 0x03 as DAC */
675 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
676 {}
677};
678
3cc08dc6
MP		 679static struct hda_verb stac927x_core_init[] = {
680 /* set master volume and direct control */
681 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
682 {}
683};
684
f3302a59
MP		 685static struct hda_verb stac9205_core_init[] = {
686 /* set master volume and direct control */
687 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
688 {}
689};
690
b22b4821
MR		 691#define STAC_MONO_MUX \
692 { \
693 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
694 .name = "Mono Mux", \
695 .count = 1, \
696 .info = stac92xx_mono_mux_enum_info, \
697 .get = stac92xx_mono_mux_enum_get, \
698 .put = stac92xx_mono_mux_enum_put, \
699 }
700
9e05b7a3 701#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 702 { \
703 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
704 .name = "Input Source", \
9e05b7a3 705 .count = cnt, \
ca7c5a8b
ML		 706 .info = stac92xx_mux_enum_info, \
707 .get = stac92xx_mux_enum_get, \
708 .put = stac92xx_mux_enum_put, \
709 }
710
e1f0d669 711#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 712 { \
713 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
714 .name = "Analog Loopback", \
e1f0d669 715 .count = cnt, \
5f10c4a9
ML		 716 .info = stac92xx_aloopback_info, \
717 .get = stac92xx_aloopback_get, \
718 .put = stac92xx_aloopback_put, \
719 .private_value = verb_read | (verb_write << 16), \
720 }
721
c8b6bf9b 722static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 723 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
724 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 725 STAC_INPUT_SOURCE(1),
2f2f4251
M		 726 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
727 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 728 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 729 { } /* end */
730};
731
e1f0d669 732static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 733 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
734
e1f0d669
MR		 735 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
736 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
737
738 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
739 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
740
741 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
742 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
743
744 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
745 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
746
747 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
748 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
749
750 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
751 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
752
753 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
754 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
755 { } /* end */
756};
757
758static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 759 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
760
e1f0d669
MR		 761 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
762 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
763
764 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
765 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
766
767 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
768 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
769
770 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
771 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
772
773 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
774 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
775
776 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
777 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
778
779 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
780 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
781 { } /* end */
782};
783
784static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 785 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
786
e1f0d669
MR		 787 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
788 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
789
790 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
791 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
792
793 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
794 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
795
796 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
797 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
798
799 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
800 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
801
802 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
803 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
804
805 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
806 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
807 { } /* end */
808};
809
541eee87 810static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 811 STAC_INPUT_SOURCE(2),
e035b841 812
9b35947f
MR		 813 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
814 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
815 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
816
817 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
818 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
819 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 820
9b35947f
MR		 821 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
822 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 823 { } /* end */
824};
825
541eee87 826static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 827 STAC_INPUT_SOURCE(2),
828 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
829
541eee87
MR		 830 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
831 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
832 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
833
834 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
835 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
836 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
837 { } /* end */
838};
839
8e21c34c 840static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 841 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 842 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
843 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
844 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
845 { } /* end */
846};
847
9e05b7a3 848static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 849 STAC_INPUT_SOURCE(2),
e1f0d669 850 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 851
852 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
853 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
854 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
855
856 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
857 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
858 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
859
2f2f4251
M		 860 { } /* end */
861};
862
19039bd0 863/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 864static struct snd_kcontrol_new stac922x_mixer[] = {
865 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 866 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
867 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
868 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
869
870 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
871 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
872 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 873 { } /* end */
874};
875
9e05b7a3 876
d1d985f0 877static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 878 STAC_INPUT_SOURCE(3),
e1f0d669 879 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 880
9e05b7a3
ML		 881 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
882 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
883 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
884
885 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
886 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
887 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
888
889 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
890 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
891 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 892 { } /* end */
893};
894
1697055e
TI		 895static struct snd_kcontrol_new stac_dmux_mixer = {
896 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
897 .name = "Digital Input Source",
898 /* count set later */
899 .info = stac92xx_dmux_enum_info,
900 .get = stac92xx_dmux_enum_get,
901 .put = stac92xx_dmux_enum_put,
902};
903
2134ea4f
TI		 904static const char *slave_vols[] = {
905 "Front Playback Volume",
906 "Surround Playback Volume",
907 "Center Playback Volume",
908 "LFE Playback Volume",
909 "Side Playback Volume",
910 "Headphone Playback Volume",
911 "Headphone Playback Volume",
912 "Speaker Playback Volume",
913 "External Speaker Playback Volume",
914 "Speaker2 Playback Volume",
915 NULL
916};
917
918static const char *slave_sws[] = {
919 "Front Playback Switch",
920 "Surround Playback Switch",
921 "Center Playback Switch",
922 "LFE Playback Switch",
923 "Side Playback Switch",
924 "Headphone Playback Switch",
925 "Headphone Playback Switch",
926 "Speaker Playback Switch",
927 "External Speaker Playback Switch",
928 "Speaker2 Playback Switch",
edb54a55 929 "IEC958 Playback Switch",
2134ea4f
TI		 930 NULL
931};
932
2f2f4251
M		 933static int stac92xx_build_controls(struct hda_codec *codec)
934{
935 struct sigmatel_spec *spec = codec->spec;
936 int err;
c7d4b2fa 937 int i;
2f2f4251
M		 938
939 err = snd_hda_add_new_ctls(codec, spec->mixer);
940 if (err < 0)
941 return err;
c7d4b2fa
M		 942
943 for (i = 0; i < spec->num_mixers; i++) {
944 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
945 if (err < 0)
946 return err;
947 }
1697055e
TI		 948 if (spec->num_dmuxes > 0) {
949 stac_dmux_mixer.count = spec->num_dmuxes;
950 err = snd_ctl_add(codec->bus->card,
951 snd_ctl_new1(&stac_dmux_mixer, codec));
952 if (err < 0)
953 return err;
954 }
c7d4b2fa 955
dabbed6f
M		 956 if (spec->multiout.dig_out_nid) {
957 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
958 if (err < 0)
959 return err;
9a08160b
TI		 960 err = snd_hda_create_spdif_share_sw(codec,
961 &spec->multiout);
962 if (err < 0)
963 return err;
964 spec->multiout.share_spdif = 1;
dabbed6f
M		 965 }
966 if (spec->dig_in_nid) {
967 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
968 if (err < 0)
969 return err;
970 }
2134ea4f
TI		 971
972 /* if we have no master control, let's create it */
973 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 974 unsigned int vmaster_tlv[4];
2134ea4f 975 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 976 HDA_OUTPUT, vmaster_tlv);
2134ea4f 977 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 978 vmaster_tlv, slave_vols);
2134ea4f
TI		 979 if (err < 0)
980 return err;
981 }
982 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
983 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
984 NULL, slave_sws);
985 if (err < 0)
986 return err;
987 }
988
dabbed6f 989 return 0;
2f2f4251
M		 990}
991
403d1944 992static unsigned int ref9200_pin_configs[8] = {
dabbed6f 993 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 994 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
995};
996
dfe495d0
TI		 997/*
998 STAC 9200 pin configs for
999 102801A8
1000 102801DE
1001 102801E8
1002*/
1003static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1004 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1005 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1006};
1007
1008/*
1009 STAC 9200 pin configs for
1010 102801C0
1011 102801C1
1012*/
1013static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1014 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1015 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1016};
1017
1018/*
1019 STAC 9200 pin configs for
1020 102801C4 (Dell Dimension E310)
1021 102801C5
1022 102801C7
1023 102801D9
1024 102801DA
1025 102801E3
1026*/
1027static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1028 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1029 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1030};
1031
1032
1033/*
1034 STAC 9200-32 pin configs for
1035 102801B5 (Dell Inspiron 630m)
1036 102801D8 (Dell Inspiron 640m)
1037*/
1038static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1039 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1040 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1041};
1042
1043/*
1044 STAC 9200-32 pin configs for
1045 102801C2 (Dell Latitude D620)
1046 102801C8
1047 102801CC (Dell Latitude D820)
1048 102801D4
1049 102801D6
1050*/
1051static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1052 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1053 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1054};
1055
1056/*
1057 STAC 9200-32 pin configs for
1058 102801CE (Dell XPS M1710)
1059 102801CF (Dell Precision M90)
1060*/
1061static unsigned int dell9200_m23_pin_configs[8] = {
1062 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1063 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1064};
1065
1066/*
1067 STAC 9200-32 pin configs for
1068 102801C9
1069 102801CA
1070 102801CB (Dell Latitude 120L)
1071 102801D3
1072*/
1073static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1074 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1075 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1076};
1077
1078/*
1079 STAC 9200-32 pin configs for
1080 102801BD (Dell Inspiron E1505n)
1081 102801EE
1082 102801EF
1083*/
1084static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1085 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1086 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1087};
1088
1089/*
1090 STAC 9200-32 pin configs for
1091 102801F5 (Dell Inspiron 1501)
1092 102801F6
1093*/
1094static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1095 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1096 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1097};
1098
1099/*
1100 STAC 9200-32
1101 102801CD (Dell Inspiron E1705/9400)
1102*/
1103static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1104 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1105 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1106};
1107
bf277785
TD		 1108static unsigned int oqo9200_pin_configs[8] = {
1109 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1110 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1111};
1112
dfe495d0 1113
f5fcc13c
TI		 1114static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1115 [STAC_REF] = ref9200_pin_configs,
bf277785 1116 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1117 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1118 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1119 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1120 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1121 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1122 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1123 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1124 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1125 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1126 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1127 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1128};
1129
f5fcc13c
TI		 1130static const char *stac9200_models[STAC_9200_MODELS] = {
1131 [STAC_REF] = "ref",
bf277785 1132 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1133 [STAC_9200_DELL_D21] = "dell-d21",
1134 [STAC_9200_DELL_D22] = "dell-d22",
1135 [STAC_9200_DELL_D23] = "dell-d23",
1136 [STAC_9200_DELL_M21] = "dell-m21",
1137 [STAC_9200_DELL_M22] = "dell-m22",
1138 [STAC_9200_DELL_M23] = "dell-m23",
1139 [STAC_9200_DELL_M24] = "dell-m24",
1140 [STAC_9200_DELL_M25] = "dell-m25",
1141 [STAC_9200_DELL_M26] = "dell-m26",
1142 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1143 [STAC_9200_GATEWAY] = "gateway",
117f257d 1144 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1145};
1146
1147static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1148 /* SigmaTel reference board */
1149 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1150 "DFI LanParty", STAC_REF),
e7377071 1151 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1152 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1153 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1154 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1155 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1156 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1157 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1158 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1159 "unknown Dell", STAC_9200_DELL_D22),
1160 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1161 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1162 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1163 "Dell Latitude D620", STAC_9200_DELL_M22),
1164 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1165 "unknown Dell", STAC_9200_DELL_D23),
1166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1167 "unknown Dell", STAC_9200_DELL_D23),
1168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1169 "unknown Dell", STAC_9200_DELL_M22),
1170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1171 "unknown Dell", STAC_9200_DELL_M24),
1172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1173 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1175 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1177 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1179 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1181 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1182 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1183 "Dell Precision M90", STAC_9200_DELL_M23),
1184 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1185 "unknown Dell", STAC_9200_DELL_M22),
1186 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1187 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1189 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1191 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1193 "unknown Dell", STAC_9200_DELL_D23),
1194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1195 "unknown Dell", STAC_9200_DELL_D23),
1196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1197 "unknown Dell", STAC_9200_DELL_D21),
1198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1199 "unknown Dell", STAC_9200_DELL_D23),
1200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1201 "unknown Dell", STAC_9200_DELL_D21),
1202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1203 "unknown Dell", STAC_9200_DELL_M25),
1204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1205 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1207 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1208 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1209 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1210 /* Panasonic */
117f257d 1211 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1212 /* Gateway machines needs EAPD to be set on resume */
1213 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1214 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1215 STAC_9200_GATEWAY),
1216 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1217 STAC_9200_GATEWAY),
bf277785
TD		 1218 /* OQO Mobile */
1219 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1220 {} /* terminator */
1221};
1222
8e21c34c
TD		 1223static unsigned int ref925x_pin_configs[8] = {
1224 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1225 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1226};
1227
1228static unsigned int stac925x_MA6_pin_configs[8] = {
1229 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1230 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1231};
1232
2c11f955
TD		 1233static unsigned int stac925x_PA6_pin_configs[8] = {
1234 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1235 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1236};
1237
8e21c34c 1238static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1239 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1240 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1241};
1242
1243static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1244 [STAC_REF] = ref925x_pin_configs,
1245 [STAC_M2_2] = stac925xM2_2_pin_configs,
1246 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1247 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1248};
1249
1250static const char *stac925x_models[STAC_925x_MODELS] = {
1251 [STAC_REF] = "ref",
1252 [STAC_M2_2] = "m2-2",
1253 [STAC_MA6] = "m6",
2c11f955 1254 [STAC_PA6] = "pa6",
8e21c34c
TD		 1255};
1256
1257static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1258 /* SigmaTel reference board */
1259 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1260 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1261 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1262 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1263 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1264 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1265 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1266 {} /* terminator */
1267};
1268
a7662640 1269static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1270 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1271 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1272 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1273 0x01452050,
1274};
1275
1276static unsigned int dell_m6_pin_configs[13] = {
1277 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1278 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1279 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1280 0x4f0000f0,
e1f0d669
MR		 1281};
1282
1283static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1284 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1285 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1286};
1287
1288static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1289 [STAC_92HD73XX_REF] = "ref",
a7662640 1290 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1291};
1292
1293static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1294 /* SigmaTel reference board */
1295 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1296 "DFI LanParty", STAC_92HD73XX_REF),
1297 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1298 "unknown Dell", STAC_DELL_M6),
1299 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1300 "unknown Dell", STAC_DELL_M6),
1301 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1302 "unknown Dell", STAC_DELL_M6),
1303 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1304 "unknown Dell", STAC_DELL_M6),
1305 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1306 "unknown Dell", STAC_DELL_M6),
1307 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1308 "unknown Dell", STAC_DELL_M6),
1309 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1310 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1311 {} /* terminator */
1312};
1313
e035b841
MR		 1314static unsigned int ref92hd71bxx_pin_configs[10] = {
1315 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1316 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1317 0x90a000f0, 0x01452050,
1318};
1319
a7662640
MR		 1320static unsigned int dell_m4_1_pin_configs[13] = {
1321 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1322 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
a7662640
MR		 1323 0x40f000f0, 0x4f0000f0,
1324};
1325
1326static unsigned int dell_m4_2_pin_configs[13] = {
1327 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1328 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
1329 0x40f000f0, 0x044413b0,
1330};
1331
e035b841
MR		 1332static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1333 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1334 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1335 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
e035b841
MR		 1336};
1337
1338static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1339 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1340 [STAC_DELL_M4_1] = "dell-m4-1",
1341 [STAC_DELL_M4_2] = "dell-m4-2",
e035b841
MR		 1342};
1343
1344static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1345 /* SigmaTel reference board */
1346 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1347 "DFI LanParty", STAC_92HD71BXX_REF),
a7662640
MR		 1348 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1349 "unknown Dell", STAC_DELL_M4_1),
1350 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1351 "unknown Dell", STAC_DELL_M4_1),
1352 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1353 "unknown Dell", STAC_DELL_M4_1),
1354 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1355 "unknown Dell", STAC_DELL_M4_1),
1356 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1357 "unknown Dell", STAC_DELL_M4_1),
1358 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1359 "unknown Dell", STAC_DELL_M4_1),
1360 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1361 "unknown Dell", STAC_DELL_M4_1),
1362 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1363 "unknown Dell", STAC_DELL_M4_2),
1364 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1365 "unknown Dell", STAC_DELL_M4_2),
1366 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1367 "unknown Dell", STAC_DELL_M4_2),
1368 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1369 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1370 {} /* terminator */
1371};
1372
403d1944
MP		 1373static unsigned int ref922x_pin_configs[10] = {
1374 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1375 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1376 0x40000100, 0x40000100,
1377};
1378
dfe495d0
TI		 1379/*
1380 STAC 922X pin configs for
1381 102801A7
1382 102801AB
1383 102801A9
1384 102801D1
1385 102801D2
1386*/
1387static unsigned int dell_922x_d81_pin_configs[10] = {
1388 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1389 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1390 0x01813122, 0x400001f2,
1391};
1392
1393/*
1394 STAC 922X pin configs for
1395 102801AC
1396 102801D0
1397*/
1398static unsigned int dell_922x_d82_pin_configs[10] = {
1399 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1400 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1401 0x01813122, 0x400001f1,
1402};
1403
1404/*
1405 STAC 922X pin configs for
1406 102801BF
1407*/
1408static unsigned int dell_922x_m81_pin_configs[10] = {
1409 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1410 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1411 0x40C003f1, 0x405003f0,
1412};
1413
1414/*
1415 STAC 9221 A1 pin configs for
1416 102801D7 (Dell XPS M1210)
1417*/
1418static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1419 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1420 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1421 0x508003f3, 0x405003f4,
1422};
1423
403d1944 1424static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1425 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1426 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1427 0x02a19120, 0x40000100,
1428};
1429
1430static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1431 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1432 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1433 0x02a19320, 0x40000100,
1434};
1435
5d5d3bc3
IZ		 1436static unsigned int intel_mac_v1_pin_configs[10] = {
1437 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1438 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1439 0x400000fc, 0x400000fb,
1440};
1441
1442static unsigned int intel_mac_v2_pin_configs[10] = {
1443 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1444 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1445 0x400000fc, 0x400000fb,
6f0778d8
NB		 1446};
1447
5d5d3bc3
IZ		 1448static unsigned int intel_mac_v3_pin_configs[10] = {
1449 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1450 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1451 0x400000fc, 0x400000fb,
1452};
1453
5d5d3bc3
IZ		 1454static unsigned int intel_mac_v4_pin_configs[10] = {
1455 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1456 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1457 0x400000fc, 0x400000fb,
1458};
1459
5d5d3bc3
IZ		 1460static unsigned int intel_mac_v5_pin_configs[10] = {
1461 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1462 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1463 0x400000fc, 0x400000fb,
0dae0f83
TI		 1464};
1465
76c08828 1466
19039bd0 1467static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1468 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1469 [STAC_D945GTP3] = d945gtp3_pin_configs,
1470 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1471 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1472 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1473 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1474 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1475 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1476 /* for backward compatibility */
5d5d3bc3
IZ		 1477 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1478 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1479 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1480 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1481 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1482 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1483 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1484 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1485 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1486 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1487};
1488
f5fcc13c
TI		 1489static const char *stac922x_models[STAC_922X_MODELS] = {
1490 [STAC_D945_REF] = "ref",
1491 [STAC_D945GTP5] = "5stack",
1492 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1493 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1494 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1495 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1496 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1497 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1498 /* for backward compatibility */
f5fcc13c 1499 [STAC_MACMINI] = "macmini",
3fc24d85 1500 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1501 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1502 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1503 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1504 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1505 [STAC_922X_DELL_D81] = "dell-d81",
1506 [STAC_922X_DELL_D82] = "dell-d82",
1507 [STAC_922X_DELL_M81] = "dell-m81",
1508 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1509};
1510
1511static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1512 /* SigmaTel reference board */
1513 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1514 "DFI LanParty", STAC_D945_REF),
1515 /* Intel 945G based systems */
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1517 "Intel D945G", STAC_D945GTP3),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1519 "Intel D945G", STAC_D945GTP3),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1521 "Intel D945G", STAC_D945GTP3),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1523 "Intel D945G", STAC_D945GTP3),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1525 "Intel D945G", STAC_D945GTP3),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1527 "Intel D945G", STAC_D945GTP3),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1529 "Intel D945G", STAC_D945GTP3),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1531 "Intel D945G", STAC_D945GTP3),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1533 "Intel D945G", STAC_D945GTP3),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1535 "Intel D945G", STAC_D945GTP3),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1537 "Intel D945G", STAC_D945GTP3),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1539 "Intel D945G", STAC_D945GTP3),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1541 "Intel D945G", STAC_D945GTP3),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1543 "Intel D945G", STAC_D945GTP3),
1544 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1545 "Intel D945G", STAC_D945GTP3),
1546 /* Intel D945G 5-stack systems */
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1548 "Intel D945G", STAC_D945GTP5),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1550 "Intel D945G", STAC_D945GTP5),
1551 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1552 "Intel D945G", STAC_D945GTP5),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1554 "Intel D945G", STAC_D945GTP5),
1555 /* Intel 945P based systems */
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1557 "Intel D945P", STAC_D945GTP3),
1558 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1559 "Intel D945P", STAC_D945GTP3),
1560 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1561 "Intel D945P", STAC_D945GTP3),
1562 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1563 "Intel D945P", STAC_D945GTP3),
1564 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1565 "Intel D945P", STAC_D945GTP3),
1566 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1567 "Intel D945P", STAC_D945GTP5),
1568 /* other systems */
1569 /* Apple Mac Mini (early 2006) */
1570 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1571 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1572 /* Dell systems */
1573 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1574 "unknown Dell", STAC_922X_DELL_D81),
1575 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1576 "unknown Dell", STAC_922X_DELL_D81),
1577 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1578 "unknown Dell", STAC_922X_DELL_D81),
1579 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1580 "unknown Dell", STAC_922X_DELL_D82),
1581 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1582 "unknown Dell", STAC_922X_DELL_M81),
1583 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1584 "unknown Dell", STAC_922X_DELL_D82),
1585 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1586 "unknown Dell", STAC_922X_DELL_D81),
1587 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1588 "unknown Dell", STAC_922X_DELL_D81),
1589 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1590 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1591 {} /* terminator */
1592};
1593
3cc08dc6 1594static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1595 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1596 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1597 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1598 0x01c42190, 0x40000100,
3cc08dc6
MP		 1599};
1600
93ed1503 1601static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1602 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1603 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1604 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1605 0x40000100, 0x40000100
1606};
1607
93ed1503
TD		 1608static unsigned int d965_5st_pin_configs[14] = {
1609 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1610 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1611 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1612 0x40000100, 0x40000100
1613};
1614
4ff076e5
TD		 1615static unsigned int dell_3st_pin_configs[14] = {
1616 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1617 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1618 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1619 0x40c003fc, 0x40000100
1620};
1621
93ed1503 1622static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1623 [STAC_D965_REF] = ref927x_pin_configs,
1624 [STAC_D965_3ST] = d965_3st_pin_configs,
1625 [STAC_D965_5ST] = d965_5st_pin_configs,
1626 [STAC_DELL_3ST] = dell_3st_pin_configs,
1627 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1628};
1629
f5fcc13c 1630static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1631 [STAC_D965_REF] = "ref",
1632 [STAC_D965_3ST] = "3stack",
1633 [STAC_D965_5ST] = "5stack",
1634 [STAC_DELL_3ST] = "dell-3stack",
1635 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1636};
1637
1638static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1639 /* SigmaTel reference board */
1640 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1641 "DFI LanParty", STAC_D965_REF),
81d3dbde 1642 /* Intel 946 based systems */
f5fcc13c
TI		 1643 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1644 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1645 /* 965 based 3 stack systems */
f5fcc13c
TI		 1646 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1647 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1648 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1649 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1650 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1651 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1652 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1653 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1654 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1655 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1656 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1657 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1658 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1659 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1660 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1661 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1662 /* Dell 3 stack systems */
8e9068b1 1663 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1664 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1665 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1666 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1667 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1668 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1669 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1
MR		 1670 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1671 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1672 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1673 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1674 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1675 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1676 /* 965 based 5 stack systems */
f5fcc13c
TI		 1677 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1678 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1679 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1680 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1681 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1682 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1683 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1684 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1685 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1686 {} /* terminator */
1687};
1688
f3302a59
MP		 1689static unsigned int ref9205_pin_configs[12] = {
1690 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1691 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1692 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1693};
1694
dfe495d0
TI		 1695/*
1696 STAC 9205 pin configs for
1697 102801F1
1698 102801F2
1699 102801FC
1700 102801FD
1701 10280204
1702 1028021F
3fa2ef74 1703 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1704*/
1705static unsigned int dell_9205_m42_pin_configs[12] = {
1706 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1707 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1708 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1709};
1710
1711/*
1712 STAC 9205 pin configs for
1713 102801F9
1714 102801FA
1715 102801FE
1716 102801FF (Dell Precision M4300)
1717 10280206
1718 10280200
1719 10280201
1720*/
1721static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1722 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1723 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1724 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1725};
1726
dfe495d0 1727static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1728 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1729 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1730 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1731};
1732
f5fcc13c 1733static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1734 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1735 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1736 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1737 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1738};
1739
f5fcc13c
TI		 1740static const char *stac9205_models[STAC_9205_MODELS] = {
1741 [STAC_9205_REF] = "ref",
dfe495d0 1742 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1743 [STAC_9205_DELL_M43] = "dell-m43",
1744 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1745};
1746
1747static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1748 /* SigmaTel reference board */
1749 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1750 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1751 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1752 "unknown Dell", STAC_9205_DELL_M42),
1753 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1754 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1755 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1756 "Dell Precision", STAC_9205_DELL_M43),
1757 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1758 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1759 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1760 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1761 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1762 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1763 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1764 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1765 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1766 "unknown Dell", STAC_9205_DELL_M42),
1767 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1768 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1769 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1770 "Dell Precision", STAC_9205_DELL_M43),
1771 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1772 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1773 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1774 "Dell Precision", STAC_9205_DELL_M43),
1775 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1776 "Dell Inspiron", STAC_9205_DELL_M44),
1777 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1778 "Dell Inspiron", STAC_9205_DELL_M44),
1779 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1780 "Dell Inspiron", STAC_9205_DELL_M44),
1781 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1782 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1783 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1784 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1785 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1786 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1787 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1788 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1789 {} /* terminator */
1790};
1791
11b44bbd
RF		 1792static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1793{
1794 int i;
1795 struct sigmatel_spec *spec = codec->spec;
1796
1797 if (! spec->bios_pin_configs) {
1798 spec->bios_pin_configs = kcalloc(spec->num_pins,
1799 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1800 if (! spec->bios_pin_configs)
1801 return -ENOMEM;
1802 }
1803
1804 for (i = 0; i < spec->num_pins; i++) {
1805 hda_nid_t nid = spec->pin_nids[i];
1806 unsigned int pin_cfg;
1807
1808 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1809 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1810 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1811 nid, pin_cfg);
1812 spec->bios_pin_configs[i] = pin_cfg;
1813 }
1814
1815 return 0;
1816}
1817
87d48363
MR		 1818static void stac92xx_set_config_reg(struct hda_codec *codec,
1819 hda_nid_t pin_nid, unsigned int pin_config)
1820{
1821 int i;
1822 snd_hda_codec_write(codec, pin_nid, 0,
1823 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1824 pin_config & 0x000000ff);
1825 snd_hda_codec_write(codec, pin_nid, 0,
1826 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1827 (pin_config & 0x0000ff00) >> 8);
1828 snd_hda_codec_write(codec, pin_nid, 0,
1829 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1830 (pin_config & 0x00ff0000) >> 16);
1831 snd_hda_codec_write(codec, pin_nid, 0,
1832 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1833 pin_config >> 24);
1834 i = snd_hda_codec_read(codec, pin_nid, 0,
1835 AC_VERB_GET_CONFIG_DEFAULT,
1836 0x00);
1837 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1838 pin_nid, i);
1839}
1840
2f2f4251
M		 1841static void stac92xx_set_config_regs(struct hda_codec *codec)
1842{
1843 int i;
1844 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1845
87d48363
MR		 1846 if (!spec->pin_configs)
1847 return;
11b44bbd 1848
87d48363
MR		 1849 for (i = 0; i < spec->num_pins; i++)
1850 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1851 spec->pin_configs[i]);
2f2f4251 1852}
2f2f4251 1853
dabbed6f 1854/*
c7d4b2fa 1855 * Analog playback callbacks
dabbed6f 1856 */
c7d4b2fa
M		 1857static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1858 struct hda_codec *codec,
c8b6bf9b 1859 struct snd_pcm_substream *substream)
2f2f4251 1860{
dabbed6f 1861 struct sigmatel_spec *spec = codec->spec;
9a08160b
TI		 1862 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
1863 hinfo);
2f2f4251
M		 1864}
1865
2f2f4251
M		 1866static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1867 struct hda_codec *codec,
1868 unsigned int stream_tag,
1869 unsigned int format,
c8b6bf9b 1870 struct snd_pcm_substream *substream)
2f2f4251
M		 1871{
1872 struct sigmatel_spec *spec = codec->spec;
403d1944 1873 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1874}
1875
1876static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1877 struct hda_codec *codec,
c8b6bf9b 1878 struct snd_pcm_substream *substream)
2f2f4251
M		 1879{
1880 struct sigmatel_spec *spec = codec->spec;
1881 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1882}
1883
dabbed6f
M		 1884/*
1885 * Digital playback callbacks
1886 */
1887static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1888 struct hda_codec *codec,
c8b6bf9b 1889 struct snd_pcm_substream *substream)
dabbed6f
M		 1890{
1891 struct sigmatel_spec *spec = codec->spec;
1892 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1893}
1894
1895static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1896 struct hda_codec *codec,
c8b6bf9b 1897 struct snd_pcm_substream *substream)
dabbed6f
M		 1898{
1899 struct sigmatel_spec *spec = codec->spec;
1900 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1901}
1902
6b97eb45
TI		 1903static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1904 struct hda_codec *codec,
1905 unsigned int stream_tag,
1906 unsigned int format,
1907 struct snd_pcm_substream *substream)
1908{
1909 struct sigmatel_spec *spec = codec->spec;
1910 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1911 stream_tag, format, substream);
1912}
1913
dabbed6f 1914
2f2f4251
M		 1915/*
1916 * Analog capture callbacks
1917 */
1918static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1919 struct hda_codec *codec,
1920 unsigned int stream_tag,
1921 unsigned int format,
c8b6bf9b 1922 struct snd_pcm_substream *substream)
2f2f4251
M		 1923{
1924 struct sigmatel_spec *spec = codec->spec;
1925
1926 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1927 stream_tag, 0, format);
1928 return 0;
1929}
1930
1931static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1932 struct hda_codec *codec,
c8b6bf9b 1933 struct snd_pcm_substream *substream)
2f2f4251
M		 1934{
1935 struct sigmatel_spec *spec = codec->spec;
1936
888afa15 1937 snd_hda_codec_cleanup_stream(codec, spec->adc_nids[substream->number]);
2f2f4251
M		 1938 return 0;
1939}
1940
dabbed6f
M		 1941static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1942 .substreams = 1,
1943 .channels_min = 2,
1944 .channels_max = 2,
1945 /* NID is set in stac92xx_build_pcms */
1946 .ops = {
1947 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1948 .close = stac92xx_dig_playback_pcm_close,
1949 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1950 },
1951};
1952
1953static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1954 .substreams = 1,
1955 .channels_min = 2,
1956 .channels_max = 2,
1957 /* NID is set in stac92xx_build_pcms */
1958};
1959
2f2f4251
M		 1960static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1961 .substreams = 1,
1962 .channels_min = 2,
c7d4b2fa 1963 .channels_max = 8,
2f2f4251
M		 1964 .nid = 0x02, /* NID to query formats and rates */
1965 .ops = {
1966 .open = stac92xx_playback_pcm_open,
1967 .prepare = stac92xx_playback_pcm_prepare,
1968 .cleanup = stac92xx_playback_pcm_cleanup
1969 },
1970};
1971
3cc08dc6
MP		 1972static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1973 .substreams = 1,
1974 .channels_min = 2,
1975 .channels_max = 2,
1976 .nid = 0x06, /* NID to query formats and rates */
1977 .ops = {
1978 .open = stac92xx_playback_pcm_open,
1979 .prepare = stac92xx_playback_pcm_prepare,
1980 .cleanup = stac92xx_playback_pcm_cleanup
1981 },
1982};
1983
2f2f4251 1984static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1985 .channels_min = 2,
1986 .channels_max = 2,
9e05b7a3 1987 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1988 .ops = {
1989 .prepare = stac92xx_capture_pcm_prepare,
1990 .cleanup = stac92xx_capture_pcm_cleanup
1991 },
1992};
1993
1994static int stac92xx_build_pcms(struct hda_codec *codec)
1995{
1996 struct sigmatel_spec *spec = codec->spec;
1997 struct hda_pcm *info = spec->pcm_rec;
1998
1999 codec->num_pcms = 1;
2000 codec->pcm_info = info;
2001
c7d4b2fa 2002 info->name = "STAC92xx Analog";
2f2f4251 2003 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2004 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2005 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2006 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2007
2008 if (spec->alt_switch) {
2009 codec->num_pcms++;
2010 info++;
2011 info->name = "STAC92xx Analog Alt";
2012 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2013 }
2f2f4251 2014
dabbed6f
M		 2015 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2016 codec->num_pcms++;
2017 info++;
2018 info->name = "STAC92xx Digital";
7ba72ba1 2019 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2020 if (spec->multiout.dig_out_nid) {
2021 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2022 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2023 }
2024 if (spec->dig_in_nid) {
2025 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2026 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2027 }
2028 }
2029
2f2f4251
M		 2030 return 0;
2031}
2032
c960a03b
TI		 2033static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2034{
2035 unsigned int pincap = snd_hda_param_read(codec, nid,
2036 AC_PAR_PIN_CAP);
2037 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2038 if (pincap & AC_PINCAP_VREF_100)
2039 return AC_PINCTL_VREF_100;
2040 if (pincap & AC_PINCAP_VREF_80)
2041 return AC_PINCTL_VREF_80;
2042 if (pincap & AC_PINCAP_VREF_50)
2043 return AC_PINCTL_VREF_50;
2044 if (pincap & AC_PINCAP_VREF_GRD)
2045 return AC_PINCTL_VREF_GRD;
2046 return 0;
2047}
2048
403d1944
MP		 2049static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2050
2051{
82beb8fd
TI		 2052 snd_hda_codec_write_cache(codec, nid, 0,
2053 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2054}
2055
7c2ba97b
MR		 2056#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2057
2058static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2059 struct snd_ctl_elem_value *ucontrol)
2060{
2061 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2062 struct sigmatel_spec *spec = codec->spec;
2063
2064 ucontrol->value.integer.value[0] = spec->hp_switch;
2065 return 0;
2066}
2067
2068static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2069 struct snd_ctl_elem_value *ucontrol)
2070{
2071 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2072 struct sigmatel_spec *spec = codec->spec;
2073
2074 spec->hp_switch = ucontrol->value.integer.value[0];
2075
2076 /* check to be sure that the ports are upto date with
2077 * switch changes
2078 */
2079 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2080
2081 return 1;
2082}
2083
a5ce8890 2084#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2085
2086static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2087{
2088 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2089 struct sigmatel_spec *spec = codec->spec;
2090 int io_idx = kcontrol-> private_value & 0xff;
2091
2092 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2093 return 0;
2094}
2095
2096static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2097{
2098 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2099 struct sigmatel_spec *spec = codec->spec;
2100 hda_nid_t nid = kcontrol->private_value >> 8;
2101 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2102 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2103
2104 spec->io_switch[io_idx] = val;
2105
2106 if (val)
2107 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2108 else {
2109 unsigned int pinctl = AC_PINCTL_IN_EN;
2110 if (io_idx) /* set VREF for mic */
2111 pinctl |= stac92xx_get_vref(codec, nid);
2112 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2113 }
40c1d308
JZ		 2114
2115 /* check the auto-mute again: we need to mute/unmute the speaker
2116 * appropriately according to the pin direction
2117 */
2118 if (spec->hp_detect)
2119 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2120
403d1944
MP		 2121 return 1;
2122}
2123
0fb87bb4
ML		 2124#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2125
2126static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2127 struct snd_ctl_elem_value *ucontrol)
2128{
2129 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2130 struct sigmatel_spec *spec = codec->spec;
2131
2132 ucontrol->value.integer.value[0] = spec->clfe_swap;
2133 return 0;
2134}
2135
2136static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2137 struct snd_ctl_elem_value *ucontrol)
2138{
2139 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2140 struct sigmatel_spec *spec = codec->spec;
2141 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2142 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2143
68ea7b2f 2144 if (spec->clfe_swap == val)
0fb87bb4
ML		 2145 return 0;
2146
68ea7b2f 2147 spec->clfe_swap = val;
0fb87bb4
ML		 2148
2149 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2150 spec->clfe_swap ? 0x4 : 0x0);
2151
2152 return 1;
2153}
2154
7c2ba97b
MR		 2155#define STAC_CODEC_HP_SWITCH(xname) \
2156 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2157 .name = xname, \
2158 .index = 0, \
2159 .info = stac92xx_hp_switch_info, \
2160 .get = stac92xx_hp_switch_get, \
2161 .put = stac92xx_hp_switch_put, \
2162 }
2163
403d1944
MP		 2164#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2165 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2166 .name = xname, \
2167 .index = 0, \
2168 .info = stac92xx_io_switch_info, \
2169 .get = stac92xx_io_switch_get, \
2170 .put = stac92xx_io_switch_put, \
2171 .private_value = xpval, \
2172 }
2173
0fb87bb4
ML		 2174#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2175 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2176 .name = xname, \
2177 .index = 0, \
2178 .info = stac92xx_clfe_switch_info, \
2179 .get = stac92xx_clfe_switch_get, \
2180 .put = stac92xx_clfe_switch_put, \
2181 .private_value = xpval, \
2182 }
403d1944 2183
c7d4b2fa
M		 2184enum {
2185 STAC_CTL_WIDGET_VOL,
2186 STAC_CTL_WIDGET_MUTE,
09a99959 2187 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2188 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2189 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2190 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2191};
2192
c8b6bf9b 2193static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2194 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2195 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2196 STAC_MONO_MUX,
7c2ba97b 2197 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2198 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2199 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2200};
2201
2202/* add dynamic controls */
2203static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2204{
c8b6bf9b 2205 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2206
2207 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2208 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2209
2210 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2211 if (! knew)
2212 return -ENOMEM;
2213 if (spec->kctl_alloc) {
2214 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2215 kfree(spec->kctl_alloc);
2216 }
2217 spec->kctl_alloc = knew;
2218 spec->num_kctl_alloc = num;
2219 }
2220
2221 knew = &spec->kctl_alloc[spec->num_kctl_used];
2222 *knew = stac92xx_control_templates[type];
82fe0c58 2223 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2224 if (! knew->name)
2225 return -ENOMEM;
2226 knew->private_value = val;
2227 spec->num_kctl_used++;
2228 return 0;
2229}
2230
403d1944
MP		 2231/* flag inputs as additional dynamic lineouts */
2232static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2233{
2234 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2235 unsigned int wcaps, wtype;
2236 int i, num_dacs = 0;
2237
2238 /* use the wcaps cache to count all DACs available for line-outs */
2239 for (i = 0; i < codec->num_nodes; i++) {
2240 wcaps = codec->wcaps[i];
2241 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2242
7b043899
SL		 2243 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2244 num_dacs++;
2245 }
403d1944 2246
7b043899
SL		 2247 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2248
403d1944
MP		 2249 switch (cfg->line_outs) {
2250 case 3:
2251 /* add line-in as side */
7b043899 2252 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2253 cfg->line_out_pins[cfg->line_outs] =
2254 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2255 spec->line_switch = 1;
2256 cfg->line_outs++;
2257 }
2258 break;
2259 case 2:
2260 /* add line-in as clfe and mic as side */
7b043899 2261 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2262 cfg->line_out_pins[cfg->line_outs] =
2263 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2264 spec->line_switch = 1;
2265 cfg->line_outs++;
2266 }
7b043899 2267 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2268 cfg->line_out_pins[cfg->line_outs] =
2269 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2270 spec->mic_switch = 1;
2271 cfg->line_outs++;
2272 }
2273 break;
2274 case 1:
2275 /* add line-in as surr and mic as clfe */
7b043899 2276 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2277 cfg->line_out_pins[cfg->line_outs] =
2278 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2279 spec->line_switch = 1;
2280 cfg->line_outs++;
2281 }
7b043899 2282 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2283 cfg->line_out_pins[cfg->line_outs] =
2284 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2285 spec->mic_switch = 1;
2286 cfg->line_outs++;
2287 }
2288 break;
2289 }
2290
2291 return 0;
2292}
2293
7b043899
SL		 2294
2295static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2296{
2297 int i;
2298
2299 for (i = 0; i < spec->multiout.num_dacs; i++) {
2300 if (spec->multiout.dac_nids[i] == nid)
2301 return 1;
2302 }
2303
2304 return 0;
2305}
2306
3cc08dc6 2307/*
7b043899
SL		 2308 * Fill in the dac_nids table from the parsed pin configuration
2309 * This function only works when every pin in line_out_pins[]
2310 * contains atleast one DAC in its connection list. Some 92xx
2311 * codecs are not connected directly to a DAC, such as the 9200
2312 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2313 */
19039bd0 2314static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2315 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2316{
2317 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2318 int i, j, conn_len = 0;
2319 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2320 unsigned int wcaps, wtype;
2321
c7d4b2fa
M		 2322 for (i = 0; i < cfg->line_outs; i++) {
2323 nid = cfg->line_out_pins[i];
7b043899
SL		 2324 conn_len = snd_hda_get_connections(codec, nid, conn,
2325 HDA_MAX_CONNECTIONS);
2326 for (j = 0; j < conn_len; j++) {
2327 wcaps = snd_hda_param_read(codec, conn[j],
2328 AC_PAR_AUDIO_WIDGET_CAP);
2329 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2330 if (wtype != AC_WID_AUD_OUT ||
2331 (wcaps & AC_WCAP_DIGITAL))
2332 continue;
2333 /* conn[j] is a DAC routed to this line-out */
2334 if (!is_in_dac_nids(spec, conn[j]))
2335 break;
2336 }
2337
2338 if (j == conn_len) {
df802952
TI		 2339 if (spec->multiout.num_dacs > 0) {
2340 /* we have already working output pins,
2341 * so let's drop the broken ones again
2342 */
2343 cfg->line_outs = spec->multiout.num_dacs;
2344 break;
2345 }
7b043899
SL		 2346 /* error out, no available DAC found */
2347 snd_printk(KERN_ERR
2348 "%s: No available DAC for pin 0x%x\n",
2349 __func__, nid);
2350 return -ENODEV;
2351 }
2352
2353 spec->multiout.dac_nids[i] = conn[j];
2354 spec->multiout.num_dacs++;
2355 if (conn_len > 1) {
2356 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2357 snd_hda_codec_write_cache(codec, nid, 0,
2358 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2359
7b043899
SL		 2360 }
2361 }
c7d4b2fa 2362
7b043899
SL		 2363 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2364 spec->multiout.num_dacs,
2365 spec->multiout.dac_nids[0],
2366 spec->multiout.dac_nids[1],
2367 spec->multiout.dac_nids[2],
2368 spec->multiout.dac_nids[3],
2369 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2370 return 0;
2371}
2372
eb06ed8f
TI		 2373/* create volume control/switch for the given prefx type */
2374static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2375{
2376 char name[32];
2377 int err;
2378
2379 sprintf(name, "%s Playback Volume", pfx);
2380 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2381 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2382 if (err < 0)
2383 return err;
2384 sprintf(name, "%s Playback Switch", pfx);
2385 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2386 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2387 if (err < 0)
2388 return err;
2389 return 0;
2390}
2391
ae0afd81
MR		 2392static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2393{
2394 if (!spec->multiout.hp_nid)
2395 spec->multiout.hp_nid = nid;
2396 else if (spec->multiout.num_dacs > 4) {
2397 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2398 return 1;
2399 } else {
2400 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2401 spec->multiout.num_dacs++;
2402 }
2403 return 0;
2404}
2405
2406static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2407{
2408 if (is_in_dac_nids(spec, nid))
2409 return 1;
2410 if (spec->multiout.hp_nid == nid)
2411 return 1;
2412 return 0;
2413}
2414
c7d4b2fa 2415/* add playback controls from the parsed DAC table */
0fb87bb4 2416static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2417 const struct auto_pin_cfg *cfg)
c7d4b2fa 2418{
19039bd0
TI		 2419 static const char *chname[4] = {
2420 "Front", "Surround", NULL /*CLFE*/, "Side"
2421 };
c7d4b2fa
M		 2422 hda_nid_t nid;
2423 int i, err;
2424
0fb87bb4 2425 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2426 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2427
2428
40ac8c4f 2429 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2430 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2431 continue;
2432
2433 nid = spec->multiout.dac_nids[i];
2434
2435 if (i == 2) {
2436 /* Center/LFE */
eb06ed8f
TI		 2437 err = create_controls(spec, "Center", nid, 1);
2438 if (err < 0)
c7d4b2fa 2439 return err;
eb06ed8f
TI		 2440 err = create_controls(spec, "LFE", nid, 2);
2441 if (err < 0)
c7d4b2fa 2442 return err;
0fb87bb4
ML		 2443
2444 wid_caps = get_wcaps(codec, nid);
2445
2446 if (wid_caps & AC_WCAP_LR_SWAP) {
2447 err = stac92xx_add_control(spec,
2448 STAC_CTL_WIDGET_CLFE_SWITCH,
2449 "Swap Center/LFE Playback Switch", nid);
2450
2451 if (err < 0)
2452 return err;
2453 }
2454
c7d4b2fa 2455 } else {
eb06ed8f
TI		 2456 err = create_controls(spec, chname[i], nid, 3);
2457 if (err < 0)
c7d4b2fa
M		 2458 return err;
2459 }
2460 }
2461
7c2ba97b
MR		 2462 if (cfg->hp_outs > 1) {
2463 err = stac92xx_add_control(spec,
2464 STAC_CTL_WIDGET_HP_SWITCH,
2465 "Headphone as Line Out Switch", 0);
2466 if (err < 0)
2467 return err;
2468 }
2469
b5895dc8
MR		 2470 if (spec->line_switch) {
2471 nid = cfg->input_pins[AUTO_PIN_LINE];
2472 pincap = snd_hda_param_read(codec, nid,
2473 AC_PAR_PIN_CAP);
2474 if (pincap & AC_PINCAP_OUT) {
2475 err = stac92xx_add_control(spec,
2476 STAC_CTL_WIDGET_IO_SWITCH,
2477 "Line In as Output Switch", nid << 8);
2478 if (err < 0)
2479 return err;
2480 }
2481 }
403d1944 2482
b5895dc8 2483 if (spec->mic_switch) {
cace16f1 2484 unsigned int def_conf;
ae0afd81
MR		 2485 unsigned int mic_pin = AUTO_PIN_MIC;
2486again:
2487 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2488 def_conf = snd_hda_codec_read(codec, nid, 0,
2489 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2490 /* some laptops have an internal analog microphone
2491 * which can't be used as a output */
2492 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2493 pincap = snd_hda_param_read(codec, nid,
2494 AC_PAR_PIN_CAP);
2495 if (pincap & AC_PINCAP_OUT) {
2496 err = stac92xx_add_control(spec,
2497 STAC_CTL_WIDGET_IO_SWITCH,
2498 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2499 nid = snd_hda_codec_read(codec, nid, 0,
2500 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2501 if (!check_in_dac_nids(spec, nid))
2502 add_spec_dacs(spec, nid);
cace16f1
MR		 2503 if (err < 0)
2504 return err;
2505 }
ae0afd81
MR		 2506 } else if (mic_pin == AUTO_PIN_MIC) {
2507 mic_pin = AUTO_PIN_FRONT_MIC;
2508 goto again;
b5895dc8
MR		 2509 }
2510 }
403d1944 2511
c7d4b2fa
M		 2512 return 0;
2513}
2514
eb06ed8f
TI		 2515/* add playback controls for Speaker and HP outputs */
2516static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2517 struct auto_pin_cfg *cfg)
2518{
2519 struct sigmatel_spec *spec = codec->spec;
2520 hda_nid_t nid;
2521 int i, old_num_dacs, err;
2522
2523 old_num_dacs = spec->multiout.num_dacs;
2524 for (i = 0; i < cfg->hp_outs; i++) {
2525 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2526 if (wid_caps & AC_WCAP_UNSOL_CAP)
2527 spec->hp_detect = 1;
2528 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2529 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2530 if (check_in_dac_nids(spec, nid))
2531 nid = 0;
2532 if (! nid)
c7d4b2fa 2533 continue;
eb06ed8f
TI		 2534 add_spec_dacs(spec, nid);
2535 }
2536 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2537 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2538 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2539 if (check_in_dac_nids(spec, nid))
2540 nid = 0;
eb06ed8f
TI		 2541 if (! nid)
2542 continue;
2543 add_spec_dacs(spec, nid);
c7d4b2fa 2544 }
1b290a51
MR		 2545 for (i = 0; i < cfg->line_outs; i++) {
2546 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2547 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2548 if (check_in_dac_nids(spec, nid))
2549 nid = 0;
2550 if (! nid)
2551 continue;
2552 add_spec_dacs(spec, nid);
2553 }
eb06ed8f
TI		 2554 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2555 static const char *pfxs[] = {
2556 "Speaker", "External Speaker", "Speaker2",
2557 };
2558 err = create_controls(spec, pfxs[i - old_num_dacs],
2559 spec->multiout.dac_nids[i], 3);
2560 if (err < 0)
2561 return err;
2562 }
2563 if (spec->multiout.hp_nid) {
2626a263
TI		 2564 err = create_controls(spec, "Headphone",
2565 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2566 if (err < 0)
2567 return err;
2568 }
c7d4b2fa
M		 2569
2570 return 0;
2571}
2572
b22b4821
MR		 2573/* labels for mono mux outputs */
2574static const char *stac92xx_mono_labels[3] = {
2575 "DAC0", "DAC1", "Mixer"
2576};
2577
2578/* create mono mux for mono out on capable codecs */
2579static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2580{
2581 struct sigmatel_spec *spec = codec->spec;
2582 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2583 int i, num_cons;
2584 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2585
2586 num_cons = snd_hda_get_connections(codec,
2587 spec->mono_nid,
2588 con_lst,
2589 HDA_MAX_NUM_INPUTS);
2590 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2591 return -EINVAL;
2592
2593 for (i = 0; i < num_cons; i++) {
2594 mono_mux->items[mono_mux->num_items].label =
2595 stac92xx_mono_labels[i];
2596 mono_mux->items[mono_mux->num_items].index = i;
2597 mono_mux->num_items++;
2598 }
09a99959
MR		 2599
2600 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2601 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2602}
2603
8b65727b 2604/* labels for dmic mux inputs */
ddc2cec4 2605static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2606 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2607 "Digital Mic 3", "Digital Mic 4"
2608};
2609
2610/* create playback/capture controls for input pins on dmic capable codecs */
2611static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2612 const struct auto_pin_cfg *cfg)
2613{
2614 struct sigmatel_spec *spec = codec->spec;
2615 struct hda_input_mux *dimux = &spec->private_dimux;
2616 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2617 int err, i, j;
2618 char name[32];
8b65727b
MP		 2619
2620 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2621 dimux->items[dimux->num_items].index = 0;
2622 dimux->num_items++;
2623
2624 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2625 hda_nid_t nid;
8b65727b
MP		 2626 int index;
2627 int num_cons;
0678accd 2628 unsigned int wcaps;
8b65727b
MP		 2629 unsigned int def_conf;
2630
2631 def_conf = snd_hda_codec_read(codec,
2632 spec->dmic_nids[i],
2633 0,
2634 AC_VERB_GET_CONFIG_DEFAULT,
2635 0);
2636 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2637 continue;
2638
0678accd 2639 nid = spec->dmic_nids[i];
8b65727b 2640 num_cons = snd_hda_get_connections(codec,
e1f0d669 2641 spec->dmux_nids[0],
8b65727b
MP		 2642 con_lst,
2643 HDA_MAX_NUM_INPUTS);
2644 for (j = 0; j < num_cons; j++)
0678accd 2645 if (con_lst[j] == nid) {
8b65727b
MP		 2646 index = j;
2647 goto found;
2648 }
2649 continue;
2650found:
0678accd
MR		 2651 wcaps = get_wcaps(codec, nid);
2652
2653 if (wcaps & AC_WCAP_OUT_AMP) {
2654 sprintf(name, "%s Capture Volume",
2655 stac92xx_dmic_labels[dimux->num_items]);
2656
2657 err = stac92xx_add_control(spec,
2658 STAC_CTL_WIDGET_VOL,
2659 name,
2660 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2661 if (err < 0)
2662 return err;
2663 }
2664
8b65727b
MP		 2665 dimux->items[dimux->num_items].label =
2666 stac92xx_dmic_labels[dimux->num_items];
2667 dimux->items[dimux->num_items].index = index;
2668 dimux->num_items++;
2669 }
2670
2671 return 0;
2672}
2673
c7d4b2fa
M		 2674/* create playback/capture controls for input pins */
2675static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2676{
2677 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2678 struct hda_input_mux *imux = &spec->private_imux;
2679 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2680 int i, j, k;
2681
2682 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2683 int index;
2684
2685 if (!cfg->input_pins[i])
2686 continue;
2687 index = -1;
2688 for (j = 0; j < spec->num_muxes; j++) {
2689 int num_cons;
2690 num_cons = snd_hda_get_connections(codec,
2691 spec->mux_nids[j],
2692 con_lst,
2693 HDA_MAX_NUM_INPUTS);
2694 for (k = 0; k < num_cons; k++)
2695 if (con_lst[k] == cfg->input_pins[i]) {
2696 index = k;
2697 goto found;
2698 }
c7d4b2fa 2699 }
314634bc
TI		 2700 continue;
2701 found:
2702 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2703 imux->items[imux->num_items].index = index;
2704 imux->num_items++;
c7d4b2fa
M		 2705 }
2706
7b043899 2707 if (imux->num_items) {
62fe78e9
SR		 2708 /*
2709 * Set the current input for the muxes.
2710 * The STAC9221 has two input muxes with identical source
2711 * NID lists. Hopefully this won't get confused.
2712 */
2713 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2714 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2715 AC_VERB_SET_CONNECT_SEL,
2716 imux->items[0].index);
62fe78e9
SR		 2717 }
2718 }
2719
c7d4b2fa
M		 2720 return 0;
2721}
2722
c7d4b2fa
M		 2723static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2724{
2725 struct sigmatel_spec *spec = codec->spec;
2726 int i;
2727
2728 for (i = 0; i < spec->autocfg.line_outs; i++) {
2729 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2730 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2731 }
2732}
2733
2734static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2735{
2736 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2737 int i;
c7d4b2fa 2738
eb06ed8f
TI		 2739 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2740 hda_nid_t pin;
2741 pin = spec->autocfg.hp_pins[i];
2742 if (pin) /* connect to front */
2743 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2744 }
2745 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2746 hda_nid_t pin;
2747 pin = spec->autocfg.speaker_pins[i];
2748 if (pin) /* connect to front */
2749 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2750 }
c7d4b2fa
M		 2751}
2752
3cc08dc6 2753static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2754{
2755 struct sigmatel_spec *spec = codec->spec;
2756 int err;
bcecd9bd 2757 int hp_speaker_swap = 0;
c7d4b2fa 2758
8b65727b
MP		 2759 if ((err = snd_hda_parse_pin_def_config(codec,
2760 &spec->autocfg,
2761 spec->dmic_nids)) < 0)
c7d4b2fa 2762 return err;
82bc955f 2763 if (! spec->autocfg.line_outs)
869264c4 2764 return 0; /* can't find valid pin config */
19039bd0 2765
bcecd9bd
JZ		 2766 /* If we have no real line-out pin and multiple hp-outs, HPs should
2767 * be set up as multi-channel outputs.
2768 */
2769 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2770 spec->autocfg.hp_outs > 1) {
2771 /* Copy hp_outs to line_outs, backup line_outs in
2772 * speaker_outs so that the following routines can handle
2773 * HP pins as primary outputs.
2774 */
2775 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2776 sizeof(spec->autocfg.line_out_pins));
2777 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2778 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2779 sizeof(spec->autocfg.hp_pins));
2780 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2781 hp_speaker_swap = 1;
2782 }
09a99959
MR		 2783 if (spec->autocfg.mono_out_pin) {
2784 int dir = (get_wcaps(codec, spec->autocfg.mono_out_pin)
2785 & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
2786 u32 caps = query_amp_caps(codec,
2787 spec->autocfg.mono_out_pin, dir);
2788 hda_nid_t conn_list[1];
2789
2790 /* get the mixer node and then the mono mux if it exists */
2791 if (snd_hda_get_connections(codec,
2792 spec->autocfg.mono_out_pin, conn_list, 1) &&
2793 snd_hda_get_connections(codec, conn_list[0],
2794 conn_list, 1)) {
2795
2796 int wcaps = get_wcaps(codec, conn_list[0]);
2797 int wid_type = (wcaps & AC_WCAP_TYPE)
2798 >> AC_WCAP_TYPE_SHIFT;
2799 /* LR swap check, some stac925x have a mux that
2800 * changes the DACs output path instead of the
2801 * mono-mux path.
2802 */
2803 if (wid_type == AC_WID_AUD_SEL &&
2804 !(wcaps & AC_WCAP_LR_SWAP))
2805 spec->mono_nid = conn_list[0];
2806 }
2807 /* all mono outs have a least a mute/unmute switch */
2808 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2809 "Mono Playback Switch",
2810 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2811 1, 0, dir));
2812 if (err < 0)
2813 return err;
2814 /* check to see if there is volume support for the amp */
2815 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2816 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2817 "Mono Playback Volume",
2818 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2819 1, 0, dir));
2820 if (err < 0)
2821 return err;
2822 }
2823
2824 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
2825 AC_PINCTL_OUT_EN);
2826 }
bcecd9bd 2827
403d1944
MP		 2828 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2829 return err;
19039bd0
TI		 2830 if (spec->multiout.num_dacs == 0)
2831 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2832 return err;
c7d4b2fa 2833
0fb87bb4
ML		 2834 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2835
2836 if (err < 0)
2837 return err;
2838
bcecd9bd
JZ		 2839 if (hp_speaker_swap == 1) {
2840 /* Restore the hp_outs and line_outs */
2841 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2842 sizeof(spec->autocfg.line_out_pins));
2843 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2844 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2845 sizeof(spec->autocfg.speaker_pins));
2846 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2847 memset(spec->autocfg.speaker_pins, 0,
2848 sizeof(spec->autocfg.speaker_pins));
2849 spec->autocfg.speaker_outs = 0;
2850 }
2851
0fb87bb4
ML		 2852 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2853
2854 if (err < 0)
2855 return err;
2856
2857 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2858
2859 if (err < 0)
c7d4b2fa
M		 2860 return err;
2861
b22b4821
MR		 2862 if (spec->mono_nid > 0) {
2863 err = stac92xx_auto_create_mono_output_ctls(codec);
2864 if (err < 0)
2865 return err;
2866 }
2867
8b65727b
MP		 2868 if (spec->num_dmics > 0)
2869 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2870 &spec->autocfg)) < 0)
2871 return err;
2872
c7d4b2fa 2873 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2874 if (spec->multiout.max_channels > 2)
c7d4b2fa 2875 spec->surr_switch = 1;
c7d4b2fa 2876
82bc955f 2877 if (spec->autocfg.dig_out_pin)
3cc08dc6 2878 spec->multiout.dig_out_nid = dig_out;
82bc955f 2879 if (spec->autocfg.dig_in_pin)
3cc08dc6 2880 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2881
2882 if (spec->kctl_alloc)
2883 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2884
2885 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2886 if (!spec->dinput_mux)
2887 spec->dinput_mux = &spec->private_dimux;
b22b4821 2888 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 2889
2890 return 1;
2891}
2892
82bc955f
TI		 2893/* add playback controls for HP output */
2894static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2895 struct auto_pin_cfg *cfg)
2896{
2897 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2898 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2899 unsigned int wid_caps;
2900
2901 if (! pin)
2902 return 0;
2903
2904 wid_caps = get_wcaps(codec, pin);
505cb341 2905 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2906 spec->hp_detect = 1;
82bc955f
TI		 2907
2908 return 0;
2909}
2910
160ea0dc
RF		 2911/* add playback controls for LFE output */
2912static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2913 struct auto_pin_cfg *cfg)
2914{
2915 struct sigmatel_spec *spec = codec->spec;
2916 int err;
2917 hda_nid_t lfe_pin = 0x0;
2918 int i;
2919
2920 /*
2921 * search speaker outs and line outs for a mono speaker pin
2922 * with an amp. If one is found, add LFE controls
2923 * for it.
2924 */
2925 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2926 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 2927 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 2928 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2929 if (wcaps == AC_WCAP_OUT_AMP)
2930 /* found a mono speaker with an amp, must be lfe */
2931 lfe_pin = pin;
2932 }
2933
2934 /* if speaker_outs is 0, then speakers may be in line_outs */
2935 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2936 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2937 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 2938 unsigned int defcfg;
8b551785 2939 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 2940 AC_VERB_GET_CONFIG_DEFAULT,
2941 0x00);
8b551785 2942 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 2943 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 2944 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2945 if (wcaps == AC_WCAP_OUT_AMP)
2946 /* found a mono speaker with an amp,
2947 must be lfe */
2948 lfe_pin = pin;
2949 }
2950 }
2951 }
2952
2953 if (lfe_pin) {
eb06ed8f 2954 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2955 if (err < 0)
2956 return err;
2957 }
2958
2959 return 0;
2960}
2961
c7d4b2fa
M		 2962static int stac9200_parse_auto_config(struct hda_codec *codec)
2963{
2964 struct sigmatel_spec *spec = codec->spec;
2965 int err;
2966
df694daa 2967 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2968 return err;
2969
2970 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2971 return err;
2972
82bc955f
TI		 2973 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2974 return err;
2975
160ea0dc
RF		 2976 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2977 return err;
2978
82bc955f 2979 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2980 spec->multiout.dig_out_nid = 0x05;
82bc955f 2981 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2982 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2983
2984 if (spec->kctl_alloc)
2985 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2986
2987 spec->input_mux = &spec->private_imux;
8b65727b 2988 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2989
2990 return 1;
2991}
2992
62fe78e9
SR		 2993/*
2994 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2995 * funky external mute control using GPIO pins.
2996 */
2997
76e1ddfb 2998static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 2999 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3000{
3001 unsigned int gpiostate, gpiomask, gpiodir;
3002
3003 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3004 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3005 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3006
3007 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3008 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3009 gpiomask |= mask;
62fe78e9
SR		 3010
3011 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3012 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3013 gpiodir |= dir_mask;
62fe78e9 3014
76e1ddfb 3015 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3016 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3017
3018 snd_hda_codec_write(codec, codec->afg, 0,
3019 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3020 snd_hda_codec_read(codec, codec->afg, 0,
3021 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3022
3023 msleep(1);
3024
76e1ddfb
TI		 3025 snd_hda_codec_read(codec, codec->afg, 0,
3026 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3027}
3028
314634bc
TI		 3029static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3030 unsigned int event)
3031{
3032 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3033 snd_hda_codec_write_cache(codec, nid, 0,
3034 AC_VERB_SET_UNSOLICITED_ENABLE,
3035 (AC_USRSP_EN | event));
314634bc
TI		 3036}
3037
a64135a2
MR		 3038static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3039{
3040 int i;
3041 for (i = 0; i < cfg->hp_outs; i++)
3042 if (cfg->hp_pins[i] == nid)
3043 return 1; /* nid is a HP-Out */
3044
3045 return 0; /* nid is not a HP-Out */
3046};
3047
b76c850f
MR		 3048static void stac92xx_power_down(struct hda_codec *codec)
3049{
3050 struct sigmatel_spec *spec = codec->spec;
3051
3052 /* power down inactive DACs */
3053 hda_nid_t *dac;
3054 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3055 if (!is_in_dac_nids(spec, *dac) &&
3056 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3057 snd_hda_codec_write_cache(codec, *dac, 0,
3058 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3059}
3060
c7d4b2fa
M		 3061static int stac92xx_init(struct hda_codec *codec)
3062{
3063 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3064 struct auto_pin_cfg *cfg = &spec->autocfg;
3065 int i;
c7d4b2fa 3066
c7d4b2fa
M		 3067 snd_hda_sequence_write(codec, spec->init);
3068
82bc955f
TI		 3069 /* set up pins */
3070 if (spec->hp_detect) {
505cb341 3071 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3072 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3073 enable_pin_detect(codec, cfg->hp_pins[i],
3074 STAC_HP_EVENT);
0a07acaf
TI		 3075 /* force to enable the first line-out; the others are set up
3076 * in unsol_event
3077 */
3078 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3079 AC_PINCTL_OUT_EN);
eb995a8c 3080 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3081 /* fake event to set up pins */
3082 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3083 } else {
3084 stac92xx_auto_init_multi_out(codec);
3085 stac92xx_auto_init_hp_out(codec);
3086 }
3087 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3088 hda_nid_t nid = cfg->input_pins[i];
3089 if (nid) {
3090 unsigned int pinctl = AC_PINCTL_IN_EN;
3091 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3092 pinctl |= stac92xx_get_vref(codec, nid);
3093 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3094 }
82bc955f 3095 }
a64135a2
MR		 3096 for (i = 0; i < spec->num_dmics; i++)
3097 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3098 AC_PINCTL_IN_EN);
3099 for (i = 0; i < spec->num_pwrs; i++) {
3100 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3101 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3102 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3103 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3104 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3105 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
a64135a2
MR		 3106 /* outputs are only ports capable of power management
3107 * any attempts on powering down a input port cause the
3108 * referenced VREF to act quirky.
3109 */
3110 if (pinctl & AC_PINCTL_IN_EN)
3111 continue;
bce6c2b5
MR		 3112 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED)
3113 continue;
a64135a2
MR		 3114 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3115 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3116 }
b76c850f
MR		 3117 if (spec->dac_list)
3118 stac92xx_power_down(codec);
82bc955f
TI		 3119 if (cfg->dig_out_pin)
3120 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3121 AC_PINCTL_OUT_EN);
3122 if (cfg->dig_in_pin)
3123 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3124 AC_PINCTL_IN_EN);
3125
4fe5195c
MR		 3126 stac_gpio_set(codec, spec->gpio_mask,
3127 spec->gpio_dir, spec->gpio_data);
62fe78e9 3128
c7d4b2fa
M		 3129 return 0;
3130}
3131
2f2f4251
M		 3132static void stac92xx_free(struct hda_codec *codec)
3133{
c7d4b2fa
M		 3134 struct sigmatel_spec *spec = codec->spec;
3135 int i;
3136
3137 if (! spec)
3138 return;
3139
3140 if (spec->kctl_alloc) {
3141 for (i = 0; i < spec->num_kctl_used; i++)
3142 kfree(spec->kctl_alloc[i].name);
3143 kfree(spec->kctl_alloc);
3144 }
3145
11b44bbd
RF		 3146 if (spec->bios_pin_configs)
3147 kfree(spec->bios_pin_configs);
3148
c7d4b2fa 3149 kfree(spec);
2f2f4251
M		 3150}
3151
4e55096e
M		 3152static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3153 unsigned int flag)
3154{
3155 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3156 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3157
f9acba43
TI		 3158 if (pin_ctl & AC_PINCTL_IN_EN) {
3159 /*
3160 * we need to check the current set-up direction of
3161 * shared input pins since they can be switched via
3162 * "xxx as Output" mixer switch
3163 */
3164 struct sigmatel_spec *spec = codec->spec;
3165 struct auto_pin_cfg *cfg = &spec->autocfg;
3166 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3167 spec->line_switch) ||
3168 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3169 spec->mic_switch))
3170 return;
3171 }
3172
7b043899
SL		 3173 /* if setting pin direction bits, clear the current
3174 direction bits first */
3175 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3176 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3177
82beb8fd 3178 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3179 AC_VERB_SET_PIN_WIDGET_CONTROL,
3180 pin_ctl | flag);
3181}
3182
3183static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3184 unsigned int flag)
3185{
3186 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3187 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3188 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3189 AC_VERB_SET_PIN_WIDGET_CONTROL,
3190 pin_ctl & ~flag);
3191}
3192
40c1d308 3193static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3194{
3195 if (!nid)
3196 return 0;
3197 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3198 & (1 << 31)) {
3199 unsigned int pinctl;
3200 pinctl = snd_hda_codec_read(codec, nid, 0,
3201 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3202 if (pinctl & AC_PINCTL_IN_EN)
3203 return 0; /* mic- or line-input */
3204 else
3205 return 1; /* HP-output */
3206 }
314634bc
TI		 3207 return 0;
3208}
3209
3210static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3211{
3212 struct sigmatel_spec *spec = codec->spec;
3213 struct auto_pin_cfg *cfg = &spec->autocfg;
7c2ba97b 3214 int nid = cfg->hp_pins[cfg->hp_outs - 1];
4e55096e
M		 3215 int i, presence;
3216
eb06ed8f 3217 presence = 0;
4fe5195c
MR		 3218 if (spec->gpio_mute)
3219 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3220 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3221
eb06ed8f 3222 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3223 if (presence)
3224 break;
7c2ba97b
MR		 3225 if (spec->hp_switch && cfg->hp_pins[i] == nid)
3226 break;
4fe5195c 3227 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3228 }
4e55096e
M		 3229
3230 if (presence) {
3231 /* disable lineouts, enable hp */
7c2ba97b
MR		 3232 if (spec->hp_switch)
3233 stac92xx_reset_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3234 for (i = 0; i < cfg->line_outs; i++)
3235 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3236 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3237 for (i = 0; i < cfg->speaker_outs; i++)
3238 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3239 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3240 if (spec->eapd_mask)
3241 stac_gpio_set(codec, spec->gpio_mask,
3242 spec->gpio_dir, spec->gpio_data &
3243 ~spec->eapd_mask);
4e55096e
M		 3244 } else {
3245 /* enable lineouts, disable hp */
7c2ba97b
MR		 3246 if (spec->hp_switch)
3247 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3248 for (i = 0; i < cfg->line_outs; i++)
3249 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3250 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3251 for (i = 0; i < cfg->speaker_outs; i++)
3252 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3253 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3254 if (spec->eapd_mask)
3255 stac_gpio_set(codec, spec->gpio_mask,
3256 spec->gpio_dir, spec->gpio_data |
3257 spec->eapd_mask);
4e55096e 3258 }
7c2ba97b
MR		 3259 if (!spec->hp_switch && cfg->hp_outs > 1 && presence)
3260 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3261}
3262
a64135a2
MR		 3263static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3264{
3265 struct sigmatel_spec *spec = codec->spec;
3266 hda_nid_t nid = spec->pwr_nids[idx];
3267 int presence, val;
3268 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3269 & 0x000000ff;
3270 presence = get_hp_pin_presence(codec, nid);
3271 idx = 1 << idx;
3272
3273 if (presence)
3274 val &= ~idx;
3275 else
3276 val |= idx;
3277
3278 /* power down unused output ports */
3279 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3280};
3281
314634bc
TI		 3282static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3283{
a64135a2
MR		 3284 struct sigmatel_spec *spec = codec->spec;
3285 int idx = res >> 26 & 0x0f;
3286
3287 switch ((res >> 26) & 0x30) {
314634bc
TI		 3288 case STAC_HP_EVENT:
3289 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3290 /* fallthru */
3291 case STAC_PWR_EVENT:
3292 if (spec->num_pwrs > 0)
3293 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3294 }
3295}
3296
cb53c626 3297#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3298static int stac92xx_resume(struct hda_codec *codec)
3299{
dc81bed1
TI		 3300 struct sigmatel_spec *spec = codec->spec;
3301
11b44bbd 3302 stac92xx_set_config_regs(codec);
dc81bed1 3303 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3304 stac_gpio_set(codec, spec->gpio_mask,
3305 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3306 snd_hda_codec_resume_amp(codec);
3307 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3308 /* power down inactive DACs */
3309 if (spec->dac_list)
3310 stac92xx_power_down(codec);
dc81bed1
TI		 3311 /* invoke unsolicited event to reset the HP state */
3312 if (spec->hp_detect)
3313 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3314 return 0;
3315}
3316#endif
3317
2f2f4251
M		 3318static struct hda_codec_ops stac92xx_patch_ops = {
3319 .build_controls = stac92xx_build_controls,
3320 .build_pcms = stac92xx_build_pcms,
3321 .init = stac92xx_init,
3322 .free = stac92xx_free,
4e55096e 3323 .unsol_event = stac92xx_unsol_event,
cb53c626 3324#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3325 .resume = stac92xx_resume,
3326#endif
2f2f4251
M		 3327};
3328
3329static int patch_stac9200(struct hda_codec *codec)
3330{
3331 struct sigmatel_spec *spec;
c7d4b2fa 3332 int err;
2f2f4251 3333
e560d8d8 3334 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3335 if (spec == NULL)
3336 return -ENOMEM;
3337
3338 codec->spec = spec;
a4eed138 3339 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3340 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3341 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3342 stac9200_models,
3343 stac9200_cfg_tbl);
11b44bbd
RF		 3344 if (spec->board_config < 0) {
3345 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3346 err = stac92xx_save_bios_config_regs(codec);
3347 if (err < 0) {
3348 stac92xx_free(codec);
3349 return err;
3350 }
3351 spec->pin_configs = spec->bios_pin_configs;
3352 } else {
403d1944
MP		 3353 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3354 stac92xx_set_config_regs(codec);
3355 }
2f2f4251
M		 3356
3357 spec->multiout.max_channels = 2;
3358 spec->multiout.num_dacs = 1;
3359 spec->multiout.dac_nids = stac9200_dac_nids;
3360 spec->adc_nids = stac9200_adc_nids;
3361 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3362 spec->num_muxes = 1;
8b65727b 3363 spec->num_dmics = 0;
9e05b7a3 3364 spec->num_adcs = 1;
a64135a2 3365 spec->num_pwrs = 0;
c7d4b2fa 3366
bf277785
TD		 3367 if (spec->board_config == STAC_9200_GATEWAY ||
3368 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3369 spec->init = stac9200_eapd_init;
3370 else
3371 spec->init = stac9200_core_init;
2f2f4251 3372 spec->mixer = stac9200_mixer;
c7d4b2fa 3373
117f257d
TI		 3374 if (spec->board_config == STAC_9200_PANASONIC) {
3375 spec->gpio_mask = spec->gpio_dir = 0x09;
3376 spec->gpio_data = 0x00;
3377 }
3378
c7d4b2fa
M		 3379 err = stac9200_parse_auto_config(codec);
3380 if (err < 0) {
3381 stac92xx_free(codec);
3382 return err;
3383 }
2f2f4251
M		 3384
3385 codec->patch_ops = stac92xx_patch_ops;
3386
3387 return 0;
3388}
3389
8e21c34c
TD		 3390static int patch_stac925x(struct hda_codec *codec)
3391{
3392 struct sigmatel_spec *spec;
3393 int err;
3394
3395 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3396 if (spec == NULL)
3397 return -ENOMEM;
3398
3399 codec->spec = spec;
a4eed138 3400 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3401 spec->pin_nids = stac925x_pin_nids;
3402 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3403 stac925x_models,
3404 stac925x_cfg_tbl);
9e507abd 3405 again:
8e21c34c 3406 if (spec->board_config < 0) {
2c11f955
TD		 3407 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3408 "using BIOS defaults\n");
8e21c34c
TD		 3409 err = stac92xx_save_bios_config_regs(codec);
3410 if (err < 0) {
3411 stac92xx_free(codec);
3412 return err;
3413 }
3414 spec->pin_configs = spec->bios_pin_configs;
3415 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3416 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3417 stac92xx_set_config_regs(codec);
3418 }
3419
3420 spec->multiout.max_channels = 2;
3421 spec->multiout.num_dacs = 1;
3422 spec->multiout.dac_nids = stac925x_dac_nids;
3423 spec->adc_nids = stac925x_adc_nids;
3424 spec->mux_nids = stac925x_mux_nids;
3425 spec->num_muxes = 1;
9e05b7a3 3426 spec->num_adcs = 1;
a64135a2 3427 spec->num_pwrs = 0;
2c11f955
TD		 3428 switch (codec->vendor_id) {
3429 case 0x83847632: /* STAC9202 */
3430 case 0x83847633: /* STAC9202D */
3431 case 0x83847636: /* STAC9251 */
3432 case 0x83847637: /* STAC9251D */
f6e9852a 3433 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3434 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3435 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3436 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3437 break;
3438 default:
3439 spec->num_dmics = 0;
3440 break;
3441 }
8e21c34c
TD		 3442
3443 spec->init = stac925x_core_init;
3444 spec->mixer = stac925x_mixer;
3445
3446 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3447 if (!err) {
3448 if (spec->board_config < 0) {
3449 printk(KERN_WARNING "hda_codec: No auto-config is "
3450 "available, default to model=ref\n");
3451 spec->board_config = STAC_925x_REF;
3452 goto again;
3453 }
3454 err = -EINVAL;
3455 }
8e21c34c
TD		 3456 if (err < 0) {
3457 stac92xx_free(codec);
3458 return err;
3459 }
3460
3461 codec->patch_ops = stac92xx_patch_ops;
3462
3463 return 0;
3464}
3465
e1f0d669
MR		 3466static struct hda_input_mux stac92hd73xx_dmux = {
3467 .num_items = 4,
3468 .items = {
3469 { "Analog Inputs", 0x0b },
3470 { "CD", 0x08 },
3471 { "Digital Mic 1", 0x09 },
3472 { "Digital Mic 2", 0x0a },
3473 }
3474};
3475
3476static int patch_stac92hd73xx(struct hda_codec *codec)
3477{
3478 struct sigmatel_spec *spec;
3479 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3480 int err = 0;
3481
3482 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3483 if (spec == NULL)
3484 return -ENOMEM;
3485
3486 codec->spec = spec;
3487 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3488 spec->pin_nids = stac92hd73xx_pin_nids;
3489 spec->board_config = snd_hda_check_board_config(codec,
3490 STAC_92HD73XX_MODELS,
3491 stac92hd73xx_models,
3492 stac92hd73xx_cfg_tbl);
3493again:
3494 if (spec->board_config < 0) {
3495 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3496 " STAC92HD73XX, using BIOS defaults\n");
3497 err = stac92xx_save_bios_config_regs(codec);
3498 if (err < 0) {
3499 stac92xx_free(codec);
3500 return err;
3501 }
3502 spec->pin_configs = spec->bios_pin_configs;
3503 } else {
3504 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3505 stac92xx_set_config_regs(codec);
3506 }
3507
3508 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3509 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3510
3511 if (spec->multiout.num_dacs < 0) {
3512 printk(KERN_WARNING "hda_codec: Could not determine "
3513 "number of channels defaulting to DAC count\n");
3514 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3515 }
3516
3517 switch (spec->multiout.num_dacs) {
3518 case 0x3: /* 6 Channel */
7c2ba97b 3519 spec->multiout.hp_nid = 0x17;
e1f0d669
MR		 3520 spec->mixer = stac92hd73xx_6ch_mixer;
3521 spec->init = stac92hd73xx_6ch_core_init;
3522 break;
3523 case 0x4: /* 8 Channel */
3524 spec->multiout.hp_nid = 0x18;
3525 spec->mixer = stac92hd73xx_8ch_mixer;
3526 spec->init = stac92hd73xx_8ch_core_init;
3527 break;
3528 case 0x5: /* 10 Channel */
3529 spec->multiout.hp_nid = 0x19;
3530 spec->mixer = stac92hd73xx_10ch_mixer;
3531 spec->init = stac92hd73xx_10ch_core_init;
3532 };
3533
3534 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3535 spec->aloopback_mask = 0x01;
3536 spec->aloopback_shift = 8;
3537
3538 spec->mux_nids = stac92hd73xx_mux_nids;
3539 spec->adc_nids = stac92hd73xx_adc_nids;
3540 spec->dmic_nids = stac92hd73xx_dmic_nids;
3541 spec->dmux_nids = stac92hd73xx_dmux_nids;
3542
3543 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3544 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 3545 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3546 spec->dinput_mux = &stac92hd73xx_dmux;
3547 /* GPIO0 High = Enable EAPD */
0fc9dec4 3548 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 3549 spec->gpio_data = 0x01;
e1f0d669 3550
a7662640
MR		 3551 switch (spec->board_config) {
3552 case STAC_DELL_M6:
d654a660 3553 spec->init = dell_eq_core_init;
a7662640
MR		 3554 switch (codec->subsystem_id) {
3555 case 0x1028025e: /* Analog Mics */
3556 case 0x1028025f:
3557 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3558 spec->num_dmics = 0;
3559 break;
d654a660 3560 case 0x10280271: /* Digital Mics */
a7662640 3561 case 0x10280272:
d654a660
MR		 3562 spec->init = dell_m6_core_init;
3563 /* fall-through */
3564 case 0x10280254:
3565 case 0x10280255:
a7662640
MR		 3566 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3567 spec->num_dmics = 1;
3568 break;
3569 case 0x10280256: /* Both */
3570 case 0x10280057:
3571 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3572 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3573 spec->num_dmics = 1;
3574 break;
3575 }
3576 break;
3577 default:
3578 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
3579 }
3580
a64135a2
MR		 3581 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3582 spec->pwr_nids = stac92hd73xx_pwr_nids;
3583
e1f0d669
MR		 3584 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3585
3586 if (!err) {
3587 if (spec->board_config < 0) {
3588 printk(KERN_WARNING "hda_codec: No auto-config is "
3589 "available, default to model=ref\n");
3590 spec->board_config = STAC_92HD73XX_REF;
3591 goto again;
3592 }
3593 err = -EINVAL;
3594 }
3595
3596 if (err < 0) {
3597 stac92xx_free(codec);
3598 return err;
3599 }
3600
3601 codec->patch_ops = stac92xx_patch_ops;
3602
3603 return 0;
3604}
3605
e035b841
MR		 3606static int patch_stac92hd71bxx(struct hda_codec *codec)
3607{
3608 struct sigmatel_spec *spec;
3609 int err = 0;
3610
3611 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3612 if (spec == NULL)
3613 return -ENOMEM;
3614
3615 codec->spec = spec;
3616 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
3617 spec->pin_nids = stac92hd71bxx_pin_nids;
3618 spec->board_config = snd_hda_check_board_config(codec,
3619 STAC_92HD71BXX_MODELS,
3620 stac92hd71bxx_models,
3621 stac92hd71bxx_cfg_tbl);
3622again:
3623 if (spec->board_config < 0) {
3624 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3625 " STAC92HD71BXX, using BIOS defaults\n");
3626 err = stac92xx_save_bios_config_regs(codec);
3627 if (err < 0) {
3628 stac92xx_free(codec);
3629 return err;
3630 }
3631 spec->pin_configs = spec->bios_pin_configs;
3632 } else {
3633 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3634 stac92xx_set_config_regs(codec);
3635 }
3636
541eee87
MR		 3637 switch (codec->vendor_id) {
3638 case 0x111d76b6: /* 4 Port without Analog Mixer */
3639 case 0x111d76b7:
3640 case 0x111d76b4: /* 6 Port without Analog Mixer */
3641 case 0x111d76b5:
3642 spec->mixer = stac92hd71bxx_mixer;
3643 spec->init = stac92hd71bxx_core_init;
3644 break;
3645 default:
3646 spec->mixer = stac92hd71bxx_analog_mixer;
3647 spec->init = stac92hd71bxx_analog_core_init;
3648 }
3649
3650 spec->aloopback_mask = 0x20;
3651 spec->aloopback_shift = 0;
3652
4fe5195c 3653 /* GPIO0 High = EAPD */
0fc9dec4
MR		 3654 spec->gpio_mask = 0x01;
3655 spec->gpio_dir = 0x01;
3656 spec->gpio_mask = 0x01;
3657 spec->gpio_data = 0x01;
e035b841 3658
e035b841
MR		 3659 spec->mux_nids = stac92hd71bxx_mux_nids;
3660 spec->adc_nids = stac92hd71bxx_adc_nids;
3661 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3662 spec->dmux_nids = stac92hd71bxx_dmux_nids;
e035b841
MR		 3663
3664 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3665 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3666 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3667 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3668
a64135a2
MR		 3669 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3670 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3671
aea7bb0a 3672 spec->multiout.num_dacs = 1;
e035b841
MR		 3673 spec->multiout.hp_nid = 0x11;
3674 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3675
3676 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3677 if (!err) {
3678 if (spec->board_config < 0) {
3679 printk(KERN_WARNING "hda_codec: No auto-config is "
3680 "available, default to model=ref\n");
3681 spec->board_config = STAC_92HD71BXX_REF;
3682 goto again;
3683 }
3684 err = -EINVAL;
3685 }
3686
3687 if (err < 0) {
3688 stac92xx_free(codec);
3689 return err;
3690 }
3691
3692 codec->patch_ops = stac92xx_patch_ops;
3693
3694 return 0;
3695};
3696
2f2f4251
M		 3697static int patch_stac922x(struct hda_codec *codec)
3698{
3699 struct sigmatel_spec *spec;
c7d4b2fa 3700 int err;
2f2f4251 3701
e560d8d8 3702 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3703 if (spec == NULL)
3704 return -ENOMEM;
3705
3706 codec->spec = spec;
a4eed138 3707 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3708 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3709 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3710 stac922x_models,
3711 stac922x_cfg_tbl);
5d5d3bc3 3712 if (spec->board_config == STAC_INTEL_MAC_V3) {
4fe5195c
MR		 3713 spec->gpio_mask = spec->gpio_dir = 0x03;
3714 spec->gpio_data = 0x03;
3fc24d85
TI		 3715 /* Intel Macs have all same PCI SSID, so we need to check
3716 * codec SSID to distinguish the exact models
3717 */
6f0778d8 3718 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3719 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3720
3721 case 0x106b0800:
3722 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3723 break;
5d5d3bc3
IZ		 3724 case 0x106b0600:
3725 case 0x106b0700:
3726 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3727 break;
5d5d3bc3
IZ		 3728 case 0x106b0e00:
3729 case 0x106b0f00:
3730 case 0x106b1600:
3731 case 0x106b1700:
3732 case 0x106b0200:
3733 case 0x106b1e00:
3734 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3735 break;
5d5d3bc3
IZ		 3736 case 0x106b1a00:
3737 case 0x00000100:
3738 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3739 break;
5d5d3bc3
IZ		 3740 case 0x106b0a00:
3741 case 0x106b2200:
3742 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3743 break;
3fc24d85
TI		 3744 }
3745 }
3746
9e507abd 3747 again:
11b44bbd
RF		 3748 if (spec->board_config < 0) {
3749 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3750 "using BIOS defaults\n");
3751 err = stac92xx_save_bios_config_regs(codec);
3752 if (err < 0) {
3753 stac92xx_free(codec);
3754 return err;
3755 }
3756 spec->pin_configs = spec->bios_pin_configs;
3757 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3758 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3759 stac92xx_set_config_regs(codec);
3760 }
2f2f4251 3761
c7d4b2fa
M		 3762 spec->adc_nids = stac922x_adc_nids;
3763 spec->mux_nids = stac922x_mux_nids;
2549413e 3764 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3765 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3766 spec->num_dmics = 0;
a64135a2 3767 spec->num_pwrs = 0;
c7d4b2fa
M		 3768
3769 spec->init = stac922x_core_init;
2f2f4251 3770 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3771
3772 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3773
3cc08dc6 3774 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3775 if (!err) {
3776 if (spec->board_config < 0) {
3777 printk(KERN_WARNING "hda_codec: No auto-config is "
3778 "available, default to model=ref\n");
3779 spec->board_config = STAC_D945_REF;
3780 goto again;
3781 }
3782 err = -EINVAL;
3783 }
3cc08dc6
MP		 3784 if (err < 0) {
3785 stac92xx_free(codec);
3786 return err;
3787 }
3788
3789 codec->patch_ops = stac92xx_patch_ops;
3790
807a4636
TI		 3791 /* Fix Mux capture level; max to 2 */
3792 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3793 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3794 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3795 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3796 (0 << AC_AMPCAP_MUTE_SHIFT));
3797
3cc08dc6
MP		 3798 return 0;
3799}
3800
3801static int patch_stac927x(struct hda_codec *codec)
3802{
3803 struct sigmatel_spec *spec;
3804 int err;
3805
3806 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3807 if (spec == NULL)
3808 return -ENOMEM;
3809
3810 codec->spec = spec;
a4eed138 3811 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3812 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3813 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3814 stac927x_models,
3815 stac927x_cfg_tbl);
9e507abd 3816 again:
8e9068b1
MR		 3817 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3818 if (spec->board_config < 0)
3819 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3820 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3821 err = stac92xx_save_bios_config_regs(codec);
3822 if (err < 0) {
3823 stac92xx_free(codec);
3824 return err;
3825 }
3826 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3827 } else {
3cc08dc6
MP		 3828 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3829 stac92xx_set_config_regs(codec);
3830 }
3831
8e9068b1
MR		 3832 spec->adc_nids = stac927x_adc_nids;
3833 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3834 spec->mux_nids = stac927x_mux_nids;
3835 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
b76c850f 3836 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 3837 spec->multiout.dac_nids = spec->dac_nids;
3838
81d3dbde 3839 switch (spec->board_config) {
93ed1503 3840 case STAC_D965_3ST:
93ed1503 3841 case STAC_D965_5ST:
8e9068b1 3842 /* GPIO0 High = Enable EAPD */
0fc9dec4 3843 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 3844 spec->gpio_data = 0x01;
8e9068b1
MR		 3845 spec->num_dmics = 0;
3846
93ed1503 3847 spec->init = d965_core_init;
9e05b7a3 3848 spec->mixer = stac927x_mixer;
81d3dbde 3849 break;
8e9068b1 3850 case STAC_DELL_BIOS:
780c8be4
MR		 3851 switch (codec->subsystem_id) {
3852 case 0x10280209:
3853 case 0x1028022e:
3854 /* correct the device field to SPDIF out */
3855 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
3856 break;
3857 };
03d7ca17
MR		 3858 /* configure the analog microphone on some laptops */
3859 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 3860 /* correct the front output jack as a hp out */
7989fba9 3861 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 3862 /* correct the front input jack as a mic */
3863 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3864 /* fallthru */
8e9068b1
MR		 3865 case STAC_DELL_3ST:
3866 /* GPIO2 High = Enable EAPD */
0fc9dec4 3867 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 3868 spec->gpio_data = 0x04;
7f16859a
MR		 3869 spec->dmic_nids = stac927x_dmic_nids;
3870 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3871
8e9068b1
MR		 3872 spec->init = d965_core_init;
3873 spec->mixer = stac927x_mixer;
3874 spec->dmux_nids = stac927x_dmux_nids;
1697055e 3875 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 3876 break;
3877 default:
f1f208d0 3878 /* GPIO0 High = Enable EAPD */
0fc9dec4 3879 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 3880 spec->gpio_data = 0x01;
8e9068b1
MR		 3881 spec->num_dmics = 0;
3882
3883 spec->init = stac927x_core_init;
3884 spec->mixer = stac927x_mixer;
7f16859a
MR		 3885 }
3886
a64135a2 3887 spec->num_pwrs = 0;
e1f0d669
MR		 3888 spec->aloopback_mask = 0x40;
3889 spec->aloopback_shift = 0;
8e9068b1 3890
3cc08dc6 3891 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3892 if (!err) {
3893 if (spec->board_config < 0) {
3894 printk(KERN_WARNING "hda_codec: No auto-config is "
3895 "available, default to model=ref\n");
3896 spec->board_config = STAC_D965_REF;
3897 goto again;
3898 }
3899 err = -EINVAL;
3900 }
c7d4b2fa
M		 3901 if (err < 0) {
3902 stac92xx_free(codec);
3903 return err;
3904 }
2f2f4251
M		 3905
3906 codec->patch_ops = stac92xx_patch_ops;
3907
52987656
TI		 3908 /*
3909 * !!FIXME!!
3910 * The STAC927x seem to require fairly long delays for certain
3911 * command sequences. With too short delays (even if the answer
3912 * is set to RIRB properly), it results in the silence output
3913 * on some hardwares like Dell.
3914 *
3915 * The below flag enables the longer delay (see get_response
3916 * in hda_intel.c).
3917 */
3918 codec->bus->needs_damn_long_delay = 1;
3919
2f2f4251
M		 3920 return 0;
3921}
3922
f3302a59
MP		 3923static int patch_stac9205(struct hda_codec *codec)
3924{
3925 struct sigmatel_spec *spec;
8259980e 3926 int err;
f3302a59
MP		 3927
3928 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3929 if (spec == NULL)
3930 return -ENOMEM;
3931
3932 codec->spec = spec;
a4eed138 3933 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3934 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3935 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3936 stac9205_models,
3937 stac9205_cfg_tbl);
9e507abd 3938 again:
11b44bbd
RF		 3939 if (spec->board_config < 0) {
3940 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3941 err = stac92xx_save_bios_config_regs(codec);
3942 if (err < 0) {
3943 stac92xx_free(codec);
3944 return err;
3945 }
3946 spec->pin_configs = spec->bios_pin_configs;
3947 } else {
f3302a59
MP		 3948 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3949 stac92xx_set_config_regs(codec);
3950 }
3951
3952 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3953 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3954 spec->mux_nids = stac9205_mux_nids;
2549413e 3955 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3956 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3957 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3958 spec->dmux_nids = stac9205_dmux_nids;
1697055e 3959 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 3960 spec->num_pwrs = 0;
f3302a59
MP		 3961
3962 spec->init = stac9205_core_init;
3963 spec->mixer = stac9205_mixer;
3964
e1f0d669
MR		 3965 spec->aloopback_mask = 0x40;
3966 spec->aloopback_shift = 0;
f3302a59 3967 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3968
ae0a8ed8 3969 switch (spec->board_config){
ae0a8ed8 3970 case STAC_9205_DELL_M43:
87d48363
MR		 3971 /* Enable SPDIF in/out */
3972 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3973 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3974
4fe5195c
MR		 3975 /* Enable unsol response for GPIO4/Dock HP connection */
3976 snd_hda_codec_write(codec, codec->afg, 0,
3977 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3978 snd_hda_codec_write_cache(codec, codec->afg, 0,
3979 AC_VERB_SET_UNSOLICITED_ENABLE,
3980 (AC_USRSP_EN | STAC_HP_EVENT));
3981
3982 spec->gpio_dir = 0x0b;
0fc9dec4 3983 spec->eapd_mask = 0x01;
4fe5195c
MR		 3984 spec->gpio_mask = 0x1b;
3985 spec->gpio_mute = 0x10;
e2e7d624 3986 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 3987 * GPIO3 Low = DRM
87d48363 3988 */
4fe5195c 3989 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3990 break;
3991 default:
3992 /* GPIO0 High = EAPD */
0fc9dec4 3993 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 3994 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3995 break;
3996 }
33382403 3997
f3302a59 3998 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 3999 if (!err) {
4000 if (spec->board_config < 0) {
4001 printk(KERN_WARNING "hda_codec: No auto-config is "
4002 "available, default to model=ref\n");
4003 spec->board_config = STAC_9205_REF;
4004 goto again;
4005 }
4006 err = -EINVAL;
4007 }
f3302a59
MP		 4008 if (err < 0) {
4009 stac92xx_free(codec);
4010 return err;
4011 }
4012
4013 codec->patch_ops = stac92xx_patch_ops;
4014
4015 return 0;
4016}
4017
db064e50 4018/*
6d859065 4019 * STAC9872 hack
db064e50
TI		 4020 */
4021
99ccc560 4022/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 4023static hda_nid_t vaio_dacs[] = { 0x2 };
4024#define VAIO_HP_DAC 0x5
4025static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
4026static hda_nid_t vaio_mux_nids[] = { 0x15 };
4027
4028static struct hda_input_mux vaio_mux = {
a3a2f429 4029 .num_items = 3,
db064e50 4030 .items = {
d773781c 4031 /* { "HP", 0x0 }, */
1624cb9a
TI		 4032 { "Mic Jack", 0x1 },
4033 { "Internal Mic", 0x2 },
db064e50
TI		 4034 { "PCM", 0x3 },
4035 }
4036};
4037
4038static struct hda_verb vaio_init[] = {
4039 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 4040 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 4041 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4042 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4043 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4044 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4045 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 4046 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4047 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4048 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4049 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4050 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4051 {}
4052};
4053
6d859065
GM		 4054static struct hda_verb vaio_ar_init[] = {
4055 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
4056 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4057 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4058 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4059/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
4060 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4061 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4062 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4063 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4064/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
4065 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4066 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4067 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4068 {}
4069};
4070
db064e50 4071/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4072static struct hda_bind_ctls vaio_bind_master_vol = {
4073 .ops = &snd_hda_bind_vol,
4074 .values = {
4075 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4076 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4077 0
4078 },
4079};
db064e50
TI		 4080
4081/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4082static struct hda_bind_ctls vaio_bind_master_sw = {
4083 .ops = &snd_hda_bind_sw,
4084 .values = {
4085 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4086 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4087 0,
4088 },
4089};
db064e50
TI		 4090
4091static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 4092 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4093 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 4094 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4095 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4096 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4097 {
4098 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4099 .name = "Capture Source",
4100 .count = 1,
4101 .info = stac92xx_mux_enum_info,
4102 .get = stac92xx_mux_enum_get,
4103 .put = stac92xx_mux_enum_put,
4104 },
4105 {}
4106};
4107
6d859065 4108static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 4109 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4110 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 4111 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4112 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4113 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4114 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
4115 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
4116 {
4117 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4118 .name = "Capture Source",
4119 .count = 1,
4120 .info = stac92xx_mux_enum_info,
4121 .get = stac92xx_mux_enum_get,
4122 .put = stac92xx_mux_enum_put,
4123 },
4124 {}
4125};
4126
4127static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4128 .build_controls = stac92xx_build_controls,
4129 .build_pcms = stac92xx_build_pcms,
4130 .init = stac92xx_init,
4131 .free = stac92xx_free,
cb53c626 4132#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4133 .resume = stac92xx_resume,
4134#endif
4135};
4136
72e7b0dd
TI		 4137static int stac9872_vaio_init(struct hda_codec *codec)
4138{
4139 int err;
4140
4141 err = stac92xx_init(codec);
4142 if (err < 0)
4143 return err;
4144 if (codec->patch_ops.unsol_event)
4145 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4146 return 0;
4147}
4148
4149static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4150{
40c1d308 4151 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4152 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4153 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4154 } else {
4155 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4156 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4157 }
4158}
4159
4160static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4161{
4162 switch (res >> 26) {
4163 case STAC_HP_EVENT:
4164 stac9872_vaio_hp_detect(codec, res);
4165 break;
4166 }
4167}
4168
4169static struct hda_codec_ops stac9872_vaio_patch_ops = {
4170 .build_controls = stac92xx_build_controls,
4171 .build_pcms = stac92xx_build_pcms,
4172 .init = stac9872_vaio_init,
4173 .free = stac92xx_free,
4174 .unsol_event = stac9872_vaio_unsol_event,
4175#ifdef CONFIG_PM
4176 .resume = stac92xx_resume,
4177#endif
4178};
4179
6d859065
GM		 4180enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4181 CXD9872RD_VAIO,
4182 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
4183 STAC9872AK_VAIO,
4184 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
4185 STAC9872K_VAIO,
4186 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 4187 CXD9872AKD_VAIO,
4188 STAC_9872_MODELS,
4189};
4190
4191static const char *stac9872_models[STAC_9872_MODELS] = {
4192 [CXD9872RD_VAIO] = "vaio",
4193 [CXD9872AKD_VAIO] = "vaio-ar",
4194};
4195
4196static struct snd_pci_quirk stac9872_cfg_tbl[] = {
4197 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
4198 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
4199 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 4200 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 4201 {}
4202};
4203
6d859065 4204static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4205{
4206 struct sigmatel_spec *spec;
4207 int board_config;
4208
f5fcc13c
TI		 4209 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
4210 stac9872_models,
4211 stac9872_cfg_tbl);
db064e50
TI		 4212 if (board_config < 0)
4213 /* unknown config, let generic-parser do its job... */
4214 return snd_hda_parse_generic_codec(codec);
4215
4216 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4217 if (spec == NULL)
4218 return -ENOMEM;
4219
4220 codec->spec = spec;
4221 switch (board_config) {
6d859065
GM		 4222 case CXD9872RD_VAIO:
4223 case STAC9872AK_VAIO:
4224 case STAC9872K_VAIO:
db064e50
TI		 4225 spec->mixer = vaio_mixer;
4226 spec->init = vaio_init;
4227 spec->multiout.max_channels = 2;
4228 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4229 spec->multiout.dac_nids = vaio_dacs;
4230 spec->multiout.hp_nid = VAIO_HP_DAC;
4231 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
4232 spec->adc_nids = vaio_adcs;
a64135a2 4233 spec->num_pwrs = 0;
db064e50
TI		 4234 spec->input_mux = &vaio_mux;
4235 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4236 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 4237 break;
6d859065
GM		 4238
4239 case CXD9872AKD_VAIO:
4240 spec->mixer = vaio_ar_mixer;
4241 spec->init = vaio_ar_init;
4242 spec->multiout.max_channels = 2;
4243 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4244 spec->multiout.dac_nids = vaio_dacs;
4245 spec->multiout.hp_nid = VAIO_HP_DAC;
4246 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 4247 spec->num_pwrs = 0;
6d859065
GM		 4248 spec->adc_nids = vaio_adcs;
4249 spec->input_mux = &vaio_mux;
4250 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4251 codec->patch_ops = stac9872_patch_ops;
6d859065 4252 break;
db064e50
TI		 4253 }
4254
db064e50
TI		 4255 return 0;
4256}
4257
4258
2f2f4251
M		 4259/*
4260 * patch entries
4261 */
4262struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4263 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4264 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4265 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4266 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4267 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4268 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4269 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4270 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4271 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4272 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4273 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4274 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4275 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4276 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4277 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4278 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4279 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4280 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4281 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4282 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4283 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4284 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4285 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4286 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4287 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4288 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4289 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4290 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4291 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 4292 /* The following does not take into account .id=0x83847661 when subsys =
4293 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4294 * currently not fully supported.
4295 */
4296 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4297 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4298 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 4299 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4300 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4301 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4302 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4303 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4304 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4305 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4306 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
541eee87
MR		 4307 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4308 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4309 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 4310 { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
4311 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4312 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4313 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4314 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4315 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4316 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4317 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4318 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 4319 {} /* terminator */
4320};
Clone of davem's net-next-2.6 tree