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[ALSA] hda: Added mono_out_pin to autoconfig
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
35
4e55096e 36#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 37#define STAC_PWR_EVENT 0x20
38#define STAC_HP_EVENT 0x30
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
dfe495d0
TI		 42 STAC_9200_DELL_D21,
43 STAC_9200_DELL_D22,
44 STAC_9200_DELL_D23,
45 STAC_9200_DELL_M21,
46 STAC_9200_DELL_M22,
47 STAC_9200_DELL_M23,
48 STAC_9200_DELL_M24,
49 STAC_9200_DELL_M25,
50 STAC_9200_DELL_M26,
51 STAC_9200_DELL_M27,
1194b5b7 52 STAC_9200_GATEWAY,
f5fcc13c
TI		 53 STAC_9200_MODELS
54};
55
56enum {
57 STAC_9205_REF,
dfe495d0 58 STAC_9205_DELL_M42,
ae0a8ed8
TD		 59 STAC_9205_DELL_M43,
60 STAC_9205_DELL_M44,
f5fcc13c
TI		 61 STAC_9205_MODELS
62};
63
e1f0d669
MR		 64enum {
65 STAC_92HD73XX_REF,
66 STAC_92HD73XX_MODELS
67};
68
e035b841
MR		 69enum {
70 STAC_92HD71BXX_REF,
71 STAC_92HD71BXX_MODELS
72};
73
8e21c34c
TD		 74enum {
75 STAC_925x_REF,
76 STAC_M2_2,
77 STAC_MA6,
2c11f955 78 STAC_PA6,
8e21c34c
TD		 79 STAC_925x_MODELS
80};
81
f5fcc13c
TI		 82enum {
83 STAC_D945_REF,
84 STAC_D945GTP3,
85 STAC_D945GTP5,
5d5d3bc3
IZ		 86 STAC_INTEL_MAC_V1,
87 STAC_INTEL_MAC_V2,
88 STAC_INTEL_MAC_V3,
89 STAC_INTEL_MAC_V4,
90 STAC_INTEL_MAC_V5,
dfe495d0 91 /* for backward compatibility */
f5fcc13c 92 STAC_MACMINI,
3fc24d85 93 STAC_MACBOOK,
6f0778d8
NB		 94 STAC_MACBOOK_PRO_V1,
95 STAC_MACBOOK_PRO_V2,
f16928fb 96 STAC_IMAC_INTEL,
0dae0f83 97 STAC_IMAC_INTEL_20,
dfe495d0
TI		 98 STAC_922X_DELL_D81,
99 STAC_922X_DELL_D82,
100 STAC_922X_DELL_M81,
101 STAC_922X_DELL_M82,
f5fcc13c
TI		 102 STAC_922X_MODELS
103};
104
105enum {
106 STAC_D965_REF,
107 STAC_D965_3ST,
108 STAC_D965_5ST,
4ff076e5 109 STAC_DELL_3ST,
8e9068b1 110 STAC_DELL_BIOS,
f5fcc13c
TI		 111 STAC_927X_MODELS
112};
403d1944 113
2f2f4251 114struct sigmatel_spec {
c8b6bf9b 115 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 116 unsigned int num_mixers;
117
403d1944 118 int board_config;
c7d4b2fa 119 unsigned int surr_switch: 1;
403d1944
MP		 120 unsigned int line_switch: 1;
121 unsigned int mic_switch: 1;
3cc08dc6 122 unsigned int alt_switch: 1;
82bc955f 123 unsigned int hp_detect: 1;
c7d4b2fa 124
8259980e 125 unsigned int gpio_mask, gpio_data;
e1f0d669
MR		 126 unsigned char aloopback_mask;
127 unsigned char aloopback_shift;
8259980e 128
a64135a2
MR		 129 /* power management */
130 unsigned int num_pwrs;
131 hda_nid_t *pwr_nids;
132
2f2f4251 133 /* playback */
b22b4821
MR		 134 struct hda_input_mux *mono_mux;
135 unsigned int cur_mmux;
2f2f4251 136 struct hda_multi_out multiout;
3cc08dc6 137 hda_nid_t dac_nids[5];
2f2f4251
M		 138
139 /* capture */
140 hda_nid_t *adc_nids;
2f2f4251 141 unsigned int num_adcs;
dabbed6f
M		 142 hda_nid_t *mux_nids;
143 unsigned int num_muxes;
8b65727b
MP		 144 hda_nid_t *dmic_nids;
145 unsigned int num_dmics;
e1f0d669 146 hda_nid_t *dmux_nids;
1697055e 147 unsigned int num_dmuxes;
dabbed6f 148 hda_nid_t dig_in_nid;
b22b4821 149 hda_nid_t mono_nid;
2f2f4251 150
2f2f4251
M		 151 /* pin widgets */
152 hda_nid_t *pin_nids;
153 unsigned int num_pins;
2f2f4251 154 unsigned int *pin_configs;
11b44bbd 155 unsigned int *bios_pin_configs;
2f2f4251
M		 156
157 /* codec specific stuff */
158 struct hda_verb *init;
c8b6bf9b 159 struct snd_kcontrol_new *mixer;
2f2f4251
M		 160
161 /* capture source */
8b65727b 162 struct hda_input_mux *dinput_mux;
e1f0d669 163 unsigned int cur_dmux[2];
c7d4b2fa 164 struct hda_input_mux *input_mux;
3cc08dc6 165 unsigned int cur_mux[3];
2f2f4251 166
403d1944
MP		 167 /* i/o switches */
168 unsigned int io_switch[2];
0fb87bb4 169 unsigned int clfe_swap;
5f10c4a9 170 unsigned int aloopback;
2f2f4251 171
c7d4b2fa
M		 172 struct hda_pcm pcm_rec[2]; /* PCM information */
173
174 /* dynamic controls and input_mux */
175 struct auto_pin_cfg autocfg;
176 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 177 struct snd_kcontrol_new *kctl_alloc;
8b65727b 178 struct hda_input_mux private_dimux;
c7d4b2fa 179 struct hda_input_mux private_imux;
b22b4821 180 struct hda_input_mux private_mono_mux;
2134ea4f
TI		 181
182 /* virtual master */
183 unsigned int vmaster_tlv[4];
2f2f4251
M		 184};
185
186static hda_nid_t stac9200_adc_nids[1] = {
187 0x03,
188};
189
190static hda_nid_t stac9200_mux_nids[1] = {
191 0x0c,
192};
193
194static hda_nid_t stac9200_dac_nids[1] = {
195 0x02,
196};
197
a64135a2
MR		 198static hda_nid_t stac92hd73xx_pwr_nids[8] = {
199 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
200 0x0f, 0x10, 0x11
201};
202
e1f0d669
MR		 203static hda_nid_t stac92hd73xx_adc_nids[2] = {
204 0x1a, 0x1b
205};
206
207#define STAC92HD73XX_NUM_DMICS 2
208static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
209 0x13, 0x14, 0
210};
211
212#define STAC92HD73_DAC_COUNT 5
213static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
214 0x15, 0x16, 0x17, 0x18, 0x19,
215};
216
217static hda_nid_t stac92hd73xx_mux_nids[4] = {
218 0x28, 0x29, 0x2a, 0x2b,
219};
220
221static hda_nid_t stac92hd73xx_dmux_nids[2] = {
222 0x20, 0x21,
223};
224
a64135a2
MR		 225static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
226 0x0a, 0x0d, 0x0f
227};
228
e035b841
MR		 229static hda_nid_t stac92hd71bxx_adc_nids[2] = {
230 0x12, 0x13,
231};
232
233static hda_nid_t stac92hd71bxx_mux_nids[2] = {
234 0x1a, 0x1b
235};
236
e1f0d669
MR		 237static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
238 0x1c,
239};
240
e035b841
MR		 241static hda_nid_t stac92hd71bxx_dac_nids[2] = {
242 0x10, /*0x11, */
243};
244
245#define STAC92HD71BXX_NUM_DMICS 2
246static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
247 0x18, 0x19, 0
248};
249
8e21c34c
TD		 250static hda_nid_t stac925x_adc_nids[1] = {
251 0x03,
252};
253
254static hda_nid_t stac925x_mux_nids[1] = {
255 0x0f,
256};
257
258static hda_nid_t stac925x_dac_nids[1] = {
259 0x02,
260};
261
f6e9852a
TI		 262#define STAC925X_NUM_DMICS 1
263static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
264 0x15, 0
2c11f955
TD		 265};
266
1697055e
TI		 267static hda_nid_t stac925x_dmux_nids[1] = {
268 0x14,
269};
270
2f2f4251
M		 271static hda_nid_t stac922x_adc_nids[2] = {
272 0x06, 0x07,
273};
274
275static hda_nid_t stac922x_mux_nids[2] = {
276 0x12, 0x13,
277};
278
3cc08dc6
MP		 279static hda_nid_t stac927x_adc_nids[3] = {
280 0x07, 0x08, 0x09
281};
282
283static hda_nid_t stac927x_mux_nids[3] = {
284 0x15, 0x16, 0x17
285};
286
e1f0d669
MR		 287static hda_nid_t stac927x_dmux_nids[1] = {
288 0x1b,
289};
290
7f16859a
MR		 291#define STAC927X_NUM_DMICS 2
292static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
293 0x13, 0x14, 0
294};
295
f3302a59
MP		 296static hda_nid_t stac9205_adc_nids[2] = {
297 0x12, 0x13
298};
299
300static hda_nid_t stac9205_mux_nids[2] = {
301 0x19, 0x1a
302};
303
e1f0d669 304static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 305 0x1d,
e1f0d669
MR		 306};
307
f6e9852a
TI		 308#define STAC9205_NUM_DMICS 2
309static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
310 0x17, 0x18, 0
8b65727b
MP		 311};
312
c7d4b2fa 313static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 314 0x08, 0x09, 0x0d, 0x0e,
315 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 316};
317
8e21c34c
TD		 318static hda_nid_t stac925x_pin_nids[8] = {
319 0x07, 0x08, 0x0a, 0x0b,
320 0x0c, 0x0d, 0x10, 0x11,
321};
322
2f2f4251
M		 323static hda_nid_t stac922x_pin_nids[10] = {
324 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
325 0x0f, 0x10, 0x11, 0x15, 0x1b,
326};
327
e1f0d669
MR		 328static hda_nid_t stac92hd73xx_pin_nids[12] = {
329 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
330 0x0f, 0x10, 0x11, 0x12, 0x13,
331 0x14, 0x22
332};
333
e035b841
MR		 334static hda_nid_t stac92hd71bxx_pin_nids[10] = {
335 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
336 0x0f, 0x14, 0x18, 0x19, 0x1e,
337};
338
3cc08dc6
MP		 339static hda_nid_t stac927x_pin_nids[14] = {
340 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
341 0x0f, 0x10, 0x11, 0x12, 0x13,
342 0x14, 0x21, 0x22, 0x23,
343};
344
f3302a59
MP		 345static hda_nid_t stac9205_pin_nids[12] = {
346 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
347 0x0f, 0x14, 0x16, 0x17, 0x18,
348 0x21, 0x22,
f3302a59
MP		 349};
350
8b65727b
MP		 351static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
352 struct snd_ctl_elem_info *uinfo)
353{
354 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
355 struct sigmatel_spec *spec = codec->spec;
356 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
357}
358
359static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
360 struct snd_ctl_elem_value *ucontrol)
361{
362 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
363 struct sigmatel_spec *spec = codec->spec;
e1f0d669 364 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 365
e1f0d669 366 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 367 return 0;
368}
369
370static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
371 struct snd_ctl_elem_value *ucontrol)
372{
373 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
374 struct sigmatel_spec *spec = codec->spec;
e1f0d669 375 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 376
377 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 378 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 379}
380
c8b6bf9b 381static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 382{
383 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
384 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 385 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 386}
387
c8b6bf9b 388static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 389{
390 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
391 struct sigmatel_spec *spec = codec->spec;
392 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
393
394 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
395 return 0;
396}
397
c8b6bf9b 398static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 399{
400 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
401 struct sigmatel_spec *spec = codec->spec;
402 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
403
c7d4b2fa 404 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 405 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
406}
407
b22b4821
MR		 408static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
409 struct snd_ctl_elem_info *uinfo)
410{
411 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
412 struct sigmatel_spec *spec = codec->spec;
413 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
414}
415
416static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
417 struct snd_ctl_elem_value *ucontrol)
418{
419 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
420 struct sigmatel_spec *spec = codec->spec;
421
422 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
423 return 0;
424}
425
426static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
427 struct snd_ctl_elem_value *ucontrol)
428{
429 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
430 struct sigmatel_spec *spec = codec->spec;
431
432 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
433 spec->mono_nid, &spec->cur_mmux);
434}
435
5f10c4a9
ML		 436#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
437
438static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
439 struct snd_ctl_elem_value *ucontrol)
440{
441 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 442 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 443 struct sigmatel_spec *spec = codec->spec;
444
e1f0d669
MR		 445 ucontrol->value.integer.value[0] = !!(spec->aloopback &
446 (spec->aloopback_mask << idx));
5f10c4a9
ML		 447 return 0;
448}
449
450static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
451 struct snd_ctl_elem_value *ucontrol)
452{
453 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
454 struct sigmatel_spec *spec = codec->spec;
e1f0d669 455 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 456 unsigned int dac_mode;
e1f0d669 457 unsigned int val, idx_val;
5f10c4a9 458
e1f0d669
MR		 459 idx_val = spec->aloopback_mask << idx;
460 if (ucontrol->value.integer.value[0])
461 val = spec->aloopback | idx_val;
462 else
463 val = spec->aloopback & ~idx_val;
68ea7b2f 464 if (spec->aloopback == val)
5f10c4a9
ML		 465 return 0;
466
68ea7b2f 467 spec->aloopback = val;
5f10c4a9 468
e1f0d669
MR		 469 /* Only return the bits defined by the shift value of the
470 * first two bytes of the mask
471 */
5f10c4a9 472 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 473 kcontrol->private_value & 0xFFFF, 0x0);
474 dac_mode >>= spec->aloopback_shift;
5f10c4a9 475
e1f0d669 476 if (spec->aloopback & idx_val) {
5f10c4a9 477 snd_hda_power_up(codec);
e1f0d669 478 dac_mode |= idx_val;
5f10c4a9
ML		 479 } else {
480 snd_hda_power_down(codec);
e1f0d669 481 dac_mode &= ~idx_val;
5f10c4a9
ML		 482 }
483
484 snd_hda_codec_write_cache(codec, codec->afg, 0,
485 kcontrol->private_value >> 16, dac_mode);
486
487 return 1;
488}
489
c7d4b2fa 490static struct hda_verb stac9200_core_init[] = {
2f2f4251 491 /* set dac0mux for dac converter */
c7d4b2fa 492 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 493 {}
494};
495
1194b5b7
TI		 496static struct hda_verb stac9200_eapd_init[] = {
497 /* set dac0mux for dac converter */
498 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
499 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
500 {}
501};
502
e1f0d669
MR		 503static struct hda_verb stac92hd73xx_6ch_core_init[] = {
504 /* set master volume and direct control */
505 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
506 /* setup audio connections */
507 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
508 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
509 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
510 /* setup adcs to point to mixer */
511 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
512 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 513 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
514 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
515 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
516 /* setup import muxs */
517 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
518 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
519 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
520 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
521 {}
522};
523
524static struct hda_verb stac92hd73xx_8ch_core_init[] = {
525 /* set master volume and direct control */
526 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
527 /* setup audio connections */
528 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
529 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
530 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
531 /* connect hp ports to dac3 */
532 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
533 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
534 /* setup adcs to point to mixer */
535 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
536 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 537 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
538 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
539 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
540 /* setup import muxs */
541 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
542 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
543 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
544 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
545 {}
546};
547
548static struct hda_verb stac92hd73xx_10ch_core_init[] = {
549 /* set master volume and direct control */
550 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
551 /* setup audio connections */
552 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
553 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
554 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
555 /* dac3 is connected to import3 mux */
556 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
557 /* connect hp ports to dac4 */
558 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
559 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
560 /* setup adcs to point to mixer */
561 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
562 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 563 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
564 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
565 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
566 /* setup import muxs */
567 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
568 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
569 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
570 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
571 {}
572};
573
e035b841 574static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 575 /* set master volume and direct control */
576 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
577 /* connect headphone jack to dac1 */
578 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
579 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
580 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
581 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
582 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
583 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 584};
585
586static struct hda_verb stac92hd71bxx_analog_core_init[] = {
e035b841
MR		 587 /* set master volume and direct control */
588 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
589 /* connect headphone jack to dac1 */
590 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
9b35947f
MR		 591 /* connect ports 0d and 0f to audio mixer */
592 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
593 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
a64135a2 594 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
9b35947f
MR		 595 /* unmute dac0 input in audio mixer */
596 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
e035b841
MR		 597 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
598 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
599 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
600 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 601 {}
602};
603
8e21c34c
TD		 604static struct hda_verb stac925x_core_init[] = {
605 /* set dac0mux for dac converter */
606 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
607 {}
608};
609
c7d4b2fa 610static struct hda_verb stac922x_core_init[] = {
2f2f4251 611 /* set master volume and direct control */
c7d4b2fa 612 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 613 {}
614};
615
93ed1503 616static struct hda_verb d965_core_init[] = {
19039bd0 617 /* set master volume and direct control */
93ed1503 618 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 619 /* unmute node 0x1b */
620 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
621 /* select node 0x03 as DAC */
622 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
623 {}
624};
625
3cc08dc6
MP		 626static struct hda_verb stac927x_core_init[] = {
627 /* set master volume and direct control */
628 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
629 {}
630};
631
f3302a59
MP		 632static struct hda_verb stac9205_core_init[] = {
633 /* set master volume and direct control */
634 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
635 {}
636};
637
b22b4821
MR		 638#define STAC_MONO_MUX \
639 { \
640 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
641 .name = "Mono Mux", \
642 .count = 1, \
643 .info = stac92xx_mono_mux_enum_info, \
644 .get = stac92xx_mono_mux_enum_get, \
645 .put = stac92xx_mono_mux_enum_put, \
646 }
647
9e05b7a3 648#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 649 { \
650 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
651 .name = "Input Source", \
9e05b7a3 652 .count = cnt, \
ca7c5a8b
ML		 653 .info = stac92xx_mux_enum_info, \
654 .get = stac92xx_mux_enum_get, \
655 .put = stac92xx_mux_enum_put, \
656 }
657
e1f0d669 658#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 659 { \
660 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
661 .name = "Analog Loopback", \
e1f0d669 662 .count = cnt, \
5f10c4a9
ML		 663 .info = stac92xx_aloopback_info, \
664 .get = stac92xx_aloopback_get, \
665 .put = stac92xx_aloopback_put, \
666 .private_value = verb_read | (verb_write << 16), \
667 }
668
c8b6bf9b 669static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 670 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
671 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 672 STAC_INPUT_SOURCE(1),
2f2f4251
M		 673 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
674 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 675 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 676 { } /* end */
677};
678
e1f0d669 679static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 680 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
681
e1f0d669
MR		 682 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
683 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
684
685 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
686 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
687
688 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
689 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
690
691 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
692 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
693
694 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
695 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
696
697 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
698 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
699
700 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
701 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
702 { } /* end */
703};
704
705static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 706 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
707
e1f0d669
MR		 708 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
709 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
710
711 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
712 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
713
714 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
715 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
716
717 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
718 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
719
720 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
721 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
722
723 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
724 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
725
726 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
727 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
728 { } /* end */
729};
730
731static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 732 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
733
e1f0d669
MR		 734 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
735 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
736
737 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
738 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
739
740 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
741 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
742
743 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
744 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
745
746 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
747 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
748
749 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
750 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
751
752 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
753 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
754 { } /* end */
755};
756
541eee87 757static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 758 STAC_INPUT_SOURCE(2),
b22b4821 759 STAC_MONO_MUX,
e035b841 760
9b35947f
MR		 761 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
762 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
763 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
764
765 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
766 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
767 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 768
9b35947f
MR		 769 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
770 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
a780c0ae
MR		 771
772 HDA_CODEC_MUTE_MONO("Mono Playback Switch", 0x14, 0x1, 0, HDA_INPUT),
e035b841
MR		 773 { } /* end */
774};
775
541eee87 776static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 777 STAC_INPUT_SOURCE(2),
778 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
b22b4821 779 STAC_MONO_MUX,
541eee87 780
541eee87
MR		 781 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
782 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
783 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
784
785 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
786 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
787 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
a780c0ae
MR		 788
789 HDA_CODEC_MUTE_MONO("Mono Playback Switch", 0x14, 0x1, 0, HDA_INPUT),
541eee87
MR		 790 { } /* end */
791};
792
8e21c34c 793static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 794 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 795 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
796 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
797 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
798 { } /* end */
799};
800
9e05b7a3 801static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 802 STAC_INPUT_SOURCE(2),
e1f0d669 803 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 804
805 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
806 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
807 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
808
809 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
810 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
811 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
812
2f2f4251
M		 813 { } /* end */
814};
815
19039bd0 816/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 817static struct snd_kcontrol_new stac922x_mixer[] = {
818 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 819 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
820 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
821 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
822
823 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
824 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
825 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 826 { } /* end */
827};
828
9e05b7a3 829
d1d985f0 830static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 831 STAC_INPUT_SOURCE(3),
e1f0d669 832 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 833
9e05b7a3
ML		 834 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
835 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
836 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
837
838 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
839 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
840 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
841
842 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
843 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
844 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 845 { } /* end */
846};
847
1697055e
TI		 848static struct snd_kcontrol_new stac_dmux_mixer = {
849 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
850 .name = "Digital Input Source",
851 /* count set later */
852 .info = stac92xx_dmux_enum_info,
853 .get = stac92xx_dmux_enum_get,
854 .put = stac92xx_dmux_enum_put,
855};
856
2134ea4f
TI		 857static const char *slave_vols[] = {
858 "Front Playback Volume",
859 "Surround Playback Volume",
860 "Center Playback Volume",
861 "LFE Playback Volume",
862 "Side Playback Volume",
863 "Headphone Playback Volume",
864 "Headphone Playback Volume",
865 "Speaker Playback Volume",
866 "External Speaker Playback Volume",
867 "Speaker2 Playback Volume",
868 NULL
869};
870
871static const char *slave_sws[] = {
872 "Front Playback Switch",
873 "Surround Playback Switch",
874 "Center Playback Switch",
875 "LFE Playback Switch",
876 "Side Playback Switch",
877 "Headphone Playback Switch",
878 "Headphone Playback Switch",
879 "Speaker Playback Switch",
880 "External Speaker Playback Switch",
881 "Speaker2 Playback Switch",
882 NULL
883};
884
2f2f4251
M		 885static int stac92xx_build_controls(struct hda_codec *codec)
886{
887 struct sigmatel_spec *spec = codec->spec;
888 int err;
c7d4b2fa 889 int i;
2f2f4251
M		 890
891 err = snd_hda_add_new_ctls(codec, spec->mixer);
892 if (err < 0)
893 return err;
c7d4b2fa
M		 894
895 for (i = 0; i < spec->num_mixers; i++) {
896 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
897 if (err < 0)
898 return err;
899 }
1697055e
TI		 900 if (spec->num_dmuxes > 0) {
901 stac_dmux_mixer.count = spec->num_dmuxes;
902 err = snd_ctl_add(codec->bus->card,
903 snd_ctl_new1(&stac_dmux_mixer, codec));
904 if (err < 0)
905 return err;
906 }
c7d4b2fa 907
dabbed6f
M		 908 if (spec->multiout.dig_out_nid) {
909 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
910 if (err < 0)
911 return err;
912 }
913 if (spec->dig_in_nid) {
914 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
915 if (err < 0)
916 return err;
917 }
2134ea4f
TI		 918
919 /* if we have no master control, let's create it */
920 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
921 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
922 HDA_OUTPUT, spec->vmaster_tlv);
923 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
924 spec->vmaster_tlv, slave_vols);
925 if (err < 0)
926 return err;
927 }
928 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
929 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
930 NULL, slave_sws);
931 if (err < 0)
932 return err;
933 }
934
dabbed6f 935 return 0;
2f2f4251
M		 936}
937
403d1944 938static unsigned int ref9200_pin_configs[8] = {
dabbed6f 939 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 940 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
941};
942
dfe495d0
TI		 943/*
944 STAC 9200 pin configs for
945 102801A8
946 102801DE
947 102801E8
948*/
949static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 950 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
951 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 952};
953
954/*
955 STAC 9200 pin configs for
956 102801C0
957 102801C1
958*/
959static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 960 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
961 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 962};
963
964/*
965 STAC 9200 pin configs for
966 102801C4 (Dell Dimension E310)
967 102801C5
968 102801C7
969 102801D9
970 102801DA
971 102801E3
972*/
973static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 974 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
975 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 976};
977
978
979/*
980 STAC 9200-32 pin configs for
981 102801B5 (Dell Inspiron 630m)
982 102801D8 (Dell Inspiron 640m)
983*/
984static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 985 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
986 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 987};
988
989/*
990 STAC 9200-32 pin configs for
991 102801C2 (Dell Latitude D620)
992 102801C8
993 102801CC (Dell Latitude D820)
994 102801D4
995 102801D6
996*/
997static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 998 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
999 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1000};
1001
1002/*
1003 STAC 9200-32 pin configs for
1004 102801CE (Dell XPS M1710)
1005 102801CF (Dell Precision M90)
1006*/
1007static unsigned int dell9200_m23_pin_configs[8] = {
1008 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1009 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1010};
1011
1012/*
1013 STAC 9200-32 pin configs for
1014 102801C9
1015 102801CA
1016 102801CB (Dell Latitude 120L)
1017 102801D3
1018*/
1019static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1020 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1021 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1022};
1023
1024/*
1025 STAC 9200-32 pin configs for
1026 102801BD (Dell Inspiron E1505n)
1027 102801EE
1028 102801EF
1029*/
1030static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1031 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1032 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1033};
1034
1035/*
1036 STAC 9200-32 pin configs for
1037 102801F5 (Dell Inspiron 1501)
1038 102801F6
1039*/
1040static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1041 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1042 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1043};
1044
1045/*
1046 STAC 9200-32
1047 102801CD (Dell Inspiron E1705/9400)
1048*/
1049static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1050 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1051 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1052};
1053
1054
f5fcc13c
TI		 1055static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1056 [STAC_REF] = ref9200_pin_configs,
dfe495d0
TI		 1057 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1058 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1059 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1060 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1061 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1062 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1063 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1064 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1065 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1066 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 1067};
1068
f5fcc13c
TI		 1069static const char *stac9200_models[STAC_9200_MODELS] = {
1070 [STAC_REF] = "ref",
dfe495d0
TI		 1071 [STAC_9200_DELL_D21] = "dell-d21",
1072 [STAC_9200_DELL_D22] = "dell-d22",
1073 [STAC_9200_DELL_D23] = "dell-d23",
1074 [STAC_9200_DELL_M21] = "dell-m21",
1075 [STAC_9200_DELL_M22] = "dell-m22",
1076 [STAC_9200_DELL_M23] = "dell-m23",
1077 [STAC_9200_DELL_M24] = "dell-m24",
1078 [STAC_9200_DELL_M25] = "dell-m25",
1079 [STAC_9200_DELL_M26] = "dell-m26",
1080 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1081 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 1082};
1083
1084static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1085 /* SigmaTel reference board */
1086 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1087 "DFI LanParty", STAC_REF),
e7377071 1088 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1089 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1090 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1091 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1092 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1093 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1094 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1095 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1096 "unknown Dell", STAC_9200_DELL_D22),
1097 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1098 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1099 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1100 "Dell Latitude D620", STAC_9200_DELL_M22),
1101 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1102 "unknown Dell", STAC_9200_DELL_D23),
1103 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1104 "unknown Dell", STAC_9200_DELL_D23),
1105 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1106 "unknown Dell", STAC_9200_DELL_M22),
1107 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1108 "unknown Dell", STAC_9200_DELL_M24),
1109 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1110 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1111 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1112 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1113 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1114 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1115 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1116 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1117 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1118 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1119 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1120 "Dell Precision M90", STAC_9200_DELL_M23),
1121 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1122 "unknown Dell", STAC_9200_DELL_M22),
1123 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1124 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1125 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1126 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1127 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1128 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1129 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1130 "unknown Dell", STAC_9200_DELL_D23),
1131 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1132 "unknown Dell", STAC_9200_DELL_D23),
1133 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1134 "unknown Dell", STAC_9200_DELL_D21),
1135 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1136 "unknown Dell", STAC_9200_DELL_D23),
1137 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1138 "unknown Dell", STAC_9200_DELL_D21),
1139 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1140 "unknown Dell", STAC_9200_DELL_M25),
1141 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1142 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1143 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1144 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1145 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1146 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 1147 /* Panasonic */
1148 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 1149 /* Gateway machines needs EAPD to be set on resume */
1150 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1151 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1152 STAC_9200_GATEWAY),
1153 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1154 STAC_9200_GATEWAY),
403d1944
MP		 1155 {} /* terminator */
1156};
1157
8e21c34c
TD		 1158static unsigned int ref925x_pin_configs[8] = {
1159 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1160 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
1161};
1162
1163static unsigned int stac925x_MA6_pin_configs[8] = {
1164 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1165 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1166};
1167
2c11f955
TD		 1168static unsigned int stac925x_PA6_pin_configs[8] = {
1169 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1170 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1171};
1172
8e21c34c 1173static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1174 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1175 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1176};
1177
1178static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1179 [STAC_REF] = ref925x_pin_configs,
1180 [STAC_M2_2] = stac925xM2_2_pin_configs,
1181 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1182 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1183};
1184
1185static const char *stac925x_models[STAC_925x_MODELS] = {
1186 [STAC_REF] = "ref",
1187 [STAC_M2_2] = "m2-2",
1188 [STAC_MA6] = "m6",
2c11f955 1189 [STAC_PA6] = "pa6",
8e21c34c
TD		 1190};
1191
1192static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1193 /* SigmaTel reference board */
1194 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1195 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1196 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1197 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1198 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1199 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1200 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1201 {} /* terminator */
1202};
1203
e1f0d669
MR		 1204static unsigned int ref92hd73xx_pin_configs[12] = {
1205 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1206 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1207 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
1208};
1209
1210static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
1211 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1212};
1213
1214static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1215 [STAC_92HD73XX_REF] = "ref",
1216};
1217
1218static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1219 /* SigmaTel reference board */
1220 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1221 "DFI LanParty", STAC_92HD73XX_REF),
1222 {} /* terminator */
1223};
1224
e035b841
MR		 1225static unsigned int ref92hd71bxx_pin_configs[10] = {
1226 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1227 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1228 0x90a000f0, 0x01452050,
1229};
1230
1231static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1232 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
1233};
1234
1235static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1236 [STAC_92HD71BXX_REF] = "ref",
1237};
1238
1239static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1240 /* SigmaTel reference board */
1241 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1242 "DFI LanParty", STAC_92HD71BXX_REF),
1243 {} /* terminator */
1244};
1245
403d1944
MP		 1246static unsigned int ref922x_pin_configs[10] = {
1247 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1248 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1249 0x40000100, 0x40000100,
1250};
1251
dfe495d0
TI		 1252/*
1253 STAC 922X pin configs for
1254 102801A7
1255 102801AB
1256 102801A9
1257 102801D1
1258 102801D2
1259*/
1260static unsigned int dell_922x_d81_pin_configs[10] = {
1261 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1262 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1263 0x01813122, 0x400001f2,
1264};
1265
1266/*
1267 STAC 922X pin configs for
1268 102801AC
1269 102801D0
1270*/
1271static unsigned int dell_922x_d82_pin_configs[10] = {
1272 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1273 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1274 0x01813122, 0x400001f1,
1275};
1276
1277/*
1278 STAC 922X pin configs for
1279 102801BF
1280*/
1281static unsigned int dell_922x_m81_pin_configs[10] = {
1282 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1283 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1284 0x40C003f1, 0x405003f0,
1285};
1286
1287/*
1288 STAC 9221 A1 pin configs for
1289 102801D7 (Dell XPS M1210)
1290*/
1291static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1292 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1293 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1294 0x508003f3, 0x405003f4,
1295};
1296
403d1944 1297static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1298 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1299 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1300 0x02a19120, 0x40000100,
1301};
1302
1303static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1304 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1305 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1306 0x02a19320, 0x40000100,
1307};
1308
5d5d3bc3
IZ		 1309static unsigned int intel_mac_v1_pin_configs[10] = {
1310 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1311 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1312 0x400000fc, 0x400000fb,
1313};
1314
1315static unsigned int intel_mac_v2_pin_configs[10] = {
1316 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1317 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1318 0x400000fc, 0x400000fb,
6f0778d8
NB		 1319};
1320
5d5d3bc3
IZ		 1321static unsigned int intel_mac_v3_pin_configs[10] = {
1322 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1323 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1324 0x400000fc, 0x400000fb,
1325};
1326
5d5d3bc3
IZ		 1327static unsigned int intel_mac_v4_pin_configs[10] = {
1328 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1329 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1330 0x400000fc, 0x400000fb,
1331};
1332
5d5d3bc3
IZ		 1333static unsigned int intel_mac_v5_pin_configs[10] = {
1334 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1335 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1336 0x400000fc, 0x400000fb,
0dae0f83
TI		 1337};
1338
76c08828 1339
19039bd0 1340static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1341 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1342 [STAC_D945GTP3] = d945gtp3_pin_configs,
1343 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1344 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1345 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1346 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1347 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1348 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1349 /* for backward compatibility */
5d5d3bc3
IZ		 1350 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1351 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1352 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1353 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1354 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1355 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1356 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1357 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1358 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1359 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1360};
1361
f5fcc13c
TI		 1362static const char *stac922x_models[STAC_922X_MODELS] = {
1363 [STAC_D945_REF] = "ref",
1364 [STAC_D945GTP5] = "5stack",
1365 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1366 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1367 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1368 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1369 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1370 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1371 /* for backward compatibility */
f5fcc13c 1372 [STAC_MACMINI] = "macmini",
3fc24d85 1373 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1374 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1375 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1376 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1377 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1378 [STAC_922X_DELL_D81] = "dell-d81",
1379 [STAC_922X_DELL_D82] = "dell-d82",
1380 [STAC_922X_DELL_M81] = "dell-m81",
1381 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1382};
1383
1384static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1385 /* SigmaTel reference board */
1386 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1387 "DFI LanParty", STAC_D945_REF),
1388 /* Intel 945G based systems */
1389 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1390 "Intel D945G", STAC_D945GTP3),
1391 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1392 "Intel D945G", STAC_D945GTP3),
1393 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1394 "Intel D945G", STAC_D945GTP3),
1395 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1396 "Intel D945G", STAC_D945GTP3),
1397 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1398 "Intel D945G", STAC_D945GTP3),
1399 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1400 "Intel D945G", STAC_D945GTP3),
1401 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1402 "Intel D945G", STAC_D945GTP3),
1403 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1404 "Intel D945G", STAC_D945GTP3),
1405 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1406 "Intel D945G", STAC_D945GTP3),
1407 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1408 "Intel D945G", STAC_D945GTP3),
1409 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1410 "Intel D945G", STAC_D945GTP3),
1411 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1412 "Intel D945G", STAC_D945GTP3),
1413 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1414 "Intel D945G", STAC_D945GTP3),
1415 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1416 "Intel D945G", STAC_D945GTP3),
1417 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1418 "Intel D945G", STAC_D945GTP3),
1419 /* Intel D945G 5-stack systems */
1420 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1421 "Intel D945G", STAC_D945GTP5),
1422 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1423 "Intel D945G", STAC_D945GTP5),
1424 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1425 "Intel D945G", STAC_D945GTP5),
1426 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1427 "Intel D945G", STAC_D945GTP5),
1428 /* Intel 945P based systems */
1429 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1430 "Intel D945P", STAC_D945GTP3),
1431 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1432 "Intel D945P", STAC_D945GTP3),
1433 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1434 "Intel D945P", STAC_D945GTP3),
1435 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1436 "Intel D945P", STAC_D945GTP3),
1437 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1438 "Intel D945P", STAC_D945GTP3),
1439 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1440 "Intel D945P", STAC_D945GTP5),
1441 /* other systems */
1442 /* Apple Mac Mini (early 2006) */
1443 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1444 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1445 /* Dell systems */
1446 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1447 "unknown Dell", STAC_922X_DELL_D81),
1448 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1449 "unknown Dell", STAC_922X_DELL_D81),
1450 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1451 "unknown Dell", STAC_922X_DELL_D81),
1452 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1453 "unknown Dell", STAC_922X_DELL_D82),
1454 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1455 "unknown Dell", STAC_922X_DELL_M81),
1456 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1457 "unknown Dell", STAC_922X_DELL_D82),
1458 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1459 "unknown Dell", STAC_922X_DELL_D81),
1460 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1461 "unknown Dell", STAC_922X_DELL_D81),
1462 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1463 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1464 {} /* terminator */
1465};
1466
3cc08dc6 1467static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1468 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1469 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1470 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1471 0x01c42190, 0x40000100,
3cc08dc6
MP		 1472};
1473
93ed1503 1474static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1475 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1476 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1477 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1478 0x40000100, 0x40000100
1479};
1480
93ed1503
TD		 1481static unsigned int d965_5st_pin_configs[14] = {
1482 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1483 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1484 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1485 0x40000100, 0x40000100
1486};
1487
4ff076e5
TD		 1488static unsigned int dell_3st_pin_configs[14] = {
1489 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1490 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1491 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1492 0x40c003fc, 0x40000100
1493};
1494
93ed1503 1495static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1496 [STAC_D965_REF] = ref927x_pin_configs,
1497 [STAC_D965_3ST] = d965_3st_pin_configs,
1498 [STAC_D965_5ST] = d965_5st_pin_configs,
1499 [STAC_DELL_3ST] = dell_3st_pin_configs,
1500 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1501};
1502
f5fcc13c 1503static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1504 [STAC_D965_REF] = "ref",
1505 [STAC_D965_3ST] = "3stack",
1506 [STAC_D965_5ST] = "5stack",
1507 [STAC_DELL_3ST] = "dell-3stack",
1508 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1509};
1510
1511static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1512 /* SigmaTel reference board */
1513 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1514 "DFI LanParty", STAC_D965_REF),
81d3dbde 1515 /* Intel 946 based systems */
f5fcc13c
TI		 1516 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1517 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1518 /* 965 based 3 stack systems */
f5fcc13c
TI		 1519 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1535 /* Dell 3 stack systems */
8e9068b1 1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1540 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1
MR		 1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1549 /* 965 based 5 stack systems */
f5fcc13c
TI		 1550 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1551 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1552 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1554 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1558 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1559 {} /* terminator */
1560};
1561
f3302a59
MP		 1562static unsigned int ref9205_pin_configs[12] = {
1563 0x40000100, 0x40000100, 0x01016011, 0x01014010,
8b65727b
MP		 1564 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
1565 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1566};
1567
dfe495d0
TI		 1568/*
1569 STAC 9205 pin configs for
1570 102801F1
1571 102801F2
1572 102801FC
1573 102801FD
1574 10280204
1575 1028021F
3fa2ef74 1576 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1577*/
1578static unsigned int dell_9205_m42_pin_configs[12] = {
1579 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1580 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1581 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1582};
1583
1584/*
1585 STAC 9205 pin configs for
1586 102801F9
1587 102801FA
1588 102801FE
1589 102801FF (Dell Precision M4300)
1590 10280206
1591 10280200
1592 10280201
1593*/
1594static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1595 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1596 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1597 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1598};
1599
dfe495d0 1600static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1601 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1602 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1603 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1604};
1605
f5fcc13c 1606static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1607 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1608 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1609 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1610 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1611};
1612
f5fcc13c
TI		 1613static const char *stac9205_models[STAC_9205_MODELS] = {
1614 [STAC_9205_REF] = "ref",
dfe495d0 1615 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1616 [STAC_9205_DELL_M43] = "dell-m43",
1617 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1618};
1619
1620static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1621 /* SigmaTel reference board */
1622 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1623 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1624 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1625 "unknown Dell", STAC_9205_DELL_M42),
1626 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1627 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1628 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1629 "Dell Precision", STAC_9205_DELL_M43),
1630 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1631 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1632 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1633 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1634 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1635 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1636 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1637 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1638 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1639 "unknown Dell", STAC_9205_DELL_M42),
1640 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1641 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1642 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1643 "Dell Precision", STAC_9205_DELL_M43),
1644 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1645 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1646 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1647 "Dell Precision", STAC_9205_DELL_M43),
1648 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1649 "Dell Inspiron", STAC_9205_DELL_M44),
1650 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1651 "Dell Inspiron", STAC_9205_DELL_M44),
1652 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1653 "Dell Inspiron", STAC_9205_DELL_M44),
1654 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1655 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1656 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1657 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1658 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1659 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1660 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1661 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1662 {} /* terminator */
1663};
1664
11b44bbd
RF		 1665static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1666{
1667 int i;
1668 struct sigmatel_spec *spec = codec->spec;
1669
1670 if (! spec->bios_pin_configs) {
1671 spec->bios_pin_configs = kcalloc(spec->num_pins,
1672 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1673 if (! spec->bios_pin_configs)
1674 return -ENOMEM;
1675 }
1676
1677 for (i = 0; i < spec->num_pins; i++) {
1678 hda_nid_t nid = spec->pin_nids[i];
1679 unsigned int pin_cfg;
1680
1681 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1682 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1683 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1684 nid, pin_cfg);
1685 spec->bios_pin_configs[i] = pin_cfg;
1686 }
1687
1688 return 0;
1689}
1690
87d48363
MR		 1691static void stac92xx_set_config_reg(struct hda_codec *codec,
1692 hda_nid_t pin_nid, unsigned int pin_config)
1693{
1694 int i;
1695 snd_hda_codec_write(codec, pin_nid, 0,
1696 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1697 pin_config & 0x000000ff);
1698 snd_hda_codec_write(codec, pin_nid, 0,
1699 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1700 (pin_config & 0x0000ff00) >> 8);
1701 snd_hda_codec_write(codec, pin_nid, 0,
1702 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1703 (pin_config & 0x00ff0000) >> 16);
1704 snd_hda_codec_write(codec, pin_nid, 0,
1705 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1706 pin_config >> 24);
1707 i = snd_hda_codec_read(codec, pin_nid, 0,
1708 AC_VERB_GET_CONFIG_DEFAULT,
1709 0x00);
1710 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1711 pin_nid, i);
1712}
1713
2f2f4251
M		 1714static void stac92xx_set_config_regs(struct hda_codec *codec)
1715{
1716 int i;
1717 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1718
87d48363
MR		 1719 if (!spec->pin_configs)
1720 return;
11b44bbd 1721
87d48363
MR		 1722 for (i = 0; i < spec->num_pins; i++)
1723 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1724 spec->pin_configs[i]);
2f2f4251 1725}
2f2f4251 1726
dabbed6f 1727/*
c7d4b2fa 1728 * Analog playback callbacks
dabbed6f 1729 */
c7d4b2fa
M		 1730static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1731 struct hda_codec *codec,
c8b6bf9b 1732 struct snd_pcm_substream *substream)
2f2f4251 1733{
dabbed6f 1734 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1735 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1736}
1737
2f2f4251
M		 1738static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1739 struct hda_codec *codec,
1740 unsigned int stream_tag,
1741 unsigned int format,
c8b6bf9b 1742 struct snd_pcm_substream *substream)
2f2f4251
M		 1743{
1744 struct sigmatel_spec *spec = codec->spec;
403d1944 1745 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1746}
1747
1748static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1749 struct hda_codec *codec,
c8b6bf9b 1750 struct snd_pcm_substream *substream)
2f2f4251
M		 1751{
1752 struct sigmatel_spec *spec = codec->spec;
1753 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1754}
1755
dabbed6f
M		 1756/*
1757 * Digital playback callbacks
1758 */
1759static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1760 struct hda_codec *codec,
c8b6bf9b 1761 struct snd_pcm_substream *substream)
dabbed6f
M		 1762{
1763 struct sigmatel_spec *spec = codec->spec;
1764 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1765}
1766
1767static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1768 struct hda_codec *codec,
c8b6bf9b 1769 struct snd_pcm_substream *substream)
dabbed6f
M		 1770{
1771 struct sigmatel_spec *spec = codec->spec;
1772 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1773}
1774
6b97eb45
TI		 1775static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1776 struct hda_codec *codec,
1777 unsigned int stream_tag,
1778 unsigned int format,
1779 struct snd_pcm_substream *substream)
1780{
1781 struct sigmatel_spec *spec = codec->spec;
1782 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1783 stream_tag, format, substream);
1784}
1785
dabbed6f 1786
2f2f4251
M		 1787/*
1788 * Analog capture callbacks
1789 */
1790static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1791 struct hda_codec *codec,
1792 unsigned int stream_tag,
1793 unsigned int format,
c8b6bf9b 1794 struct snd_pcm_substream *substream)
2f2f4251
M		 1795{
1796 struct sigmatel_spec *spec = codec->spec;
1797
1798 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1799 stream_tag, 0, format);
1800 return 0;
1801}
1802
1803static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1804 struct hda_codec *codec,
c8b6bf9b 1805 struct snd_pcm_substream *substream)
2f2f4251
M		 1806{
1807 struct sigmatel_spec *spec = codec->spec;
1808
1809 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1810 return 0;
1811}
1812
dabbed6f
M		 1813static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1814 .substreams = 1,
1815 .channels_min = 2,
1816 .channels_max = 2,
1817 /* NID is set in stac92xx_build_pcms */
1818 .ops = {
1819 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1820 .close = stac92xx_dig_playback_pcm_close,
1821 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1822 },
1823};
1824
1825static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1826 .substreams = 1,
1827 .channels_min = 2,
1828 .channels_max = 2,
1829 /* NID is set in stac92xx_build_pcms */
1830};
1831
2f2f4251
M		 1832static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1833 .substreams = 1,
1834 .channels_min = 2,
c7d4b2fa 1835 .channels_max = 8,
2f2f4251
M		 1836 .nid = 0x02, /* NID to query formats and rates */
1837 .ops = {
1838 .open = stac92xx_playback_pcm_open,
1839 .prepare = stac92xx_playback_pcm_prepare,
1840 .cleanup = stac92xx_playback_pcm_cleanup
1841 },
1842};
1843
3cc08dc6
MP		 1844static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1845 .substreams = 1,
1846 .channels_min = 2,
1847 .channels_max = 2,
1848 .nid = 0x06, /* NID to query formats and rates */
1849 .ops = {
1850 .open = stac92xx_playback_pcm_open,
1851 .prepare = stac92xx_playback_pcm_prepare,
1852 .cleanup = stac92xx_playback_pcm_cleanup
1853 },
1854};
1855
2f2f4251 1856static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1857 .channels_min = 2,
1858 .channels_max = 2,
9e05b7a3 1859 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1860 .ops = {
1861 .prepare = stac92xx_capture_pcm_prepare,
1862 .cleanup = stac92xx_capture_pcm_cleanup
1863 },
1864};
1865
1866static int stac92xx_build_pcms(struct hda_codec *codec)
1867{
1868 struct sigmatel_spec *spec = codec->spec;
1869 struct hda_pcm *info = spec->pcm_rec;
1870
1871 codec->num_pcms = 1;
1872 codec->pcm_info = info;
1873
c7d4b2fa 1874 info->name = "STAC92xx Analog";
2f2f4251 1875 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1876 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1877 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1878 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1879
1880 if (spec->alt_switch) {
1881 codec->num_pcms++;
1882 info++;
1883 info->name = "STAC92xx Analog Alt";
1884 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1885 }
2f2f4251 1886
dabbed6f
M		 1887 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1888 codec->num_pcms++;
1889 info++;
1890 info->name = "STAC92xx Digital";
1891 if (spec->multiout.dig_out_nid) {
1892 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1893 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1894 }
1895 if (spec->dig_in_nid) {
1896 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1897 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1898 }
1899 }
1900
2f2f4251
M		 1901 return 0;
1902}
1903
c960a03b
TI		 1904static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1905{
1906 unsigned int pincap = snd_hda_param_read(codec, nid,
1907 AC_PAR_PIN_CAP);
1908 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1909 if (pincap & AC_PINCAP_VREF_100)
1910 return AC_PINCTL_VREF_100;
1911 if (pincap & AC_PINCAP_VREF_80)
1912 return AC_PINCTL_VREF_80;
1913 if (pincap & AC_PINCAP_VREF_50)
1914 return AC_PINCTL_VREF_50;
1915 if (pincap & AC_PINCAP_VREF_GRD)
1916 return AC_PINCTL_VREF_GRD;
1917 return 0;
1918}
1919
403d1944
MP		 1920static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1921
1922{
82beb8fd
TI		 1923 snd_hda_codec_write_cache(codec, nid, 0,
1924 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1925}
1926
a5ce8890 1927#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1928
1929static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1930{
1931 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1932 struct sigmatel_spec *spec = codec->spec;
1933 int io_idx = kcontrol-> private_value & 0xff;
1934
1935 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1936 return 0;
1937}
1938
1939static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1940{
1941 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1942 struct sigmatel_spec *spec = codec->spec;
1943 hda_nid_t nid = kcontrol->private_value >> 8;
1944 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 1945 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 1946
1947 spec->io_switch[io_idx] = val;
1948
1949 if (val)
1950 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1951 else {
1952 unsigned int pinctl = AC_PINCTL_IN_EN;
1953 if (io_idx) /* set VREF for mic */
1954 pinctl |= stac92xx_get_vref(codec, nid);
1955 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1956 }
40c1d308
JZ		 1957
1958 /* check the auto-mute again: we need to mute/unmute the speaker
1959 * appropriately according to the pin direction
1960 */
1961 if (spec->hp_detect)
1962 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
1963
403d1944
MP		 1964 return 1;
1965}
1966
0fb87bb4
ML		 1967#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
1968
1969static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
1970 struct snd_ctl_elem_value *ucontrol)
1971{
1972 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1973 struct sigmatel_spec *spec = codec->spec;
1974
1975 ucontrol->value.integer.value[0] = spec->clfe_swap;
1976 return 0;
1977}
1978
1979static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
1980 struct snd_ctl_elem_value *ucontrol)
1981{
1982 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1983 struct sigmatel_spec *spec = codec->spec;
1984 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 1985 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 1986
68ea7b2f 1987 if (spec->clfe_swap == val)
0fb87bb4
ML		 1988 return 0;
1989
68ea7b2f 1990 spec->clfe_swap = val;
0fb87bb4
ML		 1991
1992 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
1993 spec->clfe_swap ? 0x4 : 0x0);
1994
1995 return 1;
1996}
1997
403d1944
MP		 1998#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1999 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2000 .name = xname, \
2001 .index = 0, \
2002 .info = stac92xx_io_switch_info, \
2003 .get = stac92xx_io_switch_get, \
2004 .put = stac92xx_io_switch_put, \
2005 .private_value = xpval, \
2006 }
2007
0fb87bb4
ML		 2008#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2009 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2010 .name = xname, \
2011 .index = 0, \
2012 .info = stac92xx_clfe_switch_info, \
2013 .get = stac92xx_clfe_switch_get, \
2014 .put = stac92xx_clfe_switch_put, \
2015 .private_value = xpval, \
2016 }
403d1944 2017
c7d4b2fa
M		 2018enum {
2019 STAC_CTL_WIDGET_VOL,
2020 STAC_CTL_WIDGET_MUTE,
403d1944 2021 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2022 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2023};
2024
c8b6bf9b 2025static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2026 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2027 HDA_CODEC_MUTE(NULL, 0, 0, 0),
403d1944 2028 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2029 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2030};
2031
2032/* add dynamic controls */
2033static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2034{
c8b6bf9b 2035 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2036
2037 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2038 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2039
2040 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2041 if (! knew)
2042 return -ENOMEM;
2043 if (spec->kctl_alloc) {
2044 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2045 kfree(spec->kctl_alloc);
2046 }
2047 spec->kctl_alloc = knew;
2048 spec->num_kctl_alloc = num;
2049 }
2050
2051 knew = &spec->kctl_alloc[spec->num_kctl_used];
2052 *knew = stac92xx_control_templates[type];
82fe0c58 2053 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2054 if (! knew->name)
2055 return -ENOMEM;
2056 knew->private_value = val;
2057 spec->num_kctl_used++;
2058 return 0;
2059}
2060
403d1944
MP		 2061/* flag inputs as additional dynamic lineouts */
2062static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2063{
2064 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2065 unsigned int wcaps, wtype;
2066 int i, num_dacs = 0;
2067
2068 /* use the wcaps cache to count all DACs available for line-outs */
2069 for (i = 0; i < codec->num_nodes; i++) {
2070 wcaps = codec->wcaps[i];
2071 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2072
7b043899
SL		 2073 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2074 num_dacs++;
2075 }
403d1944 2076
7b043899
SL		 2077 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2078
403d1944
MP		 2079 switch (cfg->line_outs) {
2080 case 3:
2081 /* add line-in as side */
7b043899 2082 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2083 cfg->line_out_pins[cfg->line_outs] =
2084 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2085 spec->line_switch = 1;
2086 cfg->line_outs++;
2087 }
2088 break;
2089 case 2:
2090 /* add line-in as clfe and mic as side */
7b043899 2091 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2092 cfg->line_out_pins[cfg->line_outs] =
2093 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2094 spec->line_switch = 1;
2095 cfg->line_outs++;
2096 }
7b043899 2097 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2098 cfg->line_out_pins[cfg->line_outs] =
2099 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2100 spec->mic_switch = 1;
2101 cfg->line_outs++;
2102 }
2103 break;
2104 case 1:
2105 /* add line-in as surr and mic as clfe */
7b043899 2106 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2107 cfg->line_out_pins[cfg->line_outs] =
2108 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2109 spec->line_switch = 1;
2110 cfg->line_outs++;
2111 }
7b043899 2112 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2113 cfg->line_out_pins[cfg->line_outs] =
2114 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2115 spec->mic_switch = 1;
2116 cfg->line_outs++;
2117 }
2118 break;
2119 }
2120
2121 return 0;
2122}
2123
7b043899
SL		 2124
2125static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2126{
2127 int i;
2128
2129 for (i = 0; i < spec->multiout.num_dacs; i++) {
2130 if (spec->multiout.dac_nids[i] == nid)
2131 return 1;
2132 }
2133
2134 return 0;
2135}
2136
3cc08dc6 2137/*
7b043899
SL		 2138 * Fill in the dac_nids table from the parsed pin configuration
2139 * This function only works when every pin in line_out_pins[]
2140 * contains atleast one DAC in its connection list. Some 92xx
2141 * codecs are not connected directly to a DAC, such as the 9200
2142 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2143 */
19039bd0 2144static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2145 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2146{
2147 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2148 int i, j, conn_len = 0;
2149 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2150 unsigned int wcaps, wtype;
2151
c7d4b2fa
M		 2152 for (i = 0; i < cfg->line_outs; i++) {
2153 nid = cfg->line_out_pins[i];
7b043899
SL		 2154 conn_len = snd_hda_get_connections(codec, nid, conn,
2155 HDA_MAX_CONNECTIONS);
2156 for (j = 0; j < conn_len; j++) {
2157 wcaps = snd_hda_param_read(codec, conn[j],
2158 AC_PAR_AUDIO_WIDGET_CAP);
2159 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2160 if (wtype != AC_WID_AUD_OUT ||
2161 (wcaps & AC_WCAP_DIGITAL))
2162 continue;
2163 /* conn[j] is a DAC routed to this line-out */
2164 if (!is_in_dac_nids(spec, conn[j]))
2165 break;
2166 }
2167
2168 if (j == conn_len) {
df802952
TI		 2169 if (spec->multiout.num_dacs > 0) {
2170 /* we have already working output pins,
2171 * so let's drop the broken ones again
2172 */
2173 cfg->line_outs = spec->multiout.num_dacs;
2174 break;
2175 }
7b043899
SL		 2176 /* error out, no available DAC found */
2177 snd_printk(KERN_ERR
2178 "%s: No available DAC for pin 0x%x\n",
2179 __func__, nid);
2180 return -ENODEV;
2181 }
2182
2183 spec->multiout.dac_nids[i] = conn[j];
2184 spec->multiout.num_dacs++;
2185 if (conn_len > 1) {
2186 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2187 snd_hda_codec_write_cache(codec, nid, 0,
2188 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2189
7b043899
SL		 2190 }
2191 }
c7d4b2fa 2192
7b043899
SL		 2193 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2194 spec->multiout.num_dacs,
2195 spec->multiout.dac_nids[0],
2196 spec->multiout.dac_nids[1],
2197 spec->multiout.dac_nids[2],
2198 spec->multiout.dac_nids[3],
2199 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2200 return 0;
2201}
2202
eb06ed8f
TI		 2203/* create volume control/switch for the given prefx type */
2204static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2205{
2206 char name[32];
2207 int err;
2208
2209 sprintf(name, "%s Playback Volume", pfx);
2210 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2211 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2212 if (err < 0)
2213 return err;
2214 sprintf(name, "%s Playback Switch", pfx);
2215 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2216 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2217 if (err < 0)
2218 return err;
2219 return 0;
2220}
2221
c7d4b2fa 2222/* add playback controls from the parsed DAC table */
0fb87bb4 2223static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2224 const struct auto_pin_cfg *cfg)
c7d4b2fa 2225{
19039bd0
TI		 2226 static const char *chname[4] = {
2227 "Front", "Surround", NULL /*CLFE*/, "Side"
2228 };
c7d4b2fa
M		 2229 hda_nid_t nid;
2230 int i, err;
2231
0fb87bb4
ML		 2232 struct sigmatel_spec *spec = codec->spec;
2233 unsigned int wid_caps;
2234
2235
c7d4b2fa 2236 for (i = 0; i < cfg->line_outs; i++) {
403d1944 2237 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2238 continue;
2239
2240 nid = spec->multiout.dac_nids[i];
2241
2242 if (i == 2) {
2243 /* Center/LFE */
eb06ed8f
TI		 2244 err = create_controls(spec, "Center", nid, 1);
2245 if (err < 0)
c7d4b2fa 2246 return err;
eb06ed8f
TI		 2247 err = create_controls(spec, "LFE", nid, 2);
2248 if (err < 0)
c7d4b2fa 2249 return err;
0fb87bb4
ML		 2250
2251 wid_caps = get_wcaps(codec, nid);
2252
2253 if (wid_caps & AC_WCAP_LR_SWAP) {
2254 err = stac92xx_add_control(spec,
2255 STAC_CTL_WIDGET_CLFE_SWITCH,
2256 "Swap Center/LFE Playback Switch", nid);
2257
2258 if (err < 0)
2259 return err;
2260 }
2261
c7d4b2fa 2262 } else {
eb06ed8f
TI		 2263 err = create_controls(spec, chname[i], nid, 3);
2264 if (err < 0)
c7d4b2fa
M		 2265 return err;
2266 }
2267 }
2268
403d1944
MP		 2269 if (spec->line_switch)
2270 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
2271 return err;
2272
2273 if (spec->mic_switch)
2274 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
2275 return err;
2276
c7d4b2fa
M		 2277 return 0;
2278}
2279
eb06ed8f 2280static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 2281{
7b043899
SL		 2282 if (is_in_dac_nids(spec, nid))
2283 return 1;
eb06ed8f
TI		 2284 if (spec->multiout.hp_nid == nid)
2285 return 1;
2286 return 0;
2287}
c7d4b2fa 2288
eb06ed8f
TI		 2289static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2290{
2291 if (!spec->multiout.hp_nid)
2292 spec->multiout.hp_nid = nid;
2293 else if (spec->multiout.num_dacs > 4) {
2294 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2295 return 1;
2296 } else {
2297 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2298 spec->multiout.num_dacs++;
2299 }
2300 return 0;
2301}
4e55096e 2302
eb06ed8f
TI		 2303/* add playback controls for Speaker and HP outputs */
2304static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2305 struct auto_pin_cfg *cfg)
2306{
2307 struct sigmatel_spec *spec = codec->spec;
2308 hda_nid_t nid;
2309 int i, old_num_dacs, err;
2310
2311 old_num_dacs = spec->multiout.num_dacs;
2312 for (i = 0; i < cfg->hp_outs; i++) {
2313 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2314 if (wid_caps & AC_WCAP_UNSOL_CAP)
2315 spec->hp_detect = 1;
2316 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2317 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2318 if (check_in_dac_nids(spec, nid))
2319 nid = 0;
2320 if (! nid)
c7d4b2fa 2321 continue;
eb06ed8f
TI		 2322 add_spec_dacs(spec, nid);
2323 }
2324 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2325 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2326 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2327 if (check_in_dac_nids(spec, nid))
2328 nid = 0;
eb06ed8f
TI		 2329 if (! nid)
2330 continue;
2331 add_spec_dacs(spec, nid);
c7d4b2fa 2332 }
1b290a51
MR		 2333 for (i = 0; i < cfg->line_outs; i++) {
2334 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2335 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2336 if (check_in_dac_nids(spec, nid))
2337 nid = 0;
2338 if (! nid)
2339 continue;
2340 add_spec_dacs(spec, nid);
2341 }
eb06ed8f
TI		 2342 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2343 static const char *pfxs[] = {
2344 "Speaker", "External Speaker", "Speaker2",
2345 };
2346 err = create_controls(spec, pfxs[i - old_num_dacs],
2347 spec->multiout.dac_nids[i], 3);
2348 if (err < 0)
2349 return err;
2350 }
2351 if (spec->multiout.hp_nid) {
2352 const char *pfx;
6020c008 2353 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 2354 pfx = "Master";
2355 else
2356 pfx = "Headphone";
2357 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
2358 if (err < 0)
2359 return err;
2360 }
c7d4b2fa
M		 2361
2362 return 0;
2363}
2364
b22b4821
MR		 2365/* labels for mono mux outputs */
2366static const char *stac92xx_mono_labels[3] = {
2367 "DAC0", "DAC1", "Mixer"
2368};
2369
2370/* create mono mux for mono out on capable codecs */
2371static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2372{
2373 struct sigmatel_spec *spec = codec->spec;
2374 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2375 int i, num_cons;
2376 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2377
2378 num_cons = snd_hda_get_connections(codec,
2379 spec->mono_nid,
2380 con_lst,
2381 HDA_MAX_NUM_INPUTS);
2382 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2383 return -EINVAL;
2384
2385 for (i = 0; i < num_cons; i++) {
2386 mono_mux->items[mono_mux->num_items].label =
2387 stac92xx_mono_labels[i];
2388 mono_mux->items[mono_mux->num_items].index = i;
2389 mono_mux->num_items++;
2390 }
2391 return 0;
2392}
2393
8b65727b 2394/* labels for dmic mux inputs */
ddc2cec4 2395static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2396 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2397 "Digital Mic 3", "Digital Mic 4"
2398};
2399
2400/* create playback/capture controls for input pins on dmic capable codecs */
2401static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2402 const struct auto_pin_cfg *cfg)
2403{
2404 struct sigmatel_spec *spec = codec->spec;
2405 struct hda_input_mux *dimux = &spec->private_dimux;
2406 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2407 int err, i, j;
2408 char name[32];
8b65727b
MP		 2409
2410 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2411 dimux->items[dimux->num_items].index = 0;
2412 dimux->num_items++;
2413
2414 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2415 hda_nid_t nid;
8b65727b
MP		 2416 int index;
2417 int num_cons;
0678accd 2418 unsigned int wcaps;
8b65727b
MP		 2419 unsigned int def_conf;
2420
2421 def_conf = snd_hda_codec_read(codec,
2422 spec->dmic_nids[i],
2423 0,
2424 AC_VERB_GET_CONFIG_DEFAULT,
2425 0);
2426 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2427 continue;
2428
0678accd 2429 nid = spec->dmic_nids[i];
8b65727b 2430 num_cons = snd_hda_get_connections(codec,
e1f0d669 2431 spec->dmux_nids[0],
8b65727b
MP		 2432 con_lst,
2433 HDA_MAX_NUM_INPUTS);
2434 for (j = 0; j < num_cons; j++)
0678accd 2435 if (con_lst[j] == nid) {
8b65727b
MP		 2436 index = j;
2437 goto found;
2438 }
2439 continue;
2440found:
0678accd
MR		 2441 wcaps = get_wcaps(codec, nid);
2442
2443 if (wcaps & AC_WCAP_OUT_AMP) {
2444 sprintf(name, "%s Capture Volume",
2445 stac92xx_dmic_labels[dimux->num_items]);
2446
2447 err = stac92xx_add_control(spec,
2448 STAC_CTL_WIDGET_VOL,
2449 name,
2450 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2451 if (err < 0)
2452 return err;
2453 }
2454
8b65727b
MP		 2455 dimux->items[dimux->num_items].label =
2456 stac92xx_dmic_labels[dimux->num_items];
2457 dimux->items[dimux->num_items].index = index;
2458 dimux->num_items++;
2459 }
2460
2461 return 0;
2462}
2463
c7d4b2fa
M		 2464/* create playback/capture controls for input pins */
2465static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2466{
2467 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2468 struct hda_input_mux *imux = &spec->private_imux;
2469 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2470 int i, j, k;
2471
2472 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2473 int index;
2474
2475 if (!cfg->input_pins[i])
2476 continue;
2477 index = -1;
2478 for (j = 0; j < spec->num_muxes; j++) {
2479 int num_cons;
2480 num_cons = snd_hda_get_connections(codec,
2481 spec->mux_nids[j],
2482 con_lst,
2483 HDA_MAX_NUM_INPUTS);
2484 for (k = 0; k < num_cons; k++)
2485 if (con_lst[k] == cfg->input_pins[i]) {
2486 index = k;
2487 goto found;
2488 }
c7d4b2fa 2489 }
314634bc
TI		 2490 continue;
2491 found:
2492 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2493 imux->items[imux->num_items].index = index;
2494 imux->num_items++;
c7d4b2fa
M		 2495 }
2496
7b043899 2497 if (imux->num_items) {
62fe78e9
SR		 2498 /*
2499 * Set the current input for the muxes.
2500 * The STAC9221 has two input muxes with identical source
2501 * NID lists. Hopefully this won't get confused.
2502 */
2503 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2504 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2505 AC_VERB_SET_CONNECT_SEL,
2506 imux->items[0].index);
62fe78e9
SR		 2507 }
2508 }
2509
c7d4b2fa
M		 2510 return 0;
2511}
2512
c7d4b2fa
M		 2513static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2514{
2515 struct sigmatel_spec *spec = codec->spec;
2516 int i;
2517
2518 for (i = 0; i < spec->autocfg.line_outs; i++) {
2519 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2520 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2521 }
2522}
2523
2524static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2525{
2526 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2527 int i;
c7d4b2fa 2528
eb06ed8f
TI		 2529 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2530 hda_nid_t pin;
2531 pin = spec->autocfg.hp_pins[i];
2532 if (pin) /* connect to front */
2533 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2534 }
2535 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2536 hda_nid_t pin;
2537 pin = spec->autocfg.speaker_pins[i];
2538 if (pin) /* connect to front */
2539 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2540 }
c7d4b2fa
M		 2541}
2542
3cc08dc6 2543static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2544{
2545 struct sigmatel_spec *spec = codec->spec;
2546 int err;
bcecd9bd 2547 int hp_speaker_swap = 0;
c7d4b2fa 2548
8b65727b
MP		 2549 if ((err = snd_hda_parse_pin_def_config(codec,
2550 &spec->autocfg,
2551 spec->dmic_nids)) < 0)
c7d4b2fa 2552 return err;
82bc955f 2553 if (! spec->autocfg.line_outs)
869264c4 2554 return 0; /* can't find valid pin config */
19039bd0 2555
bcecd9bd
JZ		 2556 /* If we have no real line-out pin and multiple hp-outs, HPs should
2557 * be set up as multi-channel outputs.
2558 */
2559 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2560 spec->autocfg.hp_outs > 1) {
2561 /* Copy hp_outs to line_outs, backup line_outs in
2562 * speaker_outs so that the following routines can handle
2563 * HP pins as primary outputs.
2564 */
2565 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2566 sizeof(spec->autocfg.line_out_pins));
2567 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2568 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2569 sizeof(spec->autocfg.hp_pins));
2570 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2571 hp_speaker_swap = 1;
2572 }
2573
403d1944
MP		 2574 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2575 return err;
19039bd0
TI		 2576 if (spec->multiout.num_dacs == 0)
2577 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2578 return err;
c7d4b2fa 2579
0fb87bb4
ML		 2580 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2581
2582 if (err < 0)
2583 return err;
2584
bcecd9bd
JZ		 2585 if (hp_speaker_swap == 1) {
2586 /* Restore the hp_outs and line_outs */
2587 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2588 sizeof(spec->autocfg.line_out_pins));
2589 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2590 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2591 sizeof(spec->autocfg.speaker_pins));
2592 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2593 memset(spec->autocfg.speaker_pins, 0,
2594 sizeof(spec->autocfg.speaker_pins));
2595 spec->autocfg.speaker_outs = 0;
2596 }
2597
0fb87bb4
ML		 2598 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2599
2600 if (err < 0)
2601 return err;
2602
2603 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2604
2605 if (err < 0)
c7d4b2fa
M		 2606 return err;
2607
b22b4821
MR		 2608 if (spec->mono_nid > 0) {
2609 err = stac92xx_auto_create_mono_output_ctls(codec);
2610 if (err < 0)
2611 return err;
2612 }
2613
8b65727b
MP		 2614 if (spec->num_dmics > 0)
2615 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2616 &spec->autocfg)) < 0)
2617 return err;
2618
c7d4b2fa 2619 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2620 if (spec->multiout.max_channels > 2)
c7d4b2fa 2621 spec->surr_switch = 1;
c7d4b2fa 2622
82bc955f 2623 if (spec->autocfg.dig_out_pin)
3cc08dc6 2624 spec->multiout.dig_out_nid = dig_out;
82bc955f 2625 if (spec->autocfg.dig_in_pin)
3cc08dc6 2626 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2627
2628 if (spec->kctl_alloc)
2629 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2630
2631 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2632 if (!spec->dinput_mux)
2633 spec->dinput_mux = &spec->private_dimux;
b22b4821 2634 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 2635
2636 return 1;
2637}
2638
82bc955f
TI		 2639/* add playback controls for HP output */
2640static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2641 struct auto_pin_cfg *cfg)
2642{
2643 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2644 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2645 unsigned int wid_caps;
2646
2647 if (! pin)
2648 return 0;
2649
2650 wid_caps = get_wcaps(codec, pin);
505cb341 2651 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2652 spec->hp_detect = 1;
82bc955f
TI		 2653
2654 return 0;
2655}
2656
160ea0dc
RF		 2657/* add playback controls for LFE output */
2658static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2659 struct auto_pin_cfg *cfg)
2660{
2661 struct sigmatel_spec *spec = codec->spec;
2662 int err;
2663 hda_nid_t lfe_pin = 0x0;
2664 int i;
2665
2666 /*
2667 * search speaker outs and line outs for a mono speaker pin
2668 * with an amp. If one is found, add LFE controls
2669 * for it.
2670 */
2671 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2672 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2673 unsigned long wcaps = get_wcaps(codec, pin);
2674 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2675 if (wcaps == AC_WCAP_OUT_AMP)
2676 /* found a mono speaker with an amp, must be lfe */
2677 lfe_pin = pin;
2678 }
2679
2680 /* if speaker_outs is 0, then speakers may be in line_outs */
2681 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2682 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2683 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2684 unsigned long cfg;
2685 cfg = snd_hda_codec_read(codec, pin, 0,
2686 AC_VERB_GET_CONFIG_DEFAULT,
2687 0x00);
2688 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2689 unsigned long wcaps = get_wcaps(codec, pin);
2690 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2691 if (wcaps == AC_WCAP_OUT_AMP)
2692 /* found a mono speaker with an amp,
2693 must be lfe */
2694 lfe_pin = pin;
2695 }
2696 }
2697 }
2698
2699 if (lfe_pin) {
eb06ed8f 2700 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2701 if (err < 0)
2702 return err;
2703 }
2704
2705 return 0;
2706}
2707
c7d4b2fa
M		 2708static int stac9200_parse_auto_config(struct hda_codec *codec)
2709{
2710 struct sigmatel_spec *spec = codec->spec;
2711 int err;
2712
df694daa 2713 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2714 return err;
2715
2716 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2717 return err;
2718
82bc955f
TI		 2719 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2720 return err;
2721
160ea0dc
RF		 2722 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2723 return err;
2724
82bc955f 2725 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2726 spec->multiout.dig_out_nid = 0x05;
82bc955f 2727 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2728 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2729
2730 if (spec->kctl_alloc)
2731 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2732
2733 spec->input_mux = &spec->private_imux;
8b65727b 2734 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2735
2736 return 1;
2737}
2738
62fe78e9
SR		 2739/*
2740 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2741 * funky external mute control using GPIO pins.
2742 */
2743
76e1ddfb
TI		 2744static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
2745 unsigned int data)
62fe78e9
SR		 2746{
2747 unsigned int gpiostate, gpiomask, gpiodir;
2748
2749 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2750 AC_VERB_GET_GPIO_DATA, 0);
76e1ddfb 2751 gpiostate = (gpiostate & ~mask) | (data & mask);
62fe78e9
SR		 2752
2753 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2754 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 2755 gpiomask |= mask;
62fe78e9
SR		 2756
2757 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2758 AC_VERB_GET_GPIO_DIRECTION, 0);
76e1ddfb 2759 gpiodir |= mask;
62fe78e9 2760
76e1ddfb 2761 /* Configure GPIOx as CMOS */
62fe78e9
SR		 2762 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2763
2764 snd_hda_codec_write(codec, codec->afg, 0,
2765 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 2766 snd_hda_codec_read(codec, codec->afg, 0,
2767 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 2768
2769 msleep(1);
2770
76e1ddfb
TI		 2771 snd_hda_codec_read(codec, codec->afg, 0,
2772 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 2773}
2774
314634bc
TI		 2775static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2776 unsigned int event)
2777{
2778 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2779 snd_hda_codec_write_cache(codec, nid, 0,
2780 AC_VERB_SET_UNSOLICITED_ENABLE,
2781 (AC_USRSP_EN | event));
314634bc
TI		 2782}
2783
a64135a2
MR		 2784static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
2785{
2786 int i;
2787 for (i = 0; i < cfg->hp_outs; i++)
2788 if (cfg->hp_pins[i] == nid)
2789 return 1; /* nid is a HP-Out */
2790
2791 return 0; /* nid is not a HP-Out */
2792};
2793
c7d4b2fa
M		 2794static int stac92xx_init(struct hda_codec *codec)
2795{
2796 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2797 struct auto_pin_cfg *cfg = &spec->autocfg;
2798 int i;
c7d4b2fa 2799
c7d4b2fa
M		 2800 snd_hda_sequence_write(codec, spec->init);
2801
82bc955f
TI		 2802 /* set up pins */
2803 if (spec->hp_detect) {
505cb341 2804 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2805 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2806 enable_pin_detect(codec, cfg->hp_pins[i],
2807 STAC_HP_EVENT);
0a07acaf
TI		 2808 /* force to enable the first line-out; the others are set up
2809 * in unsol_event
2810 */
2811 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2812 AC_PINCTL_OUT_EN);
eb995a8c 2813 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2814 /* fake event to set up pins */
2815 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2816 } else {
2817 stac92xx_auto_init_multi_out(codec);
2818 stac92xx_auto_init_hp_out(codec);
2819 }
2820 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2821 hda_nid_t nid = cfg->input_pins[i];
2822 if (nid) {
2823 unsigned int pinctl = AC_PINCTL_IN_EN;
2824 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2825 pinctl |= stac92xx_get_vref(codec, nid);
2826 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2827 }
82bc955f 2828 }
a64135a2
MR		 2829 for (i = 0; i < spec->num_dmics; i++)
2830 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2831 AC_PINCTL_IN_EN);
2832 for (i = 0; i < spec->num_pwrs; i++) {
2833 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
2834 ? STAC_HP_EVENT : STAC_PWR_EVENT;
2835 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
2836 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2837 /* outputs are only ports capable of power management
2838 * any attempts on powering down a input port cause the
2839 * referenced VREF to act quirky.
2840 */
2841 if (pinctl & AC_PINCTL_IN_EN)
2842 continue;
2843 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
2844 codec->patch_ops.unsol_event(codec, (event | i) << 26);
2845 }
8b65727b 2846
82bc955f
TI		 2847 if (cfg->dig_out_pin)
2848 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2849 AC_PINCTL_OUT_EN);
2850 if (cfg->dig_in_pin)
2851 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2852 AC_PINCTL_IN_EN);
2853
76e1ddfb 2854 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_data);
62fe78e9 2855
c7d4b2fa
M		 2856 return 0;
2857}
2858
2f2f4251
M		 2859static void stac92xx_free(struct hda_codec *codec)
2860{
c7d4b2fa
M		 2861 struct sigmatel_spec *spec = codec->spec;
2862 int i;
2863
2864 if (! spec)
2865 return;
2866
2867 if (spec->kctl_alloc) {
2868 for (i = 0; i < spec->num_kctl_used; i++)
2869 kfree(spec->kctl_alloc[i].name);
2870 kfree(spec->kctl_alloc);
2871 }
2872
11b44bbd
RF		 2873 if (spec->bios_pin_configs)
2874 kfree(spec->bios_pin_configs);
2875
c7d4b2fa 2876 kfree(spec);
2f2f4251
M		 2877}
2878
4e55096e
M		 2879static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2880 unsigned int flag)
2881{
2882 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2883 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2884
f9acba43
TI		 2885 if (pin_ctl & AC_PINCTL_IN_EN) {
2886 /*
2887 * we need to check the current set-up direction of
2888 * shared input pins since they can be switched via
2889 * "xxx as Output" mixer switch
2890 */
2891 struct sigmatel_spec *spec = codec->spec;
2892 struct auto_pin_cfg *cfg = &spec->autocfg;
2893 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2894 spec->line_switch) ||
2895 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2896 spec->mic_switch))
2897 return;
2898 }
2899
7b043899
SL		 2900 /* if setting pin direction bits, clear the current
2901 direction bits first */
2902 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2903 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2904
82beb8fd 2905 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2906 AC_VERB_SET_PIN_WIDGET_CONTROL,
2907 pin_ctl | flag);
2908}
2909
2910static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2911 unsigned int flag)
2912{
2913 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2914 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 2915 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2916 AC_VERB_SET_PIN_WIDGET_CONTROL,
2917 pin_ctl & ~flag);
2918}
2919
40c1d308 2920static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 2921{
2922 if (!nid)
2923 return 0;
2924 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 2925 & (1 << 31)) {
2926 unsigned int pinctl;
2927 pinctl = snd_hda_codec_read(codec, nid, 0,
2928 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2929 if (pinctl & AC_PINCTL_IN_EN)
2930 return 0; /* mic- or line-input */
2931 else
2932 return 1; /* HP-output */
2933 }
314634bc
TI		 2934 return 0;
2935}
2936
2937static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 2938{
2939 struct sigmatel_spec *spec = codec->spec;
2940 struct auto_pin_cfg *cfg = &spec->autocfg;
2941 int i, presence;
2942
eb06ed8f
TI		 2943 presence = 0;
2944 for (i = 0; i < cfg->hp_outs; i++) {
40c1d308 2945 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
314634bc
TI		 2946 if (presence)
2947 break;
eb06ed8f 2948 }
4e55096e
M		 2949
2950 if (presence) {
2951 /* disable lineouts, enable hp */
2952 for (i = 0; i < cfg->line_outs; i++)
2953 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
2954 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2955 for (i = 0; i < cfg->speaker_outs; i++)
2956 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
2957 AC_PINCTL_OUT_EN);
4e55096e
M		 2958 } else {
2959 /* enable lineouts, disable hp */
2960 for (i = 0; i < cfg->line_outs; i++)
2961 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
2962 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2963 for (i = 0; i < cfg->speaker_outs; i++)
2964 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
2965 AC_PINCTL_OUT_EN);
4e55096e
M		 2966 }
2967}
2968
a64135a2
MR		 2969static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
2970{
2971 struct sigmatel_spec *spec = codec->spec;
2972 hda_nid_t nid = spec->pwr_nids[idx];
2973 int presence, val;
2974 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
2975 & 0x000000ff;
2976 presence = get_hp_pin_presence(codec, nid);
2977 idx = 1 << idx;
2978
2979 if (presence)
2980 val &= ~idx;
2981 else
2982 val |= idx;
2983
2984 /* power down unused output ports */
2985 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
2986};
2987
314634bc
TI		 2988static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
2989{
a64135a2
MR		 2990 struct sigmatel_spec *spec = codec->spec;
2991 int idx = res >> 26 & 0x0f;
2992
2993 switch ((res >> 26) & 0x30) {
314634bc
TI		 2994 case STAC_HP_EVENT:
2995 stac92xx_hp_detect(codec, res);
a64135a2
MR		 2996 /* fallthru */
2997 case STAC_PWR_EVENT:
2998 if (spec->num_pwrs > 0)
2999 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3000 }
3001}
3002
cb53c626 3003#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3004static int stac92xx_resume(struct hda_codec *codec)
3005{
dc81bed1
TI		 3006 struct sigmatel_spec *spec = codec->spec;
3007
11b44bbd 3008 stac92xx_set_config_regs(codec);
dc81bed1 3009 snd_hda_sequence_write(codec, spec->init);
76e1ddfb 3010 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_data);
82beb8fd
TI		 3011 snd_hda_codec_resume_amp(codec);
3012 snd_hda_codec_resume_cache(codec);
dc81bed1
TI		 3013 /* invoke unsolicited event to reset the HP state */
3014 if (spec->hp_detect)
3015 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3016 return 0;
3017}
3018#endif
3019
2f2f4251
M		 3020static struct hda_codec_ops stac92xx_patch_ops = {
3021 .build_controls = stac92xx_build_controls,
3022 .build_pcms = stac92xx_build_pcms,
3023 .init = stac92xx_init,
3024 .free = stac92xx_free,
4e55096e 3025 .unsol_event = stac92xx_unsol_event,
cb53c626 3026#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3027 .resume = stac92xx_resume,
3028#endif
2f2f4251
M		 3029};
3030
3031static int patch_stac9200(struct hda_codec *codec)
3032{
3033 struct sigmatel_spec *spec;
c7d4b2fa 3034 int err;
2f2f4251 3035
e560d8d8 3036 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3037 if (spec == NULL)
3038 return -ENOMEM;
3039
3040 codec->spec = spec;
a4eed138 3041 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3042 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3043 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3044 stac9200_models,
3045 stac9200_cfg_tbl);
11b44bbd
RF		 3046 if (spec->board_config < 0) {
3047 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3048 err = stac92xx_save_bios_config_regs(codec);
3049 if (err < 0) {
3050 stac92xx_free(codec);
3051 return err;
3052 }
3053 spec->pin_configs = spec->bios_pin_configs;
3054 } else {
403d1944
MP		 3055 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3056 stac92xx_set_config_regs(codec);
3057 }
2f2f4251
M		 3058
3059 spec->multiout.max_channels = 2;
3060 spec->multiout.num_dacs = 1;
3061 spec->multiout.dac_nids = stac9200_dac_nids;
3062 spec->adc_nids = stac9200_adc_nids;
3063 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3064 spec->num_muxes = 1;
8b65727b 3065 spec->num_dmics = 0;
9e05b7a3 3066 spec->num_adcs = 1;
a64135a2 3067 spec->num_pwrs = 0;
c7d4b2fa 3068
1194b5b7
TI		 3069 if (spec->board_config == STAC_9200_GATEWAY)
3070 spec->init = stac9200_eapd_init;
3071 else
3072 spec->init = stac9200_core_init;
2f2f4251 3073 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 3074
3075 err = stac9200_parse_auto_config(codec);
3076 if (err < 0) {
3077 stac92xx_free(codec);
3078 return err;
3079 }
2f2f4251
M		 3080
3081 codec->patch_ops = stac92xx_patch_ops;
3082
3083 return 0;
3084}
3085
8e21c34c
TD		 3086static int patch_stac925x(struct hda_codec *codec)
3087{
3088 struct sigmatel_spec *spec;
3089 int err;
3090
3091 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3092 if (spec == NULL)
3093 return -ENOMEM;
3094
3095 codec->spec = spec;
a4eed138 3096 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3097 spec->pin_nids = stac925x_pin_nids;
3098 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3099 stac925x_models,
3100 stac925x_cfg_tbl);
9e507abd 3101 again:
8e21c34c 3102 if (spec->board_config < 0) {
2c11f955
TD		 3103 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3104 "using BIOS defaults\n");
8e21c34c
TD		 3105 err = stac92xx_save_bios_config_regs(codec);
3106 if (err < 0) {
3107 stac92xx_free(codec);
3108 return err;
3109 }
3110 spec->pin_configs = spec->bios_pin_configs;
3111 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3112 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3113 stac92xx_set_config_regs(codec);
3114 }
3115
3116 spec->multiout.max_channels = 2;
3117 spec->multiout.num_dacs = 1;
3118 spec->multiout.dac_nids = stac925x_dac_nids;
3119 spec->adc_nids = stac925x_adc_nids;
3120 spec->mux_nids = stac925x_mux_nids;
3121 spec->num_muxes = 1;
9e05b7a3 3122 spec->num_adcs = 1;
a64135a2 3123 spec->num_pwrs = 0;
2c11f955
TD		 3124 switch (codec->vendor_id) {
3125 case 0x83847632: /* STAC9202 */
3126 case 0x83847633: /* STAC9202D */
3127 case 0x83847636: /* STAC9251 */
3128 case 0x83847637: /* STAC9251D */
f6e9852a 3129 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3130 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3131 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3132 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3133 break;
3134 default:
3135 spec->num_dmics = 0;
3136 break;
3137 }
8e21c34c
TD		 3138
3139 spec->init = stac925x_core_init;
3140 spec->mixer = stac925x_mixer;
3141
3142 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3143 if (!err) {
3144 if (spec->board_config < 0) {
3145 printk(KERN_WARNING "hda_codec: No auto-config is "
3146 "available, default to model=ref\n");
3147 spec->board_config = STAC_925x_REF;
3148 goto again;
3149 }
3150 err = -EINVAL;
3151 }
8e21c34c
TD		 3152 if (err < 0) {
3153 stac92xx_free(codec);
3154 return err;
3155 }
3156
3157 codec->patch_ops = stac92xx_patch_ops;
3158
3159 return 0;
3160}
3161
e1f0d669
MR		 3162static struct hda_input_mux stac92hd73xx_dmux = {
3163 .num_items = 4,
3164 .items = {
3165 { "Analog Inputs", 0x0b },
3166 { "CD", 0x08 },
3167 { "Digital Mic 1", 0x09 },
3168 { "Digital Mic 2", 0x0a },
3169 }
3170};
3171
3172static int patch_stac92hd73xx(struct hda_codec *codec)
3173{
3174 struct sigmatel_spec *spec;
3175 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3176 int err = 0;
3177
3178 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3179 if (spec == NULL)
3180 return -ENOMEM;
3181
3182 codec->spec = spec;
3183 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3184 spec->pin_nids = stac92hd73xx_pin_nids;
3185 spec->board_config = snd_hda_check_board_config(codec,
3186 STAC_92HD73XX_MODELS,
3187 stac92hd73xx_models,
3188 stac92hd73xx_cfg_tbl);
3189again:
3190 if (spec->board_config < 0) {
3191 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3192 " STAC92HD73XX, using BIOS defaults\n");
3193 err = stac92xx_save_bios_config_regs(codec);
3194 if (err < 0) {
3195 stac92xx_free(codec);
3196 return err;
3197 }
3198 spec->pin_configs = spec->bios_pin_configs;
3199 } else {
3200 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3201 stac92xx_set_config_regs(codec);
3202 }
3203
3204 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3205 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3206
3207 if (spec->multiout.num_dacs < 0) {
3208 printk(KERN_WARNING "hda_codec: Could not determine "
3209 "number of channels defaulting to DAC count\n");
3210 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3211 }
3212
3213 switch (spec->multiout.num_dacs) {
3214 case 0x3: /* 6 Channel */
3215 spec->mixer = stac92hd73xx_6ch_mixer;
3216 spec->init = stac92hd73xx_6ch_core_init;
3217 break;
3218 case 0x4: /* 8 Channel */
3219 spec->multiout.hp_nid = 0x18;
3220 spec->mixer = stac92hd73xx_8ch_mixer;
3221 spec->init = stac92hd73xx_8ch_core_init;
3222 break;
3223 case 0x5: /* 10 Channel */
3224 spec->multiout.hp_nid = 0x19;
3225 spec->mixer = stac92hd73xx_10ch_mixer;
3226 spec->init = stac92hd73xx_10ch_core_init;
3227 };
3228
3229 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3230 spec->aloopback_mask = 0x01;
3231 spec->aloopback_shift = 8;
3232
3233 spec->mux_nids = stac92hd73xx_mux_nids;
3234 spec->adc_nids = stac92hd73xx_adc_nids;
3235 spec->dmic_nids = stac92hd73xx_dmic_nids;
3236 spec->dmux_nids = stac92hd73xx_dmux_nids;
3237
3238 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3239 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
3240 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
1697055e 3241 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3242 spec->dinput_mux = &stac92hd73xx_dmux;
3243 /* GPIO0 High = Enable EAPD */
3244 spec->gpio_mask = spec->gpio_data = 0x000001;
e1f0d669 3245
a64135a2
MR		 3246 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3247 spec->pwr_nids = stac92hd73xx_pwr_nids;
3248
e1f0d669
MR		 3249 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3250
3251 if (!err) {
3252 if (spec->board_config < 0) {
3253 printk(KERN_WARNING "hda_codec: No auto-config is "
3254 "available, default to model=ref\n");
3255 spec->board_config = STAC_92HD73XX_REF;
3256 goto again;
3257 }
3258 err = -EINVAL;
3259 }
3260
3261 if (err < 0) {
3262 stac92xx_free(codec);
3263 return err;
3264 }
3265
3266 codec->patch_ops = stac92xx_patch_ops;
3267
3268 return 0;
3269}
3270
e035b841
MR		 3271static int patch_stac92hd71bxx(struct hda_codec *codec)
3272{
3273 struct sigmatel_spec *spec;
3274 int err = 0;
3275
3276 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3277 if (spec == NULL)
3278 return -ENOMEM;
3279
3280 codec->spec = spec;
3281 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
3282 spec->pin_nids = stac92hd71bxx_pin_nids;
3283 spec->board_config = snd_hda_check_board_config(codec,
3284 STAC_92HD71BXX_MODELS,
3285 stac92hd71bxx_models,
3286 stac92hd71bxx_cfg_tbl);
3287again:
3288 if (spec->board_config < 0) {
3289 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3290 " STAC92HD71BXX, using BIOS defaults\n");
3291 err = stac92xx_save_bios_config_regs(codec);
3292 if (err < 0) {
3293 stac92xx_free(codec);
3294 return err;
3295 }
3296 spec->pin_configs = spec->bios_pin_configs;
3297 } else {
3298 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3299 stac92xx_set_config_regs(codec);
3300 }
3301
541eee87
MR		 3302 switch (codec->vendor_id) {
3303 case 0x111d76b6: /* 4 Port without Analog Mixer */
3304 case 0x111d76b7:
3305 case 0x111d76b4: /* 6 Port without Analog Mixer */
3306 case 0x111d76b5:
3307 spec->mixer = stac92hd71bxx_mixer;
3308 spec->init = stac92hd71bxx_core_init;
3309 break;
3310 default:
3311 spec->mixer = stac92hd71bxx_analog_mixer;
3312 spec->init = stac92hd71bxx_analog_core_init;
3313 }
3314
3315 spec->aloopback_mask = 0x20;
3316 spec->aloopback_shift = 0;
3317
e035b841 3318 spec->gpio_mask = spec->gpio_data = 0x00000001; /* GPIO0 High = EAPD */
e035b841 3319
b22b4821 3320 spec->mono_nid = 0x15;
e035b841
MR		 3321 spec->mux_nids = stac92hd71bxx_mux_nids;
3322 spec->adc_nids = stac92hd71bxx_adc_nids;
3323 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3324 spec->dmux_nids = stac92hd71bxx_dmux_nids;
e035b841
MR		 3325
3326 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3327 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3328 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3329 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3330
a64135a2
MR		 3331 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3332 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3333
e035b841
MR		 3334 spec->multiout.num_dacs = 2;
3335 spec->multiout.hp_nid = 0x11;
3336 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3337
3338 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3339 if (!err) {
3340 if (spec->board_config < 0) {
3341 printk(KERN_WARNING "hda_codec: No auto-config is "
3342 "available, default to model=ref\n");
3343 spec->board_config = STAC_92HD71BXX_REF;
3344 goto again;
3345 }
3346 err = -EINVAL;
3347 }
3348
3349 if (err < 0) {
3350 stac92xx_free(codec);
3351 return err;
3352 }
3353
3354 codec->patch_ops = stac92xx_patch_ops;
3355
3356 return 0;
3357};
3358
2f2f4251
M		 3359static int patch_stac922x(struct hda_codec *codec)
3360{
3361 struct sigmatel_spec *spec;
c7d4b2fa 3362 int err;
2f2f4251 3363
e560d8d8 3364 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3365 if (spec == NULL)
3366 return -ENOMEM;
3367
3368 codec->spec = spec;
a4eed138 3369 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3370 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3371 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3372 stac922x_models,
3373 stac922x_cfg_tbl);
5d5d3bc3 3374 if (spec->board_config == STAC_INTEL_MAC_V3) {
76e1ddfb 3375 spec->gpio_mask = spec->gpio_data = 0x03;
3fc24d85
TI		 3376 /* Intel Macs have all same PCI SSID, so we need to check
3377 * codec SSID to distinguish the exact models
3378 */
6f0778d8 3379 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3380 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3381
3382 case 0x106b0800:
3383 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3384 break;
5d5d3bc3
IZ		 3385 case 0x106b0600:
3386 case 0x106b0700:
3387 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3388 break;
5d5d3bc3
IZ		 3389 case 0x106b0e00:
3390 case 0x106b0f00:
3391 case 0x106b1600:
3392 case 0x106b1700:
3393 case 0x106b0200:
3394 case 0x106b1e00:
3395 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3396 break;
5d5d3bc3
IZ		 3397 case 0x106b1a00:
3398 case 0x00000100:
3399 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3400 break;
5d5d3bc3
IZ		 3401 case 0x106b0a00:
3402 case 0x106b2200:
3403 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3404 break;
3fc24d85
TI		 3405 }
3406 }
3407
9e507abd 3408 again:
11b44bbd
RF		 3409 if (spec->board_config < 0) {
3410 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3411 "using BIOS defaults\n");
3412 err = stac92xx_save_bios_config_regs(codec);
3413 if (err < 0) {
3414 stac92xx_free(codec);
3415 return err;
3416 }
3417 spec->pin_configs = spec->bios_pin_configs;
3418 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3419 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3420 stac92xx_set_config_regs(codec);
3421 }
2f2f4251 3422
c7d4b2fa
M		 3423 spec->adc_nids = stac922x_adc_nids;
3424 spec->mux_nids = stac922x_mux_nids;
2549413e 3425 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3426 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3427 spec->num_dmics = 0;
a64135a2 3428 spec->num_pwrs = 0;
c7d4b2fa
M		 3429
3430 spec->init = stac922x_core_init;
2f2f4251 3431 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3432
3433 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3434
3cc08dc6 3435 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3436 if (!err) {
3437 if (spec->board_config < 0) {
3438 printk(KERN_WARNING "hda_codec: No auto-config is "
3439 "available, default to model=ref\n");
3440 spec->board_config = STAC_D945_REF;
3441 goto again;
3442 }
3443 err = -EINVAL;
3444 }
3cc08dc6
MP		 3445 if (err < 0) {
3446 stac92xx_free(codec);
3447 return err;
3448 }
3449
3450 codec->patch_ops = stac92xx_patch_ops;
3451
807a4636
TI		 3452 /* Fix Mux capture level; max to 2 */
3453 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3454 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3455 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3456 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3457 (0 << AC_AMPCAP_MUTE_SHIFT));
3458
3cc08dc6
MP		 3459 return 0;
3460}
3461
3462static int patch_stac927x(struct hda_codec *codec)
3463{
3464 struct sigmatel_spec *spec;
3465 int err;
3466
3467 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3468 if (spec == NULL)
3469 return -ENOMEM;
3470
3471 codec->spec = spec;
a4eed138 3472 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3473 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3474 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3475 stac927x_models,
3476 stac927x_cfg_tbl);
9e507abd 3477 again:
8e9068b1
MR		 3478 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3479 if (spec->board_config < 0)
3480 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3481 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3482 err = stac92xx_save_bios_config_regs(codec);
3483 if (err < 0) {
3484 stac92xx_free(codec);
3485 return err;
3486 }
3487 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3488 } else {
3cc08dc6
MP		 3489 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3490 stac92xx_set_config_regs(codec);
3491 }
3492
8e9068b1
MR		 3493 spec->adc_nids = stac927x_adc_nids;
3494 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3495 spec->mux_nids = stac927x_mux_nids;
3496 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
3497 spec->multiout.dac_nids = spec->dac_nids;
3498
81d3dbde 3499 switch (spec->board_config) {
93ed1503 3500 case STAC_D965_3ST:
93ed1503 3501 case STAC_D965_5ST:
8e9068b1
MR		 3502 /* GPIO0 High = Enable EAPD */
3503 spec->gpio_mask = spec->gpio_data = 0x00000001;
3504 spec->num_dmics = 0;
3505
93ed1503 3506 spec->init = d965_core_init;
9e05b7a3 3507 spec->mixer = stac927x_mixer;
81d3dbde 3508 break;
8e9068b1 3509 case STAC_DELL_BIOS:
2f32d909
MR		 3510 /* correct the front output jack as a hp out */
3511 stac92xx_set_config_reg(codec, 0x0f, 0x02270110);
c481fca3
MR		 3512 /* correct the front input jack as a mic */
3513 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3514 /* fallthru */
8e9068b1
MR		 3515 case STAC_DELL_3ST:
3516 /* GPIO2 High = Enable EAPD */
3517 spec->gpio_mask = spec->gpio_data = 0x00000004;
7f16859a
MR		 3518 spec->dmic_nids = stac927x_dmic_nids;
3519 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3520
8e9068b1
MR		 3521 spec->init = d965_core_init;
3522 spec->mixer = stac927x_mixer;
3523 spec->dmux_nids = stac927x_dmux_nids;
1697055e 3524 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 3525 break;
3526 default:
f1f208d0
MR		 3527 /* GPIO0 High = Enable EAPD */
3528 spec->gpio_mask = spec->gpio_data = 0x00000001;
8e9068b1
MR		 3529 spec->num_dmics = 0;
3530
3531 spec->init = stac927x_core_init;
3532 spec->mixer = stac927x_mixer;
7f16859a
MR		 3533 }
3534
a64135a2 3535 spec->num_pwrs = 0;
e1f0d669
MR		 3536 spec->aloopback_mask = 0x40;
3537 spec->aloopback_shift = 0;
8e9068b1 3538
3cc08dc6 3539 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3540 if (!err) {
3541 if (spec->board_config < 0) {
3542 printk(KERN_WARNING "hda_codec: No auto-config is "
3543 "available, default to model=ref\n");
3544 spec->board_config = STAC_D965_REF;
3545 goto again;
3546 }
3547 err = -EINVAL;
3548 }
c7d4b2fa
M		 3549 if (err < 0) {
3550 stac92xx_free(codec);
3551 return err;
3552 }
2f2f4251
M		 3553
3554 codec->patch_ops = stac92xx_patch_ops;
3555
52987656
TI		 3556 /*
3557 * !!FIXME!!
3558 * The STAC927x seem to require fairly long delays for certain
3559 * command sequences. With too short delays (even if the answer
3560 * is set to RIRB properly), it results in the silence output
3561 * on some hardwares like Dell.
3562 *
3563 * The below flag enables the longer delay (see get_response
3564 * in hda_intel.c).
3565 */
3566 codec->bus->needs_damn_long_delay = 1;
3567
2f2f4251
M		 3568 return 0;
3569}
3570
f3302a59
MP		 3571static int patch_stac9205(struct hda_codec *codec)
3572{
3573 struct sigmatel_spec *spec;
8259980e 3574 int err;
f3302a59
MP		 3575
3576 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3577 if (spec == NULL)
3578 return -ENOMEM;
3579
3580 codec->spec = spec;
a4eed138 3581 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3582 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3583 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3584 stac9205_models,
3585 stac9205_cfg_tbl);
9e507abd 3586 again:
11b44bbd
RF		 3587 if (spec->board_config < 0) {
3588 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3589 err = stac92xx_save_bios_config_regs(codec);
3590 if (err < 0) {
3591 stac92xx_free(codec);
3592 return err;
3593 }
3594 spec->pin_configs = spec->bios_pin_configs;
3595 } else {
f3302a59
MP		 3596 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3597 stac92xx_set_config_regs(codec);
3598 }
3599
3600 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3601 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3602 spec->mux_nids = stac9205_mux_nids;
2549413e 3603 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3604 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3605 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3606 spec->dmux_nids = stac9205_dmux_nids;
1697055e 3607 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 3608 spec->num_pwrs = 0;
f3302a59
MP		 3609
3610 spec->init = stac9205_core_init;
3611 spec->mixer = stac9205_mixer;
3612
e1f0d669
MR		 3613 spec->aloopback_mask = 0x40;
3614 spec->aloopback_shift = 0;
f3302a59 3615 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3616
ae0a8ed8 3617 switch (spec->board_config){
ae0a8ed8 3618 case STAC_9205_DELL_M43:
87d48363
MR		 3619 /* Enable SPDIF in/out */
3620 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3621 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3622
8259980e 3623 spec->gpio_mask = 0x00000007; /* GPIO0-2 */
87d48363
MR		 3624 /* GPIO0 High = EAPD, GPIO1 Low = DRM,
3625 * GPIO2 High = Headphone Mute
3626 */
8259980e 3627 spec->gpio_data = 0x00000005;
ae0a8ed8
TD		 3628 break;
3629 default:
3630 /* GPIO0 High = EAPD */
3631 spec->gpio_mask = spec->gpio_data = 0x00000001;
3632 break;
3633 }
33382403 3634
f3302a59 3635 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 3636 if (!err) {
3637 if (spec->board_config < 0) {
3638 printk(KERN_WARNING "hda_codec: No auto-config is "
3639 "available, default to model=ref\n");
3640 spec->board_config = STAC_9205_REF;
3641 goto again;
3642 }
3643 err = -EINVAL;
3644 }
f3302a59
MP		 3645 if (err < 0) {
3646 stac92xx_free(codec);
3647 return err;
3648 }
3649
3650 codec->patch_ops = stac92xx_patch_ops;
3651
3652 return 0;
3653}
3654
db064e50 3655/*
6d859065 3656 * STAC9872 hack
db064e50
TI		 3657 */
3658
99ccc560 3659/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 3660static hda_nid_t vaio_dacs[] = { 0x2 };
3661#define VAIO_HP_DAC 0x5
3662static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
3663static hda_nid_t vaio_mux_nids[] = { 0x15 };
3664
3665static struct hda_input_mux vaio_mux = {
a3a2f429 3666 .num_items = 3,
db064e50 3667 .items = {
d773781c 3668 /* { "HP", 0x0 }, */
1624cb9a
TI		 3669 { "Mic Jack", 0x1 },
3670 { "Internal Mic", 0x2 },
db064e50
TI		 3671 { "PCM", 0x3 },
3672 }
3673};
3674
3675static struct hda_verb vaio_init[] = {
3676 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 3677 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 3678 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3679 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3680 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3681 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3682 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 3683 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3684 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3685 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3686 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3687 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3688 {}
3689};
3690
6d859065
GM		 3691static struct hda_verb vaio_ar_init[] = {
3692 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
3693 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3694 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3695 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3696/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
3697 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3698 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 3699 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3700 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3701/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
3702 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3703 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3704 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3705 {}
3706};
3707
db064e50 3708/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3709static struct hda_bind_ctls vaio_bind_master_vol = {
3710 .ops = &snd_hda_bind_vol,
3711 .values = {
3712 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3713 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3714 0
3715 },
3716};
db064e50
TI		 3717
3718/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3719static struct hda_bind_ctls vaio_bind_master_sw = {
3720 .ops = &snd_hda_bind_sw,
3721 .values = {
3722 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3723 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3724 0,
3725 },
3726};
db064e50
TI		 3727
3728static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 3729 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3730 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 3731 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3732 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3733 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3734 {
3735 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3736 .name = "Capture Source",
3737 .count = 1,
3738 .info = stac92xx_mux_enum_info,
3739 .get = stac92xx_mux_enum_get,
3740 .put = stac92xx_mux_enum_put,
3741 },
3742 {}
3743};
3744
6d859065 3745static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 3746 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3747 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 3748 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3749 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3750 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3751 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
3752 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
3753 {
3754 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3755 .name = "Capture Source",
3756 .count = 1,
3757 .info = stac92xx_mux_enum_info,
3758 .get = stac92xx_mux_enum_get,
3759 .put = stac92xx_mux_enum_put,
3760 },
3761 {}
3762};
3763
3764static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 3765 .build_controls = stac92xx_build_controls,
3766 .build_pcms = stac92xx_build_pcms,
3767 .init = stac92xx_init,
3768 .free = stac92xx_free,
cb53c626 3769#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 3770 .resume = stac92xx_resume,
3771#endif
3772};
3773
72e7b0dd
TI		 3774static int stac9872_vaio_init(struct hda_codec *codec)
3775{
3776 int err;
3777
3778 err = stac92xx_init(codec);
3779 if (err < 0)
3780 return err;
3781 if (codec->patch_ops.unsol_event)
3782 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3783 return 0;
3784}
3785
3786static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
3787{
40c1d308 3788 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 3789 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3790 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3791 } else {
3792 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3793 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3794 }
3795}
3796
3797static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
3798{
3799 switch (res >> 26) {
3800 case STAC_HP_EVENT:
3801 stac9872_vaio_hp_detect(codec, res);
3802 break;
3803 }
3804}
3805
3806static struct hda_codec_ops stac9872_vaio_patch_ops = {
3807 .build_controls = stac92xx_build_controls,
3808 .build_pcms = stac92xx_build_pcms,
3809 .init = stac9872_vaio_init,
3810 .free = stac92xx_free,
3811 .unsol_event = stac9872_vaio_unsol_event,
3812#ifdef CONFIG_PM
3813 .resume = stac92xx_resume,
3814#endif
3815};
3816
6d859065
GM		 3817enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
3818 CXD9872RD_VAIO,
3819 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
3820 STAC9872AK_VAIO,
3821 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
3822 STAC9872K_VAIO,
3823 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 3824 CXD9872AKD_VAIO,
3825 STAC_9872_MODELS,
3826};
3827
3828static const char *stac9872_models[STAC_9872_MODELS] = {
3829 [CXD9872RD_VAIO] = "vaio",
3830 [CXD9872AKD_VAIO] = "vaio-ar",
3831};
3832
3833static struct snd_pci_quirk stac9872_cfg_tbl[] = {
3834 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
3835 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
3836 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 3837 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 3838 {}
3839};
3840
6d859065 3841static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 3842{
3843 struct sigmatel_spec *spec;
3844 int board_config;
3845
f5fcc13c
TI		 3846 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
3847 stac9872_models,
3848 stac9872_cfg_tbl);
db064e50
TI		 3849 if (board_config < 0)
3850 /* unknown config, let generic-parser do its job... */
3851 return snd_hda_parse_generic_codec(codec);
3852
3853 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3854 if (spec == NULL)
3855 return -ENOMEM;
3856
3857 codec->spec = spec;
3858 switch (board_config) {
6d859065
GM		 3859 case CXD9872RD_VAIO:
3860 case STAC9872AK_VAIO:
3861 case STAC9872K_VAIO:
db064e50
TI		 3862 spec->mixer = vaio_mixer;
3863 spec->init = vaio_init;
3864 spec->multiout.max_channels = 2;
3865 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3866 spec->multiout.dac_nids = vaio_dacs;
3867 spec->multiout.hp_nid = VAIO_HP_DAC;
3868 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3869 spec->adc_nids = vaio_adcs;
a64135a2 3870 spec->num_pwrs = 0;
db064e50
TI		 3871 spec->input_mux = &vaio_mux;
3872 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3873 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 3874 break;
6d859065
GM		 3875
3876 case CXD9872AKD_VAIO:
3877 spec->mixer = vaio_ar_mixer;
3878 spec->init = vaio_ar_init;
3879 spec->multiout.max_channels = 2;
3880 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3881 spec->multiout.dac_nids = vaio_dacs;
3882 spec->multiout.hp_nid = VAIO_HP_DAC;
3883 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 3884 spec->num_pwrs = 0;
6d859065
GM		 3885 spec->adc_nids = vaio_adcs;
3886 spec->input_mux = &vaio_mux;
3887 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3888 codec->patch_ops = stac9872_patch_ops;
6d859065 3889 break;
db064e50
TI		 3890 }
3891
db064e50
TI		 3892 return 0;
3893}
3894
3895
2f2f4251
M		 3896/*
3897 * patch entries
3898 */
3899struct hda_codec_preset snd_hda_preset_sigmatel[] = {
3900 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
3901 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
3902 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
3903 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
3904 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
3905 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
3906 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 3907 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
3908 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
3909 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
3910 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
3911 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
3912 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 3913 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
3914 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
3915 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
3916 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
3917 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
3918 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
3919 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
3920 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
3921 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
3922 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 3923 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
3924 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
3925 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
3926 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
3927 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
3928 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 3929 /* The following does not take into account .id=0x83847661 when subsys =
3930 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
3931 * currently not fully supported.
3932 */
3933 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
3934 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
3935 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 3936 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
3937 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
3938 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
3939 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
3940 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
3941 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
3942 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
3943 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
541eee87
MR		 3944 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
3945 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 3946 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 3947 { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
3948 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
3949 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
3950 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
3951 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
3952 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
3953 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
3954 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
3955 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 3956 {} /* terminator */
3957};
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