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ALSA: hda - Check model type instead of SSID in patch_92hd71bxx()
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
4e55096e 38#define NUM_CONTROL_ALLOC 32
c39555d6
MR		 39
40#define STAC_VREF_EVENT 0x00
41#define STAC_INSERT_EVENT 0x10
a64135a2
MR		 42#define STAC_PWR_EVENT 0x20
43#define STAC_HP_EVENT 0x30
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
1194b5b7 58 STAC_9200_GATEWAY,
117f257d 59 STAC_9200_PANASONIC,
f5fcc13c
TI		 60 STAC_9200_MODELS
61};
62
63enum {
64 STAC_9205_REF,
dfe495d0 65 STAC_9205_DELL_M42,
ae0a8ed8
TD		 66 STAC_9205_DELL_M43,
67 STAC_9205_DELL_M44,
f5fcc13c
TI		 68 STAC_9205_MODELS
69};
70
e1f0d669
MR		 71enum {
72 STAC_92HD73XX_REF,
a7662640 73 STAC_DELL_M6,
6b3ab21e 74 STAC_DELL_EQ,
e1f0d669
MR		 75 STAC_92HD73XX_MODELS
76};
77
d0513fc6
MR		 78enum {
79 STAC_92HD83XXX_REF,
80 STAC_92HD83XXX_MODELS
81};
82
e035b841
MR		 83enum {
84 STAC_92HD71BXX_REF,
a7662640
MR		 85 STAC_DELL_M4_1,
86 STAC_DELL_M4_2,
6a14f585 87 STAC_HP_M4,
e035b841
MR		 88 STAC_92HD71BXX_MODELS
89};
90
8e21c34c
TD		 91enum {
92 STAC_925x_REF,
93 STAC_M2_2,
94 STAC_MA6,
2c11f955 95 STAC_PA6,
8e21c34c
TD		 96 STAC_925x_MODELS
97};
98
f5fcc13c
TI		 99enum {
100 STAC_D945_REF,
101 STAC_D945GTP3,
102 STAC_D945GTP5,
5d5d3bc3
IZ		 103 STAC_INTEL_MAC_V1,
104 STAC_INTEL_MAC_V2,
105 STAC_INTEL_MAC_V3,
106 STAC_INTEL_MAC_V4,
107 STAC_INTEL_MAC_V5,
536319af
NB		 108 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
109 * is given, one of the above models will be
110 * chosen according to the subsystem id. */
dfe495d0 111 /* for backward compatibility */
f5fcc13c 112 STAC_MACMINI,
3fc24d85 113 STAC_MACBOOK,
6f0778d8
NB		 114 STAC_MACBOOK_PRO_V1,
115 STAC_MACBOOK_PRO_V2,
f16928fb 116 STAC_IMAC_INTEL,
0dae0f83 117 STAC_IMAC_INTEL_20,
8c650087 118 STAC_ECS_202,
dfe495d0
TI		 119 STAC_922X_DELL_D81,
120 STAC_922X_DELL_D82,
121 STAC_922X_DELL_M81,
122 STAC_922X_DELL_M82,
f5fcc13c
TI		 123 STAC_922X_MODELS
124};
125
126enum {
127 STAC_D965_REF,
128 STAC_D965_3ST,
129 STAC_D965_5ST,
4ff076e5 130 STAC_DELL_3ST,
8e9068b1 131 STAC_DELL_BIOS,
f5fcc13c
TI		 132 STAC_927X_MODELS
133};
403d1944 134
2f2f4251 135struct sigmatel_spec {
c8b6bf9b 136 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 137 unsigned int num_mixers;
138
403d1944 139 int board_config;
c7d4b2fa 140 unsigned int surr_switch: 1;
403d1944
MP		 141 unsigned int line_switch: 1;
142 unsigned int mic_switch: 1;
3cc08dc6 143 unsigned int alt_switch: 1;
82bc955f 144 unsigned int hp_detect: 1;
00ef50c2 145 unsigned int spdif_mute: 1;
c7d4b2fa 146
4fe5195c 147 /* gpio lines */
0fc9dec4 148 unsigned int eapd_mask;
4fe5195c
MR		 149 unsigned int gpio_mask;
150 unsigned int gpio_dir;
151 unsigned int gpio_data;
152 unsigned int gpio_mute;
153
8daaaa97
MR		 154 /* stream */
155 unsigned int stream_delay;
156
4fe5195c 157 /* analog loopback */
e1f0d669
MR		 158 unsigned char aloopback_mask;
159 unsigned char aloopback_shift;
8259980e 160
a64135a2
MR		 161 /* power management */
162 unsigned int num_pwrs;
d0513fc6 163 unsigned int *pwr_mapping;
a64135a2 164 hda_nid_t *pwr_nids;
b76c850f 165 hda_nid_t *dac_list;
a64135a2 166
2f2f4251 167 /* playback */
b22b4821 168 struct hda_input_mux *mono_mux;
89385035 169 struct hda_input_mux *amp_mux;
b22b4821 170 unsigned int cur_mmux;
2f2f4251 171 struct hda_multi_out multiout;
3cc08dc6 172 hda_nid_t dac_nids[5];
2f2f4251
M		 173
174 /* capture */
175 hda_nid_t *adc_nids;
2f2f4251 176 unsigned int num_adcs;
dabbed6f
M		 177 hda_nid_t *mux_nids;
178 unsigned int num_muxes;
8b65727b
MP		 179 hda_nid_t *dmic_nids;
180 unsigned int num_dmics;
e1f0d669 181 hda_nid_t *dmux_nids;
1697055e 182 unsigned int num_dmuxes;
d9737751
MR		 183 hda_nid_t *smux_nids;
184 unsigned int num_smuxes;
65973632 185 const char **spdif_labels;
d9737751 186
dabbed6f 187 hda_nid_t dig_in_nid;
b22b4821 188 hda_nid_t mono_nid;
1cd2224c
MR		 189 hda_nid_t anabeep_nid;
190 hda_nid_t digbeep_nid;
2f2f4251 191
2f2f4251
M		 192 /* pin widgets */
193 hda_nid_t *pin_nids;
194 unsigned int num_pins;
2f2f4251 195 unsigned int *pin_configs;
11b44bbd 196 unsigned int *bios_pin_configs;
2f2f4251
M		 197
198 /* codec specific stuff */
199 struct hda_verb *init;
c8b6bf9b 200 struct snd_kcontrol_new *mixer;
2f2f4251
M		 201
202 /* capture source */
8b65727b 203 struct hda_input_mux *dinput_mux;
e1f0d669 204 unsigned int cur_dmux[2];
c7d4b2fa 205 struct hda_input_mux *input_mux;
3cc08dc6 206 unsigned int cur_mux[3];
d9737751
MR		 207 struct hda_input_mux *sinput_mux;
208 unsigned int cur_smux[2];
2a9c7816
MR		 209 unsigned int cur_amux;
210 hda_nid_t *amp_nids;
211 unsigned int num_amps;
8daaaa97 212 unsigned int powerdown_adcs;
2f2f4251 213
403d1944
MP		 214 /* i/o switches */
215 unsigned int io_switch[2];
0fb87bb4 216 unsigned int clfe_swap;
d7a89436 217 unsigned int hp_switch; /* NID of HP as line-out */
5f10c4a9 218 unsigned int aloopback;
2f2f4251 219
c7d4b2fa
M		 220 struct hda_pcm pcm_rec[2]; /* PCM information */
221
222 /* dynamic controls and input_mux */
223 struct auto_pin_cfg autocfg;
224 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 225 struct snd_kcontrol_new *kctl_alloc;
8b65727b 226 struct hda_input_mux private_dimux;
c7d4b2fa 227 struct hda_input_mux private_imux;
d9737751 228 struct hda_input_mux private_smux;
89385035 229 struct hda_input_mux private_amp_mux;
b22b4821 230 struct hda_input_mux private_mono_mux;
2f2f4251
M		 231};
232
233static hda_nid_t stac9200_adc_nids[1] = {
234 0x03,
235};
236
237static hda_nid_t stac9200_mux_nids[1] = {
238 0x0c,
239};
240
241static hda_nid_t stac9200_dac_nids[1] = {
242 0x02,
243};
244
a64135a2
MR		 245static hda_nid_t stac92hd73xx_pwr_nids[8] = {
246 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
247 0x0f, 0x10, 0x11
248};
249
0ffa9807
MR		 250static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
251 0x26, 0,
252};
253
e1f0d669
MR		 254static hda_nid_t stac92hd73xx_adc_nids[2] = {
255 0x1a, 0x1b
256};
257
2a9c7816
MR		 258#define DELL_M6_AMP 2
259static hda_nid_t stac92hd73xx_amp_nids[3] = {
260 0x0b, 0x0c, 0x0e
89385035
MR		 261};
262
e1f0d669
MR		 263#define STAC92HD73XX_NUM_DMICS 2
264static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
265 0x13, 0x14, 0
266};
267
268#define STAC92HD73_DAC_COUNT 5
269static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
270 0x15, 0x16, 0x17, 0x18, 0x19,
271};
272
273static hda_nid_t stac92hd73xx_mux_nids[4] = {
274 0x28, 0x29, 0x2a, 0x2b,
275};
276
277static hda_nid_t stac92hd73xx_dmux_nids[2] = {
278 0x20, 0x21,
279};
280
d9737751
MR		 281static hda_nid_t stac92hd73xx_smux_nids[2] = {
282 0x22, 0x23,
283};
284
d0513fc6
MR		 285#define STAC92HD83XXX_NUM_DMICS 2
286static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
287 0x11, 0x12, 0
288};
289
290#define STAC92HD81_DAC_COUNT 2
291#define STAC92HD83_DAC_COUNT 3
292static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
293 0x13, 0x14, 0x22,
294};
295
296static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
297 0x17, 0x18,
298};
299
300static hda_nid_t stac92hd83xxx_adc_nids[2] = {
301 0x15, 0x16,
302};
303
304static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
305 0xa, 0xb, 0xd, 0xe,
306};
307
0ffa9807
MR		 308static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
309 0x1e, 0,
310};
311
d0513fc6
MR		 312static unsigned int stac92hd83xxx_pwr_mapping[4] = {
313 0x03, 0x0c, 0x10, 0x40,
314};
315
a64135a2
MR		 316static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
317 0x0a, 0x0d, 0x0f
318};
319
e035b841
MR		 320static hda_nid_t stac92hd71bxx_adc_nids[2] = {
321 0x12, 0x13,
322};
323
324static hda_nid_t stac92hd71bxx_mux_nids[2] = {
325 0x1a, 0x1b
326};
327
4b33c767
MR		 328static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
329 0x1c, 0x1d,
e1f0d669
MR		 330};
331
d9737751
MR		 332static hda_nid_t stac92hd71bxx_smux_nids[2] = {
333 0x24, 0x25,
334};
335
aea7bb0a 336static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 337 0x10, /*0x11, */
338};
339
340#define STAC92HD71BXX_NUM_DMICS 2
341static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
342 0x18, 0x19, 0
343};
344
0ffa9807
MR		 345static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
346 0x22, 0
347};
348
8e21c34c
TD		 349static hda_nid_t stac925x_adc_nids[1] = {
350 0x03,
351};
352
353static hda_nid_t stac925x_mux_nids[1] = {
354 0x0f,
355};
356
357static hda_nid_t stac925x_dac_nids[1] = {
358 0x02,
359};
360
f6e9852a
TI		 361#define STAC925X_NUM_DMICS 1
362static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
363 0x15, 0
2c11f955
TD		 364};
365
1697055e
TI		 366static hda_nid_t stac925x_dmux_nids[1] = {
367 0x14,
368};
369
2f2f4251
M		 370static hda_nid_t stac922x_adc_nids[2] = {
371 0x06, 0x07,
372};
373
374static hda_nid_t stac922x_mux_nids[2] = {
375 0x12, 0x13,
376};
377
3cc08dc6
MP		 378static hda_nid_t stac927x_adc_nids[3] = {
379 0x07, 0x08, 0x09
380};
381
382static hda_nid_t stac927x_mux_nids[3] = {
383 0x15, 0x16, 0x17
384};
385
d9737751
MR		 386static hda_nid_t stac927x_smux_nids[1] = {
387 0x21,
388};
389
b76c850f
MR		 390static hda_nid_t stac927x_dac_nids[6] = {
391 0x02, 0x03, 0x04, 0x05, 0x06, 0
392};
393
e1f0d669
MR		 394static hda_nid_t stac927x_dmux_nids[1] = {
395 0x1b,
396};
397
7f16859a
MR		 398#define STAC927X_NUM_DMICS 2
399static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
400 0x13, 0x14, 0
401};
402
65973632
MR		 403static const char *stac927x_spdif_labels[5] = {
404 "Digital Playback", "ADAT", "Analog Mux 1",
405 "Analog Mux 2", "Analog Mux 3"
406};
407
f3302a59
MP		 408static hda_nid_t stac9205_adc_nids[2] = {
409 0x12, 0x13
410};
411
412static hda_nid_t stac9205_mux_nids[2] = {
413 0x19, 0x1a
414};
415
e1f0d669 416static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 417 0x1d,
e1f0d669
MR		 418};
419
d9737751
MR		 420static hda_nid_t stac9205_smux_nids[1] = {
421 0x21,
422};
423
f6e9852a
TI		 424#define STAC9205_NUM_DMICS 2
425static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
426 0x17, 0x18, 0
8b65727b
MP		 427};
428
c7d4b2fa 429static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 430 0x08, 0x09, 0x0d, 0x0e,
431 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 432};
433
8e21c34c
TD		 434static hda_nid_t stac925x_pin_nids[8] = {
435 0x07, 0x08, 0x0a, 0x0b,
436 0x0c, 0x0d, 0x10, 0x11,
437};
438
2f2f4251
M		 439static hda_nid_t stac922x_pin_nids[10] = {
440 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
441 0x0f, 0x10, 0x11, 0x15, 0x1b,
442};
443
a7662640 444static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 445 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
446 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 447 0x14, 0x22, 0x23
e1f0d669
MR		 448};
449
d0513fc6
MR		 450static hda_nid_t stac92hd83xxx_pin_nids[14] = {
451 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
452 0x0f, 0x10, 0x11, 0x12, 0x13,
453 0x1d, 0x1e, 0x1f, 0x20
454};
0ffa9807 455static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 456 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
457 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 458 0x1f,
e035b841
MR		 459};
460
3cc08dc6
MP		 461static hda_nid_t stac927x_pin_nids[14] = {
462 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
463 0x0f, 0x10, 0x11, 0x12, 0x13,
464 0x14, 0x21, 0x22, 0x23,
465};
466
f3302a59
MP		 467static hda_nid_t stac9205_pin_nids[12] = {
468 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
469 0x0f, 0x14, 0x16, 0x17, 0x18,
470 0x21, 0x22,
f3302a59
MP		 471};
472
89385035
MR		 473#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
474
475static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
476 struct snd_ctl_elem_value *ucontrol)
477{
478 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
479 struct sigmatel_spec *spec = codec->spec;
480 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
481
482 kcontrol->private_value ^= get_amp_nid(kcontrol);
483 kcontrol->private_value |= nid;
484
485 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
486}
487
488static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
489 struct snd_ctl_elem_value *ucontrol)
490{
491 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
492 struct sigmatel_spec *spec = codec->spec;
493 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
494
495 kcontrol->private_value ^= get_amp_nid(kcontrol);
496 kcontrol->private_value |= nid;
497
498 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
499}
500
8b65727b
MP		 501static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
502 struct snd_ctl_elem_info *uinfo)
503{
504 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
505 struct sigmatel_spec *spec = codec->spec;
506 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
507}
508
509static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
510 struct snd_ctl_elem_value *ucontrol)
511{
512 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
513 struct sigmatel_spec *spec = codec->spec;
e1f0d669 514 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 515
e1f0d669 516 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 517 return 0;
518}
519
520static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
521 struct snd_ctl_elem_value *ucontrol)
522{
523 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
524 struct sigmatel_spec *spec = codec->spec;
e1f0d669 525 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 526
527 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 528 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 529}
530
d9737751
MR		 531static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
532 struct snd_ctl_elem_info *uinfo)
533{
534 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
535 struct sigmatel_spec *spec = codec->spec;
536 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
537}
538
539static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
540 struct snd_ctl_elem_value *ucontrol)
541{
542 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
543 struct sigmatel_spec *spec = codec->spec;
544 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
545
546 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
547 return 0;
548}
549
550static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
551 struct snd_ctl_elem_value *ucontrol)
552{
553 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
554 struct sigmatel_spec *spec = codec->spec;
00ef50c2 555 struct hda_input_mux *smux = &spec->private_smux;
d9737751 556 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 557 int err, val;
558 hda_nid_t nid;
d9737751 559
00ef50c2 560 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 561 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 562 if (err < 0)
563 return err;
564
565 if (spec->spdif_mute) {
566 if (smux_idx == 0)
567 nid = spec->multiout.dig_out_nid;
568 else
569 nid = codec->slave_dig_outs[smux_idx - 1];
570 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
571 val = AMP_OUT_MUTE;
00ef50c2 572 else
c1e99bd9 573 val = AMP_OUT_UNMUTE;
00ef50c2
MR		 574 /* un/mute SPDIF out */
575 snd_hda_codec_write_cache(codec, nid, 0,
576 AC_VERB_SET_AMP_GAIN_MUTE, val);
577 }
578 return 0;
d9737751
MR		 579}
580
c8b6bf9b 581static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 582{
583 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
584 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 585 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 586}
587
c8b6bf9b 588static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 589{
590 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
591 struct sigmatel_spec *spec = codec->spec;
592 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
593
594 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
595 return 0;
596}
597
c8b6bf9b 598static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 599{
600 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
601 struct sigmatel_spec *spec = codec->spec;
602 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
603
c7d4b2fa 604 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 605 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
606}
607
b22b4821
MR		 608static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
609 struct snd_ctl_elem_info *uinfo)
610{
611 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
612 struct sigmatel_spec *spec = codec->spec;
613 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
614}
615
616static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
617 struct snd_ctl_elem_value *ucontrol)
618{
619 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
620 struct sigmatel_spec *spec = codec->spec;
621
622 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
623 return 0;
624}
625
626static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
627 struct snd_ctl_elem_value *ucontrol)
628{
629 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
630 struct sigmatel_spec *spec = codec->spec;
631
632 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
633 spec->mono_nid, &spec->cur_mmux);
634}
635
89385035
MR		 636static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
637 struct snd_ctl_elem_info *uinfo)
638{
639 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
640 struct sigmatel_spec *spec = codec->spec;
641 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
642}
643
644static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
645 struct snd_ctl_elem_value *ucontrol)
646{
647 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
648 struct sigmatel_spec *spec = codec->spec;
649
650 ucontrol->value.enumerated.item[0] = spec->cur_amux;
651 return 0;
652}
653
654static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
655 struct snd_ctl_elem_value *ucontrol)
656{
657 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
658 struct sigmatel_spec *spec = codec->spec;
659 struct snd_kcontrol *ctl =
660 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
661 if (!ctl)
662 return -EINVAL;
663
664 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
665 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
666
667 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
668 0, &spec->cur_amux);
669}
670
5f10c4a9
ML		 671#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
672
673static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
674 struct snd_ctl_elem_value *ucontrol)
675{
676 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 677 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 678 struct sigmatel_spec *spec = codec->spec;
679
e1f0d669
MR		 680 ucontrol->value.integer.value[0] = !!(spec->aloopback &
681 (spec->aloopback_mask << idx));
5f10c4a9
ML		 682 return 0;
683}
684
685static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
686 struct snd_ctl_elem_value *ucontrol)
687{
688 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
689 struct sigmatel_spec *spec = codec->spec;
e1f0d669 690 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 691 unsigned int dac_mode;
e1f0d669 692 unsigned int val, idx_val;
5f10c4a9 693
e1f0d669
MR		 694 idx_val = spec->aloopback_mask << idx;
695 if (ucontrol->value.integer.value[0])
696 val = spec->aloopback | idx_val;
697 else
698 val = spec->aloopback & ~idx_val;
68ea7b2f 699 if (spec->aloopback == val)
5f10c4a9
ML		 700 return 0;
701
68ea7b2f 702 spec->aloopback = val;
5f10c4a9 703
e1f0d669
MR		 704 /* Only return the bits defined by the shift value of the
705 * first two bytes of the mask
706 */
5f10c4a9 707 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 708 kcontrol->private_value & 0xFFFF, 0x0);
709 dac_mode >>= spec->aloopback_shift;
5f10c4a9 710
e1f0d669 711 if (spec->aloopback & idx_val) {
5f10c4a9 712 snd_hda_power_up(codec);
e1f0d669 713 dac_mode |= idx_val;
5f10c4a9
ML		 714 } else {
715 snd_hda_power_down(codec);
e1f0d669 716 dac_mode &= ~idx_val;
5f10c4a9
ML		 717 }
718
719 snd_hda_codec_write_cache(codec, codec->afg, 0,
720 kcontrol->private_value >> 16, dac_mode);
721
722 return 1;
723}
724
c7d4b2fa 725static struct hda_verb stac9200_core_init[] = {
2f2f4251 726 /* set dac0mux for dac converter */
c7d4b2fa 727 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 728 {}
729};
730
1194b5b7
TI		 731static struct hda_verb stac9200_eapd_init[] = {
732 /* set dac0mux for dac converter */
733 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
734 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
735 {}
736};
737
e1f0d669
MR		 738static struct hda_verb stac92hd73xx_6ch_core_init[] = {
739 /* set master volume and direct control */
740 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
741 /* setup audio connections */
742 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
743 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
744 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
745 /* setup adcs to point to mixer */
746 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
747 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 748 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
749 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
750 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
751 /* setup import muxs */
752 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
753 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
754 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
755 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
756 {}
757};
758
d654a660
MR		 759static struct hda_verb dell_eq_core_init[] = {
760 /* set master volume to max value without distortion
761 * and direct control */
762 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
763 /* setup audio connections */
764 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 765 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
766 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 767 /* setup adcs to point to mixer */
768 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
769 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
770 /* setup import muxs */
771 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
772 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
773 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
774 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
775 {}
776};
777
52fe0f9d 778static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 779 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d 780 /* setup audio connections */
7747ecce
MR		 781 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
782 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 783 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
784 /* setup adcs to point to mixer */
785 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
786 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
787 /* setup import muxs */
788 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
789 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
790 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
791 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
792 {}
793};
794
e1f0d669
MR		 795static struct hda_verb stac92hd73xx_8ch_core_init[] = {
796 /* set master volume and direct control */
797 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
798 /* setup audio connections */
799 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
800 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
801 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
802 /* connect hp ports to dac3 */
803 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
804 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
805 /* setup adcs to point to mixer */
806 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
807 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 808 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
809 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
810 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
811 /* setup import muxs */
812 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
813 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
814 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
815 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
816 {}
817};
818
819static struct hda_verb stac92hd73xx_10ch_core_init[] = {
820 /* set master volume and direct control */
821 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
822 /* setup audio connections */
823 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
824 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
825 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
826 /* dac3 is connected to import3 mux */
827 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
828 /* connect hp ports to dac4 */
829 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
830 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
831 /* setup adcs to point to mixer */
832 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
833 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 834 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
835 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
836 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
837 /* setup import muxs */
838 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
839 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
840 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
841 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
842 {}
843};
844
d0513fc6
MR		 845static struct hda_verb stac92hd83xxx_core_init[] = {
846 /* start of config #1 */
847 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
848
849 /* start of config #2 */
850 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
851 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
852 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
853
854 /* power state controls amps */
855 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
856};
857
e035b841 858static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 859 /* set master volume and direct control */
860 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
861 /* connect headphone jack to dac1 */
862 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
541eee87
MR		 863 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
864 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
865 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
866 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 867};
868
4b33c767 869#define HD_DISABLE_PORTF 2
541eee87 870static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 871 /* start of config #1 */
872
873 /* connect port 0f to audio mixer */
874 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 875 /* unmute right and left channels for node 0x0f */
876 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
877 /* start of config #2 */
878
e035b841
MR		 879 /* set master volume and direct control */
880 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
881 /* connect headphone jack to dac1 */
882 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 883 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 884 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
885 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 886 {}
887};
888
8e21c34c
TD		 889static struct hda_verb stac925x_core_init[] = {
890 /* set dac0mux for dac converter */
891 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
892 {}
893};
894
c7d4b2fa 895static struct hda_verb stac922x_core_init[] = {
2f2f4251 896 /* set master volume and direct control */
c7d4b2fa 897 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 898 {}
899};
900
93ed1503 901static struct hda_verb d965_core_init[] = {
19039bd0 902 /* set master volume and direct control */
93ed1503 903 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 904 /* unmute node 0x1b */
905 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
906 /* select node 0x03 as DAC */
907 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
908 {}
909};
910
3cc08dc6
MP		 911static struct hda_verb stac927x_core_init[] = {
912 /* set master volume and direct control */
913 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 914 /* enable analog pc beep path */
915 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 916 {}
917};
918
f3302a59
MP		 919static struct hda_verb stac9205_core_init[] = {
920 /* set master volume and direct control */
921 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 922 /* enable analog pc beep path */
923 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 924 {}
925};
926
b22b4821
MR		 927#define STAC_MONO_MUX \
928 { \
929 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
930 .name = "Mono Mux", \
931 .count = 1, \
932 .info = stac92xx_mono_mux_enum_info, \
933 .get = stac92xx_mono_mux_enum_get, \
934 .put = stac92xx_mono_mux_enum_put, \
935 }
936
89385035
MR		 937#define STAC_AMP_MUX \
938 { \
939 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
940 .name = "Amp Selector Capture Switch", \
941 .count = 1, \
942 .info = stac92xx_amp_mux_enum_info, \
943 .get = stac92xx_amp_mux_enum_get, \
944 .put = stac92xx_amp_mux_enum_put, \
945 }
946
947#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
948 { \
949 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
950 .name = xname, \
951 .index = 0, \
952 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
953 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
954 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
955 .info = stac92xx_amp_volume_info, \
956 .get = stac92xx_amp_volume_get, \
957 .put = stac92xx_amp_volume_put, \
958 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
959 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
960 }
961
9e05b7a3 962#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 963 { \
964 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
965 .name = "Input Source", \
9e05b7a3 966 .count = cnt, \
ca7c5a8b
ML		 967 .info = stac92xx_mux_enum_info, \
968 .get = stac92xx_mux_enum_get, \
969 .put = stac92xx_mux_enum_put, \
970 }
971
e1f0d669 972#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 973 { \
974 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
975 .name = "Analog Loopback", \
e1f0d669 976 .count = cnt, \
5f10c4a9
ML		 977 .info = stac92xx_aloopback_info, \
978 .get = stac92xx_aloopback_get, \
979 .put = stac92xx_aloopback_put, \
980 .private_value = verb_read | (verb_write << 16), \
981 }
982
c8b6bf9b 983static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 984 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
985 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 986 STAC_INPUT_SOURCE(1),
2f2f4251
M		 987 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
988 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 989 { } /* end */
990};
991
2a9c7816 992#define DELL_M6_MIXER 6
e1f0d669 993static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 994 /* start of config #1 */
e1f0d669
MR		 995 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
996 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
997
e1f0d669
MR		 998 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
999 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1000
2a9c7816
MR		 1001 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1002 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1003
1004 /* start of config #2 */
1005 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1006 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1007
e1f0d669
MR		 1008 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1009 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1010
2a9c7816
MR		 1011 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1012
1013 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1014 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1015
1016 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1017 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1018
e1f0d669
MR		 1019 { } /* end */
1020};
1021
1022static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1023 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1024
e1f0d669
MR		 1025 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1026 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1027
1028 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1029 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1030
1031 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1032 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1033
1034 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1035 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1036
1037 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1038 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1039
1040 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1041 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1042
1043 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1044 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1045 { } /* end */
1046};
1047
1048static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1049 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1050
e1f0d669
MR		 1051 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1052 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1053
1054 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1055 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1056
1057 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1058 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1059
1060 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1061 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1062
1063 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1064 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1065
1066 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1067 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1068
1069 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1070 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1071 { } /* end */
1072};
1073
d0513fc6
MR		 1074
1075static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1076 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1077 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1078
1079 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1080 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1081
1082 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1083 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1084
1085 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1086 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1087
1088 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1089 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1090
1091 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1092 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1093
1094 /*
1095 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1096 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1097 */
1098 { } /* end */
1099};
1100
541eee87 1101static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1102 STAC_INPUT_SOURCE(2),
4b33c767 1103 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1104
9b35947f
MR		 1105 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1106 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1107
1108 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1109 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1110 /* analog pc-beep replaced with digital beep support */
1111 /*
f7c5dda2
MR		 1112 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1113 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1114 */
f7c5dda2 1115
687cb98e
MR		 1116 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1117 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1118
687cb98e
MR		 1119 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1120 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1121
1122 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1123 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1124
1125 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1126 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1127 { } /* end */
1128};
1129
541eee87 1130static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1131 STAC_INPUT_SOURCE(2),
1132 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1133
541eee87
MR		 1134 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1135 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1136
1137 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1138 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1139 { } /* end */
1140};
1141
8e21c34c 1142static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1143 STAC_INPUT_SOURCE(1),
8e21c34c 1144 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1145 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1146 { } /* end */
1147};
1148
9e05b7a3 1149static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1150 STAC_INPUT_SOURCE(2),
e1f0d669 1151 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1152
1153 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1154 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1155
1156 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1157 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1158 { } /* end */
1159};
1160
19039bd0 1161/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1162static struct snd_kcontrol_new stac922x_mixer[] = {
1163 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1164 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1165 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1166
1167 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1168 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1169 { } /* end */
1170};
1171
9e05b7a3 1172
d1d985f0 1173static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1174 STAC_INPUT_SOURCE(3),
e1f0d669 1175 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1176
9e05b7a3
ML		 1177 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1178 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1179
1180 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1181 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1182
1183 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1184 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1185 { } /* end */
1186};
1187
1697055e
TI		 1188static struct snd_kcontrol_new stac_dmux_mixer = {
1189 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1190 .name = "Digital Input Source",
1191 /* count set later */
1192 .info = stac92xx_dmux_enum_info,
1193 .get = stac92xx_dmux_enum_get,
1194 .put = stac92xx_dmux_enum_put,
1195};
1196
d9737751
MR		 1197static struct snd_kcontrol_new stac_smux_mixer = {
1198 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1199 .name = "IEC958 Playback Source",
d9737751
MR		 1200 /* count set later */
1201 .info = stac92xx_smux_enum_info,
1202 .get = stac92xx_smux_enum_get,
1203 .put = stac92xx_smux_enum_put,
1204};
1205
2134ea4f
TI		 1206static const char *slave_vols[] = {
1207 "Front Playback Volume",
1208 "Surround Playback Volume",
1209 "Center Playback Volume",
1210 "LFE Playback Volume",
1211 "Side Playback Volume",
1212 "Headphone Playback Volume",
1213 "Headphone Playback Volume",
1214 "Speaker Playback Volume",
1215 "External Speaker Playback Volume",
1216 "Speaker2 Playback Volume",
1217 NULL
1218};
1219
1220static const char *slave_sws[] = {
1221 "Front Playback Switch",
1222 "Surround Playback Switch",
1223 "Center Playback Switch",
1224 "LFE Playback Switch",
1225 "Side Playback Switch",
1226 "Headphone Playback Switch",
1227 "Headphone Playback Switch",
1228 "Speaker Playback Switch",
1229 "External Speaker Playback Switch",
1230 "Speaker2 Playback Switch",
edb54a55 1231 "IEC958 Playback Switch",
2134ea4f
TI		 1232 NULL
1233};
1234
2f2f4251
M		 1235static int stac92xx_build_controls(struct hda_codec *codec)
1236{
1237 struct sigmatel_spec *spec = codec->spec;
1238 int err;
c7d4b2fa 1239 int i;
2f2f4251
M		 1240
1241 err = snd_hda_add_new_ctls(codec, spec->mixer);
1242 if (err < 0)
1243 return err;
c7d4b2fa
M		 1244
1245 for (i = 0; i < spec->num_mixers; i++) {
1246 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1247 if (err < 0)
1248 return err;
1249 }
1697055e
TI		 1250 if (spec->num_dmuxes > 0) {
1251 stac_dmux_mixer.count = spec->num_dmuxes;
1252 err = snd_ctl_add(codec->bus->card,
1253 snd_ctl_new1(&stac_dmux_mixer, codec));
1254 if (err < 0)
1255 return err;
1256 }
d9737751 1257 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1258 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1259 struct hda_input_mux *smux = &spec->private_smux;
1260 /* check for mute support on SPDIF out */
1261 if (wcaps & AC_WCAP_OUT_AMP) {
1262 smux->items[smux->num_items].label = "Off";
1263 smux->items[smux->num_items].index = 0;
1264 smux->num_items++;
1265 spec->spdif_mute = 1;
1266 }
d9737751
MR		 1267 stac_smux_mixer.count = spec->num_smuxes;
1268 err = snd_ctl_add(codec->bus->card,
1269 snd_ctl_new1(&stac_smux_mixer, codec));
1270 if (err < 0)
1271 return err;
1272 }
c7d4b2fa 1273
dabbed6f
M		 1274 if (spec->multiout.dig_out_nid) {
1275 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1276 if (err < 0)
1277 return err;
9a08160b
TI		 1278 err = snd_hda_create_spdif_share_sw(codec,
1279 &spec->multiout);
1280 if (err < 0)
1281 return err;
1282 spec->multiout.share_spdif = 1;
dabbed6f 1283 }
da74ae3e 1284 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1285 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1286 if (err < 0)
1287 return err;
1288 }
2134ea4f
TI		 1289
1290 /* if we have no master control, let's create it */
1291 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1292 unsigned int vmaster_tlv[4];
2134ea4f 1293 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1294 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1295 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1296 vmaster_tlv, slave_vols);
2134ea4f
TI		 1297 if (err < 0)
1298 return err;
1299 }
1300 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1301 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1302 NULL, slave_sws);
1303 if (err < 0)
1304 return err;
1305 }
1306
dabbed6f 1307 return 0;
2f2f4251
M		 1308}
1309
403d1944 1310static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1311 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1312 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1313};
1314
dfe495d0
TI		 1315/*
1316 STAC 9200 pin configs for
1317 102801A8
1318 102801DE
1319 102801E8
1320*/
1321static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1322 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1323 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1324};
1325
1326/*
1327 STAC 9200 pin configs for
1328 102801C0
1329 102801C1
1330*/
1331static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1332 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1333 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1334};
1335
1336/*
1337 STAC 9200 pin configs for
1338 102801C4 (Dell Dimension E310)
1339 102801C5
1340 102801C7
1341 102801D9
1342 102801DA
1343 102801E3
1344*/
1345static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1346 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1347 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1348};
1349
1350
1351/*
1352 STAC 9200-32 pin configs for
1353 102801B5 (Dell Inspiron 630m)
1354 102801D8 (Dell Inspiron 640m)
1355*/
1356static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1357 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1358 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1359};
1360
1361/*
1362 STAC 9200-32 pin configs for
1363 102801C2 (Dell Latitude D620)
1364 102801C8
1365 102801CC (Dell Latitude D820)
1366 102801D4
1367 102801D6
1368*/
1369static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1370 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1371 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1372};
1373
1374/*
1375 STAC 9200-32 pin configs for
1376 102801CE (Dell XPS M1710)
1377 102801CF (Dell Precision M90)
1378*/
1379static unsigned int dell9200_m23_pin_configs[8] = {
1380 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1381 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1382};
1383
1384/*
1385 STAC 9200-32 pin configs for
1386 102801C9
1387 102801CA
1388 102801CB (Dell Latitude 120L)
1389 102801D3
1390*/
1391static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1392 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1393 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1394};
1395
1396/*
1397 STAC 9200-32 pin configs for
1398 102801BD (Dell Inspiron E1505n)
1399 102801EE
1400 102801EF
1401*/
1402static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1403 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1404 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1405};
1406
1407/*
1408 STAC 9200-32 pin configs for
1409 102801F5 (Dell Inspiron 1501)
1410 102801F6
1411*/
1412static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1413 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1414 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1415};
1416
1417/*
1418 STAC 9200-32
1419 102801CD (Dell Inspiron E1705/9400)
1420*/
1421static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1422 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1423 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1424};
1425
bf277785
TD		 1426static unsigned int oqo9200_pin_configs[8] = {
1427 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1428 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1429};
1430
dfe495d0 1431
f5fcc13c
TI		 1432static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1433 [STAC_REF] = ref9200_pin_configs,
bf277785 1434 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1435 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1436 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1437 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1438 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1439 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1440 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1441 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1442 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1443 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1444 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1445 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1446};
1447
f5fcc13c
TI		 1448static const char *stac9200_models[STAC_9200_MODELS] = {
1449 [STAC_REF] = "ref",
bf277785 1450 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1451 [STAC_9200_DELL_D21] = "dell-d21",
1452 [STAC_9200_DELL_D22] = "dell-d22",
1453 [STAC_9200_DELL_D23] = "dell-d23",
1454 [STAC_9200_DELL_M21] = "dell-m21",
1455 [STAC_9200_DELL_M22] = "dell-m22",
1456 [STAC_9200_DELL_M23] = "dell-m23",
1457 [STAC_9200_DELL_M24] = "dell-m24",
1458 [STAC_9200_DELL_M25] = "dell-m25",
1459 [STAC_9200_DELL_M26] = "dell-m26",
1460 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1461 [STAC_9200_GATEWAY] = "gateway",
117f257d 1462 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1463};
1464
1465static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1466 /* SigmaTel reference board */
1467 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1468 "DFI LanParty", STAC_REF),
e7377071 1469 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1470 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1471 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1472 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1473 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1475 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1477 "unknown Dell", STAC_9200_DELL_D22),
1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1479 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1481 "Dell Latitude D620", STAC_9200_DELL_M22),
1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1483 "unknown Dell", STAC_9200_DELL_D23),
1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1485 "unknown Dell", STAC_9200_DELL_D23),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1487 "unknown Dell", STAC_9200_DELL_M22),
1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1489 "unknown Dell", STAC_9200_DELL_M24),
1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1491 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1493 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1495 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1497 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1499 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1501 "Dell Precision M90", STAC_9200_DELL_M23),
1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1503 "unknown Dell", STAC_9200_DELL_M22),
1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1505 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1507 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1509 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1511 "unknown Dell", STAC_9200_DELL_D23),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1513 "unknown Dell", STAC_9200_DELL_D23),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1515 "unknown Dell", STAC_9200_DELL_D21),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1517 "unknown Dell", STAC_9200_DELL_D23),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1519 "unknown Dell", STAC_9200_DELL_D21),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1521 "unknown Dell", STAC_9200_DELL_M25),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1523 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1525 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1527 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1528 /* Panasonic */
117f257d 1529 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1530 /* Gateway machines needs EAPD to be set on resume */
1531 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1532 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1533 STAC_9200_GATEWAY),
1534 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1535 STAC_9200_GATEWAY),
bf277785
TD		 1536 /* OQO Mobile */
1537 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1538 {} /* terminator */
1539};
1540
8e21c34c
TD		 1541static unsigned int ref925x_pin_configs[8] = {
1542 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1543 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1544};
1545
1546static unsigned int stac925x_MA6_pin_configs[8] = {
1547 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1548 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1549};
1550
2c11f955
TD		 1551static unsigned int stac925x_PA6_pin_configs[8] = {
1552 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1553 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1554};
1555
8e21c34c 1556static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1557 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1558 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1559};
1560
1561static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1562 [STAC_REF] = ref925x_pin_configs,
1563 [STAC_M2_2] = stac925xM2_2_pin_configs,
1564 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1565 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1566};
1567
1568static const char *stac925x_models[STAC_925x_MODELS] = {
1569 [STAC_REF] = "ref",
1570 [STAC_M2_2] = "m2-2",
1571 [STAC_MA6] = "m6",
2c11f955 1572 [STAC_PA6] = "pa6",
8e21c34c
TD		 1573};
1574
1575static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1576 /* SigmaTel reference board */
1577 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1578 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1579 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1580 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1581 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1582 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1583 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1584 {} /* terminator */
1585};
1586
a7662640 1587static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1588 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1589 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1590 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1591 0x01452050,
1592};
1593
1594static unsigned int dell_m6_pin_configs[13] = {
1595 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1596 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1597 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1598 0x4f0000f0,
e1f0d669
MR		 1599};
1600
1601static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1602 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1603 [STAC_DELL_M6] = dell_m6_pin_configs,
6b3ab21e 1604 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1605};
1606
1607static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1608 [STAC_92HD73XX_REF] = "ref",
a7662640 1609 [STAC_DELL_M6] = "dell-m6",
6b3ab21e 1610 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1611};
1612
1613static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1614 /* SigmaTel reference board */
1615 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1616 "DFI LanParty", STAC_92HD73XX_REF),
1617 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1618 "unknown Dell", STAC_DELL_M6),
1619 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1620 "unknown Dell", STAC_DELL_M6),
1621 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1622 "unknown Dell", STAC_DELL_M6),
1623 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1624 "unknown Dell", STAC_DELL_M6),
1625 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1626 "unknown Dell", STAC_DELL_M6),
1627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1628 "unknown Dell", STAC_DELL_M6),
1629 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1630 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1631 {} /* terminator */
1632};
1633
d0513fc6
MR		 1634static unsigned int ref92hd83xxx_pin_configs[14] = {
1635 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1636 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1637 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1638 0x01451160, 0x98560170,
1639};
1640
1641static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1642 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1643};
1644
1645static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1646 [STAC_92HD83XXX_REF] = "ref",
1647};
1648
1649static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1650 /* SigmaTel reference board */
1651 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1652 "DFI LanParty", STAC_92HD71BXX_REF),
1653};
1654
0ffa9807 1655static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1656 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1657 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1658 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1659};
1660
0ffa9807 1661static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1662 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1663 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1664 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1665};
1666
0ffa9807 1667static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1668 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1669 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1670 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1671};
1672
e035b841
MR		 1673static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1674 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1675 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1676 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
6a14f585 1677 [STAC_HP_M4] = NULL,
e035b841
MR		 1678};
1679
1680static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1681 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1682 [STAC_DELL_M4_1] = "dell-m4-1",
1683 [STAC_DELL_M4_2] = "dell-m4-2",
6a14f585 1684 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1685};
1686
1687static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1688 /* SigmaTel reference board */
1689 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1690 "DFI LanParty", STAC_92HD71BXX_REF),
9a9e2359
MR		 1691 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1692 "unknown HP", STAC_HP_M4),
a7662640
MR		 1693 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1694 "unknown Dell", STAC_DELL_M4_1),
1695 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1696 "unknown Dell", STAC_DELL_M4_1),
1697 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1698 "unknown Dell", STAC_DELL_M4_1),
1699 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1700 "unknown Dell", STAC_DELL_M4_1),
1701 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1702 "unknown Dell", STAC_DELL_M4_1),
1703 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1704 "unknown Dell", STAC_DELL_M4_1),
1705 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1706 "unknown Dell", STAC_DELL_M4_1),
1707 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1708 "unknown Dell", STAC_DELL_M4_2),
1709 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1710 "unknown Dell", STAC_DELL_M4_2),
1711 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1712 "unknown Dell", STAC_DELL_M4_2),
1713 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1714 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1715 {} /* terminator */
1716};
1717
403d1944
MP		 1718static unsigned int ref922x_pin_configs[10] = {
1719 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1720 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1721 0x40000100, 0x40000100,
1722};
1723
dfe495d0
TI		 1724/*
1725 STAC 922X pin configs for
1726 102801A7
1727 102801AB
1728 102801A9
1729 102801D1
1730 102801D2
1731*/
1732static unsigned int dell_922x_d81_pin_configs[10] = {
1733 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1734 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1735 0x01813122, 0x400001f2,
1736};
1737
1738/*
1739 STAC 922X pin configs for
1740 102801AC
1741 102801D0
1742*/
1743static unsigned int dell_922x_d82_pin_configs[10] = {
1744 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1745 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1746 0x01813122, 0x400001f1,
1747};
1748
1749/*
1750 STAC 922X pin configs for
1751 102801BF
1752*/
1753static unsigned int dell_922x_m81_pin_configs[10] = {
1754 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1755 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1756 0x40C003f1, 0x405003f0,
1757};
1758
1759/*
1760 STAC 9221 A1 pin configs for
1761 102801D7 (Dell XPS M1210)
1762*/
1763static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1764 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1765 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1766 0x508003f3, 0x405003f4,
1767};
1768
403d1944 1769static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1770 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1771 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1772 0x02a19120, 0x40000100,
1773};
1774
1775static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1776 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1777 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1778 0x02a19320, 0x40000100,
1779};
1780
5d5d3bc3
IZ		 1781static unsigned int intel_mac_v1_pin_configs[10] = {
1782 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1783 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1784 0x400000fc, 0x400000fb,
1785};
1786
1787static unsigned int intel_mac_v2_pin_configs[10] = {
1788 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1789 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1790 0x400000fc, 0x400000fb,
6f0778d8
NB		 1791};
1792
5d5d3bc3
IZ		 1793static unsigned int intel_mac_v3_pin_configs[10] = {
1794 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1795 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1796 0x400000fc, 0x400000fb,
1797};
1798
5d5d3bc3
IZ		 1799static unsigned int intel_mac_v4_pin_configs[10] = {
1800 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1801 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1802 0x400000fc, 0x400000fb,
1803};
1804
5d5d3bc3
IZ		 1805static unsigned int intel_mac_v5_pin_configs[10] = {
1806 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1807 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1808 0x400000fc, 0x400000fb,
0dae0f83
TI		 1809};
1810
8c650087
MCC		 1811static unsigned int ecs202_pin_configs[10] = {
1812 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1813 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1814 0x9037012e, 0x40e000f2,
1815};
76c08828 1816
19039bd0 1817static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1818 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1819 [STAC_D945GTP3] = d945gtp3_pin_configs,
1820 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1821 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1822 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1823 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1824 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1825 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1826 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1827 /* for backward compatibility */
5d5d3bc3
IZ		 1828 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1829 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1830 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1831 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1832 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1833 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1834 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1835 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1836 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1837 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1838 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1839};
1840
f5fcc13c
TI		 1841static const char *stac922x_models[STAC_922X_MODELS] = {
1842 [STAC_D945_REF] = "ref",
1843 [STAC_D945GTP5] = "5stack",
1844 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1845 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1846 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1847 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1848 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1849 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1850 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1851 /* for backward compatibility */
f5fcc13c 1852 [STAC_MACMINI] = "macmini",
3fc24d85 1853 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1854 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1855 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1856 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1857 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1858 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1859 [STAC_922X_DELL_D81] = "dell-d81",
1860 [STAC_922X_DELL_D82] = "dell-d82",
1861 [STAC_922X_DELL_M81] = "dell-m81",
1862 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1863};
1864
1865static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1866 /* SigmaTel reference board */
1867 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1868 "DFI LanParty", STAC_D945_REF),
1869 /* Intel 945G based systems */
1870 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1871 "Intel D945G", STAC_D945GTP3),
1872 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1873 "Intel D945G", STAC_D945GTP3),
1874 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1875 "Intel D945G", STAC_D945GTP3),
1876 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1877 "Intel D945G", STAC_D945GTP3),
1878 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1879 "Intel D945G", STAC_D945GTP3),
1880 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1881 "Intel D945G", STAC_D945GTP3),
1882 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1883 "Intel D945G", STAC_D945GTP3),
1884 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1885 "Intel D945G", STAC_D945GTP3),
1886 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1887 "Intel D945G", STAC_D945GTP3),
1888 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1889 "Intel D945G", STAC_D945GTP3),
1890 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1891 "Intel D945G", STAC_D945GTP3),
1892 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1893 "Intel D945G", STAC_D945GTP3),
1894 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1895 "Intel D945G", STAC_D945GTP3),
1896 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1897 "Intel D945G", STAC_D945GTP3),
1898 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1899 "Intel D945G", STAC_D945GTP3),
1900 /* Intel D945G 5-stack systems */
1901 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1902 "Intel D945G", STAC_D945GTP5),
1903 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1904 "Intel D945G", STAC_D945GTP5),
1905 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1906 "Intel D945G", STAC_D945GTP5),
1907 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1908 "Intel D945G", STAC_D945GTP5),
1909 /* Intel 945P based systems */
1910 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1911 "Intel D945P", STAC_D945GTP3),
1912 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1913 "Intel D945P", STAC_D945GTP3),
1914 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1915 "Intel D945P", STAC_D945GTP3),
1916 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1917 "Intel D945P", STAC_D945GTP3),
1918 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1919 "Intel D945P", STAC_D945GTP3),
1920 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1921 "Intel D945P", STAC_D945GTP5),
1922 /* other systems */
536319af 1923 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1924 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1925 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1926 /* Dell systems */
1927 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1928 "unknown Dell", STAC_922X_DELL_D81),
1929 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1930 "unknown Dell", STAC_922X_DELL_D81),
1931 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1932 "unknown Dell", STAC_922X_DELL_D81),
1933 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1934 "unknown Dell", STAC_922X_DELL_D82),
1935 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1936 "unknown Dell", STAC_922X_DELL_M81),
1937 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1938 "unknown Dell", STAC_922X_DELL_D82),
1939 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1940 "unknown Dell", STAC_922X_DELL_D81),
1941 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1942 "unknown Dell", STAC_922X_DELL_D81),
1943 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1944 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1945 /* ECS/PC Chips boards */
1946 SND_PCI_QUIRK(0x1019, 0x2144,
1947 "ECS/PC chips", STAC_ECS_202),
1948 SND_PCI_QUIRK(0x1019, 0x2608,
1949 "ECS/PC chips", STAC_ECS_202),
1950 SND_PCI_QUIRK(0x1019, 0x2633,
1951 "ECS/PC chips P17G/1333", STAC_ECS_202),
1952 SND_PCI_QUIRK(0x1019, 0x2811,
1953 "ECS/PC chips", STAC_ECS_202),
1954 SND_PCI_QUIRK(0x1019, 0x2812,
1955 "ECS/PC chips", STAC_ECS_202),
1956 SND_PCI_QUIRK(0x1019, 0x2813,
1957 "ECS/PC chips", STAC_ECS_202),
1958 SND_PCI_QUIRK(0x1019, 0x2814,
1959 "ECS/PC chips", STAC_ECS_202),
1960 SND_PCI_QUIRK(0x1019, 0x2815,
1961 "ECS/PC chips", STAC_ECS_202),
1962 SND_PCI_QUIRK(0x1019, 0x2816,
1963 "ECS/PC chips", STAC_ECS_202),
1964 SND_PCI_QUIRK(0x1019, 0x2817,
1965 "ECS/PC chips", STAC_ECS_202),
1966 SND_PCI_QUIRK(0x1019, 0x2818,
1967 "ECS/PC chips", STAC_ECS_202),
1968 SND_PCI_QUIRK(0x1019, 0x2819,
1969 "ECS/PC chips", STAC_ECS_202),
1970 SND_PCI_QUIRK(0x1019, 0x2820,
1971 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 1972 {} /* terminator */
1973};
1974
3cc08dc6 1975static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1976 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1977 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1978 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1979 0x01c42190, 0x40000100,
3cc08dc6
MP		 1980};
1981
93ed1503 1982static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1983 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1984 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1985 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1986 0x40000100, 0x40000100
1987};
1988
93ed1503
TD		 1989static unsigned int d965_5st_pin_configs[14] = {
1990 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1991 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1992 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1993 0x40000100, 0x40000100
1994};
1995
4ff076e5
TD		 1996static unsigned int dell_3st_pin_configs[14] = {
1997 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1998 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1999 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2000 0x40c003fc, 0x40000100
2001};
2002
93ed1503 2003static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 2004 [STAC_D965_REF] = ref927x_pin_configs,
2005 [STAC_D965_3ST] = d965_3st_pin_configs,
2006 [STAC_D965_5ST] = d965_5st_pin_configs,
2007 [STAC_DELL_3ST] = dell_3st_pin_configs,
2008 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2009};
2010
f5fcc13c 2011static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 2012 [STAC_D965_REF] = "ref",
2013 [STAC_D965_3ST] = "3stack",
2014 [STAC_D965_5ST] = "5stack",
2015 [STAC_DELL_3ST] = "dell-3stack",
2016 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2017};
2018
2019static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2020 /* SigmaTel reference board */
2021 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2022 "DFI LanParty", STAC_D965_REF),
81d3dbde 2023 /* Intel 946 based systems */
f5fcc13c
TI		 2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2026 /* 965 based 3 stack systems */
f5fcc13c
TI		 2027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2028 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2029 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2031 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2033 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2035 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2037 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2039 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2041 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2042 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2043 /* Dell 3 stack systems */
8e9068b1 2044 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2045 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2046 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2048 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2049 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2050 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2051 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2052 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2053 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2057 /* 965 based 5 stack systems */
f5fcc13c
TI		 2058 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2062 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2064 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2065 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2066 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2067 {} /* terminator */
2068};
2069
f3302a59
MP		 2070static unsigned int ref9205_pin_configs[12] = {
2071 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2072 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2073 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2074};
2075
dfe495d0
TI		 2076/*
2077 STAC 9205 pin configs for
2078 102801F1
2079 102801F2
2080 102801FC
2081 102801FD
2082 10280204
2083 1028021F
3fa2ef74 2084 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2085*/
2086static unsigned int dell_9205_m42_pin_configs[12] = {
2087 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2088 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2089 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2090};
2091
2092/*
2093 STAC 9205 pin configs for
2094 102801F9
2095 102801FA
2096 102801FE
2097 102801FF (Dell Precision M4300)
2098 10280206
2099 10280200
2100 10280201
2101*/
2102static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2103 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2104 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2105 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2106};
2107
dfe495d0 2108static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2109 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2110 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2111 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2112};
2113
f5fcc13c 2114static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2115 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2116 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2117 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2118 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2119};
2120
f5fcc13c
TI		 2121static const char *stac9205_models[STAC_9205_MODELS] = {
2122 [STAC_9205_REF] = "ref",
dfe495d0 2123 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2124 [STAC_9205_DELL_M43] = "dell-m43",
2125 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2126};
2127
2128static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2129 /* SigmaTel reference board */
2130 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2131 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2132 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2133 "unknown Dell", STAC_9205_DELL_M42),
2134 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2135 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2136 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2137 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2138 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2139 "Dell Precision", STAC_9205_DELL_M43),
2140 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2141 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2142 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2143 "unknown Dell", STAC_9205_DELL_M42),
2144 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2145 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2146 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2147 "Dell Precision", STAC_9205_DELL_M43),
2148 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2149 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2150 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2151 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2152 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2153 "Dell Precision", STAC_9205_DELL_M43),
2154 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2155 "Dell Precision", STAC_9205_DELL_M43),
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2157 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2158 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2159 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2160 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2161 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2162 {} /* terminator */
2163};
2164
11b44bbd
RF		 2165static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2166{
2167 int i;
2168 struct sigmatel_spec *spec = codec->spec;
2169
2170 if (! spec->bios_pin_configs) {
2171 spec->bios_pin_configs = kcalloc(spec->num_pins,
2172 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
2173 if (! spec->bios_pin_configs)
2174 return -ENOMEM;
2175 }
2176
2177 for (i = 0; i < spec->num_pins; i++) {
2178 hda_nid_t nid = spec->pin_nids[i];
2179 unsigned int pin_cfg;
2180
2181 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2182 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2183 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2184 nid, pin_cfg);
2185 spec->bios_pin_configs[i] = pin_cfg;
2186 }
2187
2188 return 0;
2189}
2190
87d48363
MR		 2191static void stac92xx_set_config_reg(struct hda_codec *codec,
2192 hda_nid_t pin_nid, unsigned int pin_config)
2193{
2194 int i;
2195 snd_hda_codec_write(codec, pin_nid, 0,
2196 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2197 pin_config & 0x000000ff);
2198 snd_hda_codec_write(codec, pin_nid, 0,
2199 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2200 (pin_config & 0x0000ff00) >> 8);
2201 snd_hda_codec_write(codec, pin_nid, 0,
2202 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2203 (pin_config & 0x00ff0000) >> 16);
2204 snd_hda_codec_write(codec, pin_nid, 0,
2205 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2206 pin_config >> 24);
2207 i = snd_hda_codec_read(codec, pin_nid, 0,
2208 AC_VERB_GET_CONFIG_DEFAULT,
2209 0x00);
2210 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2211 pin_nid, i);
2212}
2213
2f2f4251
M		 2214static void stac92xx_set_config_regs(struct hda_codec *codec)
2215{
2216 int i;
2217 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2218
87d48363
MR		 2219 if (!spec->pin_configs)
2220 return;
11b44bbd 2221
87d48363
MR		 2222 for (i = 0; i < spec->num_pins; i++)
2223 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2224 spec->pin_configs[i]);
2f2f4251 2225}
2f2f4251 2226
dabbed6f 2227/*
c7d4b2fa 2228 * Analog playback callbacks
dabbed6f 2229 */
c7d4b2fa
M		 2230static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2231 struct hda_codec *codec,
c8b6bf9b 2232 struct snd_pcm_substream *substream)
2f2f4251 2233{
dabbed6f 2234 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2235 if (spec->stream_delay)
2236 msleep(spec->stream_delay);
9a08160b
TI		 2237 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2238 hinfo);
2f2f4251
M		 2239}
2240
2f2f4251
M		 2241static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2242 struct hda_codec *codec,
2243 unsigned int stream_tag,
2244 unsigned int format,
c8b6bf9b 2245 struct snd_pcm_substream *substream)
2f2f4251
M		 2246{
2247 struct sigmatel_spec *spec = codec->spec;
403d1944 2248 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2249}
2250
2251static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2252 struct hda_codec *codec,
c8b6bf9b 2253 struct snd_pcm_substream *substream)
2f2f4251
M		 2254{
2255 struct sigmatel_spec *spec = codec->spec;
2256 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2257}
2258
dabbed6f
M		 2259/*
2260 * Digital playback callbacks
2261 */
2262static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2263 struct hda_codec *codec,
c8b6bf9b 2264 struct snd_pcm_substream *substream)
dabbed6f
M		 2265{
2266 struct sigmatel_spec *spec = codec->spec;
2267 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2268}
2269
2270static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2271 struct hda_codec *codec,
c8b6bf9b 2272 struct snd_pcm_substream *substream)
dabbed6f
M		 2273{
2274 struct sigmatel_spec *spec = codec->spec;
2275 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2276}
2277
6b97eb45
TI		 2278static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2279 struct hda_codec *codec,
2280 unsigned int stream_tag,
2281 unsigned int format,
2282 struct snd_pcm_substream *substream)
2283{
2284 struct sigmatel_spec *spec = codec->spec;
2285 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2286 stream_tag, format, substream);
2287}
2288
dabbed6f 2289
2f2f4251
M		 2290/*
2291 * Analog capture callbacks
2292 */
2293static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2294 struct hda_codec *codec,
2295 unsigned int stream_tag,
2296 unsigned int format,
c8b6bf9b 2297 struct snd_pcm_substream *substream)
2f2f4251
M		 2298{
2299 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2300 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2301
8daaaa97
MR		 2302 if (spec->powerdown_adcs) {
2303 msleep(40);
2304 snd_hda_codec_write_cache(codec, nid, 0,
2305 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2306 }
2307 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2308 return 0;
2309}
2310
2311static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2312 struct hda_codec *codec,
c8b6bf9b 2313 struct snd_pcm_substream *substream)
2f2f4251
M		 2314{
2315 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2316 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2317
8daaaa97
MR		 2318 snd_hda_codec_cleanup_stream(codec, nid);
2319 if (spec->powerdown_adcs)
2320 snd_hda_codec_write_cache(codec, nid, 0,
2321 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2322 return 0;
2323}
2324
dabbed6f
M		 2325static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2326 .substreams = 1,
2327 .channels_min = 2,
2328 .channels_max = 2,
2329 /* NID is set in stac92xx_build_pcms */
2330 .ops = {
2331 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2332 .close = stac92xx_dig_playback_pcm_close,
2333 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2334 },
2335};
2336
2337static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2338 .substreams = 1,
2339 .channels_min = 2,
2340 .channels_max = 2,
2341 /* NID is set in stac92xx_build_pcms */
2342};
2343
2f2f4251
M		 2344static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2345 .substreams = 1,
2346 .channels_min = 2,
c7d4b2fa 2347 .channels_max = 8,
2f2f4251
M		 2348 .nid = 0x02, /* NID to query formats and rates */
2349 .ops = {
2350 .open = stac92xx_playback_pcm_open,
2351 .prepare = stac92xx_playback_pcm_prepare,
2352 .cleanup = stac92xx_playback_pcm_cleanup
2353 },
2354};
2355
3cc08dc6
MP		 2356static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2357 .substreams = 1,
2358 .channels_min = 2,
2359 .channels_max = 2,
2360 .nid = 0x06, /* NID to query formats and rates */
2361 .ops = {
2362 .open = stac92xx_playback_pcm_open,
2363 .prepare = stac92xx_playback_pcm_prepare,
2364 .cleanup = stac92xx_playback_pcm_cleanup
2365 },
2366};
2367
2f2f4251 2368static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2369 .channels_min = 2,
2370 .channels_max = 2,
9e05b7a3 2371 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2372 .ops = {
2373 .prepare = stac92xx_capture_pcm_prepare,
2374 .cleanup = stac92xx_capture_pcm_cleanup
2375 },
2376};
2377
2378static int stac92xx_build_pcms(struct hda_codec *codec)
2379{
2380 struct sigmatel_spec *spec = codec->spec;
2381 struct hda_pcm *info = spec->pcm_rec;
2382
2383 codec->num_pcms = 1;
2384 codec->pcm_info = info;
2385
c7d4b2fa 2386 info->name = "STAC92xx Analog";
2f2f4251 2387 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2388 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2389 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2390 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2391
2392 if (spec->alt_switch) {
2393 codec->num_pcms++;
2394 info++;
2395 info->name = "STAC92xx Analog Alt";
2396 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2397 }
2f2f4251 2398
dabbed6f
M		 2399 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2400 codec->num_pcms++;
2401 info++;
2402 info->name = "STAC92xx Digital";
7ba72ba1 2403 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2404 if (spec->multiout.dig_out_nid) {
2405 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2406 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2407 }
2408 if (spec->dig_in_nid) {
2409 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2410 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2411 }
2412 }
2413
2f2f4251
M		 2414 return 0;
2415}
2416
c960a03b
TI		 2417static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2418{
2419 unsigned int pincap = snd_hda_param_read(codec, nid,
2420 AC_PAR_PIN_CAP);
2421 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2422 if (pincap & AC_PINCAP_VREF_100)
2423 return AC_PINCTL_VREF_100;
2424 if (pincap & AC_PINCAP_VREF_80)
2425 return AC_PINCTL_VREF_80;
2426 if (pincap & AC_PINCAP_VREF_50)
2427 return AC_PINCTL_VREF_50;
2428 if (pincap & AC_PINCAP_VREF_GRD)
2429 return AC_PINCTL_VREF_GRD;
2430 return 0;
2431}
2432
403d1944
MP		 2433static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2434
2435{
82beb8fd
TI		 2436 snd_hda_codec_write_cache(codec, nid, 0,
2437 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2438}
2439
7c2ba97b
MR		 2440#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2441
2442static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2443 struct snd_ctl_elem_value *ucontrol)
2444{
2445 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2446 struct sigmatel_spec *spec = codec->spec;
2447
d7a89436 2448 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2449 return 0;
2450}
2451
2452static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2453 struct snd_ctl_elem_value *ucontrol)
2454{
2455 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2456 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2457 int nid = kcontrol->private_value;
2458
2459 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2460
2461 /* check to be sure that the ports are upto date with
2462 * switch changes
2463 */
2464 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2465
2466 return 1;
2467}
2468
a5ce8890 2469#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2470
2471static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2472{
2473 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2474 struct sigmatel_spec *spec = codec->spec;
2475 int io_idx = kcontrol-> private_value & 0xff;
2476
2477 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2478 return 0;
2479}
2480
2481static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2482{
2483 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2484 struct sigmatel_spec *spec = codec->spec;
2485 hda_nid_t nid = kcontrol->private_value >> 8;
2486 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2487 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2488
2489 spec->io_switch[io_idx] = val;
2490
2491 if (val)
2492 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2493 else {
2494 unsigned int pinctl = AC_PINCTL_IN_EN;
2495 if (io_idx) /* set VREF for mic */
2496 pinctl |= stac92xx_get_vref(codec, nid);
2497 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2498 }
40c1d308
JZ		 2499
2500 /* check the auto-mute again: we need to mute/unmute the speaker
2501 * appropriately according to the pin direction
2502 */
2503 if (spec->hp_detect)
2504 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2505
403d1944
MP		 2506 return 1;
2507}
2508
0fb87bb4
ML		 2509#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2510
2511static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2512 struct snd_ctl_elem_value *ucontrol)
2513{
2514 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2515 struct sigmatel_spec *spec = codec->spec;
2516
2517 ucontrol->value.integer.value[0] = spec->clfe_swap;
2518 return 0;
2519}
2520
2521static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2522 struct snd_ctl_elem_value *ucontrol)
2523{
2524 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2525 struct sigmatel_spec *spec = codec->spec;
2526 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2527 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2528
68ea7b2f 2529 if (spec->clfe_swap == val)
0fb87bb4
ML		 2530 return 0;
2531
68ea7b2f 2532 spec->clfe_swap = val;
0fb87bb4
ML		 2533
2534 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2535 spec->clfe_swap ? 0x4 : 0x0);
2536
2537 return 1;
2538}
2539
7c2ba97b
MR		 2540#define STAC_CODEC_HP_SWITCH(xname) \
2541 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2542 .name = xname, \
2543 .index = 0, \
2544 .info = stac92xx_hp_switch_info, \
2545 .get = stac92xx_hp_switch_get, \
2546 .put = stac92xx_hp_switch_put, \
2547 }
2548
403d1944
MP		 2549#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2550 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2551 .name = xname, \
2552 .index = 0, \
2553 .info = stac92xx_io_switch_info, \
2554 .get = stac92xx_io_switch_get, \
2555 .put = stac92xx_io_switch_put, \
2556 .private_value = xpval, \
2557 }
2558
0fb87bb4
ML		 2559#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2560 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2561 .name = xname, \
2562 .index = 0, \
2563 .info = stac92xx_clfe_switch_info, \
2564 .get = stac92xx_clfe_switch_get, \
2565 .put = stac92xx_clfe_switch_put, \
2566 .private_value = xpval, \
2567 }
403d1944 2568
c7d4b2fa
M		 2569enum {
2570 STAC_CTL_WIDGET_VOL,
2571 STAC_CTL_WIDGET_MUTE,
09a99959 2572 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2573 STAC_CTL_WIDGET_AMP_MUX,
2574 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2575 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2576 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2577 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2578};
2579
c8b6bf9b 2580static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2581 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2582 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2583 STAC_MONO_MUX,
89385035
MR		 2584 STAC_AMP_MUX,
2585 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2586 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2587 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2588 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2589};
2590
2591/* add dynamic controls */
4d4e9bb3
TI		 2592static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2593 struct snd_kcontrol_new *ktemp,
2594 int idx, const char *name,
2595 unsigned long val)
c7d4b2fa 2596{
c8b6bf9b 2597 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2598
2599 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2600 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2601
2602 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2603 if (! knew)
2604 return -ENOMEM;
2605 if (spec->kctl_alloc) {
2606 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2607 kfree(spec->kctl_alloc);
2608 }
2609 spec->kctl_alloc = knew;
2610 spec->num_kctl_alloc = num;
2611 }
2612
2613 knew = &spec->kctl_alloc[spec->num_kctl_used];
4d4e9bb3 2614 *knew = *ktemp;
4682eee0 2615 knew->index = idx;
82fe0c58 2616 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2617 if (!knew->name)
c7d4b2fa
M		 2618 return -ENOMEM;
2619 knew->private_value = val;
2620 spec->num_kctl_used++;
2621 return 0;
2622}
2623
4d4e9bb3
TI		 2624static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2625 int type, int idx, const char *name,
2626 unsigned long val)
2627{
2628 return stac92xx_add_control_temp(spec,
2629 &stac92xx_control_templates[type],
2630 idx, name, val);
2631}
2632
4682eee0
MR		 2633
2634/* add dynamic controls */
4d4e9bb3
TI		 2635static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2636 const char *name, unsigned long val)
4682eee0
MR		 2637{
2638 return stac92xx_add_control_idx(spec, type, 0, name, val);
2639}
2640
403d1944
MP		 2641/* flag inputs as additional dynamic lineouts */
2642static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2643{
2644 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2645 unsigned int wcaps, wtype;
2646 int i, num_dacs = 0;
2647
2648 /* use the wcaps cache to count all DACs available for line-outs */
2649 for (i = 0; i < codec->num_nodes; i++) {
2650 wcaps = codec->wcaps[i];
2651 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2652
7b043899
SL		 2653 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2654 num_dacs++;
2655 }
403d1944 2656
7b043899
SL		 2657 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2658
403d1944
MP		 2659 switch (cfg->line_outs) {
2660 case 3:
2661 /* add line-in as side */
7b043899 2662 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2663 cfg->line_out_pins[cfg->line_outs] =
2664 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2665 spec->line_switch = 1;
2666 cfg->line_outs++;
2667 }
2668 break;
2669 case 2:
2670 /* add line-in as clfe and mic as side */
7b043899 2671 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2672 cfg->line_out_pins[cfg->line_outs] =
2673 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2674 spec->line_switch = 1;
2675 cfg->line_outs++;
2676 }
7b043899 2677 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2678 cfg->line_out_pins[cfg->line_outs] =
2679 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2680 spec->mic_switch = 1;
2681 cfg->line_outs++;
2682 }
2683 break;
2684 case 1:
2685 /* add line-in as surr and mic as clfe */
7b043899 2686 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2687 cfg->line_out_pins[cfg->line_outs] =
2688 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2689 spec->line_switch = 1;
2690 cfg->line_outs++;
2691 }
7b043899 2692 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2693 cfg->line_out_pins[cfg->line_outs] =
2694 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2695 spec->mic_switch = 1;
2696 cfg->line_outs++;
2697 }
2698 break;
2699 }
2700
2701 return 0;
2702}
2703
7b043899
SL		 2704
2705static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2706{
2707 int i;
2708
2709 for (i = 0; i < spec->multiout.num_dacs; i++) {
2710 if (spec->multiout.dac_nids[i] == nid)
2711 return 1;
2712 }
2713
2714 return 0;
2715}
2716
3cc08dc6 2717/*
7b043899
SL		 2718 * Fill in the dac_nids table from the parsed pin configuration
2719 * This function only works when every pin in line_out_pins[]
2720 * contains atleast one DAC in its connection list. Some 92xx
2721 * codecs are not connected directly to a DAC, such as the 9200
2722 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2723 */
19039bd0 2724static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2725 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2726{
2727 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2728 int i, j, conn_len = 0;
2729 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2730 unsigned int wcaps, wtype;
2731
c7d4b2fa
M		 2732 for (i = 0; i < cfg->line_outs; i++) {
2733 nid = cfg->line_out_pins[i];
7b043899
SL		 2734 conn_len = snd_hda_get_connections(codec, nid, conn,
2735 HDA_MAX_CONNECTIONS);
2736 for (j = 0; j < conn_len; j++) {
2737 wcaps = snd_hda_param_read(codec, conn[j],
2738 AC_PAR_AUDIO_WIDGET_CAP);
2739 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2740 if (wtype != AC_WID_AUD_OUT ||
2741 (wcaps & AC_WCAP_DIGITAL))
2742 continue;
2743 /* conn[j] is a DAC routed to this line-out */
2744 if (!is_in_dac_nids(spec, conn[j]))
2745 break;
2746 }
2747
2748 if (j == conn_len) {
df802952
TI		 2749 if (spec->multiout.num_dacs > 0) {
2750 /* we have already working output pins,
2751 * so let's drop the broken ones again
2752 */
2753 cfg->line_outs = spec->multiout.num_dacs;
2754 break;
2755 }
7b043899
SL		 2756 /* error out, no available DAC found */
2757 snd_printk(KERN_ERR
2758 "%s: No available DAC for pin 0x%x\n",
2759 __func__, nid);
2760 return -ENODEV;
2761 }
2762
2763 spec->multiout.dac_nids[i] = conn[j];
2764 spec->multiout.num_dacs++;
2765 if (conn_len > 1) {
2766 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2767 snd_hda_codec_write_cache(codec, nid, 0,
2768 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2769
7b043899
SL		 2770 }
2771 }
c7d4b2fa 2772
7b043899
SL		 2773 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2774 spec->multiout.num_dacs,
2775 spec->multiout.dac_nids[0],
2776 spec->multiout.dac_nids[1],
2777 spec->multiout.dac_nids[2],
2778 spec->multiout.dac_nids[3],
2779 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2780 return 0;
2781}
2782
eb06ed8f
TI		 2783/* create volume control/switch for the given prefx type */
2784static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2785{
2786 char name[32];
2787 int err;
2788
2789 sprintf(name, "%s Playback Volume", pfx);
2790 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2791 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2792 if (err < 0)
2793 return err;
2794 sprintf(name, "%s Playback Switch", pfx);
2795 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2796 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2797 if (err < 0)
2798 return err;
2799 return 0;
2800}
2801
ae0afd81
MR		 2802static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2803{
2804 if (!spec->multiout.hp_nid)
2805 spec->multiout.hp_nid = nid;
2806 else if (spec->multiout.num_dacs > 4) {
2807 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2808 return 1;
2809 } else {
2810 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2811 spec->multiout.num_dacs++;
2812 }
2813 return 0;
2814}
2815
2816static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2817{
2818 if (is_in_dac_nids(spec, nid))
2819 return 1;
2820 if (spec->multiout.hp_nid == nid)
2821 return 1;
2822 return 0;
2823}
2824
c7d4b2fa 2825/* add playback controls from the parsed DAC table */
0fb87bb4 2826static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2827 const struct auto_pin_cfg *cfg)
c7d4b2fa 2828{
19039bd0
TI		 2829 static const char *chname[4] = {
2830 "Front", "Surround", NULL /*CLFE*/, "Side"
2831 };
d21995e3 2832 hda_nid_t nid = 0;
c7d4b2fa
M		 2833 int i, err;
2834
0fb87bb4 2835 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2836 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2837
2838
40ac8c4f 2839 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2840 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2841 continue;
2842
2843 nid = spec->multiout.dac_nids[i];
2844
2845 if (i == 2) {
2846 /* Center/LFE */
eb06ed8f
TI		 2847 err = create_controls(spec, "Center", nid, 1);
2848 if (err < 0)
c7d4b2fa 2849 return err;
eb06ed8f
TI		 2850 err = create_controls(spec, "LFE", nid, 2);
2851 if (err < 0)
c7d4b2fa 2852 return err;
0fb87bb4
ML		 2853
2854 wid_caps = get_wcaps(codec, nid);
2855
2856 if (wid_caps & AC_WCAP_LR_SWAP) {
2857 err = stac92xx_add_control(spec,
2858 STAC_CTL_WIDGET_CLFE_SWITCH,
2859 "Swap Center/LFE Playback Switch", nid);
2860
2861 if (err < 0)
2862 return err;
2863 }
2864
c7d4b2fa 2865 } else {
eb06ed8f
TI		 2866 err = create_controls(spec, chname[i], nid, 3);
2867 if (err < 0)
c7d4b2fa
M		 2868 return err;
2869 }
2870 }
2871
fedb7569
MR		 2872 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
2873 cfg->hp_outs && !spec->multiout.hp_nid)
2874 spec->multiout.hp_nid = nid;
2875
7c2ba97b
MR		 2876 if (cfg->hp_outs > 1) {
2877 err = stac92xx_add_control(spec,
2878 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 2879 "Headphone as Line Out Switch",
2880 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 2881 if (err < 0)
2882 return err;
2883 }
2884
b5895dc8
MR		 2885 if (spec->line_switch) {
2886 nid = cfg->input_pins[AUTO_PIN_LINE];
2887 pincap = snd_hda_param_read(codec, nid,
2888 AC_PAR_PIN_CAP);
2889 if (pincap & AC_PINCAP_OUT) {
2890 err = stac92xx_add_control(spec,
2891 STAC_CTL_WIDGET_IO_SWITCH,
2892 "Line In as Output Switch", nid << 8);
2893 if (err < 0)
2894 return err;
2895 }
2896 }
403d1944 2897
b5895dc8 2898 if (spec->mic_switch) {
cace16f1 2899 unsigned int def_conf;
ae0afd81
MR		 2900 unsigned int mic_pin = AUTO_PIN_MIC;
2901again:
2902 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2903 def_conf = snd_hda_codec_read(codec, nid, 0,
2904 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2905 /* some laptops have an internal analog microphone
2906 * which can't be used as a output */
2907 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2908 pincap = snd_hda_param_read(codec, nid,
2909 AC_PAR_PIN_CAP);
2910 if (pincap & AC_PINCAP_OUT) {
2911 err = stac92xx_add_control(spec,
2912 STAC_CTL_WIDGET_IO_SWITCH,
2913 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2914 nid = snd_hda_codec_read(codec, nid, 0,
2915 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2916 if (!check_in_dac_nids(spec, nid))
2917 add_spec_dacs(spec, nid);
cace16f1
MR		 2918 if (err < 0)
2919 return err;
2920 }
ae0afd81
MR		 2921 } else if (mic_pin == AUTO_PIN_MIC) {
2922 mic_pin = AUTO_PIN_FRONT_MIC;
2923 goto again;
b5895dc8
MR		 2924 }
2925 }
403d1944 2926
c7d4b2fa
M		 2927 return 0;
2928}
2929
eb06ed8f
TI		 2930/* add playback controls for Speaker and HP outputs */
2931static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2932 struct auto_pin_cfg *cfg)
2933{
2934 struct sigmatel_spec *spec = codec->spec;
2935 hda_nid_t nid;
2936 int i, old_num_dacs, err;
2937
2938 old_num_dacs = spec->multiout.num_dacs;
2939 for (i = 0; i < cfg->hp_outs; i++) {
2940 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2941 if (wid_caps & AC_WCAP_UNSOL_CAP)
2942 spec->hp_detect = 1;
2943 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2944 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2945 if (check_in_dac_nids(spec, nid))
2946 nid = 0;
2947 if (! nid)
c7d4b2fa 2948 continue;
eb06ed8f
TI		 2949 add_spec_dacs(spec, nid);
2950 }
2951 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2952 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2953 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2954 if (check_in_dac_nids(spec, nid))
2955 nid = 0;
eb06ed8f
TI		 2956 if (! nid)
2957 continue;
2958 add_spec_dacs(spec, nid);
c7d4b2fa 2959 }
1b290a51
MR		 2960 for (i = 0; i < cfg->line_outs; i++) {
2961 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2962 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2963 if (check_in_dac_nids(spec, nid))
2964 nid = 0;
2965 if (! nid)
2966 continue;
2967 add_spec_dacs(spec, nid);
2968 }
eb06ed8f
TI		 2969 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2970 static const char *pfxs[] = {
2971 "Speaker", "External Speaker", "Speaker2",
2972 };
2973 err = create_controls(spec, pfxs[i - old_num_dacs],
2974 spec->multiout.dac_nids[i], 3);
2975 if (err < 0)
2976 return err;
2977 }
2978 if (spec->multiout.hp_nid) {
2626a263
TI		 2979 err = create_controls(spec, "Headphone",
2980 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2981 if (err < 0)
2982 return err;
2983 }
c7d4b2fa
M		 2984
2985 return 0;
2986}
2987
b22b4821 2988/* labels for mono mux outputs */
d0513fc6
MR		 2989static const char *stac92xx_mono_labels[4] = {
2990 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 2991};
2992
2993/* create mono mux for mono out on capable codecs */
2994static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2995{
2996 struct sigmatel_spec *spec = codec->spec;
2997 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2998 int i, num_cons;
2999 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3000
3001 num_cons = snd_hda_get_connections(codec,
3002 spec->mono_nid,
3003 con_lst,
3004 HDA_MAX_NUM_INPUTS);
3005 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3006 return -EINVAL;
3007
3008 for (i = 0; i < num_cons; i++) {
3009 mono_mux->items[mono_mux->num_items].label =
3010 stac92xx_mono_labels[i];
3011 mono_mux->items[mono_mux->num_items].index = i;
3012 mono_mux->num_items++;
3013 }
09a99959
MR		 3014
3015 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3016 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3017}
3018
89385035
MR		 3019/* labels for amp mux outputs */
3020static const char *stac92xx_amp_labels[3] = {
4b33c767 3021 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3022};
3023
3024/* create amp out controls mux on capable codecs */
3025static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3026{
3027 struct sigmatel_spec *spec = codec->spec;
3028 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3029 int i, err;
3030
2a9c7816 3031 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3032 amp_mux->items[amp_mux->num_items].label =
3033 stac92xx_amp_labels[i];
3034 amp_mux->items[amp_mux->num_items].index = i;
3035 amp_mux->num_items++;
3036 }
3037
2a9c7816
MR		 3038 if (spec->num_amps > 1) {
3039 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3040 "Amp Selector Capture Switch", 0);
3041 if (err < 0)
3042 return err;
3043 }
89385035
MR		 3044 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3045 "Amp Capture Volume",
3046 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3047}
3048
3049
1cd2224c
MR		 3050/* create PC beep volume controls */
3051static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3052 hda_nid_t nid)
3053{
3054 struct sigmatel_spec *spec = codec->spec;
3055 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3056 int err;
3057
3058 /* check for mute support for the the amp */
3059 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3060 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3061 "PC Beep Playback Switch",
3062 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3063 if (err < 0)
3064 return err;
3065 }
3066
3067 /* check to see if there is volume support for the amp */
3068 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3069 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3070 "PC Beep Playback Volume",
3071 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3072 if (err < 0)
3073 return err;
3074 }
3075 return 0;
3076}
3077
4d4e9bb3
TI		 3078#ifdef CONFIG_SND_HDA_INPUT_BEEP
3079#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3080
3081static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3082 struct snd_ctl_elem_value *ucontrol)
3083{
3084 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3085 ucontrol->value.integer.value[0] = codec->beep->enabled;
3086 return 0;
3087}
3088
3089static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3090 struct snd_ctl_elem_value *ucontrol)
3091{
3092 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3093 int enabled = !!ucontrol->value.integer.value[0];
3094 if (codec->beep->enabled != enabled) {
3095 codec->beep->enabled = enabled;
3096 return 1;
3097 }
3098 return 0;
3099}
3100
3101static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3102 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3103 .info = stac92xx_dig_beep_switch_info,
3104 .get = stac92xx_dig_beep_switch_get,
3105 .put = stac92xx_dig_beep_switch_put,
3106};
3107
3108static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3109{
3110 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3111 0, "PC Beep Playback Switch", 0);
3112}
3113#endif
3114
4682eee0
MR		 3115static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3116{
3117 struct sigmatel_spec *spec = codec->spec;
3118 int wcaps, nid, i, err = 0;
3119
3120 for (i = 0; i < spec->num_muxes; i++) {
3121 nid = spec->mux_nids[i];
3122 wcaps = get_wcaps(codec, nid);
3123
3124 if (wcaps & AC_WCAP_OUT_AMP) {
3125 err = stac92xx_add_control_idx(spec,
3126 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3127 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3128 if (err < 0)
3129 return err;
3130 }
3131 }
3132 return 0;
3133};
3134
d9737751 3135static const char *stac92xx_spdif_labels[3] = {
65973632 3136 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3137};
3138
3139static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3140{
3141 struct sigmatel_spec *spec = codec->spec;
3142 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3143 const char **labels = spec->spdif_labels;
d9737751 3144 int i, num_cons;
65973632 3145 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3146
3147 num_cons = snd_hda_get_connections(codec,
3148 spec->smux_nids[0],
3149 con_lst,
3150 HDA_MAX_NUM_INPUTS);
65973632 3151 if (!num_cons)
d9737751
MR		 3152 return -EINVAL;
3153
65973632
MR		 3154 if (!labels)
3155 labels = stac92xx_spdif_labels;
3156
d9737751 3157 for (i = 0; i < num_cons; i++) {
65973632 3158 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3159 spdif_mux->items[spdif_mux->num_items].index = i;
3160 spdif_mux->num_items++;
3161 }
3162
3163 return 0;
3164}
3165
8b65727b 3166/* labels for dmic mux inputs */
ddc2cec4 3167static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3168 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3169 "Digital Mic 3", "Digital Mic 4"
3170};
3171
3172/* create playback/capture controls for input pins on dmic capable codecs */
3173static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3174 const struct auto_pin_cfg *cfg)
3175{
3176 struct sigmatel_spec *spec = codec->spec;
3177 struct hda_input_mux *dimux = &spec->private_dimux;
3178 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3179 int err, i, j;
3180 char name[32];
8b65727b
MP		 3181
3182 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3183 dimux->items[dimux->num_items].index = 0;
3184 dimux->num_items++;
3185
3186 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3187 hda_nid_t nid;
8b65727b
MP		 3188 int index;
3189 int num_cons;
0678accd 3190 unsigned int wcaps;
8b65727b
MP		 3191 unsigned int def_conf;
3192
3193 def_conf = snd_hda_codec_read(codec,
3194 spec->dmic_nids[i],
3195 0,
3196 AC_VERB_GET_CONFIG_DEFAULT,
3197 0);
3198 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3199 continue;
3200
0678accd 3201 nid = spec->dmic_nids[i];
8b65727b 3202 num_cons = snd_hda_get_connections(codec,
e1f0d669 3203 spec->dmux_nids[0],
8b65727b
MP		 3204 con_lst,
3205 HDA_MAX_NUM_INPUTS);
3206 for (j = 0; j < num_cons; j++)
0678accd 3207 if (con_lst[j] == nid) {
8b65727b
MP		 3208 index = j;
3209 goto found;
3210 }
3211 continue;
3212found:
d0513fc6
MR		 3213 wcaps = get_wcaps(codec, nid) &
3214 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3215
d0513fc6 3216 if (wcaps) {
0678accd
MR		 3217 sprintf(name, "%s Capture Volume",
3218 stac92xx_dmic_labels[dimux->num_items]);
3219
3220 err = stac92xx_add_control(spec,
3221 STAC_CTL_WIDGET_VOL,
3222 name,
d0513fc6
MR		 3223 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3224 (wcaps & AC_WCAP_OUT_AMP) ?
3225 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3226 if (err < 0)
3227 return err;
3228 }
3229
8b65727b
MP		 3230 dimux->items[dimux->num_items].label =
3231 stac92xx_dmic_labels[dimux->num_items];
3232 dimux->items[dimux->num_items].index = index;
3233 dimux->num_items++;
3234 }
3235
3236 return 0;
3237}
3238
c7d4b2fa
M		 3239/* create playback/capture controls for input pins */
3240static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3241{
3242 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3243 struct hda_input_mux *imux = &spec->private_imux;
3244 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3245 int i, j, k;
3246
3247 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3248 int index;
3249
3250 if (!cfg->input_pins[i])
3251 continue;
3252 index = -1;
3253 for (j = 0; j < spec->num_muxes; j++) {
3254 int num_cons;
3255 num_cons = snd_hda_get_connections(codec,
3256 spec->mux_nids[j],
3257 con_lst,
3258 HDA_MAX_NUM_INPUTS);
3259 for (k = 0; k < num_cons; k++)
3260 if (con_lst[k] == cfg->input_pins[i]) {
3261 index = k;
3262 goto found;
3263 }
c7d4b2fa 3264 }
314634bc
TI		 3265 continue;
3266 found:
3267 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3268 imux->items[imux->num_items].index = index;
3269 imux->num_items++;
c7d4b2fa
M		 3270 }
3271
7b043899 3272 if (imux->num_items) {
62fe78e9
SR		 3273 /*
3274 * Set the current input for the muxes.
3275 * The STAC9221 has two input muxes with identical source
3276 * NID lists. Hopefully this won't get confused.
3277 */
3278 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3279 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3280 AC_VERB_SET_CONNECT_SEL,
3281 imux->items[0].index);
62fe78e9
SR		 3282 }
3283 }
3284
c7d4b2fa
M		 3285 return 0;
3286}
3287
c7d4b2fa
M		 3288static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3289{
3290 struct sigmatel_spec *spec = codec->spec;
3291 int i;
3292
3293 for (i = 0; i < spec->autocfg.line_outs; i++) {
3294 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3295 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3296 }
3297}
3298
3299static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3300{
3301 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3302 int i;
c7d4b2fa 3303
eb06ed8f
TI		 3304 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3305 hda_nid_t pin;
3306 pin = spec->autocfg.hp_pins[i];
3307 if (pin) /* connect to front */
3308 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3309 }
3310 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3311 hda_nid_t pin;
3312 pin = spec->autocfg.speaker_pins[i];
3313 if (pin) /* connect to front */
3314 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3315 }
c7d4b2fa
M		 3316}
3317
3cc08dc6 3318static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3319{
3320 struct sigmatel_spec *spec = codec->spec;
3321 int err;
bcecd9bd 3322 int hp_speaker_swap = 0;
c7d4b2fa 3323
8b65727b
MP		 3324 if ((err = snd_hda_parse_pin_def_config(codec,
3325 &spec->autocfg,
3326 spec->dmic_nids)) < 0)
c7d4b2fa 3327 return err;
82bc955f 3328 if (! spec->autocfg.line_outs)
869264c4 3329 return 0; /* can't find valid pin config */
19039bd0 3330
bcecd9bd
JZ		 3331 /* If we have no real line-out pin and multiple hp-outs, HPs should
3332 * be set up as multi-channel outputs.
3333 */
3334 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3335 spec->autocfg.hp_outs > 1) {
3336 /* Copy hp_outs to line_outs, backup line_outs in
3337 * speaker_outs so that the following routines can handle
3338 * HP pins as primary outputs.
3339 */
3340 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3341 sizeof(spec->autocfg.line_out_pins));
3342 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3343 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3344 sizeof(spec->autocfg.hp_pins));
3345 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3346 hp_speaker_swap = 1;
3347 }
09a99959 3348 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3349 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3350 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3351 u32 caps = query_amp_caps(codec,
3352 spec->autocfg.mono_out_pin, dir);
3353 hda_nid_t conn_list[1];
3354
3355 /* get the mixer node and then the mono mux if it exists */
3356 if (snd_hda_get_connections(codec,
3357 spec->autocfg.mono_out_pin, conn_list, 1) &&
3358 snd_hda_get_connections(codec, conn_list[0],
3359 conn_list, 1)) {
3360
3361 int wcaps = get_wcaps(codec, conn_list[0]);
3362 int wid_type = (wcaps & AC_WCAP_TYPE)
3363 >> AC_WCAP_TYPE_SHIFT;
3364 /* LR swap check, some stac925x have a mux that
3365 * changes the DACs output path instead of the
3366 * mono-mux path.
3367 */
3368 if (wid_type == AC_WID_AUD_SEL &&
3369 !(wcaps & AC_WCAP_LR_SWAP))
3370 spec->mono_nid = conn_list[0];
3371 }
d0513fc6
MR		 3372 if (dir) {
3373 hda_nid_t nid = spec->autocfg.mono_out_pin;
3374
3375 /* most mono outs have a least a mute/unmute switch */
3376 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3377 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3378 "Mono Playback Switch",
3379 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3380 if (err < 0)
3381 return err;
d0513fc6
MR		 3382 /* check for volume support for the amp */
3383 if ((caps & AC_AMPCAP_NUM_STEPS)
3384 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3385 err = stac92xx_add_control(spec,
3386 STAC_CTL_WIDGET_VOL,
3387 "Mono Playback Volume",
3388 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3389 if (err < 0)
3390 return err;
3391 }
09a99959
MR		 3392 }
3393
3394 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3395 AC_PINCTL_OUT_EN);
3396 }
bcecd9bd 3397
403d1944
MP		 3398 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3399 return err;
19039bd0
TI		 3400 if (spec->multiout.num_dacs == 0)
3401 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3402 return err;
c7d4b2fa 3403
0fb87bb4
ML		 3404 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3405
3406 if (err < 0)
3407 return err;
3408
1cd2224c
MR		 3409 /* setup analog beep controls */
3410 if (spec->anabeep_nid > 0) {
3411 err = stac92xx_auto_create_beep_ctls(codec,
3412 spec->anabeep_nid);
3413 if (err < 0)
3414 return err;
3415 }
3416
3417 /* setup digital beep controls and input device */
3418#ifdef CONFIG_SND_HDA_INPUT_BEEP
3419 if (spec->digbeep_nid > 0) {
3420 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3421 unsigned int caps;
1cd2224c
MR		 3422
3423 err = stac92xx_auto_create_beep_ctls(codec, nid);
3424 if (err < 0)
3425 return err;
3426 err = snd_hda_attach_beep_device(codec, nid);
3427 if (err < 0)
3428 return err;
4d4e9bb3
TI		 3429 /* if no beep switch is available, make its own one */
3430 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3431 if (codec->beep &&
3432 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3433 err = stac92xx_beep_switch_ctl(codec);
3434 if (err < 0)
3435 return err;
3436 }
1cd2224c
MR		 3437 }
3438#endif
3439
bcecd9bd
JZ		 3440 if (hp_speaker_swap == 1) {
3441 /* Restore the hp_outs and line_outs */
3442 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3443 sizeof(spec->autocfg.line_out_pins));
3444 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3445 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3446 sizeof(spec->autocfg.speaker_pins));
3447 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3448 memset(spec->autocfg.speaker_pins, 0,
3449 sizeof(spec->autocfg.speaker_pins));
3450 spec->autocfg.speaker_outs = 0;
3451 }
3452
0fb87bb4
ML		 3453 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3454
3455 if (err < 0)
3456 return err;
3457
3458 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3459
3460 if (err < 0)
c7d4b2fa
M		 3461 return err;
3462
b22b4821
MR		 3463 if (spec->mono_nid > 0) {
3464 err = stac92xx_auto_create_mono_output_ctls(codec);
3465 if (err < 0)
3466 return err;
3467 }
2a9c7816 3468 if (spec->num_amps > 0) {
89385035
MR		 3469 err = stac92xx_auto_create_amp_output_ctls(codec);
3470 if (err < 0)
3471 return err;
3472 }
2a9c7816 3473 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3474 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3475 &spec->autocfg)) < 0)
3476 return err;
4682eee0
MR		 3477 if (spec->num_muxes > 0) {
3478 err = stac92xx_auto_create_mux_input_ctls(codec);
3479 if (err < 0)
3480 return err;
3481 }
d9737751
MR		 3482 if (spec->num_smuxes > 0) {
3483 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3484 if (err < 0)
3485 return err;
3486 }
8b65727b 3487
c7d4b2fa 3488 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3489 if (spec->multiout.max_channels > 2)
c7d4b2fa 3490 spec->surr_switch = 1;
c7d4b2fa 3491
82bc955f 3492 if (spec->autocfg.dig_out_pin)
3cc08dc6 3493 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3494 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3495 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 3496
3497 if (spec->kctl_alloc)
3498 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3499
3500 spec->input_mux = &spec->private_imux;
2a9c7816 3501 spec->dinput_mux = &spec->private_dimux;
d9737751 3502 spec->sinput_mux = &spec->private_smux;
b22b4821 3503 spec->mono_mux = &spec->private_mono_mux;
89385035 3504 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3505 return 1;
3506}
3507
82bc955f
TI		 3508/* add playback controls for HP output */
3509static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3510 struct auto_pin_cfg *cfg)
3511{
3512 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3513 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3514 unsigned int wid_caps;
3515
3516 if (! pin)
3517 return 0;
3518
3519 wid_caps = get_wcaps(codec, pin);
505cb341 3520 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3521 spec->hp_detect = 1;
82bc955f
TI		 3522
3523 return 0;
3524}
3525
160ea0dc
RF		 3526/* add playback controls for LFE output */
3527static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3528 struct auto_pin_cfg *cfg)
3529{
3530 struct sigmatel_spec *spec = codec->spec;
3531 int err;
3532 hda_nid_t lfe_pin = 0x0;
3533 int i;
3534
3535 /*
3536 * search speaker outs and line outs for a mono speaker pin
3537 * with an amp. If one is found, add LFE controls
3538 * for it.
3539 */
3540 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3541 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3542 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3543 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3544 if (wcaps == AC_WCAP_OUT_AMP)
3545 /* found a mono speaker with an amp, must be lfe */
3546 lfe_pin = pin;
3547 }
3548
3549 /* if speaker_outs is 0, then speakers may be in line_outs */
3550 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3551 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3552 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3553 unsigned int defcfg;
8b551785 3554 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3555 AC_VERB_GET_CONFIG_DEFAULT,
3556 0x00);
8b551785 3557 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3558 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3559 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3560 if (wcaps == AC_WCAP_OUT_AMP)
3561 /* found a mono speaker with an amp,
3562 must be lfe */
3563 lfe_pin = pin;
3564 }
3565 }
3566 }
3567
3568 if (lfe_pin) {
eb06ed8f 3569 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3570 if (err < 0)
3571 return err;
3572 }
3573
3574 return 0;
3575}
3576
c7d4b2fa
M		 3577static int stac9200_parse_auto_config(struct hda_codec *codec)
3578{
3579 struct sigmatel_spec *spec = codec->spec;
3580 int err;
3581
df694daa 3582 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3583 return err;
3584
3585 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3586 return err;
3587
82bc955f
TI		 3588 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3589 return err;
3590
160ea0dc
RF		 3591 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3592 return err;
3593
355a0ec4
TI		 3594 if (spec->num_muxes > 0) {
3595 err = stac92xx_auto_create_mux_input_ctls(codec);
3596 if (err < 0)
3597 return err;
3598 }
3599
82bc955f 3600 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3601 spec->multiout.dig_out_nid = 0x05;
82bc955f 3602 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3603 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 3604
3605 if (spec->kctl_alloc)
3606 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3607
3608 spec->input_mux = &spec->private_imux;
8b65727b 3609 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3610
3611 return 1;
3612}
3613
62fe78e9
SR		 3614/*
3615 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3616 * funky external mute control using GPIO pins.
3617 */
3618
76e1ddfb 3619static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3620 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3621{
3622 unsigned int gpiostate, gpiomask, gpiodir;
3623
3624 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3625 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3626 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3627
3628 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3629 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3630 gpiomask |= mask;
62fe78e9
SR		 3631
3632 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3633 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3634 gpiodir |= dir_mask;
62fe78e9 3635
76e1ddfb 3636 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3637 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3638
3639 snd_hda_codec_write(codec, codec->afg, 0,
3640 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3641 snd_hda_codec_read(codec, codec->afg, 0,
3642 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3643
3644 msleep(1);
3645
76e1ddfb
TI		 3646 snd_hda_codec_read(codec, codec->afg, 0,
3647 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3648}
3649
314634bc
TI		 3650static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3651 unsigned int event)
3652{
3653 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3654 snd_hda_codec_write_cache(codec, nid, 0,
3655 AC_VERB_SET_UNSOLICITED_ENABLE,
3656 (AC_USRSP_EN | event));
314634bc
TI		 3657}
3658
a64135a2
MR		 3659static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3660{
3661 int i;
3662 for (i = 0; i < cfg->hp_outs; i++)
3663 if (cfg->hp_pins[i] == nid)
3664 return 1; /* nid is a HP-Out */
3665
3666 return 0; /* nid is not a HP-Out */
3667};
3668
b76c850f
MR		 3669static void stac92xx_power_down(struct hda_codec *codec)
3670{
3671 struct sigmatel_spec *spec = codec->spec;
3672
3673 /* power down inactive DACs */
3674 hda_nid_t *dac;
3675 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3676 if (!is_in_dac_nids(spec, *dac) &&
3677 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3678 snd_hda_codec_write_cache(codec, *dac, 0,
3679 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3680}
3681
c7d4b2fa
M		 3682static int stac92xx_init(struct hda_codec *codec)
3683{
3684 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3685 struct auto_pin_cfg *cfg = &spec->autocfg;
3686 int i;
c7d4b2fa 3687
c7d4b2fa
M		 3688 snd_hda_sequence_write(codec, spec->init);
3689
8daaaa97
MR		 3690 /* power down adcs initially */
3691 if (spec->powerdown_adcs)
3692 for (i = 0; i < spec->num_adcs; i++)
3693 snd_hda_codec_write_cache(codec,
3694 spec->adc_nids[i], 0,
3695 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
82bc955f
TI		 3696 /* set up pins */
3697 if (spec->hp_detect) {
505cb341 3698 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3699 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3700 enable_pin_detect(codec, cfg->hp_pins[i],
3701 STAC_HP_EVENT);
0a07acaf
TI		 3702 /* force to enable the first line-out; the others are set up
3703 * in unsol_event
3704 */
3705 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3706 AC_PINCTL_OUT_EN);
eb995a8c 3707 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3708 /* fake event to set up pins */
3709 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3710 } else {
3711 stac92xx_auto_init_multi_out(codec);
3712 stac92xx_auto_init_hp_out(codec);
3713 }
3714 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3715 hda_nid_t nid = cfg->input_pins[i];
3716 if (nid) {
4f1e6bc3
TI		 3717 unsigned int pinctl;
3718 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3719 /* for mic pins, force to initialize */
3720 pinctl = stac92xx_get_vref(codec, nid);
3721 } else {
3722 pinctl = snd_hda_codec_read(codec, nid, 0,
3723 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3724 /* if PINCTL already set then skip */
3725 if (pinctl & AC_PINCTL_IN_EN)
3726 continue;
3727 }
3728 pinctl |= AC_PINCTL_IN_EN;
c960a03b
TI		 3729 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3730 }
82bc955f 3731 }
a64135a2
MR		 3732 for (i = 0; i < spec->num_dmics; i++)
3733 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3734 AC_PINCTL_IN_EN);
3735 for (i = 0; i < spec->num_pwrs; i++) {
3736 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3737 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3738 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3739 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3740 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3741 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3742 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3743 /* outputs are only ports capable of power management
3744 * any attempts on powering down a input port cause the
3745 * referenced VREF to act quirky.
3746 */
3747 if (pinctl & AC_PINCTL_IN_EN)
3748 continue;
aafc4412
MR		 3749 /* skip any ports that don't have jacks since presence
3750 * detection is useless */
3751 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3752 continue;
a64135a2
MR		 3753 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3754 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3755 }
b76c850f
MR		 3756 if (spec->dac_list)
3757 stac92xx_power_down(codec);
82bc955f
TI		 3758 if (cfg->dig_out_pin)
3759 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3760 AC_PINCTL_OUT_EN);
3761 if (cfg->dig_in_pin)
3762 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3763 AC_PINCTL_IN_EN);
3764
4fe5195c
MR		 3765 stac_gpio_set(codec, spec->gpio_mask,
3766 spec->gpio_dir, spec->gpio_data);
62fe78e9 3767
c7d4b2fa
M		 3768 return 0;
3769}
3770
2f2f4251
M		 3771static void stac92xx_free(struct hda_codec *codec)
3772{
c7d4b2fa
M		 3773 struct sigmatel_spec *spec = codec->spec;
3774 int i;
3775
3776 if (! spec)
3777 return;
3778
3779 if (spec->kctl_alloc) {
3780 for (i = 0; i < spec->num_kctl_used; i++)
3781 kfree(spec->kctl_alloc[i].name);
3782 kfree(spec->kctl_alloc);
3783 }
3784
11b44bbd
RF		 3785 if (spec->bios_pin_configs)
3786 kfree(spec->bios_pin_configs);
3787
c7d4b2fa 3788 kfree(spec);
1cd2224c 3789 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3790}
3791
4e55096e
M		 3792static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3793 unsigned int flag)
3794{
3795 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3796 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3797
f9acba43
TI		 3798 if (pin_ctl & AC_PINCTL_IN_EN) {
3799 /*
3800 * we need to check the current set-up direction of
3801 * shared input pins since they can be switched via
3802 * "xxx as Output" mixer switch
3803 */
3804 struct sigmatel_spec *spec = codec->spec;
3805 struct auto_pin_cfg *cfg = &spec->autocfg;
3806 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3807 spec->line_switch) ||
3808 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3809 spec->mic_switch))
3810 return;
3811 }
3812
7b043899
SL		 3813 /* if setting pin direction bits, clear the current
3814 direction bits first */
3815 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3816 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3817
82beb8fd 3818 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3819 AC_VERB_SET_PIN_WIDGET_CONTROL,
3820 pin_ctl | flag);
3821}
3822
3823static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3824 unsigned int flag)
3825{
3826 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3827 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3828 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3829 AC_VERB_SET_PIN_WIDGET_CONTROL,
3830 pin_ctl & ~flag);
3831}
3832
40c1d308 3833static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3834{
3835 if (!nid)
3836 return 0;
3837 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3838 & (1 << 31)) {
3839 unsigned int pinctl;
3840 pinctl = snd_hda_codec_read(codec, nid, 0,
3841 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3842 if (pinctl & AC_PINCTL_IN_EN)
3843 return 0; /* mic- or line-input */
3844 else
3845 return 1; /* HP-output */
3846 }
314634bc
TI		 3847 return 0;
3848}
3849
d7a89436
TI		 3850/* return non-zero if the hp-pin of the given array index isn't
3851 * a jack-detection target
3852 */
3853static int no_hp_sensing(struct sigmatel_spec *spec, int i)
3854{
3855 struct auto_pin_cfg *cfg = &spec->autocfg;
3856
3857 /* ignore sensing of shared line and mic jacks */
3858 if (spec->line_switch &&
3859 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_LINE])
3860 return 1;
3861 if (spec->mic_switch &&
3862 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_MIC])
3863 return 1;
3864 /* ignore if the pin is set as line-out */
3865 if (cfg->hp_pins[i] == spec->hp_switch)
3866 return 1;
3867 return 0;
3868}
3869
314634bc 3870static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3871{
3872 struct sigmatel_spec *spec = codec->spec;
3873 struct auto_pin_cfg *cfg = &spec->autocfg;
3874 int i, presence;
3875
eb06ed8f 3876 presence = 0;
4fe5195c
MR		 3877 if (spec->gpio_mute)
3878 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3879 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3880
eb06ed8f 3881 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3882 if (presence)
3883 break;
d7a89436
TI		 3884 if (no_hp_sensing(spec, i))
3885 continue;
4fe5195c 3886 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3887 }
4e55096e
M		 3888
3889 if (presence) {
d7a89436 3890 /* disable lineouts */
7c2ba97b 3891 if (spec->hp_switch)
d7a89436
TI		 3892 stac92xx_reset_pinctl(codec, spec->hp_switch,
3893 AC_PINCTL_OUT_EN);
4e55096e
M		 3894 for (i = 0; i < cfg->line_outs; i++)
3895 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3896 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3897 for (i = 0; i < cfg->speaker_outs; i++)
3898 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3899 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3900 if (spec->eapd_mask)
3901 stac_gpio_set(codec, spec->gpio_mask,
3902 spec->gpio_dir, spec->gpio_data &
3903 ~spec->eapd_mask);
4e55096e 3904 } else {
d7a89436 3905 /* enable lineouts */
7c2ba97b 3906 if (spec->hp_switch)
d7a89436
TI		 3907 stac92xx_set_pinctl(codec, spec->hp_switch,
3908 AC_PINCTL_OUT_EN);
4e55096e
M		 3909 for (i = 0; i < cfg->line_outs; i++)
3910 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3911 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3912 for (i = 0; i < cfg->speaker_outs; i++)
3913 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3914 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3915 if (spec->eapd_mask)
3916 stac_gpio_set(codec, spec->gpio_mask,
3917 spec->gpio_dir, spec->gpio_data |
3918 spec->eapd_mask);
4e55096e 3919 }
d7a89436
TI		 3920 /* toggle hp outs */
3921 for (i = 0; i < cfg->hp_outs; i++) {
3922 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
3923 if (no_hp_sensing(spec, i))
3924 continue;
3925 if (presence)
3926 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
3927 else
3928 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
3929 }
4e55096e
M		 3930}
3931
a64135a2
MR		 3932static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3933{
3934 struct sigmatel_spec *spec = codec->spec;
3935 hda_nid_t nid = spec->pwr_nids[idx];
3936 int presence, val;
3937 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3938 & 0x000000ff;
3939 presence = get_hp_pin_presence(codec, nid);
d0513fc6
MR		 3940
3941 /* several codecs have two power down bits */
3942 if (spec->pwr_mapping)
3943 idx = spec->pwr_mapping[idx];
3944 else
3945 idx = 1 << idx;
a64135a2
MR		 3946
3947 if (presence)
3948 val &= ~idx;
3949 else
3950 val |= idx;
3951
3952 /* power down unused output ports */
3953 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3954};
3955
314634bc
TI		 3956static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3957{
a64135a2
MR		 3958 struct sigmatel_spec *spec = codec->spec;
3959 int idx = res >> 26 & 0x0f;
3960
72474be6 3961 switch ((res >> 26) & 0x70) {
314634bc
TI		 3962 case STAC_HP_EVENT:
3963 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3964 /* fallthru */
3965 case STAC_PWR_EVENT:
3966 if (spec->num_pwrs > 0)
3967 stac92xx_pin_sense(codec, idx);
72474be6
MR		 3968 break;
3969 case STAC_VREF_EVENT: {
3970 int data = snd_hda_codec_read(codec, codec->afg, 0,
3971 AC_VERB_GET_GPIO_DATA, 0);
3972 /* toggle VREF state based on GPIOx status */
3973 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
3974 !!(data & (1 << idx)));
3975 break;
3976 }
314634bc
TI		 3977 }
3978}
3979
cb53c626 3980#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3981static int stac92xx_resume(struct hda_codec *codec)
3982{
dc81bed1
TI		 3983 struct sigmatel_spec *spec = codec->spec;
3984
11b44bbd 3985 stac92xx_set_config_regs(codec);
dc81bed1 3986 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3987 stac_gpio_set(codec, spec->gpio_mask,
3988 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3989 snd_hda_codec_resume_amp(codec);
3990 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3991 /* power down inactive DACs */
3992 if (spec->dac_list)
3993 stac92xx_power_down(codec);
dc81bed1
TI		 3994 /* invoke unsolicited event to reset the HP state */
3995 if (spec->hp_detect)
3996 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3997 return 0;
3998}
3999#endif
4000
2f2f4251
M		 4001static struct hda_codec_ops stac92xx_patch_ops = {
4002 .build_controls = stac92xx_build_controls,
4003 .build_pcms = stac92xx_build_pcms,
4004 .init = stac92xx_init,
4005 .free = stac92xx_free,
4e55096e 4006 .unsol_event = stac92xx_unsol_event,
cb53c626 4007#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4008 .resume = stac92xx_resume,
4009#endif
2f2f4251
M		 4010};
4011
4012static int patch_stac9200(struct hda_codec *codec)
4013{
4014 struct sigmatel_spec *spec;
c7d4b2fa 4015 int err;
2f2f4251 4016
e560d8d8 4017 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4018 if (spec == NULL)
4019 return -ENOMEM;
4020
4021 codec->spec = spec;
a4eed138 4022 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4023 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4024 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4025 stac9200_models,
4026 stac9200_cfg_tbl);
11b44bbd
RF		 4027 if (spec->board_config < 0) {
4028 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4029 err = stac92xx_save_bios_config_regs(codec);
4030 if (err < 0) {
4031 stac92xx_free(codec);
4032 return err;
4033 }
4034 spec->pin_configs = spec->bios_pin_configs;
4035 } else {
403d1944
MP		 4036 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
4037 stac92xx_set_config_regs(codec);
4038 }
2f2f4251
M		 4039
4040 spec->multiout.max_channels = 2;
4041 spec->multiout.num_dacs = 1;
4042 spec->multiout.dac_nids = stac9200_dac_nids;
4043 spec->adc_nids = stac9200_adc_nids;
4044 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4045 spec->num_muxes = 1;
8b65727b 4046 spec->num_dmics = 0;
9e05b7a3 4047 spec->num_adcs = 1;
a64135a2 4048 spec->num_pwrs = 0;
c7d4b2fa 4049
bf277785
TD		 4050 if (spec->board_config == STAC_9200_GATEWAY ||
4051 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4052 spec->init = stac9200_eapd_init;
4053 else
4054 spec->init = stac9200_core_init;
2f2f4251 4055 spec->mixer = stac9200_mixer;
c7d4b2fa 4056
117f257d
TI		 4057 if (spec->board_config == STAC_9200_PANASONIC) {
4058 spec->gpio_mask = spec->gpio_dir = 0x09;
4059 spec->gpio_data = 0x00;
4060 }
4061
c7d4b2fa
M		 4062 err = stac9200_parse_auto_config(codec);
4063 if (err < 0) {
4064 stac92xx_free(codec);
4065 return err;
4066 }
2f2f4251
M		 4067
4068 codec->patch_ops = stac92xx_patch_ops;
4069
4070 return 0;
4071}
4072
8e21c34c
TD		 4073static int patch_stac925x(struct hda_codec *codec)
4074{
4075 struct sigmatel_spec *spec;
4076 int err;
4077
4078 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4079 if (spec == NULL)
4080 return -ENOMEM;
4081
4082 codec->spec = spec;
a4eed138 4083 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 4084 spec->pin_nids = stac925x_pin_nids;
4085 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
4086 stac925x_models,
4087 stac925x_cfg_tbl);
9e507abd 4088 again:
8e21c34c 4089 if (spec->board_config < 0) {
2c11f955
TD		 4090 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
4091 "using BIOS defaults\n");
8e21c34c
TD		 4092 err = stac92xx_save_bios_config_regs(codec);
4093 if (err < 0) {
4094 stac92xx_free(codec);
4095 return err;
4096 }
4097 spec->pin_configs = spec->bios_pin_configs;
4098 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
4099 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
4100 stac92xx_set_config_regs(codec);
4101 }
4102
4103 spec->multiout.max_channels = 2;
4104 spec->multiout.num_dacs = 1;
4105 spec->multiout.dac_nids = stac925x_dac_nids;
4106 spec->adc_nids = stac925x_adc_nids;
4107 spec->mux_nids = stac925x_mux_nids;
4108 spec->num_muxes = 1;
9e05b7a3 4109 spec->num_adcs = 1;
a64135a2 4110 spec->num_pwrs = 0;
2c11f955
TD		 4111 switch (codec->vendor_id) {
4112 case 0x83847632: /* STAC9202 */
4113 case 0x83847633: /* STAC9202D */
4114 case 0x83847636: /* STAC9251 */
4115 case 0x83847637: /* STAC9251D */
f6e9852a 4116 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4117 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4118 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4119 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4120 break;
4121 default:
4122 spec->num_dmics = 0;
4123 break;
4124 }
8e21c34c
TD		 4125
4126 spec->init = stac925x_core_init;
4127 spec->mixer = stac925x_mixer;
4128
4129 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4130 if (!err) {
4131 if (spec->board_config < 0) {
4132 printk(KERN_WARNING "hda_codec: No auto-config is "
4133 "available, default to model=ref\n");
4134 spec->board_config = STAC_925x_REF;
4135 goto again;
4136 }
4137 err = -EINVAL;
4138 }
8e21c34c
TD		 4139 if (err < 0) {
4140 stac92xx_free(codec);
4141 return err;
4142 }
4143
4144 codec->patch_ops = stac92xx_patch_ops;
4145
4146 return 0;
4147}
4148
e1f0d669
MR		 4149static struct hda_input_mux stac92hd73xx_dmux = {
4150 .num_items = 4,
4151 .items = {
4152 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4153 { "Digital Mic 1", 0x09 },
4154 { "Digital Mic 2", 0x0a },
2a9c7816 4155 { "CD", 0x08 },
e1f0d669
MR		 4156 }
4157};
4158
4159static int patch_stac92hd73xx(struct hda_codec *codec)
4160{
4161 struct sigmatel_spec *spec;
4162 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4163 int err = 0;
4164
4165 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4166 if (spec == NULL)
4167 return -ENOMEM;
4168
4169 codec->spec = spec;
e99d32b3 4170 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4171 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4172 spec->pin_nids = stac92hd73xx_pin_nids;
4173 spec->board_config = snd_hda_check_board_config(codec,
4174 STAC_92HD73XX_MODELS,
4175 stac92hd73xx_models,
4176 stac92hd73xx_cfg_tbl);
4177again:
4178 if (spec->board_config < 0) {
4179 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4180 " STAC92HD73XX, using BIOS defaults\n");
4181 err = stac92xx_save_bios_config_regs(codec);
4182 if (err < 0) {
4183 stac92xx_free(codec);
4184 return err;
4185 }
4186 spec->pin_configs = spec->bios_pin_configs;
4187 } else {
4188 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
4189 stac92xx_set_config_regs(codec);
4190 }
4191
4192 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4193 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4194
4195 if (spec->multiout.num_dacs < 0) {
4196 printk(KERN_WARNING "hda_codec: Could not determine "
4197 "number of channels defaulting to DAC count\n");
4198 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4199 }
4200
4201 switch (spec->multiout.num_dacs) {
4202 case 0x3: /* 6 Channel */
4203 spec->mixer = stac92hd73xx_6ch_mixer;
4204 spec->init = stac92hd73xx_6ch_core_init;
4205 break;
4206 case 0x4: /* 8 Channel */
e1f0d669
MR		 4207 spec->mixer = stac92hd73xx_8ch_mixer;
4208 spec->init = stac92hd73xx_8ch_core_init;
4209 break;
4210 case 0x5: /* 10 Channel */
e1f0d669
MR		 4211 spec->mixer = stac92hd73xx_10ch_mixer;
4212 spec->init = stac92hd73xx_10ch_core_init;
4213 };
4214
4215 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4216 spec->aloopback_mask = 0x01;
4217 spec->aloopback_shift = 8;
4218
1cd2224c 4219 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4220 spec->mux_nids = stac92hd73xx_mux_nids;
4221 spec->adc_nids = stac92hd73xx_adc_nids;
4222 spec->dmic_nids = stac92hd73xx_dmic_nids;
4223 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4224 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4225 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4226 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4227
4228 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4229 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4230 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4231 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4232 sizeof(stac92hd73xx_dmux));
4233
a7662640 4234 switch (spec->board_config) {
6b3ab21e 4235 case STAC_DELL_EQ:
d654a660 4236 spec->init = dell_eq_core_init;
6b3ab21e
MR		 4237 /* fallthru */
4238 case STAC_DELL_M6:
2a9c7816 4239 spec->num_smuxes = 0;
2a9c7816
MR		 4240 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4241 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
4242 spec->num_amps = 1;
6b3ab21e
MR		 4243
4244 if (!spec->init)
4245 spec->init = dell_m6_core_init;
a7662640
MR		 4246 switch (codec->subsystem_id) {
4247 case 0x1028025e: /* Analog Mics */
4248 case 0x1028025f:
4249 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4250 spec->num_dmics = 0;
2a9c7816 4251 spec->private_dimux.num_items = 1;
a7662640 4252 break;
d654a660 4253 case 0x10280271: /* Digital Mics */
a7662640 4254 case 0x10280272:
d654a660
MR		 4255 case 0x10280254:
4256 case 0x10280255:
a7662640
MR		 4257 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4258 spec->num_dmics = 1;
2a9c7816 4259 spec->private_dimux.num_items = 2;
a7662640
MR		 4260 break;
4261 case 0x10280256: /* Both */
4262 case 0x10280057:
4263 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4264 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4265 spec->num_dmics = 1;
2a9c7816 4266 spec->private_dimux.num_items = 2;
a7662640
MR		 4267 break;
4268 }
4269 break;
4270 default:
4271 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4272 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
a7662640 4273 }
b2c4f4d7
MR		 4274 if (spec->board_config > STAC_92HD73XX_REF) {
4275 /* GPIO0 High = Enable EAPD */
4276 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4277 spec->gpio_data = 0x01;
4278 }
2a9c7816 4279 spec->dinput_mux = &spec->private_dimux;
a7662640 4280
a64135a2
MR		 4281 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4282 spec->pwr_nids = stac92hd73xx_pwr_nids;
4283
d9737751 4284 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4285
4286 if (!err) {
4287 if (spec->board_config < 0) {
4288 printk(KERN_WARNING "hda_codec: No auto-config is "
4289 "available, default to model=ref\n");
4290 spec->board_config = STAC_92HD73XX_REF;
4291 goto again;
4292 }
4293 err = -EINVAL;
4294 }
4295
4296 if (err < 0) {
4297 stac92xx_free(codec);
4298 return err;
4299 }
4300
4301 codec->patch_ops = stac92xx_patch_ops;
4302
4303 return 0;
4304}
4305
d0513fc6
MR		 4306static struct hda_input_mux stac92hd83xxx_dmux = {
4307 .num_items = 3,
4308 .items = {
4309 { "Analog Inputs", 0x03 },
4310 { "Digital Mic 1", 0x04 },
4311 { "Digital Mic 2", 0x05 },
4312 }
4313};
4314
4315static int patch_stac92hd83xxx(struct hda_codec *codec)
4316{
4317 struct sigmatel_spec *spec;
4318 int err;
4319
4320 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4321 if (spec == NULL)
4322 return -ENOMEM;
4323
4324 codec->spec = spec;
0ffa9807 4325 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4326 spec->mono_nid = 0x19;
4327 spec->digbeep_nid = 0x21;
4328 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4329 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4330 spec->adc_nids = stac92hd83xxx_adc_nids;
4331 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4332 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4333 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4334 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4335
4336 spec->init = stac92hd83xxx_core_init;
4337 switch (codec->vendor_id) {
4338 case 0x111d7605:
4339 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4340 break;
4341 default:
4342 spec->num_pwrs--;
4343 spec->init++; /* switch to config #2 */
4344 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4345 }
4346
4347 spec->mixer = stac92hd83xxx_mixer;
4348 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4349 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4350 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4351 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4352 spec->dinput_mux = &stac92hd83xxx_dmux;
4353 spec->pin_nids = stac92hd83xxx_pin_nids;
4354 spec->board_config = snd_hda_check_board_config(codec,
4355 STAC_92HD83XXX_MODELS,
4356 stac92hd83xxx_models,
4357 stac92hd83xxx_cfg_tbl);
4358again:
4359 if (spec->board_config < 0) {
4360 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4361 " STAC92HD83XXX, using BIOS defaults\n");
4362 err = stac92xx_save_bios_config_regs(codec);
4363 if (err < 0) {
4364 stac92xx_free(codec);
4365 return err;
4366 }
4367 spec->pin_configs = spec->bios_pin_configs;
4368 } else {
4369 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
4370 stac92xx_set_config_regs(codec);
4371 }
4372
4373 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4374 if (!err) {
4375 if (spec->board_config < 0) {
4376 printk(KERN_WARNING "hda_codec: No auto-config is "
4377 "available, default to model=ref\n");
4378 spec->board_config = STAC_92HD83XXX_REF;
4379 goto again;
4380 }
4381 err = -EINVAL;
4382 }
4383
4384 if (err < 0) {
4385 stac92xx_free(codec);
4386 return err;
4387 }
4388
4389 codec->patch_ops = stac92xx_patch_ops;
4390
4391 return 0;
4392}
4393
8daaaa97
MR		 4394#ifdef SND_HDA_NEEDS_RESUME
4395static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4396{
4397 struct sigmatel_spec *spec = codec->spec;
4398 int i;
4399 snd_hda_codec_write_cache(codec, codec->afg, 0,
4400 AC_VERB_SET_POWER_STATE, pwr);
4401
4402 msleep(1);
4403 for (i = 0; i < spec->num_adcs; i++) {
4404 snd_hda_codec_write_cache(codec,
4405 spec->adc_nids[i], 0,
4406 AC_VERB_SET_POWER_STATE, pwr);
4407 }
4408};
4409
4410static int stac92hd71xx_resume(struct hda_codec *codec)
4411{
4412 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4413 return stac92xx_resume(codec);
4414}
4415
4416static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4417{
4418 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
4419 return 0;
4420};
4421
4422#endif
4423
4424static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4425 .build_controls = stac92xx_build_controls,
4426 .build_pcms = stac92xx_build_pcms,
4427 .init = stac92xx_init,
4428 .free = stac92xx_free,
4429 .unsol_event = stac92xx_unsol_event,
4430#ifdef SND_HDA_NEEDS_RESUME
4431 .resume = stac92hd71xx_resume,
4432 .suspend = stac92hd71xx_suspend,
4433#endif
4434};
d0513fc6 4435
4b33c767
MR		 4436static struct hda_input_mux stac92hd71bxx_dmux = {
4437 .num_items = 4,
4438 .items = {
4439 { "Analog Inputs", 0x00 },
4440 { "Mixer", 0x01 },
4441 { "Digital Mic 1", 0x02 },
4442 { "Digital Mic 2", 0x03 },
4443 }
4444};
4445
e035b841
MR		 4446static int patch_stac92hd71bxx(struct hda_codec *codec)
4447{
4448 struct sigmatel_spec *spec;
4449 int err = 0;
4450
4451 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4452 if (spec == NULL)
4453 return -ENOMEM;
4454
4455 codec->spec = spec;
8daaaa97 4456 codec->patch_ops = stac92xx_patch_ops;
e035b841 4457 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4458 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4459 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4460 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4461 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4462 spec->board_config = snd_hda_check_board_config(codec,
4463 STAC_92HD71BXX_MODELS,
4464 stac92hd71bxx_models,
4465 stac92hd71bxx_cfg_tbl);
4466again:
4467 if (spec->board_config < 0) {
4468 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4469 " STAC92HD71BXX, using BIOS defaults\n");
4470 err = stac92xx_save_bios_config_regs(codec);
4471 if (err < 0) {
4472 stac92xx_free(codec);
4473 return err;
4474 }
4475 spec->pin_configs = spec->bios_pin_configs;
4476 } else {
4477 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
4478 stac92xx_set_config_regs(codec);
4479 }
4480
541eee87
MR		 4481 switch (codec->vendor_id) {
4482 case 0x111d76b6: /* 4 Port without Analog Mixer */
4483 case 0x111d76b7:
4484 case 0x111d76b4: /* 6 Port without Analog Mixer */
4485 case 0x111d76b5:
4486 spec->mixer = stac92hd71bxx_mixer;
4487 spec->init = stac92hd71bxx_core_init;
0ffa9807 4488 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4489 break;
aafc4412 4490 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4491 switch (spec->board_config) {
4492 case STAC_HP_M4:
72474be6
MR		 4493 /* Enable VREF power saving on GPIO1 detect */
4494 snd_hda_codec_write(codec, codec->afg, 0,
4495 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4496 snd_hda_codec_write_cache(codec, codec->afg, 0,
4497 AC_VERB_SET_UNSOLICITED_ENABLE,
4498 (AC_USRSP_EN | STAC_VREF_EVENT | 0x01));
4499 spec->gpio_mask |= 0x02;
4500 break;
4501 }
8daaaa97
MR		 4502 if ((codec->revision_id & 0xf) == 0 ||
4503 (codec->revision_id & 0xf) == 1) {
4504#ifdef SND_HDA_NEEDS_RESUME
4505 codec->patch_ops = stac92hd71bxx_patch_ops;
4506#endif
4507 spec->stream_delay = 40; /* 40 milliseconds */
4508 }
4509
aafc4412
MR		 4510 /* no output amps */
4511 spec->num_pwrs = 0;
4512 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4513 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4514
4515 /* disable VSW */
4516 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
4517 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
4518 break;
4519 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4520 if ((codec->revision_id & 0xf) == 1) {
4521#ifdef SND_HDA_NEEDS_RESUME
4522 codec->patch_ops = stac92hd71bxx_patch_ops;
4523#endif
4524 spec->stream_delay = 40; /* 40 milliseconds */
4525 }
4526
aafc4412
MR		 4527 /* no output amps */
4528 spec->num_pwrs = 0;
4529 /* fallthru */
541eee87 4530 default:
4b33c767 4531 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4532 spec->mixer = stac92hd71bxx_analog_mixer;
4533 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4534 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4535 }
4536
4b33c767 4537 spec->aloopback_mask = 0x50;
541eee87
MR		 4538 spec->aloopback_shift = 0;
4539
b2c4f4d7
MR		 4540 if (spec->board_config > STAC_92HD71BXX_REF) {
4541 /* GPIO0 = EAPD */
4542 spec->gpio_mask = 0x01;
4543 spec->gpio_dir = 0x01;
4544 spec->gpio_data = 0x01;
4545 }
e035b841 4546
8daaaa97 4547 spec->powerdown_adcs = 1;
1cd2224c 4548 spec->digbeep_nid = 0x26;
e035b841
MR		 4549 spec->mux_nids = stac92hd71bxx_mux_nids;
4550 spec->adc_nids = stac92hd71bxx_adc_nids;
4551 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4552 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4553 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4554 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4555
4556 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4557 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4558
6a14f585
MR		 4559 switch (spec->board_config) {
4560 case STAC_HP_M4:
4561 spec->num_dmics = 0;
b9aea715 4562 spec->num_smuxes = 0;
6a14f585
MR		 4563 spec->num_dmuxes = 0;
4564
4565 /* enable internal microphone */
b9aea715
MR		 4566 stac92xx_set_config_reg(codec, 0x0e, 0x01813040);
4567 stac92xx_auto_set_pinctl(codec, 0x0e,
4568 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
6a14f585
MR		 4569 break;
4570 default:
4571 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4572 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4573 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4574 };
4575
aea7bb0a 4576 spec->multiout.num_dacs = 1;
e035b841
MR		 4577 spec->multiout.hp_nid = 0x11;
4578 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4b33c767
MR		 4579 if (spec->dinput_mux)
4580 spec->private_dimux.num_items +=
4581 spec->num_dmics -
4582 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4583
4584 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4585 if (!err) {
4586 if (spec->board_config < 0) {
4587 printk(KERN_WARNING "hda_codec: No auto-config is "
4588 "available, default to model=ref\n");
4589 spec->board_config = STAC_92HD71BXX_REF;
4590 goto again;
4591 }
4592 err = -EINVAL;
4593 }
4594
4595 if (err < 0) {
4596 stac92xx_free(codec);
4597 return err;
4598 }
4599
e035b841
MR		 4600 return 0;
4601};
4602
2f2f4251
M		 4603static int patch_stac922x(struct hda_codec *codec)
4604{
4605 struct sigmatel_spec *spec;
c7d4b2fa 4606 int err;
2f2f4251 4607
e560d8d8 4608 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4609 if (spec == NULL)
4610 return -ENOMEM;
4611
4612 codec->spec = spec;
a4eed138 4613 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4614 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4615 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4616 stac922x_models,
4617 stac922x_cfg_tbl);
536319af 4618 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4619 spec->gpio_mask = spec->gpio_dir = 0x03;
4620 spec->gpio_data = 0x03;
3fc24d85
TI		 4621 /* Intel Macs have all same PCI SSID, so we need to check
4622 * codec SSID to distinguish the exact models
4623 */
6f0778d8 4624 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4625 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4626
4627 case 0x106b0800:
4628 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4629 break;
5d5d3bc3
IZ		 4630 case 0x106b0600:
4631 case 0x106b0700:
4632 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4633 break;
5d5d3bc3
IZ		 4634 case 0x106b0e00:
4635 case 0x106b0f00:
4636 case 0x106b1600:
4637 case 0x106b1700:
4638 case 0x106b0200:
4639 case 0x106b1e00:
4640 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4641 break;
5d5d3bc3
IZ		 4642 case 0x106b1a00:
4643 case 0x00000100:
4644 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4645 break;
5d5d3bc3
IZ		 4646 case 0x106b0a00:
4647 case 0x106b2200:
4648 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4649 break;
536319af
NB		 4650 default:
4651 spec->board_config = STAC_INTEL_MAC_V3;
4652 break;
3fc24d85
TI		 4653 }
4654 }
4655
9e507abd 4656 again:
11b44bbd
RF		 4657 if (spec->board_config < 0) {
4658 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4659 "using BIOS defaults\n");
4660 err = stac92xx_save_bios_config_regs(codec);
4661 if (err < 0) {
4662 stac92xx_free(codec);
4663 return err;
4664 }
4665 spec->pin_configs = spec->bios_pin_configs;
4666 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4667 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4668 stac92xx_set_config_regs(codec);
4669 }
2f2f4251 4670
c7d4b2fa
M		 4671 spec->adc_nids = stac922x_adc_nids;
4672 spec->mux_nids = stac922x_mux_nids;
2549413e 4673 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4674 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4675 spec->num_dmics = 0;
a64135a2 4676 spec->num_pwrs = 0;
c7d4b2fa
M		 4677
4678 spec->init = stac922x_core_init;
2f2f4251 4679 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4680
4681 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4682
3cc08dc6 4683 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4684 if (!err) {
4685 if (spec->board_config < 0) {
4686 printk(KERN_WARNING "hda_codec: No auto-config is "
4687 "available, default to model=ref\n");
4688 spec->board_config = STAC_D945_REF;
4689 goto again;
4690 }
4691 err = -EINVAL;
4692 }
3cc08dc6
MP		 4693 if (err < 0) {
4694 stac92xx_free(codec);
4695 return err;
4696 }
4697
4698 codec->patch_ops = stac92xx_patch_ops;
4699
807a4636
TI		 4700 /* Fix Mux capture level; max to 2 */
4701 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4702 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4703 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4704 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4705 (0 << AC_AMPCAP_MUTE_SHIFT));
4706
3cc08dc6
MP		 4707 return 0;
4708}
4709
4710static int patch_stac927x(struct hda_codec *codec)
4711{
4712 struct sigmatel_spec *spec;
4713 int err;
4714
4715 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4716 if (spec == NULL)
4717 return -ENOMEM;
4718
4719 codec->spec = spec;
a4eed138 4720 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4721 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4722 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4723 stac927x_models,
4724 stac927x_cfg_tbl);
9e507abd 4725 again:
8e9068b1
MR		 4726 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4727 if (spec->board_config < 0)
4728 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4729 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4730 err = stac92xx_save_bios_config_regs(codec);
4731 if (err < 0) {
4732 stac92xx_free(codec);
4733 return err;
4734 }
4735 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4736 } else {
3cc08dc6
MP		 4737 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4738 stac92xx_set_config_regs(codec);
4739 }
4740
1cd2224c 4741 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4742 spec->adc_nids = stac927x_adc_nids;
4743 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4744 spec->mux_nids = stac927x_mux_nids;
4745 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4746 spec->smux_nids = stac927x_smux_nids;
4747 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 4748 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 4749 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4750 spec->multiout.dac_nids = spec->dac_nids;
4751
81d3dbde 4752 switch (spec->board_config) {
93ed1503 4753 case STAC_D965_3ST:
93ed1503 4754 case STAC_D965_5ST:
8e9068b1 4755 /* GPIO0 High = Enable EAPD */
0fc9dec4 4756 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4757 spec->gpio_data = 0x01;
8e9068b1
MR		 4758 spec->num_dmics = 0;
4759
93ed1503 4760 spec->init = d965_core_init;
9e05b7a3 4761 spec->mixer = stac927x_mixer;
81d3dbde 4762 break;
8e9068b1 4763 case STAC_DELL_BIOS:
780c8be4
MR		 4764 switch (codec->subsystem_id) {
4765 case 0x10280209:
4766 case 0x1028022e:
4767 /* correct the device field to SPDIF out */
4768 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4769 break;
4770 };
03d7ca17
MR		 4771 /* configure the analog microphone on some laptops */
4772 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4773 /* correct the front output jack as a hp out */
7989fba9 4774 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4775 /* correct the front input jack as a mic */
4776 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4777 /* fallthru */
8e9068b1
MR		 4778 case STAC_DELL_3ST:
4779 /* GPIO2 High = Enable EAPD */
0fc9dec4 4780 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4781 spec->gpio_data = 0x04;
7f16859a
MR		 4782 spec->dmic_nids = stac927x_dmic_nids;
4783 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4784
8e9068b1
MR		 4785 spec->init = d965_core_init;
4786 spec->mixer = stac927x_mixer;
4787 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4788 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4789 break;
4790 default:
b2c4f4d7
MR		 4791 if (spec->board_config > STAC_D965_REF) {
4792 /* GPIO0 High = Enable EAPD */
4793 spec->eapd_mask = spec->gpio_mask = 0x01;
4794 spec->gpio_dir = spec->gpio_data = 0x01;
4795 }
8e9068b1
MR		 4796 spec->num_dmics = 0;
4797
4798 spec->init = stac927x_core_init;
4799 spec->mixer = stac927x_mixer;
7f16859a
MR		 4800 }
4801
a64135a2 4802 spec->num_pwrs = 0;
e1f0d669
MR		 4803 spec->aloopback_mask = 0x40;
4804 spec->aloopback_shift = 0;
8e9068b1 4805
3cc08dc6 4806 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4807 if (!err) {
4808 if (spec->board_config < 0) {
4809 printk(KERN_WARNING "hda_codec: No auto-config is "
4810 "available, default to model=ref\n");
4811 spec->board_config = STAC_D965_REF;
4812 goto again;
4813 }
4814 err = -EINVAL;
4815 }
c7d4b2fa
M		 4816 if (err < 0) {
4817 stac92xx_free(codec);
4818 return err;
4819 }
2f2f4251
M		 4820
4821 codec->patch_ops = stac92xx_patch_ops;
4822
52987656
TI		 4823 /*
4824 * !!FIXME!!
4825 * The STAC927x seem to require fairly long delays for certain
4826 * command sequences. With too short delays (even if the answer
4827 * is set to RIRB properly), it results in the silence output
4828 * on some hardwares like Dell.
4829 *
4830 * The below flag enables the longer delay (see get_response
4831 * in hda_intel.c).
4832 */
4833 codec->bus->needs_damn_long_delay = 1;
4834
2f2f4251
M		 4835 return 0;
4836}
4837
f3302a59
MP		 4838static int patch_stac9205(struct hda_codec *codec)
4839{
4840 struct sigmatel_spec *spec;
8259980e 4841 int err;
f3302a59
MP		 4842
4843 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4844 if (spec == NULL)
4845 return -ENOMEM;
4846
4847 codec->spec = spec;
a4eed138 4848 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4849 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4850 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4851 stac9205_models,
4852 stac9205_cfg_tbl);
9e507abd 4853 again:
11b44bbd
RF		 4854 if (spec->board_config < 0) {
4855 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4856 err = stac92xx_save_bios_config_regs(codec);
4857 if (err < 0) {
4858 stac92xx_free(codec);
4859 return err;
4860 }
4861 spec->pin_configs = spec->bios_pin_configs;
4862 } else {
f3302a59
MP		 4863 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4864 stac92xx_set_config_regs(codec);
4865 }
4866
1cd2224c 4867 spec->digbeep_nid = 0x23;
f3302a59 4868 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4869 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4870 spec->mux_nids = stac9205_mux_nids;
2549413e 4871 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 4872 spec->smux_nids = stac9205_smux_nids;
4873 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 4874 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4875 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4876 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4877 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4878 spec->num_pwrs = 0;
f3302a59
MP		 4879
4880 spec->init = stac9205_core_init;
4881 spec->mixer = stac9205_mixer;
4882
e1f0d669
MR		 4883 spec->aloopback_mask = 0x40;
4884 spec->aloopback_shift = 0;
f3302a59 4885 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4886
ae0a8ed8 4887 switch (spec->board_config){
ae0a8ed8 4888 case STAC_9205_DELL_M43:
87d48363
MR		 4889 /* Enable SPDIF in/out */
4890 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4891 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4892
4fe5195c
MR		 4893 /* Enable unsol response for GPIO4/Dock HP connection */
4894 snd_hda_codec_write(codec, codec->afg, 0,
4895 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4896 snd_hda_codec_write_cache(codec, codec->afg, 0,
4897 AC_VERB_SET_UNSOLICITED_ENABLE,
4898 (AC_USRSP_EN | STAC_HP_EVENT));
4899
4900 spec->gpio_dir = 0x0b;
0fc9dec4 4901 spec->eapd_mask = 0x01;
4fe5195c
MR		 4902 spec->gpio_mask = 0x1b;
4903 spec->gpio_mute = 0x10;
e2e7d624 4904 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4905 * GPIO3 Low = DRM
87d48363 4906 */
4fe5195c 4907 spec->gpio_data = 0x01;
ae0a8ed8 4908 break;
b2c4f4d7
MR		 4909 case STAC_9205_REF:
4910 /* SPDIF-In enabled */
4911 break;
ae0a8ed8
TD		 4912 default:
4913 /* GPIO0 High = EAPD */
0fc9dec4 4914 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4915 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4916 break;
4917 }
33382403 4918
f3302a59 4919 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 4920 if (!err) {
4921 if (spec->board_config < 0) {
4922 printk(KERN_WARNING "hda_codec: No auto-config is "
4923 "available, default to model=ref\n");
4924 spec->board_config = STAC_9205_REF;
4925 goto again;
4926 }
4927 err = -EINVAL;
4928 }
f3302a59
MP		 4929 if (err < 0) {
4930 stac92xx_free(codec);
4931 return err;
4932 }
4933
4934 codec->patch_ops = stac92xx_patch_ops;
4935
4936 return 0;
4937}
4938
db064e50 4939/*
6d859065 4940 * STAC9872 hack
db064e50
TI		 4941 */
4942
99ccc560 4943/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 4944static hda_nid_t vaio_dacs[] = { 0x2 };
4945#define VAIO_HP_DAC 0x5
4946static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
4947static hda_nid_t vaio_mux_nids[] = { 0x15 };
4948
4949static struct hda_input_mux vaio_mux = {
a3a2f429 4950 .num_items = 3,
db064e50 4951 .items = {
d773781c 4952 /* { "HP", 0x0 }, */
1624cb9a
TI		 4953 { "Mic Jack", 0x1 },
4954 { "Internal Mic", 0x2 },
db064e50
TI		 4955 { "PCM", 0x3 },
4956 }
4957};
4958
4959static struct hda_verb vaio_init[] = {
4960 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 4961 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 4962 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4963 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4964 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4965 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4966 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 4967 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4968 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4969 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4970 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4971 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4972 {}
4973};
4974
6d859065
GM		 4975static struct hda_verb vaio_ar_init[] = {
4976 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
4977 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4978 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4979 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4980/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
4981 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4982 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4983 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4984 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4985/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
4986 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4987 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4988 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4989 {}
4990};
4991
db064e50 4992/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4993static struct hda_bind_ctls vaio_bind_master_vol = {
4994 .ops = &snd_hda_bind_vol,
4995 .values = {
4996 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4997 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4998 0
4999 },
5000};
db064e50
TI		 5001
5002/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 5003static struct hda_bind_ctls vaio_bind_master_sw = {
5004 .ops = &snd_hda_bind_sw,
5005 .values = {
5006 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
5007 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
5008 0,
5009 },
5010};
db064e50
TI		 5011
5012static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 5013 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
5014 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 5015 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5016 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5017 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5018 {
5019 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5020 .name = "Capture Source",
5021 .count = 1,
5022 .info = stac92xx_mux_enum_info,
5023 .get = stac92xx_mux_enum_get,
5024 .put = stac92xx_mux_enum_put,
5025 },
5026 {}
5027};
5028
6d859065 5029static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 5030 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
5031 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 5032 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5033 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5034 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5035 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5036 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5037 {
5038 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5039 .name = "Capture Source",
5040 .count = 1,
5041 .info = stac92xx_mux_enum_info,
5042 .get = stac92xx_mux_enum_get,
5043 .put = stac92xx_mux_enum_put,
5044 },
5045 {}
5046};
5047
5048static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5049 .build_controls = stac92xx_build_controls,
5050 .build_pcms = stac92xx_build_pcms,
5051 .init = stac92xx_init,
5052 .free = stac92xx_free,
cb53c626 5053#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5054 .resume = stac92xx_resume,
5055#endif
5056};
5057
72e7b0dd
TI		 5058static int stac9872_vaio_init(struct hda_codec *codec)
5059{
5060 int err;
5061
5062 err = stac92xx_init(codec);
5063 if (err < 0)
5064 return err;
5065 if (codec->patch_ops.unsol_event)
5066 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5067 return 0;
5068}
5069
5070static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5071{
40c1d308 5072 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5073 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5074 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5075 } else {
5076 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5077 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5078 }
5079}
5080
5081static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5082{
5083 switch (res >> 26) {
5084 case STAC_HP_EVENT:
5085 stac9872_vaio_hp_detect(codec, res);
5086 break;
5087 }
5088}
5089
5090static struct hda_codec_ops stac9872_vaio_patch_ops = {
5091 .build_controls = stac92xx_build_controls,
5092 .build_pcms = stac92xx_build_pcms,
5093 .init = stac9872_vaio_init,
5094 .free = stac92xx_free,
5095 .unsol_event = stac9872_vaio_unsol_event,
5096#ifdef CONFIG_PM
5097 .resume = stac92xx_resume,
5098#endif
5099};
5100
6d859065
GM		 5101enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5102 CXD9872RD_VAIO,
5103 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5104 STAC9872AK_VAIO,
5105 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5106 STAC9872K_VAIO,
5107 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5108 CXD9872AKD_VAIO,
5109 STAC_9872_MODELS,
5110};
5111
5112static const char *stac9872_models[STAC_9872_MODELS] = {
5113 [CXD9872RD_VAIO] = "vaio",
5114 [CXD9872AKD_VAIO] = "vaio-ar",
5115};
5116
5117static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5118 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5119 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5120 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5121 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5122 {}
5123};
5124
6d859065 5125static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5126{
5127 struct sigmatel_spec *spec;
5128 int board_config;
5129
f5fcc13c
TI		 5130 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5131 stac9872_models,
5132 stac9872_cfg_tbl);
db064e50
TI		 5133 if (board_config < 0)
5134 /* unknown config, let generic-parser do its job... */
5135 return snd_hda_parse_generic_codec(codec);
5136
5137 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5138 if (spec == NULL)
5139 return -ENOMEM;
5140
5141 codec->spec = spec;
5142 switch (board_config) {
6d859065
GM		 5143 case CXD9872RD_VAIO:
5144 case STAC9872AK_VAIO:
5145 case STAC9872K_VAIO:
db064e50
TI		 5146 spec->mixer = vaio_mixer;
5147 spec->init = vaio_init;
5148 spec->multiout.max_channels = 2;
5149 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5150 spec->multiout.dac_nids = vaio_dacs;
5151 spec->multiout.hp_nid = VAIO_HP_DAC;
5152 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5153 spec->adc_nids = vaio_adcs;
a64135a2 5154 spec->num_pwrs = 0;
db064e50
TI		 5155 spec->input_mux = &vaio_mux;
5156 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5157 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5158 break;
6d859065
GM		 5159
5160 case CXD9872AKD_VAIO:
5161 spec->mixer = vaio_ar_mixer;
5162 spec->init = vaio_ar_init;
5163 spec->multiout.max_channels = 2;
5164 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5165 spec->multiout.dac_nids = vaio_dacs;
5166 spec->multiout.hp_nid = VAIO_HP_DAC;
5167 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5168 spec->num_pwrs = 0;
6d859065
GM		 5169 spec->adc_nids = vaio_adcs;
5170 spec->input_mux = &vaio_mux;
5171 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5172 codec->patch_ops = stac9872_patch_ops;
6d859065 5173 break;
db064e50
TI		 5174 }
5175
db064e50
TI		 5176 return 0;
5177}
5178
5179
2f2f4251
M		 5180/*
5181 * patch entries
5182 */
5183struct hda_codec_preset snd_hda_preset_sigmatel[] = {
5184 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5185 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5186 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5187 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5188 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5189 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5190 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5191 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5192 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5193 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5194 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5195 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5196 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5197 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5198 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5199 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5200 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5201 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5202 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5203 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5204 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5205 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5206 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5207 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5208 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5209 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5210 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5211 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5212 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5213 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5214 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5215 /* The following does not take into account .id=0x83847661 when subsys =
5216 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5217 * currently not fully supported.
5218 */
5219 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5220 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5221 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5222 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5223 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5224 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5225 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5226 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5227 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5228 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5229 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5230 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5231 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5232 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5233 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5234 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5235 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5236 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5237 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5238 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5239 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5240 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5241 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5242 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5243 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5244 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5245 {} /* terminator */
5246};
Clone of davem's net-next-2.6 tree