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[ALSA] hda-codec - Add missing descriptions for STAC codec models
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
35
4e55096e 36#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 37#define STAC_PWR_EVENT 0x20
38#define STAC_HP_EVENT 0x30
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
bf277785 42 STAC_9200_OQO,
dfe495d0
TI		 43 STAC_9200_DELL_D21,
44 STAC_9200_DELL_D22,
45 STAC_9200_DELL_D23,
46 STAC_9200_DELL_M21,
47 STAC_9200_DELL_M22,
48 STAC_9200_DELL_M23,
49 STAC_9200_DELL_M24,
50 STAC_9200_DELL_M25,
51 STAC_9200_DELL_M26,
52 STAC_9200_DELL_M27,
1194b5b7 53 STAC_9200_GATEWAY,
f5fcc13c
TI		 54 STAC_9200_MODELS
55};
56
57enum {
58 STAC_9205_REF,
dfe495d0 59 STAC_9205_DELL_M42,
ae0a8ed8
TD		 60 STAC_9205_DELL_M43,
61 STAC_9205_DELL_M44,
f5fcc13c
TI		 62 STAC_9205_MODELS
63};
64
e1f0d669
MR		 65enum {
66 STAC_92HD73XX_REF,
a7662640 67 STAC_DELL_M6,
e1f0d669
MR		 68 STAC_92HD73XX_MODELS
69};
70
e035b841
MR		 71enum {
72 STAC_92HD71BXX_REF,
a7662640
MR		 73 STAC_DELL_M4_1,
74 STAC_DELL_M4_2,
e035b841
MR		 75 STAC_92HD71BXX_MODELS
76};
77
8e21c34c
TD		 78enum {
79 STAC_925x_REF,
80 STAC_M2_2,
81 STAC_MA6,
2c11f955 82 STAC_PA6,
8e21c34c
TD		 83 STAC_925x_MODELS
84};
85
f5fcc13c
TI		 86enum {
87 STAC_D945_REF,
88 STAC_D945GTP3,
89 STAC_D945GTP5,
5d5d3bc3
IZ		 90 STAC_INTEL_MAC_V1,
91 STAC_INTEL_MAC_V2,
92 STAC_INTEL_MAC_V3,
93 STAC_INTEL_MAC_V4,
94 STAC_INTEL_MAC_V5,
dfe495d0 95 /* for backward compatibility */
f5fcc13c 96 STAC_MACMINI,
3fc24d85 97 STAC_MACBOOK,
6f0778d8
NB		 98 STAC_MACBOOK_PRO_V1,
99 STAC_MACBOOK_PRO_V2,
f16928fb 100 STAC_IMAC_INTEL,
0dae0f83 101 STAC_IMAC_INTEL_20,
dfe495d0
TI		 102 STAC_922X_DELL_D81,
103 STAC_922X_DELL_D82,
104 STAC_922X_DELL_M81,
105 STAC_922X_DELL_M82,
f5fcc13c
TI		 106 STAC_922X_MODELS
107};
108
109enum {
110 STAC_D965_REF,
111 STAC_D965_3ST,
112 STAC_D965_5ST,
4ff076e5 113 STAC_DELL_3ST,
8e9068b1 114 STAC_DELL_BIOS,
f5fcc13c
TI		 115 STAC_927X_MODELS
116};
403d1944 117
2f2f4251 118struct sigmatel_spec {
c8b6bf9b 119 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 120 unsigned int num_mixers;
121
403d1944 122 int board_config;
c7d4b2fa 123 unsigned int surr_switch: 1;
403d1944
MP		 124 unsigned int line_switch: 1;
125 unsigned int mic_switch: 1;
3cc08dc6 126 unsigned int alt_switch: 1;
82bc955f 127 unsigned int hp_detect: 1;
c7d4b2fa 128
4fe5195c
MR		 129 /* gpio lines */
130 unsigned int gpio_mask;
131 unsigned int gpio_dir;
132 unsigned int gpio_data;
133 unsigned int gpio_mute;
134
135 /* analog loopback */
e1f0d669
MR		 136 unsigned char aloopback_mask;
137 unsigned char aloopback_shift;
8259980e 138
a64135a2
MR		 139 /* power management */
140 unsigned int num_pwrs;
141 hda_nid_t *pwr_nids;
b76c850f 142 hda_nid_t *dac_list;
a64135a2 143
2f2f4251 144 /* playback */
b22b4821
MR		 145 struct hda_input_mux *mono_mux;
146 unsigned int cur_mmux;
2f2f4251 147 struct hda_multi_out multiout;
3cc08dc6 148 hda_nid_t dac_nids[5];
2f2f4251
M		 149
150 /* capture */
151 hda_nid_t *adc_nids;
2f2f4251 152 unsigned int num_adcs;
dabbed6f
M		 153 hda_nid_t *mux_nids;
154 unsigned int num_muxes;
8b65727b
MP		 155 hda_nid_t *dmic_nids;
156 unsigned int num_dmics;
e1f0d669 157 hda_nid_t *dmux_nids;
1697055e 158 unsigned int num_dmuxes;
dabbed6f 159 hda_nid_t dig_in_nid;
b22b4821 160 hda_nid_t mono_nid;
2f2f4251 161
2f2f4251
M		 162 /* pin widgets */
163 hda_nid_t *pin_nids;
164 unsigned int num_pins;
2f2f4251 165 unsigned int *pin_configs;
11b44bbd 166 unsigned int *bios_pin_configs;
2f2f4251
M		 167
168 /* codec specific stuff */
169 struct hda_verb *init;
c8b6bf9b 170 struct snd_kcontrol_new *mixer;
2f2f4251
M		 171
172 /* capture source */
8b65727b 173 struct hda_input_mux *dinput_mux;
e1f0d669 174 unsigned int cur_dmux[2];
c7d4b2fa 175 struct hda_input_mux *input_mux;
3cc08dc6 176 unsigned int cur_mux[3];
2f2f4251 177
403d1944
MP		 178 /* i/o switches */
179 unsigned int io_switch[2];
0fb87bb4 180 unsigned int clfe_swap;
5f10c4a9 181 unsigned int aloopback;
2f2f4251 182
c7d4b2fa
M		 183 struct hda_pcm pcm_rec[2]; /* PCM information */
184
185 /* dynamic controls and input_mux */
186 struct auto_pin_cfg autocfg;
187 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 188 struct snd_kcontrol_new *kctl_alloc;
8b65727b 189 struct hda_input_mux private_dimux;
c7d4b2fa 190 struct hda_input_mux private_imux;
b22b4821 191 struct hda_input_mux private_mono_mux;
2f2f4251
M		 192};
193
194static hda_nid_t stac9200_adc_nids[1] = {
195 0x03,
196};
197
198static hda_nid_t stac9200_mux_nids[1] = {
199 0x0c,
200};
201
202static hda_nid_t stac9200_dac_nids[1] = {
203 0x02,
204};
205
a64135a2
MR		 206static hda_nid_t stac92hd73xx_pwr_nids[8] = {
207 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
208 0x0f, 0x10, 0x11
209};
210
e1f0d669
MR		 211static hda_nid_t stac92hd73xx_adc_nids[2] = {
212 0x1a, 0x1b
213};
214
215#define STAC92HD73XX_NUM_DMICS 2
216static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
217 0x13, 0x14, 0
218};
219
220#define STAC92HD73_DAC_COUNT 5
221static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
222 0x15, 0x16, 0x17, 0x18, 0x19,
223};
224
225static hda_nid_t stac92hd73xx_mux_nids[4] = {
226 0x28, 0x29, 0x2a, 0x2b,
227};
228
229static hda_nid_t stac92hd73xx_dmux_nids[2] = {
230 0x20, 0x21,
231};
232
a64135a2
MR		 233static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
234 0x0a, 0x0d, 0x0f
235};
236
e035b841
MR		 237static hda_nid_t stac92hd71bxx_adc_nids[2] = {
238 0x12, 0x13,
239};
240
241static hda_nid_t stac92hd71bxx_mux_nids[2] = {
242 0x1a, 0x1b
243};
244
e1f0d669
MR		 245static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
246 0x1c,
247};
248
e035b841
MR		 249static hda_nid_t stac92hd71bxx_dac_nids[2] = {
250 0x10, /*0x11, */
251};
252
253#define STAC92HD71BXX_NUM_DMICS 2
254static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
255 0x18, 0x19, 0
256};
257
8e21c34c
TD		 258static hda_nid_t stac925x_adc_nids[1] = {
259 0x03,
260};
261
262static hda_nid_t stac925x_mux_nids[1] = {
263 0x0f,
264};
265
266static hda_nid_t stac925x_dac_nids[1] = {
267 0x02,
268};
269
f6e9852a
TI		 270#define STAC925X_NUM_DMICS 1
271static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
272 0x15, 0
2c11f955
TD		 273};
274
1697055e
TI		 275static hda_nid_t stac925x_dmux_nids[1] = {
276 0x14,
277};
278
2f2f4251
M		 279static hda_nid_t stac922x_adc_nids[2] = {
280 0x06, 0x07,
281};
282
283static hda_nid_t stac922x_mux_nids[2] = {
284 0x12, 0x13,
285};
286
3cc08dc6
MP		 287static hda_nid_t stac927x_adc_nids[3] = {
288 0x07, 0x08, 0x09
289};
290
291static hda_nid_t stac927x_mux_nids[3] = {
292 0x15, 0x16, 0x17
293};
294
b76c850f
MR		 295static hda_nid_t stac927x_dac_nids[6] = {
296 0x02, 0x03, 0x04, 0x05, 0x06, 0
297};
298
e1f0d669
MR		 299static hda_nid_t stac927x_dmux_nids[1] = {
300 0x1b,
301};
302
7f16859a
MR		 303#define STAC927X_NUM_DMICS 2
304static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
305 0x13, 0x14, 0
306};
307
f3302a59
MP		 308static hda_nid_t stac9205_adc_nids[2] = {
309 0x12, 0x13
310};
311
312static hda_nid_t stac9205_mux_nids[2] = {
313 0x19, 0x1a
314};
315
e1f0d669 316static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 317 0x1d,
e1f0d669
MR		 318};
319
f6e9852a
TI		 320#define STAC9205_NUM_DMICS 2
321static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
322 0x17, 0x18, 0
8b65727b
MP		 323};
324
c7d4b2fa 325static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 326 0x08, 0x09, 0x0d, 0x0e,
327 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 328};
329
8e21c34c
TD		 330static hda_nid_t stac925x_pin_nids[8] = {
331 0x07, 0x08, 0x0a, 0x0b,
332 0x0c, 0x0d, 0x10, 0x11,
333};
334
2f2f4251
M		 335static hda_nid_t stac922x_pin_nids[10] = {
336 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
337 0x0f, 0x10, 0x11, 0x15, 0x1b,
338};
339
a7662640 340static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 341 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
342 0x0f, 0x10, 0x11, 0x12, 0x13,
a7662640 343 0x14, 0x1e, 0x22
e1f0d669
MR		 344};
345
e035b841
MR		 346static hda_nid_t stac92hd71bxx_pin_nids[10] = {
347 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
348 0x0f, 0x14, 0x18, 0x19, 0x1e,
349};
350
3cc08dc6
MP		 351static hda_nid_t stac927x_pin_nids[14] = {
352 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
353 0x0f, 0x10, 0x11, 0x12, 0x13,
354 0x14, 0x21, 0x22, 0x23,
355};
356
f3302a59
MP		 357static hda_nid_t stac9205_pin_nids[12] = {
358 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
359 0x0f, 0x14, 0x16, 0x17, 0x18,
360 0x21, 0x22,
f3302a59
MP		 361};
362
8b65727b
MP		 363static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
364 struct snd_ctl_elem_info *uinfo)
365{
366 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
367 struct sigmatel_spec *spec = codec->spec;
368 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
369}
370
371static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
372 struct snd_ctl_elem_value *ucontrol)
373{
374 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
375 struct sigmatel_spec *spec = codec->spec;
e1f0d669 376 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 377
e1f0d669 378 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 379 return 0;
380}
381
382static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
383 struct snd_ctl_elem_value *ucontrol)
384{
385 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
386 struct sigmatel_spec *spec = codec->spec;
e1f0d669 387 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 388
389 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 390 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 391}
392
c8b6bf9b 393static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 394{
395 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
396 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 397 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 398}
399
c8b6bf9b 400static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 401{
402 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
403 struct sigmatel_spec *spec = codec->spec;
404 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
405
406 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
407 return 0;
408}
409
c8b6bf9b 410static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 411{
412 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
413 struct sigmatel_spec *spec = codec->spec;
414 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
415
c7d4b2fa 416 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 417 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
418}
419
b22b4821
MR		 420static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
421 struct snd_ctl_elem_info *uinfo)
422{
423 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
424 struct sigmatel_spec *spec = codec->spec;
425 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
426}
427
428static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
429 struct snd_ctl_elem_value *ucontrol)
430{
431 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
432 struct sigmatel_spec *spec = codec->spec;
433
434 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
435 return 0;
436}
437
438static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
439 struct snd_ctl_elem_value *ucontrol)
440{
441 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
442 struct sigmatel_spec *spec = codec->spec;
443
444 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
445 spec->mono_nid, &spec->cur_mmux);
446}
447
5f10c4a9
ML		 448#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
449
450static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
451 struct snd_ctl_elem_value *ucontrol)
452{
453 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 454 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 455 struct sigmatel_spec *spec = codec->spec;
456
e1f0d669
MR		 457 ucontrol->value.integer.value[0] = !!(spec->aloopback &
458 (spec->aloopback_mask << idx));
5f10c4a9
ML		 459 return 0;
460}
461
462static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
463 struct snd_ctl_elem_value *ucontrol)
464{
465 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
466 struct sigmatel_spec *spec = codec->spec;
e1f0d669 467 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 468 unsigned int dac_mode;
e1f0d669 469 unsigned int val, idx_val;
5f10c4a9 470
e1f0d669
MR		 471 idx_val = spec->aloopback_mask << idx;
472 if (ucontrol->value.integer.value[0])
473 val = spec->aloopback | idx_val;
474 else
475 val = spec->aloopback & ~idx_val;
68ea7b2f 476 if (spec->aloopback == val)
5f10c4a9
ML		 477 return 0;
478
68ea7b2f 479 spec->aloopback = val;
5f10c4a9 480
e1f0d669
MR		 481 /* Only return the bits defined by the shift value of the
482 * first two bytes of the mask
483 */
5f10c4a9 484 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 485 kcontrol->private_value & 0xFFFF, 0x0);
486 dac_mode >>= spec->aloopback_shift;
5f10c4a9 487
e1f0d669 488 if (spec->aloopback & idx_val) {
5f10c4a9 489 snd_hda_power_up(codec);
e1f0d669 490 dac_mode |= idx_val;
5f10c4a9
ML		 491 } else {
492 snd_hda_power_down(codec);
e1f0d669 493 dac_mode &= ~idx_val;
5f10c4a9
ML		 494 }
495
496 snd_hda_codec_write_cache(codec, codec->afg, 0,
497 kcontrol->private_value >> 16, dac_mode);
498
499 return 1;
500}
501
c7d4b2fa 502static struct hda_verb stac9200_core_init[] = {
2f2f4251 503 /* set dac0mux for dac converter */
c7d4b2fa 504 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 505 {}
506};
507
1194b5b7
TI		 508static struct hda_verb stac9200_eapd_init[] = {
509 /* set dac0mux for dac converter */
510 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
511 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
512 {}
513};
514
e1f0d669
MR		 515static struct hda_verb stac92hd73xx_6ch_core_init[] = {
516 /* set master volume and direct control */
517 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
518 /* setup audio connections */
519 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
520 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
521 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
522 /* setup adcs to point to mixer */
523 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
524 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 525 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
526 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
527 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
528 /* setup import muxs */
529 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
530 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
531 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
532 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
533 {}
534};
535
536static struct hda_verb stac92hd73xx_8ch_core_init[] = {
537 /* set master volume and direct control */
538 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
539 /* setup audio connections */
540 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
541 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
542 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
543 /* connect hp ports to dac3 */
544 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
545 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
546 /* setup adcs to point to mixer */
547 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
548 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 549 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
550 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
551 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
552 /* setup import muxs */
553 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
554 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
555 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
556 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
557 {}
558};
559
560static struct hda_verb stac92hd73xx_10ch_core_init[] = {
561 /* set master volume and direct control */
562 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
563 /* setup audio connections */
564 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
565 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
566 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
567 /* dac3 is connected to import3 mux */
568 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
569 /* connect hp ports to dac4 */
570 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
571 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
572 /* setup adcs to point to mixer */
573 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
574 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 575 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
576 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
577 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
578 /* setup import muxs */
579 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
580 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
581 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
582 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
583 {}
584};
585
e035b841 586static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 587 /* set master volume and direct control */
588 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
589 /* connect headphone jack to dac1 */
590 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
591 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
592 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
593 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
594 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
595 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 596};
597
598static struct hda_verb stac92hd71bxx_analog_core_init[] = {
e035b841
MR		 599 /* set master volume and direct control */
600 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
601 /* connect headphone jack to dac1 */
602 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
9b35947f
MR		 603 /* connect ports 0d and 0f to audio mixer */
604 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
605 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
a64135a2 606 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
9b35947f
MR		 607 /* unmute dac0 input in audio mixer */
608 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
e035b841
MR		 609 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
610 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
611 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
612 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 613 {}
614};
615
8e21c34c
TD		 616static struct hda_verb stac925x_core_init[] = {
617 /* set dac0mux for dac converter */
618 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
619 {}
620};
621
c7d4b2fa 622static struct hda_verb stac922x_core_init[] = {
2f2f4251 623 /* set master volume and direct control */
c7d4b2fa 624 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 625 {}
626};
627
93ed1503 628static struct hda_verb d965_core_init[] = {
19039bd0 629 /* set master volume and direct control */
93ed1503 630 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 631 /* unmute node 0x1b */
632 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
633 /* select node 0x03 as DAC */
634 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
635 {}
636};
637
3cc08dc6
MP		 638static struct hda_verb stac927x_core_init[] = {
639 /* set master volume and direct control */
640 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
641 {}
642};
643
f3302a59
MP		 644static struct hda_verb stac9205_core_init[] = {
645 /* set master volume and direct control */
646 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
647 {}
648};
649
b22b4821
MR		 650#define STAC_MONO_MUX \
651 { \
652 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
653 .name = "Mono Mux", \
654 .count = 1, \
655 .info = stac92xx_mono_mux_enum_info, \
656 .get = stac92xx_mono_mux_enum_get, \
657 .put = stac92xx_mono_mux_enum_put, \
658 }
659
9e05b7a3 660#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 661 { \
662 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
663 .name = "Input Source", \
9e05b7a3 664 .count = cnt, \
ca7c5a8b
ML		 665 .info = stac92xx_mux_enum_info, \
666 .get = stac92xx_mux_enum_get, \
667 .put = stac92xx_mux_enum_put, \
668 }
669
e1f0d669 670#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 671 { \
672 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
673 .name = "Analog Loopback", \
e1f0d669 674 .count = cnt, \
5f10c4a9
ML		 675 .info = stac92xx_aloopback_info, \
676 .get = stac92xx_aloopback_get, \
677 .put = stac92xx_aloopback_put, \
678 .private_value = verb_read | (verb_write << 16), \
679 }
680
c8b6bf9b 681static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 682 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
683 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 684 STAC_INPUT_SOURCE(1),
2f2f4251
M		 685 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
686 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 687 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 688 { } /* end */
689};
690
e1f0d669 691static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 692 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
693
e1f0d669
MR		 694 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
695 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
696
697 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
698 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
699
700 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
701 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
702
703 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
704 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
705
706 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
707 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
708
709 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
710 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
711
712 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
713 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
714 { } /* end */
715};
716
717static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 718 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
719
e1f0d669
MR		 720 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
721 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
722
723 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
724 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
725
726 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
727 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
728
729 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
730 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
731
732 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
733 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
734
735 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
736 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
737
738 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
739 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
740 { } /* end */
741};
742
743static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 744 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
745
e1f0d669
MR		 746 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
747 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
748
749 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
750 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
751
752 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
753 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
754
755 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
756 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
757
758 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
759 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
760
761 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
762 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
763
764 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
765 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
766 { } /* end */
767};
768
541eee87 769static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 770 STAC_INPUT_SOURCE(2),
e035b841 771
9b35947f
MR		 772 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
773 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
774 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
775
776 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
777 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
778 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 779
9b35947f
MR		 780 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
781 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 782 { } /* end */
783};
784
541eee87 785static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 786 STAC_INPUT_SOURCE(2),
787 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
788
541eee87
MR		 789 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
790 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
791 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
792
793 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
794 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
795 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
796 { } /* end */
797};
798
8e21c34c 799static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 800 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 801 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
802 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
803 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
804 { } /* end */
805};
806
9e05b7a3 807static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 808 STAC_INPUT_SOURCE(2),
e1f0d669 809 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 810
811 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
812 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
813 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
814
815 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
816 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
817 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
818
2f2f4251
M		 819 { } /* end */
820};
821
19039bd0 822/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 823static struct snd_kcontrol_new stac922x_mixer[] = {
824 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 825 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
826 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
827 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
828
829 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
830 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
831 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 832 { } /* end */
833};
834
9e05b7a3 835
d1d985f0 836static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 837 STAC_INPUT_SOURCE(3),
e1f0d669 838 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 839
9e05b7a3
ML		 840 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
841 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
842 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
843
844 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
845 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
846 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
847
848 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
849 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
850 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 851 { } /* end */
852};
853
1697055e
TI		 854static struct snd_kcontrol_new stac_dmux_mixer = {
855 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
856 .name = "Digital Input Source",
857 /* count set later */
858 .info = stac92xx_dmux_enum_info,
859 .get = stac92xx_dmux_enum_get,
860 .put = stac92xx_dmux_enum_put,
861};
862
2134ea4f
TI		 863static const char *slave_vols[] = {
864 "Front Playback Volume",
865 "Surround Playback Volume",
866 "Center Playback Volume",
867 "LFE Playback Volume",
868 "Side Playback Volume",
869 "Headphone Playback Volume",
870 "Headphone Playback Volume",
871 "Speaker Playback Volume",
872 "External Speaker Playback Volume",
873 "Speaker2 Playback Volume",
874 NULL
875};
876
877static const char *slave_sws[] = {
878 "Front Playback Switch",
879 "Surround Playback Switch",
880 "Center Playback Switch",
881 "LFE Playback Switch",
882 "Side Playback Switch",
883 "Headphone Playback Switch",
884 "Headphone Playback Switch",
885 "Speaker Playback Switch",
886 "External Speaker Playback Switch",
887 "Speaker2 Playback Switch",
edb54a55 888 "IEC958 Playback Switch",
2134ea4f
TI		 889 NULL
890};
891
2f2f4251
M		 892static int stac92xx_build_controls(struct hda_codec *codec)
893{
894 struct sigmatel_spec *spec = codec->spec;
895 int err;
c7d4b2fa 896 int i;
2f2f4251
M		 897
898 err = snd_hda_add_new_ctls(codec, spec->mixer);
899 if (err < 0)
900 return err;
c7d4b2fa
M		 901
902 for (i = 0; i < spec->num_mixers; i++) {
903 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
904 if (err < 0)
905 return err;
906 }
1697055e
TI		 907 if (spec->num_dmuxes > 0) {
908 stac_dmux_mixer.count = spec->num_dmuxes;
909 err = snd_ctl_add(codec->bus->card,
910 snd_ctl_new1(&stac_dmux_mixer, codec));
911 if (err < 0)
912 return err;
913 }
c7d4b2fa 914
dabbed6f
M		 915 if (spec->multiout.dig_out_nid) {
916 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
917 if (err < 0)
918 return err;
9a08160b
TI		 919 err = snd_hda_create_spdif_share_sw(codec,
920 &spec->multiout);
921 if (err < 0)
922 return err;
923 spec->multiout.share_spdif = 1;
dabbed6f
M		 924 }
925 if (spec->dig_in_nid) {
926 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
927 if (err < 0)
928 return err;
929 }
2134ea4f
TI		 930
931 /* if we have no master control, let's create it */
932 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 933 unsigned int vmaster_tlv[4];
2134ea4f 934 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 935 HDA_OUTPUT, vmaster_tlv);
2134ea4f 936 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 937 vmaster_tlv, slave_vols);
2134ea4f
TI		 938 if (err < 0)
939 return err;
940 }
941 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
942 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
943 NULL, slave_sws);
944 if (err < 0)
945 return err;
946 }
947
dabbed6f 948 return 0;
2f2f4251
M		 949}
950
403d1944 951static unsigned int ref9200_pin_configs[8] = {
dabbed6f 952 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 953 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
954};
955
dfe495d0
TI		 956/*
957 STAC 9200 pin configs for
958 102801A8
959 102801DE
960 102801E8
961*/
962static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 963 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
964 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 965};
966
967/*
968 STAC 9200 pin configs for
969 102801C0
970 102801C1
971*/
972static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 973 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
974 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 975};
976
977/*
978 STAC 9200 pin configs for
979 102801C4 (Dell Dimension E310)
980 102801C5
981 102801C7
982 102801D9
983 102801DA
984 102801E3
985*/
986static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 987 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
988 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 989};
990
991
992/*
993 STAC 9200-32 pin configs for
994 102801B5 (Dell Inspiron 630m)
995 102801D8 (Dell Inspiron 640m)
996*/
997static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 998 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
999 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1000};
1001
1002/*
1003 STAC 9200-32 pin configs for
1004 102801C2 (Dell Latitude D620)
1005 102801C8
1006 102801CC (Dell Latitude D820)
1007 102801D4
1008 102801D6
1009*/
1010static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1011 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1012 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1013};
1014
1015/*
1016 STAC 9200-32 pin configs for
1017 102801CE (Dell XPS M1710)
1018 102801CF (Dell Precision M90)
1019*/
1020static unsigned int dell9200_m23_pin_configs[8] = {
1021 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1022 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1023};
1024
1025/*
1026 STAC 9200-32 pin configs for
1027 102801C9
1028 102801CA
1029 102801CB (Dell Latitude 120L)
1030 102801D3
1031*/
1032static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1033 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1034 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1035};
1036
1037/*
1038 STAC 9200-32 pin configs for
1039 102801BD (Dell Inspiron E1505n)
1040 102801EE
1041 102801EF
1042*/
1043static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1044 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1045 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1046};
1047
1048/*
1049 STAC 9200-32 pin configs for
1050 102801F5 (Dell Inspiron 1501)
1051 102801F6
1052*/
1053static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1054 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1055 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1056};
1057
1058/*
1059 STAC 9200-32
1060 102801CD (Dell Inspiron E1705/9400)
1061*/
1062static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1063 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1064 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1065};
1066
bf277785
TD		 1067static unsigned int oqo9200_pin_configs[8] = {
1068 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1069 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1070};
1071
dfe495d0 1072
f5fcc13c
TI		 1073static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1074 [STAC_REF] = ref9200_pin_configs,
bf277785 1075 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1076 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1077 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1078 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1079 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1080 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1081 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1082 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1083 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1084 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1085 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 1086};
1087
f5fcc13c
TI		 1088static const char *stac9200_models[STAC_9200_MODELS] = {
1089 [STAC_REF] = "ref",
bf277785 1090 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1091 [STAC_9200_DELL_D21] = "dell-d21",
1092 [STAC_9200_DELL_D22] = "dell-d22",
1093 [STAC_9200_DELL_D23] = "dell-d23",
1094 [STAC_9200_DELL_M21] = "dell-m21",
1095 [STAC_9200_DELL_M22] = "dell-m22",
1096 [STAC_9200_DELL_M23] = "dell-m23",
1097 [STAC_9200_DELL_M24] = "dell-m24",
1098 [STAC_9200_DELL_M25] = "dell-m25",
1099 [STAC_9200_DELL_M26] = "dell-m26",
1100 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1101 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 1102};
1103
1104static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1105 /* SigmaTel reference board */
1106 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1107 "DFI LanParty", STAC_REF),
e7377071 1108 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1109 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1110 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1111 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1112 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1113 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1114 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1115 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1116 "unknown Dell", STAC_9200_DELL_D22),
1117 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1118 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1119 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1120 "Dell Latitude D620", STAC_9200_DELL_M22),
1121 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1122 "unknown Dell", STAC_9200_DELL_D23),
1123 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1124 "unknown Dell", STAC_9200_DELL_D23),
1125 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1126 "unknown Dell", STAC_9200_DELL_M22),
1127 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1128 "unknown Dell", STAC_9200_DELL_M24),
1129 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1130 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1131 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1132 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1133 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1134 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1135 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1136 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1137 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1138 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1139 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1140 "Dell Precision M90", STAC_9200_DELL_M23),
1141 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1142 "unknown Dell", STAC_9200_DELL_M22),
1143 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1144 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1145 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1146 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1147 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1148 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1149 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1150 "unknown Dell", STAC_9200_DELL_D23),
1151 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1152 "unknown Dell", STAC_9200_DELL_D23),
1153 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1154 "unknown Dell", STAC_9200_DELL_D21),
1155 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1156 "unknown Dell", STAC_9200_DELL_D23),
1157 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1158 "unknown Dell", STAC_9200_DELL_D21),
1159 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1160 "unknown Dell", STAC_9200_DELL_M25),
1161 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1162 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1163 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1164 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1165 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1166 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 1167 /* Panasonic */
1168 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 1169 /* Gateway machines needs EAPD to be set on resume */
1170 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1171 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1172 STAC_9200_GATEWAY),
1173 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1174 STAC_9200_GATEWAY),
bf277785
TD		 1175 /* OQO Mobile */
1176 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1177 {} /* terminator */
1178};
1179
8e21c34c
TD		 1180static unsigned int ref925x_pin_configs[8] = {
1181 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1182 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1183};
1184
1185static unsigned int stac925x_MA6_pin_configs[8] = {
1186 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1187 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1188};
1189
2c11f955
TD		 1190static unsigned int stac925x_PA6_pin_configs[8] = {
1191 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1192 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1193};
1194
8e21c34c 1195static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1196 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1197 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1198};
1199
1200static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1201 [STAC_REF] = ref925x_pin_configs,
1202 [STAC_M2_2] = stac925xM2_2_pin_configs,
1203 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1204 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1205};
1206
1207static const char *stac925x_models[STAC_925x_MODELS] = {
1208 [STAC_REF] = "ref",
1209 [STAC_M2_2] = "m2-2",
1210 [STAC_MA6] = "m6",
2c11f955 1211 [STAC_PA6] = "pa6",
8e21c34c
TD		 1212};
1213
1214static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1215 /* SigmaTel reference board */
1216 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1217 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1218 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1219 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1220 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1221 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1222 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1223 {} /* terminator */
1224};
1225
a7662640 1226static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1227 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1228 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1229 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1230 0x01452050,
1231};
1232
1233static unsigned int dell_m6_pin_configs[13] = {
1234 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
1235 0x03a11020, 0x03011050, 0x4f0000f0, 0x4f0000f0,
1236 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1237 0x4f0000f0,
e1f0d669
MR		 1238};
1239
1240static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1241 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1242 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1243};
1244
1245static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1246 [STAC_92HD73XX_REF] = "ref",
a7662640 1247 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1248};
1249
1250static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1251 /* SigmaTel reference board */
1252 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1253 "DFI LanParty", STAC_92HD73XX_REF),
1254 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1255 "unknown Dell", STAC_DELL_M6),
1256 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1257 "unknown Dell", STAC_DELL_M6),
1258 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1259 "unknown Dell", STAC_DELL_M6),
1260 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1261 "unknown Dell", STAC_DELL_M6),
1262 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1263 "unknown Dell", STAC_DELL_M6),
1264 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1265 "unknown Dell", STAC_DELL_M6),
1266 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1267 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1268 {} /* terminator */
1269};
1270
e035b841
MR		 1271static unsigned int ref92hd71bxx_pin_configs[10] = {
1272 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1273 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1274 0x90a000f0, 0x01452050,
1275};
1276
a7662640
MR		 1277static unsigned int dell_m4_1_pin_configs[13] = {
1278 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
1279 0x23a1902e, 0x23014250, 0x40f000f0, 0x4f0000f0,
1280 0x40f000f0, 0x4f0000f0,
1281};
1282
1283static unsigned int dell_m4_2_pin_configs[13] = {
1284 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1285 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
1286 0x40f000f0, 0x044413b0,
1287};
1288
e035b841
MR		 1289static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1290 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1291 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1292 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
e035b841
MR		 1293};
1294
1295static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1296 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1297 [STAC_DELL_M4_1] = "dell-m4-1",
1298 [STAC_DELL_M4_2] = "dell-m4-2",
e035b841
MR		 1299};
1300
1301static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1302 /* SigmaTel reference board */
1303 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1304 "DFI LanParty", STAC_92HD71BXX_REF),
a7662640
MR		 1305 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1306 "unknown Dell", STAC_DELL_M4_1),
1307 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1308 "unknown Dell", STAC_DELL_M4_1),
1309 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1310 "unknown Dell", STAC_DELL_M4_1),
1311 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1312 "unknown Dell", STAC_DELL_M4_1),
1313 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1314 "unknown Dell", STAC_DELL_M4_1),
1315 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1316 "unknown Dell", STAC_DELL_M4_1),
1317 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1318 "unknown Dell", STAC_DELL_M4_1),
1319 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1320 "unknown Dell", STAC_DELL_M4_2),
1321 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1322 "unknown Dell", STAC_DELL_M4_2),
1323 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1324 "unknown Dell", STAC_DELL_M4_2),
1325 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1326 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1327 {} /* terminator */
1328};
1329
403d1944
MP		 1330static unsigned int ref922x_pin_configs[10] = {
1331 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1332 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1333 0x40000100, 0x40000100,
1334};
1335
dfe495d0
TI		 1336/*
1337 STAC 922X pin configs for
1338 102801A7
1339 102801AB
1340 102801A9
1341 102801D1
1342 102801D2
1343*/
1344static unsigned int dell_922x_d81_pin_configs[10] = {
1345 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1346 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1347 0x01813122, 0x400001f2,
1348};
1349
1350/*
1351 STAC 922X pin configs for
1352 102801AC
1353 102801D0
1354*/
1355static unsigned int dell_922x_d82_pin_configs[10] = {
1356 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1357 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1358 0x01813122, 0x400001f1,
1359};
1360
1361/*
1362 STAC 922X pin configs for
1363 102801BF
1364*/
1365static unsigned int dell_922x_m81_pin_configs[10] = {
1366 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1367 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1368 0x40C003f1, 0x405003f0,
1369};
1370
1371/*
1372 STAC 9221 A1 pin configs for
1373 102801D7 (Dell XPS M1210)
1374*/
1375static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1376 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1377 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1378 0x508003f3, 0x405003f4,
1379};
1380
403d1944 1381static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1382 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1383 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1384 0x02a19120, 0x40000100,
1385};
1386
1387static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1388 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1389 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1390 0x02a19320, 0x40000100,
1391};
1392
5d5d3bc3
IZ		 1393static unsigned int intel_mac_v1_pin_configs[10] = {
1394 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1395 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1396 0x400000fc, 0x400000fb,
1397};
1398
1399static unsigned int intel_mac_v2_pin_configs[10] = {
1400 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1401 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1402 0x400000fc, 0x400000fb,
6f0778d8
NB		 1403};
1404
5d5d3bc3
IZ		 1405static unsigned int intel_mac_v3_pin_configs[10] = {
1406 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1407 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1408 0x400000fc, 0x400000fb,
1409};
1410
5d5d3bc3
IZ		 1411static unsigned int intel_mac_v4_pin_configs[10] = {
1412 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1413 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1414 0x400000fc, 0x400000fb,
1415};
1416
5d5d3bc3
IZ		 1417static unsigned int intel_mac_v5_pin_configs[10] = {
1418 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1419 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1420 0x400000fc, 0x400000fb,
0dae0f83
TI		 1421};
1422
76c08828 1423
19039bd0 1424static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1425 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1426 [STAC_D945GTP3] = d945gtp3_pin_configs,
1427 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1428 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1429 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1430 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1431 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1432 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1433 /* for backward compatibility */
5d5d3bc3
IZ		 1434 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1435 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1436 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1437 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1438 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1439 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1440 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1441 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1442 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1443 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1444};
1445
f5fcc13c
TI		 1446static const char *stac922x_models[STAC_922X_MODELS] = {
1447 [STAC_D945_REF] = "ref",
1448 [STAC_D945GTP5] = "5stack",
1449 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1450 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1451 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1452 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1453 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1454 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1455 /* for backward compatibility */
f5fcc13c 1456 [STAC_MACMINI] = "macmini",
3fc24d85 1457 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1458 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1459 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1460 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1461 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1462 [STAC_922X_DELL_D81] = "dell-d81",
1463 [STAC_922X_DELL_D82] = "dell-d82",
1464 [STAC_922X_DELL_M81] = "dell-m81",
1465 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1466};
1467
1468static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1469 /* SigmaTel reference board */
1470 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1471 "DFI LanParty", STAC_D945_REF),
1472 /* Intel 945G based systems */
1473 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1474 "Intel D945G", STAC_D945GTP3),
1475 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1476 "Intel D945G", STAC_D945GTP3),
1477 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1478 "Intel D945G", STAC_D945GTP3),
1479 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1480 "Intel D945G", STAC_D945GTP3),
1481 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1482 "Intel D945G", STAC_D945GTP3),
1483 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1484 "Intel D945G", STAC_D945GTP3),
1485 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1486 "Intel D945G", STAC_D945GTP3),
1487 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1488 "Intel D945G", STAC_D945GTP3),
1489 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1490 "Intel D945G", STAC_D945GTP3),
1491 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1492 "Intel D945G", STAC_D945GTP3),
1493 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1494 "Intel D945G", STAC_D945GTP3),
1495 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1496 "Intel D945G", STAC_D945GTP3),
1497 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1498 "Intel D945G", STAC_D945GTP3),
1499 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1500 "Intel D945G", STAC_D945GTP3),
1501 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1502 "Intel D945G", STAC_D945GTP3),
1503 /* Intel D945G 5-stack systems */
1504 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1505 "Intel D945G", STAC_D945GTP5),
1506 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1507 "Intel D945G", STAC_D945GTP5),
1508 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1509 "Intel D945G", STAC_D945GTP5),
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1511 "Intel D945G", STAC_D945GTP5),
1512 /* Intel 945P based systems */
1513 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1514 "Intel D945P", STAC_D945GTP3),
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1516 "Intel D945P", STAC_D945GTP3),
1517 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1518 "Intel D945P", STAC_D945GTP3),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1520 "Intel D945P", STAC_D945GTP3),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1522 "Intel D945P", STAC_D945GTP3),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1524 "Intel D945P", STAC_D945GTP5),
1525 /* other systems */
1526 /* Apple Mac Mini (early 2006) */
1527 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1528 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1529 /* Dell systems */
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1531 "unknown Dell", STAC_922X_DELL_D81),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1533 "unknown Dell", STAC_922X_DELL_D81),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1535 "unknown Dell", STAC_922X_DELL_D81),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1537 "unknown Dell", STAC_922X_DELL_D82),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1539 "unknown Dell", STAC_922X_DELL_M81),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1541 "unknown Dell", STAC_922X_DELL_D82),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1543 "unknown Dell", STAC_922X_DELL_D81),
1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1545 "unknown Dell", STAC_922X_DELL_D81),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1547 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1548 {} /* terminator */
1549};
1550
3cc08dc6 1551static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1552 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1553 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1554 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1555 0x01c42190, 0x40000100,
3cc08dc6
MP		 1556};
1557
93ed1503 1558static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1559 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1560 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1561 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1562 0x40000100, 0x40000100
1563};
1564
93ed1503
TD		 1565static unsigned int d965_5st_pin_configs[14] = {
1566 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1567 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1568 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1569 0x40000100, 0x40000100
1570};
1571
4ff076e5
TD		 1572static unsigned int dell_3st_pin_configs[14] = {
1573 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1574 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1575 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1576 0x40c003fc, 0x40000100
1577};
1578
93ed1503 1579static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1580 [STAC_D965_REF] = ref927x_pin_configs,
1581 [STAC_D965_3ST] = d965_3st_pin_configs,
1582 [STAC_D965_5ST] = d965_5st_pin_configs,
1583 [STAC_DELL_3ST] = dell_3st_pin_configs,
1584 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1585};
1586
f5fcc13c 1587static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1588 [STAC_D965_REF] = "ref",
1589 [STAC_D965_3ST] = "3stack",
1590 [STAC_D965_5ST] = "5stack",
1591 [STAC_DELL_3ST] = "dell-3stack",
1592 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1593};
1594
1595static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1596 /* SigmaTel reference board */
1597 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1598 "DFI LanParty", STAC_D965_REF),
81d3dbde 1599 /* Intel 946 based systems */
f5fcc13c
TI		 1600 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1601 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1602 /* 965 based 3 stack systems */
f5fcc13c
TI		 1603 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1604 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1605 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1606 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1607 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1608 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1609 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1610 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1611 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1612 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1613 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1614 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1615 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1616 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1617 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1618 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1619 /* Dell 3 stack systems */
8e9068b1 1620 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1621 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1622 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1623 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1624 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1625 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1626 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1
MR		 1627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1628 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1629 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1630 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1631 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1632 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1633 /* 965 based 5 stack systems */
f5fcc13c
TI		 1634 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1635 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1636 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1637 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1638 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1639 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1640 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1641 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1642 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1643 {} /* terminator */
1644};
1645
f3302a59
MP		 1646static unsigned int ref9205_pin_configs[12] = {
1647 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1648 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1649 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1650};
1651
dfe495d0
TI		 1652/*
1653 STAC 9205 pin configs for
1654 102801F1
1655 102801F2
1656 102801FC
1657 102801FD
1658 10280204
1659 1028021F
3fa2ef74 1660 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1661*/
1662static unsigned int dell_9205_m42_pin_configs[12] = {
1663 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1664 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1665 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1666};
1667
1668/*
1669 STAC 9205 pin configs for
1670 102801F9
1671 102801FA
1672 102801FE
1673 102801FF (Dell Precision M4300)
1674 10280206
1675 10280200
1676 10280201
1677*/
1678static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1679 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1680 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1681 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1682};
1683
dfe495d0 1684static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1685 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1686 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1687 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1688};
1689
f5fcc13c 1690static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1691 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1692 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1693 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1694 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1695};
1696
f5fcc13c
TI		 1697static const char *stac9205_models[STAC_9205_MODELS] = {
1698 [STAC_9205_REF] = "ref",
dfe495d0 1699 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1700 [STAC_9205_DELL_M43] = "dell-m43",
1701 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1702};
1703
1704static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1705 /* SigmaTel reference board */
1706 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1707 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1709 "unknown Dell", STAC_9205_DELL_M42),
1710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1711 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1713 "Dell Precision", STAC_9205_DELL_M43),
1714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1715 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1717 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1719 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1721 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1723 "unknown Dell", STAC_9205_DELL_M42),
1724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1725 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1726 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1727 "Dell Precision", STAC_9205_DELL_M43),
1728 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1729 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1730 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1731 "Dell Precision", STAC_9205_DELL_M43),
1732 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1733 "Dell Inspiron", STAC_9205_DELL_M44),
1734 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1735 "Dell Inspiron", STAC_9205_DELL_M44),
1736 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1737 "Dell Inspiron", STAC_9205_DELL_M44),
1738 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1739 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1740 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1741 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1742 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1743 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1744 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1745 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1746 {} /* terminator */
1747};
1748
11b44bbd
RF		 1749static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1750{
1751 int i;
1752 struct sigmatel_spec *spec = codec->spec;
1753
1754 if (! spec->bios_pin_configs) {
1755 spec->bios_pin_configs = kcalloc(spec->num_pins,
1756 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1757 if (! spec->bios_pin_configs)
1758 return -ENOMEM;
1759 }
1760
1761 for (i = 0; i < spec->num_pins; i++) {
1762 hda_nid_t nid = spec->pin_nids[i];
1763 unsigned int pin_cfg;
1764
1765 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1766 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1767 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1768 nid, pin_cfg);
1769 spec->bios_pin_configs[i] = pin_cfg;
1770 }
1771
1772 return 0;
1773}
1774
87d48363
MR		 1775static void stac92xx_set_config_reg(struct hda_codec *codec,
1776 hda_nid_t pin_nid, unsigned int pin_config)
1777{
1778 int i;
1779 snd_hda_codec_write(codec, pin_nid, 0,
1780 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1781 pin_config & 0x000000ff);
1782 snd_hda_codec_write(codec, pin_nid, 0,
1783 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1784 (pin_config & 0x0000ff00) >> 8);
1785 snd_hda_codec_write(codec, pin_nid, 0,
1786 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1787 (pin_config & 0x00ff0000) >> 16);
1788 snd_hda_codec_write(codec, pin_nid, 0,
1789 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1790 pin_config >> 24);
1791 i = snd_hda_codec_read(codec, pin_nid, 0,
1792 AC_VERB_GET_CONFIG_DEFAULT,
1793 0x00);
1794 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1795 pin_nid, i);
1796}
1797
2f2f4251
M		 1798static void stac92xx_set_config_regs(struct hda_codec *codec)
1799{
1800 int i;
1801 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1802
87d48363
MR		 1803 if (!spec->pin_configs)
1804 return;
11b44bbd 1805
87d48363
MR		 1806 for (i = 0; i < spec->num_pins; i++)
1807 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1808 spec->pin_configs[i]);
2f2f4251 1809}
2f2f4251 1810
dabbed6f 1811/*
c7d4b2fa 1812 * Analog playback callbacks
dabbed6f 1813 */
c7d4b2fa
M		 1814static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1815 struct hda_codec *codec,
c8b6bf9b 1816 struct snd_pcm_substream *substream)
2f2f4251 1817{
dabbed6f 1818 struct sigmatel_spec *spec = codec->spec;
9a08160b
TI		 1819 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
1820 hinfo);
2f2f4251
M		 1821}
1822
2f2f4251
M		 1823static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1824 struct hda_codec *codec,
1825 unsigned int stream_tag,
1826 unsigned int format,
c8b6bf9b 1827 struct snd_pcm_substream *substream)
2f2f4251
M		 1828{
1829 struct sigmatel_spec *spec = codec->spec;
403d1944 1830 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1831}
1832
1833static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1834 struct hda_codec *codec,
c8b6bf9b 1835 struct snd_pcm_substream *substream)
2f2f4251
M		 1836{
1837 struct sigmatel_spec *spec = codec->spec;
1838 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1839}
1840
dabbed6f
M		 1841/*
1842 * Digital playback callbacks
1843 */
1844static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1845 struct hda_codec *codec,
c8b6bf9b 1846 struct snd_pcm_substream *substream)
dabbed6f
M		 1847{
1848 struct sigmatel_spec *spec = codec->spec;
1849 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1850}
1851
1852static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1853 struct hda_codec *codec,
c8b6bf9b 1854 struct snd_pcm_substream *substream)
dabbed6f
M		 1855{
1856 struct sigmatel_spec *spec = codec->spec;
1857 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1858}
1859
6b97eb45
TI		 1860static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1861 struct hda_codec *codec,
1862 unsigned int stream_tag,
1863 unsigned int format,
1864 struct snd_pcm_substream *substream)
1865{
1866 struct sigmatel_spec *spec = codec->spec;
1867 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1868 stream_tag, format, substream);
1869}
1870
dabbed6f 1871
2f2f4251
M		 1872/*
1873 * Analog capture callbacks
1874 */
1875static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1876 struct hda_codec *codec,
1877 unsigned int stream_tag,
1878 unsigned int format,
c8b6bf9b 1879 struct snd_pcm_substream *substream)
2f2f4251
M		 1880{
1881 struct sigmatel_spec *spec = codec->spec;
1882
1883 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1884 stream_tag, 0, format);
1885 return 0;
1886}
1887
1888static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1889 struct hda_codec *codec,
c8b6bf9b 1890 struct snd_pcm_substream *substream)
2f2f4251
M		 1891{
1892 struct sigmatel_spec *spec = codec->spec;
1893
1894 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1895 return 0;
1896}
1897
dabbed6f
M		 1898static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1899 .substreams = 1,
1900 .channels_min = 2,
1901 .channels_max = 2,
1902 /* NID is set in stac92xx_build_pcms */
1903 .ops = {
1904 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1905 .close = stac92xx_dig_playback_pcm_close,
1906 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1907 },
1908};
1909
1910static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1911 .substreams = 1,
1912 .channels_min = 2,
1913 .channels_max = 2,
1914 /* NID is set in stac92xx_build_pcms */
1915};
1916
2f2f4251
M		 1917static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1918 .substreams = 1,
1919 .channels_min = 2,
c7d4b2fa 1920 .channels_max = 8,
2f2f4251
M		 1921 .nid = 0x02, /* NID to query formats and rates */
1922 .ops = {
1923 .open = stac92xx_playback_pcm_open,
1924 .prepare = stac92xx_playback_pcm_prepare,
1925 .cleanup = stac92xx_playback_pcm_cleanup
1926 },
1927};
1928
3cc08dc6
MP		 1929static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1930 .substreams = 1,
1931 .channels_min = 2,
1932 .channels_max = 2,
1933 .nid = 0x06, /* NID to query formats and rates */
1934 .ops = {
1935 .open = stac92xx_playback_pcm_open,
1936 .prepare = stac92xx_playback_pcm_prepare,
1937 .cleanup = stac92xx_playback_pcm_cleanup
1938 },
1939};
1940
2f2f4251 1941static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1942 .channels_min = 2,
1943 .channels_max = 2,
9e05b7a3 1944 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1945 .ops = {
1946 .prepare = stac92xx_capture_pcm_prepare,
1947 .cleanup = stac92xx_capture_pcm_cleanup
1948 },
1949};
1950
1951static int stac92xx_build_pcms(struct hda_codec *codec)
1952{
1953 struct sigmatel_spec *spec = codec->spec;
1954 struct hda_pcm *info = spec->pcm_rec;
1955
1956 codec->num_pcms = 1;
1957 codec->pcm_info = info;
1958
c7d4b2fa 1959 info->name = "STAC92xx Analog";
2f2f4251 1960 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1961 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1962 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1963 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1964
1965 if (spec->alt_switch) {
1966 codec->num_pcms++;
1967 info++;
1968 info->name = "STAC92xx Analog Alt";
1969 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1970 }
2f2f4251 1971
dabbed6f
M		 1972 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1973 codec->num_pcms++;
1974 info++;
1975 info->name = "STAC92xx Digital";
7ba72ba1 1976 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 1977 if (spec->multiout.dig_out_nid) {
1978 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1979 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1980 }
1981 if (spec->dig_in_nid) {
1982 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1983 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1984 }
1985 }
1986
2f2f4251
M		 1987 return 0;
1988}
1989
c960a03b
TI		 1990static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1991{
1992 unsigned int pincap = snd_hda_param_read(codec, nid,
1993 AC_PAR_PIN_CAP);
1994 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1995 if (pincap & AC_PINCAP_VREF_100)
1996 return AC_PINCTL_VREF_100;
1997 if (pincap & AC_PINCAP_VREF_80)
1998 return AC_PINCTL_VREF_80;
1999 if (pincap & AC_PINCAP_VREF_50)
2000 return AC_PINCTL_VREF_50;
2001 if (pincap & AC_PINCAP_VREF_GRD)
2002 return AC_PINCTL_VREF_GRD;
2003 return 0;
2004}
2005
403d1944
MP		 2006static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2007
2008{
82beb8fd
TI		 2009 snd_hda_codec_write_cache(codec, nid, 0,
2010 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2011}
2012
a5ce8890 2013#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2014
2015static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2016{
2017 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2018 struct sigmatel_spec *spec = codec->spec;
2019 int io_idx = kcontrol-> private_value & 0xff;
2020
2021 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2022 return 0;
2023}
2024
2025static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2026{
2027 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2028 struct sigmatel_spec *spec = codec->spec;
2029 hda_nid_t nid = kcontrol->private_value >> 8;
2030 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2031 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2032
2033 spec->io_switch[io_idx] = val;
2034
2035 if (val)
2036 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2037 else {
2038 unsigned int pinctl = AC_PINCTL_IN_EN;
2039 if (io_idx) /* set VREF for mic */
2040 pinctl |= stac92xx_get_vref(codec, nid);
2041 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2042 }
40c1d308
JZ		 2043
2044 /* check the auto-mute again: we need to mute/unmute the speaker
2045 * appropriately according to the pin direction
2046 */
2047 if (spec->hp_detect)
2048 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2049
403d1944
MP		 2050 return 1;
2051}
2052
0fb87bb4
ML		 2053#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2054
2055static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2056 struct snd_ctl_elem_value *ucontrol)
2057{
2058 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2059 struct sigmatel_spec *spec = codec->spec;
2060
2061 ucontrol->value.integer.value[0] = spec->clfe_swap;
2062 return 0;
2063}
2064
2065static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2066 struct snd_ctl_elem_value *ucontrol)
2067{
2068 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2069 struct sigmatel_spec *spec = codec->spec;
2070 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2071 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2072
68ea7b2f 2073 if (spec->clfe_swap == val)
0fb87bb4
ML		 2074 return 0;
2075
68ea7b2f 2076 spec->clfe_swap = val;
0fb87bb4
ML		 2077
2078 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2079 spec->clfe_swap ? 0x4 : 0x0);
2080
2081 return 1;
2082}
2083
403d1944
MP		 2084#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2085 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2086 .name = xname, \
2087 .index = 0, \
2088 .info = stac92xx_io_switch_info, \
2089 .get = stac92xx_io_switch_get, \
2090 .put = stac92xx_io_switch_put, \
2091 .private_value = xpval, \
2092 }
2093
0fb87bb4
ML		 2094#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2095 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2096 .name = xname, \
2097 .index = 0, \
2098 .info = stac92xx_clfe_switch_info, \
2099 .get = stac92xx_clfe_switch_get, \
2100 .put = stac92xx_clfe_switch_put, \
2101 .private_value = xpval, \
2102 }
403d1944 2103
c7d4b2fa
M		 2104enum {
2105 STAC_CTL_WIDGET_VOL,
2106 STAC_CTL_WIDGET_MUTE,
09a99959 2107 STAC_CTL_WIDGET_MONO_MUX,
403d1944 2108 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2109 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2110};
2111
c8b6bf9b 2112static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2113 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2114 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2115 STAC_MONO_MUX,
403d1944 2116 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2117 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2118};
2119
2120/* add dynamic controls */
2121static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2122{
c8b6bf9b 2123 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2124
2125 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2126 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2127
2128 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2129 if (! knew)
2130 return -ENOMEM;
2131 if (spec->kctl_alloc) {
2132 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2133 kfree(spec->kctl_alloc);
2134 }
2135 spec->kctl_alloc = knew;
2136 spec->num_kctl_alloc = num;
2137 }
2138
2139 knew = &spec->kctl_alloc[spec->num_kctl_used];
2140 *knew = stac92xx_control_templates[type];
82fe0c58 2141 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2142 if (! knew->name)
2143 return -ENOMEM;
2144 knew->private_value = val;
2145 spec->num_kctl_used++;
2146 return 0;
2147}
2148
403d1944
MP		 2149/* flag inputs as additional dynamic lineouts */
2150static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2151{
2152 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2153 unsigned int wcaps, wtype;
2154 int i, num_dacs = 0;
2155
2156 /* use the wcaps cache to count all DACs available for line-outs */
2157 for (i = 0; i < codec->num_nodes; i++) {
2158 wcaps = codec->wcaps[i];
2159 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2160
7b043899
SL		 2161 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2162 num_dacs++;
2163 }
403d1944 2164
7b043899
SL		 2165 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2166
403d1944
MP		 2167 switch (cfg->line_outs) {
2168 case 3:
2169 /* add line-in as side */
7b043899 2170 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2171 cfg->line_out_pins[cfg->line_outs] =
2172 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2173 spec->line_switch = 1;
2174 cfg->line_outs++;
2175 }
2176 break;
2177 case 2:
2178 /* add line-in as clfe and mic as side */
7b043899 2179 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2180 cfg->line_out_pins[cfg->line_outs] =
2181 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2182 spec->line_switch = 1;
2183 cfg->line_outs++;
2184 }
7b043899 2185 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2186 cfg->line_out_pins[cfg->line_outs] =
2187 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2188 spec->mic_switch = 1;
2189 cfg->line_outs++;
2190 }
2191 break;
2192 case 1:
2193 /* add line-in as surr and mic as clfe */
7b043899 2194 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2195 cfg->line_out_pins[cfg->line_outs] =
2196 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2197 spec->line_switch = 1;
2198 cfg->line_outs++;
2199 }
7b043899 2200 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2201 cfg->line_out_pins[cfg->line_outs] =
2202 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2203 spec->mic_switch = 1;
2204 cfg->line_outs++;
2205 }
2206 break;
2207 }
2208
2209 return 0;
2210}
2211
7b043899
SL		 2212
2213static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2214{
2215 int i;
2216
2217 for (i = 0; i < spec->multiout.num_dacs; i++) {
2218 if (spec->multiout.dac_nids[i] == nid)
2219 return 1;
2220 }
2221
2222 return 0;
2223}
2224
3cc08dc6 2225/*
7b043899
SL		 2226 * Fill in the dac_nids table from the parsed pin configuration
2227 * This function only works when every pin in line_out_pins[]
2228 * contains atleast one DAC in its connection list. Some 92xx
2229 * codecs are not connected directly to a DAC, such as the 9200
2230 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2231 */
19039bd0 2232static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2233 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2234{
2235 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2236 int i, j, conn_len = 0;
2237 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2238 unsigned int wcaps, wtype;
2239
c7d4b2fa
M		 2240 for (i = 0; i < cfg->line_outs; i++) {
2241 nid = cfg->line_out_pins[i];
7b043899
SL		 2242 conn_len = snd_hda_get_connections(codec, nid, conn,
2243 HDA_MAX_CONNECTIONS);
2244 for (j = 0; j < conn_len; j++) {
2245 wcaps = snd_hda_param_read(codec, conn[j],
2246 AC_PAR_AUDIO_WIDGET_CAP);
2247 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2248 if (wtype != AC_WID_AUD_OUT ||
2249 (wcaps & AC_WCAP_DIGITAL))
2250 continue;
2251 /* conn[j] is a DAC routed to this line-out */
2252 if (!is_in_dac_nids(spec, conn[j]))
2253 break;
2254 }
2255
2256 if (j == conn_len) {
df802952
TI		 2257 if (spec->multiout.num_dacs > 0) {
2258 /* we have already working output pins,
2259 * so let's drop the broken ones again
2260 */
2261 cfg->line_outs = spec->multiout.num_dacs;
2262 break;
2263 }
7b043899
SL		 2264 /* error out, no available DAC found */
2265 snd_printk(KERN_ERR
2266 "%s: No available DAC for pin 0x%x\n",
2267 __func__, nid);
2268 return -ENODEV;
2269 }
2270
2271 spec->multiout.dac_nids[i] = conn[j];
2272 spec->multiout.num_dacs++;
2273 if (conn_len > 1) {
2274 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2275 snd_hda_codec_write_cache(codec, nid, 0,
2276 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2277
7b043899
SL		 2278 }
2279 }
c7d4b2fa 2280
7b043899
SL		 2281 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2282 spec->multiout.num_dacs,
2283 spec->multiout.dac_nids[0],
2284 spec->multiout.dac_nids[1],
2285 spec->multiout.dac_nids[2],
2286 spec->multiout.dac_nids[3],
2287 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2288 return 0;
2289}
2290
eb06ed8f
TI		 2291/* create volume control/switch for the given prefx type */
2292static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2293{
2294 char name[32];
2295 int err;
2296
2297 sprintf(name, "%s Playback Volume", pfx);
2298 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2299 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2300 if (err < 0)
2301 return err;
2302 sprintf(name, "%s Playback Switch", pfx);
2303 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2304 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2305 if (err < 0)
2306 return err;
2307 return 0;
2308}
2309
c7d4b2fa 2310/* add playback controls from the parsed DAC table */
0fb87bb4 2311static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2312 const struct auto_pin_cfg *cfg)
c7d4b2fa 2313{
19039bd0
TI		 2314 static const char *chname[4] = {
2315 "Front", "Surround", NULL /*CLFE*/, "Side"
2316 };
c7d4b2fa
M		 2317 hda_nid_t nid;
2318 int i, err;
2319
0fb87bb4 2320 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2321 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2322
2323
c7d4b2fa 2324 for (i = 0; i < cfg->line_outs; i++) {
403d1944 2325 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2326 continue;
2327
2328 nid = spec->multiout.dac_nids[i];
2329
2330 if (i == 2) {
2331 /* Center/LFE */
eb06ed8f
TI		 2332 err = create_controls(spec, "Center", nid, 1);
2333 if (err < 0)
c7d4b2fa 2334 return err;
eb06ed8f
TI		 2335 err = create_controls(spec, "LFE", nid, 2);
2336 if (err < 0)
c7d4b2fa 2337 return err;
0fb87bb4
ML		 2338
2339 wid_caps = get_wcaps(codec, nid);
2340
2341 if (wid_caps & AC_WCAP_LR_SWAP) {
2342 err = stac92xx_add_control(spec,
2343 STAC_CTL_WIDGET_CLFE_SWITCH,
2344 "Swap Center/LFE Playback Switch", nid);
2345
2346 if (err < 0)
2347 return err;
2348 }
2349
c7d4b2fa 2350 } else {
eb06ed8f
TI		 2351 err = create_controls(spec, chname[i], nid, 3);
2352 if (err < 0)
c7d4b2fa
M		 2353 return err;
2354 }
2355 }
2356
b5895dc8
MR		 2357 if (spec->line_switch) {
2358 nid = cfg->input_pins[AUTO_PIN_LINE];
2359 pincap = snd_hda_param_read(codec, nid,
2360 AC_PAR_PIN_CAP);
2361 if (pincap & AC_PINCAP_OUT) {
2362 err = stac92xx_add_control(spec,
2363 STAC_CTL_WIDGET_IO_SWITCH,
2364 "Line In as Output Switch", nid << 8);
2365 if (err < 0)
2366 return err;
2367 }
2368 }
403d1944 2369
b5895dc8 2370 if (spec->mic_switch) {
cace16f1 2371 unsigned int def_conf;
b5895dc8 2372 nid = cfg->input_pins[AUTO_PIN_MIC];
cace16f1
MR		 2373 def_conf = snd_hda_codec_read(codec, nid, 0,
2374 AC_VERB_GET_CONFIG_DEFAULT, 0);
2375
2376 /* some laptops have an internal analog microphone
2377 * which can't be used as a output */
2378 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2379 pincap = snd_hda_param_read(codec, nid,
2380 AC_PAR_PIN_CAP);
2381 if (pincap & AC_PINCAP_OUT) {
2382 err = stac92xx_add_control(spec,
2383 STAC_CTL_WIDGET_IO_SWITCH,
2384 "Mic as Output Switch", (nid << 8) | 1);
2385 if (err < 0)
2386 return err;
2387 }
b5895dc8
MR		 2388 }
2389 }
403d1944 2390
c7d4b2fa
M		 2391 return 0;
2392}
2393
eb06ed8f 2394static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 2395{
7b043899
SL		 2396 if (is_in_dac_nids(spec, nid))
2397 return 1;
eb06ed8f
TI		 2398 if (spec->multiout.hp_nid == nid)
2399 return 1;
2400 return 0;
2401}
c7d4b2fa 2402
eb06ed8f
TI		 2403static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2404{
2405 if (!spec->multiout.hp_nid)
2406 spec->multiout.hp_nid = nid;
2407 else if (spec->multiout.num_dacs > 4) {
2408 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2409 return 1;
2410 } else {
2411 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2412 spec->multiout.num_dacs++;
2413 }
2414 return 0;
2415}
4e55096e 2416
eb06ed8f
TI		 2417/* add playback controls for Speaker and HP outputs */
2418static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2419 struct auto_pin_cfg *cfg)
2420{
2421 struct sigmatel_spec *spec = codec->spec;
2422 hda_nid_t nid;
2423 int i, old_num_dacs, err;
2424
2425 old_num_dacs = spec->multiout.num_dacs;
2426 for (i = 0; i < cfg->hp_outs; i++) {
2427 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2428 if (wid_caps & AC_WCAP_UNSOL_CAP)
2429 spec->hp_detect = 1;
2430 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2431 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2432 if (check_in_dac_nids(spec, nid))
2433 nid = 0;
2434 if (! nid)
c7d4b2fa 2435 continue;
eb06ed8f
TI		 2436 add_spec_dacs(spec, nid);
2437 }
2438 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2439 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2440 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2441 if (check_in_dac_nids(spec, nid))
2442 nid = 0;
eb06ed8f
TI		 2443 if (! nid)
2444 continue;
2445 add_spec_dacs(spec, nid);
c7d4b2fa 2446 }
1b290a51
MR		 2447 for (i = 0; i < cfg->line_outs; i++) {
2448 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2449 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2450 if (check_in_dac_nids(spec, nid))
2451 nid = 0;
2452 if (! nid)
2453 continue;
2454 add_spec_dacs(spec, nid);
2455 }
eb06ed8f
TI		 2456 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2457 static const char *pfxs[] = {
2458 "Speaker", "External Speaker", "Speaker2",
2459 };
2460 err = create_controls(spec, pfxs[i - old_num_dacs],
2461 spec->multiout.dac_nids[i], 3);
2462 if (err < 0)
2463 return err;
2464 }
2465 if (spec->multiout.hp_nid) {
2466 const char *pfx;
6020c008 2467 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 2468 pfx = "Master";
2469 else
2470 pfx = "Headphone";
2471 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
2472 if (err < 0)
2473 return err;
2474 }
c7d4b2fa
M		 2475
2476 return 0;
2477}
2478
b22b4821
MR		 2479/* labels for mono mux outputs */
2480static const char *stac92xx_mono_labels[3] = {
2481 "DAC0", "DAC1", "Mixer"
2482};
2483
2484/* create mono mux for mono out on capable codecs */
2485static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2486{
2487 struct sigmatel_spec *spec = codec->spec;
2488 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2489 int i, num_cons;
2490 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2491
2492 num_cons = snd_hda_get_connections(codec,
2493 spec->mono_nid,
2494 con_lst,
2495 HDA_MAX_NUM_INPUTS);
2496 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2497 return -EINVAL;
2498
2499 for (i = 0; i < num_cons; i++) {
2500 mono_mux->items[mono_mux->num_items].label =
2501 stac92xx_mono_labels[i];
2502 mono_mux->items[mono_mux->num_items].index = i;
2503 mono_mux->num_items++;
2504 }
09a99959
MR		 2505
2506 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2507 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2508}
2509
8b65727b 2510/* labels for dmic mux inputs */
ddc2cec4 2511static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2512 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2513 "Digital Mic 3", "Digital Mic 4"
2514};
2515
2516/* create playback/capture controls for input pins on dmic capable codecs */
2517static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2518 const struct auto_pin_cfg *cfg)
2519{
2520 struct sigmatel_spec *spec = codec->spec;
2521 struct hda_input_mux *dimux = &spec->private_dimux;
2522 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2523 int err, i, j;
2524 char name[32];
8b65727b
MP		 2525
2526 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2527 dimux->items[dimux->num_items].index = 0;
2528 dimux->num_items++;
2529
2530 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2531 hda_nid_t nid;
8b65727b
MP		 2532 int index;
2533 int num_cons;
0678accd 2534 unsigned int wcaps;
8b65727b
MP		 2535 unsigned int def_conf;
2536
2537 def_conf = snd_hda_codec_read(codec,
2538 spec->dmic_nids[i],
2539 0,
2540 AC_VERB_GET_CONFIG_DEFAULT,
2541 0);
2542 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2543 continue;
2544
0678accd 2545 nid = spec->dmic_nids[i];
8b65727b 2546 num_cons = snd_hda_get_connections(codec,
e1f0d669 2547 spec->dmux_nids[0],
8b65727b
MP		 2548 con_lst,
2549 HDA_MAX_NUM_INPUTS);
2550 for (j = 0; j < num_cons; j++)
0678accd 2551 if (con_lst[j] == nid) {
8b65727b
MP		 2552 index = j;
2553 goto found;
2554 }
2555 continue;
2556found:
0678accd
MR		 2557 wcaps = get_wcaps(codec, nid);
2558
2559 if (wcaps & AC_WCAP_OUT_AMP) {
2560 sprintf(name, "%s Capture Volume",
2561 stac92xx_dmic_labels[dimux->num_items]);
2562
2563 err = stac92xx_add_control(spec,
2564 STAC_CTL_WIDGET_VOL,
2565 name,
2566 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2567 if (err < 0)
2568 return err;
2569 }
2570
8b65727b
MP		 2571 dimux->items[dimux->num_items].label =
2572 stac92xx_dmic_labels[dimux->num_items];
2573 dimux->items[dimux->num_items].index = index;
2574 dimux->num_items++;
2575 }
2576
2577 return 0;
2578}
2579
c7d4b2fa
M		 2580/* create playback/capture controls for input pins */
2581static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2582{
2583 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2584 struct hda_input_mux *imux = &spec->private_imux;
2585 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2586 int i, j, k;
2587
2588 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2589 int index;
2590
2591 if (!cfg->input_pins[i])
2592 continue;
2593 index = -1;
2594 for (j = 0; j < spec->num_muxes; j++) {
2595 int num_cons;
2596 num_cons = snd_hda_get_connections(codec,
2597 spec->mux_nids[j],
2598 con_lst,
2599 HDA_MAX_NUM_INPUTS);
2600 for (k = 0; k < num_cons; k++)
2601 if (con_lst[k] == cfg->input_pins[i]) {
2602 index = k;
2603 goto found;
2604 }
c7d4b2fa 2605 }
314634bc
TI		 2606 continue;
2607 found:
2608 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2609 imux->items[imux->num_items].index = index;
2610 imux->num_items++;
c7d4b2fa
M		 2611 }
2612
7b043899 2613 if (imux->num_items) {
62fe78e9
SR		 2614 /*
2615 * Set the current input for the muxes.
2616 * The STAC9221 has two input muxes with identical source
2617 * NID lists. Hopefully this won't get confused.
2618 */
2619 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2620 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2621 AC_VERB_SET_CONNECT_SEL,
2622 imux->items[0].index);
62fe78e9
SR		 2623 }
2624 }
2625
c7d4b2fa
M		 2626 return 0;
2627}
2628
c7d4b2fa
M		 2629static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2630{
2631 struct sigmatel_spec *spec = codec->spec;
2632 int i;
2633
2634 for (i = 0; i < spec->autocfg.line_outs; i++) {
2635 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2636 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2637 }
2638}
2639
2640static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2641{
2642 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2643 int i;
c7d4b2fa 2644
eb06ed8f
TI		 2645 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2646 hda_nid_t pin;
2647 pin = spec->autocfg.hp_pins[i];
2648 if (pin) /* connect to front */
2649 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2650 }
2651 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2652 hda_nid_t pin;
2653 pin = spec->autocfg.speaker_pins[i];
2654 if (pin) /* connect to front */
2655 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2656 }
c7d4b2fa
M		 2657}
2658
3cc08dc6 2659static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2660{
2661 struct sigmatel_spec *spec = codec->spec;
2662 int err;
bcecd9bd 2663 int hp_speaker_swap = 0;
c7d4b2fa 2664
8b65727b
MP		 2665 if ((err = snd_hda_parse_pin_def_config(codec,
2666 &spec->autocfg,
2667 spec->dmic_nids)) < 0)
c7d4b2fa 2668 return err;
82bc955f 2669 if (! spec->autocfg.line_outs)
869264c4 2670 return 0; /* can't find valid pin config */
19039bd0 2671
bcecd9bd
JZ		 2672 /* If we have no real line-out pin and multiple hp-outs, HPs should
2673 * be set up as multi-channel outputs.
2674 */
2675 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2676 spec->autocfg.hp_outs > 1) {
2677 /* Copy hp_outs to line_outs, backup line_outs in
2678 * speaker_outs so that the following routines can handle
2679 * HP pins as primary outputs.
2680 */
2681 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2682 sizeof(spec->autocfg.line_out_pins));
2683 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2684 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2685 sizeof(spec->autocfg.hp_pins));
2686 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2687 hp_speaker_swap = 1;
2688 }
09a99959
MR		 2689 if (spec->autocfg.mono_out_pin) {
2690 int dir = (get_wcaps(codec, spec->autocfg.mono_out_pin)
2691 & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
2692 u32 caps = query_amp_caps(codec,
2693 spec->autocfg.mono_out_pin, dir);
2694 hda_nid_t conn_list[1];
2695
2696 /* get the mixer node and then the mono mux if it exists */
2697 if (snd_hda_get_connections(codec,
2698 spec->autocfg.mono_out_pin, conn_list, 1) &&
2699 snd_hda_get_connections(codec, conn_list[0],
2700 conn_list, 1)) {
2701
2702 int wcaps = get_wcaps(codec, conn_list[0]);
2703 int wid_type = (wcaps & AC_WCAP_TYPE)
2704 >> AC_WCAP_TYPE_SHIFT;
2705 /* LR swap check, some stac925x have a mux that
2706 * changes the DACs output path instead of the
2707 * mono-mux path.
2708 */
2709 if (wid_type == AC_WID_AUD_SEL &&
2710 !(wcaps & AC_WCAP_LR_SWAP))
2711 spec->mono_nid = conn_list[0];
2712 }
2713 /* all mono outs have a least a mute/unmute switch */
2714 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2715 "Mono Playback Switch",
2716 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2717 1, 0, dir));
2718 if (err < 0)
2719 return err;
2720 /* check to see if there is volume support for the amp */
2721 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2722 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2723 "Mono Playback Volume",
2724 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2725 1, 0, dir));
2726 if (err < 0)
2727 return err;
2728 }
2729
2730 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
2731 AC_PINCTL_OUT_EN);
2732 }
bcecd9bd 2733
403d1944
MP		 2734 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2735 return err;
19039bd0
TI		 2736 if (spec->multiout.num_dacs == 0)
2737 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2738 return err;
c7d4b2fa 2739
0fb87bb4
ML		 2740 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2741
2742 if (err < 0)
2743 return err;
2744
bcecd9bd
JZ		 2745 if (hp_speaker_swap == 1) {
2746 /* Restore the hp_outs and line_outs */
2747 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2748 sizeof(spec->autocfg.line_out_pins));
2749 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2750 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2751 sizeof(spec->autocfg.speaker_pins));
2752 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2753 memset(spec->autocfg.speaker_pins, 0,
2754 sizeof(spec->autocfg.speaker_pins));
2755 spec->autocfg.speaker_outs = 0;
2756 }
2757
0fb87bb4
ML		 2758 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2759
2760 if (err < 0)
2761 return err;
2762
2763 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2764
2765 if (err < 0)
c7d4b2fa
M		 2766 return err;
2767
b22b4821
MR		 2768 if (spec->mono_nid > 0) {
2769 err = stac92xx_auto_create_mono_output_ctls(codec);
2770 if (err < 0)
2771 return err;
2772 }
2773
8b65727b
MP		 2774 if (spec->num_dmics > 0)
2775 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2776 &spec->autocfg)) < 0)
2777 return err;
2778
c7d4b2fa 2779 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2780 if (spec->multiout.max_channels > 2)
c7d4b2fa 2781 spec->surr_switch = 1;
c7d4b2fa 2782
82bc955f 2783 if (spec->autocfg.dig_out_pin)
3cc08dc6 2784 spec->multiout.dig_out_nid = dig_out;
82bc955f 2785 if (spec->autocfg.dig_in_pin)
3cc08dc6 2786 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2787
2788 if (spec->kctl_alloc)
2789 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2790
2791 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2792 if (!spec->dinput_mux)
2793 spec->dinput_mux = &spec->private_dimux;
b22b4821 2794 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 2795
2796 return 1;
2797}
2798
82bc955f
TI		 2799/* add playback controls for HP output */
2800static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2801 struct auto_pin_cfg *cfg)
2802{
2803 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2804 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2805 unsigned int wid_caps;
2806
2807 if (! pin)
2808 return 0;
2809
2810 wid_caps = get_wcaps(codec, pin);
505cb341 2811 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2812 spec->hp_detect = 1;
82bc955f
TI		 2813
2814 return 0;
2815}
2816
160ea0dc
RF		 2817/* add playback controls for LFE output */
2818static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2819 struct auto_pin_cfg *cfg)
2820{
2821 struct sigmatel_spec *spec = codec->spec;
2822 int err;
2823 hda_nid_t lfe_pin = 0x0;
2824 int i;
2825
2826 /*
2827 * search speaker outs and line outs for a mono speaker pin
2828 * with an amp. If one is found, add LFE controls
2829 * for it.
2830 */
2831 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2832 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2833 unsigned long wcaps = get_wcaps(codec, pin);
2834 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2835 if (wcaps == AC_WCAP_OUT_AMP)
2836 /* found a mono speaker with an amp, must be lfe */
2837 lfe_pin = pin;
2838 }
2839
2840 /* if speaker_outs is 0, then speakers may be in line_outs */
2841 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2842 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2843 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2844 unsigned long cfg;
2845 cfg = snd_hda_codec_read(codec, pin, 0,
2846 AC_VERB_GET_CONFIG_DEFAULT,
2847 0x00);
2848 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2849 unsigned long wcaps = get_wcaps(codec, pin);
2850 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2851 if (wcaps == AC_WCAP_OUT_AMP)
2852 /* found a mono speaker with an amp,
2853 must be lfe */
2854 lfe_pin = pin;
2855 }
2856 }
2857 }
2858
2859 if (lfe_pin) {
eb06ed8f 2860 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2861 if (err < 0)
2862 return err;
2863 }
2864
2865 return 0;
2866}
2867
c7d4b2fa
M		 2868static int stac9200_parse_auto_config(struct hda_codec *codec)
2869{
2870 struct sigmatel_spec *spec = codec->spec;
2871 int err;
2872
df694daa 2873 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2874 return err;
2875
2876 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2877 return err;
2878
82bc955f
TI		 2879 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2880 return err;
2881
160ea0dc
RF		 2882 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2883 return err;
2884
82bc955f 2885 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2886 spec->multiout.dig_out_nid = 0x05;
82bc955f 2887 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2888 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2889
2890 if (spec->kctl_alloc)
2891 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2892
2893 spec->input_mux = &spec->private_imux;
8b65727b 2894 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2895
2896 return 1;
2897}
2898
62fe78e9
SR		 2899/*
2900 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2901 * funky external mute control using GPIO pins.
2902 */
2903
76e1ddfb 2904static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 2905 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 2906{
2907 unsigned int gpiostate, gpiomask, gpiodir;
2908
2909 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2910 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 2911 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 2912
2913 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2914 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 2915 gpiomask |= mask;
62fe78e9
SR		 2916
2917 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2918 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 2919 gpiodir |= dir_mask;
62fe78e9 2920
76e1ddfb 2921 /* Configure GPIOx as CMOS */
62fe78e9
SR		 2922 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2923
2924 snd_hda_codec_write(codec, codec->afg, 0,
2925 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 2926 snd_hda_codec_read(codec, codec->afg, 0,
2927 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 2928
2929 msleep(1);
2930
76e1ddfb
TI		 2931 snd_hda_codec_read(codec, codec->afg, 0,
2932 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 2933}
2934
314634bc
TI		 2935static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2936 unsigned int event)
2937{
2938 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2939 snd_hda_codec_write_cache(codec, nid, 0,
2940 AC_VERB_SET_UNSOLICITED_ENABLE,
2941 (AC_USRSP_EN | event));
314634bc
TI		 2942}
2943
a64135a2
MR		 2944static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
2945{
2946 int i;
2947 for (i = 0; i < cfg->hp_outs; i++)
2948 if (cfg->hp_pins[i] == nid)
2949 return 1; /* nid is a HP-Out */
2950
2951 return 0; /* nid is not a HP-Out */
2952};
2953
b76c850f
MR		 2954static void stac92xx_power_down(struct hda_codec *codec)
2955{
2956 struct sigmatel_spec *spec = codec->spec;
2957
2958 /* power down inactive DACs */
2959 hda_nid_t *dac;
2960 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 2961 if (!is_in_dac_nids(spec, *dac) &&
2962 spec->multiout.hp_nid != *dac)
b76c850f
MR		 2963 snd_hda_codec_write_cache(codec, *dac, 0,
2964 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2965}
2966
c7d4b2fa
M		 2967static int stac92xx_init(struct hda_codec *codec)
2968{
2969 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2970 struct auto_pin_cfg *cfg = &spec->autocfg;
2971 int i;
c7d4b2fa 2972
c7d4b2fa
M		 2973 snd_hda_sequence_write(codec, spec->init);
2974
82bc955f
TI		 2975 /* set up pins */
2976 if (spec->hp_detect) {
505cb341 2977 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2978 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2979 enable_pin_detect(codec, cfg->hp_pins[i],
2980 STAC_HP_EVENT);
0a07acaf
TI		 2981 /* force to enable the first line-out; the others are set up
2982 * in unsol_event
2983 */
2984 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2985 AC_PINCTL_OUT_EN);
eb995a8c 2986 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2987 /* fake event to set up pins */
2988 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2989 } else {
2990 stac92xx_auto_init_multi_out(codec);
2991 stac92xx_auto_init_hp_out(codec);
2992 }
2993 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2994 hda_nid_t nid = cfg->input_pins[i];
2995 if (nid) {
2996 unsigned int pinctl = AC_PINCTL_IN_EN;
2997 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2998 pinctl |= stac92xx_get_vref(codec, nid);
2999 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3000 }
82bc955f 3001 }
a64135a2
MR		 3002 for (i = 0; i < spec->num_dmics; i++)
3003 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3004 AC_PINCTL_IN_EN);
3005 for (i = 0; i < spec->num_pwrs; i++) {
3006 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3007 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3008 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3009 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3010 /* outputs are only ports capable of power management
3011 * any attempts on powering down a input port cause the
3012 * referenced VREF to act quirky.
3013 */
3014 if (pinctl & AC_PINCTL_IN_EN)
3015 continue;
3016 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3017 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3018 }
b76c850f
MR		 3019 if (spec->dac_list)
3020 stac92xx_power_down(codec);
82bc955f
TI		 3021 if (cfg->dig_out_pin)
3022 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3023 AC_PINCTL_OUT_EN);
3024 if (cfg->dig_in_pin)
3025 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3026 AC_PINCTL_IN_EN);
3027
4fe5195c
MR		 3028 stac_gpio_set(codec, spec->gpio_mask,
3029 spec->gpio_dir, spec->gpio_data);
62fe78e9 3030
c7d4b2fa
M		 3031 return 0;
3032}
3033
2f2f4251
M		 3034static void stac92xx_free(struct hda_codec *codec)
3035{
c7d4b2fa
M		 3036 struct sigmatel_spec *spec = codec->spec;
3037 int i;
3038
3039 if (! spec)
3040 return;
3041
3042 if (spec->kctl_alloc) {
3043 for (i = 0; i < spec->num_kctl_used; i++)
3044 kfree(spec->kctl_alloc[i].name);
3045 kfree(spec->kctl_alloc);
3046 }
3047
11b44bbd
RF		 3048 if (spec->bios_pin_configs)
3049 kfree(spec->bios_pin_configs);
3050
c7d4b2fa 3051 kfree(spec);
2f2f4251
M		 3052}
3053
4e55096e
M		 3054static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3055 unsigned int flag)
3056{
3057 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3058 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3059
f9acba43
TI		 3060 if (pin_ctl & AC_PINCTL_IN_EN) {
3061 /*
3062 * we need to check the current set-up direction of
3063 * shared input pins since they can be switched via
3064 * "xxx as Output" mixer switch
3065 */
3066 struct sigmatel_spec *spec = codec->spec;
3067 struct auto_pin_cfg *cfg = &spec->autocfg;
3068 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3069 spec->line_switch) ||
3070 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3071 spec->mic_switch))
3072 return;
3073 }
3074
7b043899
SL		 3075 /* if setting pin direction bits, clear the current
3076 direction bits first */
3077 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3078 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3079
82beb8fd 3080 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3081 AC_VERB_SET_PIN_WIDGET_CONTROL,
3082 pin_ctl | flag);
3083}
3084
3085static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3086 unsigned int flag)
3087{
3088 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3089 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3090 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3091 AC_VERB_SET_PIN_WIDGET_CONTROL,
3092 pin_ctl & ~flag);
3093}
3094
40c1d308 3095static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3096{
3097 if (!nid)
3098 return 0;
3099 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3100 & (1 << 31)) {
3101 unsigned int pinctl;
3102 pinctl = snd_hda_codec_read(codec, nid, 0,
3103 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3104 if (pinctl & AC_PINCTL_IN_EN)
3105 return 0; /* mic- or line-input */
3106 else
3107 return 1; /* HP-output */
3108 }
314634bc
TI		 3109 return 0;
3110}
3111
3112static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3113{
3114 struct sigmatel_spec *spec = codec->spec;
3115 struct auto_pin_cfg *cfg = &spec->autocfg;
3116 int i, presence;
3117
eb06ed8f 3118 presence = 0;
4fe5195c
MR		 3119 if (spec->gpio_mute)
3120 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3121 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3122
eb06ed8f 3123 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3124 if (presence)
3125 break;
4fe5195c 3126 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3127 }
4e55096e
M		 3128
3129 if (presence) {
3130 /* disable lineouts, enable hp */
3131 for (i = 0; i < cfg->line_outs; i++)
3132 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3133 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3134 for (i = 0; i < cfg->speaker_outs; i++)
3135 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3136 AC_PINCTL_OUT_EN);
4e55096e
M		 3137 } else {
3138 /* enable lineouts, disable hp */
3139 for (i = 0; i < cfg->line_outs; i++)
3140 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3141 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3142 for (i = 0; i < cfg->speaker_outs; i++)
3143 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3144 AC_PINCTL_OUT_EN);
4e55096e
M		 3145 }
3146}
3147
a64135a2
MR		 3148static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3149{
3150 struct sigmatel_spec *spec = codec->spec;
3151 hda_nid_t nid = spec->pwr_nids[idx];
3152 int presence, val;
3153 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3154 & 0x000000ff;
3155 presence = get_hp_pin_presence(codec, nid);
3156 idx = 1 << idx;
3157
3158 if (presence)
3159 val &= ~idx;
3160 else
3161 val |= idx;
3162
3163 /* power down unused output ports */
3164 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3165};
3166
314634bc
TI		 3167static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3168{
a64135a2
MR		 3169 struct sigmatel_spec *spec = codec->spec;
3170 int idx = res >> 26 & 0x0f;
3171
3172 switch ((res >> 26) & 0x30) {
314634bc
TI		 3173 case STAC_HP_EVENT:
3174 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3175 /* fallthru */
3176 case STAC_PWR_EVENT:
3177 if (spec->num_pwrs > 0)
3178 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3179 }
3180}
3181
cb53c626 3182#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3183static int stac92xx_resume(struct hda_codec *codec)
3184{
dc81bed1
TI		 3185 struct sigmatel_spec *spec = codec->spec;
3186
11b44bbd 3187 stac92xx_set_config_regs(codec);
dc81bed1 3188 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3189 stac_gpio_set(codec, spec->gpio_mask,
3190 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3191 snd_hda_codec_resume_amp(codec);
3192 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3193 /* power down inactive DACs */
3194 if (spec->dac_list)
3195 stac92xx_power_down(codec);
dc81bed1
TI		 3196 /* invoke unsolicited event to reset the HP state */
3197 if (spec->hp_detect)
3198 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3199 return 0;
3200}
3201#endif
3202
2f2f4251
M		 3203static struct hda_codec_ops stac92xx_patch_ops = {
3204 .build_controls = stac92xx_build_controls,
3205 .build_pcms = stac92xx_build_pcms,
3206 .init = stac92xx_init,
3207 .free = stac92xx_free,
4e55096e 3208 .unsol_event = stac92xx_unsol_event,
cb53c626 3209#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3210 .resume = stac92xx_resume,
3211#endif
2f2f4251
M		 3212};
3213
3214static int patch_stac9200(struct hda_codec *codec)
3215{
3216 struct sigmatel_spec *spec;
c7d4b2fa 3217 int err;
2f2f4251 3218
e560d8d8 3219 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3220 if (spec == NULL)
3221 return -ENOMEM;
3222
3223 codec->spec = spec;
a4eed138 3224 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3225 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3226 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3227 stac9200_models,
3228 stac9200_cfg_tbl);
11b44bbd
RF		 3229 if (spec->board_config < 0) {
3230 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3231 err = stac92xx_save_bios_config_regs(codec);
3232 if (err < 0) {
3233 stac92xx_free(codec);
3234 return err;
3235 }
3236 spec->pin_configs = spec->bios_pin_configs;
3237 } else {
403d1944
MP		 3238 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3239 stac92xx_set_config_regs(codec);
3240 }
2f2f4251
M		 3241
3242 spec->multiout.max_channels = 2;
3243 spec->multiout.num_dacs = 1;
3244 spec->multiout.dac_nids = stac9200_dac_nids;
3245 spec->adc_nids = stac9200_adc_nids;
3246 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3247 spec->num_muxes = 1;
8b65727b 3248 spec->num_dmics = 0;
9e05b7a3 3249 spec->num_adcs = 1;
a64135a2 3250 spec->num_pwrs = 0;
c7d4b2fa 3251
bf277785
TD		 3252 if (spec->board_config == STAC_9200_GATEWAY ||
3253 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3254 spec->init = stac9200_eapd_init;
3255 else
3256 spec->init = stac9200_core_init;
2f2f4251 3257 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 3258
3259 err = stac9200_parse_auto_config(codec);
3260 if (err < 0) {
3261 stac92xx_free(codec);
3262 return err;
3263 }
2f2f4251
M		 3264
3265 codec->patch_ops = stac92xx_patch_ops;
3266
3267 return 0;
3268}
3269
8e21c34c
TD		 3270static int patch_stac925x(struct hda_codec *codec)
3271{
3272 struct sigmatel_spec *spec;
3273 int err;
3274
3275 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3276 if (spec == NULL)
3277 return -ENOMEM;
3278
3279 codec->spec = spec;
a4eed138 3280 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3281 spec->pin_nids = stac925x_pin_nids;
3282 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3283 stac925x_models,
3284 stac925x_cfg_tbl);
9e507abd 3285 again:
8e21c34c 3286 if (spec->board_config < 0) {
2c11f955
TD		 3287 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3288 "using BIOS defaults\n");
8e21c34c
TD		 3289 err = stac92xx_save_bios_config_regs(codec);
3290 if (err < 0) {
3291 stac92xx_free(codec);
3292 return err;
3293 }
3294 spec->pin_configs = spec->bios_pin_configs;
3295 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3296 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3297 stac92xx_set_config_regs(codec);
3298 }
3299
3300 spec->multiout.max_channels = 2;
3301 spec->multiout.num_dacs = 1;
3302 spec->multiout.dac_nids = stac925x_dac_nids;
3303 spec->adc_nids = stac925x_adc_nids;
3304 spec->mux_nids = stac925x_mux_nids;
3305 spec->num_muxes = 1;
9e05b7a3 3306 spec->num_adcs = 1;
a64135a2 3307 spec->num_pwrs = 0;
2c11f955
TD		 3308 switch (codec->vendor_id) {
3309 case 0x83847632: /* STAC9202 */
3310 case 0x83847633: /* STAC9202D */
3311 case 0x83847636: /* STAC9251 */
3312 case 0x83847637: /* STAC9251D */
f6e9852a 3313 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3314 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3315 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3316 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3317 break;
3318 default:
3319 spec->num_dmics = 0;
3320 break;
3321 }
8e21c34c
TD		 3322
3323 spec->init = stac925x_core_init;
3324 spec->mixer = stac925x_mixer;
3325
3326 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3327 if (!err) {
3328 if (spec->board_config < 0) {
3329 printk(KERN_WARNING "hda_codec: No auto-config is "
3330 "available, default to model=ref\n");
3331 spec->board_config = STAC_925x_REF;
3332 goto again;
3333 }
3334 err = -EINVAL;
3335 }
8e21c34c
TD		 3336 if (err < 0) {
3337 stac92xx_free(codec);
3338 return err;
3339 }
3340
3341 codec->patch_ops = stac92xx_patch_ops;
3342
3343 return 0;
3344}
3345
e1f0d669
MR		 3346static struct hda_input_mux stac92hd73xx_dmux = {
3347 .num_items = 4,
3348 .items = {
3349 { "Analog Inputs", 0x0b },
3350 { "CD", 0x08 },
3351 { "Digital Mic 1", 0x09 },
3352 { "Digital Mic 2", 0x0a },
3353 }
3354};
3355
3356static int patch_stac92hd73xx(struct hda_codec *codec)
3357{
3358 struct sigmatel_spec *spec;
3359 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3360 int err = 0;
3361
3362 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3363 if (spec == NULL)
3364 return -ENOMEM;
3365
3366 codec->spec = spec;
3367 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3368 spec->pin_nids = stac92hd73xx_pin_nids;
3369 spec->board_config = snd_hda_check_board_config(codec,
3370 STAC_92HD73XX_MODELS,
3371 stac92hd73xx_models,
3372 stac92hd73xx_cfg_tbl);
3373again:
3374 if (spec->board_config < 0) {
3375 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3376 " STAC92HD73XX, using BIOS defaults\n");
3377 err = stac92xx_save_bios_config_regs(codec);
3378 if (err < 0) {
3379 stac92xx_free(codec);
3380 return err;
3381 }
3382 spec->pin_configs = spec->bios_pin_configs;
3383 } else {
3384 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3385 stac92xx_set_config_regs(codec);
3386 }
3387
3388 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3389 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3390
3391 if (spec->multiout.num_dacs < 0) {
3392 printk(KERN_WARNING "hda_codec: Could not determine "
3393 "number of channels defaulting to DAC count\n");
3394 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3395 }
3396
3397 switch (spec->multiout.num_dacs) {
3398 case 0x3: /* 6 Channel */
3399 spec->mixer = stac92hd73xx_6ch_mixer;
3400 spec->init = stac92hd73xx_6ch_core_init;
3401 break;
3402 case 0x4: /* 8 Channel */
3403 spec->multiout.hp_nid = 0x18;
3404 spec->mixer = stac92hd73xx_8ch_mixer;
3405 spec->init = stac92hd73xx_8ch_core_init;
3406 break;
3407 case 0x5: /* 10 Channel */
3408 spec->multiout.hp_nid = 0x19;
3409 spec->mixer = stac92hd73xx_10ch_mixer;
3410 spec->init = stac92hd73xx_10ch_core_init;
3411 };
3412
3413 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3414 spec->aloopback_mask = 0x01;
3415 spec->aloopback_shift = 8;
3416
3417 spec->mux_nids = stac92hd73xx_mux_nids;
3418 spec->adc_nids = stac92hd73xx_adc_nids;
3419 spec->dmic_nids = stac92hd73xx_dmic_nids;
3420 spec->dmux_nids = stac92hd73xx_dmux_nids;
3421
3422 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3423 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 3424 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3425 spec->dinput_mux = &stac92hd73xx_dmux;
3426 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3427 spec->gpio_mask = spec->gpio_dir = 0x1;
3428 spec->gpio_data = 0x01;
e1f0d669 3429
a7662640
MR		 3430 switch (spec->board_config) {
3431 case STAC_DELL_M6:
3432 switch (codec->subsystem_id) {
3433 case 0x1028025e: /* Analog Mics */
3434 case 0x1028025f:
3435 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3436 spec->num_dmics = 0;
3437 break;
3438 case 0x10280254: /* Digital Mics */
3439 case 0x10280255:
3440 case 0x10280271:
3441 case 0x10280272:
3442 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3443 spec->num_dmics = 1;
3444 break;
3445 case 0x10280256: /* Both */
3446 case 0x10280057:
3447 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3448 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3449 spec->num_dmics = 1;
3450 break;
3451 }
3452 break;
3453 default:
3454 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
3455 }
3456
a64135a2
MR		 3457 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3458 spec->pwr_nids = stac92hd73xx_pwr_nids;
3459
e1f0d669
MR		 3460 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3461
3462 if (!err) {
3463 if (spec->board_config < 0) {
3464 printk(KERN_WARNING "hda_codec: No auto-config is "
3465 "available, default to model=ref\n");
3466 spec->board_config = STAC_92HD73XX_REF;
3467 goto again;
3468 }
3469 err = -EINVAL;
3470 }
3471
3472 if (err < 0) {
3473 stac92xx_free(codec);
3474 return err;
3475 }
3476
3477 codec->patch_ops = stac92xx_patch_ops;
3478
3479 return 0;
3480}
3481
e035b841
MR		 3482static int patch_stac92hd71bxx(struct hda_codec *codec)
3483{
3484 struct sigmatel_spec *spec;
3485 int err = 0;
3486
3487 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3488 if (spec == NULL)
3489 return -ENOMEM;
3490
3491 codec->spec = spec;
3492 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
3493 spec->pin_nids = stac92hd71bxx_pin_nids;
3494 spec->board_config = snd_hda_check_board_config(codec,
3495 STAC_92HD71BXX_MODELS,
3496 stac92hd71bxx_models,
3497 stac92hd71bxx_cfg_tbl);
3498again:
3499 if (spec->board_config < 0) {
3500 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3501 " STAC92HD71BXX, using BIOS defaults\n");
3502 err = stac92xx_save_bios_config_regs(codec);
3503 if (err < 0) {
3504 stac92xx_free(codec);
3505 return err;
3506 }
3507 spec->pin_configs = spec->bios_pin_configs;
3508 } else {
3509 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3510 stac92xx_set_config_regs(codec);
3511 }
3512
541eee87
MR		 3513 switch (codec->vendor_id) {
3514 case 0x111d76b6: /* 4 Port without Analog Mixer */
3515 case 0x111d76b7:
3516 case 0x111d76b4: /* 6 Port without Analog Mixer */
3517 case 0x111d76b5:
3518 spec->mixer = stac92hd71bxx_mixer;
3519 spec->init = stac92hd71bxx_core_init;
3520 break;
3521 default:
3522 spec->mixer = stac92hd71bxx_analog_mixer;
3523 spec->init = stac92hd71bxx_analog_core_init;
3524 }
3525
3526 spec->aloopback_mask = 0x20;
3527 spec->aloopback_shift = 0;
3528
4fe5195c
MR		 3529 /* GPIO0 High = EAPD */
3530 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0x1;
e035b841 3531
e035b841
MR		 3532 spec->mux_nids = stac92hd71bxx_mux_nids;
3533 spec->adc_nids = stac92hd71bxx_adc_nids;
3534 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3535 spec->dmux_nids = stac92hd71bxx_dmux_nids;
e035b841
MR		 3536
3537 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3538 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3539 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3540 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3541
a64135a2
MR		 3542 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3543 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3544
e035b841
MR		 3545 spec->multiout.num_dacs = 2;
3546 spec->multiout.hp_nid = 0x11;
3547 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3548
3549 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3550 if (!err) {
3551 if (spec->board_config < 0) {
3552 printk(KERN_WARNING "hda_codec: No auto-config is "
3553 "available, default to model=ref\n");
3554 spec->board_config = STAC_92HD71BXX_REF;
3555 goto again;
3556 }
3557 err = -EINVAL;
3558 }
3559
3560 if (err < 0) {
3561 stac92xx_free(codec);
3562 return err;
3563 }
3564
3565 codec->patch_ops = stac92xx_patch_ops;
3566
3567 return 0;
3568};
3569
2f2f4251
M		 3570static int patch_stac922x(struct hda_codec *codec)
3571{
3572 struct sigmatel_spec *spec;
c7d4b2fa 3573 int err;
2f2f4251 3574
e560d8d8 3575 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3576 if (spec == NULL)
3577 return -ENOMEM;
3578
3579 codec->spec = spec;
a4eed138 3580 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3581 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3582 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3583 stac922x_models,
3584 stac922x_cfg_tbl);
5d5d3bc3 3585 if (spec->board_config == STAC_INTEL_MAC_V3) {
4fe5195c
MR		 3586 spec->gpio_mask = spec->gpio_dir = 0x03;
3587 spec->gpio_data = 0x03;
3fc24d85
TI		 3588 /* Intel Macs have all same PCI SSID, so we need to check
3589 * codec SSID to distinguish the exact models
3590 */
6f0778d8 3591 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3592 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3593
3594 case 0x106b0800:
3595 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3596 break;
5d5d3bc3
IZ		 3597 case 0x106b0600:
3598 case 0x106b0700:
3599 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3600 break;
5d5d3bc3
IZ		 3601 case 0x106b0e00:
3602 case 0x106b0f00:
3603 case 0x106b1600:
3604 case 0x106b1700:
3605 case 0x106b0200:
3606 case 0x106b1e00:
3607 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3608 break;
5d5d3bc3
IZ		 3609 case 0x106b1a00:
3610 case 0x00000100:
3611 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3612 break;
5d5d3bc3
IZ		 3613 case 0x106b0a00:
3614 case 0x106b2200:
3615 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3616 break;
3fc24d85
TI		 3617 }
3618 }
3619
9e507abd 3620 again:
11b44bbd
RF		 3621 if (spec->board_config < 0) {
3622 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3623 "using BIOS defaults\n");
3624 err = stac92xx_save_bios_config_regs(codec);
3625 if (err < 0) {
3626 stac92xx_free(codec);
3627 return err;
3628 }
3629 spec->pin_configs = spec->bios_pin_configs;
3630 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3631 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3632 stac92xx_set_config_regs(codec);
3633 }
2f2f4251 3634
c7d4b2fa
M		 3635 spec->adc_nids = stac922x_adc_nids;
3636 spec->mux_nids = stac922x_mux_nids;
2549413e 3637 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3638 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3639 spec->num_dmics = 0;
a64135a2 3640 spec->num_pwrs = 0;
c7d4b2fa
M		 3641
3642 spec->init = stac922x_core_init;
2f2f4251 3643 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3644
3645 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3646
3cc08dc6 3647 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3648 if (!err) {
3649 if (spec->board_config < 0) {
3650 printk(KERN_WARNING "hda_codec: No auto-config is "
3651 "available, default to model=ref\n");
3652 spec->board_config = STAC_D945_REF;
3653 goto again;
3654 }
3655 err = -EINVAL;
3656 }
3cc08dc6
MP		 3657 if (err < 0) {
3658 stac92xx_free(codec);
3659 return err;
3660 }
3661
3662 codec->patch_ops = stac92xx_patch_ops;
3663
807a4636
TI		 3664 /* Fix Mux capture level; max to 2 */
3665 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3666 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3667 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3668 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3669 (0 << AC_AMPCAP_MUTE_SHIFT));
3670
3cc08dc6
MP		 3671 return 0;
3672}
3673
3674static int patch_stac927x(struct hda_codec *codec)
3675{
3676 struct sigmatel_spec *spec;
3677 int err;
3678
3679 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3680 if (spec == NULL)
3681 return -ENOMEM;
3682
3683 codec->spec = spec;
a4eed138 3684 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3685 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3686 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3687 stac927x_models,
3688 stac927x_cfg_tbl);
9e507abd 3689 again:
8e9068b1
MR		 3690 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3691 if (spec->board_config < 0)
3692 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3693 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3694 err = stac92xx_save_bios_config_regs(codec);
3695 if (err < 0) {
3696 stac92xx_free(codec);
3697 return err;
3698 }
3699 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3700 } else {
3cc08dc6
MP		 3701 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3702 stac92xx_set_config_regs(codec);
3703 }
3704
8e9068b1
MR		 3705 spec->adc_nids = stac927x_adc_nids;
3706 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3707 spec->mux_nids = stac927x_mux_nids;
3708 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
b76c850f 3709 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 3710 spec->multiout.dac_nids = spec->dac_nids;
3711
81d3dbde 3712 switch (spec->board_config) {
93ed1503 3713 case STAC_D965_3ST:
93ed1503 3714 case STAC_D965_5ST:
8e9068b1 3715 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3716 spec->gpio_mask = spec->gpio_dir = 0x01;
3717 spec->gpio_data = 0x01;
8e9068b1
MR		 3718 spec->num_dmics = 0;
3719
93ed1503 3720 spec->init = d965_core_init;
9e05b7a3 3721 spec->mixer = stac927x_mixer;
81d3dbde 3722 break;
8e9068b1 3723 case STAC_DELL_BIOS:
03d7ca17
MR		 3724 /* configure the analog microphone on some laptops */
3725 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 3726 /* correct the front output jack as a hp out */
7989fba9 3727 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 3728 /* correct the front input jack as a mic */
3729 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3730 /* fallthru */
8e9068b1
MR		 3731 case STAC_DELL_3ST:
3732 /* GPIO2 High = Enable EAPD */
4fe5195c
MR		 3733 spec->gpio_mask = spec->gpio_dir = 0x04;
3734 spec->gpio_data = 0x04;
7f16859a
MR		 3735 spec->dmic_nids = stac927x_dmic_nids;
3736 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3737
8e9068b1
MR		 3738 spec->init = d965_core_init;
3739 spec->mixer = stac927x_mixer;
3740 spec->dmux_nids = stac927x_dmux_nids;
1697055e 3741 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 3742 break;
3743 default:
f1f208d0 3744 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3745 spec->gpio_mask = spec->gpio_dir = 0x1;
3746 spec->gpio_data = 0x01;
8e9068b1
MR		 3747 spec->num_dmics = 0;
3748
3749 spec->init = stac927x_core_init;
3750 spec->mixer = stac927x_mixer;
7f16859a
MR		 3751 }
3752
a64135a2 3753 spec->num_pwrs = 0;
e1f0d669
MR		 3754 spec->aloopback_mask = 0x40;
3755 spec->aloopback_shift = 0;
8e9068b1 3756
3cc08dc6 3757 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3758 if (!err) {
3759 if (spec->board_config < 0) {
3760 printk(KERN_WARNING "hda_codec: No auto-config is "
3761 "available, default to model=ref\n");
3762 spec->board_config = STAC_D965_REF;
3763 goto again;
3764 }
3765 err = -EINVAL;
3766 }
c7d4b2fa
M		 3767 if (err < 0) {
3768 stac92xx_free(codec);
3769 return err;
3770 }
2f2f4251
M		 3771
3772 codec->patch_ops = stac92xx_patch_ops;
3773
52987656
TI		 3774 /*
3775 * !!FIXME!!
3776 * The STAC927x seem to require fairly long delays for certain
3777 * command sequences. With too short delays (even if the answer
3778 * is set to RIRB properly), it results in the silence output
3779 * on some hardwares like Dell.
3780 *
3781 * The below flag enables the longer delay (see get_response
3782 * in hda_intel.c).
3783 */
3784 codec->bus->needs_damn_long_delay = 1;
3785
2f2f4251
M		 3786 return 0;
3787}
3788
f3302a59
MP		 3789static int patch_stac9205(struct hda_codec *codec)
3790{
3791 struct sigmatel_spec *spec;
8259980e 3792 int err;
f3302a59
MP		 3793
3794 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3795 if (spec == NULL)
3796 return -ENOMEM;
3797
3798 codec->spec = spec;
a4eed138 3799 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3800 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3801 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3802 stac9205_models,
3803 stac9205_cfg_tbl);
9e507abd 3804 again:
11b44bbd
RF		 3805 if (spec->board_config < 0) {
3806 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3807 err = stac92xx_save_bios_config_regs(codec);
3808 if (err < 0) {
3809 stac92xx_free(codec);
3810 return err;
3811 }
3812 spec->pin_configs = spec->bios_pin_configs;
3813 } else {
f3302a59
MP		 3814 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3815 stac92xx_set_config_regs(codec);
3816 }
3817
3818 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3819 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3820 spec->mux_nids = stac9205_mux_nids;
2549413e 3821 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3822 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3823 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3824 spec->dmux_nids = stac9205_dmux_nids;
1697055e 3825 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 3826 spec->num_pwrs = 0;
f3302a59
MP		 3827
3828 spec->init = stac9205_core_init;
3829 spec->mixer = stac9205_mixer;
3830
e1f0d669
MR		 3831 spec->aloopback_mask = 0x40;
3832 spec->aloopback_shift = 0;
f3302a59 3833 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3834
ae0a8ed8 3835 switch (spec->board_config){
ae0a8ed8 3836 case STAC_9205_DELL_M43:
87d48363
MR		 3837 /* Enable SPDIF in/out */
3838 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3839 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3840
4fe5195c
MR		 3841 /* Enable unsol response for GPIO4/Dock HP connection */
3842 snd_hda_codec_write(codec, codec->afg, 0,
3843 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3844 snd_hda_codec_write_cache(codec, codec->afg, 0,
3845 AC_VERB_SET_UNSOLICITED_ENABLE,
3846 (AC_USRSP_EN | STAC_HP_EVENT));
3847
3848 spec->gpio_dir = 0x0b;
3849 spec->gpio_mask = 0x1b;
3850 spec->gpio_mute = 0x10;
e2e7d624 3851 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 3852 * GPIO3 Low = DRM
87d48363 3853 */
4fe5195c 3854 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3855 break;
3856 default:
3857 /* GPIO0 High = EAPD */
4fe5195c
MR		 3858 spec->gpio_mask = spec->gpio_dir = 0x1;
3859 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3860 break;
3861 }
33382403 3862
f3302a59 3863 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 3864 if (!err) {
3865 if (spec->board_config < 0) {
3866 printk(KERN_WARNING "hda_codec: No auto-config is "
3867 "available, default to model=ref\n");
3868 spec->board_config = STAC_9205_REF;
3869 goto again;
3870 }
3871 err = -EINVAL;
3872 }
f3302a59
MP		 3873 if (err < 0) {
3874 stac92xx_free(codec);
3875 return err;
3876 }
3877
3878 codec->patch_ops = stac92xx_patch_ops;
3879
3880 return 0;
3881}
3882
db064e50 3883/*
6d859065 3884 * STAC9872 hack
db064e50
TI		 3885 */
3886
99ccc560 3887/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 3888static hda_nid_t vaio_dacs[] = { 0x2 };
3889#define VAIO_HP_DAC 0x5
3890static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
3891static hda_nid_t vaio_mux_nids[] = { 0x15 };
3892
3893static struct hda_input_mux vaio_mux = {
a3a2f429 3894 .num_items = 3,
db064e50 3895 .items = {
d773781c 3896 /* { "HP", 0x0 }, */
1624cb9a
TI		 3897 { "Mic Jack", 0x1 },
3898 { "Internal Mic", 0x2 },
db064e50
TI		 3899 { "PCM", 0x3 },
3900 }
3901};
3902
3903static struct hda_verb vaio_init[] = {
3904 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 3905 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 3906 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3907 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3908 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3909 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3910 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 3911 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3912 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3913 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3914 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3915 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3916 {}
3917};
3918
6d859065
GM		 3919static struct hda_verb vaio_ar_init[] = {
3920 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
3921 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3922 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3923 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3924/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
3925 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3926 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 3927 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3928 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3929/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
3930 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3931 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3932 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3933 {}
3934};
3935
db064e50 3936/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3937static struct hda_bind_ctls vaio_bind_master_vol = {
3938 .ops = &snd_hda_bind_vol,
3939 .values = {
3940 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3941 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3942 0
3943 },
3944};
db064e50
TI		 3945
3946/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3947static struct hda_bind_ctls vaio_bind_master_sw = {
3948 .ops = &snd_hda_bind_sw,
3949 .values = {
3950 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3951 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3952 0,
3953 },
3954};
db064e50
TI		 3955
3956static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 3957 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3958 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 3959 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3960 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3961 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3962 {
3963 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3964 .name = "Capture Source",
3965 .count = 1,
3966 .info = stac92xx_mux_enum_info,
3967 .get = stac92xx_mux_enum_get,
3968 .put = stac92xx_mux_enum_put,
3969 },
3970 {}
3971};
3972
6d859065 3973static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 3974 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3975 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 3976 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3977 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3978 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3979 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
3980 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
3981 {
3982 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3983 .name = "Capture Source",
3984 .count = 1,
3985 .info = stac92xx_mux_enum_info,
3986 .get = stac92xx_mux_enum_get,
3987 .put = stac92xx_mux_enum_put,
3988 },
3989 {}
3990};
3991
3992static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 3993 .build_controls = stac92xx_build_controls,
3994 .build_pcms = stac92xx_build_pcms,
3995 .init = stac92xx_init,
3996 .free = stac92xx_free,
cb53c626 3997#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 3998 .resume = stac92xx_resume,
3999#endif
4000};
4001
72e7b0dd
TI		 4002static int stac9872_vaio_init(struct hda_codec *codec)
4003{
4004 int err;
4005
4006 err = stac92xx_init(codec);
4007 if (err < 0)
4008 return err;
4009 if (codec->patch_ops.unsol_event)
4010 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4011 return 0;
4012}
4013
4014static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4015{
40c1d308 4016 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4017 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4018 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4019 } else {
4020 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4021 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4022 }
4023}
4024
4025static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4026{
4027 switch (res >> 26) {
4028 case STAC_HP_EVENT:
4029 stac9872_vaio_hp_detect(codec, res);
4030 break;
4031 }
4032}
4033
4034static struct hda_codec_ops stac9872_vaio_patch_ops = {
4035 .build_controls = stac92xx_build_controls,
4036 .build_pcms = stac92xx_build_pcms,
4037 .init = stac9872_vaio_init,
4038 .free = stac92xx_free,
4039 .unsol_event = stac9872_vaio_unsol_event,
4040#ifdef CONFIG_PM
4041 .resume = stac92xx_resume,
4042#endif
4043};
4044
6d859065
GM		 4045enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4046 CXD9872RD_VAIO,
4047 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
4048 STAC9872AK_VAIO,
4049 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
4050 STAC9872K_VAIO,
4051 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 4052 CXD9872AKD_VAIO,
4053 STAC_9872_MODELS,
4054};
4055
4056static const char *stac9872_models[STAC_9872_MODELS] = {
4057 [CXD9872RD_VAIO] = "vaio",
4058 [CXD9872AKD_VAIO] = "vaio-ar",
4059};
4060
4061static struct snd_pci_quirk stac9872_cfg_tbl[] = {
4062 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
4063 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
4064 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 4065 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 4066 {}
4067};
4068
6d859065 4069static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4070{
4071 struct sigmatel_spec *spec;
4072 int board_config;
4073
f5fcc13c
TI		 4074 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
4075 stac9872_models,
4076 stac9872_cfg_tbl);
db064e50
TI		 4077 if (board_config < 0)
4078 /* unknown config, let generic-parser do its job... */
4079 return snd_hda_parse_generic_codec(codec);
4080
4081 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4082 if (spec == NULL)
4083 return -ENOMEM;
4084
4085 codec->spec = spec;
4086 switch (board_config) {
6d859065
GM		 4087 case CXD9872RD_VAIO:
4088 case STAC9872AK_VAIO:
4089 case STAC9872K_VAIO:
db064e50
TI		 4090 spec->mixer = vaio_mixer;
4091 spec->init = vaio_init;
4092 spec->multiout.max_channels = 2;
4093 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4094 spec->multiout.dac_nids = vaio_dacs;
4095 spec->multiout.hp_nid = VAIO_HP_DAC;
4096 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
4097 spec->adc_nids = vaio_adcs;
a64135a2 4098 spec->num_pwrs = 0;
db064e50
TI		 4099 spec->input_mux = &vaio_mux;
4100 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4101 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 4102 break;
6d859065
GM		 4103
4104 case CXD9872AKD_VAIO:
4105 spec->mixer = vaio_ar_mixer;
4106 spec->init = vaio_ar_init;
4107 spec->multiout.max_channels = 2;
4108 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4109 spec->multiout.dac_nids = vaio_dacs;
4110 spec->multiout.hp_nid = VAIO_HP_DAC;
4111 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 4112 spec->num_pwrs = 0;
6d859065
GM		 4113 spec->adc_nids = vaio_adcs;
4114 spec->input_mux = &vaio_mux;
4115 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4116 codec->patch_ops = stac9872_patch_ops;
6d859065 4117 break;
db064e50
TI		 4118 }
4119
db064e50
TI		 4120 return 0;
4121}
4122
4123
2f2f4251
M		 4124/*
4125 * patch entries
4126 */
4127struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4128 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4129 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4130 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4131 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4132 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4133 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4134 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4135 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4136 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4137 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4138 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4139 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4140 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4141 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4142 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4143 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4144 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4145 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4146 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4147 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4148 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4149 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4150 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4151 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4152 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4153 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4154 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4155 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4156 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 4157 /* The following does not take into account .id=0x83847661 when subsys =
4158 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4159 * currently not fully supported.
4160 */
4161 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4162 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4163 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 4164 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4165 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4166 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4167 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4168 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4169 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4170 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4171 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
541eee87
MR		 4172 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4173 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4174 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 4175 { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
4176 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4177 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4178 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4179 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4180 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4181 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4182 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4183 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 4184 {} /* terminator */
4185};
Clone of davem's net-next-2.6 tree