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[ALSA] release 1.0.16
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
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2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
2f2f4251 36
4e55096e 37#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 38#define STAC_PWR_EVENT 0x20
39#define STAC_HP_EVENT 0x30
4e55096e 40
f5fcc13c
TI		 41enum {
42 STAC_REF,
bf277785 43 STAC_9200_OQO,
dfe495d0
TI		 44 STAC_9200_DELL_D21,
45 STAC_9200_DELL_D22,
46 STAC_9200_DELL_D23,
47 STAC_9200_DELL_M21,
48 STAC_9200_DELL_M22,
49 STAC_9200_DELL_M23,
50 STAC_9200_DELL_M24,
51 STAC_9200_DELL_M25,
52 STAC_9200_DELL_M26,
53 STAC_9200_DELL_M27,
1194b5b7 54 STAC_9200_GATEWAY,
f5fcc13c
TI		 55 STAC_9200_MODELS
56};
57
58enum {
59 STAC_9205_REF,
dfe495d0 60 STAC_9205_DELL_M42,
ae0a8ed8
TD		 61 STAC_9205_DELL_M43,
62 STAC_9205_DELL_M44,
f5fcc13c
TI		 63 STAC_9205_MODELS
64};
65
e1f0d669
MR		 66enum {
67 STAC_92HD73XX_REF,
a7662640 68 STAC_DELL_M6,
e1f0d669
MR		 69 STAC_92HD73XX_MODELS
70};
71
e035b841
MR		 72enum {
73 STAC_92HD71BXX_REF,
a7662640
MR		 74 STAC_DELL_M4_1,
75 STAC_DELL_M4_2,
e035b841
MR		 76 STAC_92HD71BXX_MODELS
77};
78
8e21c34c
TD		 79enum {
80 STAC_925x_REF,
81 STAC_M2_2,
82 STAC_MA6,
2c11f955 83 STAC_PA6,
8e21c34c
TD		 84 STAC_925x_MODELS
85};
86
f5fcc13c
TI		 87enum {
88 STAC_D945_REF,
89 STAC_D945GTP3,
90 STAC_D945GTP5,
5d5d3bc3
IZ		 91 STAC_INTEL_MAC_V1,
92 STAC_INTEL_MAC_V2,
93 STAC_INTEL_MAC_V3,
94 STAC_INTEL_MAC_V4,
95 STAC_INTEL_MAC_V5,
dfe495d0 96 /* for backward compatibility */
f5fcc13c 97 STAC_MACMINI,
3fc24d85 98 STAC_MACBOOK,
6f0778d8
NB		 99 STAC_MACBOOK_PRO_V1,
100 STAC_MACBOOK_PRO_V2,
f16928fb 101 STAC_IMAC_INTEL,
0dae0f83 102 STAC_IMAC_INTEL_20,
dfe495d0
TI		 103 STAC_922X_DELL_D81,
104 STAC_922X_DELL_D82,
105 STAC_922X_DELL_M81,
106 STAC_922X_DELL_M82,
f5fcc13c
TI		 107 STAC_922X_MODELS
108};
109
110enum {
111 STAC_D965_REF,
112 STAC_D965_3ST,
113 STAC_D965_5ST,
4ff076e5 114 STAC_DELL_3ST,
8e9068b1 115 STAC_DELL_BIOS,
f5fcc13c
TI		 116 STAC_927X_MODELS
117};
403d1944 118
2f2f4251 119struct sigmatel_spec {
c8b6bf9b 120 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 121 unsigned int num_mixers;
122
403d1944 123 int board_config;
c7d4b2fa 124 unsigned int surr_switch: 1;
403d1944
MP		 125 unsigned int line_switch: 1;
126 unsigned int mic_switch: 1;
3cc08dc6 127 unsigned int alt_switch: 1;
82bc955f 128 unsigned int hp_detect: 1;
c7d4b2fa 129
4fe5195c
MR		 130 /* gpio lines */
131 unsigned int gpio_mask;
132 unsigned int gpio_dir;
133 unsigned int gpio_data;
134 unsigned int gpio_mute;
135
136 /* analog loopback */
e1f0d669
MR		 137 unsigned char aloopback_mask;
138 unsigned char aloopback_shift;
8259980e 139
a64135a2
MR		 140 /* power management */
141 unsigned int num_pwrs;
142 hda_nid_t *pwr_nids;
b76c850f 143 hda_nid_t *dac_list;
a64135a2 144
2f2f4251 145 /* playback */
b22b4821
MR		 146 struct hda_input_mux *mono_mux;
147 unsigned int cur_mmux;
2f2f4251 148 struct hda_multi_out multiout;
3cc08dc6 149 hda_nid_t dac_nids[5];
2f2f4251
M		 150
151 /* capture */
152 hda_nid_t *adc_nids;
2f2f4251 153 unsigned int num_adcs;
dabbed6f
M		 154 hda_nid_t *mux_nids;
155 unsigned int num_muxes;
8b65727b
MP		 156 hda_nid_t *dmic_nids;
157 unsigned int num_dmics;
e1f0d669 158 hda_nid_t *dmux_nids;
1697055e 159 unsigned int num_dmuxes;
dabbed6f 160 hda_nid_t dig_in_nid;
b22b4821 161 hda_nid_t mono_nid;
2f2f4251 162
2f2f4251
M		 163 /* pin widgets */
164 hda_nid_t *pin_nids;
165 unsigned int num_pins;
2f2f4251 166 unsigned int *pin_configs;
11b44bbd 167 unsigned int *bios_pin_configs;
2f2f4251
M		 168
169 /* codec specific stuff */
170 struct hda_verb *init;
c8b6bf9b 171 struct snd_kcontrol_new *mixer;
2f2f4251
M		 172
173 /* capture source */
8b65727b 174 struct hda_input_mux *dinput_mux;
e1f0d669 175 unsigned int cur_dmux[2];
c7d4b2fa 176 struct hda_input_mux *input_mux;
3cc08dc6 177 unsigned int cur_mux[3];
2f2f4251 178
403d1944
MP		 179 /* i/o switches */
180 unsigned int io_switch[2];
0fb87bb4 181 unsigned int clfe_swap;
5f10c4a9 182 unsigned int aloopback;
2f2f4251 183
c7d4b2fa
M		 184 struct hda_pcm pcm_rec[2]; /* PCM information */
185
186 /* dynamic controls and input_mux */
187 struct auto_pin_cfg autocfg;
188 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 189 struct snd_kcontrol_new *kctl_alloc;
8b65727b 190 struct hda_input_mux private_dimux;
c7d4b2fa 191 struct hda_input_mux private_imux;
b22b4821 192 struct hda_input_mux private_mono_mux;
2f2f4251
M		 193};
194
195static hda_nid_t stac9200_adc_nids[1] = {
196 0x03,
197};
198
199static hda_nid_t stac9200_mux_nids[1] = {
200 0x0c,
201};
202
203static hda_nid_t stac9200_dac_nids[1] = {
204 0x02,
205};
206
a64135a2
MR		 207static hda_nid_t stac92hd73xx_pwr_nids[8] = {
208 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
209 0x0f, 0x10, 0x11
210};
211
e1f0d669
MR		 212static hda_nid_t stac92hd73xx_adc_nids[2] = {
213 0x1a, 0x1b
214};
215
216#define STAC92HD73XX_NUM_DMICS 2
217static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
218 0x13, 0x14, 0
219};
220
221#define STAC92HD73_DAC_COUNT 5
222static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
223 0x15, 0x16, 0x17, 0x18, 0x19,
224};
225
226static hda_nid_t stac92hd73xx_mux_nids[4] = {
227 0x28, 0x29, 0x2a, 0x2b,
228};
229
230static hda_nid_t stac92hd73xx_dmux_nids[2] = {
231 0x20, 0x21,
232};
233
a64135a2
MR		 234static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
235 0x0a, 0x0d, 0x0f
236};
237
e035b841
MR		 238static hda_nid_t stac92hd71bxx_adc_nids[2] = {
239 0x12, 0x13,
240};
241
242static hda_nid_t stac92hd71bxx_mux_nids[2] = {
243 0x1a, 0x1b
244};
245
e1f0d669
MR		 246static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
247 0x1c,
248};
249
aea7bb0a 250static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 251 0x10, /*0x11, */
252};
253
254#define STAC92HD71BXX_NUM_DMICS 2
255static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
256 0x18, 0x19, 0
257};
258
8e21c34c
TD		 259static hda_nid_t stac925x_adc_nids[1] = {
260 0x03,
261};
262
263static hda_nid_t stac925x_mux_nids[1] = {
264 0x0f,
265};
266
267static hda_nid_t stac925x_dac_nids[1] = {
268 0x02,
269};
270
f6e9852a
TI		 271#define STAC925X_NUM_DMICS 1
272static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
273 0x15, 0
2c11f955
TD		 274};
275
1697055e
TI		 276static hda_nid_t stac925x_dmux_nids[1] = {
277 0x14,
278};
279
2f2f4251
M		 280static hda_nid_t stac922x_adc_nids[2] = {
281 0x06, 0x07,
282};
283
284static hda_nid_t stac922x_mux_nids[2] = {
285 0x12, 0x13,
286};
287
3cc08dc6
MP		 288static hda_nid_t stac927x_adc_nids[3] = {
289 0x07, 0x08, 0x09
290};
291
292static hda_nid_t stac927x_mux_nids[3] = {
293 0x15, 0x16, 0x17
294};
295
b76c850f
MR		 296static hda_nid_t stac927x_dac_nids[6] = {
297 0x02, 0x03, 0x04, 0x05, 0x06, 0
298};
299
e1f0d669
MR		 300static hda_nid_t stac927x_dmux_nids[1] = {
301 0x1b,
302};
303
7f16859a
MR		 304#define STAC927X_NUM_DMICS 2
305static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
306 0x13, 0x14, 0
307};
308
f3302a59
MP		 309static hda_nid_t stac9205_adc_nids[2] = {
310 0x12, 0x13
311};
312
313static hda_nid_t stac9205_mux_nids[2] = {
314 0x19, 0x1a
315};
316
e1f0d669 317static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 318 0x1d,
e1f0d669
MR		 319};
320
f6e9852a
TI		 321#define STAC9205_NUM_DMICS 2
322static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
323 0x17, 0x18, 0
8b65727b
MP		 324};
325
c7d4b2fa 326static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 327 0x08, 0x09, 0x0d, 0x0e,
328 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 329};
330
8e21c34c
TD		 331static hda_nid_t stac925x_pin_nids[8] = {
332 0x07, 0x08, 0x0a, 0x0b,
333 0x0c, 0x0d, 0x10, 0x11,
334};
335
2f2f4251
M		 336static hda_nid_t stac922x_pin_nids[10] = {
337 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
338 0x0f, 0x10, 0x11, 0x15, 0x1b,
339};
340
a7662640 341static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 342 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
343 0x0f, 0x10, 0x11, 0x12, 0x13,
a7662640 344 0x14, 0x1e, 0x22
e1f0d669
MR		 345};
346
e035b841
MR		 347static hda_nid_t stac92hd71bxx_pin_nids[10] = {
348 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
349 0x0f, 0x14, 0x18, 0x19, 0x1e,
350};
351
3cc08dc6
MP		 352static hda_nid_t stac927x_pin_nids[14] = {
353 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
354 0x0f, 0x10, 0x11, 0x12, 0x13,
355 0x14, 0x21, 0x22, 0x23,
356};
357
f3302a59
MP		 358static hda_nid_t stac9205_pin_nids[12] = {
359 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
360 0x0f, 0x14, 0x16, 0x17, 0x18,
361 0x21, 0x22,
f3302a59
MP		 362};
363
8b65727b
MP		 364static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
365 struct snd_ctl_elem_info *uinfo)
366{
367 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
368 struct sigmatel_spec *spec = codec->spec;
369 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
370}
371
372static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
373 struct snd_ctl_elem_value *ucontrol)
374{
375 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
376 struct sigmatel_spec *spec = codec->spec;
e1f0d669 377 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 378
e1f0d669 379 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 380 return 0;
381}
382
383static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
384 struct snd_ctl_elem_value *ucontrol)
385{
386 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
387 struct sigmatel_spec *spec = codec->spec;
e1f0d669 388 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 389
390 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 391 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 392}
393
c8b6bf9b 394static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 395{
396 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
397 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 398 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 399}
400
c8b6bf9b 401static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 402{
403 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
404 struct sigmatel_spec *spec = codec->spec;
405 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
406
407 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
408 return 0;
409}
410
c8b6bf9b 411static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 412{
413 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
414 struct sigmatel_spec *spec = codec->spec;
415 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
416
c7d4b2fa 417 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 418 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
419}
420
b22b4821
MR		 421static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
422 struct snd_ctl_elem_info *uinfo)
423{
424 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
425 struct sigmatel_spec *spec = codec->spec;
426 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
427}
428
429static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
430 struct snd_ctl_elem_value *ucontrol)
431{
432 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
433 struct sigmatel_spec *spec = codec->spec;
434
435 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
436 return 0;
437}
438
439static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
440 struct snd_ctl_elem_value *ucontrol)
441{
442 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
443 struct sigmatel_spec *spec = codec->spec;
444
445 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
446 spec->mono_nid, &spec->cur_mmux);
447}
448
5f10c4a9
ML		 449#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
450
451static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
452 struct snd_ctl_elem_value *ucontrol)
453{
454 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 455 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 456 struct sigmatel_spec *spec = codec->spec;
457
e1f0d669
MR		 458 ucontrol->value.integer.value[0] = !!(spec->aloopback &
459 (spec->aloopback_mask << idx));
5f10c4a9
ML		 460 return 0;
461}
462
463static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
464 struct snd_ctl_elem_value *ucontrol)
465{
466 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
467 struct sigmatel_spec *spec = codec->spec;
e1f0d669 468 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 469 unsigned int dac_mode;
e1f0d669 470 unsigned int val, idx_val;
5f10c4a9 471
e1f0d669
MR		 472 idx_val = spec->aloopback_mask << idx;
473 if (ucontrol->value.integer.value[0])
474 val = spec->aloopback | idx_val;
475 else
476 val = spec->aloopback & ~idx_val;
68ea7b2f 477 if (spec->aloopback == val)
5f10c4a9
ML		 478 return 0;
479
68ea7b2f 480 spec->aloopback = val;
5f10c4a9 481
e1f0d669
MR		 482 /* Only return the bits defined by the shift value of the
483 * first two bytes of the mask
484 */
5f10c4a9 485 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 486 kcontrol->private_value & 0xFFFF, 0x0);
487 dac_mode >>= spec->aloopback_shift;
5f10c4a9 488
e1f0d669 489 if (spec->aloopback & idx_val) {
5f10c4a9 490 snd_hda_power_up(codec);
e1f0d669 491 dac_mode |= idx_val;
5f10c4a9
ML		 492 } else {
493 snd_hda_power_down(codec);
e1f0d669 494 dac_mode &= ~idx_val;
5f10c4a9
ML		 495 }
496
497 snd_hda_codec_write_cache(codec, codec->afg, 0,
498 kcontrol->private_value >> 16, dac_mode);
499
500 return 1;
501}
502
c7d4b2fa 503static struct hda_verb stac9200_core_init[] = {
2f2f4251 504 /* set dac0mux for dac converter */
c7d4b2fa 505 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 506 {}
507};
508
1194b5b7
TI		 509static struct hda_verb stac9200_eapd_init[] = {
510 /* set dac0mux for dac converter */
511 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
512 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
513 {}
514};
515
e1f0d669
MR		 516static struct hda_verb stac92hd73xx_6ch_core_init[] = {
517 /* set master volume and direct control */
518 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
519 /* setup audio connections */
520 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
521 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
522 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
523 /* setup adcs to point to mixer */
524 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
525 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 526 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
527 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
528 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
529 /* setup import muxs */
530 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
531 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
532 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
533 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
534 {}
535};
536
52fe0f9d
MR		 537static struct hda_verb dell_m6_core_init[] = {
538 /* set master volume and direct control */
539 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
540 /* setup audio connections */
541 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x00},
542 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x01},
543 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
544 /* setup adcs to point to mixer */
545 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
546 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
547 /* setup import muxs */
548 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
549 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
550 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
551 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
552 {}
553};
554
e1f0d669
MR		 555static struct hda_verb stac92hd73xx_8ch_core_init[] = {
556 /* set master volume and direct control */
557 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
558 /* setup audio connections */
559 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
560 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
561 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
562 /* connect hp ports to dac3 */
563 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
564 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
565 /* setup adcs to point to mixer */
566 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
567 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 568 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
569 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
570 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
571 /* setup import muxs */
572 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
573 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
574 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
575 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
576 {}
577};
578
579static struct hda_verb stac92hd73xx_10ch_core_init[] = {
580 /* set master volume and direct control */
581 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
582 /* setup audio connections */
583 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
584 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
585 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
586 /* dac3 is connected to import3 mux */
587 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
588 /* connect hp ports to dac4 */
589 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
590 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
591 /* setup adcs to point to mixer */
592 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
593 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 594 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
595 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
596 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
597 /* setup import muxs */
598 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
599 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
600 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
601 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
602 {}
603};
604
e035b841 605static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 606 /* set master volume and direct control */
607 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
608 /* connect headphone jack to dac1 */
609 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
610 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
611 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
612 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
613 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
614 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 615};
616
617static struct hda_verb stac92hd71bxx_analog_core_init[] = {
e035b841
MR		 618 /* set master volume and direct control */
619 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
620 /* connect headphone jack to dac1 */
621 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
9b35947f
MR		 622 /* connect ports 0d and 0f to audio mixer */
623 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
624 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
a64135a2 625 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
9b35947f
MR		 626 /* unmute dac0 input in audio mixer */
627 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
e035b841
MR		 628 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
629 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
630 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
631 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 632 {}
633};
634
8e21c34c
TD		 635static struct hda_verb stac925x_core_init[] = {
636 /* set dac0mux for dac converter */
637 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
638 {}
639};
640
c7d4b2fa 641static struct hda_verb stac922x_core_init[] = {
2f2f4251 642 /* set master volume and direct control */
c7d4b2fa 643 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 644 {}
645};
646
93ed1503 647static struct hda_verb d965_core_init[] = {
19039bd0 648 /* set master volume and direct control */
93ed1503 649 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 650 /* unmute node 0x1b */
651 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
652 /* select node 0x03 as DAC */
653 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
654 {}
655};
656
3cc08dc6
MP		 657static struct hda_verb stac927x_core_init[] = {
658 /* set master volume and direct control */
659 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
660 {}
661};
662
f3302a59
MP		 663static struct hda_verb stac9205_core_init[] = {
664 /* set master volume and direct control */
665 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
666 {}
667};
668
b22b4821
MR		 669#define STAC_MONO_MUX \
670 { \
671 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
672 .name = "Mono Mux", \
673 .count = 1, \
674 .info = stac92xx_mono_mux_enum_info, \
675 .get = stac92xx_mono_mux_enum_get, \
676 .put = stac92xx_mono_mux_enum_put, \
677 }
678
9e05b7a3 679#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 680 { \
681 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
682 .name = "Input Source", \
9e05b7a3 683 .count = cnt, \
ca7c5a8b
ML		 684 .info = stac92xx_mux_enum_info, \
685 .get = stac92xx_mux_enum_get, \
686 .put = stac92xx_mux_enum_put, \
687 }
688
e1f0d669 689#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 690 { \
691 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
692 .name = "Analog Loopback", \
e1f0d669 693 .count = cnt, \
5f10c4a9
ML		 694 .info = stac92xx_aloopback_info, \
695 .get = stac92xx_aloopback_get, \
696 .put = stac92xx_aloopback_put, \
697 .private_value = verb_read | (verb_write << 16), \
698 }
699
c8b6bf9b 700static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 701 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
702 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 703 STAC_INPUT_SOURCE(1),
2f2f4251
M		 704 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
705 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 706 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 707 { } /* end */
708};
709
e1f0d669 710static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 711 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
712
e1f0d669
MR		 713 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
714 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
715
716 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
717 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
718
719 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
720 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
721
722 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
723 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
724
725 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
726 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
727
728 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
729 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
730
731 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
732 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
733 { } /* end */
734};
735
736static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 737 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
738
e1f0d669
MR		 739 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
740 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
741
742 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
743 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
744
745 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
746 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
747
748 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
749 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
750
751 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
752 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
753
754 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
755 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
756
757 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
758 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
759 { } /* end */
760};
761
762static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 763 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
764
e1f0d669
MR		 765 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
766 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
767
768 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
769 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
770
771 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
772 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
773
774 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
775 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
776
777 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
778 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
779
780 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
781 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
782
783 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
784 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
785 { } /* end */
786};
787
541eee87 788static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 789 STAC_INPUT_SOURCE(2),
e035b841 790
9b35947f
MR		 791 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
792 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
793 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
794
795 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
796 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
797 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 798
9b35947f
MR		 799 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
800 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 801 { } /* end */
802};
803
541eee87 804static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 805 STAC_INPUT_SOURCE(2),
806 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
807
541eee87
MR		 808 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
809 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
810 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
811
812 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
813 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
814 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
815 { } /* end */
816};
817
8e21c34c 818static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 819 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 820 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
821 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
822 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
823 { } /* end */
824};
825
9e05b7a3 826static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 827 STAC_INPUT_SOURCE(2),
e1f0d669 828 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 829
830 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
831 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
832 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
833
834 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
835 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
836 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
837
2f2f4251
M		 838 { } /* end */
839};
840
19039bd0 841/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 842static struct snd_kcontrol_new stac922x_mixer[] = {
843 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 844 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
845 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
846 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
847
848 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
849 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
850 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 851 { } /* end */
852};
853
9e05b7a3 854
d1d985f0 855static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 856 STAC_INPUT_SOURCE(3),
e1f0d669 857 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 858
9e05b7a3
ML		 859 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
860 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
861 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
862
863 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
864 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
865 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
866
867 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
868 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
869 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 870 { } /* end */
871};
872
1697055e
TI		 873static struct snd_kcontrol_new stac_dmux_mixer = {
874 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
875 .name = "Digital Input Source",
876 /* count set later */
877 .info = stac92xx_dmux_enum_info,
878 .get = stac92xx_dmux_enum_get,
879 .put = stac92xx_dmux_enum_put,
880};
881
2134ea4f
TI		 882static const char *slave_vols[] = {
883 "Front Playback Volume",
884 "Surround Playback Volume",
885 "Center Playback Volume",
886 "LFE Playback Volume",
887 "Side Playback Volume",
888 "Headphone Playback Volume",
889 "Headphone Playback Volume",
890 "Speaker Playback Volume",
891 "External Speaker Playback Volume",
892 "Speaker2 Playback Volume",
893 NULL
894};
895
896static const char *slave_sws[] = {
897 "Front Playback Switch",
898 "Surround Playback Switch",
899 "Center Playback Switch",
900 "LFE Playback Switch",
901 "Side Playback Switch",
902 "Headphone Playback Switch",
903 "Headphone Playback Switch",
904 "Speaker Playback Switch",
905 "External Speaker Playback Switch",
906 "Speaker2 Playback Switch",
edb54a55 907 "IEC958 Playback Switch",
2134ea4f
TI		 908 NULL
909};
910
2f2f4251
M		 911static int stac92xx_build_controls(struct hda_codec *codec)
912{
913 struct sigmatel_spec *spec = codec->spec;
914 int err;
c7d4b2fa 915 int i;
2f2f4251
M		 916
917 err = snd_hda_add_new_ctls(codec, spec->mixer);
918 if (err < 0)
919 return err;
c7d4b2fa
M		 920
921 for (i = 0; i < spec->num_mixers; i++) {
922 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
923 if (err < 0)
924 return err;
925 }
1697055e
TI		 926 if (spec->num_dmuxes > 0) {
927 stac_dmux_mixer.count = spec->num_dmuxes;
928 err = snd_ctl_add(codec->bus->card,
929 snd_ctl_new1(&stac_dmux_mixer, codec));
930 if (err < 0)
931 return err;
932 }
c7d4b2fa 933
dabbed6f
M		 934 if (spec->multiout.dig_out_nid) {
935 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
936 if (err < 0)
937 return err;
9a08160b
TI		 938 err = snd_hda_create_spdif_share_sw(codec,
939 &spec->multiout);
940 if (err < 0)
941 return err;
942 spec->multiout.share_spdif = 1;
dabbed6f
M		 943 }
944 if (spec->dig_in_nid) {
945 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
946 if (err < 0)
947 return err;
948 }
2134ea4f
TI		 949
950 /* if we have no master control, let's create it */
951 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 952 unsigned int vmaster_tlv[4];
2134ea4f 953 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 954 HDA_OUTPUT, vmaster_tlv);
2134ea4f 955 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 956 vmaster_tlv, slave_vols);
2134ea4f
TI		 957 if (err < 0)
958 return err;
959 }
960 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
961 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
962 NULL, slave_sws);
963 if (err < 0)
964 return err;
965 }
966
dabbed6f 967 return 0;
2f2f4251
M		 968}
969
403d1944 970static unsigned int ref9200_pin_configs[8] = {
dabbed6f 971 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 972 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
973};
974
dfe495d0
TI		 975/*
976 STAC 9200 pin configs for
977 102801A8
978 102801DE
979 102801E8
980*/
981static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 982 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
983 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 984};
985
986/*
987 STAC 9200 pin configs for
988 102801C0
989 102801C1
990*/
991static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 992 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
993 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 994};
995
996/*
997 STAC 9200 pin configs for
998 102801C4 (Dell Dimension E310)
999 102801C5
1000 102801C7
1001 102801D9
1002 102801DA
1003 102801E3
1004*/
1005static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1006 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1007 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1008};
1009
1010
1011/*
1012 STAC 9200-32 pin configs for
1013 102801B5 (Dell Inspiron 630m)
1014 102801D8 (Dell Inspiron 640m)
1015*/
1016static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1017 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1018 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1019};
1020
1021/*
1022 STAC 9200-32 pin configs for
1023 102801C2 (Dell Latitude D620)
1024 102801C8
1025 102801CC (Dell Latitude D820)
1026 102801D4
1027 102801D6
1028*/
1029static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1030 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1031 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1032};
1033
1034/*
1035 STAC 9200-32 pin configs for
1036 102801CE (Dell XPS M1710)
1037 102801CF (Dell Precision M90)
1038*/
1039static unsigned int dell9200_m23_pin_configs[8] = {
1040 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1041 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1042};
1043
1044/*
1045 STAC 9200-32 pin configs for
1046 102801C9
1047 102801CA
1048 102801CB (Dell Latitude 120L)
1049 102801D3
1050*/
1051static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1052 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1053 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1054};
1055
1056/*
1057 STAC 9200-32 pin configs for
1058 102801BD (Dell Inspiron E1505n)
1059 102801EE
1060 102801EF
1061*/
1062static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1063 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1064 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1065};
1066
1067/*
1068 STAC 9200-32 pin configs for
1069 102801F5 (Dell Inspiron 1501)
1070 102801F6
1071*/
1072static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1073 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1074 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1075};
1076
1077/*
1078 STAC 9200-32
1079 102801CD (Dell Inspiron E1705/9400)
1080*/
1081static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1082 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1083 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1084};
1085
bf277785
TD		 1086static unsigned int oqo9200_pin_configs[8] = {
1087 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1088 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1089};
1090
dfe495d0 1091
f5fcc13c
TI		 1092static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1093 [STAC_REF] = ref9200_pin_configs,
bf277785 1094 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1095 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1096 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1097 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1098 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1099 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1100 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1101 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1102 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1103 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1104 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 1105};
1106
f5fcc13c
TI		 1107static const char *stac9200_models[STAC_9200_MODELS] = {
1108 [STAC_REF] = "ref",
bf277785 1109 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1110 [STAC_9200_DELL_D21] = "dell-d21",
1111 [STAC_9200_DELL_D22] = "dell-d22",
1112 [STAC_9200_DELL_D23] = "dell-d23",
1113 [STAC_9200_DELL_M21] = "dell-m21",
1114 [STAC_9200_DELL_M22] = "dell-m22",
1115 [STAC_9200_DELL_M23] = "dell-m23",
1116 [STAC_9200_DELL_M24] = "dell-m24",
1117 [STAC_9200_DELL_M25] = "dell-m25",
1118 [STAC_9200_DELL_M26] = "dell-m26",
1119 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1120 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 1121};
1122
1123static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1124 /* SigmaTel reference board */
1125 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1126 "DFI LanParty", STAC_REF),
e7377071 1127 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1128 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1129 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1130 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1131 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1132 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1133 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1134 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1135 "unknown Dell", STAC_9200_DELL_D22),
1136 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1137 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1138 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1139 "Dell Latitude D620", STAC_9200_DELL_M22),
1140 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1141 "unknown Dell", STAC_9200_DELL_D23),
1142 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1143 "unknown Dell", STAC_9200_DELL_D23),
1144 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1145 "unknown Dell", STAC_9200_DELL_M22),
1146 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1147 "unknown Dell", STAC_9200_DELL_M24),
1148 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1149 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1150 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1151 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1152 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1153 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1154 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1155 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1156 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1157 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1158 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1159 "Dell Precision M90", STAC_9200_DELL_M23),
1160 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1161 "unknown Dell", STAC_9200_DELL_M22),
1162 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1163 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1164 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1165 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1167 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1169 "unknown Dell", STAC_9200_DELL_D23),
1170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1171 "unknown Dell", STAC_9200_DELL_D23),
1172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1173 "unknown Dell", STAC_9200_DELL_D21),
1174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1175 "unknown Dell", STAC_9200_DELL_D23),
1176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1177 "unknown Dell", STAC_9200_DELL_D21),
1178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1179 "unknown Dell", STAC_9200_DELL_M25),
1180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1181 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1182 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1183 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1184 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1185 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 1186 /* Panasonic */
1187 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 1188 /* Gateway machines needs EAPD to be set on resume */
1189 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1190 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1191 STAC_9200_GATEWAY),
1192 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1193 STAC_9200_GATEWAY),
bf277785
TD		 1194 /* OQO Mobile */
1195 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1196 {} /* terminator */
1197};
1198
8e21c34c
TD		 1199static unsigned int ref925x_pin_configs[8] = {
1200 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1201 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1202};
1203
1204static unsigned int stac925x_MA6_pin_configs[8] = {
1205 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1206 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1207};
1208
2c11f955
TD		 1209static unsigned int stac925x_PA6_pin_configs[8] = {
1210 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1211 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1212};
1213
8e21c34c 1214static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1215 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1216 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1217};
1218
1219static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1220 [STAC_REF] = ref925x_pin_configs,
1221 [STAC_M2_2] = stac925xM2_2_pin_configs,
1222 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1223 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1224};
1225
1226static const char *stac925x_models[STAC_925x_MODELS] = {
1227 [STAC_REF] = "ref",
1228 [STAC_M2_2] = "m2-2",
1229 [STAC_MA6] = "m6",
2c11f955 1230 [STAC_PA6] = "pa6",
8e21c34c
TD		 1231};
1232
1233static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1234 /* SigmaTel reference board */
1235 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1236 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1237 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1238 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1239 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1240 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1241 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1242 {} /* terminator */
1243};
1244
a7662640 1245static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1246 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1247 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1248 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1249 0x01452050,
1250};
1251
1252static unsigned int dell_m6_pin_configs[13] = {
1253 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
1254 0x03a11020, 0x03011050, 0x4f0000f0, 0x4f0000f0,
1255 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1256 0x4f0000f0,
e1f0d669
MR		 1257};
1258
1259static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1260 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1261 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1262};
1263
1264static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1265 [STAC_92HD73XX_REF] = "ref",
a7662640 1266 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1267};
1268
1269static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1270 /* SigmaTel reference board */
1271 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1272 "DFI LanParty", STAC_92HD73XX_REF),
1273 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1274 "unknown Dell", STAC_DELL_M6),
1275 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1276 "unknown Dell", STAC_DELL_M6),
1277 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1278 "unknown Dell", STAC_DELL_M6),
1279 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1280 "unknown Dell", STAC_DELL_M6),
1281 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1282 "unknown Dell", STAC_DELL_M6),
1283 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1284 "unknown Dell", STAC_DELL_M6),
1285 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1286 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1287 {} /* terminator */
1288};
1289
e035b841
MR		 1290static unsigned int ref92hd71bxx_pin_configs[10] = {
1291 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1292 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1293 0x90a000f0, 0x01452050,
1294};
1295
a7662640
MR		 1296static unsigned int dell_m4_1_pin_configs[13] = {
1297 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
1298 0x23a1902e, 0x23014250, 0x40f000f0, 0x4f0000f0,
1299 0x40f000f0, 0x4f0000f0,
1300};
1301
1302static unsigned int dell_m4_2_pin_configs[13] = {
1303 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1304 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
1305 0x40f000f0, 0x044413b0,
1306};
1307
e035b841
MR		 1308static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1309 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1310 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1311 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
e035b841
MR		 1312};
1313
1314static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1315 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1316 [STAC_DELL_M4_1] = "dell-m4-1",
1317 [STAC_DELL_M4_2] = "dell-m4-2",
e035b841
MR		 1318};
1319
1320static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1321 /* SigmaTel reference board */
1322 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1323 "DFI LanParty", STAC_92HD71BXX_REF),
a7662640
MR		 1324 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1325 "unknown Dell", STAC_DELL_M4_1),
1326 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1327 "unknown Dell", STAC_DELL_M4_1),
1328 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1329 "unknown Dell", STAC_DELL_M4_1),
1330 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1331 "unknown Dell", STAC_DELL_M4_1),
1332 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1333 "unknown Dell", STAC_DELL_M4_1),
1334 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1335 "unknown Dell", STAC_DELL_M4_1),
1336 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1337 "unknown Dell", STAC_DELL_M4_1),
1338 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1339 "unknown Dell", STAC_DELL_M4_2),
1340 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1341 "unknown Dell", STAC_DELL_M4_2),
1342 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1343 "unknown Dell", STAC_DELL_M4_2),
1344 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1345 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1346 {} /* terminator */
1347};
1348
403d1944
MP		 1349static unsigned int ref922x_pin_configs[10] = {
1350 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1351 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1352 0x40000100, 0x40000100,
1353};
1354
dfe495d0
TI		 1355/*
1356 STAC 922X pin configs for
1357 102801A7
1358 102801AB
1359 102801A9
1360 102801D1
1361 102801D2
1362*/
1363static unsigned int dell_922x_d81_pin_configs[10] = {
1364 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1365 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1366 0x01813122, 0x400001f2,
1367};
1368
1369/*
1370 STAC 922X pin configs for
1371 102801AC
1372 102801D0
1373*/
1374static unsigned int dell_922x_d82_pin_configs[10] = {
1375 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1376 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1377 0x01813122, 0x400001f1,
1378};
1379
1380/*
1381 STAC 922X pin configs for
1382 102801BF
1383*/
1384static unsigned int dell_922x_m81_pin_configs[10] = {
1385 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1386 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1387 0x40C003f1, 0x405003f0,
1388};
1389
1390/*
1391 STAC 9221 A1 pin configs for
1392 102801D7 (Dell XPS M1210)
1393*/
1394static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1395 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1396 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1397 0x508003f3, 0x405003f4,
1398};
1399
403d1944 1400static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1401 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1402 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1403 0x02a19120, 0x40000100,
1404};
1405
1406static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1407 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1408 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1409 0x02a19320, 0x40000100,
1410};
1411
5d5d3bc3
IZ		 1412static unsigned int intel_mac_v1_pin_configs[10] = {
1413 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1414 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1415 0x400000fc, 0x400000fb,
1416};
1417
1418static unsigned int intel_mac_v2_pin_configs[10] = {
1419 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1420 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1421 0x400000fc, 0x400000fb,
6f0778d8
NB		 1422};
1423
5d5d3bc3
IZ		 1424static unsigned int intel_mac_v3_pin_configs[10] = {
1425 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1426 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1427 0x400000fc, 0x400000fb,
1428};
1429
5d5d3bc3
IZ		 1430static unsigned int intel_mac_v4_pin_configs[10] = {
1431 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1432 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1433 0x400000fc, 0x400000fb,
1434};
1435
5d5d3bc3
IZ		 1436static unsigned int intel_mac_v5_pin_configs[10] = {
1437 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1438 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1439 0x400000fc, 0x400000fb,
0dae0f83
TI		 1440};
1441
76c08828 1442
19039bd0 1443static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1444 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1445 [STAC_D945GTP3] = d945gtp3_pin_configs,
1446 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1447 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1448 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1449 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1450 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1451 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1452 /* for backward compatibility */
5d5d3bc3
IZ		 1453 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1454 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1455 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1456 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1457 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1458 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1459 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1460 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1461 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1462 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1463};
1464
f5fcc13c
TI		 1465static const char *stac922x_models[STAC_922X_MODELS] = {
1466 [STAC_D945_REF] = "ref",
1467 [STAC_D945GTP5] = "5stack",
1468 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1469 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1470 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1471 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1472 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1473 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1474 /* for backward compatibility */
f5fcc13c 1475 [STAC_MACMINI] = "macmini",
3fc24d85 1476 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1477 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1478 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1479 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1480 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1481 [STAC_922X_DELL_D81] = "dell-d81",
1482 [STAC_922X_DELL_D82] = "dell-d82",
1483 [STAC_922X_DELL_M81] = "dell-m81",
1484 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1485};
1486
1487static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1488 /* SigmaTel reference board */
1489 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1490 "DFI LanParty", STAC_D945_REF),
1491 /* Intel 945G based systems */
1492 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1493 "Intel D945G", STAC_D945GTP3),
1494 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1495 "Intel D945G", STAC_D945GTP3),
1496 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1497 "Intel D945G", STAC_D945GTP3),
1498 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1499 "Intel D945G", STAC_D945GTP3),
1500 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1501 "Intel D945G", STAC_D945GTP3),
1502 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1503 "Intel D945G", STAC_D945GTP3),
1504 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1505 "Intel D945G", STAC_D945GTP3),
1506 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1507 "Intel D945G", STAC_D945GTP3),
1508 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1509 "Intel D945G", STAC_D945GTP3),
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1511 "Intel D945G", STAC_D945GTP3),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1513 "Intel D945G", STAC_D945GTP3),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1515 "Intel D945G", STAC_D945GTP3),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1517 "Intel D945G", STAC_D945GTP3),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1519 "Intel D945G", STAC_D945GTP3),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1521 "Intel D945G", STAC_D945GTP3),
1522 /* Intel D945G 5-stack systems */
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1524 "Intel D945G", STAC_D945GTP5),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1526 "Intel D945G", STAC_D945GTP5),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1528 "Intel D945G", STAC_D945GTP5),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1530 "Intel D945G", STAC_D945GTP5),
1531 /* Intel 945P based systems */
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1533 "Intel D945P", STAC_D945GTP3),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1535 "Intel D945P", STAC_D945GTP3),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1537 "Intel D945P", STAC_D945GTP3),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1539 "Intel D945P", STAC_D945GTP3),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1541 "Intel D945P", STAC_D945GTP3),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1543 "Intel D945P", STAC_D945GTP5),
1544 /* other systems */
1545 /* Apple Mac Mini (early 2006) */
1546 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1547 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1548 /* Dell systems */
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1550 "unknown Dell", STAC_922X_DELL_D81),
1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1552 "unknown Dell", STAC_922X_DELL_D81),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1554 "unknown Dell", STAC_922X_DELL_D81),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1556 "unknown Dell", STAC_922X_DELL_D82),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1558 "unknown Dell", STAC_922X_DELL_M81),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1560 "unknown Dell", STAC_922X_DELL_D82),
1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1562 "unknown Dell", STAC_922X_DELL_D81),
1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1564 "unknown Dell", STAC_922X_DELL_D81),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1566 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1567 {} /* terminator */
1568};
1569
3cc08dc6 1570static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1571 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1572 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1573 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1574 0x01c42190, 0x40000100,
3cc08dc6
MP		 1575};
1576
93ed1503 1577static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1578 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1579 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1580 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1581 0x40000100, 0x40000100
1582};
1583
93ed1503
TD		 1584static unsigned int d965_5st_pin_configs[14] = {
1585 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1586 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1587 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1588 0x40000100, 0x40000100
1589};
1590
4ff076e5
TD		 1591static unsigned int dell_3st_pin_configs[14] = {
1592 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1593 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1594 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1595 0x40c003fc, 0x40000100
1596};
1597
93ed1503 1598static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1599 [STAC_D965_REF] = ref927x_pin_configs,
1600 [STAC_D965_3ST] = d965_3st_pin_configs,
1601 [STAC_D965_5ST] = d965_5st_pin_configs,
1602 [STAC_DELL_3ST] = dell_3st_pin_configs,
1603 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1604};
1605
f5fcc13c 1606static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1607 [STAC_D965_REF] = "ref",
1608 [STAC_D965_3ST] = "3stack",
1609 [STAC_D965_5ST] = "5stack",
1610 [STAC_DELL_3ST] = "dell-3stack",
1611 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1612};
1613
1614static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1615 /* SigmaTel reference board */
1616 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1617 "DFI LanParty", STAC_D965_REF),
81d3dbde 1618 /* Intel 946 based systems */
f5fcc13c
TI		 1619 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1620 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1621 /* 965 based 3 stack systems */
f5fcc13c
TI		 1622 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1623 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1624 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1625 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1626 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1627 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1628 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1629 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1630 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1631 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1632 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1633 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1634 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1635 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1636 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1637 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1638 /* Dell 3 stack systems */
8e9068b1 1639 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1640 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1641 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1642 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1643 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1644 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1645 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1
MR		 1646 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1647 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1648 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1649 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1650 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1651 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1652 /* 965 based 5 stack systems */
f5fcc13c
TI		 1653 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1654 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1655 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1656 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1657 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1658 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1659 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1660 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1661 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1662 {} /* terminator */
1663};
1664
f3302a59
MP		 1665static unsigned int ref9205_pin_configs[12] = {
1666 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1667 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1668 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1669};
1670
dfe495d0
TI		 1671/*
1672 STAC 9205 pin configs for
1673 102801F1
1674 102801F2
1675 102801FC
1676 102801FD
1677 10280204
1678 1028021F
3fa2ef74 1679 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1680*/
1681static unsigned int dell_9205_m42_pin_configs[12] = {
1682 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1683 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1684 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1685};
1686
1687/*
1688 STAC 9205 pin configs for
1689 102801F9
1690 102801FA
1691 102801FE
1692 102801FF (Dell Precision M4300)
1693 10280206
1694 10280200
1695 10280201
1696*/
1697static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1698 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1699 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1700 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1701};
1702
dfe495d0 1703static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1704 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1705 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1706 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1707};
1708
f5fcc13c 1709static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1710 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1711 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1712 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1713 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1714};
1715
f5fcc13c
TI		 1716static const char *stac9205_models[STAC_9205_MODELS] = {
1717 [STAC_9205_REF] = "ref",
dfe495d0 1718 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1719 [STAC_9205_DELL_M43] = "dell-m43",
1720 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1721};
1722
1723static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1724 /* SigmaTel reference board */
1725 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1726 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1727 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1728 "unknown Dell", STAC_9205_DELL_M42),
1729 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1730 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1731 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1732 "Dell Precision", STAC_9205_DELL_M43),
1733 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1734 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1735 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1736 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1737 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1738 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1739 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1740 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1741 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1742 "unknown Dell", STAC_9205_DELL_M42),
1743 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1744 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1745 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1746 "Dell Precision", STAC_9205_DELL_M43),
1747 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1748 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1749 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1750 "Dell Precision", STAC_9205_DELL_M43),
1751 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1752 "Dell Inspiron", STAC_9205_DELL_M44),
1753 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1754 "Dell Inspiron", STAC_9205_DELL_M44),
1755 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1756 "Dell Inspiron", STAC_9205_DELL_M44),
1757 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1758 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1759 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1760 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1761 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1762 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1763 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1764 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1765 {} /* terminator */
1766};
1767
11b44bbd
RF		 1768static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1769{
1770 int i;
1771 struct sigmatel_spec *spec = codec->spec;
1772
1773 if (! spec->bios_pin_configs) {
1774 spec->bios_pin_configs = kcalloc(spec->num_pins,
1775 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1776 if (! spec->bios_pin_configs)
1777 return -ENOMEM;
1778 }
1779
1780 for (i = 0; i < spec->num_pins; i++) {
1781 hda_nid_t nid = spec->pin_nids[i];
1782 unsigned int pin_cfg;
1783
1784 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1785 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1786 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1787 nid, pin_cfg);
1788 spec->bios_pin_configs[i] = pin_cfg;
1789 }
1790
1791 return 0;
1792}
1793
87d48363
MR		 1794static void stac92xx_set_config_reg(struct hda_codec *codec,
1795 hda_nid_t pin_nid, unsigned int pin_config)
1796{
1797 int i;
1798 snd_hda_codec_write(codec, pin_nid, 0,
1799 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1800 pin_config & 0x000000ff);
1801 snd_hda_codec_write(codec, pin_nid, 0,
1802 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1803 (pin_config & 0x0000ff00) >> 8);
1804 snd_hda_codec_write(codec, pin_nid, 0,
1805 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1806 (pin_config & 0x00ff0000) >> 16);
1807 snd_hda_codec_write(codec, pin_nid, 0,
1808 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1809 pin_config >> 24);
1810 i = snd_hda_codec_read(codec, pin_nid, 0,
1811 AC_VERB_GET_CONFIG_DEFAULT,
1812 0x00);
1813 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1814 pin_nid, i);
1815}
1816
2f2f4251
M		 1817static void stac92xx_set_config_regs(struct hda_codec *codec)
1818{
1819 int i;
1820 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1821
87d48363
MR		 1822 if (!spec->pin_configs)
1823 return;
11b44bbd 1824
87d48363
MR		 1825 for (i = 0; i < spec->num_pins; i++)
1826 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1827 spec->pin_configs[i]);
2f2f4251 1828}
2f2f4251 1829
dabbed6f 1830/*
c7d4b2fa 1831 * Analog playback callbacks
dabbed6f 1832 */
c7d4b2fa
M		 1833static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1834 struct hda_codec *codec,
c8b6bf9b 1835 struct snd_pcm_substream *substream)
2f2f4251 1836{
dabbed6f 1837 struct sigmatel_spec *spec = codec->spec;
9a08160b
TI		 1838 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
1839 hinfo);
2f2f4251
M		 1840}
1841
2f2f4251
M		 1842static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1843 struct hda_codec *codec,
1844 unsigned int stream_tag,
1845 unsigned int format,
c8b6bf9b 1846 struct snd_pcm_substream *substream)
2f2f4251
M		 1847{
1848 struct sigmatel_spec *spec = codec->spec;
403d1944 1849 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1850}
1851
1852static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1853 struct hda_codec *codec,
c8b6bf9b 1854 struct snd_pcm_substream *substream)
2f2f4251
M		 1855{
1856 struct sigmatel_spec *spec = codec->spec;
1857 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1858}
1859
dabbed6f
M		 1860/*
1861 * Digital playback callbacks
1862 */
1863static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1864 struct hda_codec *codec,
c8b6bf9b 1865 struct snd_pcm_substream *substream)
dabbed6f
M		 1866{
1867 struct sigmatel_spec *spec = codec->spec;
1868 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1869}
1870
1871static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1872 struct hda_codec *codec,
c8b6bf9b 1873 struct snd_pcm_substream *substream)
dabbed6f
M		 1874{
1875 struct sigmatel_spec *spec = codec->spec;
1876 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1877}
1878
6b97eb45
TI		 1879static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1880 struct hda_codec *codec,
1881 unsigned int stream_tag,
1882 unsigned int format,
1883 struct snd_pcm_substream *substream)
1884{
1885 struct sigmatel_spec *spec = codec->spec;
1886 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1887 stream_tag, format, substream);
1888}
1889
dabbed6f 1890
2f2f4251
M		 1891/*
1892 * Analog capture callbacks
1893 */
1894static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1895 struct hda_codec *codec,
1896 unsigned int stream_tag,
1897 unsigned int format,
c8b6bf9b 1898 struct snd_pcm_substream *substream)
2f2f4251
M		 1899{
1900 struct sigmatel_spec *spec = codec->spec;
1901
1902 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1903 stream_tag, 0, format);
1904 return 0;
1905}
1906
1907static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1908 struct hda_codec *codec,
c8b6bf9b 1909 struct snd_pcm_substream *substream)
2f2f4251
M		 1910{
1911 struct sigmatel_spec *spec = codec->spec;
1912
1913 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1914 return 0;
1915}
1916
dabbed6f
M		 1917static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1918 .substreams = 1,
1919 .channels_min = 2,
1920 .channels_max = 2,
1921 /* NID is set in stac92xx_build_pcms */
1922 .ops = {
1923 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1924 .close = stac92xx_dig_playback_pcm_close,
1925 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1926 },
1927};
1928
1929static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1930 .substreams = 1,
1931 .channels_min = 2,
1932 .channels_max = 2,
1933 /* NID is set in stac92xx_build_pcms */
1934};
1935
2f2f4251
M		 1936static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1937 .substreams = 1,
1938 .channels_min = 2,
c7d4b2fa 1939 .channels_max = 8,
2f2f4251
M		 1940 .nid = 0x02, /* NID to query formats and rates */
1941 .ops = {
1942 .open = stac92xx_playback_pcm_open,
1943 .prepare = stac92xx_playback_pcm_prepare,
1944 .cleanup = stac92xx_playback_pcm_cleanup
1945 },
1946};
1947
3cc08dc6
MP		 1948static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1949 .substreams = 1,
1950 .channels_min = 2,
1951 .channels_max = 2,
1952 .nid = 0x06, /* NID to query formats and rates */
1953 .ops = {
1954 .open = stac92xx_playback_pcm_open,
1955 .prepare = stac92xx_playback_pcm_prepare,
1956 .cleanup = stac92xx_playback_pcm_cleanup
1957 },
1958};
1959
2f2f4251 1960static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1961 .channels_min = 2,
1962 .channels_max = 2,
9e05b7a3 1963 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1964 .ops = {
1965 .prepare = stac92xx_capture_pcm_prepare,
1966 .cleanup = stac92xx_capture_pcm_cleanup
1967 },
1968};
1969
1970static int stac92xx_build_pcms(struct hda_codec *codec)
1971{
1972 struct sigmatel_spec *spec = codec->spec;
1973 struct hda_pcm *info = spec->pcm_rec;
1974
1975 codec->num_pcms = 1;
1976 codec->pcm_info = info;
1977
c7d4b2fa 1978 info->name = "STAC92xx Analog";
2f2f4251 1979 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1980 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1981 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1982 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1983
1984 if (spec->alt_switch) {
1985 codec->num_pcms++;
1986 info++;
1987 info->name = "STAC92xx Analog Alt";
1988 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1989 }
2f2f4251 1990
dabbed6f
M		 1991 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1992 codec->num_pcms++;
1993 info++;
1994 info->name = "STAC92xx Digital";
7ba72ba1 1995 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 1996 if (spec->multiout.dig_out_nid) {
1997 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1998 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1999 }
2000 if (spec->dig_in_nid) {
2001 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2002 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2003 }
2004 }
2005
2f2f4251
M		 2006 return 0;
2007}
2008
c960a03b
TI		 2009static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2010{
2011 unsigned int pincap = snd_hda_param_read(codec, nid,
2012 AC_PAR_PIN_CAP);
2013 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2014 if (pincap & AC_PINCAP_VREF_100)
2015 return AC_PINCTL_VREF_100;
2016 if (pincap & AC_PINCAP_VREF_80)
2017 return AC_PINCTL_VREF_80;
2018 if (pincap & AC_PINCAP_VREF_50)
2019 return AC_PINCTL_VREF_50;
2020 if (pincap & AC_PINCAP_VREF_GRD)
2021 return AC_PINCTL_VREF_GRD;
2022 return 0;
2023}
2024
403d1944
MP		 2025static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2026
2027{
82beb8fd
TI		 2028 snd_hda_codec_write_cache(codec, nid, 0,
2029 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2030}
2031
a5ce8890 2032#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2033
2034static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2035{
2036 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2037 struct sigmatel_spec *spec = codec->spec;
2038 int io_idx = kcontrol-> private_value & 0xff;
2039
2040 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2041 return 0;
2042}
2043
2044static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2045{
2046 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2047 struct sigmatel_spec *spec = codec->spec;
2048 hda_nid_t nid = kcontrol->private_value >> 8;
2049 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2050 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2051
2052 spec->io_switch[io_idx] = val;
2053
2054 if (val)
2055 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2056 else {
2057 unsigned int pinctl = AC_PINCTL_IN_EN;
2058 if (io_idx) /* set VREF for mic */
2059 pinctl |= stac92xx_get_vref(codec, nid);
2060 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2061 }
40c1d308
JZ		 2062
2063 /* check the auto-mute again: we need to mute/unmute the speaker
2064 * appropriately according to the pin direction
2065 */
2066 if (spec->hp_detect)
2067 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2068
403d1944
MP		 2069 return 1;
2070}
2071
0fb87bb4
ML		 2072#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2073
2074static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2075 struct snd_ctl_elem_value *ucontrol)
2076{
2077 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2078 struct sigmatel_spec *spec = codec->spec;
2079
2080 ucontrol->value.integer.value[0] = spec->clfe_swap;
2081 return 0;
2082}
2083
2084static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2085 struct snd_ctl_elem_value *ucontrol)
2086{
2087 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2088 struct sigmatel_spec *spec = codec->spec;
2089 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2090 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2091
68ea7b2f 2092 if (spec->clfe_swap == val)
0fb87bb4
ML		 2093 return 0;
2094
68ea7b2f 2095 spec->clfe_swap = val;
0fb87bb4
ML		 2096
2097 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2098 spec->clfe_swap ? 0x4 : 0x0);
2099
2100 return 1;
2101}
2102
403d1944
MP		 2103#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2104 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2105 .name = xname, \
2106 .index = 0, \
2107 .info = stac92xx_io_switch_info, \
2108 .get = stac92xx_io_switch_get, \
2109 .put = stac92xx_io_switch_put, \
2110 .private_value = xpval, \
2111 }
2112
0fb87bb4
ML		 2113#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2114 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2115 .name = xname, \
2116 .index = 0, \
2117 .info = stac92xx_clfe_switch_info, \
2118 .get = stac92xx_clfe_switch_get, \
2119 .put = stac92xx_clfe_switch_put, \
2120 .private_value = xpval, \
2121 }
403d1944 2122
c7d4b2fa
M		 2123enum {
2124 STAC_CTL_WIDGET_VOL,
2125 STAC_CTL_WIDGET_MUTE,
09a99959 2126 STAC_CTL_WIDGET_MONO_MUX,
403d1944 2127 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2128 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2129};
2130
c8b6bf9b 2131static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2132 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2133 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2134 STAC_MONO_MUX,
403d1944 2135 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2136 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2137};
2138
2139/* add dynamic controls */
2140static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2141{
c8b6bf9b 2142 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2143
2144 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2145 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2146
2147 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2148 if (! knew)
2149 return -ENOMEM;
2150 if (spec->kctl_alloc) {
2151 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2152 kfree(spec->kctl_alloc);
2153 }
2154 spec->kctl_alloc = knew;
2155 spec->num_kctl_alloc = num;
2156 }
2157
2158 knew = &spec->kctl_alloc[spec->num_kctl_used];
2159 *knew = stac92xx_control_templates[type];
82fe0c58 2160 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2161 if (! knew->name)
2162 return -ENOMEM;
2163 knew->private_value = val;
2164 spec->num_kctl_used++;
2165 return 0;
2166}
2167
403d1944
MP		 2168/* flag inputs as additional dynamic lineouts */
2169static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2170{
2171 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2172 unsigned int wcaps, wtype;
2173 int i, num_dacs = 0;
2174
2175 /* use the wcaps cache to count all DACs available for line-outs */
2176 for (i = 0; i < codec->num_nodes; i++) {
2177 wcaps = codec->wcaps[i];
2178 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2179
7b043899
SL		 2180 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2181 num_dacs++;
2182 }
403d1944 2183
7b043899
SL		 2184 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2185
403d1944
MP		 2186 switch (cfg->line_outs) {
2187 case 3:
2188 /* add line-in as side */
7b043899 2189 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2190 cfg->line_out_pins[cfg->line_outs] =
2191 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2192 spec->line_switch = 1;
2193 cfg->line_outs++;
2194 }
2195 break;
2196 case 2:
2197 /* add line-in as clfe and mic as side */
7b043899 2198 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2199 cfg->line_out_pins[cfg->line_outs] =
2200 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2201 spec->line_switch = 1;
2202 cfg->line_outs++;
2203 }
7b043899 2204 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2205 cfg->line_out_pins[cfg->line_outs] =
2206 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2207 spec->mic_switch = 1;
2208 cfg->line_outs++;
2209 }
2210 break;
2211 case 1:
2212 /* add line-in as surr and mic as clfe */
7b043899 2213 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2214 cfg->line_out_pins[cfg->line_outs] =
2215 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2216 spec->line_switch = 1;
2217 cfg->line_outs++;
2218 }
7b043899 2219 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2220 cfg->line_out_pins[cfg->line_outs] =
2221 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2222 spec->mic_switch = 1;
2223 cfg->line_outs++;
2224 }
2225 break;
2226 }
2227
2228 return 0;
2229}
2230
7b043899
SL		 2231
2232static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2233{
2234 int i;
2235
2236 for (i = 0; i < spec->multiout.num_dacs; i++) {
2237 if (spec->multiout.dac_nids[i] == nid)
2238 return 1;
2239 }
2240
2241 return 0;
2242}
2243
3cc08dc6 2244/*
7b043899
SL		 2245 * Fill in the dac_nids table from the parsed pin configuration
2246 * This function only works when every pin in line_out_pins[]
2247 * contains atleast one DAC in its connection list. Some 92xx
2248 * codecs are not connected directly to a DAC, such as the 9200
2249 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2250 */
19039bd0 2251static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2252 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2253{
2254 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2255 int i, j, conn_len = 0;
2256 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2257 unsigned int wcaps, wtype;
2258
c7d4b2fa
M		 2259 for (i = 0; i < cfg->line_outs; i++) {
2260 nid = cfg->line_out_pins[i];
7b043899
SL		 2261 conn_len = snd_hda_get_connections(codec, nid, conn,
2262 HDA_MAX_CONNECTIONS);
2263 for (j = 0; j < conn_len; j++) {
2264 wcaps = snd_hda_param_read(codec, conn[j],
2265 AC_PAR_AUDIO_WIDGET_CAP);
2266 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2267 if (wtype != AC_WID_AUD_OUT ||
2268 (wcaps & AC_WCAP_DIGITAL))
2269 continue;
2270 /* conn[j] is a DAC routed to this line-out */
2271 if (!is_in_dac_nids(spec, conn[j]))
2272 break;
2273 }
2274
2275 if (j == conn_len) {
df802952
TI		 2276 if (spec->multiout.num_dacs > 0) {
2277 /* we have already working output pins,
2278 * so let's drop the broken ones again
2279 */
2280 cfg->line_outs = spec->multiout.num_dacs;
2281 break;
2282 }
7b043899
SL		 2283 /* error out, no available DAC found */
2284 snd_printk(KERN_ERR
2285 "%s: No available DAC for pin 0x%x\n",
2286 __func__, nid);
2287 return -ENODEV;
2288 }
2289
2290 spec->multiout.dac_nids[i] = conn[j];
2291 spec->multiout.num_dacs++;
2292 if (conn_len > 1) {
2293 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2294 snd_hda_codec_write_cache(codec, nid, 0,
2295 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2296
7b043899
SL		 2297 }
2298 }
c7d4b2fa 2299
7b043899
SL		 2300 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2301 spec->multiout.num_dacs,
2302 spec->multiout.dac_nids[0],
2303 spec->multiout.dac_nids[1],
2304 spec->multiout.dac_nids[2],
2305 spec->multiout.dac_nids[3],
2306 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2307 return 0;
2308}
2309
eb06ed8f
TI		 2310/* create volume control/switch for the given prefx type */
2311static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2312{
2313 char name[32];
2314 int err;
2315
2316 sprintf(name, "%s Playback Volume", pfx);
2317 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2318 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2319 if (err < 0)
2320 return err;
2321 sprintf(name, "%s Playback Switch", pfx);
2322 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2323 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2324 if (err < 0)
2325 return err;
2326 return 0;
2327}
2328
ae0afd81
MR		 2329static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2330{
2331 if (!spec->multiout.hp_nid)
2332 spec->multiout.hp_nid = nid;
2333 else if (spec->multiout.num_dacs > 4) {
2334 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2335 return 1;
2336 } else {
2337 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2338 spec->multiout.num_dacs++;
2339 }
2340 return 0;
2341}
2342
2343static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2344{
2345 if (is_in_dac_nids(spec, nid))
2346 return 1;
2347 if (spec->multiout.hp_nid == nid)
2348 return 1;
2349 return 0;
2350}
2351
c7d4b2fa 2352/* add playback controls from the parsed DAC table */
0fb87bb4 2353static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2354 const struct auto_pin_cfg *cfg)
c7d4b2fa 2355{
19039bd0
TI		 2356 static const char *chname[4] = {
2357 "Front", "Surround", NULL /*CLFE*/, "Side"
2358 };
c7d4b2fa
M		 2359 hda_nid_t nid;
2360 int i, err;
2361
0fb87bb4 2362 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2363 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2364
2365
40ac8c4f 2366 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2367 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2368 continue;
2369
2370 nid = spec->multiout.dac_nids[i];
2371
2372 if (i == 2) {
2373 /* Center/LFE */
eb06ed8f
TI		 2374 err = create_controls(spec, "Center", nid, 1);
2375 if (err < 0)
c7d4b2fa 2376 return err;
eb06ed8f
TI		 2377 err = create_controls(spec, "LFE", nid, 2);
2378 if (err < 0)
c7d4b2fa 2379 return err;
0fb87bb4
ML		 2380
2381 wid_caps = get_wcaps(codec, nid);
2382
2383 if (wid_caps & AC_WCAP_LR_SWAP) {
2384 err = stac92xx_add_control(spec,
2385 STAC_CTL_WIDGET_CLFE_SWITCH,
2386 "Swap Center/LFE Playback Switch", nid);
2387
2388 if (err < 0)
2389 return err;
2390 }
2391
c7d4b2fa 2392 } else {
eb06ed8f
TI		 2393 err = create_controls(spec, chname[i], nid, 3);
2394 if (err < 0)
c7d4b2fa
M		 2395 return err;
2396 }
2397 }
2398
b5895dc8
MR		 2399 if (spec->line_switch) {
2400 nid = cfg->input_pins[AUTO_PIN_LINE];
2401 pincap = snd_hda_param_read(codec, nid,
2402 AC_PAR_PIN_CAP);
2403 if (pincap & AC_PINCAP_OUT) {
2404 err = stac92xx_add_control(spec,
2405 STAC_CTL_WIDGET_IO_SWITCH,
2406 "Line In as Output Switch", nid << 8);
2407 if (err < 0)
2408 return err;
2409 }
2410 }
403d1944 2411
b5895dc8 2412 if (spec->mic_switch) {
cace16f1 2413 unsigned int def_conf;
ae0afd81
MR		 2414 unsigned int mic_pin = AUTO_PIN_MIC;
2415again:
2416 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2417 def_conf = snd_hda_codec_read(codec, nid, 0,
2418 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2419 /* some laptops have an internal analog microphone
2420 * which can't be used as a output */
2421 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2422 pincap = snd_hda_param_read(codec, nid,
2423 AC_PAR_PIN_CAP);
2424 if (pincap & AC_PINCAP_OUT) {
2425 err = stac92xx_add_control(spec,
2426 STAC_CTL_WIDGET_IO_SWITCH,
2427 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2428 nid = snd_hda_codec_read(codec, nid, 0,
2429 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2430 if (!check_in_dac_nids(spec, nid))
2431 add_spec_dacs(spec, nid);
cace16f1
MR		 2432 if (err < 0)
2433 return err;
2434 }
ae0afd81
MR		 2435 } else if (mic_pin == AUTO_PIN_MIC) {
2436 mic_pin = AUTO_PIN_FRONT_MIC;
2437 goto again;
b5895dc8
MR		 2438 }
2439 }
403d1944 2440
c7d4b2fa
M		 2441 return 0;
2442}
2443
eb06ed8f
TI		 2444/* add playback controls for Speaker and HP outputs */
2445static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2446 struct auto_pin_cfg *cfg)
2447{
2448 struct sigmatel_spec *spec = codec->spec;
2449 hda_nid_t nid;
2450 int i, old_num_dacs, err;
2451
2452 old_num_dacs = spec->multiout.num_dacs;
2453 for (i = 0; i < cfg->hp_outs; i++) {
2454 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2455 if (wid_caps & AC_WCAP_UNSOL_CAP)
2456 spec->hp_detect = 1;
2457 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2458 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2459 if (check_in_dac_nids(spec, nid))
2460 nid = 0;
2461 if (! nid)
c7d4b2fa 2462 continue;
eb06ed8f
TI		 2463 add_spec_dacs(spec, nid);
2464 }
2465 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2466 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2467 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2468 if (check_in_dac_nids(spec, nid))
2469 nid = 0;
eb06ed8f
TI		 2470 if (! nid)
2471 continue;
2472 add_spec_dacs(spec, nid);
c7d4b2fa 2473 }
1b290a51
MR		 2474 for (i = 0; i < cfg->line_outs; i++) {
2475 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2476 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2477 if (check_in_dac_nids(spec, nid))
2478 nid = 0;
2479 if (! nid)
2480 continue;
2481 add_spec_dacs(spec, nid);
2482 }
eb06ed8f
TI		 2483 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2484 static const char *pfxs[] = {
2485 "Speaker", "External Speaker", "Speaker2",
2486 };
2487 err = create_controls(spec, pfxs[i - old_num_dacs],
2488 spec->multiout.dac_nids[i], 3);
2489 if (err < 0)
2490 return err;
2491 }
2492 if (spec->multiout.hp_nid) {
2493 const char *pfx;
6020c008 2494 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 2495 pfx = "Master";
2496 else
2497 pfx = "Headphone";
2498 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
2499 if (err < 0)
2500 return err;
2501 }
c7d4b2fa
M		 2502
2503 return 0;
2504}
2505
b22b4821
MR		 2506/* labels for mono mux outputs */
2507static const char *stac92xx_mono_labels[3] = {
2508 "DAC0", "DAC1", "Mixer"
2509};
2510
2511/* create mono mux for mono out on capable codecs */
2512static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2513{
2514 struct sigmatel_spec *spec = codec->spec;
2515 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2516 int i, num_cons;
2517 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2518
2519 num_cons = snd_hda_get_connections(codec,
2520 spec->mono_nid,
2521 con_lst,
2522 HDA_MAX_NUM_INPUTS);
2523 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2524 return -EINVAL;
2525
2526 for (i = 0; i < num_cons; i++) {
2527 mono_mux->items[mono_mux->num_items].label =
2528 stac92xx_mono_labels[i];
2529 mono_mux->items[mono_mux->num_items].index = i;
2530 mono_mux->num_items++;
2531 }
09a99959
MR		 2532
2533 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2534 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2535}
2536
8b65727b 2537/* labels for dmic mux inputs */
ddc2cec4 2538static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2539 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2540 "Digital Mic 3", "Digital Mic 4"
2541};
2542
2543/* create playback/capture controls for input pins on dmic capable codecs */
2544static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2545 const struct auto_pin_cfg *cfg)
2546{
2547 struct sigmatel_spec *spec = codec->spec;
2548 struct hda_input_mux *dimux = &spec->private_dimux;
2549 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2550 int err, i, j;
2551 char name[32];
8b65727b
MP		 2552
2553 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2554 dimux->items[dimux->num_items].index = 0;
2555 dimux->num_items++;
2556
2557 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2558 hda_nid_t nid;
8b65727b
MP		 2559 int index;
2560 int num_cons;
0678accd 2561 unsigned int wcaps;
8b65727b
MP		 2562 unsigned int def_conf;
2563
2564 def_conf = snd_hda_codec_read(codec,
2565 spec->dmic_nids[i],
2566 0,
2567 AC_VERB_GET_CONFIG_DEFAULT,
2568 0);
2569 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2570 continue;
2571
0678accd 2572 nid = spec->dmic_nids[i];
8b65727b 2573 num_cons = snd_hda_get_connections(codec,
e1f0d669 2574 spec->dmux_nids[0],
8b65727b
MP		 2575 con_lst,
2576 HDA_MAX_NUM_INPUTS);
2577 for (j = 0; j < num_cons; j++)
0678accd 2578 if (con_lst[j] == nid) {
8b65727b
MP		 2579 index = j;
2580 goto found;
2581 }
2582 continue;
2583found:
0678accd
MR		 2584 wcaps = get_wcaps(codec, nid);
2585
2586 if (wcaps & AC_WCAP_OUT_AMP) {
2587 sprintf(name, "%s Capture Volume",
2588 stac92xx_dmic_labels[dimux->num_items]);
2589
2590 err = stac92xx_add_control(spec,
2591 STAC_CTL_WIDGET_VOL,
2592 name,
2593 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2594 if (err < 0)
2595 return err;
2596 }
2597
8b65727b
MP		 2598 dimux->items[dimux->num_items].label =
2599 stac92xx_dmic_labels[dimux->num_items];
2600 dimux->items[dimux->num_items].index = index;
2601 dimux->num_items++;
2602 }
2603
2604 return 0;
2605}
2606
c7d4b2fa
M		 2607/* create playback/capture controls for input pins */
2608static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2609{
2610 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2611 struct hda_input_mux *imux = &spec->private_imux;
2612 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2613 int i, j, k;
2614
2615 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2616 int index;
2617
2618 if (!cfg->input_pins[i])
2619 continue;
2620 index = -1;
2621 for (j = 0; j < spec->num_muxes; j++) {
2622 int num_cons;
2623 num_cons = snd_hda_get_connections(codec,
2624 spec->mux_nids[j],
2625 con_lst,
2626 HDA_MAX_NUM_INPUTS);
2627 for (k = 0; k < num_cons; k++)
2628 if (con_lst[k] == cfg->input_pins[i]) {
2629 index = k;
2630 goto found;
2631 }
c7d4b2fa 2632 }
314634bc
TI		 2633 continue;
2634 found:
2635 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2636 imux->items[imux->num_items].index = index;
2637 imux->num_items++;
c7d4b2fa
M		 2638 }
2639
7b043899 2640 if (imux->num_items) {
62fe78e9
SR		 2641 /*
2642 * Set the current input for the muxes.
2643 * The STAC9221 has two input muxes with identical source
2644 * NID lists. Hopefully this won't get confused.
2645 */
2646 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2647 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2648 AC_VERB_SET_CONNECT_SEL,
2649 imux->items[0].index);
62fe78e9
SR		 2650 }
2651 }
2652
c7d4b2fa
M		 2653 return 0;
2654}
2655
c7d4b2fa
M		 2656static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2657{
2658 struct sigmatel_spec *spec = codec->spec;
2659 int i;
2660
2661 for (i = 0; i < spec->autocfg.line_outs; i++) {
2662 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2663 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2664 }
2665}
2666
2667static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2668{
2669 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2670 int i;
c7d4b2fa 2671
eb06ed8f
TI		 2672 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2673 hda_nid_t pin;
2674 pin = spec->autocfg.hp_pins[i];
2675 if (pin) /* connect to front */
2676 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2677 }
2678 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2679 hda_nid_t pin;
2680 pin = spec->autocfg.speaker_pins[i];
2681 if (pin) /* connect to front */
2682 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2683 }
c7d4b2fa
M		 2684}
2685
3cc08dc6 2686static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2687{
2688 struct sigmatel_spec *spec = codec->spec;
2689 int err;
bcecd9bd 2690 int hp_speaker_swap = 0;
c7d4b2fa 2691
8b65727b
MP		 2692 if ((err = snd_hda_parse_pin_def_config(codec,
2693 &spec->autocfg,
2694 spec->dmic_nids)) < 0)
c7d4b2fa 2695 return err;
82bc955f 2696 if (! spec->autocfg.line_outs)
869264c4 2697 return 0; /* can't find valid pin config */
19039bd0 2698
bcecd9bd
JZ		 2699 /* If we have no real line-out pin and multiple hp-outs, HPs should
2700 * be set up as multi-channel outputs.
2701 */
2702 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2703 spec->autocfg.hp_outs > 1) {
2704 /* Copy hp_outs to line_outs, backup line_outs in
2705 * speaker_outs so that the following routines can handle
2706 * HP pins as primary outputs.
2707 */
2708 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2709 sizeof(spec->autocfg.line_out_pins));
2710 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2711 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2712 sizeof(spec->autocfg.hp_pins));
2713 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2714 hp_speaker_swap = 1;
2715 }
09a99959
MR		 2716 if (spec->autocfg.mono_out_pin) {
2717 int dir = (get_wcaps(codec, spec->autocfg.mono_out_pin)
2718 & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
2719 u32 caps = query_amp_caps(codec,
2720 spec->autocfg.mono_out_pin, dir);
2721 hda_nid_t conn_list[1];
2722
2723 /* get the mixer node and then the mono mux if it exists */
2724 if (snd_hda_get_connections(codec,
2725 spec->autocfg.mono_out_pin, conn_list, 1) &&
2726 snd_hda_get_connections(codec, conn_list[0],
2727 conn_list, 1)) {
2728
2729 int wcaps = get_wcaps(codec, conn_list[0]);
2730 int wid_type = (wcaps & AC_WCAP_TYPE)
2731 >> AC_WCAP_TYPE_SHIFT;
2732 /* LR swap check, some stac925x have a mux that
2733 * changes the DACs output path instead of the
2734 * mono-mux path.
2735 */
2736 if (wid_type == AC_WID_AUD_SEL &&
2737 !(wcaps & AC_WCAP_LR_SWAP))
2738 spec->mono_nid = conn_list[0];
2739 }
2740 /* all mono outs have a least a mute/unmute switch */
2741 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2742 "Mono Playback Switch",
2743 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2744 1, 0, dir));
2745 if (err < 0)
2746 return err;
2747 /* check to see if there is volume support for the amp */
2748 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2749 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2750 "Mono Playback Volume",
2751 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2752 1, 0, dir));
2753 if (err < 0)
2754 return err;
2755 }
2756
2757 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
2758 AC_PINCTL_OUT_EN);
2759 }
bcecd9bd 2760
403d1944
MP		 2761 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2762 return err;
19039bd0
TI		 2763 if (spec->multiout.num_dacs == 0)
2764 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2765 return err;
c7d4b2fa 2766
0fb87bb4
ML		 2767 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2768
2769 if (err < 0)
2770 return err;
2771
bcecd9bd
JZ		 2772 if (hp_speaker_swap == 1) {
2773 /* Restore the hp_outs and line_outs */
2774 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2775 sizeof(spec->autocfg.line_out_pins));
2776 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2777 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2778 sizeof(spec->autocfg.speaker_pins));
2779 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2780 memset(spec->autocfg.speaker_pins, 0,
2781 sizeof(spec->autocfg.speaker_pins));
2782 spec->autocfg.speaker_outs = 0;
2783 }
2784
0fb87bb4
ML		 2785 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2786
2787 if (err < 0)
2788 return err;
2789
2790 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2791
2792 if (err < 0)
c7d4b2fa
M		 2793 return err;
2794
b22b4821
MR		 2795 if (spec->mono_nid > 0) {
2796 err = stac92xx_auto_create_mono_output_ctls(codec);
2797 if (err < 0)
2798 return err;
2799 }
2800
8b65727b
MP		 2801 if (spec->num_dmics > 0)
2802 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2803 &spec->autocfg)) < 0)
2804 return err;
2805
c7d4b2fa 2806 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2807 if (spec->multiout.max_channels > 2)
c7d4b2fa 2808 spec->surr_switch = 1;
c7d4b2fa 2809
82bc955f 2810 if (spec->autocfg.dig_out_pin)
3cc08dc6 2811 spec->multiout.dig_out_nid = dig_out;
82bc955f 2812 if (spec->autocfg.dig_in_pin)
3cc08dc6 2813 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2814
2815 if (spec->kctl_alloc)
2816 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2817
2818 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2819 if (!spec->dinput_mux)
2820 spec->dinput_mux = &spec->private_dimux;
b22b4821 2821 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 2822
2823 return 1;
2824}
2825
82bc955f
TI		 2826/* add playback controls for HP output */
2827static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2828 struct auto_pin_cfg *cfg)
2829{
2830 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2831 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2832 unsigned int wid_caps;
2833
2834 if (! pin)
2835 return 0;
2836
2837 wid_caps = get_wcaps(codec, pin);
505cb341 2838 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2839 spec->hp_detect = 1;
82bc955f
TI		 2840
2841 return 0;
2842}
2843
160ea0dc
RF		 2844/* add playback controls for LFE output */
2845static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2846 struct auto_pin_cfg *cfg)
2847{
2848 struct sigmatel_spec *spec = codec->spec;
2849 int err;
2850 hda_nid_t lfe_pin = 0x0;
2851 int i;
2852
2853 /*
2854 * search speaker outs and line outs for a mono speaker pin
2855 * with an amp. If one is found, add LFE controls
2856 * for it.
2857 */
2858 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2859 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 2860 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 2861 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2862 if (wcaps == AC_WCAP_OUT_AMP)
2863 /* found a mono speaker with an amp, must be lfe */
2864 lfe_pin = pin;
2865 }
2866
2867 /* if speaker_outs is 0, then speakers may be in line_outs */
2868 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2869 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2870 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 2871 unsigned int defcfg;
8b551785 2872 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 2873 AC_VERB_GET_CONFIG_DEFAULT,
2874 0x00);
8b551785 2875 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 2876 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 2877 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2878 if (wcaps == AC_WCAP_OUT_AMP)
2879 /* found a mono speaker with an amp,
2880 must be lfe */
2881 lfe_pin = pin;
2882 }
2883 }
2884 }
2885
2886 if (lfe_pin) {
eb06ed8f 2887 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2888 if (err < 0)
2889 return err;
2890 }
2891
2892 return 0;
2893}
2894
c7d4b2fa
M		 2895static int stac9200_parse_auto_config(struct hda_codec *codec)
2896{
2897 struct sigmatel_spec *spec = codec->spec;
2898 int err;
2899
df694daa 2900 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2901 return err;
2902
2903 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2904 return err;
2905
82bc955f
TI		 2906 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2907 return err;
2908
160ea0dc
RF		 2909 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2910 return err;
2911
82bc955f 2912 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2913 spec->multiout.dig_out_nid = 0x05;
82bc955f 2914 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2915 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2916
2917 if (spec->kctl_alloc)
2918 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2919
2920 spec->input_mux = &spec->private_imux;
8b65727b 2921 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2922
2923 return 1;
2924}
2925
62fe78e9
SR		 2926/*
2927 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2928 * funky external mute control using GPIO pins.
2929 */
2930
76e1ddfb 2931static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 2932 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 2933{
2934 unsigned int gpiostate, gpiomask, gpiodir;
2935
2936 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2937 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 2938 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 2939
2940 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2941 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 2942 gpiomask |= mask;
62fe78e9
SR		 2943
2944 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2945 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 2946 gpiodir |= dir_mask;
62fe78e9 2947
76e1ddfb 2948 /* Configure GPIOx as CMOS */
62fe78e9
SR		 2949 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2950
2951 snd_hda_codec_write(codec, codec->afg, 0,
2952 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 2953 snd_hda_codec_read(codec, codec->afg, 0,
2954 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 2955
2956 msleep(1);
2957
76e1ddfb
TI		 2958 snd_hda_codec_read(codec, codec->afg, 0,
2959 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 2960}
2961
314634bc
TI		 2962static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2963 unsigned int event)
2964{
2965 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2966 snd_hda_codec_write_cache(codec, nid, 0,
2967 AC_VERB_SET_UNSOLICITED_ENABLE,
2968 (AC_USRSP_EN | event));
314634bc
TI		 2969}
2970
a64135a2
MR		 2971static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
2972{
2973 int i;
2974 for (i = 0; i < cfg->hp_outs; i++)
2975 if (cfg->hp_pins[i] == nid)
2976 return 1; /* nid is a HP-Out */
2977
2978 return 0; /* nid is not a HP-Out */
2979};
2980
b76c850f
MR		 2981static void stac92xx_power_down(struct hda_codec *codec)
2982{
2983 struct sigmatel_spec *spec = codec->spec;
2984
2985 /* power down inactive DACs */
2986 hda_nid_t *dac;
2987 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 2988 if (!is_in_dac_nids(spec, *dac) &&
2989 spec->multiout.hp_nid != *dac)
b76c850f
MR		 2990 snd_hda_codec_write_cache(codec, *dac, 0,
2991 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2992}
2993
c7d4b2fa
M		 2994static int stac92xx_init(struct hda_codec *codec)
2995{
2996 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2997 struct auto_pin_cfg *cfg = &spec->autocfg;
2998 int i;
c7d4b2fa 2999
c7d4b2fa
M		 3000 snd_hda_sequence_write(codec, spec->init);
3001
82bc955f
TI		 3002 /* set up pins */
3003 if (spec->hp_detect) {
505cb341 3004 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3005 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3006 enable_pin_detect(codec, cfg->hp_pins[i],
3007 STAC_HP_EVENT);
0a07acaf
TI		 3008 /* force to enable the first line-out; the others are set up
3009 * in unsol_event
3010 */
3011 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3012 AC_PINCTL_OUT_EN);
eb995a8c 3013 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3014 /* fake event to set up pins */
3015 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3016 } else {
3017 stac92xx_auto_init_multi_out(codec);
3018 stac92xx_auto_init_hp_out(codec);
3019 }
3020 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3021 hda_nid_t nid = cfg->input_pins[i];
3022 if (nid) {
3023 unsigned int pinctl = AC_PINCTL_IN_EN;
3024 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3025 pinctl |= stac92xx_get_vref(codec, nid);
3026 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3027 }
82bc955f 3028 }
a64135a2
MR		 3029 for (i = 0; i < spec->num_dmics; i++)
3030 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3031 AC_PINCTL_IN_EN);
3032 for (i = 0; i < spec->num_pwrs; i++) {
3033 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3034 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3035 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3036 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3037 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3038 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
a64135a2
MR		 3039 /* outputs are only ports capable of power management
3040 * any attempts on powering down a input port cause the
3041 * referenced VREF to act quirky.
3042 */
3043 if (pinctl & AC_PINCTL_IN_EN)
3044 continue;
bce6c2b5
MR		 3045 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED)
3046 continue;
a64135a2
MR		 3047 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3048 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3049 }
b76c850f
MR		 3050 if (spec->dac_list)
3051 stac92xx_power_down(codec);
82bc955f
TI		 3052 if (cfg->dig_out_pin)
3053 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3054 AC_PINCTL_OUT_EN);
3055 if (cfg->dig_in_pin)
3056 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3057 AC_PINCTL_IN_EN);
3058
4fe5195c
MR		 3059 stac_gpio_set(codec, spec->gpio_mask,
3060 spec->gpio_dir, spec->gpio_data);
62fe78e9 3061
c7d4b2fa
M		 3062 return 0;
3063}
3064
2f2f4251
M		 3065static void stac92xx_free(struct hda_codec *codec)
3066{
c7d4b2fa
M		 3067 struct sigmatel_spec *spec = codec->spec;
3068 int i;
3069
3070 if (! spec)
3071 return;
3072
3073 if (spec->kctl_alloc) {
3074 for (i = 0; i < spec->num_kctl_used; i++)
3075 kfree(spec->kctl_alloc[i].name);
3076 kfree(spec->kctl_alloc);
3077 }
3078
11b44bbd
RF		 3079 if (spec->bios_pin_configs)
3080 kfree(spec->bios_pin_configs);
3081
c7d4b2fa 3082 kfree(spec);
2f2f4251
M		 3083}
3084
4e55096e
M		 3085static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3086 unsigned int flag)
3087{
3088 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3089 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3090
f9acba43
TI		 3091 if (pin_ctl & AC_PINCTL_IN_EN) {
3092 /*
3093 * we need to check the current set-up direction of
3094 * shared input pins since they can be switched via
3095 * "xxx as Output" mixer switch
3096 */
3097 struct sigmatel_spec *spec = codec->spec;
3098 struct auto_pin_cfg *cfg = &spec->autocfg;
3099 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3100 spec->line_switch) ||
3101 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3102 spec->mic_switch))
3103 return;
3104 }
3105
7b043899
SL		 3106 /* if setting pin direction bits, clear the current
3107 direction bits first */
3108 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3109 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3110
82beb8fd 3111 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3112 AC_VERB_SET_PIN_WIDGET_CONTROL,
3113 pin_ctl | flag);
3114}
3115
3116static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3117 unsigned int flag)
3118{
3119 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3120 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3121 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3122 AC_VERB_SET_PIN_WIDGET_CONTROL,
3123 pin_ctl & ~flag);
3124}
3125
40c1d308 3126static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3127{
3128 if (!nid)
3129 return 0;
3130 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3131 & (1 << 31)) {
3132 unsigned int pinctl;
3133 pinctl = snd_hda_codec_read(codec, nid, 0,
3134 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3135 if (pinctl & AC_PINCTL_IN_EN)
3136 return 0; /* mic- or line-input */
3137 else
3138 return 1; /* HP-output */
3139 }
314634bc
TI		 3140 return 0;
3141}
3142
3143static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3144{
3145 struct sigmatel_spec *spec = codec->spec;
3146 struct auto_pin_cfg *cfg = &spec->autocfg;
3147 int i, presence;
3148
eb06ed8f 3149 presence = 0;
4fe5195c
MR		 3150 if (spec->gpio_mute)
3151 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3152 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3153
eb06ed8f 3154 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3155 if (presence)
3156 break;
4fe5195c 3157 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3158 }
4e55096e
M		 3159
3160 if (presence) {
3161 /* disable lineouts, enable hp */
3162 for (i = 0; i < cfg->line_outs; i++)
3163 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3164 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3165 for (i = 0; i < cfg->speaker_outs; i++)
3166 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3167 AC_PINCTL_OUT_EN);
4e55096e
M		 3168 } else {
3169 /* enable lineouts, disable hp */
3170 for (i = 0; i < cfg->line_outs; i++)
3171 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3172 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3173 for (i = 0; i < cfg->speaker_outs; i++)
3174 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3175 AC_PINCTL_OUT_EN);
4e55096e
M		 3176 }
3177}
3178
a64135a2
MR		 3179static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3180{
3181 struct sigmatel_spec *spec = codec->spec;
3182 hda_nid_t nid = spec->pwr_nids[idx];
3183 int presence, val;
3184 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3185 & 0x000000ff;
3186 presence = get_hp_pin_presence(codec, nid);
3187 idx = 1 << idx;
3188
3189 if (presence)
3190 val &= ~idx;
3191 else
3192 val |= idx;
3193
3194 /* power down unused output ports */
3195 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3196};
3197
314634bc
TI		 3198static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3199{
a64135a2
MR		 3200 struct sigmatel_spec *spec = codec->spec;
3201 int idx = res >> 26 & 0x0f;
3202
3203 switch ((res >> 26) & 0x30) {
314634bc
TI		 3204 case STAC_HP_EVENT:
3205 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3206 /* fallthru */
3207 case STAC_PWR_EVENT:
3208 if (spec->num_pwrs > 0)
3209 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3210 }
3211}
3212
cb53c626 3213#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3214static int stac92xx_resume(struct hda_codec *codec)
3215{
dc81bed1
TI		 3216 struct sigmatel_spec *spec = codec->spec;
3217
11b44bbd 3218 stac92xx_set_config_regs(codec);
dc81bed1 3219 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3220 stac_gpio_set(codec, spec->gpio_mask,
3221 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3222 snd_hda_codec_resume_amp(codec);
3223 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3224 /* power down inactive DACs */
3225 if (spec->dac_list)
3226 stac92xx_power_down(codec);
dc81bed1
TI		 3227 /* invoke unsolicited event to reset the HP state */
3228 if (spec->hp_detect)
3229 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3230 return 0;
3231}
3232#endif
3233
2f2f4251
M		 3234static struct hda_codec_ops stac92xx_patch_ops = {
3235 .build_controls = stac92xx_build_controls,
3236 .build_pcms = stac92xx_build_pcms,
3237 .init = stac92xx_init,
3238 .free = stac92xx_free,
4e55096e 3239 .unsol_event = stac92xx_unsol_event,
cb53c626 3240#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3241 .resume = stac92xx_resume,
3242#endif
2f2f4251
M		 3243};
3244
3245static int patch_stac9200(struct hda_codec *codec)
3246{
3247 struct sigmatel_spec *spec;
c7d4b2fa 3248 int err;
2f2f4251 3249
e560d8d8 3250 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3251 if (spec == NULL)
3252 return -ENOMEM;
3253
3254 codec->spec = spec;
a4eed138 3255 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3256 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3257 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3258 stac9200_models,
3259 stac9200_cfg_tbl);
11b44bbd
RF		 3260 if (spec->board_config < 0) {
3261 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3262 err = stac92xx_save_bios_config_regs(codec);
3263 if (err < 0) {
3264 stac92xx_free(codec);
3265 return err;
3266 }
3267 spec->pin_configs = spec->bios_pin_configs;
3268 } else {
403d1944
MP		 3269 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3270 stac92xx_set_config_regs(codec);
3271 }
2f2f4251
M		 3272
3273 spec->multiout.max_channels = 2;
3274 spec->multiout.num_dacs = 1;
3275 spec->multiout.dac_nids = stac9200_dac_nids;
3276 spec->adc_nids = stac9200_adc_nids;
3277 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3278 spec->num_muxes = 1;
8b65727b 3279 spec->num_dmics = 0;
9e05b7a3 3280 spec->num_adcs = 1;
a64135a2 3281 spec->num_pwrs = 0;
c7d4b2fa 3282
bf277785
TD		 3283 if (spec->board_config == STAC_9200_GATEWAY ||
3284 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3285 spec->init = stac9200_eapd_init;
3286 else
3287 spec->init = stac9200_core_init;
2f2f4251 3288 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 3289
3290 err = stac9200_parse_auto_config(codec);
3291 if (err < 0) {
3292 stac92xx_free(codec);
3293 return err;
3294 }
2f2f4251
M		 3295
3296 codec->patch_ops = stac92xx_patch_ops;
3297
3298 return 0;
3299}
3300
8e21c34c
TD		 3301static int patch_stac925x(struct hda_codec *codec)
3302{
3303 struct sigmatel_spec *spec;
3304 int err;
3305
3306 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3307 if (spec == NULL)
3308 return -ENOMEM;
3309
3310 codec->spec = spec;
a4eed138 3311 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3312 spec->pin_nids = stac925x_pin_nids;
3313 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3314 stac925x_models,
3315 stac925x_cfg_tbl);
9e507abd 3316 again:
8e21c34c 3317 if (spec->board_config < 0) {
2c11f955
TD		 3318 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3319 "using BIOS defaults\n");
8e21c34c
TD		 3320 err = stac92xx_save_bios_config_regs(codec);
3321 if (err < 0) {
3322 stac92xx_free(codec);
3323 return err;
3324 }
3325 spec->pin_configs = spec->bios_pin_configs;
3326 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3327 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3328 stac92xx_set_config_regs(codec);
3329 }
3330
3331 spec->multiout.max_channels = 2;
3332 spec->multiout.num_dacs = 1;
3333 spec->multiout.dac_nids = stac925x_dac_nids;
3334 spec->adc_nids = stac925x_adc_nids;
3335 spec->mux_nids = stac925x_mux_nids;
3336 spec->num_muxes = 1;
9e05b7a3 3337 spec->num_adcs = 1;
a64135a2 3338 spec->num_pwrs = 0;
2c11f955
TD		 3339 switch (codec->vendor_id) {
3340 case 0x83847632: /* STAC9202 */
3341 case 0x83847633: /* STAC9202D */
3342 case 0x83847636: /* STAC9251 */
3343 case 0x83847637: /* STAC9251D */
f6e9852a 3344 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3345 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3346 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3347 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3348 break;
3349 default:
3350 spec->num_dmics = 0;
3351 break;
3352 }
8e21c34c
TD		 3353
3354 spec->init = stac925x_core_init;
3355 spec->mixer = stac925x_mixer;
3356
3357 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3358 if (!err) {
3359 if (spec->board_config < 0) {
3360 printk(KERN_WARNING "hda_codec: No auto-config is "
3361 "available, default to model=ref\n");
3362 spec->board_config = STAC_925x_REF;
3363 goto again;
3364 }
3365 err = -EINVAL;
3366 }
8e21c34c
TD		 3367 if (err < 0) {
3368 stac92xx_free(codec);
3369 return err;
3370 }
3371
3372 codec->patch_ops = stac92xx_patch_ops;
3373
3374 return 0;
3375}
3376
e1f0d669
MR		 3377static struct hda_input_mux stac92hd73xx_dmux = {
3378 .num_items = 4,
3379 .items = {
3380 { "Analog Inputs", 0x0b },
3381 { "CD", 0x08 },
3382 { "Digital Mic 1", 0x09 },
3383 { "Digital Mic 2", 0x0a },
3384 }
3385};
3386
3387static int patch_stac92hd73xx(struct hda_codec *codec)
3388{
3389 struct sigmatel_spec *spec;
3390 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3391 int err = 0;
3392
3393 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3394 if (spec == NULL)
3395 return -ENOMEM;
3396
3397 codec->spec = spec;
3398 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3399 spec->pin_nids = stac92hd73xx_pin_nids;
3400 spec->board_config = snd_hda_check_board_config(codec,
3401 STAC_92HD73XX_MODELS,
3402 stac92hd73xx_models,
3403 stac92hd73xx_cfg_tbl);
3404again:
3405 if (spec->board_config < 0) {
3406 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3407 " STAC92HD73XX, using BIOS defaults\n");
3408 err = stac92xx_save_bios_config_regs(codec);
3409 if (err < 0) {
3410 stac92xx_free(codec);
3411 return err;
3412 }
3413 spec->pin_configs = spec->bios_pin_configs;
3414 } else {
3415 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3416 stac92xx_set_config_regs(codec);
3417 }
3418
3419 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3420 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3421
3422 if (spec->multiout.num_dacs < 0) {
3423 printk(KERN_WARNING "hda_codec: Could not determine "
3424 "number of channels defaulting to DAC count\n");
3425 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3426 }
3427
3428 switch (spec->multiout.num_dacs) {
3429 case 0x3: /* 6 Channel */
3430 spec->mixer = stac92hd73xx_6ch_mixer;
3431 spec->init = stac92hd73xx_6ch_core_init;
3432 break;
3433 case 0x4: /* 8 Channel */
3434 spec->multiout.hp_nid = 0x18;
3435 spec->mixer = stac92hd73xx_8ch_mixer;
3436 spec->init = stac92hd73xx_8ch_core_init;
3437 break;
3438 case 0x5: /* 10 Channel */
3439 spec->multiout.hp_nid = 0x19;
3440 spec->mixer = stac92hd73xx_10ch_mixer;
3441 spec->init = stac92hd73xx_10ch_core_init;
3442 };
3443
3444 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3445 spec->aloopback_mask = 0x01;
3446 spec->aloopback_shift = 8;
3447
3448 spec->mux_nids = stac92hd73xx_mux_nids;
3449 spec->adc_nids = stac92hd73xx_adc_nids;
3450 spec->dmic_nids = stac92hd73xx_dmic_nids;
3451 spec->dmux_nids = stac92hd73xx_dmux_nids;
3452
3453 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3454 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 3455 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3456 spec->dinput_mux = &stac92hd73xx_dmux;
3457 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3458 spec->gpio_mask = spec->gpio_dir = 0x1;
3459 spec->gpio_data = 0x01;
e1f0d669 3460
a7662640
MR		 3461 switch (spec->board_config) {
3462 case STAC_DELL_M6:
52fe0f9d 3463 spec->init = dell_m6_core_init;
a7662640
MR		 3464 switch (codec->subsystem_id) {
3465 case 0x1028025e: /* Analog Mics */
3466 case 0x1028025f:
3467 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3468 spec->num_dmics = 0;
3469 break;
3470 case 0x10280254: /* Digital Mics */
3471 case 0x10280255:
3472 case 0x10280271:
3473 case 0x10280272:
3474 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3475 spec->num_dmics = 1;
3476 break;
3477 case 0x10280256: /* Both */
3478 case 0x10280057:
3479 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3480 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3481 spec->num_dmics = 1;
3482 break;
3483 }
3484 break;
3485 default:
3486 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
3487 }
3488
a64135a2
MR		 3489 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3490 spec->pwr_nids = stac92hd73xx_pwr_nids;
3491
e1f0d669
MR		 3492 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3493
3494 if (!err) {
3495 if (spec->board_config < 0) {
3496 printk(KERN_WARNING "hda_codec: No auto-config is "
3497 "available, default to model=ref\n");
3498 spec->board_config = STAC_92HD73XX_REF;
3499 goto again;
3500 }
3501 err = -EINVAL;
3502 }
3503
3504 if (err < 0) {
3505 stac92xx_free(codec);
3506 return err;
3507 }
3508
3509 codec->patch_ops = stac92xx_patch_ops;
3510
3511 return 0;
3512}
3513
e035b841
MR		 3514static int patch_stac92hd71bxx(struct hda_codec *codec)
3515{
3516 struct sigmatel_spec *spec;
3517 int err = 0;
3518
3519 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3520 if (spec == NULL)
3521 return -ENOMEM;
3522
3523 codec->spec = spec;
3524 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
3525 spec->pin_nids = stac92hd71bxx_pin_nids;
3526 spec->board_config = snd_hda_check_board_config(codec,
3527 STAC_92HD71BXX_MODELS,
3528 stac92hd71bxx_models,
3529 stac92hd71bxx_cfg_tbl);
3530again:
3531 if (spec->board_config < 0) {
3532 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3533 " STAC92HD71BXX, using BIOS defaults\n");
3534 err = stac92xx_save_bios_config_regs(codec);
3535 if (err < 0) {
3536 stac92xx_free(codec);
3537 return err;
3538 }
3539 spec->pin_configs = spec->bios_pin_configs;
3540 } else {
3541 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3542 stac92xx_set_config_regs(codec);
3543 }
3544
541eee87
MR		 3545 switch (codec->vendor_id) {
3546 case 0x111d76b6: /* 4 Port without Analog Mixer */
3547 case 0x111d76b7:
3548 case 0x111d76b4: /* 6 Port without Analog Mixer */
3549 case 0x111d76b5:
3550 spec->mixer = stac92hd71bxx_mixer;
3551 spec->init = stac92hd71bxx_core_init;
3552 break;
3553 default:
3554 spec->mixer = stac92hd71bxx_analog_mixer;
3555 spec->init = stac92hd71bxx_analog_core_init;
3556 }
3557
3558 spec->aloopback_mask = 0x20;
3559 spec->aloopback_shift = 0;
3560
4fe5195c
MR		 3561 /* GPIO0 High = EAPD */
3562 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0x1;
e035b841 3563
e035b841
MR		 3564 spec->mux_nids = stac92hd71bxx_mux_nids;
3565 spec->adc_nids = stac92hd71bxx_adc_nids;
3566 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3567 spec->dmux_nids = stac92hd71bxx_dmux_nids;
e035b841
MR		 3568
3569 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3570 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3571 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3572 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3573
a64135a2
MR		 3574 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3575 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3576
aea7bb0a 3577 spec->multiout.num_dacs = 1;
e035b841
MR		 3578 spec->multiout.hp_nid = 0x11;
3579 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3580
3581 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3582 if (!err) {
3583 if (spec->board_config < 0) {
3584 printk(KERN_WARNING "hda_codec: No auto-config is "
3585 "available, default to model=ref\n");
3586 spec->board_config = STAC_92HD71BXX_REF;
3587 goto again;
3588 }
3589 err = -EINVAL;
3590 }
3591
3592 if (err < 0) {
3593 stac92xx_free(codec);
3594 return err;
3595 }
3596
3597 codec->patch_ops = stac92xx_patch_ops;
3598
3599 return 0;
3600};
3601
2f2f4251
M		 3602static int patch_stac922x(struct hda_codec *codec)
3603{
3604 struct sigmatel_spec *spec;
c7d4b2fa 3605 int err;
2f2f4251 3606
e560d8d8 3607 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3608 if (spec == NULL)
3609 return -ENOMEM;
3610
3611 codec->spec = spec;
a4eed138 3612 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3613 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3614 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3615 stac922x_models,
3616 stac922x_cfg_tbl);
5d5d3bc3 3617 if (spec->board_config == STAC_INTEL_MAC_V3) {
4fe5195c
MR		 3618 spec->gpio_mask = spec->gpio_dir = 0x03;
3619 spec->gpio_data = 0x03;
3fc24d85
TI		 3620 /* Intel Macs have all same PCI SSID, so we need to check
3621 * codec SSID to distinguish the exact models
3622 */
6f0778d8 3623 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3624 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3625
3626 case 0x106b0800:
3627 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3628 break;
5d5d3bc3
IZ		 3629 case 0x106b0600:
3630 case 0x106b0700:
3631 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3632 break;
5d5d3bc3
IZ		 3633 case 0x106b0e00:
3634 case 0x106b0f00:
3635 case 0x106b1600:
3636 case 0x106b1700:
3637 case 0x106b0200:
3638 case 0x106b1e00:
3639 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3640 break;
5d5d3bc3
IZ		 3641 case 0x106b1a00:
3642 case 0x00000100:
3643 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3644 break;
5d5d3bc3
IZ		 3645 case 0x106b0a00:
3646 case 0x106b2200:
3647 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3648 break;
3fc24d85
TI		 3649 }
3650 }
3651
9e507abd 3652 again:
11b44bbd
RF		 3653 if (spec->board_config < 0) {
3654 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3655 "using BIOS defaults\n");
3656 err = stac92xx_save_bios_config_regs(codec);
3657 if (err < 0) {
3658 stac92xx_free(codec);
3659 return err;
3660 }
3661 spec->pin_configs = spec->bios_pin_configs;
3662 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3663 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3664 stac92xx_set_config_regs(codec);
3665 }
2f2f4251 3666
c7d4b2fa
M		 3667 spec->adc_nids = stac922x_adc_nids;
3668 spec->mux_nids = stac922x_mux_nids;
2549413e 3669 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3670 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3671 spec->num_dmics = 0;
a64135a2 3672 spec->num_pwrs = 0;
c7d4b2fa
M		 3673
3674 spec->init = stac922x_core_init;
2f2f4251 3675 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3676
3677 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3678
3cc08dc6 3679 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3680 if (!err) {
3681 if (spec->board_config < 0) {
3682 printk(KERN_WARNING "hda_codec: No auto-config is "
3683 "available, default to model=ref\n");
3684 spec->board_config = STAC_D945_REF;
3685 goto again;
3686 }
3687 err = -EINVAL;
3688 }
3cc08dc6
MP		 3689 if (err < 0) {
3690 stac92xx_free(codec);
3691 return err;
3692 }
3693
3694 codec->patch_ops = stac92xx_patch_ops;
3695
807a4636
TI		 3696 /* Fix Mux capture level; max to 2 */
3697 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3698 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3699 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3700 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3701 (0 << AC_AMPCAP_MUTE_SHIFT));
3702
3cc08dc6
MP		 3703 return 0;
3704}
3705
3706static int patch_stac927x(struct hda_codec *codec)
3707{
3708 struct sigmatel_spec *spec;
3709 int err;
3710
3711 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3712 if (spec == NULL)
3713 return -ENOMEM;
3714
3715 codec->spec = spec;
a4eed138 3716 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3717 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3718 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3719 stac927x_models,
3720 stac927x_cfg_tbl);
9e507abd 3721 again:
8e9068b1
MR		 3722 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3723 if (spec->board_config < 0)
3724 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3725 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3726 err = stac92xx_save_bios_config_regs(codec);
3727 if (err < 0) {
3728 stac92xx_free(codec);
3729 return err;
3730 }
3731 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3732 } else {
3cc08dc6
MP		 3733 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3734 stac92xx_set_config_regs(codec);
3735 }
3736
8e9068b1
MR		 3737 spec->adc_nids = stac927x_adc_nids;
3738 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3739 spec->mux_nids = stac927x_mux_nids;
3740 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
b76c850f 3741 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 3742 spec->multiout.dac_nids = spec->dac_nids;
3743
81d3dbde 3744 switch (spec->board_config) {
93ed1503 3745 case STAC_D965_3ST:
93ed1503 3746 case STAC_D965_5ST:
8e9068b1 3747 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3748 spec->gpio_mask = spec->gpio_dir = 0x01;
3749 spec->gpio_data = 0x01;
8e9068b1
MR		 3750 spec->num_dmics = 0;
3751
93ed1503 3752 spec->init = d965_core_init;
9e05b7a3 3753 spec->mixer = stac927x_mixer;
81d3dbde 3754 break;
8e9068b1 3755 case STAC_DELL_BIOS:
03d7ca17
MR		 3756 /* configure the analog microphone on some laptops */
3757 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 3758 /* correct the front output jack as a hp out */
7989fba9 3759 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 3760 /* correct the front input jack as a mic */
3761 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3762 /* fallthru */
8e9068b1
MR		 3763 case STAC_DELL_3ST:
3764 /* GPIO2 High = Enable EAPD */
4fe5195c
MR		 3765 spec->gpio_mask = spec->gpio_dir = 0x04;
3766 spec->gpio_data = 0x04;
7f16859a
MR		 3767 spec->dmic_nids = stac927x_dmic_nids;
3768 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3769
8e9068b1
MR		 3770 spec->init = d965_core_init;
3771 spec->mixer = stac927x_mixer;
3772 spec->dmux_nids = stac927x_dmux_nids;
1697055e 3773 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 3774 break;
3775 default:
f1f208d0 3776 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3777 spec->gpio_mask = spec->gpio_dir = 0x1;
3778 spec->gpio_data = 0x01;
8e9068b1
MR		 3779 spec->num_dmics = 0;
3780
3781 spec->init = stac927x_core_init;
3782 spec->mixer = stac927x_mixer;
7f16859a
MR		 3783 }
3784
a64135a2 3785 spec->num_pwrs = 0;
e1f0d669
MR		 3786 spec->aloopback_mask = 0x40;
3787 spec->aloopback_shift = 0;
8e9068b1 3788
3cc08dc6 3789 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3790 if (!err) {
3791 if (spec->board_config < 0) {
3792 printk(KERN_WARNING "hda_codec: No auto-config is "
3793 "available, default to model=ref\n");
3794 spec->board_config = STAC_D965_REF;
3795 goto again;
3796 }
3797 err = -EINVAL;
3798 }
c7d4b2fa
M		 3799 if (err < 0) {
3800 stac92xx_free(codec);
3801 return err;
3802 }
2f2f4251
M		 3803
3804 codec->patch_ops = stac92xx_patch_ops;
3805
52987656
TI		 3806 /*
3807 * !!FIXME!!
3808 * The STAC927x seem to require fairly long delays for certain
3809 * command sequences. With too short delays (even if the answer
3810 * is set to RIRB properly), it results in the silence output
3811 * on some hardwares like Dell.
3812 *
3813 * The below flag enables the longer delay (see get_response
3814 * in hda_intel.c).
3815 */
3816 codec->bus->needs_damn_long_delay = 1;
3817
2f2f4251
M		 3818 return 0;
3819}
3820
f3302a59
MP		 3821static int patch_stac9205(struct hda_codec *codec)
3822{
3823 struct sigmatel_spec *spec;
8259980e 3824 int err;
f3302a59
MP		 3825
3826 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3827 if (spec == NULL)
3828 return -ENOMEM;
3829
3830 codec->spec = spec;
a4eed138 3831 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3832 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3833 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3834 stac9205_models,
3835 stac9205_cfg_tbl);
9e507abd 3836 again:
11b44bbd
RF		 3837 if (spec->board_config < 0) {
3838 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3839 err = stac92xx_save_bios_config_regs(codec);
3840 if (err < 0) {
3841 stac92xx_free(codec);
3842 return err;
3843 }
3844 spec->pin_configs = spec->bios_pin_configs;
3845 } else {
f3302a59
MP		 3846 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3847 stac92xx_set_config_regs(codec);
3848 }
3849
3850 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3851 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3852 spec->mux_nids = stac9205_mux_nids;
2549413e 3853 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3854 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3855 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3856 spec->dmux_nids = stac9205_dmux_nids;
1697055e 3857 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 3858 spec->num_pwrs = 0;
f3302a59
MP		 3859
3860 spec->init = stac9205_core_init;
3861 spec->mixer = stac9205_mixer;
3862
e1f0d669
MR		 3863 spec->aloopback_mask = 0x40;
3864 spec->aloopback_shift = 0;
f3302a59 3865 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3866
ae0a8ed8 3867 switch (spec->board_config){
ae0a8ed8 3868 case STAC_9205_DELL_M43:
87d48363
MR		 3869 /* Enable SPDIF in/out */
3870 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3871 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3872
4fe5195c
MR		 3873 /* Enable unsol response for GPIO4/Dock HP connection */
3874 snd_hda_codec_write(codec, codec->afg, 0,
3875 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3876 snd_hda_codec_write_cache(codec, codec->afg, 0,
3877 AC_VERB_SET_UNSOLICITED_ENABLE,
3878 (AC_USRSP_EN | STAC_HP_EVENT));
3879
3880 spec->gpio_dir = 0x0b;
3881 spec->gpio_mask = 0x1b;
3882 spec->gpio_mute = 0x10;
e2e7d624 3883 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 3884 * GPIO3 Low = DRM
87d48363 3885 */
4fe5195c 3886 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3887 break;
3888 default:
3889 /* GPIO0 High = EAPD */
4fe5195c
MR		 3890 spec->gpio_mask = spec->gpio_dir = 0x1;
3891 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3892 break;
3893 }
33382403 3894
f3302a59 3895 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 3896 if (!err) {
3897 if (spec->board_config < 0) {
3898 printk(KERN_WARNING "hda_codec: No auto-config is "
3899 "available, default to model=ref\n");
3900 spec->board_config = STAC_9205_REF;
3901 goto again;
3902 }
3903 err = -EINVAL;
3904 }
f3302a59
MP		 3905 if (err < 0) {
3906 stac92xx_free(codec);
3907 return err;
3908 }
3909
3910 codec->patch_ops = stac92xx_patch_ops;
3911
3912 return 0;
3913}
3914
db064e50 3915/*
6d859065 3916 * STAC9872 hack
db064e50
TI		 3917 */
3918
99ccc560 3919/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 3920static hda_nid_t vaio_dacs[] = { 0x2 };
3921#define VAIO_HP_DAC 0x5
3922static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
3923static hda_nid_t vaio_mux_nids[] = { 0x15 };
3924
3925static struct hda_input_mux vaio_mux = {
a3a2f429 3926 .num_items = 3,
db064e50 3927 .items = {
d773781c 3928 /* { "HP", 0x0 }, */
1624cb9a
TI		 3929 { "Mic Jack", 0x1 },
3930 { "Internal Mic", 0x2 },
db064e50
TI		 3931 { "PCM", 0x3 },
3932 }
3933};
3934
3935static struct hda_verb vaio_init[] = {
3936 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 3937 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 3938 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3939 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3940 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3941 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3942 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 3943 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3944 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3945 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3946 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3947 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3948 {}
3949};
3950
6d859065
GM		 3951static struct hda_verb vaio_ar_init[] = {
3952 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
3953 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3954 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3955 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3956/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
3957 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3958 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 3959 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3960 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3961/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
3962 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3963 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3964 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3965 {}
3966};
3967
db064e50 3968/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3969static struct hda_bind_ctls vaio_bind_master_vol = {
3970 .ops = &snd_hda_bind_vol,
3971 .values = {
3972 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3973 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3974 0
3975 },
3976};
db064e50
TI		 3977
3978/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3979static struct hda_bind_ctls vaio_bind_master_sw = {
3980 .ops = &snd_hda_bind_sw,
3981 .values = {
3982 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3983 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3984 0,
3985 },
3986};
db064e50
TI		 3987
3988static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 3989 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3990 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 3991 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3992 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3993 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3994 {
3995 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3996 .name = "Capture Source",
3997 .count = 1,
3998 .info = stac92xx_mux_enum_info,
3999 .get = stac92xx_mux_enum_get,
4000 .put = stac92xx_mux_enum_put,
4001 },
4002 {}
4003};
4004
6d859065 4005static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 4006 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4007 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 4008 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4009 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4010 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4011 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
4012 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
4013 {
4014 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4015 .name = "Capture Source",
4016 .count = 1,
4017 .info = stac92xx_mux_enum_info,
4018 .get = stac92xx_mux_enum_get,
4019 .put = stac92xx_mux_enum_put,
4020 },
4021 {}
4022};
4023
4024static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4025 .build_controls = stac92xx_build_controls,
4026 .build_pcms = stac92xx_build_pcms,
4027 .init = stac92xx_init,
4028 .free = stac92xx_free,
cb53c626 4029#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4030 .resume = stac92xx_resume,
4031#endif
4032};
4033
72e7b0dd
TI		 4034static int stac9872_vaio_init(struct hda_codec *codec)
4035{
4036 int err;
4037
4038 err = stac92xx_init(codec);
4039 if (err < 0)
4040 return err;
4041 if (codec->patch_ops.unsol_event)
4042 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4043 return 0;
4044}
4045
4046static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4047{
40c1d308 4048 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4049 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4050 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4051 } else {
4052 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4053 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4054 }
4055}
4056
4057static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4058{
4059 switch (res >> 26) {
4060 case STAC_HP_EVENT:
4061 stac9872_vaio_hp_detect(codec, res);
4062 break;
4063 }
4064}
4065
4066static struct hda_codec_ops stac9872_vaio_patch_ops = {
4067 .build_controls = stac92xx_build_controls,
4068 .build_pcms = stac92xx_build_pcms,
4069 .init = stac9872_vaio_init,
4070 .free = stac92xx_free,
4071 .unsol_event = stac9872_vaio_unsol_event,
4072#ifdef CONFIG_PM
4073 .resume = stac92xx_resume,
4074#endif
4075};
4076
6d859065
GM		 4077enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4078 CXD9872RD_VAIO,
4079 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
4080 STAC9872AK_VAIO,
4081 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
4082 STAC9872K_VAIO,
4083 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 4084 CXD9872AKD_VAIO,
4085 STAC_9872_MODELS,
4086};
4087
4088static const char *stac9872_models[STAC_9872_MODELS] = {
4089 [CXD9872RD_VAIO] = "vaio",
4090 [CXD9872AKD_VAIO] = "vaio-ar",
4091};
4092
4093static struct snd_pci_quirk stac9872_cfg_tbl[] = {
4094 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
4095 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
4096 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 4097 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 4098 {}
4099};
4100
6d859065 4101static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4102{
4103 struct sigmatel_spec *spec;
4104 int board_config;
4105
f5fcc13c
TI		 4106 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
4107 stac9872_models,
4108 stac9872_cfg_tbl);
db064e50
TI		 4109 if (board_config < 0)
4110 /* unknown config, let generic-parser do its job... */
4111 return snd_hda_parse_generic_codec(codec);
4112
4113 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4114 if (spec == NULL)
4115 return -ENOMEM;
4116
4117 codec->spec = spec;
4118 switch (board_config) {
6d859065
GM		 4119 case CXD9872RD_VAIO:
4120 case STAC9872AK_VAIO:
4121 case STAC9872K_VAIO:
db064e50
TI		 4122 spec->mixer = vaio_mixer;
4123 spec->init = vaio_init;
4124 spec->multiout.max_channels = 2;
4125 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4126 spec->multiout.dac_nids = vaio_dacs;
4127 spec->multiout.hp_nid = VAIO_HP_DAC;
4128 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
4129 spec->adc_nids = vaio_adcs;
a64135a2 4130 spec->num_pwrs = 0;
db064e50
TI		 4131 spec->input_mux = &vaio_mux;
4132 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4133 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 4134 break;
6d859065
GM		 4135
4136 case CXD9872AKD_VAIO:
4137 spec->mixer = vaio_ar_mixer;
4138 spec->init = vaio_ar_init;
4139 spec->multiout.max_channels = 2;
4140 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4141 spec->multiout.dac_nids = vaio_dacs;
4142 spec->multiout.hp_nid = VAIO_HP_DAC;
4143 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 4144 spec->num_pwrs = 0;
6d859065
GM		 4145 spec->adc_nids = vaio_adcs;
4146 spec->input_mux = &vaio_mux;
4147 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4148 codec->patch_ops = stac9872_patch_ops;
6d859065 4149 break;
db064e50
TI		 4150 }
4151
db064e50
TI		 4152 return 0;
4153}
4154
4155
2f2f4251
M		 4156/*
4157 * patch entries
4158 */
4159struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4160 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4161 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4162 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4163 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4164 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4165 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4166 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4167 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4168 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4169 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4170 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4171 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4172 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4173 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4174 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4175 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4176 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4177 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4178 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4179 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4180 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4181 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4182 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4183 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4184 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4185 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4186 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4187 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4188 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 4189 /* The following does not take into account .id=0x83847661 when subsys =
4190 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4191 * currently not fully supported.
4192 */
4193 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4194 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4195 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 4196 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4197 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4198 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4199 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4200 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4201 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4202 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4203 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
541eee87
MR		 4204 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4205 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4206 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 4207 { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
4208 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4209 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4210 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4211 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4212 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4213 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4214 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4215 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 4216 {} /* terminator */
4217};
Clone of davem's net-next-2.6 tree