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ALSA: hda - Add model=ref for Intel board with STAC9221
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
TI		 38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
58eec423
MCC		 58 STAC_9200_M4,
59 STAC_9200_M4_2,
117f257d 60 STAC_9200_PANASONIC,
f5fcc13c
TI		 61 STAC_9200_MODELS
62};
63
64enum {
65 STAC_9205_REF,
dfe495d0 66 STAC_9205_DELL_M42,
ae0a8ed8
TD		 67 STAC_9205_DELL_M43,
68 STAC_9205_DELL_M44,
d9a4268e 69 STAC_9205_EAPD,
f5fcc13c
TI		 70 STAC_9205_MODELS
71};
72
e1f0d669 73enum {
9e43f0de 74 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 75 STAC_92HD73XX_REF,
661cd8fb
TI		 76 STAC_DELL_M6_AMIC,
77 STAC_DELL_M6_DMIC,
78 STAC_DELL_M6_BOTH,
6b3ab21e 79 STAC_DELL_EQ,
e1f0d669
MR		 80 STAC_92HD73XX_MODELS
81};
82
d0513fc6
MR		 83enum {
84 STAC_92HD83XXX_REF,
32ed3f46 85 STAC_92HD83XXX_PWR_REF,
d0513fc6
MR		 86 STAC_92HD83XXX_MODELS
87};
88
e035b841
MR		 89enum {
90 STAC_92HD71BXX_REF,
a7662640
MR		 91 STAC_DELL_M4_1,
92 STAC_DELL_M4_2,
3a7abfd2 93 STAC_DELL_M4_3,
6a14f585 94 STAC_HP_M4,
1b0652eb 95 STAC_HP_DV5,
e035b841
MR		 96 STAC_92HD71BXX_MODELS
97};
98
8e21c34c
TD		 99enum {
100 STAC_925x_REF,
9cb36c2a
MCC		 101 STAC_M1,
102 STAC_M1_2,
103 STAC_M2,
8e21c34c 104 STAC_M2_2,
9cb36c2a
MCC		 105 STAC_M3,
106 STAC_M5,
107 STAC_M6,
8e21c34c
TD		 108 STAC_925x_MODELS
109};
110
f5fcc13c
TI		 111enum {
112 STAC_D945_REF,
113 STAC_D945GTP3,
114 STAC_D945GTP5,
5d5d3bc3
IZ		 115 STAC_INTEL_MAC_V1,
116 STAC_INTEL_MAC_V2,
117 STAC_INTEL_MAC_V3,
118 STAC_INTEL_MAC_V4,
119 STAC_INTEL_MAC_V5,
536319af
NB		 120 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
121 * is given, one of the above models will be
122 * chosen according to the subsystem id. */
dfe495d0 123 /* for backward compatibility */
f5fcc13c 124 STAC_MACMINI,
3fc24d85 125 STAC_MACBOOK,
6f0778d8
NB		 126 STAC_MACBOOK_PRO_V1,
127 STAC_MACBOOK_PRO_V2,
f16928fb 128 STAC_IMAC_INTEL,
0dae0f83 129 STAC_IMAC_INTEL_20,
8c650087 130 STAC_ECS_202,
dfe495d0
TI		 131 STAC_922X_DELL_D81,
132 STAC_922X_DELL_D82,
133 STAC_922X_DELL_M81,
134 STAC_922X_DELL_M82,
f5fcc13c
TI		 135 STAC_922X_MODELS
136};
137
138enum {
e28d8322 139 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 140 STAC_D965_REF,
141 STAC_D965_3ST,
142 STAC_D965_5ST,
4ff076e5 143 STAC_DELL_3ST,
8e9068b1 144 STAC_DELL_BIOS,
f5fcc13c
TI		 145 STAC_927X_MODELS
146};
403d1944 147
74aeaabc
MR		 148struct sigmatel_event {
149 hda_nid_t nid;
c6e4c666
TI		 150 unsigned char type;
151 unsigned char tag;
74aeaabc
MR		 152 int data;
153};
154
155struct sigmatel_jack {
156 hda_nid_t nid;
157 int type;
158 struct snd_jack *jack;
159};
160
2f2f4251 161struct sigmatel_spec {
c8b6bf9b 162 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 163 unsigned int num_mixers;
164
403d1944 165 int board_config;
c0cea0d0 166 unsigned int eapd_switch: 1;
c7d4b2fa 167 unsigned int surr_switch: 1;
3cc08dc6 168 unsigned int alt_switch: 1;
82bc955f 169 unsigned int hp_detect: 1;
00ef50c2 170 unsigned int spdif_mute: 1;
7c7767eb 171 unsigned int check_volume_offset:1;
c7d4b2fa 172
4fe5195c 173 /* gpio lines */
0fc9dec4 174 unsigned int eapd_mask;
4fe5195c
MR		 175 unsigned int gpio_mask;
176 unsigned int gpio_dir;
177 unsigned int gpio_data;
178 unsigned int gpio_mute;
179
8daaaa97
MR		 180 /* stream */
181 unsigned int stream_delay;
182
4fe5195c 183 /* analog loopback */
e1f0d669
MR		 184 unsigned char aloopback_mask;
185 unsigned char aloopback_shift;
8259980e 186
a64135a2
MR		 187 /* power management */
188 unsigned int num_pwrs;
d0513fc6 189 unsigned int *pwr_mapping;
a64135a2 190 hda_nid_t *pwr_nids;
b76c850f 191 hda_nid_t *dac_list;
a64135a2 192
74aeaabc
MR		 193 /* jack detection */
194 struct snd_array jacks;
195
196 /* events */
197 struct snd_array events;
198
2f2f4251 199 /* playback */
b22b4821 200 struct hda_input_mux *mono_mux;
89385035 201 struct hda_input_mux *amp_mux;
b22b4821 202 unsigned int cur_mmux;
2f2f4251 203 struct hda_multi_out multiout;
3cc08dc6 204 hda_nid_t dac_nids[5];
c21ca4a8
TI		 205 hda_nid_t hp_dacs[5];
206 hda_nid_t speaker_dacs[5];
2f2f4251 207
7c7767eb
TI		 208 int volume_offset;
209
2f2f4251
M		 210 /* capture */
211 hda_nid_t *adc_nids;
2f2f4251 212 unsigned int num_adcs;
dabbed6f
M		 213 hda_nid_t *mux_nids;
214 unsigned int num_muxes;
8b65727b
MP		 215 hda_nid_t *dmic_nids;
216 unsigned int num_dmics;
e1f0d669 217 hda_nid_t *dmux_nids;
1697055e 218 unsigned int num_dmuxes;
d9737751
MR		 219 hda_nid_t *smux_nids;
220 unsigned int num_smuxes;
65973632 221 const char **spdif_labels;
d9737751 222
dabbed6f 223 hda_nid_t dig_in_nid;
b22b4821 224 hda_nid_t mono_nid;
1cd2224c
MR		 225 hda_nid_t anabeep_nid;
226 hda_nid_t digbeep_nid;
2f2f4251 227
2f2f4251
M		 228 /* pin widgets */
229 hda_nid_t *pin_nids;
230 unsigned int num_pins;
2f2f4251 231 unsigned int *pin_configs;
2f2f4251
M		 232
233 /* codec specific stuff */
234 struct hda_verb *init;
c8b6bf9b 235 struct snd_kcontrol_new *mixer;
2f2f4251
M		 236
237 /* capture source */
8b65727b 238 struct hda_input_mux *dinput_mux;
e1f0d669 239 unsigned int cur_dmux[2];
c7d4b2fa 240 struct hda_input_mux *input_mux;
3cc08dc6 241 unsigned int cur_mux[3];
d9737751
MR		 242 struct hda_input_mux *sinput_mux;
243 unsigned int cur_smux[2];
2a9c7816
MR		 244 unsigned int cur_amux;
245 hda_nid_t *amp_nids;
246 unsigned int num_amps;
8daaaa97 247 unsigned int powerdown_adcs;
2f2f4251 248
403d1944
MP		 249 /* i/o switches */
250 unsigned int io_switch[2];
0fb87bb4 251 unsigned int clfe_swap;
c21ca4a8
TI		 252 hda_nid_t line_switch; /* shared line-in for input and output */
253 hda_nid_t mic_switch; /* shared mic-in for input and output */
254 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 255 unsigned int aloopback;
2f2f4251 256
c7d4b2fa
M		 257 struct hda_pcm pcm_rec[2]; /* PCM information */
258
259 /* dynamic controls and input_mux */
260 struct auto_pin_cfg autocfg;
603c4019 261 struct snd_array kctls;
8b65727b 262 struct hda_input_mux private_dimux;
c7d4b2fa 263 struct hda_input_mux private_imux;
d9737751 264 struct hda_input_mux private_smux;
89385035 265 struct hda_input_mux private_amp_mux;
b22b4821 266 struct hda_input_mux private_mono_mux;
2f2f4251
M		 267};
268
269static hda_nid_t stac9200_adc_nids[1] = {
270 0x03,
271};
272
273static hda_nid_t stac9200_mux_nids[1] = {
274 0x0c,
275};
276
277static hda_nid_t stac9200_dac_nids[1] = {
278 0x02,
279};
280
a64135a2
MR		 281static hda_nid_t stac92hd73xx_pwr_nids[8] = {
282 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
283 0x0f, 0x10, 0x11
284};
285
0ffa9807
MR		 286static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
287 0x26, 0,
288};
289
e1f0d669
MR		 290static hda_nid_t stac92hd73xx_adc_nids[2] = {
291 0x1a, 0x1b
292};
293
2a9c7816
MR		 294#define DELL_M6_AMP 2
295static hda_nid_t stac92hd73xx_amp_nids[3] = {
296 0x0b, 0x0c, 0x0e
89385035
MR		 297};
298
e1f0d669
MR		 299#define STAC92HD73XX_NUM_DMICS 2
300static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
301 0x13, 0x14, 0
302};
303
304#define STAC92HD73_DAC_COUNT 5
e1f0d669
MR		 305
306static hda_nid_t stac92hd73xx_mux_nids[4] = {
307 0x28, 0x29, 0x2a, 0x2b,
308};
309
310static hda_nid_t stac92hd73xx_dmux_nids[2] = {
311 0x20, 0x21,
312};
313
d9737751
MR		 314static hda_nid_t stac92hd73xx_smux_nids[2] = {
315 0x22, 0x23,
316};
317
d0513fc6
MR		 318#define STAC92HD83XXX_NUM_DMICS 2
319static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
320 0x11, 0x12, 0
321};
322
d0513fc6 323#define STAC92HD83_DAC_COUNT 3
d0513fc6
MR		 324
325static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
326 0x17, 0x18,
327};
328
329static hda_nid_t stac92hd83xxx_adc_nids[2] = {
330 0x15, 0x16,
331};
332
333static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
334 0xa, 0xb, 0xd, 0xe,
335};
336
0ffa9807
MR		 337static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
338 0x1e, 0,
339};
340
d0513fc6 341static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 342 0x03, 0x0c, 0x20, 0x40,
d0513fc6
MR		 343};
344
9248f269 345static hda_nid_t stac92hd83xxx_amp_nids[1] = {
c15c5060
MR		 346 0xc,
347};
348
a64135a2
MR		 349static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
350 0x0a, 0x0d, 0x0f
351};
352
e035b841
MR		 353static hda_nid_t stac92hd71bxx_adc_nids[2] = {
354 0x12, 0x13,
355};
356
357static hda_nid_t stac92hd71bxx_mux_nids[2] = {
358 0x1a, 0x1b
359};
360
4b33c767
MR		 361static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
362 0x1c, 0x1d,
e1f0d669
MR		 363};
364
d9737751
MR		 365static hda_nid_t stac92hd71bxx_smux_nids[2] = {
366 0x24, 0x25,
367};
368
e035b841
MR		 369#define STAC92HD71BXX_NUM_DMICS 2
370static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
371 0x18, 0x19, 0
372};
373
0ffa9807
MR		 374static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
375 0x22, 0
376};
377
8e21c34c
TD		 378static hda_nid_t stac925x_adc_nids[1] = {
379 0x03,
380};
381
382static hda_nid_t stac925x_mux_nids[1] = {
383 0x0f,
384};
385
386static hda_nid_t stac925x_dac_nids[1] = {
387 0x02,
388};
389
f6e9852a
TI		 390#define STAC925X_NUM_DMICS 1
391static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
392 0x15, 0
2c11f955
TD		 393};
394
1697055e
TI		 395static hda_nid_t stac925x_dmux_nids[1] = {
396 0x14,
397};
398
2f2f4251
M		 399static hda_nid_t stac922x_adc_nids[2] = {
400 0x06, 0x07,
401};
402
403static hda_nid_t stac922x_mux_nids[2] = {
404 0x12, 0x13,
405};
406
3cc08dc6
MP		 407static hda_nid_t stac927x_adc_nids[3] = {
408 0x07, 0x08, 0x09
409};
410
411static hda_nid_t stac927x_mux_nids[3] = {
412 0x15, 0x16, 0x17
413};
414
d9737751
MR		 415static hda_nid_t stac927x_smux_nids[1] = {
416 0x21,
417};
418
b76c850f
MR		 419static hda_nid_t stac927x_dac_nids[6] = {
420 0x02, 0x03, 0x04, 0x05, 0x06, 0
421};
422
e1f0d669
MR		 423static hda_nid_t stac927x_dmux_nids[1] = {
424 0x1b,
425};
426
7f16859a
MR		 427#define STAC927X_NUM_DMICS 2
428static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
429 0x13, 0x14, 0
430};
431
65973632
MR		 432static const char *stac927x_spdif_labels[5] = {
433 "Digital Playback", "ADAT", "Analog Mux 1",
434 "Analog Mux 2", "Analog Mux 3"
435};
436
f3302a59
MP		 437static hda_nid_t stac9205_adc_nids[2] = {
438 0x12, 0x13
439};
440
441static hda_nid_t stac9205_mux_nids[2] = {
442 0x19, 0x1a
443};
444
e1f0d669 445static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 446 0x1d,
e1f0d669
MR		 447};
448
d9737751
MR		 449static hda_nid_t stac9205_smux_nids[1] = {
450 0x21,
451};
452
f6e9852a
TI		 453#define STAC9205_NUM_DMICS 2
454static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
455 0x17, 0x18, 0
8b65727b
MP		 456};
457
c7d4b2fa 458static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 459 0x08, 0x09, 0x0d, 0x0e,
460 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 461};
462
8e21c34c
TD		 463static hda_nid_t stac925x_pin_nids[8] = {
464 0x07, 0x08, 0x0a, 0x0b,
465 0x0c, 0x0d, 0x10, 0x11,
466};
467
2f2f4251
M		 468static hda_nid_t stac922x_pin_nids[10] = {
469 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
470 0x0f, 0x10, 0x11, 0x15, 0x1b,
471};
472
a7662640 473static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 474 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
475 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 476 0x14, 0x22, 0x23
e1f0d669
MR		 477};
478
d0513fc6
MR		 479static hda_nid_t stac92hd83xxx_pin_nids[14] = {
480 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
481 0x0f, 0x10, 0x11, 0x12, 0x13,
482 0x1d, 0x1e, 0x1f, 0x20
483};
0ffa9807 484static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 485 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
486 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 487 0x1f,
e035b841
MR		 488};
489
3cc08dc6
MP		 490static hda_nid_t stac927x_pin_nids[14] = {
491 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
492 0x0f, 0x10, 0x11, 0x12, 0x13,
493 0x14, 0x21, 0x22, 0x23,
494};
495
f3302a59
MP		 496static hda_nid_t stac9205_pin_nids[12] = {
497 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
498 0x0f, 0x14, 0x16, 0x17, 0x18,
499 0x21, 0x22,
f3302a59
MP		 500};
501
89385035
MR		 502#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
503
504static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
505 struct snd_ctl_elem_value *ucontrol)
506{
507 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
508 struct sigmatel_spec *spec = codec->spec;
509 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
510
511 kcontrol->private_value ^= get_amp_nid(kcontrol);
512 kcontrol->private_value |= nid;
513
514 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
515}
516
517static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
518 struct snd_ctl_elem_value *ucontrol)
519{
520 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
521 struct sigmatel_spec *spec = codec->spec;
522 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
523
524 kcontrol->private_value ^= get_amp_nid(kcontrol);
525 kcontrol->private_value |= nid;
526
527 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
528}
529
8b65727b
MP		 530static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
531 struct snd_ctl_elem_info *uinfo)
532{
533 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
534 struct sigmatel_spec *spec = codec->spec;
535 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
536}
537
538static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
539 struct snd_ctl_elem_value *ucontrol)
540{
541 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
542 struct sigmatel_spec *spec = codec->spec;
e1f0d669 543 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 544
e1f0d669 545 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 546 return 0;
547}
548
549static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
550 struct snd_ctl_elem_value *ucontrol)
551{
552 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
553 struct sigmatel_spec *spec = codec->spec;
e1f0d669 554 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 555
556 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 557 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 558}
559
d9737751
MR		 560static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
561 struct snd_ctl_elem_info *uinfo)
562{
563 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
564 struct sigmatel_spec *spec = codec->spec;
565 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
566}
567
568static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
569 struct snd_ctl_elem_value *ucontrol)
570{
571 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
572 struct sigmatel_spec *spec = codec->spec;
573 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
574
575 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
576 return 0;
577}
578
579static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
580 struct snd_ctl_elem_value *ucontrol)
581{
582 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
583 struct sigmatel_spec *spec = codec->spec;
00ef50c2 584 struct hda_input_mux *smux = &spec->private_smux;
d9737751 585 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 586 int err, val;
587 hda_nid_t nid;
d9737751 588
00ef50c2 589 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 590 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 591 if (err < 0)
592 return err;
593
594 if (spec->spdif_mute) {
595 if (smux_idx == 0)
596 nid = spec->multiout.dig_out_nid;
597 else
598 nid = codec->slave_dig_outs[smux_idx - 1];
599 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 600 val = HDA_AMP_MUTE;
00ef50c2 601 else
c9b46f91 602 val = 0;
00ef50c2 603 /* un/mute SPDIF out */
c9b46f91
TI		 604 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
605 HDA_AMP_MUTE, val);
00ef50c2
MR		 606 }
607 return 0;
d9737751
MR		 608}
609
c8b6bf9b 610static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 611{
612 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
613 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 614 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 615}
616
c8b6bf9b 617static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 618{
619 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
620 struct sigmatel_spec *spec = codec->spec;
621 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
622
623 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
624 return 0;
625}
626
c8b6bf9b 627static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 628{
629 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
630 struct sigmatel_spec *spec = codec->spec;
631 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
632
c7d4b2fa 633 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 634 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
635}
636
b22b4821
MR		 637static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
638 struct snd_ctl_elem_info *uinfo)
639{
640 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
641 struct sigmatel_spec *spec = codec->spec;
642 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
643}
644
645static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
646 struct snd_ctl_elem_value *ucontrol)
647{
648 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
649 struct sigmatel_spec *spec = codec->spec;
650
651 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
652 return 0;
653}
654
655static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
656 struct snd_ctl_elem_value *ucontrol)
657{
658 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
659 struct sigmatel_spec *spec = codec->spec;
660
661 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
662 spec->mono_nid, &spec->cur_mmux);
663}
664
89385035
MR		 665static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
666 struct snd_ctl_elem_info *uinfo)
667{
668 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
669 struct sigmatel_spec *spec = codec->spec;
670 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
671}
672
673static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
674 struct snd_ctl_elem_value *ucontrol)
675{
676 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
677 struct sigmatel_spec *spec = codec->spec;
678
679 ucontrol->value.enumerated.item[0] = spec->cur_amux;
680 return 0;
681}
682
683static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
684 struct snd_ctl_elem_value *ucontrol)
685{
686 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
687 struct sigmatel_spec *spec = codec->spec;
688 struct snd_kcontrol *ctl =
689 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
690 if (!ctl)
691 return -EINVAL;
692
693 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
694 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
695
696 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
697 0, &spec->cur_amux);
698}
699
5f10c4a9
ML		 700#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
701
702static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
703 struct snd_ctl_elem_value *ucontrol)
704{
705 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 706 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 707 struct sigmatel_spec *spec = codec->spec;
708
e1f0d669
MR		 709 ucontrol->value.integer.value[0] = !!(spec->aloopback &
710 (spec->aloopback_mask << idx));
5f10c4a9
ML		 711 return 0;
712}
713
714static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
715 struct snd_ctl_elem_value *ucontrol)
716{
717 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
718 struct sigmatel_spec *spec = codec->spec;
e1f0d669 719 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 720 unsigned int dac_mode;
e1f0d669 721 unsigned int val, idx_val;
5f10c4a9 722
e1f0d669
MR		 723 idx_val = spec->aloopback_mask << idx;
724 if (ucontrol->value.integer.value[0])
725 val = spec->aloopback | idx_val;
726 else
727 val = spec->aloopback & ~idx_val;
68ea7b2f 728 if (spec->aloopback == val)
5f10c4a9
ML		 729 return 0;
730
68ea7b2f 731 spec->aloopback = val;
5f10c4a9 732
e1f0d669
MR		 733 /* Only return the bits defined by the shift value of the
734 * first two bytes of the mask
735 */
5f10c4a9 736 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 737 kcontrol->private_value & 0xFFFF, 0x0);
738 dac_mode >>= spec->aloopback_shift;
5f10c4a9 739
e1f0d669 740 if (spec->aloopback & idx_val) {
5f10c4a9 741 snd_hda_power_up(codec);
e1f0d669 742 dac_mode |= idx_val;
5f10c4a9
ML		 743 } else {
744 snd_hda_power_down(codec);
e1f0d669 745 dac_mode &= ~idx_val;
5f10c4a9
ML		 746 }
747
748 snd_hda_codec_write_cache(codec, codec->afg, 0,
749 kcontrol->private_value >> 16, dac_mode);
750
751 return 1;
752}
753
c7d4b2fa 754static struct hda_verb stac9200_core_init[] = {
2f2f4251 755 /* set dac0mux for dac converter */
c7d4b2fa 756 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 757 {}
758};
759
1194b5b7
TI		 760static struct hda_verb stac9200_eapd_init[] = {
761 /* set dac0mux for dac converter */
762 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
763 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
764 {}
765};
766
e1f0d669
MR		 767static struct hda_verb stac92hd73xx_6ch_core_init[] = {
768 /* set master volume and direct control */
769 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 770 /* setup adcs to point to mixer */
771 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
772 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 773 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
774 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
775 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
776 /* setup import muxs */
777 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
778 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
779 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
780 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
781 {}
782};
783
d654a660
MR		 784static struct hda_verb dell_eq_core_init[] = {
785 /* set master volume to max value without distortion
786 * and direct control */
787 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR		 788 /* setup adcs to point to mixer */
789 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
790 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
791 /* setup import muxs */
792 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
793 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
794 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
795 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
796 {}
797};
798
52fe0f9d 799static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 800 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR		 801 /* setup adcs to point to mixer */
802 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
803 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
804 /* setup import muxs */
805 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
806 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
807 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
808 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
809 {}
810};
811
e1f0d669
MR		 812static struct hda_verb stac92hd73xx_8ch_core_init[] = {
813 /* set master volume and direct control */
814 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 815 /* setup adcs to point to mixer */
816 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
817 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 818 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
819 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
820 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
821 /* setup import muxs */
822 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
823 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
824 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
825 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
826 {}
827};
828
829static struct hda_verb stac92hd73xx_10ch_core_init[] = {
830 /* set master volume and direct control */
831 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 832 /* dac3 is connected to import3 mux */
833 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR		 834 /* setup adcs to point to mixer */
835 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
836 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 837 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
838 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
839 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
840 /* setup import muxs */
841 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
842 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
843 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
844 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
845 {}
846};
847
d0513fc6 848static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 849 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
850 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
851 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
852
853 /* power state controls amps */
854 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 855 {}
d0513fc6
MR		 856};
857
e035b841 858static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 859 /* set master volume and direct control */
860 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
541eee87
MR		 861 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
862 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
863 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
864 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
574f3c4f 865 {}
541eee87
MR		 866};
867
4b33c767 868#define HD_DISABLE_PORTF 2
541eee87 869static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 870 /* start of config #1 */
871
872 /* connect port 0f to audio mixer */
873 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 874 /* unmute right and left channels for node 0x0f */
875 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
876 /* start of config #2 */
877
e035b841
MR		 878 /* set master volume and direct control */
879 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
aafc4412 880 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 881 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
882 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 883 {}
884};
885
8e21c34c
TD		 886static struct hda_verb stac925x_core_init[] = {
887 /* set dac0mux for dac converter */
888 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 889 /* mute the master volume */
890 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 891 {}
892};
893
c7d4b2fa 894static struct hda_verb stac922x_core_init[] = {
2f2f4251 895 /* set master volume and direct control */
c7d4b2fa 896 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 897 {}
898};
899
93ed1503 900static struct hda_verb d965_core_init[] = {
19039bd0 901 /* set master volume and direct control */
93ed1503 902 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 903 /* unmute node 0x1b */
904 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
905 /* select node 0x03 as DAC */
906 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
907 {}
908};
909
3cc08dc6
MP		 910static struct hda_verb stac927x_core_init[] = {
911 /* set master volume and direct control */
912 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 913 /* enable analog pc beep path */
914 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 915 {}
916};
917
f3302a59
MP		 918static struct hda_verb stac9205_core_init[] = {
919 /* set master volume and direct control */
920 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 921 /* enable analog pc beep path */
922 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 923 {}
924};
925
b22b4821
MR		 926#define STAC_MONO_MUX \
927 { \
928 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
929 .name = "Mono Mux", \
930 .count = 1, \
931 .info = stac92xx_mono_mux_enum_info, \
932 .get = stac92xx_mono_mux_enum_get, \
933 .put = stac92xx_mono_mux_enum_put, \
934 }
935
89385035
MR		 936#define STAC_AMP_MUX \
937 { \
938 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
939 .name = "Amp Selector Capture Switch", \
940 .count = 1, \
941 .info = stac92xx_amp_mux_enum_info, \
942 .get = stac92xx_amp_mux_enum_get, \
943 .put = stac92xx_amp_mux_enum_put, \
944 }
945
946#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
947 { \
948 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
949 .name = xname, \
950 .index = 0, \
951 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
952 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
953 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
954 .info = stac92xx_amp_volume_info, \
955 .get = stac92xx_amp_volume_get, \
956 .put = stac92xx_amp_volume_put, \
957 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
958 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
959 }
960
9e05b7a3 961#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 962 { \
963 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
964 .name = "Input Source", \
9e05b7a3 965 .count = cnt, \
ca7c5a8b
ML		 966 .info = stac92xx_mux_enum_info, \
967 .get = stac92xx_mux_enum_get, \
968 .put = stac92xx_mux_enum_put, \
969 }
970
e1f0d669 971#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 972 { \
973 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
974 .name = "Analog Loopback", \
e1f0d669 975 .count = cnt, \
5f10c4a9
ML		 976 .info = stac92xx_aloopback_info, \
977 .get = stac92xx_aloopback_get, \
978 .put = stac92xx_aloopback_put, \
979 .private_value = verb_read | (verb_write << 16), \
980 }
981
c8b6bf9b 982static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 983 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
984 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 985 STAC_INPUT_SOURCE(1),
2f2f4251
M		 986 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
987 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 988 { } /* end */
989};
990
2a9c7816 991#define DELL_M6_MIXER 6
e1f0d669 992static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 993 /* start of config #1 */
e1f0d669
MR		 994 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
995 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
996
e1f0d669
MR		 997 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
998 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
999
2a9c7816
MR		 1000 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1001 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1002
1003 /* start of config #2 */
1004 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1005 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1006
e1f0d669
MR		 1007 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1008 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1009
2a9c7816
MR		 1010 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1011
1012 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1013 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1014
1015 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1016 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1017
e1f0d669
MR		 1018 { } /* end */
1019};
1020
1021static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1022 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1023
e1f0d669
MR		 1024 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1025 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1026
1027 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1028 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1029
1030 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1031 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1032
1033 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1034 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1035
1036 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1037 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1038
1039 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1040 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1041
1042 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1043 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1044 { } /* end */
1045};
1046
1047static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1048 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1049
e1f0d669
MR		 1050 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1051 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1052
1053 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1054 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1055
1056 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1057 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1058
1059 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1060 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1061
1062 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1063 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1064
1065 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1066 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1067
1068 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1069 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1070 { } /* end */
1071};
1072
d0513fc6
MR		 1073
1074static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1075 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1076 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1077
1078 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1079 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1080
74b7ff48
MR		 1081 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT),
1082 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT),
d0513fc6 1083
74b7ff48
MR		 1084 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT),
1085 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT),
d0513fc6 1086
74b7ff48
MR		 1087 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT),
1088 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT),
d0513fc6 1089
74b7ff48
MR		 1090 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT),
1091 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT),
d0513fc6
MR		 1092
1093 /*
74b7ff48
MR		 1094 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT),
1095 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT),
d0513fc6
MR		 1096 */
1097 { } /* end */
1098};
1099
541eee87 1100static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1101 STAC_INPUT_SOURCE(2),
4b33c767 1102 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1103
9b35947f
MR		 1104 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1105 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1106
1107 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1108 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1109 /* analog pc-beep replaced with digital beep support */
1110 /*
f7c5dda2
MR		 1111 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1112 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1113 */
f7c5dda2 1114
687cb98e
MR		 1115 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1116 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1117
687cb98e
MR		 1118 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1119 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1120
1121 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1122 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1123
1124 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1125 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1126 { } /* end */
1127};
1128
541eee87 1129static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1130 STAC_INPUT_SOURCE(2),
1131 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1132
541eee87
MR		 1133 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1134 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1135
1136 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1137 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1138 { } /* end */
1139};
1140
8e21c34c 1141static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI		 1142 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
1143 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
9e05b7a3 1144 STAC_INPUT_SOURCE(1),
8e21c34c 1145 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1146 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1147 { } /* end */
1148};
1149
9e05b7a3 1150static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1151 STAC_INPUT_SOURCE(2),
e1f0d669 1152 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1153
1154 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1155 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1156
1157 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1158 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1159 { } /* end */
1160};
1161
19039bd0 1162/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1163static struct snd_kcontrol_new stac922x_mixer[] = {
1164 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1165 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1166 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1167
1168 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1169 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1170 { } /* end */
1171};
1172
9e05b7a3 1173
d1d985f0 1174static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1175 STAC_INPUT_SOURCE(3),
e1f0d669 1176 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1177
9e05b7a3
ML		 1178 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1179 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1180
1181 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1182 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1183
1184 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1185 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1186 { } /* end */
1187};
1188
1697055e
TI		 1189static struct snd_kcontrol_new stac_dmux_mixer = {
1190 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1191 .name = "Digital Input Source",
1192 /* count set later */
1193 .info = stac92xx_dmux_enum_info,
1194 .get = stac92xx_dmux_enum_get,
1195 .put = stac92xx_dmux_enum_put,
1196};
1197
d9737751
MR		 1198static struct snd_kcontrol_new stac_smux_mixer = {
1199 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1200 .name = "IEC958 Playback Source",
d9737751
MR		 1201 /* count set later */
1202 .info = stac92xx_smux_enum_info,
1203 .get = stac92xx_smux_enum_get,
1204 .put = stac92xx_smux_enum_put,
1205};
1206
2134ea4f
TI		 1207static const char *slave_vols[] = {
1208 "Front Playback Volume",
1209 "Surround Playback Volume",
1210 "Center Playback Volume",
1211 "LFE Playback Volume",
1212 "Side Playback Volume",
1213 "Headphone Playback Volume",
1214 "Headphone Playback Volume",
1215 "Speaker Playback Volume",
1216 "External Speaker Playback Volume",
1217 "Speaker2 Playback Volume",
1218 NULL
1219};
1220
1221static const char *slave_sws[] = {
1222 "Front Playback Switch",
1223 "Surround Playback Switch",
1224 "Center Playback Switch",
1225 "LFE Playback Switch",
1226 "Side Playback Switch",
1227 "Headphone Playback Switch",
1228 "Headphone Playback Switch",
1229 "Speaker Playback Switch",
1230 "External Speaker Playback Switch",
1231 "Speaker2 Playback Switch",
edb54a55 1232 "IEC958 Playback Switch",
2134ea4f
TI		 1233 NULL
1234};
1235
603c4019 1236static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1237static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1238
2f2f4251
M		 1239static int stac92xx_build_controls(struct hda_codec *codec)
1240{
1241 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1242 struct auto_pin_cfg *cfg = &spec->autocfg;
1243 hda_nid_t nid;
2f2f4251 1244 int err;
c7d4b2fa 1245 int i;
2f2f4251
M		 1246
1247 err = snd_hda_add_new_ctls(codec, spec->mixer);
1248 if (err < 0)
1249 return err;
c7d4b2fa
M		 1250
1251 for (i = 0; i < spec->num_mixers; i++) {
1252 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1253 if (err < 0)
1254 return err;
1255 }
1697055e
TI		 1256 if (spec->num_dmuxes > 0) {
1257 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1258 err = snd_hda_ctl_add(codec,
1697055e
TI		 1259 snd_ctl_new1(&stac_dmux_mixer, codec));
1260 if (err < 0)
1261 return err;
1262 }
d9737751 1263 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1264 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1265 struct hda_input_mux *smux = &spec->private_smux;
1266 /* check for mute support on SPDIF out */
1267 if (wcaps & AC_WCAP_OUT_AMP) {
1268 smux->items[smux->num_items].label = "Off";
1269 smux->items[smux->num_items].index = 0;
1270 smux->num_items++;
1271 spec->spdif_mute = 1;
1272 }
d9737751 1273 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1274 err = snd_hda_ctl_add(codec,
d9737751
MR		 1275 snd_ctl_new1(&stac_smux_mixer, codec));
1276 if (err < 0)
1277 return err;
1278 }
c7d4b2fa 1279
dabbed6f
M		 1280 if (spec->multiout.dig_out_nid) {
1281 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1282 if (err < 0)
1283 return err;
9a08160b
TI		 1284 err = snd_hda_create_spdif_share_sw(codec,
1285 &spec->multiout);
1286 if (err < 0)
1287 return err;
1288 spec->multiout.share_spdif = 1;
dabbed6f 1289 }
da74ae3e 1290 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1291 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1292 if (err < 0)
1293 return err;
1294 }
2134ea4f
TI		 1295
1296 /* if we have no master control, let's create it */
1297 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1298 unsigned int vmaster_tlv[4];
2134ea4f 1299 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1300 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI		 1301 /* correct volume offset */
1302 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
2134ea4f 1303 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1304 vmaster_tlv, slave_vols);
2134ea4f
TI		 1305 if (err < 0)
1306 return err;
1307 }
1308 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1309 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1310 NULL, slave_sws);
1311 if (err < 0)
1312 return err;
1313 }
1314
603c4019 1315 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1316
1317 /* create jack input elements */
1318 if (spec->hp_detect) {
1319 for (i = 0; i < cfg->hp_outs; i++) {
1320 int type = SND_JACK_HEADPHONE;
1321 nid = cfg->hp_pins[i];
1322 /* jack detection */
1323 if (cfg->hp_outs == i)
1324 type |= SND_JACK_LINEOUT;
1325 err = stac92xx_add_jack(codec, nid, type);
1326 if (err < 0)
1327 return err;
1328 }
1329 }
1330 for (i = 0; i < cfg->line_outs; i++) {
1331 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1332 SND_JACK_LINEOUT);
1333 if (err < 0)
1334 return err;
1335 }
1336 for (i = 0; i < AUTO_PIN_LAST; i++) {
1337 nid = cfg->input_pins[i];
1338 if (nid) {
1339 err = stac92xx_add_jack(codec, nid,
1340 SND_JACK_MICROPHONE);
1341 if (err < 0)
1342 return err;
1343 }
1344 }
1345
dabbed6f 1346 return 0;
2f2f4251
M		 1347}
1348
403d1944 1349static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1350 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1351 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1352};
1353
58eec423
MCC		 1354static unsigned int gateway9200_m4_pin_configs[8] = {
1355 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1356 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1357};
1358static unsigned int gateway9200_m4_2_pin_configs[8] = {
1359 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1360 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1361};
1362
1363/*
dfe495d0
TI		 1364 STAC 9200 pin configs for
1365 102801A8
1366 102801DE
1367 102801E8
1368*/
1369static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1370 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1371 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1372};
1373
1374/*
1375 STAC 9200 pin configs for
1376 102801C0
1377 102801C1
1378*/
1379static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1380 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1381 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1382};
1383
1384/*
1385 STAC 9200 pin configs for
1386 102801C4 (Dell Dimension E310)
1387 102801C5
1388 102801C7
1389 102801D9
1390 102801DA
1391 102801E3
1392*/
1393static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1394 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1395 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1396};
1397
1398
1399/*
1400 STAC 9200-32 pin configs for
1401 102801B5 (Dell Inspiron 630m)
1402 102801D8 (Dell Inspiron 640m)
1403*/
1404static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1405 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1406 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1407};
1408
1409/*
1410 STAC 9200-32 pin configs for
1411 102801C2 (Dell Latitude D620)
1412 102801C8
1413 102801CC (Dell Latitude D820)
1414 102801D4
1415 102801D6
1416*/
1417static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1418 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1419 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1420};
1421
1422/*
1423 STAC 9200-32 pin configs for
1424 102801CE (Dell XPS M1710)
1425 102801CF (Dell Precision M90)
1426*/
1427static unsigned int dell9200_m23_pin_configs[8] = {
1428 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1429 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1430};
1431
1432/*
1433 STAC 9200-32 pin configs for
1434 102801C9
1435 102801CA
1436 102801CB (Dell Latitude 120L)
1437 102801D3
1438*/
1439static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1440 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1441 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1442};
1443
1444/*
1445 STAC 9200-32 pin configs for
1446 102801BD (Dell Inspiron E1505n)
1447 102801EE
1448 102801EF
1449*/
1450static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1451 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1452 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1453};
1454
1455/*
1456 STAC 9200-32 pin configs for
1457 102801F5 (Dell Inspiron 1501)
1458 102801F6
1459*/
1460static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1461 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1462 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1463};
1464
1465/*
1466 STAC 9200-32
1467 102801CD (Dell Inspiron E1705/9400)
1468*/
1469static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1470 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1471 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1472};
1473
bf277785
TD		 1474static unsigned int oqo9200_pin_configs[8] = {
1475 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1476 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1477};
1478
dfe495d0 1479
f5fcc13c
TI		 1480static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1481 [STAC_REF] = ref9200_pin_configs,
bf277785 1482 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1483 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1484 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1485 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1486 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1487 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1488 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1489 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1490 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1491 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1492 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1493 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1494 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1495 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1496};
1497
f5fcc13c
TI		 1498static const char *stac9200_models[STAC_9200_MODELS] = {
1499 [STAC_REF] = "ref",
bf277785 1500 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1501 [STAC_9200_DELL_D21] = "dell-d21",
1502 [STAC_9200_DELL_D22] = "dell-d22",
1503 [STAC_9200_DELL_D23] = "dell-d23",
1504 [STAC_9200_DELL_M21] = "dell-m21",
1505 [STAC_9200_DELL_M22] = "dell-m22",
1506 [STAC_9200_DELL_M23] = "dell-m23",
1507 [STAC_9200_DELL_M24] = "dell-m24",
1508 [STAC_9200_DELL_M25] = "dell-m25",
1509 [STAC_9200_DELL_M26] = "dell-m26",
1510 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1511 [STAC_9200_M4] = "gateway-m4",
1512 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1513 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1514};
1515
1516static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1517 /* SigmaTel reference board */
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1519 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1521 "DFI LanParty", STAC_REF),
e7377071 1522 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1524 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1526 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1528 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1530 "unknown Dell", STAC_9200_DELL_D22),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1532 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1534 "Dell Latitude D620", STAC_9200_DELL_M22),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1536 "unknown Dell", STAC_9200_DELL_D23),
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1538 "unknown Dell", STAC_9200_DELL_D23),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1540 "unknown Dell", STAC_9200_DELL_M22),
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1542 "unknown Dell", STAC_9200_DELL_M24),
1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1544 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1546 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1548 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1550 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1552 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1554 "Dell Precision M90", STAC_9200_DELL_M23),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1556 "unknown Dell", STAC_9200_DELL_M22),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1558 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1560 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1562 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1564 "unknown Dell", STAC_9200_DELL_D23),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1566 "unknown Dell", STAC_9200_DELL_D23),
1567 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1568 "unknown Dell", STAC_9200_DELL_D21),
1569 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1570 "unknown Dell", STAC_9200_DELL_D23),
1571 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1572 "unknown Dell", STAC_9200_DELL_D21),
1573 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1574 "unknown Dell", STAC_9200_DELL_M25),
1575 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1576 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1577 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1578 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1579 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1580 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1581 /* Panasonic */
117f257d 1582 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1583 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1584 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1585 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1586 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1587 /* OQO Mobile */
1588 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1589 {} /* terminator */
1590};
1591
8e21c34c
TD		 1592static unsigned int ref925x_pin_configs[8] = {
1593 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1594 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1595};
1596
9cb36c2a
MCC		 1597static unsigned int stac925xM1_pin_configs[8] = {
1598 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1599 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1600};
1601
9cb36c2a
MCC		 1602static unsigned int stac925xM1_2_pin_configs[8] = {
1603 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1604 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1605};
58eec423 1606
9cb36c2a
MCC		 1607static unsigned int stac925xM2_pin_configs[8] = {
1608 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1609 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1610};
1611
8e21c34c 1612static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1613 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1614 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1615};
1616
9cb36c2a
MCC		 1617static unsigned int stac925xM3_pin_configs[8] = {
1618 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1619 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1620};
58eec423 1621
9cb36c2a
MCC		 1622static unsigned int stac925xM5_pin_configs[8] = {
1623 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1624 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1625};
1626
9cb36c2a
MCC		 1627static unsigned int stac925xM6_pin_configs[8] = {
1628 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1629 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1630};
1631
1632static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1633 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1634 [STAC_M1] = stac925xM1_pin_configs,
1635 [STAC_M1_2] = stac925xM1_2_pin_configs,
1636 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1637 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1638 [STAC_M3] = stac925xM3_pin_configs,
1639 [STAC_M5] = stac925xM5_pin_configs,
1640 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1641};
1642
1643static const char *stac925x_models[STAC_925x_MODELS] = {
1644 [STAC_REF] = "ref",
9cb36c2a
MCC		 1645 [STAC_M1] = "m1",
1646 [STAC_M1_2] = "m1-2",
1647 [STAC_M2] = "m2",
8e21c34c 1648 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1649 [STAC_M3] = "m3",
1650 [STAC_M5] = "m5",
1651 [STAC_M6] = "m6",
8e21c34c
TD		 1652};
1653
9cb36c2a 1654static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1655 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1656 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1657 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1658 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1659 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1660 /* Not sure about the brand name for those */
1661 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1662 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1663 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1664 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1665 {} /* terminator */
8e21c34c
TD		 1666};
1667
1668static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1669 /* SigmaTel reference board */
1670 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1671 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1672 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1673
1674 /* Default table for unknown ID */
1675 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1676
8e21c34c
TD		 1677 {} /* terminator */
1678};
1679
a7662640 1680static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1681 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1682 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1683 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1684 0x01452050,
1685};
1686
1687static unsigned int dell_m6_pin_configs[13] = {
1688 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1689 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1690 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1691 0x4f0000f0,
e1f0d669
MR		 1692};
1693
1694static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1695 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1696 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1697 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1698 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1699 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1700};
1701
1702static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1703 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1704 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI		 1705 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1706 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1707 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1708 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1709};
1710
1711static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1712 /* SigmaTel reference board */
1713 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1714 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1715 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1716 "DFI LanParty", STAC_92HD73XX_REF),
a7662640 1717 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1718 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1719 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1720 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1721 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1722 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1723 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1724 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1725 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1726 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1727 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1728 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1729 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1730 "unknown Dell", STAC_DELL_M6_DMIC),
1731 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1732 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1733 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1734 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1735 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1736 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1737 {} /* terminator */
1738};
1739
d0513fc6
MR		 1740static unsigned int ref92hd83xxx_pin_configs[14] = {
1741 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1742 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1743 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1744 0x01451160, 0x98560170,
1745};
1746
1747static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1748 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1749 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
d0513fc6
MR		 1750};
1751
1752static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1753 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1754 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
d0513fc6
MR		 1755};
1756
1757static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1758 /* SigmaTel reference board */
1759 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1760 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 1761 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1762 "DFI LanParty", STAC_92HD83XXX_REF),
574f3c4f 1763 {} /* terminator */
d0513fc6
MR		 1764};
1765
0ffa9807 1766static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1767 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1768 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1769 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1770};
1771
0ffa9807 1772static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1773 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1774 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1775 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1776};
1777
0ffa9807 1778static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1779 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1780 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1781 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1782};
1783
3a7abfd2
MR		 1784static unsigned int dell_m4_3_pin_configs[11] = {
1785 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1786 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1787 0x40f000f0, 0x044413b0, 0x044413b0,
1788};
1789
e035b841
MR		 1790static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1791 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1792 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1793 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1794 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1795 [STAC_HP_M4] = NULL,
1b0652eb 1796 [STAC_HP_DV5] = NULL,
e035b841
MR		 1797};
1798
1799static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1800 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1801 [STAC_DELL_M4_1] = "dell-m4-1",
1802 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1803 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1804 [STAC_HP_M4] = "hp-m4",
1b0652eb 1805 [STAC_HP_DV5] = "hp-dv5",
e035b841
MR		 1806};
1807
1808static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1809 /* SigmaTel reference board */
1810 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1811 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 1812 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1813 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1814 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1815 "HP dv5", STAC_HP_M4),
1816 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1817 "HP dv7", STAC_HP_M4),
e0c0e943
TI		 1818 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f7,
1819 "HP dv4", STAC_HP_DV5),
69dfaefe
TI		 1820 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc,
1821 "HP dv7", STAC_HP_M4),
dafb70ce 1822 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603,
1b0652eb 1823 "HP dv5", STAC_HP_DV5),
9a9e2359
MR		 1824 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1825 "unknown HP", STAC_HP_M4),
a7662640
MR		 1826 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1827 "unknown Dell", STAC_DELL_M4_1),
1828 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1829 "unknown Dell", STAC_DELL_M4_1),
1830 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1831 "unknown Dell", STAC_DELL_M4_1),
1832 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1833 "unknown Dell", STAC_DELL_M4_1),
1834 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1835 "unknown Dell", STAC_DELL_M4_1),
1836 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1837 "unknown Dell", STAC_DELL_M4_1),
1838 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1839 "unknown Dell", STAC_DELL_M4_1),
1840 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1841 "unknown Dell", STAC_DELL_M4_2),
1842 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1843 "unknown Dell", STAC_DELL_M4_2),
1844 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1845 "unknown Dell", STAC_DELL_M4_2),
1846 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1847 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1848 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1849 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1850 {} /* terminator */
1851};
1852
403d1944
MP		 1853static unsigned int ref922x_pin_configs[10] = {
1854 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1855 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1856 0x40000100, 0x40000100,
1857};
1858
dfe495d0
TI		 1859/*
1860 STAC 922X pin configs for
1861 102801A7
1862 102801AB
1863 102801A9
1864 102801D1
1865 102801D2
1866*/
1867static unsigned int dell_922x_d81_pin_configs[10] = {
1868 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1869 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1870 0x01813122, 0x400001f2,
1871};
1872
1873/*
1874 STAC 922X pin configs for
1875 102801AC
1876 102801D0
1877*/
1878static unsigned int dell_922x_d82_pin_configs[10] = {
1879 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1880 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1881 0x01813122, 0x400001f1,
1882};
1883
1884/*
1885 STAC 922X pin configs for
1886 102801BF
1887*/
1888static unsigned int dell_922x_m81_pin_configs[10] = {
1889 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1890 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1891 0x40C003f1, 0x405003f0,
1892};
1893
1894/*
1895 STAC 9221 A1 pin configs for
1896 102801D7 (Dell XPS M1210)
1897*/
1898static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1899 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1900 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1901 0x508003f3, 0x405003f4,
1902};
1903
403d1944 1904static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1905 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1906 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1907 0x02a19120, 0x40000100,
1908};
1909
1910static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1911 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1912 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1913 0x02a19320, 0x40000100,
1914};
1915
5d5d3bc3
IZ		 1916static unsigned int intel_mac_v1_pin_configs[10] = {
1917 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1918 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1919 0x400000fc, 0x400000fb,
1920};
1921
1922static unsigned int intel_mac_v2_pin_configs[10] = {
1923 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1924 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1925 0x400000fc, 0x400000fb,
6f0778d8
NB		 1926};
1927
5d5d3bc3
IZ		 1928static unsigned int intel_mac_v3_pin_configs[10] = {
1929 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1930 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1931 0x400000fc, 0x400000fb,
1932};
1933
5d5d3bc3
IZ		 1934static unsigned int intel_mac_v4_pin_configs[10] = {
1935 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1936 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1937 0x400000fc, 0x400000fb,
1938};
1939
5d5d3bc3
IZ		 1940static unsigned int intel_mac_v5_pin_configs[10] = {
1941 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1942 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1943 0x400000fc, 0x400000fb,
0dae0f83
TI		 1944};
1945
8c650087
MCC		 1946static unsigned int ecs202_pin_configs[10] = {
1947 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1948 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1949 0x9037012e, 0x40e000f2,
1950};
76c08828 1951
19039bd0 1952static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1953 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1954 [STAC_D945GTP3] = d945gtp3_pin_configs,
1955 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1956 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1957 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1958 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1959 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1960 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1961 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1962 /* for backward compatibility */
5d5d3bc3
IZ		 1963 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1964 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1965 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1966 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1967 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1968 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1969 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1970 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1971 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1972 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1973 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1974};
1975
f5fcc13c
TI		 1976static const char *stac922x_models[STAC_922X_MODELS] = {
1977 [STAC_D945_REF] = "ref",
1978 [STAC_D945GTP5] = "5stack",
1979 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1980 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1981 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1982 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1983 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1984 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1985 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1986 /* for backward compatibility */
f5fcc13c 1987 [STAC_MACMINI] = "macmini",
3fc24d85 1988 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1989 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1990 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1991 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1992 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1993 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1994 [STAC_922X_DELL_D81] = "dell-d81",
1995 [STAC_922X_DELL_D82] = "dell-d82",
1996 [STAC_922X_DELL_M81] = "dell-m81",
1997 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1998};
1999
2000static struct snd_pci_quirk stac922x_cfg_tbl[] = {
2001 /* SigmaTel reference board */
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2003 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 2004 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2005 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 2006 /* Intel 945G based systems */
2007 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
2008 "Intel D945G", STAC_D945GTP3),
2009 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
2010 "Intel D945G", STAC_D945GTP3),
2011 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2012 "Intel D945G", STAC_D945GTP3),
2013 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2014 "Intel D945G", STAC_D945GTP3),
2015 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2016 "Intel D945G", STAC_D945GTP3),
2017 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2018 "Intel D945G", STAC_D945GTP3),
2019 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2020 "Intel D945G", STAC_D945GTP3),
2021 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2022 "Intel D945G", STAC_D945GTP3),
2023 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2024 "Intel D945G", STAC_D945GTP3),
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2026 "Intel D945G", STAC_D945GTP3),
2027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2028 "Intel D945G", STAC_D945GTP3),
2029 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2030 "Intel D945G", STAC_D945GTP3),
2031 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2032 "Intel D945G", STAC_D945GTP3),
2033 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2034 "Intel D945G", STAC_D945GTP3),
2035 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2036 "Intel D945G", STAC_D945GTP3),
2037 /* Intel D945G 5-stack systems */
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2039 "Intel D945G", STAC_D945GTP5),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2041 "Intel D945G", STAC_D945GTP5),
2042 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2043 "Intel D945G", STAC_D945GTP5),
2044 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2045 "Intel D945G", STAC_D945GTP5),
2046 /* Intel 945P based systems */
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2048 "Intel D945P", STAC_D945GTP3),
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2050 "Intel D945P", STAC_D945GTP3),
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2052 "Intel D945P", STAC_D945GTP3),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2054 "Intel D945P", STAC_D945GTP3),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2056 "Intel D945P", STAC_D945GTP3),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2058 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 2059 /* other intel */
2060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2061 "Intel D945", STAC_D945_REF),
f5fcc13c 2062 /* other systems */
536319af 2063 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2064 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2065 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2066 /* Dell systems */
2067 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2068 "unknown Dell", STAC_922X_DELL_D81),
2069 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2070 "unknown Dell", STAC_922X_DELL_D81),
2071 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2072 "unknown Dell", STAC_922X_DELL_D81),
2073 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2074 "unknown Dell", STAC_922X_DELL_D82),
2075 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2076 "unknown Dell", STAC_922X_DELL_M81),
2077 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2078 "unknown Dell", STAC_922X_DELL_D82),
2079 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2080 "unknown Dell", STAC_922X_DELL_D81),
2081 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2082 "unknown Dell", STAC_922X_DELL_D81),
2083 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2084 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 2085 /* ECS/PC Chips boards */
2086 SND_PCI_QUIRK(0x1019, 0x2144,
2087 "ECS/PC chips", STAC_ECS_202),
2088 SND_PCI_QUIRK(0x1019, 0x2608,
2089 "ECS/PC chips", STAC_ECS_202),
2090 SND_PCI_QUIRK(0x1019, 0x2633,
2091 "ECS/PC chips P17G/1333", STAC_ECS_202),
2092 SND_PCI_QUIRK(0x1019, 0x2811,
2093 "ECS/PC chips", STAC_ECS_202),
2094 SND_PCI_QUIRK(0x1019, 0x2812,
2095 "ECS/PC chips", STAC_ECS_202),
2096 SND_PCI_QUIRK(0x1019, 0x2813,
2097 "ECS/PC chips", STAC_ECS_202),
2098 SND_PCI_QUIRK(0x1019, 0x2814,
2099 "ECS/PC chips", STAC_ECS_202),
2100 SND_PCI_QUIRK(0x1019, 0x2815,
2101 "ECS/PC chips", STAC_ECS_202),
2102 SND_PCI_QUIRK(0x1019, 0x2816,
2103 "ECS/PC chips", STAC_ECS_202),
2104 SND_PCI_QUIRK(0x1019, 0x2817,
2105 "ECS/PC chips", STAC_ECS_202),
2106 SND_PCI_QUIRK(0x1019, 0x2818,
2107 "ECS/PC chips", STAC_ECS_202),
2108 SND_PCI_QUIRK(0x1019, 0x2819,
2109 "ECS/PC chips", STAC_ECS_202),
2110 SND_PCI_QUIRK(0x1019, 0x2820,
2111 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2112 {} /* terminator */
2113};
2114
3cc08dc6 2115static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2116 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2117 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2118 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2119 0x01c42190, 0x40000100,
3cc08dc6
MP		 2120};
2121
93ed1503 2122static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2123 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2124 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2125 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2126 0x40000100, 0x40000100
2127};
2128
93ed1503
TD		 2129static unsigned int d965_5st_pin_configs[14] = {
2130 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2131 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2132 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2133 0x40000100, 0x40000100
2134};
2135
4ff076e5
TD		 2136static unsigned int dell_3st_pin_configs[14] = {
2137 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2138 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2139 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2140 0x40c003fc, 0x40000100
2141};
2142
93ed1503 2143static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2144 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2145 [STAC_D965_REF] = ref927x_pin_configs,
2146 [STAC_D965_3ST] = d965_3st_pin_configs,
2147 [STAC_D965_5ST] = d965_5st_pin_configs,
2148 [STAC_DELL_3ST] = dell_3st_pin_configs,
2149 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2150};
2151
f5fcc13c 2152static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2153 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2154 [STAC_D965_REF] = "ref",
2155 [STAC_D965_3ST] = "3stack",
2156 [STAC_D965_5ST] = "5stack",
2157 [STAC_DELL_3ST] = "dell-3stack",
2158 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2159};
2160
2161static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2162 /* SigmaTel reference board */
2163 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2164 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 2165 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2166 "DFI LanParty", STAC_D965_REF),
81d3dbde 2167 /* Intel 946 based systems */
f5fcc13c
TI		 2168 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2169 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2170 /* 965 based 3 stack systems */
f5fcc13c
TI		 2171 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2172 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2173 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2174 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2175 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2176 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2177 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2178 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2179 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2181 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2182 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2183 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2184 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2185 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2186 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2187 /* Dell 3 stack systems */
8e9068b1 2188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2189 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2191 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2192 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2199 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2201 /* 965 based 5 stack systems */
f5fcc13c
TI		 2202 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2203 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2204 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2205 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2206 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2207 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2208 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2209 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2210 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2211 {} /* terminator */
2212};
2213
f3302a59
MP		 2214static unsigned int ref9205_pin_configs[12] = {
2215 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2216 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2217 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2218};
2219
dfe495d0
TI		 2220/*
2221 STAC 9205 pin configs for
2222 102801F1
2223 102801F2
2224 102801FC
2225 102801FD
2226 10280204
2227 1028021F
3fa2ef74 2228 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2229*/
2230static unsigned int dell_9205_m42_pin_configs[12] = {
2231 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2232 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2233 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2234};
2235
2236/*
2237 STAC 9205 pin configs for
2238 102801F9
2239 102801FA
2240 102801FE
2241 102801FF (Dell Precision M4300)
2242 10280206
2243 10280200
2244 10280201
2245*/
2246static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2247 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2248 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2249 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2250};
2251
dfe495d0 2252static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2253 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2254 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2255 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2256};
2257
f5fcc13c 2258static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2259 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2260 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2261 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2262 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2263 [STAC_9205_EAPD] = NULL,
f3302a59
MP		 2264};
2265
f5fcc13c
TI		 2266static const char *stac9205_models[STAC_9205_MODELS] = {
2267 [STAC_9205_REF] = "ref",
dfe495d0 2268 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2269 [STAC_9205_DELL_M43] = "dell-m43",
2270 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2271 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI		 2272};
2273
2274static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2275 /* SigmaTel reference board */
2276 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2277 "DFI LanParty", STAC_9205_REF),
577aa2c1
MR		 2278 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2279 "DFI LanParty", STAC_9205_REF),
d9a4268e 2280 /* Dell */
dfe495d0
TI		 2281 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2282 "unknown Dell", STAC_9205_DELL_M42),
2283 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2284 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2285 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2286 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2287 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2288 "Dell Precision", STAC_9205_DELL_M43),
2289 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2290 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2291 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2292 "unknown Dell", STAC_9205_DELL_M42),
2293 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2294 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2295 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2296 "Dell Precision", STAC_9205_DELL_M43),
2297 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2298 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2299 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2300 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2301 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2302 "Dell Precision", STAC_9205_DELL_M43),
2303 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2304 "Dell Precision", STAC_9205_DELL_M43),
2305 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2306 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2307 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2308 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2309 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2310 "Dell Vostro 1500", STAC_9205_DELL_M42),
d9a4268e
TI		 2311 /* Gateway */
2312 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP		 2313 {} /* terminator */
2314};
2315
11b44bbd
RF		 2316static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2317{
2318 int i;
2319 struct sigmatel_spec *spec = codec->spec;
2320
af9f341a
TI		 2321 kfree(spec->pin_configs);
2322 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2323 GFP_KERNEL);
2324 if (!spec->pin_configs)
2325 return -ENOMEM;
11b44bbd
RF		 2326
2327 for (i = 0; i < spec->num_pins; i++) {
2328 hda_nid_t nid = spec->pin_nids[i];
2329 unsigned int pin_cfg;
2330
2331 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2332 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2333 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2334 nid, pin_cfg);
af9f341a 2335 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF		 2336 }
2337
2338 return 0;
2339}
2340
87d48363
MR		 2341static void stac92xx_set_config_reg(struct hda_codec *codec,
2342 hda_nid_t pin_nid, unsigned int pin_config)
2343{
2344 int i;
2345 snd_hda_codec_write(codec, pin_nid, 0,
2346 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2347 pin_config & 0x000000ff);
2348 snd_hda_codec_write(codec, pin_nid, 0,
2349 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2350 (pin_config & 0x0000ff00) >> 8);
2351 snd_hda_codec_write(codec, pin_nid, 0,
2352 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2353 (pin_config & 0x00ff0000) >> 16);
2354 snd_hda_codec_write(codec, pin_nid, 0,
2355 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2356 pin_config >> 24);
2357 i = snd_hda_codec_read(codec, pin_nid, 0,
2358 AC_VERB_GET_CONFIG_DEFAULT,
2359 0x00);
2360 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2361 pin_nid, i);
2362}
2363
2f2f4251
M		 2364static void stac92xx_set_config_regs(struct hda_codec *codec)
2365{
2366 int i;
2367 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2368
87d48363
MR		 2369 if (!spec->pin_configs)
2370 return;
11b44bbd 2371
87d48363
MR		 2372 for (i = 0; i < spec->num_pins; i++)
2373 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2374 spec->pin_configs[i]);
2f2f4251 2375}
2f2f4251 2376
af9f341a
TI		 2377static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2378{
2379 struct sigmatel_spec *spec = codec->spec;
2380
2381 if (!pins)
2382 return stac92xx_save_bios_config_regs(codec);
2383
2384 kfree(spec->pin_configs);
2385 spec->pin_configs = kmemdup(pins,
2386 spec->num_pins * sizeof(*pins),
2387 GFP_KERNEL);
2388 if (!spec->pin_configs)
2389 return -ENOMEM;
2390
2391 stac92xx_set_config_regs(codec);
2392 return 0;
2393}
2394
2395static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2396 unsigned int cfg)
2397{
2398 struct sigmatel_spec *spec = codec->spec;
2399 int i;
2400
2401 for (i = 0; i < spec->num_pins; i++) {
2402 if (spec->pin_nids[i] == nid) {
2403 spec->pin_configs[i] = cfg;
2404 stac92xx_set_config_reg(codec, nid, cfg);
2405 break;
2406 }
2407 }
2408}
2409
dabbed6f 2410/*
c7d4b2fa 2411 * Analog playback callbacks
dabbed6f 2412 */
c7d4b2fa
M		 2413static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2414 struct hda_codec *codec,
c8b6bf9b 2415 struct snd_pcm_substream *substream)
2f2f4251 2416{
dabbed6f 2417 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2418 if (spec->stream_delay)
2419 msleep(spec->stream_delay);
9a08160b
TI		 2420 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2421 hinfo);
2f2f4251
M		 2422}
2423
2f2f4251
M		 2424static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2425 struct hda_codec *codec,
2426 unsigned int stream_tag,
2427 unsigned int format,
c8b6bf9b 2428 struct snd_pcm_substream *substream)
2f2f4251
M		 2429{
2430 struct sigmatel_spec *spec = codec->spec;
403d1944 2431 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2432}
2433
2434static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2435 struct hda_codec *codec,
c8b6bf9b 2436 struct snd_pcm_substream *substream)
2f2f4251
M		 2437{
2438 struct sigmatel_spec *spec = codec->spec;
2439 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2440}
2441
dabbed6f
M		 2442/*
2443 * Digital playback callbacks
2444 */
2445static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2446 struct hda_codec *codec,
c8b6bf9b 2447 struct snd_pcm_substream *substream)
dabbed6f
M		 2448{
2449 struct sigmatel_spec *spec = codec->spec;
2450 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2451}
2452
2453static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2454 struct hda_codec *codec,
c8b6bf9b 2455 struct snd_pcm_substream *substream)
dabbed6f
M		 2456{
2457 struct sigmatel_spec *spec = codec->spec;
2458 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2459}
2460
6b97eb45
TI		 2461static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2462 struct hda_codec *codec,
2463 unsigned int stream_tag,
2464 unsigned int format,
2465 struct snd_pcm_substream *substream)
2466{
2467 struct sigmatel_spec *spec = codec->spec;
2468 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2469 stream_tag, format, substream);
2470}
2471
dabbed6f 2472
2f2f4251
M		 2473/*
2474 * Analog capture callbacks
2475 */
2476static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2477 struct hda_codec *codec,
2478 unsigned int stream_tag,
2479 unsigned int format,
c8b6bf9b 2480 struct snd_pcm_substream *substream)
2f2f4251
M		 2481{
2482 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2483 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2484
8daaaa97
MR		 2485 if (spec->powerdown_adcs) {
2486 msleep(40);
8c2f767b 2487 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2488 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2489 }
2490 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2491 return 0;
2492}
2493
2494static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2495 struct hda_codec *codec,
c8b6bf9b 2496 struct snd_pcm_substream *substream)
2f2f4251
M		 2497{
2498 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2499 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2500
8daaaa97
MR		 2501 snd_hda_codec_cleanup_stream(codec, nid);
2502 if (spec->powerdown_adcs)
8c2f767b 2503 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2504 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2505 return 0;
2506}
2507
dabbed6f
M		 2508static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2509 .substreams = 1,
2510 .channels_min = 2,
2511 .channels_max = 2,
2512 /* NID is set in stac92xx_build_pcms */
2513 .ops = {
2514 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2515 .close = stac92xx_dig_playback_pcm_close,
2516 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2517 },
2518};
2519
2520static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2521 .substreams = 1,
2522 .channels_min = 2,
2523 .channels_max = 2,
2524 /* NID is set in stac92xx_build_pcms */
2525};
2526
2f2f4251
M		 2527static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2528 .substreams = 1,
2529 .channels_min = 2,
c7d4b2fa 2530 .channels_max = 8,
2f2f4251
M		 2531 .nid = 0x02, /* NID to query formats and rates */
2532 .ops = {
2533 .open = stac92xx_playback_pcm_open,
2534 .prepare = stac92xx_playback_pcm_prepare,
2535 .cleanup = stac92xx_playback_pcm_cleanup
2536 },
2537};
2538
3cc08dc6
MP		 2539static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2540 .substreams = 1,
2541 .channels_min = 2,
2542 .channels_max = 2,
2543 .nid = 0x06, /* NID to query formats and rates */
2544 .ops = {
2545 .open = stac92xx_playback_pcm_open,
2546 .prepare = stac92xx_playback_pcm_prepare,
2547 .cleanup = stac92xx_playback_pcm_cleanup
2548 },
2549};
2550
2f2f4251 2551static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2552 .channels_min = 2,
2553 .channels_max = 2,
9e05b7a3 2554 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2555 .ops = {
2556 .prepare = stac92xx_capture_pcm_prepare,
2557 .cleanup = stac92xx_capture_pcm_cleanup
2558 },
2559};
2560
2561static int stac92xx_build_pcms(struct hda_codec *codec)
2562{
2563 struct sigmatel_spec *spec = codec->spec;
2564 struct hda_pcm *info = spec->pcm_rec;
2565
2566 codec->num_pcms = 1;
2567 codec->pcm_info = info;
2568
c7d4b2fa 2569 info->name = "STAC92xx Analog";
2f2f4251 2570 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2571 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2572 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2573 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2574
2575 if (spec->alt_switch) {
2576 codec->num_pcms++;
2577 info++;
2578 info->name = "STAC92xx Analog Alt";
2579 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2580 }
2f2f4251 2581
dabbed6f
M		 2582 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2583 codec->num_pcms++;
2584 info++;
2585 info->name = "STAC92xx Digital";
8c441982 2586 info->pcm_type = spec->autocfg.dig_out_type;
dabbed6f
M		 2587 if (spec->multiout.dig_out_nid) {
2588 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2589 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2590 }
2591 if (spec->dig_in_nid) {
2592 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2593 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2594 }
2595 }
2596
2f2f4251
M		 2597 return 0;
2598}
2599
c960a03b
TI		 2600static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2601{
2602 unsigned int pincap = snd_hda_param_read(codec, nid,
2603 AC_PAR_PIN_CAP);
2604 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2605 if (pincap & AC_PINCAP_VREF_100)
2606 return AC_PINCTL_VREF_100;
2607 if (pincap & AC_PINCAP_VREF_80)
2608 return AC_PINCTL_VREF_80;
2609 if (pincap & AC_PINCAP_VREF_50)
2610 return AC_PINCTL_VREF_50;
2611 if (pincap & AC_PINCAP_VREF_GRD)
2612 return AC_PINCTL_VREF_GRD;
2613 return 0;
2614}
2615
403d1944
MP		 2616static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2617
2618{
82beb8fd
TI		 2619 snd_hda_codec_write_cache(codec, nid, 0,
2620 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2621}
2622
7c2ba97b
MR		 2623#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2624
2625static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2626 struct snd_ctl_elem_value *ucontrol)
2627{
2628 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2629 struct sigmatel_spec *spec = codec->spec;
2630
d7a89436 2631 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2632 return 0;
2633}
2634
c6e4c666
TI		 2635static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2636 unsigned char type);
2637
7c2ba97b
MR		 2638static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2639 struct snd_ctl_elem_value *ucontrol)
2640{
2641 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2642 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2643 int nid = kcontrol->private_value;
2644
2645 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2646
2647 /* check to be sure that the ports are upto date with
2648 * switch changes
2649 */
c6e4c666 2650 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR		 2651
2652 return 1;
2653}
2654
a5ce8890 2655#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2656
2657static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2658{
2659 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2660 struct sigmatel_spec *spec = codec->spec;
2661 int io_idx = kcontrol-> private_value & 0xff;
2662
2663 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2664 return 0;
2665}
2666
2667static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2668{
2669 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2670 struct sigmatel_spec *spec = codec->spec;
2671 hda_nid_t nid = kcontrol->private_value >> 8;
2672 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2673 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2674
2675 spec->io_switch[io_idx] = val;
2676
2677 if (val)
2678 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2679 else {
2680 unsigned int pinctl = AC_PINCTL_IN_EN;
2681 if (io_idx) /* set VREF for mic */
2682 pinctl |= stac92xx_get_vref(codec, nid);
2683 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2684 }
40c1d308
JZ		 2685
2686 /* check the auto-mute again: we need to mute/unmute the speaker
2687 * appropriately according to the pin direction
2688 */
2689 if (spec->hp_detect)
c6e4c666 2690 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2691
403d1944
MP		 2692 return 1;
2693}
2694
0fb87bb4
ML		 2695#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2696
2697static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2698 struct snd_ctl_elem_value *ucontrol)
2699{
2700 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2701 struct sigmatel_spec *spec = codec->spec;
2702
2703 ucontrol->value.integer.value[0] = spec->clfe_swap;
2704 return 0;
2705}
2706
2707static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2708 struct snd_ctl_elem_value *ucontrol)
2709{
2710 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2711 struct sigmatel_spec *spec = codec->spec;
2712 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2713 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2714
68ea7b2f 2715 if (spec->clfe_swap == val)
0fb87bb4
ML		 2716 return 0;
2717
68ea7b2f 2718 spec->clfe_swap = val;
0fb87bb4
ML		 2719
2720 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2721 spec->clfe_swap ? 0x4 : 0x0);
2722
2723 return 1;
2724}
2725
7c2ba97b
MR		 2726#define STAC_CODEC_HP_SWITCH(xname) \
2727 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2728 .name = xname, \
2729 .index = 0, \
2730 .info = stac92xx_hp_switch_info, \
2731 .get = stac92xx_hp_switch_get, \
2732 .put = stac92xx_hp_switch_put, \
2733 }
2734
403d1944
MP		 2735#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2736 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2737 .name = xname, \
2738 .index = 0, \
2739 .info = stac92xx_io_switch_info, \
2740 .get = stac92xx_io_switch_get, \
2741 .put = stac92xx_io_switch_put, \
2742 .private_value = xpval, \
2743 }
2744
0fb87bb4
ML		 2745#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2746 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2747 .name = xname, \
2748 .index = 0, \
2749 .info = stac92xx_clfe_switch_info, \
2750 .get = stac92xx_clfe_switch_get, \
2751 .put = stac92xx_clfe_switch_put, \
2752 .private_value = xpval, \
2753 }
403d1944 2754
c7d4b2fa
M		 2755enum {
2756 STAC_CTL_WIDGET_VOL,
2757 STAC_CTL_WIDGET_MUTE,
09a99959 2758 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2759 STAC_CTL_WIDGET_AMP_MUX,
2760 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2761 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2762 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2763 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2764};
2765
c8b6bf9b 2766static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2767 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2768 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2769 STAC_MONO_MUX,
89385035
MR		 2770 STAC_AMP_MUX,
2771 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2772 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2773 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2774 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2775};
2776
2777/* add dynamic controls */
4d4e9bb3
TI		 2778static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2779 struct snd_kcontrol_new *ktemp,
2780 int idx, const char *name,
2781 unsigned long val)
c7d4b2fa 2782{
c8b6bf9b 2783 struct snd_kcontrol_new *knew;
c7d4b2fa 2784
603c4019
TI		 2785 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2786 knew = snd_array_new(&spec->kctls);
2787 if (!knew)
2788 return -ENOMEM;
4d4e9bb3 2789 *knew = *ktemp;
4682eee0 2790 knew->index = idx;
82fe0c58 2791 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2792 if (!knew->name)
c7d4b2fa
M		 2793 return -ENOMEM;
2794 knew->private_value = val;
c7d4b2fa
M		 2795 return 0;
2796}
2797
4d4e9bb3
TI		 2798static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2799 int type, int idx, const char *name,
2800 unsigned long val)
2801{
2802 return stac92xx_add_control_temp(spec,
2803 &stac92xx_control_templates[type],
2804 idx, name, val);
2805}
2806
4682eee0
MR		 2807
2808/* add dynamic controls */
4d4e9bb3
TI		 2809static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2810 const char *name, unsigned long val)
4682eee0
MR		 2811{
2812 return stac92xx_add_control_idx(spec, type, 0, name, val);
2813}
2814
c21ca4a8
TI		 2815/* check whether the line-input can be used as line-out */
2816static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2817{
2818 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2819 struct auto_pin_cfg *cfg = &spec->autocfg;
2820 hda_nid_t nid;
2821 unsigned int pincap;
8e9068b1 2822
c21ca4a8
TI		 2823 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2824 return 0;
2825 nid = cfg->input_pins[AUTO_PIN_LINE];
2826 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2827 if (pincap & AC_PINCAP_OUT)
2828 return nid;
2829 return 0;
2830}
403d1944 2831
c21ca4a8
TI		 2832/* check whether the mic-input can be used as line-out */
2833static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2834{
2835 struct sigmatel_spec *spec = codec->spec;
2836 struct auto_pin_cfg *cfg = &spec->autocfg;
2837 unsigned int def_conf, pincap;
2838 unsigned int mic_pin;
2839
2840 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2841 return 0;
2842 mic_pin = AUTO_PIN_MIC;
2843 for (;;) {
2844 hda_nid_t nid = cfg->input_pins[mic_pin];
2845 def_conf = snd_hda_codec_read(codec, nid, 0,
2846 AC_VERB_GET_CONFIG_DEFAULT, 0);
2847 /* some laptops have an internal analog microphone
2848 * which can't be used as a output */
2849 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2850 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2851 if (pincap & AC_PINCAP_OUT)
2852 return nid;
403d1944 2853 }
c21ca4a8
TI		 2854 if (mic_pin == AUTO_PIN_MIC)
2855 mic_pin = AUTO_PIN_FRONT_MIC;
2856 else
2857 break;
403d1944 2858 }
403d1944
MP		 2859 return 0;
2860}
2861
7b043899
SL		 2862static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2863{
2864 int i;
2865
2866 for (i = 0; i < spec->multiout.num_dacs; i++) {
2867 if (spec->multiout.dac_nids[i] == nid)
2868 return 1;
2869 }
2870
2871 return 0;
2872}
2873
c21ca4a8
TI		 2874static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2875{
2876 int i;
2877 if (is_in_dac_nids(spec, nid))
2878 return 1;
2879 for (i = 0; i < spec->autocfg.hp_outs; i++)
2880 if (spec->hp_dacs[i] == nid)
2881 return 1;
2882 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2883 if (spec->speaker_dacs[i] == nid)
2884 return 1;
2885 return 0;
2886}
2887
2888static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2889{
2890 struct sigmatel_spec *spec = codec->spec;
2891 int j, conn_len;
2892 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2893 unsigned int wcaps, wtype;
2894
2895 conn_len = snd_hda_get_connections(codec, nid, conn,
2896 HDA_MAX_CONNECTIONS);
2897 for (j = 0; j < conn_len; j++) {
2898 wcaps = snd_hda_param_read(codec, conn[j],
2899 AC_PAR_AUDIO_WIDGET_CAP);
2900 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2901 /* we check only analog outputs */
2902 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2903 continue;
2904 /* if this route has a free DAC, assign it */
2905 if (!check_all_dac_nids(spec, conn[j])) {
2906 if (conn_len > 1) {
2907 /* select this DAC in the pin's input mux */
2908 snd_hda_codec_write_cache(codec, nid, 0,
2909 AC_VERB_SET_CONNECT_SEL, j);
2910 }
2911 return conn[j];
2912 }
2913 }
2914 return 0;
2915}
2916
2917static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2918static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2919
3cc08dc6 2920/*
7b043899
SL		 2921 * Fill in the dac_nids table from the parsed pin configuration
2922 * This function only works when every pin in line_out_pins[]
2923 * contains atleast one DAC in its connection list. Some 92xx
2924 * codecs are not connected directly to a DAC, such as the 9200
2925 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2926 */
c21ca4a8 2927static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 2928{
2929 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2930 struct auto_pin_cfg *cfg = &spec->autocfg;
2931 int i;
2932 hda_nid_t nid, dac;
7b043899 2933
c7d4b2fa
M		 2934 for (i = 0; i < cfg->line_outs; i++) {
2935 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 2936 dac = get_unassigned_dac(codec, nid);
2937 if (!dac) {
df802952
TI		 2938 if (spec->multiout.num_dacs > 0) {
2939 /* we have already working output pins,
2940 * so let's drop the broken ones again
2941 */
2942 cfg->line_outs = spec->multiout.num_dacs;
2943 break;
2944 }
7b043899
SL		 2945 /* error out, no available DAC found */
2946 snd_printk(KERN_ERR
2947 "%s: No available DAC for pin 0x%x\n",
2948 __func__, nid);
2949 return -ENODEV;
2950 }
c21ca4a8
TI		 2951 add_spec_dacs(spec, dac);
2952 }
7b043899 2953
c21ca4a8
TI		 2954 /* add line-in as output */
2955 nid = check_line_out_switch(codec);
2956 if (nid) {
2957 dac = get_unassigned_dac(codec, nid);
2958 if (dac) {
2959 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2960 nid, cfg->line_outs);
2961 cfg->line_out_pins[cfg->line_outs] = nid;
2962 cfg->line_outs++;
2963 spec->line_switch = nid;
2964 add_spec_dacs(spec, dac);
2965 }
2966 }
2967 /* add mic as output */
2968 nid = check_mic_out_switch(codec);
2969 if (nid) {
2970 dac = get_unassigned_dac(codec, nid);
2971 if (dac) {
2972 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2973 nid, cfg->line_outs);
2974 cfg->line_out_pins[cfg->line_outs] = nid;
2975 cfg->line_outs++;
2976 spec->mic_switch = nid;
2977 add_spec_dacs(spec, dac);
2978 }
2979 }
c7d4b2fa 2980
c21ca4a8
TI		 2981 for (i = 0; i < cfg->hp_outs; i++) {
2982 nid = cfg->hp_pins[i];
2983 dac = get_unassigned_dac(codec, nid);
2984 if (dac) {
2985 if (!spec->multiout.hp_nid)
2986 spec->multiout.hp_nid = dac;
2987 else
2988 add_spec_extra_dacs(spec, dac);
7b043899 2989 }
c21ca4a8
TI		 2990 spec->hp_dacs[i] = dac;
2991 }
2992
2993 for (i = 0; i < cfg->speaker_outs; i++) {
2994 nid = cfg->speaker_pins[i];
2995 dac = get_unassigned_dac(codec, nid);
2996 if (dac)
2997 add_spec_extra_dacs(spec, dac);
2998 spec->speaker_dacs[i] = dac;
7b043899 2999 }
c7d4b2fa 3000
c21ca4a8 3001 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 3002 spec->multiout.num_dacs,
3003 spec->multiout.dac_nids[0],
3004 spec->multiout.dac_nids[1],
3005 spec->multiout.dac_nids[2],
3006 spec->multiout.dac_nids[3],
3007 spec->multiout.dac_nids[4]);
c21ca4a8 3008
c7d4b2fa
M		 3009 return 0;
3010}
3011
eb06ed8f 3012/* create volume control/switch for the given prefx type */
7c7767eb
TI		 3013static int create_controls(struct hda_codec *codec, const char *pfx,
3014 hda_nid_t nid, int chs)
eb06ed8f 3015{
7c7767eb 3016 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI		 3017 char name[32];
3018 int err;
3019
7c7767eb
TI		 3020 if (!spec->check_volume_offset) {
3021 unsigned int caps, step, nums, db_scale;
3022 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3023 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3024 AC_AMPCAP_STEP_SIZE_SHIFT;
3025 step = (step + 1) * 25; /* in .01dB unit */
3026 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3027 AC_AMPCAP_NUM_STEPS_SHIFT;
3028 db_scale = nums * step;
3029 /* if dB scale is over -64dB, and finer enough,
3030 * let's reduce it to half
3031 */
3032 if (db_scale > 6400 && nums >= 0x1f)
3033 spec->volume_offset = nums / 2;
3034 spec->check_volume_offset = 1;
3035 }
3036
eb06ed8f
TI		 3037 sprintf(name, "%s Playback Volume", pfx);
3038 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
7c7767eb
TI		 3039 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3040 spec->volume_offset));
eb06ed8f
TI		 3041 if (err < 0)
3042 return err;
3043 sprintf(name, "%s Playback Switch", pfx);
3044 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
3045 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3046 if (err < 0)
3047 return err;
3048 return 0;
3049}
3050
ae0afd81
MR		 3051static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3052{
c21ca4a8 3053 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3054 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3055 return 1;
3056 } else {
3057 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3058 spec->multiout.num_dacs++;
3059 }
3060 return 0;
3061}
3062
c21ca4a8 3063static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3064{
c21ca4a8
TI		 3065 int i;
3066 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3067 if (!spec->multiout.extra_out_nid[i]) {
3068 spec->multiout.extra_out_nid[i] = nid;
3069 return 0;
3070 }
3071 }
3072 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3073 return 1;
ae0afd81
MR		 3074}
3075
76624534
TI		 3076static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid)
3077{
3078 int i;
3079
3080 if (spec->autocfg.line_outs != 1)
3081 return 0;
3082 if (spec->multiout.hp_nid == nid)
3083 return 0;
3084 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++)
3085 if (spec->multiout.extra_out_nid[i] == nid)
3086 return 0;
3087 return 1;
3088}
3089
c7d4b2fa 3090/* add playback controls from the parsed DAC table */
0fb87bb4 3091static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 3092 const struct auto_pin_cfg *cfg)
c7d4b2fa 3093{
76624534 3094 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI		 3095 static const char *chname[4] = {
3096 "Front", "Surround", NULL /*CLFE*/, "Side"
3097 };
d21995e3 3098 hda_nid_t nid = 0;
91589232
TI		 3099 int i, err;
3100 unsigned int wid_caps;
0fb87bb4 3101
c21ca4a8 3102 for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
c7d4b2fa 3103 nid = spec->multiout.dac_nids[i];
c7d4b2fa
M		 3104 if (i == 2) {
3105 /* Center/LFE */
7c7767eb 3106 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3107 if (err < 0)
c7d4b2fa 3108 return err;
7c7767eb 3109 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3110 if (err < 0)
c7d4b2fa 3111 return err;
0fb87bb4
ML		 3112
3113 wid_caps = get_wcaps(codec, nid);
3114
3115 if (wid_caps & AC_WCAP_LR_SWAP) {
3116 err = stac92xx_add_control(spec,
3117 STAC_CTL_WIDGET_CLFE_SWITCH,
3118 "Swap Center/LFE Playback Switch", nid);
3119
3120 if (err < 0)
3121 return err;
3122 }
3123
c7d4b2fa 3124 } else {
76624534
TI		 3125 const char *name = chname[i];
3126 /* if it's a single DAC, assign a better name */
3127 if (!i && is_unique_dac(spec, nid)) {
3128 switch (cfg->line_out_type) {
3129 case AUTO_PIN_HP_OUT:
3130 name = "Headphone";
3131 break;
3132 case AUTO_PIN_SPEAKER_OUT:
3133 name = "Speaker";
3134 break;
3135 }
3136 }
7c7767eb 3137 err = create_controls(codec, name, nid, 3);
eb06ed8f 3138 if (err < 0)
c7d4b2fa
M		 3139 return err;
3140 }
3141 }
3142
a9cb5c90 3143 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3144 err = stac92xx_add_control(spec,
3145 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3146 "Headphone as Line Out Switch",
3147 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3148 if (err < 0)
3149 return err;
3150 }
3151
b5895dc8 3152 if (spec->line_switch) {
c21ca4a8
TI		 3153 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3154 "Line In as Output Switch",
3155 spec->line_switch << 8);
3156 if (err < 0)
3157 return err;
b5895dc8 3158 }
403d1944 3159
b5895dc8 3160 if (spec->mic_switch) {
c21ca4a8
TI		 3161 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3162 "Mic as Output Switch",
3163 (spec->mic_switch << 8) | 1);
3164 if (err < 0)
3165 return err;
b5895dc8 3166 }
403d1944 3167
c7d4b2fa
M		 3168 return 0;
3169}
3170
eb06ed8f
TI		 3171/* add playback controls for Speaker and HP outputs */
3172static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3173 struct auto_pin_cfg *cfg)
3174{
3175 struct sigmatel_spec *spec = codec->spec;
3176 hda_nid_t nid;
c21ca4a8 3177 int i, err, nums;
eb06ed8f 3178
c21ca4a8 3179 nums = 0;
eb06ed8f 3180 for (i = 0; i < cfg->hp_outs; i++) {
c21ca4a8
TI		 3181 static const char *pfxs[] = {
3182 "Headphone", "Headphone2", "Headphone3",
3183 };
eb06ed8f
TI		 3184 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3185 if (wid_caps & AC_WCAP_UNSOL_CAP)
3186 spec->hp_detect = 1;
c21ca4a8 3187 if (nums >= ARRAY_SIZE(pfxs))
c7d4b2fa 3188 continue;
c21ca4a8
TI		 3189 nid = spec->hp_dacs[i];
3190 if (!nid)
eb06ed8f 3191 continue;
7c7767eb 3192 err = create_controls(codec, pfxs[nums++], nid, 3);
c21ca4a8
TI		 3193 if (err < 0)
3194 return err;
1b290a51 3195 }
c21ca4a8
TI		 3196 nums = 0;
3197 for (i = 0; i < cfg->speaker_outs; i++) {
eb06ed8f
TI		 3198 static const char *pfxs[] = {
3199 "Speaker", "External Speaker", "Speaker2",
3200 };
c21ca4a8
TI		 3201 if (nums >= ARRAY_SIZE(pfxs))
3202 continue;
3203 nid = spec->speaker_dacs[i];
3204 if (!nid)
3205 continue;
7c7767eb 3206 err = create_controls(codec, pfxs[nums++], nid, 3);
eb06ed8f
TI		 3207 if (err < 0)
3208 return err;
3209 }
c7d4b2fa
M		 3210 return 0;
3211}
3212
b22b4821 3213/* labels for mono mux outputs */
d0513fc6
MR		 3214static const char *stac92xx_mono_labels[4] = {
3215 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3216};
3217
3218/* create mono mux for mono out on capable codecs */
3219static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3220{
3221 struct sigmatel_spec *spec = codec->spec;
3222 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3223 int i, num_cons;
3224 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3225
3226 num_cons = snd_hda_get_connections(codec,
3227 spec->mono_nid,
3228 con_lst,
3229 HDA_MAX_NUM_INPUTS);
3230 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3231 return -EINVAL;
3232
3233 for (i = 0; i < num_cons; i++) {
3234 mono_mux->items[mono_mux->num_items].label =
3235 stac92xx_mono_labels[i];
3236 mono_mux->items[mono_mux->num_items].index = i;
3237 mono_mux->num_items++;
3238 }
09a99959
MR		 3239
3240 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3241 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3242}
3243
89385035
MR		 3244/* labels for amp mux outputs */
3245static const char *stac92xx_amp_labels[3] = {
4b33c767 3246 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3247};
3248
3249/* create amp out controls mux on capable codecs */
3250static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3251{
3252 struct sigmatel_spec *spec = codec->spec;
3253 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3254 int i, err;
3255
2a9c7816 3256 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3257 amp_mux->items[amp_mux->num_items].label =
3258 stac92xx_amp_labels[i];
3259 amp_mux->items[amp_mux->num_items].index = i;
3260 amp_mux->num_items++;
3261 }
3262
2a9c7816
MR		 3263 if (spec->num_amps > 1) {
3264 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3265 "Amp Selector Capture Switch", 0);
3266 if (err < 0)
3267 return err;
3268 }
89385035
MR		 3269 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3270 "Amp Capture Volume",
3271 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3272}
3273
3274
1cd2224c
MR		 3275/* create PC beep volume controls */
3276static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3277 hda_nid_t nid)
3278{
3279 struct sigmatel_spec *spec = codec->spec;
3280 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3281 int err;
3282
3283 /* check for mute support for the the amp */
3284 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3285 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3286 "PC Beep Playback Switch",
3287 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3288 if (err < 0)
3289 return err;
3290 }
3291
3292 /* check to see if there is volume support for the amp */
3293 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3294 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3295 "PC Beep Playback Volume",
3296 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3297 if (err < 0)
3298 return err;
3299 }
3300 return 0;
3301}
3302
4d4e9bb3
TI		 3303#ifdef CONFIG_SND_HDA_INPUT_BEEP
3304#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3305
3306static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3307 struct snd_ctl_elem_value *ucontrol)
3308{
3309 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3310 ucontrol->value.integer.value[0] = codec->beep->enabled;
3311 return 0;
3312}
3313
3314static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3315 struct snd_ctl_elem_value *ucontrol)
3316{
3317 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3318 int enabled = !!ucontrol->value.integer.value[0];
3319 if (codec->beep->enabled != enabled) {
3320 codec->beep->enabled = enabled;
3321 return 1;
3322 }
3323 return 0;
3324}
3325
3326static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3327 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3328 .info = stac92xx_dig_beep_switch_info,
3329 .get = stac92xx_dig_beep_switch_get,
3330 .put = stac92xx_dig_beep_switch_put,
3331};
3332
3333static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3334{
3335 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3336 0, "PC Beep Playback Switch", 0);
3337}
3338#endif
3339
4682eee0
MR		 3340static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3341{
3342 struct sigmatel_spec *spec = codec->spec;
3343 int wcaps, nid, i, err = 0;
3344
3345 for (i = 0; i < spec->num_muxes; i++) {
3346 nid = spec->mux_nids[i];
3347 wcaps = get_wcaps(codec, nid);
3348
3349 if (wcaps & AC_WCAP_OUT_AMP) {
3350 err = stac92xx_add_control_idx(spec,
3351 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3352 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3353 if (err < 0)
3354 return err;
3355 }
3356 }
3357 return 0;
3358};
3359
d9737751 3360static const char *stac92xx_spdif_labels[3] = {
65973632 3361 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3362};
3363
3364static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3365{
3366 struct sigmatel_spec *spec = codec->spec;
3367 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3368 const char **labels = spec->spdif_labels;
d9737751 3369 int i, num_cons;
65973632 3370 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3371
3372 num_cons = snd_hda_get_connections(codec,
3373 spec->smux_nids[0],
3374 con_lst,
3375 HDA_MAX_NUM_INPUTS);
65973632 3376 if (!num_cons)
d9737751
MR		 3377 return -EINVAL;
3378
65973632
MR		 3379 if (!labels)
3380 labels = stac92xx_spdif_labels;
3381
d9737751 3382 for (i = 0; i < num_cons; i++) {
65973632 3383 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3384 spdif_mux->items[spdif_mux->num_items].index = i;
3385 spdif_mux->num_items++;
3386 }
3387
3388 return 0;
3389}
3390
8b65727b 3391/* labels for dmic mux inputs */
ddc2cec4 3392static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3393 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3394 "Digital Mic 3", "Digital Mic 4"
3395};
3396
3397/* create playback/capture controls for input pins on dmic capable codecs */
3398static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3399 const struct auto_pin_cfg *cfg)
3400{
3401 struct sigmatel_spec *spec = codec->spec;
3402 struct hda_input_mux *dimux = &spec->private_dimux;
3403 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3404 int err, i, j;
3405 char name[32];
8b65727b
MP		 3406
3407 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3408 dimux->items[dimux->num_items].index = 0;
3409 dimux->num_items++;
3410
3411 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3412 hda_nid_t nid;
8b65727b
MP		 3413 int index;
3414 int num_cons;
0678accd 3415 unsigned int wcaps;
8b65727b
MP		 3416 unsigned int def_conf;
3417
3418 def_conf = snd_hda_codec_read(codec,
3419 spec->dmic_nids[i],
3420 0,
3421 AC_VERB_GET_CONFIG_DEFAULT,
3422 0);
3423 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3424 continue;
3425
0678accd 3426 nid = spec->dmic_nids[i];
8b65727b 3427 num_cons = snd_hda_get_connections(codec,
e1f0d669 3428 spec->dmux_nids[0],
8b65727b
MP		 3429 con_lst,
3430 HDA_MAX_NUM_INPUTS);
3431 for (j = 0; j < num_cons; j++)
0678accd 3432 if (con_lst[j] == nid) {
8b65727b
MP		 3433 index = j;
3434 goto found;
3435 }
3436 continue;
3437found:
d0513fc6
MR		 3438 wcaps = get_wcaps(codec, nid) &
3439 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3440
d0513fc6 3441 if (wcaps) {
0678accd
MR		 3442 sprintf(name, "%s Capture Volume",
3443 stac92xx_dmic_labels[dimux->num_items]);
3444
3445 err = stac92xx_add_control(spec,
3446 STAC_CTL_WIDGET_VOL,
3447 name,
d0513fc6
MR		 3448 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3449 (wcaps & AC_WCAP_OUT_AMP) ?
3450 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3451 if (err < 0)
3452 return err;
3453 }
3454
8b65727b
MP		 3455 dimux->items[dimux->num_items].label =
3456 stac92xx_dmic_labels[dimux->num_items];
3457 dimux->items[dimux->num_items].index = index;
3458 dimux->num_items++;
3459 }
3460
3461 return 0;
3462}
3463
c7d4b2fa
M		 3464/* create playback/capture controls for input pins */
3465static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3466{
3467 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3468 struct hda_input_mux *imux = &spec->private_imux;
3469 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3470 int i, j, k;
3471
3472 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3473 int index;
3474
3475 if (!cfg->input_pins[i])
3476 continue;
3477 index = -1;
3478 for (j = 0; j < spec->num_muxes; j++) {
3479 int num_cons;
3480 num_cons = snd_hda_get_connections(codec,
3481 spec->mux_nids[j],
3482 con_lst,
3483 HDA_MAX_NUM_INPUTS);
3484 for (k = 0; k < num_cons; k++)
3485 if (con_lst[k] == cfg->input_pins[i]) {
3486 index = k;
3487 goto found;
3488 }
c7d4b2fa 3489 }
314634bc
TI		 3490 continue;
3491 found:
3492 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3493 imux->items[imux->num_items].index = index;
3494 imux->num_items++;
c7d4b2fa
M		 3495 }
3496
7b043899 3497 if (imux->num_items) {
62fe78e9
SR		 3498 /*
3499 * Set the current input for the muxes.
3500 * The STAC9221 has two input muxes with identical source
3501 * NID lists. Hopefully this won't get confused.
3502 */
3503 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3504 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3505 AC_VERB_SET_CONNECT_SEL,
3506 imux->items[0].index);
62fe78e9
SR		 3507 }
3508 }
3509
c7d4b2fa
M		 3510 return 0;
3511}
3512
c7d4b2fa
M		 3513static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3514{
3515 struct sigmatel_spec *spec = codec->spec;
3516 int i;
3517
3518 for (i = 0; i < spec->autocfg.line_outs; i++) {
3519 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3520 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3521 }
3522}
3523
3524static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3525{
3526 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3527 int i;
c7d4b2fa 3528
eb06ed8f
TI		 3529 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3530 hda_nid_t pin;
3531 pin = spec->autocfg.hp_pins[i];
3532 if (pin) /* connect to front */
3533 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3534 }
3535 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3536 hda_nid_t pin;
3537 pin = spec->autocfg.speaker_pins[i];
3538 if (pin) /* connect to front */
3539 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3540 }
c7d4b2fa
M		 3541}
3542
3cc08dc6 3543static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3544{
3545 struct sigmatel_spec *spec = codec->spec;
3546 int err;
3547
8b65727b
MP		 3548 if ((err = snd_hda_parse_pin_def_config(codec,
3549 &spec->autocfg,
3550 spec->dmic_nids)) < 0)
c7d4b2fa 3551 return err;
82bc955f 3552 if (! spec->autocfg.line_outs)
869264c4 3553 return 0; /* can't find valid pin config */
19039bd0 3554
bcecd9bd
JZ		 3555 /* If we have no real line-out pin and multiple hp-outs, HPs should
3556 * be set up as multi-channel outputs.
3557 */
3558 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3559 spec->autocfg.hp_outs > 1) {
3560 /* Copy hp_outs to line_outs, backup line_outs in
3561 * speaker_outs so that the following routines can handle
3562 * HP pins as primary outputs.
3563 */
c21ca4a8 3564 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3565 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3566 sizeof(spec->autocfg.line_out_pins));
3567 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3568 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3569 sizeof(spec->autocfg.hp_pins));
3570 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3571 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3572 spec->autocfg.hp_outs = 0;
bcecd9bd 3573 }
09a99959 3574 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3575 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3576 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3577 u32 caps = query_amp_caps(codec,
3578 spec->autocfg.mono_out_pin, dir);
3579 hda_nid_t conn_list[1];
3580
3581 /* get the mixer node and then the mono mux if it exists */
3582 if (snd_hda_get_connections(codec,
3583 spec->autocfg.mono_out_pin, conn_list, 1) &&
3584 snd_hda_get_connections(codec, conn_list[0],
3585 conn_list, 1)) {
3586
3587 int wcaps = get_wcaps(codec, conn_list[0]);
3588 int wid_type = (wcaps & AC_WCAP_TYPE)
3589 >> AC_WCAP_TYPE_SHIFT;
3590 /* LR swap check, some stac925x have a mux that
3591 * changes the DACs output path instead of the
3592 * mono-mux path.
3593 */
3594 if (wid_type == AC_WID_AUD_SEL &&
3595 !(wcaps & AC_WCAP_LR_SWAP))
3596 spec->mono_nid = conn_list[0];
3597 }
d0513fc6
MR		 3598 if (dir) {
3599 hda_nid_t nid = spec->autocfg.mono_out_pin;
3600
3601 /* most mono outs have a least a mute/unmute switch */
3602 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3603 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3604 "Mono Playback Switch",
3605 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3606 if (err < 0)
3607 return err;
d0513fc6
MR		 3608 /* check for volume support for the amp */
3609 if ((caps & AC_AMPCAP_NUM_STEPS)
3610 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3611 err = stac92xx_add_control(spec,
3612 STAC_CTL_WIDGET_VOL,
3613 "Mono Playback Volume",
3614 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3615 if (err < 0)
3616 return err;
3617 }
09a99959
MR		 3618 }
3619
3620 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3621 AC_PINCTL_OUT_EN);
3622 }
bcecd9bd 3623
c21ca4a8
TI		 3624 if (!spec->multiout.num_dacs) {
3625 err = stac92xx_auto_fill_dac_nids(codec);
3626 if (err < 0)
19039bd0 3627 return err;
c9280d68
TI		 3628 err = stac92xx_auto_create_multi_out_ctls(codec,
3629 &spec->autocfg);
3630 if (err < 0)
3631 return err;
c21ca4a8 3632 }
c7d4b2fa 3633
1cd2224c
MR		 3634 /* setup analog beep controls */
3635 if (spec->anabeep_nid > 0) {
3636 err = stac92xx_auto_create_beep_ctls(codec,
3637 spec->anabeep_nid);
3638 if (err < 0)
3639 return err;
3640 }
3641
3642 /* setup digital beep controls and input device */
3643#ifdef CONFIG_SND_HDA_INPUT_BEEP
3644 if (spec->digbeep_nid > 0) {
3645 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3646 unsigned int caps;
1cd2224c
MR		 3647
3648 err = stac92xx_auto_create_beep_ctls(codec, nid);
3649 if (err < 0)
3650 return err;
3651 err = snd_hda_attach_beep_device(codec, nid);
3652 if (err < 0)
3653 return err;
4d4e9bb3
TI		 3654 /* if no beep switch is available, make its own one */
3655 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3656 if (codec->beep &&
3657 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3658 err = stac92xx_beep_switch_ctl(codec);
3659 if (err < 0)
3660 return err;
3661 }
1cd2224c
MR		 3662 }
3663#endif
3664
0fb87bb4
ML		 3665 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3666
3667 if (err < 0)
3668 return err;
3669
3670 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3671
3672 if (err < 0)
c7d4b2fa
M		 3673 return err;
3674
b22b4821
MR		 3675 if (spec->mono_nid > 0) {
3676 err = stac92xx_auto_create_mono_output_ctls(codec);
3677 if (err < 0)
3678 return err;
3679 }
2a9c7816 3680 if (spec->num_amps > 0) {
89385035
MR		 3681 err = stac92xx_auto_create_amp_output_ctls(codec);
3682 if (err < 0)
3683 return err;
3684 }
2a9c7816 3685 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3686 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3687 &spec->autocfg)) < 0)
3688 return err;
4682eee0
MR		 3689 if (spec->num_muxes > 0) {
3690 err = stac92xx_auto_create_mux_input_ctls(codec);
3691 if (err < 0)
3692 return err;
3693 }
d9737751
MR		 3694 if (spec->num_smuxes > 0) {
3695 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3696 if (err < 0)
3697 return err;
3698 }
8b65727b 3699
c7d4b2fa 3700 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3701 if (spec->multiout.max_channels > 2)
c7d4b2fa 3702 spec->surr_switch = 1;
c7d4b2fa 3703
82bc955f 3704 if (spec->autocfg.dig_out_pin)
3cc08dc6 3705 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3706 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3707 spec->dig_in_nid = dig_in;
c7d4b2fa 3708
603c4019
TI		 3709 if (spec->kctls.list)
3710 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3711
3712 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3713 if (!spec->dinput_mux)
3714 spec->dinput_mux = &spec->private_dimux;
d9737751 3715 spec->sinput_mux = &spec->private_smux;
b22b4821 3716 spec->mono_mux = &spec->private_mono_mux;
89385035 3717 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3718 return 1;
3719}
3720
82bc955f
TI		 3721/* add playback controls for HP output */
3722static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3723 struct auto_pin_cfg *cfg)
3724{
3725 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3726 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3727 unsigned int wid_caps;
3728
3729 if (! pin)
3730 return 0;
3731
3732 wid_caps = get_wcaps(codec, pin);
505cb341 3733 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3734 spec->hp_detect = 1;
82bc955f
TI		 3735
3736 return 0;
3737}
3738
160ea0dc
RF		 3739/* add playback controls for LFE output */
3740static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3741 struct auto_pin_cfg *cfg)
3742{
3743 struct sigmatel_spec *spec = codec->spec;
3744 int err;
3745 hda_nid_t lfe_pin = 0x0;
3746 int i;
3747
3748 /*
3749 * search speaker outs and line outs for a mono speaker pin
3750 * with an amp. If one is found, add LFE controls
3751 * for it.
3752 */
3753 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3754 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3755 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3756 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3757 if (wcaps == AC_WCAP_OUT_AMP)
3758 /* found a mono speaker with an amp, must be lfe */
3759 lfe_pin = pin;
3760 }
3761
3762 /* if speaker_outs is 0, then speakers may be in line_outs */
3763 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3764 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3765 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3766 unsigned int defcfg;
8b551785 3767 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3768 AC_VERB_GET_CONFIG_DEFAULT,
3769 0x00);
8b551785 3770 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3771 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3772 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3773 if (wcaps == AC_WCAP_OUT_AMP)
3774 /* found a mono speaker with an amp,
3775 must be lfe */
3776 lfe_pin = pin;
3777 }
3778 }
3779 }
3780
3781 if (lfe_pin) {
7c7767eb 3782 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3783 if (err < 0)
3784 return err;
3785 }
3786
3787 return 0;
3788}
3789
c7d4b2fa
M		 3790static int stac9200_parse_auto_config(struct hda_codec *codec)
3791{
3792 struct sigmatel_spec *spec = codec->spec;
3793 int err;
3794
df694daa 3795 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3796 return err;
3797
3798 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3799 return err;
3800
82bc955f
TI		 3801 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3802 return err;
3803
160ea0dc
RF		 3804 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3805 return err;
3806
355a0ec4
TI		 3807 if (spec->num_muxes > 0) {
3808 err = stac92xx_auto_create_mux_input_ctls(codec);
3809 if (err < 0)
3810 return err;
3811 }
3812
82bc955f 3813 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3814 spec->multiout.dig_out_nid = 0x05;
82bc955f 3815 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3816 spec->dig_in_nid = 0x04;
c7d4b2fa 3817
603c4019
TI		 3818 if (spec->kctls.list)
3819 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3820
3821 spec->input_mux = &spec->private_imux;
8b65727b 3822 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3823
3824 return 1;
3825}
3826
62fe78e9
SR		 3827/*
3828 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3829 * funky external mute control using GPIO pins.
3830 */
3831
76e1ddfb 3832static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3833 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3834{
3835 unsigned int gpiostate, gpiomask, gpiodir;
3836
3837 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3838 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3839 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3840
3841 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3842 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3843 gpiomask |= mask;
62fe78e9
SR		 3844
3845 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3846 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3847 gpiodir |= dir_mask;
62fe78e9 3848
76e1ddfb 3849 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3850 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3851
3852 snd_hda_codec_write(codec, codec->afg, 0,
3853 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3854 snd_hda_codec_read(codec, codec->afg, 0,
3855 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3856
3857 msleep(1);
3858
76e1ddfb
TI		 3859 snd_hda_codec_read(codec, codec->afg, 0,
3860 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3861}
3862
74aeaabc
MR		 3863static int stac92xx_add_jack(struct hda_codec *codec,
3864 hda_nid_t nid, int type)
3865{
e4973e1e 3866#ifdef CONFIG_SND_JACK
74aeaabc
MR		 3867 struct sigmatel_spec *spec = codec->spec;
3868 struct sigmatel_jack *jack;
3869 int def_conf = snd_hda_codec_read(codec, nid,
3870 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3871 int connectivity = get_defcfg_connect(def_conf);
3872 char name[32];
3873
3874 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3875 return 0;
3876
3877 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3878 jack = snd_array_new(&spec->jacks);
3879 if (!jack)
3880 return -ENOMEM;
3881 jack->nid = nid;
3882 jack->type = type;
3883
3884 sprintf(name, "%s at %s %s Jack",
3885 snd_hda_get_jack_type(def_conf),
3886 snd_hda_get_jack_connectivity(def_conf),
3887 snd_hda_get_jack_location(def_conf));
3888
3889 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI		 3890#else
3891 return 0;
3892#endif
74aeaabc
MR		 3893}
3894
c6e4c666
TI		 3895static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3896 unsigned char type, int data)
74aeaabc
MR		 3897{
3898 struct sigmatel_event *event;
3899
3900 snd_array_init(&spec->events, sizeof(*event), 32);
3901 event = snd_array_new(&spec->events);
3902 if (!event)
3903 return -ENOMEM;
3904 event->nid = nid;
c6e4c666
TI		 3905 event->type = type;
3906 event->tag = spec->events.used;
74aeaabc
MR		 3907 event->data = data;
3908
c6e4c666 3909 return event->tag;
74aeaabc
MR		 3910}
3911
c6e4c666
TI		 3912static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3913 hda_nid_t nid, unsigned char type)
74aeaabc
MR		 3914{
3915 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 3916 struct sigmatel_event *event = spec->events.list;
3917 int i;
3918
3919 for (i = 0; i < spec->events.used; i++, event++) {
3920 if (event->nid == nid && event->type == type)
3921 return event;
74aeaabc 3922 }
c6e4c666 3923 return NULL;
74aeaabc
MR		 3924}
3925
c6e4c666
TI		 3926static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3927 unsigned char tag)
314634bc 3928{
c6e4c666
TI		 3929 struct sigmatel_spec *spec = codec->spec;
3930 struct sigmatel_event *event = spec->events.list;
3931 int i;
3932
3933 for (i = 0; i < spec->events.used; i++, event++) {
3934 if (event->tag == tag)
3935 return event;
74aeaabc 3936 }
c6e4c666
TI		 3937 return NULL;
3938}
3939
3940static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3941 unsigned int type)
3942{
3943 struct sigmatel_event *event;
3944 int tag;
3945
3946 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3947 return;
3948 event = stac_get_event(codec, nid, type);
3949 if (event)
3950 tag = event->tag;
3951 else
3952 tag = stac_add_event(codec->spec, nid, type, 0);
3953 if (tag < 0)
3954 return;
3955 snd_hda_codec_write_cache(codec, nid, 0,
3956 AC_VERB_SET_UNSOLICITED_ENABLE,
3957 AC_USRSP_EN | tag);
314634bc
TI		 3958}
3959
a64135a2
MR		 3960static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3961{
3962 int i;
3963 for (i = 0; i < cfg->hp_outs; i++)
3964 if (cfg->hp_pins[i] == nid)
3965 return 1; /* nid is a HP-Out */
3966
3967 return 0; /* nid is not a HP-Out */
3968};
3969
b76c850f
MR		 3970static void stac92xx_power_down(struct hda_codec *codec)
3971{
3972 struct sigmatel_spec *spec = codec->spec;
3973
3974 /* power down inactive DACs */
3975 hda_nid_t *dac;
3976 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 3977 if (!check_all_dac_nids(spec, *dac))
8c2f767b 3978 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 3979 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3980}
3981
f73d3585
TI		 3982static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3983 int enable);
3984
c7d4b2fa
M		 3985static int stac92xx_init(struct hda_codec *codec)
3986{
3987 struct sigmatel_spec *spec = codec->spec;
82bc955f 3988 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3989 unsigned int gpio;
e4973e1e 3990 int i;
c7d4b2fa 3991
c7d4b2fa
M		 3992 snd_hda_sequence_write(codec, spec->init);
3993
8daaaa97
MR		 3994 /* power down adcs initially */
3995 if (spec->powerdown_adcs)
3996 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 3997 snd_hda_codec_write(codec,
8daaaa97
MR		 3998 spec->adc_nids[i], 0,
3999 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI		 4000
4001 /* set up GPIO */
4002 gpio = spec->gpio_data;
4003 /* turn on EAPD statically when spec->eapd_switch isn't set.
4004 * otherwise, unsol event will turn it on/off dynamically
4005 */
4006 if (!spec->eapd_switch)
4007 gpio |= spec->eapd_mask;
4008 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4009
82bc955f
TI		 4010 /* set up pins */
4011 if (spec->hp_detect) {
505cb341 4012 /* Enable unsolicited responses on the HP widget */
74aeaabc 4013 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4014 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4015 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4016 }
0a07acaf
TI		 4017 /* force to enable the first line-out; the others are set up
4018 * in unsol_event
4019 */
4020 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4021 AC_PINCTL_OUT_EN);
82bc955f 4022 /* fake event to set up pins */
c6e4c666
TI		 4023 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4024 STAC_HP_EVENT);
82bc955f
TI		 4025 } else {
4026 stac92xx_auto_init_multi_out(codec);
4027 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 4028 for (i = 0; i < cfg->hp_outs; i++)
4029 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI		 4030 }
4031 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 4032 hda_nid_t nid = cfg->input_pins[i];
4033 if (nid) {
12dde4c6 4034 unsigned int pinctl, conf;
4f1e6bc3
TI		 4035 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
4036 /* for mic pins, force to initialize */
4037 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI		 4038 pinctl |= AC_PINCTL_IN_EN;
4039 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI		 4040 } else {
4041 pinctl = snd_hda_codec_read(codec, nid, 0,
4042 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4043 /* if PINCTL already set then skip */
12dde4c6
TI		 4044 if (!(pinctl & AC_PINCTL_IN_EN)) {
4045 pinctl |= AC_PINCTL_IN_EN;
4046 stac92xx_auto_set_pinctl(codec, nid,
4047 pinctl);
4048 }
4049 }
4050 conf = snd_hda_codec_read(codec, nid, 0,
4051 AC_VERB_GET_CONFIG_DEFAULT, 0);
4052 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4053 enable_pin_detect(codec, nid,
4054 STAC_INSERT_EVENT);
4055 stac_issue_unsol_event(codec, nid,
4056 STAC_INSERT_EVENT);
4f1e6bc3 4057 }
c960a03b 4058 }
82bc955f 4059 }
a64135a2
MR		 4060 for (i = 0; i < spec->num_dmics; i++)
4061 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4062 AC_PINCTL_IN_EN);
f73d3585
TI		 4063 if (cfg->dig_out_pin)
4064 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
4065 AC_PINCTL_OUT_EN);
4066 if (cfg->dig_in_pin)
4067 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4068 AC_PINCTL_IN_EN);
a64135a2 4069 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4070 hda_nid_t nid = spec->pwr_nids[i];
4071 int pinctl, def_conf;
f73d3585 4072
eb632128
TI		 4073 /* power on when no jack detection is available */
4074 if (!spec->hp_detect) {
4075 stac_toggle_power_map(codec, nid, 1);
4076 continue;
4077 }
4078
4079 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI		 4080 continue; /* already has an unsol event */
4081
4082 pinctl = snd_hda_codec_read(codec, nid, 0,
4083 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4084 /* outputs are only ports capable of power management
4085 * any attempts on powering down a input port cause the
4086 * referenced VREF to act quirky.
4087 */
eb632128
TI		 4088 if (pinctl & AC_PINCTL_IN_EN) {
4089 stac_toggle_power_map(codec, nid, 1);
a64135a2 4090 continue;
eb632128 4091 }
f73d3585
TI		 4092 def_conf = snd_hda_codec_read(codec, nid, 0,
4093 AC_VERB_GET_CONFIG_DEFAULT, 0);
4094 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4095 /* skip any ports that don't have jacks since presence
4096 * detection is useless */
f73d3585
TI		 4097 if (def_conf != AC_JACK_PORT_COMPLEX) {
4098 if (def_conf != AC_JACK_PORT_NONE)
4099 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4100 continue;
f73d3585 4101 }
12dde4c6
TI		 4102 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
4103 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4104 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
4105 }
a64135a2 4106 }
b76c850f
MR		 4107 if (spec->dac_list)
4108 stac92xx_power_down(codec);
c7d4b2fa
M		 4109 return 0;
4110}
4111
74aeaabc
MR		 4112static void stac92xx_free_jacks(struct hda_codec *codec)
4113{
e4973e1e 4114#ifdef CONFIG_SND_JACK
b94d3539 4115 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4116 struct sigmatel_spec *spec = codec->spec;
b94d3539 4117 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 4118 struct sigmatel_jack *jacks = spec->jacks.list;
4119 int i;
4120 for (i = 0; i < spec->jacks.used; i++)
4121 snd_device_free(codec->bus->card, &jacks[i].jack);
4122 }
4123 snd_array_free(&spec->jacks);
e4973e1e 4124#endif
74aeaabc
MR		 4125}
4126
603c4019
TI		 4127static void stac92xx_free_kctls(struct hda_codec *codec)
4128{
4129 struct sigmatel_spec *spec = codec->spec;
4130
4131 if (spec->kctls.list) {
4132 struct snd_kcontrol_new *kctl = spec->kctls.list;
4133 int i;
4134 for (i = 0; i < spec->kctls.used; i++)
4135 kfree(kctl[i].name);
4136 }
4137 snd_array_free(&spec->kctls);
4138}
4139
2f2f4251
M		 4140static void stac92xx_free(struct hda_codec *codec)
4141{
c7d4b2fa 4142 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4143
4144 if (! spec)
4145 return;
4146
af9f341a 4147 kfree(spec->pin_configs);
74aeaabc
MR		 4148 stac92xx_free_jacks(codec);
4149 snd_array_free(&spec->events);
11b44bbd 4150
c7d4b2fa 4151 kfree(spec);
1cd2224c 4152 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4153}
4154
4e55096e
M		 4155static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4156 unsigned int flag)
4157{
8ce84198
TI		 4158 unsigned int old_ctl, pin_ctl;
4159
4160 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4161 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4162
f9acba43
TI		 4163 if (pin_ctl & AC_PINCTL_IN_EN) {
4164 /*
4165 * we need to check the current set-up direction of
4166 * shared input pins since they can be switched via
4167 * "xxx as Output" mixer switch
4168 */
4169 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4170 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4171 return;
4172 }
4173
8ce84198 4174 old_ctl = pin_ctl;
7b043899
SL		 4175 /* if setting pin direction bits, clear the current
4176 direction bits first */
4177 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4178 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4179
8ce84198
TI		 4180 pin_ctl |= flag;
4181 if (old_ctl != pin_ctl)
4182 snd_hda_codec_write_cache(codec, nid, 0,
4183 AC_VERB_SET_PIN_WIDGET_CONTROL,
4184 pin_ctl);
4e55096e
M		 4185}
4186
4187static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4188 unsigned int flag)
4189{
4190 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4191 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI		 4192 if (pin_ctl & flag)
4193 snd_hda_codec_write_cache(codec, nid, 0,
4194 AC_VERB_SET_PIN_WIDGET_CONTROL,
4195 pin_ctl & ~flag);
4e55096e
M		 4196}
4197
e6e3ea25 4198static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4199{
4200 if (!nid)
4201 return 0;
4202 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI		 4203 & (1 << 31))
4204 return 1;
314634bc
TI		 4205 return 0;
4206}
4207
d7a89436
TI		 4208/* return non-zero if the hp-pin of the given array index isn't
4209 * a jack-detection target
4210 */
4211static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4212{
4213 struct auto_pin_cfg *cfg = &spec->autocfg;
4214
4215 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4216 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4217 return 1;
c21ca4a8 4218 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4219 return 1;
4220 /* ignore if the pin is set as line-out */
4221 if (cfg->hp_pins[i] == spec->hp_switch)
4222 return 1;
4223 return 0;
4224}
4225
c6e4c666 4226static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4227{
4228 struct sigmatel_spec *spec = codec->spec;
4229 struct auto_pin_cfg *cfg = &spec->autocfg;
4230 int i, presence;
4231
eb06ed8f 4232 presence = 0;
4fe5195c
MR		 4233 if (spec->gpio_mute)
4234 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4235 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4236
eb06ed8f 4237 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4238 if (presence)
4239 break;
d7a89436
TI		 4240 if (no_hp_sensing(spec, i))
4241 continue;
e6e3ea25
TI		 4242 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4243 if (presence) {
4244 unsigned int pinctl;
4245 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4246 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4247 if (pinctl & AC_PINCTL_IN_EN)
4248 presence = 0; /* mic- or line-input */
4249 }
eb06ed8f 4250 }
4e55096e
M		 4251
4252 if (presence) {
d7a89436 4253 /* disable lineouts */
7c2ba97b 4254 if (spec->hp_switch)
d7a89436
TI		 4255 stac92xx_reset_pinctl(codec, spec->hp_switch,
4256 AC_PINCTL_OUT_EN);
4e55096e
M		 4257 for (i = 0; i < cfg->line_outs; i++)
4258 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4259 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4260 for (i = 0; i < cfg->speaker_outs; i++)
4261 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4262 AC_PINCTL_OUT_EN);
c0cea0d0 4263 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4264 stac_gpio_set(codec, spec->gpio_mask,
4265 spec->gpio_dir, spec->gpio_data &
4266 ~spec->eapd_mask);
4e55096e 4267 } else {
d7a89436 4268 /* enable lineouts */
7c2ba97b 4269 if (spec->hp_switch)
d7a89436
TI		 4270 stac92xx_set_pinctl(codec, spec->hp_switch,
4271 AC_PINCTL_OUT_EN);
4e55096e
M		 4272 for (i = 0; i < cfg->line_outs; i++)
4273 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4274 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4275 for (i = 0; i < cfg->speaker_outs; i++)
4276 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4277 AC_PINCTL_OUT_EN);
c0cea0d0 4278 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4279 stac_gpio_set(codec, spec->gpio_mask,
4280 spec->gpio_dir, spec->gpio_data |
4281 spec->eapd_mask);
4e55096e 4282 }
d7a89436
TI		 4283 /* toggle hp outs */
4284 for (i = 0; i < cfg->hp_outs; i++) {
4285 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4286 if (no_hp_sensing(spec, i))
4287 continue;
4288 if (presence)
4289 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4290#if 0 /* FIXME */
4291/* Resetting the pinctl like below may lead to (a sort of) regressions
4292 * on some devices since they use the HP pin actually for line/speaker
4293 * outs although the default pin config shows a different pin (that is
4294 * wrong and useless).
4295 *
4296 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4297 * But, disabling the code below just works around it, and I'm too tired of
4298 * bug reports with such devices...
4299 */
d7a89436
TI		 4300 else
4301 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4302#endif /* FIXME */
d7a89436 4303 }
4e55096e
M		 4304}
4305
f73d3585
TI		 4306static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4307 int enable)
a64135a2
MR		 4308{
4309 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4310 unsigned int idx, val;
4311
4312 for (idx = 0; idx < spec->num_pwrs; idx++) {
4313 if (spec->pwr_nids[idx] == nid)
4314 break;
4315 }
4316 if (idx >= spec->num_pwrs)
4317 return;
d0513fc6
MR		 4318
4319 /* several codecs have two power down bits */
4320 if (spec->pwr_mapping)
4321 idx = spec->pwr_mapping[idx];
4322 else
4323 idx = 1 << idx;
a64135a2 4324
f73d3585
TI		 4325 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4326 if (enable)
a64135a2
MR		 4327 val &= ~idx;
4328 else
4329 val |= idx;
4330
4331 /* power down unused output ports */
4332 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4333}
4334
f73d3585
TI		 4335static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4336{
e6e3ea25 4337 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4338}
a64135a2 4339
74aeaabc
MR		 4340static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4341{
4342 struct sigmatel_spec *spec = codec->spec;
4343 struct sigmatel_jack *jacks = spec->jacks.list;
4344
4345 if (jacks) {
4346 int i;
4347 for (i = 0; i < spec->jacks.used; i++) {
4348 if (jacks->nid == nid) {
4349 unsigned int pin_ctl =
4350 snd_hda_codec_read(codec, nid,
4351 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4352 0x00);
4353 int type = jacks->type;
4354 if (type == (SND_JACK_LINEOUT
4355 | SND_JACK_HEADPHONE))
4356 type = (pin_ctl & AC_PINCTL_HP_EN)
4357 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4358 snd_jack_report(jacks->jack,
e6e3ea25 4359 get_pin_presence(codec, nid)
74aeaabc
MR		 4360 ? type : 0);
4361 }
4362 jacks++;
4363 }
4364 }
4365}
a64135a2 4366
c6e4c666
TI		 4367static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4368 unsigned char type)
4369{
4370 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4371 if (!event)
4372 return;
4373 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4374}
4375
314634bc
TI		 4376static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4377{
a64135a2 4378 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4379 struct sigmatel_event *event;
4380 int tag, data;
a64135a2 4381
c6e4c666
TI		 4382 tag = (res >> 26) & 0x7f;
4383 event = stac_get_event_from_tag(codec, tag);
4384 if (!event)
4385 return;
4386
4387 switch (event->type) {
314634bc 4388 case STAC_HP_EVENT:
c6e4c666 4389 stac92xx_hp_detect(codec);
a64135a2 4390 /* fallthru */
74aeaabc 4391 case STAC_INSERT_EVENT:
a64135a2 4392 case STAC_PWR_EVENT:
c6e4c666
TI		 4393 if (spec->num_pwrs > 0)
4394 stac92xx_pin_sense(codec, event->nid);
4395 stac92xx_report_jack(codec, event->nid);
72474be6 4396 break;
c6e4c666
TI		 4397 case STAC_VREF_EVENT:
4398 data = snd_hda_codec_read(codec, codec->afg, 0,
4399 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4400 /* toggle VREF state based on GPIOx status */
4401 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4402 !!(data & (1 << event->data)));
72474be6 4403 break;
314634bc
TI		 4404 }
4405}
4406
2d34e1b3
TI		 4407#ifdef CONFIG_PROC_FS
4408static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4409 struct hda_codec *codec, hda_nid_t nid)
4410{
4411 if (nid == codec->afg)
4412 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4413 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4414}
4415
4416static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4417 struct hda_codec *codec,
4418 unsigned int verb)
4419{
4420 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4421 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4422}
4423
4424/* stac92hd71bxx, stac92hd73xx */
4425static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4426 struct hda_codec *codec, hda_nid_t nid)
4427{
4428 stac92hd_proc_hook(buffer, codec, nid);
4429 if (nid == codec->afg)
4430 analog_loop_proc_hook(buffer, codec, 0xfa0);
4431}
4432
4433static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4434 struct hda_codec *codec, hda_nid_t nid)
4435{
4436 if (nid == codec->afg)
4437 analog_loop_proc_hook(buffer, codec, 0xfe0);
4438}
4439
4440static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4441 struct hda_codec *codec, hda_nid_t nid)
4442{
4443 if (nid == codec->afg)
4444 analog_loop_proc_hook(buffer, codec, 0xfeb);
4445}
4446#else
4447#define stac92hd_proc_hook NULL
4448#define stac92hd7x_proc_hook NULL
4449#define stac9205_proc_hook NULL
4450#define stac927x_proc_hook NULL
4451#endif
4452
cb53c626 4453#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4454static int stac92xx_resume(struct hda_codec *codec)
4455{
dc81bed1
TI		 4456 struct sigmatel_spec *spec = codec->spec;
4457
11b44bbd 4458 stac92xx_set_config_regs(codec);
2c885878 4459 stac92xx_init(codec);
82beb8fd
TI		 4460 snd_hda_codec_resume_amp(codec);
4461 snd_hda_codec_resume_cache(codec);
2c885878 4462 /* fake event to set up pins again to override cached values */
dc81bed1 4463 if (spec->hp_detect)
c6e4c666
TI		 4464 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4465 STAC_HP_EVENT);
ff6fdc37
M		 4466 return 0;
4467}
c6798d2b
MR		 4468
4469static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4470{
4471 struct sigmatel_spec *spec = codec->spec;
4472 if (spec->eapd_mask)
4473 stac_gpio_set(codec, spec->gpio_mask,
4474 spec->gpio_dir, spec->gpio_data &
4475 ~spec->eapd_mask);
4476 return 0;
4477}
ff6fdc37
M		 4478#endif
4479
2f2f4251
M		 4480static struct hda_codec_ops stac92xx_patch_ops = {
4481 .build_controls = stac92xx_build_controls,
4482 .build_pcms = stac92xx_build_pcms,
4483 .init = stac92xx_init,
4484 .free = stac92xx_free,
4e55096e 4485 .unsol_event = stac92xx_unsol_event,
cb53c626 4486#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4487 .suspend = stac92xx_suspend,
ff6fdc37
M		 4488 .resume = stac92xx_resume,
4489#endif
2f2f4251
M		 4490};
4491
4492static int patch_stac9200(struct hda_codec *codec)
4493{
4494 struct sigmatel_spec *spec;
c7d4b2fa 4495 int err;
2f2f4251 4496
e560d8d8 4497 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4498 if (spec == NULL)
4499 return -ENOMEM;
4500
4501 codec->spec = spec;
a4eed138 4502 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4503 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4504 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4505 stac9200_models,
4506 stac9200_cfg_tbl);
11b44bbd
RF		 4507 if (spec->board_config < 0) {
4508 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4509 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4510 } else
4511 err = stac_save_pin_cfgs(codec,
4512 stac9200_brd_tbl[spec->board_config]);
4513 if (err < 0) {
4514 stac92xx_free(codec);
4515 return err;
403d1944 4516 }
2f2f4251
M		 4517
4518 spec->multiout.max_channels = 2;
4519 spec->multiout.num_dacs = 1;
4520 spec->multiout.dac_nids = stac9200_dac_nids;
4521 spec->adc_nids = stac9200_adc_nids;
4522 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4523 spec->num_muxes = 1;
8b65727b 4524 spec->num_dmics = 0;
9e05b7a3 4525 spec->num_adcs = 1;
a64135a2 4526 spec->num_pwrs = 0;
c7d4b2fa 4527
58eec423
MCC		 4528 if (spec->board_config == STAC_9200_M4 ||
4529 spec->board_config == STAC_9200_M4_2 ||
bf277785 4530 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4531 spec->init = stac9200_eapd_init;
4532 else
4533 spec->init = stac9200_core_init;
2f2f4251 4534 spec->mixer = stac9200_mixer;
c7d4b2fa 4535
117f257d
TI		 4536 if (spec->board_config == STAC_9200_PANASONIC) {
4537 spec->gpio_mask = spec->gpio_dir = 0x09;
4538 spec->gpio_data = 0x00;
4539 }
4540
c7d4b2fa
M		 4541 err = stac9200_parse_auto_config(codec);
4542 if (err < 0) {
4543 stac92xx_free(codec);
4544 return err;
4545 }
2f2f4251 4546
2acc9dcb
TI		 4547 /* CF-74 has no headphone detection, and the driver should *NOT*
4548 * do detection and HP/speaker toggle because the hardware does it.
4549 */
4550 if (spec->board_config == STAC_9200_PANASONIC)
4551 spec->hp_detect = 0;
4552
2f2f4251
M		 4553 codec->patch_ops = stac92xx_patch_ops;
4554
4555 return 0;
4556}
4557
8e21c34c
TD		 4558static int patch_stac925x(struct hda_codec *codec)
4559{
4560 struct sigmatel_spec *spec;
4561 int err;
4562
4563 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4564 if (spec == NULL)
4565 return -ENOMEM;
4566
4567 codec->spec = spec;
a4eed138 4568 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4569 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 4570
4571 /* Check first for codec ID */
4572 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4573 STAC_925x_MODELS,
4574 stac925x_models,
4575 stac925x_codec_id_cfg_tbl);
4576
4577 /* Now checks for PCI ID, if codec ID is not found */
4578 if (spec->board_config < 0)
4579 spec->board_config = snd_hda_check_board_config(codec,
4580 STAC_925x_MODELS,
8e21c34c
TD		 4581 stac925x_models,
4582 stac925x_cfg_tbl);
9e507abd 4583 again:
8e21c34c 4584 if (spec->board_config < 0) {
9cb36c2a 4585 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4586 "using BIOS defaults\n");
8e21c34c 4587 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4588 } else
4589 err = stac_save_pin_cfgs(codec,
4590 stac925x_brd_tbl[spec->board_config]);
4591 if (err < 0) {
4592 stac92xx_free(codec);
4593 return err;
8e21c34c
TD		 4594 }
4595
4596 spec->multiout.max_channels = 2;
4597 spec->multiout.num_dacs = 1;
4598 spec->multiout.dac_nids = stac925x_dac_nids;
4599 spec->adc_nids = stac925x_adc_nids;
4600 spec->mux_nids = stac925x_mux_nids;
4601 spec->num_muxes = 1;
9e05b7a3 4602 spec->num_adcs = 1;
a64135a2 4603 spec->num_pwrs = 0;
2c11f955
TD		 4604 switch (codec->vendor_id) {
4605 case 0x83847632: /* STAC9202 */
4606 case 0x83847633: /* STAC9202D */
4607 case 0x83847636: /* STAC9251 */
4608 case 0x83847637: /* STAC9251D */
f6e9852a 4609 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4610 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4611 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4612 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4613 break;
4614 default:
4615 spec->num_dmics = 0;
4616 break;
4617 }
8e21c34c
TD		 4618
4619 spec->init = stac925x_core_init;
4620 spec->mixer = stac925x_mixer;
4621
4622 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4623 if (!err) {
4624 if (spec->board_config < 0) {
4625 printk(KERN_WARNING "hda_codec: No auto-config is "
4626 "available, default to model=ref\n");
4627 spec->board_config = STAC_925x_REF;
4628 goto again;
4629 }
4630 err = -EINVAL;
4631 }
8e21c34c
TD		 4632 if (err < 0) {
4633 stac92xx_free(codec);
4634 return err;
4635 }
4636
4637 codec->patch_ops = stac92xx_patch_ops;
4638
4639 return 0;
4640}
4641
e1f0d669
MR		 4642static struct hda_input_mux stac92hd73xx_dmux = {
4643 .num_items = 4,
4644 .items = {
4645 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4646 { "Digital Mic 1", 0x09 },
4647 { "Digital Mic 2", 0x0a },
2a9c7816 4648 { "CD", 0x08 },
e1f0d669
MR		 4649 }
4650};
4651
4652static int patch_stac92hd73xx(struct hda_codec *codec)
4653{
4654 struct sigmatel_spec *spec;
4655 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4656 int err = 0;
c21ca4a8 4657 int num_dacs;
e1f0d669
MR		 4658
4659 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4660 if (spec == NULL)
4661 return -ENOMEM;
4662
4663 codec->spec = spec;
e99d32b3 4664 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4665 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4666 spec->pin_nids = stac92hd73xx_pin_nids;
4667 spec->board_config = snd_hda_check_board_config(codec,
4668 STAC_92HD73XX_MODELS,
4669 stac92hd73xx_models,
4670 stac92hd73xx_cfg_tbl);
4671again:
4672 if (spec->board_config < 0) {
4673 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4674 " STAC92HD73XX, using BIOS defaults\n");
4675 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4676 } else
4677 err = stac_save_pin_cfgs(codec,
4678 stac92hd73xx_brd_tbl[spec->board_config]);
4679 if (err < 0) {
4680 stac92xx_free(codec);
4681 return err;
e1f0d669
MR		 4682 }
4683
c21ca4a8 4684 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 4685 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4686
c21ca4a8 4687 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 4688 printk(KERN_WARNING "hda_codec: Could not determine "
4689 "number of channels defaulting to DAC count\n");
c21ca4a8 4690 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4691 }
c21ca4a8 4692 switch (num_dacs) {
e1f0d669
MR		 4693 case 0x3: /* 6 Channel */
4694 spec->mixer = stac92hd73xx_6ch_mixer;
4695 spec->init = stac92hd73xx_6ch_core_init;
4696 break;
4697 case 0x4: /* 8 Channel */
e1f0d669
MR		 4698 spec->mixer = stac92hd73xx_8ch_mixer;
4699 spec->init = stac92hd73xx_8ch_core_init;
4700 break;
4701 case 0x5: /* 10 Channel */
e1f0d669
MR		 4702 spec->mixer = stac92hd73xx_10ch_mixer;
4703 spec->init = stac92hd73xx_10ch_core_init;
c21ca4a8
TI		 4704 }
4705 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4706
e1f0d669
MR		 4707 spec->aloopback_mask = 0x01;
4708 spec->aloopback_shift = 8;
4709
1cd2224c 4710 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4711 spec->mux_nids = stac92hd73xx_mux_nids;
4712 spec->adc_nids = stac92hd73xx_adc_nids;
4713 spec->dmic_nids = stac92hd73xx_dmic_nids;
4714 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4715 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4716 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4717 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4718
4719 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4720 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4721 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4722 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4723 sizeof(stac92hd73xx_dmux));
4724
a7662640 4725 switch (spec->board_config) {
6b3ab21e 4726 case STAC_DELL_EQ:
d654a660 4727 spec->init = dell_eq_core_init;
6b3ab21e 4728 /* fallthru */
661cd8fb
TI		 4729 case STAC_DELL_M6_AMIC:
4730 case STAC_DELL_M6_DMIC:
4731 case STAC_DELL_M6_BOTH:
2a9c7816 4732 spec->num_smuxes = 0;
2a9c7816
MR		 4733 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4734 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4735 spec->eapd_switch = 0;
2a9c7816 4736 spec->num_amps = 1;
6b3ab21e 4737
c21ca4a8 4738 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4739 spec->init = dell_m6_core_init;
661cd8fb
TI		 4740 switch (spec->board_config) {
4741 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR		 4742 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4743 spec->num_dmics = 0;
2a9c7816 4744 spec->private_dimux.num_items = 1;
a7662640 4745 break;
661cd8fb 4746 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR		 4747 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4748 spec->num_dmics = 1;
2a9c7816 4749 spec->private_dimux.num_items = 2;
a7662640 4750 break;
661cd8fb 4751 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR		 4752 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4753 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4754 spec->num_dmics = 1;
2a9c7816 4755 spec->private_dimux.num_items = 2;
a7662640
MR		 4756 break;
4757 }
4758 break;
4759 default:
4760 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4761 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4762 spec->eapd_switch = 1;
a7662640 4763 }
b2c4f4d7
MR		 4764 if (spec->board_config > STAC_92HD73XX_REF) {
4765 /* GPIO0 High = Enable EAPD */
4766 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4767 spec->gpio_data = 0x01;
4768 }
2a9c7816 4769 spec->dinput_mux = &spec->private_dimux;
a7662640 4770
a64135a2
MR		 4771 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4772 spec->pwr_nids = stac92hd73xx_pwr_nids;
4773
d9737751 4774 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4775
4776 if (!err) {
4777 if (spec->board_config < 0) {
4778 printk(KERN_WARNING "hda_codec: No auto-config is "
4779 "available, default to model=ref\n");
4780 spec->board_config = STAC_92HD73XX_REF;
4781 goto again;
4782 }
4783 err = -EINVAL;
4784 }
4785
4786 if (err < 0) {
4787 stac92xx_free(codec);
4788 return err;
4789 }
4790
9e43f0de
TI		 4791 if (spec->board_config == STAC_92HD73XX_NO_JD)
4792 spec->hp_detect = 0;
4793
e1f0d669
MR		 4794 codec->patch_ops = stac92xx_patch_ops;
4795
2d34e1b3
TI		 4796 codec->proc_widget_hook = stac92hd7x_proc_hook;
4797
e1f0d669
MR		 4798 return 0;
4799}
4800
d0513fc6
MR		 4801static struct hda_input_mux stac92hd83xxx_dmux = {
4802 .num_items = 3,
4803 .items = {
4804 { "Analog Inputs", 0x03 },
4805 { "Digital Mic 1", 0x04 },
4806 { "Digital Mic 2", 0x05 },
4807 }
4808};
4809
4810static int patch_stac92hd83xxx(struct hda_codec *codec)
4811{
4812 struct sigmatel_spec *spec;
65557f35 4813 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 4814 int err;
65557f35 4815 int num_dacs;
d0513fc6
MR		 4816
4817 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4818 if (spec == NULL)
4819 return -ENOMEM;
4820
4821 codec->spec = spec;
0ffa9807 4822 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4823 spec->mono_nid = 0x19;
4824 spec->digbeep_nid = 0x21;
4825 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4826 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4827 spec->adc_nids = stac92hd83xxx_adc_nids;
4828 spec->pwr_nids = stac92hd83xxx_pwr_nids;
c15c5060 4829 spec->amp_nids = stac92hd83xxx_amp_nids;
d0513fc6
MR		 4830 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4831 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4832 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 4833
65557f35
MR		 4834
4835 /* set port 0xe to select the last DAC
4836 */
4837 num_dacs = snd_hda_get_connections(codec, 0x0e,
4838 conn, STAC92HD83_DAC_COUNT + 1) - 1;
4839
4840 snd_hda_codec_write_cache(codec, 0xe, 0,
4841 AC_VERB_SET_CONNECT_SEL, num_dacs);
4842
d0513fc6 4843 spec->init = stac92hd83xxx_core_init;
d0513fc6
MR		 4844 spec->mixer = stac92hd83xxx_mixer;
4845 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4846 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4847 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
c15c5060 4848 spec->num_amps = ARRAY_SIZE(stac92hd83xxx_amp_nids);
d0513fc6
MR		 4849 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4850 spec->dinput_mux = &stac92hd83xxx_dmux;
4851 spec->pin_nids = stac92hd83xxx_pin_nids;
4852 spec->board_config = snd_hda_check_board_config(codec,
4853 STAC_92HD83XXX_MODELS,
4854 stac92hd83xxx_models,
4855 stac92hd83xxx_cfg_tbl);
4856again:
4857 if (spec->board_config < 0) {
4858 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4859 " STAC92HD83XXX, using BIOS defaults\n");
4860 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4861 } else
4862 err = stac_save_pin_cfgs(codec,
4863 stac92hd83xxx_brd_tbl[spec->board_config]);
4864 if (err < 0) {
4865 stac92xx_free(codec);
4866 return err;
d0513fc6
MR		 4867 }
4868
32ed3f46
MR		 4869 switch (codec->vendor_id) {
4870 case 0x111d7604:
4871 case 0x111d7605:
4872 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
4873 break;
4874 spec->num_pwrs = 0;
4875 break;
4876 }
4877
d0513fc6
MR		 4878 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4879 if (!err) {
4880 if (spec->board_config < 0) {
4881 printk(KERN_WARNING "hda_codec: No auto-config is "
4882 "available, default to model=ref\n");
4883 spec->board_config = STAC_92HD83XXX_REF;
4884 goto again;
4885 }
4886 err = -EINVAL;
4887 }
4888
4889 if (err < 0) {
4890 stac92xx_free(codec);
4891 return err;
4892 }
4893
4894 codec->patch_ops = stac92xx_patch_ops;
4895
2d34e1b3
TI		 4896 codec->proc_widget_hook = stac92hd_proc_hook;
4897
d0513fc6
MR		 4898 return 0;
4899}
4900
4b33c767
MR		 4901static struct hda_input_mux stac92hd71bxx_dmux = {
4902 .num_items = 4,
4903 .items = {
4904 { "Analog Inputs", 0x00 },
4905 { "Mixer", 0x01 },
4906 { "Digital Mic 1", 0x02 },
4907 { "Digital Mic 2", 0x03 },
4908 }
4909};
4910
e035b841
MR		 4911static int patch_stac92hd71bxx(struct hda_codec *codec)
4912{
4913 struct sigmatel_spec *spec;
4914 int err = 0;
4915
4916 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4917 if (spec == NULL)
4918 return -ENOMEM;
4919
4920 codec->spec = spec;
8daaaa97 4921 codec->patch_ops = stac92xx_patch_ops;
e035b841 4922 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4923 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4924 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4925 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4926 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4927 spec->board_config = snd_hda_check_board_config(codec,
4928 STAC_92HD71BXX_MODELS,
4929 stac92hd71bxx_models,
4930 stac92hd71bxx_cfg_tbl);
4931again:
4932 if (spec->board_config < 0) {
4933 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4934 " STAC92HD71BXX, using BIOS defaults\n");
4935 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4936 } else
4937 err = stac_save_pin_cfgs(codec,
4938 stac92hd71bxx_brd_tbl[spec->board_config]);
4939 if (err < 0) {
4940 stac92xx_free(codec);
4941 return err;
e035b841
MR		 4942 }
4943
41c3b648
TI		 4944 if (spec->board_config > STAC_92HD71BXX_REF) {
4945 /* GPIO0 = EAPD */
4946 spec->gpio_mask = 0x01;
4947 spec->gpio_dir = 0x01;
4948 spec->gpio_data = 0x01;
4949 }
4950
541eee87
MR		 4951 switch (codec->vendor_id) {
4952 case 0x111d76b6: /* 4 Port without Analog Mixer */
4953 case 0x111d76b7:
4954 case 0x111d76b4: /* 6 Port without Analog Mixer */
4955 case 0x111d76b5:
4956 spec->mixer = stac92hd71bxx_mixer;
4957 spec->init = stac92hd71bxx_core_init;
0ffa9807 4958 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4959 break;
aafc4412 4960 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4961 switch (spec->board_config) {
4962 case STAC_HP_M4:
72474be6 4963 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 4964 err = stac_add_event(spec, codec->afg,
4965 STAC_VREF_EVENT, 0x02);
4966 if (err < 0)
4967 return err;
c5d08bb5 4968 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4969 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4970 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4971 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4972 AC_USRSP_EN | err);
72474be6
MR		 4973 spec->gpio_mask |= 0x02;
4974 break;
4975 }
8daaaa97 4976 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4977 (codec->revision_id & 0xf) == 1)
8daaaa97 4978 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4979
aafc4412
MR		 4980 /* no output amps */
4981 spec->num_pwrs = 0;
4982 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4983 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4984
4985 /* disable VSW */
4986 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4987 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR		 4988 break;
4989 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4990 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4991 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4992
aafc4412
MR		 4993 /* no output amps */
4994 spec->num_pwrs = 0;
4995 /* fallthru */
541eee87 4996 default:
4b33c767 4997 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4998 spec->mixer = stac92hd71bxx_analog_mixer;
4999 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 5000 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 5001 }
5002
4b33c767 5003 spec->aloopback_mask = 0x50;
541eee87
MR		 5004 spec->aloopback_shift = 0;
5005
8daaaa97 5006 spec->powerdown_adcs = 1;
1cd2224c 5007 spec->digbeep_nid = 0x26;
e035b841
MR		 5008 spec->mux_nids = stac92hd71bxx_mux_nids;
5009 spec->adc_nids = stac92hd71bxx_adc_nids;
5010 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 5011 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 5012 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5013 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 5014
5015 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5016 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 5017
6a14f585
MR		 5018 switch (spec->board_config) {
5019 case STAC_HP_M4:
6a14f585 5020 /* enable internal microphone */
af9f341a 5021 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR		 5022 stac92xx_auto_set_pinctl(codec, 0x0e,
5023 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 5024 /* fallthru */
5025 case STAC_DELL_M4_2:
5026 spec->num_dmics = 0;
5027 spec->num_smuxes = 0;
5028 spec->num_dmuxes = 0;
5029 break;
5030 case STAC_DELL_M4_1:
5031 case STAC_DELL_M4_3:
5032 spec->num_dmics = 1;
5033 spec->num_smuxes = 0;
5034 spec->num_dmuxes = 0;
6a14f585
MR		 5035 break;
5036 default:
5037 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
5038 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
5039 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
5040 };
5041
c21ca4a8 5042 spec->multiout.dac_nids = spec->dac_nids;
4b33c767
MR		 5043 if (spec->dinput_mux)
5044 spec->private_dimux.num_items +=
5045 spec->num_dmics -
5046 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 5047
5048 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
5049 if (!err) {
5050 if (spec->board_config < 0) {
5051 printk(KERN_WARNING "hda_codec: No auto-config is "
5052 "available, default to model=ref\n");
5053 spec->board_config = STAC_92HD71BXX_REF;
5054 goto again;
5055 }
5056 err = -EINVAL;
5057 }
5058
5059 if (err < 0) {
5060 stac92xx_free(codec);
5061 return err;
5062 }
5063
2d34e1b3
TI		 5064 codec->proc_widget_hook = stac92hd7x_proc_hook;
5065
e035b841
MR		 5066 return 0;
5067};
5068
2f2f4251
M		 5069static int patch_stac922x(struct hda_codec *codec)
5070{
5071 struct sigmatel_spec *spec;
c7d4b2fa 5072 int err;
2f2f4251 5073
e560d8d8 5074 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5075 if (spec == NULL)
5076 return -ENOMEM;
5077
5078 codec->spec = spec;
a4eed138 5079 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5080 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 5081 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5082 stac922x_models,
5083 stac922x_cfg_tbl);
536319af 5084 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 5085 spec->gpio_mask = spec->gpio_dir = 0x03;
5086 spec->gpio_data = 0x03;
3fc24d85
TI		 5087 /* Intel Macs have all same PCI SSID, so we need to check
5088 * codec SSID to distinguish the exact models
5089 */
6f0778d8 5090 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5091 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 5092
5093 case 0x106b0800:
5094 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5095 break;
5d5d3bc3
IZ		 5096 case 0x106b0600:
5097 case 0x106b0700:
5098 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5099 break;
5d5d3bc3
IZ		 5100 case 0x106b0e00:
5101 case 0x106b0f00:
5102 case 0x106b1600:
5103 case 0x106b1700:
5104 case 0x106b0200:
5105 case 0x106b1e00:
5106 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5107 break;
5d5d3bc3
IZ		 5108 case 0x106b1a00:
5109 case 0x00000100:
5110 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5111 break;
5d5d3bc3
IZ		 5112 case 0x106b0a00:
5113 case 0x106b2200:
5114 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5115 break;
536319af
NB		 5116 default:
5117 spec->board_config = STAC_INTEL_MAC_V3;
5118 break;
3fc24d85
TI		 5119 }
5120 }
5121
9e507abd 5122 again:
11b44bbd
RF		 5123 if (spec->board_config < 0) {
5124 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5125 "using BIOS defaults\n");
5126 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5127 } else
5128 err = stac_save_pin_cfgs(codec,
5129 stac922x_brd_tbl[spec->board_config]);
5130 if (err < 0) {
5131 stac92xx_free(codec);
5132 return err;
403d1944 5133 }
2f2f4251 5134
c7d4b2fa
M		 5135 spec->adc_nids = stac922x_adc_nids;
5136 spec->mux_nids = stac922x_mux_nids;
2549413e 5137 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5138 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5139 spec->num_dmics = 0;
a64135a2 5140 spec->num_pwrs = 0;
c7d4b2fa
M		 5141
5142 spec->init = stac922x_core_init;
2f2f4251 5143 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 5144
5145 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5146
3cc08dc6 5147 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 5148 if (!err) {
5149 if (spec->board_config < 0) {
5150 printk(KERN_WARNING "hda_codec: No auto-config is "
5151 "available, default to model=ref\n");
5152 spec->board_config = STAC_D945_REF;
5153 goto again;
5154 }
5155 err = -EINVAL;
5156 }
3cc08dc6
MP		 5157 if (err < 0) {
5158 stac92xx_free(codec);
5159 return err;
5160 }
5161
5162 codec->patch_ops = stac92xx_patch_ops;
5163
807a4636
TI		 5164 /* Fix Mux capture level; max to 2 */
5165 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5166 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5167 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5168 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5169 (0 << AC_AMPCAP_MUTE_SHIFT));
5170
3cc08dc6
MP		 5171 return 0;
5172}
5173
5174static int patch_stac927x(struct hda_codec *codec)
5175{
5176 struct sigmatel_spec *spec;
5177 int err;
5178
5179 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5180 if (spec == NULL)
5181 return -ENOMEM;
5182
5183 codec->spec = spec;
a4eed138 5184 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5185 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 5186 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5187 stac927x_models,
5188 stac927x_cfg_tbl);
9e507abd 5189 again:
8e9068b1
MR		 5190 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5191 if (spec->board_config < 0)
5192 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5193 "STAC927x, using BIOS defaults\n");
11b44bbd 5194 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5195 } else
5196 err = stac_save_pin_cfgs(codec,
5197 stac927x_brd_tbl[spec->board_config]);
5198 if (err < 0) {
5199 stac92xx_free(codec);
5200 return err;
3cc08dc6
MP		 5201 }
5202
1cd2224c 5203 spec->digbeep_nid = 0x23;
8e9068b1
MR		 5204 spec->adc_nids = stac927x_adc_nids;
5205 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5206 spec->mux_nids = stac927x_mux_nids;
5207 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 5208 spec->smux_nids = stac927x_smux_nids;
5209 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5210 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5211 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 5212 spec->multiout.dac_nids = spec->dac_nids;
5213
81d3dbde 5214 switch (spec->board_config) {
93ed1503 5215 case STAC_D965_3ST:
93ed1503 5216 case STAC_D965_5ST:
8e9068b1 5217 /* GPIO0 High = Enable EAPD */
0fc9dec4 5218 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5219 spec->gpio_data = 0x01;
8e9068b1
MR		 5220 spec->num_dmics = 0;
5221
93ed1503 5222 spec->init = d965_core_init;
9e05b7a3 5223 spec->mixer = stac927x_mixer;
81d3dbde 5224 break;
8e9068b1 5225 case STAC_DELL_BIOS:
780c8be4
MR		 5226 switch (codec->subsystem_id) {
5227 case 0x10280209:
5228 case 0x1028022e:
5229 /* correct the device field to SPDIF out */
af9f341a 5230 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR		 5231 break;
5232 };
03d7ca17 5233 /* configure the analog microphone on some laptops */
af9f341a 5234 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5235 /* correct the front output jack as a hp out */
af9f341a 5236 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5237 /* correct the front input jack as a mic */
af9f341a 5238 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5239 /* fallthru */
8e9068b1
MR		 5240 case STAC_DELL_3ST:
5241 /* GPIO2 High = Enable EAPD */
0fc9dec4 5242 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5243 spec->gpio_data = 0x04;
7f16859a
MR		 5244 spec->dmic_nids = stac927x_dmic_nids;
5245 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5246
8e9068b1
MR		 5247 spec->init = d965_core_init;
5248 spec->mixer = stac927x_mixer;
5249 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5250 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 5251 break;
5252 default:
b2c4f4d7
MR		 5253 if (spec->board_config > STAC_D965_REF) {
5254 /* GPIO0 High = Enable EAPD */
5255 spec->eapd_mask = spec->gpio_mask = 0x01;
5256 spec->gpio_dir = spec->gpio_data = 0x01;
5257 }
8e9068b1
MR		 5258 spec->num_dmics = 0;
5259
5260 spec->init = stac927x_core_init;
5261 spec->mixer = stac927x_mixer;
7f16859a
MR		 5262 }
5263
a64135a2 5264 spec->num_pwrs = 0;
e1f0d669
MR		 5265 spec->aloopback_mask = 0x40;
5266 spec->aloopback_shift = 0;
c0cea0d0 5267 spec->eapd_switch = 1;
8e9068b1 5268
3cc08dc6 5269 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5270 if (!err) {
5271 if (spec->board_config < 0) {
5272 printk(KERN_WARNING "hda_codec: No auto-config is "
5273 "available, default to model=ref\n");
5274 spec->board_config = STAC_D965_REF;
5275 goto again;
5276 }
5277 err = -EINVAL;
5278 }
c7d4b2fa
M		 5279 if (err < 0) {
5280 stac92xx_free(codec);
5281 return err;
5282 }
2f2f4251
M		 5283
5284 codec->patch_ops = stac92xx_patch_ops;
5285
2d34e1b3
TI		 5286 codec->proc_widget_hook = stac927x_proc_hook;
5287
52987656
TI		 5288 /*
5289 * !!FIXME!!
5290 * The STAC927x seem to require fairly long delays for certain
5291 * command sequences. With too short delays (even if the answer
5292 * is set to RIRB properly), it results in the silence output
5293 * on some hardwares like Dell.
5294 *
5295 * The below flag enables the longer delay (see get_response
5296 * in hda_intel.c).
5297 */
5298 codec->bus->needs_damn_long_delay = 1;
5299
e28d8322
TI		 5300 /* no jack detecion for ref-no-jd model */
5301 if (spec->board_config == STAC_D965_REF_NO_JD)
5302 spec->hp_detect = 0;
5303
2f2f4251
M		 5304 return 0;
5305}
5306
f3302a59
MP		 5307static int patch_stac9205(struct hda_codec *codec)
5308{
5309 struct sigmatel_spec *spec;
8259980e 5310 int err;
f3302a59
MP		 5311
5312 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5313 if (spec == NULL)
5314 return -ENOMEM;
5315
5316 codec->spec = spec;
a4eed138 5317 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5318 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 5319 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5320 stac9205_models,
5321 stac9205_cfg_tbl);
9e507abd 5322 again:
11b44bbd
RF		 5323 if (spec->board_config < 0) {
5324 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5325 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5326 } else
5327 err = stac_save_pin_cfgs(codec,
5328 stac9205_brd_tbl[spec->board_config]);
5329 if (err < 0) {
5330 stac92xx_free(codec);
5331 return err;
f3302a59
MP		 5332 }
5333
1cd2224c 5334 spec->digbeep_nid = 0x23;
f3302a59 5335 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5336 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5337 spec->mux_nids = stac9205_mux_nids;
2549413e 5338 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 5339 spec->smux_nids = stac9205_smux_nids;
5340 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5341 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5342 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5343 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5344 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5345 spec->num_pwrs = 0;
f3302a59
MP		 5346
5347 spec->init = stac9205_core_init;
5348 spec->mixer = stac9205_mixer;
5349
e1f0d669
MR		 5350 spec->aloopback_mask = 0x40;
5351 spec->aloopback_shift = 0;
d9a4268e
TI		 5352 /* Turn on/off EAPD per HP plugging */
5353 if (spec->board_config != STAC_9205_EAPD)
5354 spec->eapd_switch = 1;
f3302a59 5355 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5356
ae0a8ed8 5357 switch (spec->board_config){
ae0a8ed8 5358 case STAC_9205_DELL_M43:
87d48363 5359 /* Enable SPDIF in/out */
af9f341a
TI		 5360 stac_change_pin_config(codec, 0x1f, 0x01441030);
5361 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5362
4fe5195c 5363 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 5364 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5365 if (err < 0)
5366 return err;
c5d08bb5 5367 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 5368 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5369 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 5370 AC_VERB_SET_UNSOLICITED_ENABLE,
5371 AC_USRSP_EN | err);
4fe5195c
MR		 5372
5373 spec->gpio_dir = 0x0b;
0fc9dec4 5374 spec->eapd_mask = 0x01;
4fe5195c
MR		 5375 spec->gpio_mask = 0x1b;
5376 spec->gpio_mute = 0x10;
e2e7d624 5377 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5378 * GPIO3 Low = DRM
87d48363 5379 */
4fe5195c 5380 spec->gpio_data = 0x01;
ae0a8ed8 5381 break;
b2c4f4d7
MR		 5382 case STAC_9205_REF:
5383 /* SPDIF-In enabled */
5384 break;
ae0a8ed8
TD		 5385 default:
5386 /* GPIO0 High = EAPD */
0fc9dec4 5387 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5388 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5389 break;
5390 }
33382403 5391
f3302a59 5392 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5393 if (!err) {
5394 if (spec->board_config < 0) {
5395 printk(KERN_WARNING "hda_codec: No auto-config is "
5396 "available, default to model=ref\n");
5397 spec->board_config = STAC_9205_REF;
5398 goto again;
5399 }
5400 err = -EINVAL;
5401 }
f3302a59
MP		 5402 if (err < 0) {
5403 stac92xx_free(codec);
5404 return err;
5405 }
5406
5407 codec->patch_ops = stac92xx_patch_ops;
5408
2d34e1b3
TI		 5409 codec->proc_widget_hook = stac9205_proc_hook;
5410
f3302a59
MP		 5411 return 0;
5412}
5413
db064e50 5414/*
6d859065 5415 * STAC9872 hack
db064e50
TI		 5416 */
5417
1e137f92 5418static struct hda_verb stac9872_core_init[] = {
1624cb9a 5419 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5420 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5421 {}
5422};
5423
caa10b6e
TI		 5424static struct snd_kcontrol_new stac9872_mixer[] = {
5425 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5426 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5427 STAC_INPUT_SOURCE(1),
5428 { } /* end */
5429};
5430
5431static hda_nid_t stac9872_pin_nids[] = {
5432 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
5433 0x11, 0x13, 0x14,
5434};
5435
5436static hda_nid_t stac9872_adc_nids[] = {
5437 0x8 /*,0x6*/
5438};
5439
5440static hda_nid_t stac9872_mux_nids[] = {
5441 0x15
5442};
5443
6d859065 5444static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5445{
5446 struct sigmatel_spec *spec;
1e137f92 5447 int err;
db064e50 5448
db064e50
TI		 5449 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5450 if (spec == NULL)
5451 return -ENOMEM;
db064e50 5452 codec->spec = spec;
caa10b6e 5453
1e137f92 5454#if 0 /* no model right now */
caa10b6e
TI		 5455 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5456 stac9872_models,
5457 stac9872_cfg_tbl);
1e137f92 5458#endif
db064e50 5459
1e137f92
TI		 5460 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
5461 spec->pin_nids = stac9872_pin_nids;
5462 spec->multiout.dac_nids = spec->dac_nids;
5463 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
5464 spec->adc_nids = stac9872_adc_nids;
5465 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
5466 spec->mux_nids = stac9872_mux_nids;
5467 spec->mixer = stac9872_mixer;
5468 spec->init = stac9872_core_init;
5469
5470 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
5471 if (err < 0) {
5472 stac92xx_free(codec);
5473 return -EINVAL;
5474 }
5475 spec->input_mux = &spec->private_imux;
5476 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI		 5477 return 0;
5478}
5479
5480
2f2f4251
M		 5481/*
5482 * patch entries
5483 */
1289e9e8 5484static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 5485 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5486 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5487 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5488 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5489 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5490 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5491 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5492 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5493 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5494 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5495 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5496 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5497 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5498 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5499 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5500 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5501 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5502 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5503 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5504 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5505 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5506 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5507 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5508 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5509 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5510 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5511 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5512 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5513 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5514 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5515 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5516 /* The following does not take into account .id=0x83847661 when subsys =
5517 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5518 * currently not fully supported.
5519 */
5520 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5521 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5522 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5523 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5524 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5525 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5526 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5527 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5528 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5529 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5530 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5531 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5532 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5533 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5534 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5535 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5536 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5537 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5538 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5539 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5540 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5541 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5542 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5543 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5544 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5545 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5546 {} /* terminator */
5547};
1289e9e8
TI		 5548
5549MODULE_ALIAS("snd-hda-codec-id:8384*");
5550MODULE_ALIAS("snd-hda-codec-id:111d*");
5551
5552MODULE_LICENSE("GPL");
5553MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5554
5555static struct hda_codec_preset_list sigmatel_list = {
5556 .preset = snd_hda_preset_sigmatel,
5557 .owner = THIS_MODULE,
5558};
5559
5560static int __init patch_sigmatel_init(void)
5561{
5562 return snd_hda_add_codec_preset(&sigmatel_list);
5563}
5564
5565static void __exit patch_sigmatel_exit(void)
5566{
5567 snd_hda_delete_codec_preset(&sigmatel_list);
5568}
5569
5570module_init(patch_sigmatel_init)
5571module_exit(patch_sigmatel_exit)
Clone of davem's net-next-2.6 tree