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2f2f4251
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1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
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8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
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27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
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34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
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38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
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45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
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48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
58eec423
MCC
58 STAC_9200_M4,
59 STAC_9200_M4_2,
117f257d 60 STAC_9200_PANASONIC,
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61 STAC_9200_MODELS
62};
63
64enum {
65 STAC_9205_REF,
dfe495d0 66 STAC_9205_DELL_M42,
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67 STAC_9205_DELL_M43,
68 STAC_9205_DELL_M44,
d9a4268e 69 STAC_9205_EAPD,
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70 STAC_9205_MODELS
71};
72
e1f0d669 73enum {
9e43f0de 74 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 75 STAC_92HD73XX_REF,
661cd8fb
TI
76 STAC_DELL_M6_AMIC,
77 STAC_DELL_M6_DMIC,
78 STAC_DELL_M6_BOTH,
6b3ab21e 79 STAC_DELL_EQ,
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80 STAC_92HD73XX_MODELS
81};
82
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83enum {
84 STAC_92HD83XXX_REF,
32ed3f46 85 STAC_92HD83XXX_PWR_REF,
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86 STAC_92HD83XXX_MODELS
87};
88
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89enum {
90 STAC_92HD71BXX_REF,
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91 STAC_DELL_M4_1,
92 STAC_DELL_M4_2,
3a7abfd2 93 STAC_DELL_M4_3,
6a14f585 94 STAC_HP_M4,
1b0652eb 95 STAC_HP_DV5,
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96 STAC_92HD71BXX_MODELS
97};
98
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99enum {
100 STAC_925x_REF,
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101 STAC_M1,
102 STAC_M1_2,
103 STAC_M2,
8e21c34c 104 STAC_M2_2,
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105 STAC_M3,
106 STAC_M5,
107 STAC_M6,
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108 STAC_925x_MODELS
109};
110
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111enum {
112 STAC_D945_REF,
113 STAC_D945GTP3,
114 STAC_D945GTP5,
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115 STAC_INTEL_MAC_V1,
116 STAC_INTEL_MAC_V2,
117 STAC_INTEL_MAC_V3,
118 STAC_INTEL_MAC_V4,
119 STAC_INTEL_MAC_V5,
536319af
NB
120 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
121 * is given, one of the above models will be
122 * chosen according to the subsystem id. */
dfe495d0 123 /* for backward compatibility */
f5fcc13c 124 STAC_MACMINI,
3fc24d85 125 STAC_MACBOOK,
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NB
126 STAC_MACBOOK_PRO_V1,
127 STAC_MACBOOK_PRO_V2,
f16928fb 128 STAC_IMAC_INTEL,
0dae0f83 129 STAC_IMAC_INTEL_20,
8c650087 130 STAC_ECS_202,
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131 STAC_922X_DELL_D81,
132 STAC_922X_DELL_D82,
133 STAC_922X_DELL_M81,
134 STAC_922X_DELL_M82,
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135 STAC_922X_MODELS
136};
137
138enum {
e28d8322 139 STAC_D965_REF_NO_JD, /* no jack-detection */
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140 STAC_D965_REF,
141 STAC_D965_3ST,
142 STAC_D965_5ST,
4ff076e5 143 STAC_DELL_3ST,
8e9068b1 144 STAC_DELL_BIOS,
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145 STAC_927X_MODELS
146};
403d1944 147
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148struct sigmatel_event {
149 hda_nid_t nid;
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150 unsigned char type;
151 unsigned char tag;
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152 int data;
153};
154
155struct sigmatel_jack {
156 hda_nid_t nid;
157 int type;
158 struct snd_jack *jack;
159};
160
2f2f4251 161struct sigmatel_spec {
c8b6bf9b 162 struct snd_kcontrol_new *mixers[4];
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163 unsigned int num_mixers;
164
403d1944 165 int board_config;
c0cea0d0 166 unsigned int eapd_switch: 1;
c7d4b2fa 167 unsigned int surr_switch: 1;
3cc08dc6 168 unsigned int alt_switch: 1;
82bc955f 169 unsigned int hp_detect: 1;
00ef50c2 170 unsigned int spdif_mute: 1;
7c7767eb 171 unsigned int check_volume_offset:1;
c7d4b2fa 172
4fe5195c 173 /* gpio lines */
0fc9dec4 174 unsigned int eapd_mask;
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MR
175 unsigned int gpio_mask;
176 unsigned int gpio_dir;
177 unsigned int gpio_data;
178 unsigned int gpio_mute;
179
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180 /* stream */
181 unsigned int stream_delay;
182
4fe5195c 183 /* analog loopback */
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184 unsigned char aloopback_mask;
185 unsigned char aloopback_shift;
8259980e 186
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187 /* power management */
188 unsigned int num_pwrs;
d0513fc6 189 unsigned int *pwr_mapping;
a64135a2 190 hda_nid_t *pwr_nids;
b76c850f 191 hda_nid_t *dac_list;
a64135a2 192
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193 /* jack detection */
194 struct snd_array jacks;
195
196 /* events */
197 struct snd_array events;
198
2f2f4251 199 /* playback */
b22b4821 200 struct hda_input_mux *mono_mux;
89385035 201 struct hda_input_mux *amp_mux;
b22b4821 202 unsigned int cur_mmux;
2f2f4251 203 struct hda_multi_out multiout;
3cc08dc6 204 hda_nid_t dac_nids[5];
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TI
205 hda_nid_t hp_dacs[5];
206 hda_nid_t speaker_dacs[5];
2f2f4251 207
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208 int volume_offset;
209
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210 /* capture */
211 hda_nid_t *adc_nids;
2f2f4251 212 unsigned int num_adcs;
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213 hda_nid_t *mux_nids;
214 unsigned int num_muxes;
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215 hda_nid_t *dmic_nids;
216 unsigned int num_dmics;
e1f0d669 217 hda_nid_t *dmux_nids;
1697055e 218 unsigned int num_dmuxes;
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219 hda_nid_t *smux_nids;
220 unsigned int num_smuxes;
65973632 221 const char **spdif_labels;
d9737751 222
dabbed6f 223 hda_nid_t dig_in_nid;
b22b4821 224 hda_nid_t mono_nid;
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225 hda_nid_t anabeep_nid;
226 hda_nid_t digbeep_nid;
2f2f4251 227
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228 /* pin widgets */
229 hda_nid_t *pin_nids;
230 unsigned int num_pins;
2f2f4251 231 unsigned int *pin_configs;
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232
233 /* codec specific stuff */
234 struct hda_verb *init;
c8b6bf9b 235 struct snd_kcontrol_new *mixer;
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236
237 /* capture source */
8b65727b 238 struct hda_input_mux *dinput_mux;
e1f0d669 239 unsigned int cur_dmux[2];
c7d4b2fa 240 struct hda_input_mux *input_mux;
3cc08dc6 241 unsigned int cur_mux[3];
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242 struct hda_input_mux *sinput_mux;
243 unsigned int cur_smux[2];
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244 unsigned int cur_amux;
245 hda_nid_t *amp_nids;
246 unsigned int num_amps;
8daaaa97 247 unsigned int powerdown_adcs;
2f2f4251 248
403d1944
MP
249 /* i/o switches */
250 unsigned int io_switch[2];
0fb87bb4 251 unsigned int clfe_swap;
c21ca4a8
TI
252 hda_nid_t line_switch; /* shared line-in for input and output */
253 hda_nid_t mic_switch; /* shared mic-in for input and output */
254 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 255 unsigned int aloopback;
2f2f4251 256
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M
257 struct hda_pcm pcm_rec[2]; /* PCM information */
258
259 /* dynamic controls and input_mux */
260 struct auto_pin_cfg autocfg;
603c4019 261 struct snd_array kctls;
8b65727b 262 struct hda_input_mux private_dimux;
c7d4b2fa 263 struct hda_input_mux private_imux;
d9737751 264 struct hda_input_mux private_smux;
89385035 265 struct hda_input_mux private_amp_mux;
b22b4821 266 struct hda_input_mux private_mono_mux;
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267};
268
269static hda_nid_t stac9200_adc_nids[1] = {
270 0x03,
271};
272
273static hda_nid_t stac9200_mux_nids[1] = {
274 0x0c,
275};
276
277static hda_nid_t stac9200_dac_nids[1] = {
278 0x02,
279};
280
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MR
281static hda_nid_t stac92hd73xx_pwr_nids[8] = {
282 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
283 0x0f, 0x10, 0x11
284};
285
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286static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
287 0x26, 0,
288};
289
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290static hda_nid_t stac92hd73xx_adc_nids[2] = {
291 0x1a, 0x1b
292};
293
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294#define DELL_M6_AMP 2
295static hda_nid_t stac92hd73xx_amp_nids[3] = {
296 0x0b, 0x0c, 0x0e
89385035
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297};
298
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299#define STAC92HD73XX_NUM_DMICS 2
300static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
301 0x13, 0x14, 0
302};
303
304#define STAC92HD73_DAC_COUNT 5
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305
306static hda_nid_t stac92hd73xx_mux_nids[4] = {
307 0x28, 0x29, 0x2a, 0x2b,
308};
309
310static hda_nid_t stac92hd73xx_dmux_nids[2] = {
311 0x20, 0x21,
312};
313
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314static hda_nid_t stac92hd73xx_smux_nids[2] = {
315 0x22, 0x23,
316};
317
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318#define STAC92HD83XXX_NUM_DMICS 2
319static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
320 0x11, 0x12, 0
321};
322
d0513fc6 323#define STAC92HD83_DAC_COUNT 3
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MR
324
325static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
326 0x17, 0x18,
327};
328
329static hda_nid_t stac92hd83xxx_adc_nids[2] = {
330 0x15, 0x16,
331};
332
333static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
334 0xa, 0xb, 0xd, 0xe,
335};
336
0ffa9807
MR
337static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
338 0x1e, 0,
339};
340
d0513fc6 341static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 342 0x03, 0x0c, 0x20, 0x40,
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343};
344
9248f269 345static hda_nid_t stac92hd83xxx_amp_nids[1] = {
c15c5060
MR
346 0xc,
347};
348
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349static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
350 0x0a, 0x0d, 0x0f
351};
352
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353static hda_nid_t stac92hd71bxx_adc_nids[2] = {
354 0x12, 0x13,
355};
356
357static hda_nid_t stac92hd71bxx_mux_nids[2] = {
358 0x1a, 0x1b
359};
360
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MR
361static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
362 0x1c, 0x1d,
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363};
364
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365static hda_nid_t stac92hd71bxx_smux_nids[2] = {
366 0x24, 0x25,
367};
368
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369#define STAC92HD71BXX_NUM_DMICS 2
370static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
371 0x18, 0x19, 0
372};
373
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MR
374static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
375 0x22, 0
376};
377
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TD
378static hda_nid_t stac925x_adc_nids[1] = {
379 0x03,
380};
381
382static hda_nid_t stac925x_mux_nids[1] = {
383 0x0f,
384};
385
386static hda_nid_t stac925x_dac_nids[1] = {
387 0x02,
388};
389
f6e9852a
TI
390#define STAC925X_NUM_DMICS 1
391static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
392 0x15, 0
2c11f955
TD
393};
394
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TI
395static hda_nid_t stac925x_dmux_nids[1] = {
396 0x14,
397};
398
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399static hda_nid_t stac922x_adc_nids[2] = {
400 0x06, 0x07,
401};
402
403static hda_nid_t stac922x_mux_nids[2] = {
404 0x12, 0x13,
405};
406
3cc08dc6
MP
407static hda_nid_t stac927x_adc_nids[3] = {
408 0x07, 0x08, 0x09
409};
410
411static hda_nid_t stac927x_mux_nids[3] = {
412 0x15, 0x16, 0x17
413};
414
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415static hda_nid_t stac927x_smux_nids[1] = {
416 0x21,
417};
418
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419static hda_nid_t stac927x_dac_nids[6] = {
420 0x02, 0x03, 0x04, 0x05, 0x06, 0
421};
422
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423static hda_nid_t stac927x_dmux_nids[1] = {
424 0x1b,
425};
426
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427#define STAC927X_NUM_DMICS 2
428static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
429 0x13, 0x14, 0
430};
431
65973632
MR
432static const char *stac927x_spdif_labels[5] = {
433 "Digital Playback", "ADAT", "Analog Mux 1",
434 "Analog Mux 2", "Analog Mux 3"
435};
436
f3302a59
MP
437static hda_nid_t stac9205_adc_nids[2] = {
438 0x12, 0x13
439};
440
441static hda_nid_t stac9205_mux_nids[2] = {
442 0x19, 0x1a
443};
444
e1f0d669 445static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 446 0x1d,
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MR
447};
448
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449static hda_nid_t stac9205_smux_nids[1] = {
450 0x21,
451};
452
f6e9852a
TI
453#define STAC9205_NUM_DMICS 2
454static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
455 0x17, 0x18, 0
8b65727b
MP
456};
457
c7d4b2fa 458static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD
459 0x08, 0x09, 0x0d, 0x0e,
460 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M
461};
462
8e21c34c
TD
463static hda_nid_t stac925x_pin_nids[8] = {
464 0x07, 0x08, 0x0a, 0x0b,
465 0x0c, 0x0d, 0x10, 0x11,
466};
467
2f2f4251
M
468static hda_nid_t stac922x_pin_nids[10] = {
469 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
470 0x0f, 0x10, 0x11, 0x15, 0x1b,
471};
472
a7662640 473static hda_nid_t stac92hd73xx_pin_nids[13] = {
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MR
474 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
475 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 476 0x14, 0x22, 0x23
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MR
477};
478
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MR
479static hda_nid_t stac92hd83xxx_pin_nids[14] = {
480 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
481 0x0f, 0x10, 0x11, 0x12, 0x13,
482 0x1d, 0x1e, 0x1f, 0x20
483};
0ffa9807 484static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR
485 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
486 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 487 0x1f,
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488};
489
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MP
490static hda_nid_t stac927x_pin_nids[14] = {
491 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
492 0x0f, 0x10, 0x11, 0x12, 0x13,
493 0x14, 0x21, 0x22, 0x23,
494};
495
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MP
496static hda_nid_t stac9205_pin_nids[12] = {
497 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
498 0x0f, 0x14, 0x16, 0x17, 0x18,
499 0x21, 0x22,
f3302a59
MP
500};
501
89385035
MR
502#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
503
504static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
505 struct snd_ctl_elem_value *ucontrol)
506{
507 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
508 struct sigmatel_spec *spec = codec->spec;
509 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
510
511 kcontrol->private_value ^= get_amp_nid(kcontrol);
512 kcontrol->private_value |= nid;
513
514 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
515}
516
517static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
518 struct snd_ctl_elem_value *ucontrol)
519{
520 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
521 struct sigmatel_spec *spec = codec->spec;
522 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
523
524 kcontrol->private_value ^= get_amp_nid(kcontrol);
525 kcontrol->private_value |= nid;
526
527 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
528}
529
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MP
530static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
531 struct snd_ctl_elem_info *uinfo)
532{
533 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
534 struct sigmatel_spec *spec = codec->spec;
535 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
536}
537
538static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
539 struct snd_ctl_elem_value *ucontrol)
540{
541 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
542 struct sigmatel_spec *spec = codec->spec;
e1f0d669 543 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 544
e1f0d669 545 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP
546 return 0;
547}
548
549static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
550 struct snd_ctl_elem_value *ucontrol)
551{
552 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
553 struct sigmatel_spec *spec = codec->spec;
e1f0d669 554 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP
555
556 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 557 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP
558}
559
d9737751
MR
560static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
561 struct snd_ctl_elem_info *uinfo)
562{
563 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
564 struct sigmatel_spec *spec = codec->spec;
565 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
566}
567
568static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
569 struct snd_ctl_elem_value *ucontrol)
570{
571 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
572 struct sigmatel_spec *spec = codec->spec;
573 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
574
575 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
576 return 0;
577}
578
579static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
580 struct snd_ctl_elem_value *ucontrol)
581{
582 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
583 struct sigmatel_spec *spec = codec->spec;
00ef50c2 584 struct hda_input_mux *smux = &spec->private_smux;
d9737751 585 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR
586 int err, val;
587 hda_nid_t nid;
d9737751 588
00ef50c2 589 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 590 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR
591 if (err < 0)
592 return err;
593
594 if (spec->spdif_mute) {
595 if (smux_idx == 0)
596 nid = spec->multiout.dig_out_nid;
597 else
598 nid = codec->slave_dig_outs[smux_idx - 1];
599 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 600 val = HDA_AMP_MUTE;
00ef50c2 601 else
c9b46f91 602 val = 0;
00ef50c2 603 /* un/mute SPDIF out */
c9b46f91
TI
604 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
605 HDA_AMP_MUTE, val);
00ef50c2
MR
606 }
607 return 0;
d9737751
MR
608}
609
c8b6bf9b 610static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M
611{
612 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
613 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 614 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M
615}
616
c8b6bf9b 617static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
618{
619 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
620 struct sigmatel_spec *spec = codec->spec;
621 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
622
623 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
624 return 0;
625}
626
c8b6bf9b 627static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
628{
629 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
630 struct sigmatel_spec *spec = codec->spec;
631 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
632
c7d4b2fa 633 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M
634 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
635}
636
b22b4821
MR
637static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
638 struct snd_ctl_elem_info *uinfo)
639{
640 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
641 struct sigmatel_spec *spec = codec->spec;
642 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
643}
644
645static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
646 struct snd_ctl_elem_value *ucontrol)
647{
648 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
649 struct sigmatel_spec *spec = codec->spec;
650
651 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
652 return 0;
653}
654
655static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
656 struct snd_ctl_elem_value *ucontrol)
657{
658 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
659 struct sigmatel_spec *spec = codec->spec;
660
661 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
662 spec->mono_nid, &spec->cur_mmux);
663}
664
89385035
MR
665static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
666 struct snd_ctl_elem_info *uinfo)
667{
668 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
669 struct sigmatel_spec *spec = codec->spec;
670 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
671}
672
673static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
674 struct snd_ctl_elem_value *ucontrol)
675{
676 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
677 struct sigmatel_spec *spec = codec->spec;
678
679 ucontrol->value.enumerated.item[0] = spec->cur_amux;
680 return 0;
681}
682
683static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
684 struct snd_ctl_elem_value *ucontrol)
685{
686 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
687 struct sigmatel_spec *spec = codec->spec;
688 struct snd_kcontrol *ctl =
689 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
690 if (!ctl)
691 return -EINVAL;
692
693 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
694 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
695
696 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
697 0, &spec->cur_amux);
698}
699
5f10c4a9
ML
700#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
701
702static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
703 struct snd_ctl_elem_value *ucontrol)
704{
705 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 706 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML
707 struct sigmatel_spec *spec = codec->spec;
708
e1f0d669
MR
709 ucontrol->value.integer.value[0] = !!(spec->aloopback &
710 (spec->aloopback_mask << idx));
5f10c4a9
ML
711 return 0;
712}
713
714static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
715 struct snd_ctl_elem_value *ucontrol)
716{
717 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
718 struct sigmatel_spec *spec = codec->spec;
e1f0d669 719 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 720 unsigned int dac_mode;
e1f0d669 721 unsigned int val, idx_val;
5f10c4a9 722
e1f0d669
MR
723 idx_val = spec->aloopback_mask << idx;
724 if (ucontrol->value.integer.value[0])
725 val = spec->aloopback | idx_val;
726 else
727 val = spec->aloopback & ~idx_val;
68ea7b2f 728 if (spec->aloopback == val)
5f10c4a9
ML
729 return 0;
730
68ea7b2f 731 spec->aloopback = val;
5f10c4a9 732
e1f0d669
MR
733 /* Only return the bits defined by the shift value of the
734 * first two bytes of the mask
735 */
5f10c4a9 736 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR
737 kcontrol->private_value & 0xFFFF, 0x0);
738 dac_mode >>= spec->aloopback_shift;
5f10c4a9 739
e1f0d669 740 if (spec->aloopback & idx_val) {
5f10c4a9 741 snd_hda_power_up(codec);
e1f0d669 742 dac_mode |= idx_val;
5f10c4a9
ML
743 } else {
744 snd_hda_power_down(codec);
e1f0d669 745 dac_mode &= ~idx_val;
5f10c4a9
ML
746 }
747
748 snd_hda_codec_write_cache(codec, codec->afg, 0,
749 kcontrol->private_value >> 16, dac_mode);
750
751 return 1;
752}
753
c7d4b2fa 754static struct hda_verb stac9200_core_init[] = {
2f2f4251 755 /* set dac0mux for dac converter */
c7d4b2fa 756 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M
757 {}
758};
759
1194b5b7
TI
760static struct hda_verb stac9200_eapd_init[] = {
761 /* set dac0mux for dac converter */
762 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
763 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
764 {}
765};
766
e1f0d669
MR
767static struct hda_verb stac92hd73xx_6ch_core_init[] = {
768 /* set master volume and direct control */
769 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
770 /* setup adcs to point to mixer */
771 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
772 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
773 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
774 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
775 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
776 /* setup import muxs */
777 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
778 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
779 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
780 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
781 {}
782};
783
d654a660
MR
784static struct hda_verb dell_eq_core_init[] = {
785 /* set master volume to max value without distortion
786 * and direct control */
787 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR
788 /* setup adcs to point to mixer */
789 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
790 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
791 /* setup import muxs */
792 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
793 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
794 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
795 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
796 {}
797};
798
52fe0f9d 799static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 800 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR
801 /* setup adcs to point to mixer */
802 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
803 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
804 /* setup import muxs */
805 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
806 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
807 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
808 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
809 {}
810};
811
e1f0d669
MR
812static struct hda_verb stac92hd73xx_8ch_core_init[] = {
813 /* set master volume and direct control */
814 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
815 /* setup adcs to point to mixer */
816 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
817 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
818 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
819 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
820 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
821 /* setup import muxs */
822 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
823 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
824 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
825 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
826 {}
827};
828
829static struct hda_verb stac92hd73xx_10ch_core_init[] = {
830 /* set master volume and direct control */
831 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
832 /* dac3 is connected to import3 mux */
833 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR
834 /* setup adcs to point to mixer */
835 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
836 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
837 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
838 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
839 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
840 /* setup import muxs */
841 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
842 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
843 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
844 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
845 {}
846};
847
d0513fc6 848static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR
849 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
850 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
851 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
852
853 /* power state controls amps */
854 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 855 {}
d0513fc6
MR
856};
857
e035b841 858static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR
859 /* set master volume and direct control */
860 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
541eee87
MR
861 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
862 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
863 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
864 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
574f3c4f 865 {}
541eee87
MR
866};
867
4b33c767 868#define HD_DISABLE_PORTF 2
541eee87 869static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR
870 /* start of config #1 */
871
872 /* connect port 0f to audio mixer */
873 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR
874 /* unmute right and left channels for node 0x0f */
875 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
876 /* start of config #2 */
877
e035b841
MR
878 /* set master volume and direct control */
879 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
aafc4412 880 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR
881 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
882 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
883 {}
884};
885
8e21c34c
TD
886static struct hda_verb stac925x_core_init[] = {
887 /* set dac0mux for dac converter */
888 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI
889 /* mute the master volume */
890 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD
891 {}
892};
893
c7d4b2fa 894static struct hda_verb stac922x_core_init[] = {
2f2f4251 895 /* set master volume and direct control */
c7d4b2fa 896 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M
897 {}
898};
899
93ed1503 900static struct hda_verb d965_core_init[] = {
19039bd0 901 /* set master volume and direct control */
93ed1503 902 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI
903 /* unmute node 0x1b */
904 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
905 /* select node 0x03 as DAC */
906 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
907 {}
908};
909
3cc08dc6
MP
910static struct hda_verb stac927x_core_init[] = {
911 /* set master volume and direct control */
912 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR
913 /* enable analog pc beep path */
914 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP
915 {}
916};
917
f3302a59
MP
918static struct hda_verb stac9205_core_init[] = {
919 /* set master volume and direct control */
920 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR
921 /* enable analog pc beep path */
922 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP
923 {}
924};
925
b22b4821
MR
926#define STAC_MONO_MUX \
927 { \
928 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
929 .name = "Mono Mux", \
930 .count = 1, \
931 .info = stac92xx_mono_mux_enum_info, \
932 .get = stac92xx_mono_mux_enum_get, \
933 .put = stac92xx_mono_mux_enum_put, \
934 }
935
89385035
MR
936#define STAC_AMP_MUX \
937 { \
938 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
939 .name = "Amp Selector Capture Switch", \
940 .count = 1, \
941 .info = stac92xx_amp_mux_enum_info, \
942 .get = stac92xx_amp_mux_enum_get, \
943 .put = stac92xx_amp_mux_enum_put, \
944 }
945
946#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
947 { \
948 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
949 .name = xname, \
950 .index = 0, \
951 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
952 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
953 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
954 .info = stac92xx_amp_volume_info, \
955 .get = stac92xx_amp_volume_get, \
956 .put = stac92xx_amp_volume_put, \
957 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
958 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
959 }
960
e1f0d669 961#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML
962 { \
963 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
964 .name = "Analog Loopback", \
e1f0d669 965 .count = cnt, \
5f10c4a9
ML
966 .info = stac92xx_aloopback_info, \
967 .get = stac92xx_aloopback_get, \
968 .put = stac92xx_aloopback_put, \
969 .private_value = verb_read | (verb_write << 16), \
970 }
971
c8b6bf9b 972static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M
973 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
974 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M
975 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
976 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M
977 { } /* end */
978};
979
2a9c7816 980#define DELL_M6_MIXER 6
e1f0d669 981static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 982 /* start of config #1 */
e1f0d669
MR
983 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
984 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
985
e1f0d669
MR
986 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
987 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
988
2a9c7816
MR
989 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
990 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
991
992 /* start of config #2 */
993 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
994 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
995
e1f0d669
MR
996 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
997 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
998
2a9c7816
MR
999 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1000
1001 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1002 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1003
1004 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1005 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1006
e1f0d669
MR
1007 { } /* end */
1008};
1009
1010static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR
1011 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1012
e1f0d669
MR
1013 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1014 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1015
1016 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1017 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1018
1019 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1020 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1021
1022 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1023 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1024
1025 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1026 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1027
1028 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1029 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1030
1031 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1032 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1033 { } /* end */
1034};
1035
1036static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR
1037 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1038
e1f0d669
MR
1039 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1040 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1041
1042 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1043 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1044
1045 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1046 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1047
1048 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1049 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1050
1051 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1052 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1053
1054 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1055 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1056
1057 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1058 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1059 { } /* end */
1060};
1061
d0513fc6
MR
1062
1063static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1064 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1065 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1066
1067 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1068 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1069
74b7ff48
MR
1070 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT),
1071 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT),
d0513fc6 1072
74b7ff48
MR
1073 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT),
1074 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT),
d0513fc6 1075
74b7ff48
MR
1076 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT),
1077 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT),
d0513fc6 1078
74b7ff48
MR
1079 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT),
1080 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT),
d0513fc6
MR
1081
1082 /*
74b7ff48
MR
1083 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT),
1084 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT),
d0513fc6
MR
1085 */
1086 { } /* end */
1087};
1088
541eee87 1089static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
4b33c767 1090 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1091
9b35947f
MR
1092 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1093 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR
1094
1095 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1096 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR
1097 /* analog pc-beep replaced with digital beep support */
1098 /*
f7c5dda2
MR
1099 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1100 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1101 */
f7c5dda2 1102
687cb98e
MR
1103 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1104 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1105
687cb98e
MR
1106 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1107 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR
1108
1109 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1110 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1111
1112 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1113 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR
1114 { } /* end */
1115};
1116
541eee87 1117static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR
1118 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1119
541eee87
MR
1120 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1121 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR
1122
1123 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1124 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR
1125 { } /* end */
1126};
1127
8e21c34c 1128static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI
1129 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
1130 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
8e21c34c 1131 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1132 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD
1133 { } /* end */
1134};
1135
9e05b7a3 1136static struct snd_kcontrol_new stac9205_mixer[] = {
e1f0d669 1137 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML
1138
1139 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1140 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1141
1142 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1143 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M
1144 { } /* end */
1145};
1146
19039bd0 1147/* This needs to be generated dynamically based on sequence */
9e05b7a3 1148static struct snd_kcontrol_new stac922x_mixer[] = {
9e05b7a3
ML
1149 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1150 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML
1151
1152 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1153 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI
1154 { } /* end */
1155};
1156
9e05b7a3 1157
d1d985f0 1158static struct snd_kcontrol_new stac927x_mixer[] = {
e1f0d669 1159 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1160
9e05b7a3
ML
1161 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1162 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1163
1164 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1165 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1166
1167 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1168 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP
1169 { } /* end */
1170};
1171
1697055e
TI
1172static struct snd_kcontrol_new stac_dmux_mixer = {
1173 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1174 .name = "Digital Input Source",
1175 /* count set later */
1176 .info = stac92xx_dmux_enum_info,
1177 .get = stac92xx_dmux_enum_get,
1178 .put = stac92xx_dmux_enum_put,
1179};
1180
d9737751
MR
1181static struct snd_kcontrol_new stac_smux_mixer = {
1182 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1183 .name = "IEC958 Playback Source",
d9737751
MR
1184 /* count set later */
1185 .info = stac92xx_smux_enum_info,
1186 .get = stac92xx_smux_enum_get,
1187 .put = stac92xx_smux_enum_put,
1188};
1189
2134ea4f
TI
1190static const char *slave_vols[] = {
1191 "Front Playback Volume",
1192 "Surround Playback Volume",
1193 "Center Playback Volume",
1194 "LFE Playback Volume",
1195 "Side Playback Volume",
1196 "Headphone Playback Volume",
1197 "Headphone Playback Volume",
1198 "Speaker Playback Volume",
1199 "External Speaker Playback Volume",
1200 "Speaker2 Playback Volume",
1201 NULL
1202};
1203
1204static const char *slave_sws[] = {
1205 "Front Playback Switch",
1206 "Surround Playback Switch",
1207 "Center Playback Switch",
1208 "LFE Playback Switch",
1209 "Side Playback Switch",
1210 "Headphone Playback Switch",
1211 "Headphone Playback Switch",
1212 "Speaker Playback Switch",
1213 "External Speaker Playback Switch",
1214 "Speaker2 Playback Switch",
edb54a55 1215 "IEC958 Playback Switch",
2134ea4f
TI
1216 NULL
1217};
1218
603c4019 1219static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1220static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1221
2f2f4251
M
1222static int stac92xx_build_controls(struct hda_codec *codec)
1223{
1224 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI
1225 struct auto_pin_cfg *cfg = &spec->autocfg;
1226 hda_nid_t nid;
2f2f4251 1227 int err;
c7d4b2fa 1228 int i;
2f2f4251
M
1229
1230 err = snd_hda_add_new_ctls(codec, spec->mixer);
1231 if (err < 0)
1232 return err;
c7d4b2fa
M
1233
1234 for (i = 0; i < spec->num_mixers; i++) {
1235 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1236 if (err < 0)
1237 return err;
1238 }
1697055e
TI
1239 if (spec->num_dmuxes > 0) {
1240 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1241 err = snd_hda_ctl_add(codec,
1697055e
TI
1242 snd_ctl_new1(&stac_dmux_mixer, codec));
1243 if (err < 0)
1244 return err;
1245 }
d9737751 1246 if (spec->num_smuxes > 0) {
00ef50c2
MR
1247 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1248 struct hda_input_mux *smux = &spec->private_smux;
1249 /* check for mute support on SPDIF out */
1250 if (wcaps & AC_WCAP_OUT_AMP) {
1251 smux->items[smux->num_items].label = "Off";
1252 smux->items[smux->num_items].index = 0;
1253 smux->num_items++;
1254 spec->spdif_mute = 1;
1255 }
d9737751 1256 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1257 err = snd_hda_ctl_add(codec,
d9737751
MR
1258 snd_ctl_new1(&stac_smux_mixer, codec));
1259 if (err < 0)
1260 return err;
1261 }
c7d4b2fa 1262
dabbed6f
M
1263 if (spec->multiout.dig_out_nid) {
1264 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1265 if (err < 0)
1266 return err;
9a08160b
TI
1267 err = snd_hda_create_spdif_share_sw(codec,
1268 &spec->multiout);
1269 if (err < 0)
1270 return err;
1271 spec->multiout.share_spdif = 1;
dabbed6f 1272 }
da74ae3e 1273 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M
1274 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1275 if (err < 0)
1276 return err;
1277 }
2134ea4f
TI
1278
1279 /* if we have no master control, let's create it */
1280 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1281 unsigned int vmaster_tlv[4];
2134ea4f 1282 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1283 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI
1284 /* correct volume offset */
1285 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
2134ea4f 1286 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1287 vmaster_tlv, slave_vols);
2134ea4f
TI
1288 if (err < 0)
1289 return err;
1290 }
1291 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1292 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1293 NULL, slave_sws);
1294 if (err < 0)
1295 return err;
1296 }
1297
603c4019 1298 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI
1299
1300 /* create jack input elements */
1301 if (spec->hp_detect) {
1302 for (i = 0; i < cfg->hp_outs; i++) {
1303 int type = SND_JACK_HEADPHONE;
1304 nid = cfg->hp_pins[i];
1305 /* jack detection */
1306 if (cfg->hp_outs == i)
1307 type |= SND_JACK_LINEOUT;
1308 err = stac92xx_add_jack(codec, nid, type);
1309 if (err < 0)
1310 return err;
1311 }
1312 }
1313 for (i = 0; i < cfg->line_outs; i++) {
1314 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1315 SND_JACK_LINEOUT);
1316 if (err < 0)
1317 return err;
1318 }
1319 for (i = 0; i < AUTO_PIN_LAST; i++) {
1320 nid = cfg->input_pins[i];
1321 if (nid) {
1322 err = stac92xx_add_jack(codec, nid,
1323 SND_JACK_MICROPHONE);
1324 if (err < 0)
1325 return err;
1326 }
1327 }
1328
dabbed6f 1329 return 0;
2f2f4251
M
1330}
1331
403d1944 1332static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1333 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M
1334 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1335};
1336
58eec423
MCC
1337static unsigned int gateway9200_m4_pin_configs[8] = {
1338 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1339 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1340};
1341static unsigned int gateway9200_m4_2_pin_configs[8] = {
1342 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1343 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1344};
1345
1346/*
dfe495d0
TI
1347 STAC 9200 pin configs for
1348 102801A8
1349 102801DE
1350 102801E8
1351*/
1352static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI
1353 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1354 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI
1355};
1356
1357/*
1358 STAC 9200 pin configs for
1359 102801C0
1360 102801C1
1361*/
1362static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI
1363 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1364 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1365};
1366
1367/*
1368 STAC 9200 pin configs for
1369 102801C4 (Dell Dimension E310)
1370 102801C5
1371 102801C7
1372 102801D9
1373 102801DA
1374 102801E3
1375*/
1376static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI
1377 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1378 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1379};
1380
1381
1382/*
1383 STAC 9200-32 pin configs for
1384 102801B5 (Dell Inspiron 630m)
1385 102801D8 (Dell Inspiron 640m)
1386*/
1387static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI
1388 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1389 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1390};
1391
1392/*
1393 STAC 9200-32 pin configs for
1394 102801C2 (Dell Latitude D620)
1395 102801C8
1396 102801CC (Dell Latitude D820)
1397 102801D4
1398 102801D6
1399*/
1400static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI
1401 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1402 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI
1403};
1404
1405/*
1406 STAC 9200-32 pin configs for
1407 102801CE (Dell XPS M1710)
1408 102801CF (Dell Precision M90)
1409*/
1410static unsigned int dell9200_m23_pin_configs[8] = {
1411 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1412 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1413};
1414
1415/*
1416 STAC 9200-32 pin configs for
1417 102801C9
1418 102801CA
1419 102801CB (Dell Latitude 120L)
1420 102801D3
1421*/
1422static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI
1423 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1424 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1425};
1426
1427/*
1428 STAC 9200-32 pin configs for
1429 102801BD (Dell Inspiron E1505n)
1430 102801EE
1431 102801EF
1432*/
1433static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI
1434 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1435 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1436};
1437
1438/*
1439 STAC 9200-32 pin configs for
1440 102801F5 (Dell Inspiron 1501)
1441 102801F6
1442*/
1443static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI
1444 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1445 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1446};
1447
1448/*
1449 STAC 9200-32
1450 102801CD (Dell Inspiron E1705/9400)
1451*/
1452static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI
1453 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1454 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI
1455};
1456
bf277785
TD
1457static unsigned int oqo9200_pin_configs[8] = {
1458 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1459 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1460};
1461
dfe495d0 1462
f5fcc13c
TI
1463static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1464 [STAC_REF] = ref9200_pin_configs,
bf277785 1465 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI
1466 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1467 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1468 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1469 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1470 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1471 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1472 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1473 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1474 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1475 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC
1476 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1477 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1478 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP
1479};
1480
f5fcc13c
TI
1481static const char *stac9200_models[STAC_9200_MODELS] = {
1482 [STAC_REF] = "ref",
bf277785 1483 [STAC_9200_OQO] = "oqo",
dfe495d0
TI
1484 [STAC_9200_DELL_D21] = "dell-d21",
1485 [STAC_9200_DELL_D22] = "dell-d22",
1486 [STAC_9200_DELL_D23] = "dell-d23",
1487 [STAC_9200_DELL_M21] = "dell-m21",
1488 [STAC_9200_DELL_M22] = "dell-m22",
1489 [STAC_9200_DELL_M23] = "dell-m23",
1490 [STAC_9200_DELL_M24] = "dell-m24",
1491 [STAC_9200_DELL_M25] = "dell-m25",
1492 [STAC_9200_DELL_M26] = "dell-m26",
1493 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC
1494 [STAC_9200_M4] = "gateway-m4",
1495 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1496 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI
1497};
1498
1499static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1500 /* SigmaTel reference board */
1501 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1502 "DFI LanParty", STAC_REF),
577aa2c1
MR
1503 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1504 "DFI LanParty", STAC_REF),
e7377071 1505 /* Dell laptops have BIOS problem */
dfe495d0
TI
1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1507 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI
1509 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1511 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1513 "unknown Dell", STAC_9200_DELL_D22),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1515 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI
1517 "Dell Latitude D620", STAC_9200_DELL_M22),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1519 "unknown Dell", STAC_9200_DELL_D23),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1521 "unknown Dell", STAC_9200_DELL_D23),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1523 "unknown Dell", STAC_9200_DELL_M22),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1525 "unknown Dell", STAC_9200_DELL_M24),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1527 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1529 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1531 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1533 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1535 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI
1537 "Dell Precision M90", STAC_9200_DELL_M23),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1539 "unknown Dell", STAC_9200_DELL_M22),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1541 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1543 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI
1545 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1547 "unknown Dell", STAC_9200_DELL_D23),
1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1549 "unknown Dell", STAC_9200_DELL_D23),
1550 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1551 "unknown Dell", STAC_9200_DELL_D21),
1552 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1553 "unknown Dell", STAC_9200_DELL_D23),
1554 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1555 "unknown Dell", STAC_9200_DELL_D21),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1557 "unknown Dell", STAC_9200_DELL_M25),
1558 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1559 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1560 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI
1561 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1562 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1563 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1564 /* Panasonic */
117f257d 1565 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1566 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC
1567 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1568 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1569 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD
1570 /* OQO Mobile */
1571 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP
1572 {} /* terminator */
1573};
1574
8e21c34c
TD
1575static unsigned int ref925x_pin_configs[8] = {
1576 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1577 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD
1578};
1579
9cb36c2a
MCC
1580static unsigned int stac925xM1_pin_configs[8] = {
1581 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1582 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD
1583};
1584
9cb36c2a
MCC
1585static unsigned int stac925xM1_2_pin_configs[8] = {
1586 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1587 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1588};
58eec423 1589
9cb36c2a
MCC
1590static unsigned int stac925xM2_pin_configs[8] = {
1591 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1592 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD
1593};
1594
8e21c34c 1595static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC
1596 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1597 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1598};
1599
9cb36c2a
MCC
1600static unsigned int stac925xM3_pin_configs[8] = {
1601 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1602 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1603};
58eec423 1604
9cb36c2a
MCC
1605static unsigned int stac925xM5_pin_configs[8] = {
1606 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1607 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1608};
1609
9cb36c2a
MCC
1610static unsigned int stac925xM6_pin_configs[8] = {
1611 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1612 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD
1613};
1614
1615static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1616 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC
1617 [STAC_M1] = stac925xM1_pin_configs,
1618 [STAC_M1_2] = stac925xM1_2_pin_configs,
1619 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1620 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC
1621 [STAC_M3] = stac925xM3_pin_configs,
1622 [STAC_M5] = stac925xM5_pin_configs,
1623 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD
1624};
1625
1626static const char *stac925x_models[STAC_925x_MODELS] = {
1627 [STAC_REF] = "ref",
9cb36c2a
MCC
1628 [STAC_M1] = "m1",
1629 [STAC_M1_2] = "m1-2",
1630 [STAC_M2] = "m2",
8e21c34c 1631 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC
1632 [STAC_M3] = "m3",
1633 [STAC_M5] = "m5",
1634 [STAC_M6] = "m6",
8e21c34c
TD
1635};
1636
9cb36c2a 1637static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC
1638 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1639 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1640 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1641 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1642 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC
1643 /* Not sure about the brand name for those */
1644 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1645 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1646 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1647 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1648 {} /* terminator */
8e21c34c
TD
1649};
1650
1651static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1652 /* SigmaTel reference board */
1653 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1654 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1655 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC
1656
1657 /* Default table for unknown ID */
1658 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1659
8e21c34c
TD
1660 {} /* terminator */
1661};
1662
a7662640 1663static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR
1664 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1665 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1666 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR
1667 0x01452050,
1668};
1669
1670static unsigned int dell_m6_pin_configs[13] = {
1671 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1672 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1673 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1674 0x4f0000f0,
e1f0d669
MR
1675};
1676
1677static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1678 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI
1679 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1680 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1681 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1682 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR
1683};
1684
1685static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1686 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1687 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI
1688 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1689 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1690 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1691 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR
1692};
1693
1694static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1695 /* SigmaTel reference board */
1696 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1697 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR
1698 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1699 "DFI LanParty", STAC_92HD73XX_REF),
a7662640 1700 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1701 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1702 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1703 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1704 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1705 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1707 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1709 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1711 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI
1713 "unknown Dell", STAC_DELL_M6_DMIC),
1714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1715 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1717 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS
1718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1719 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR
1720 {} /* terminator */
1721};
1722
d0513fc6
MR
1723static unsigned int ref92hd83xxx_pin_configs[14] = {
1724 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1725 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1726 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1727 0x01451160, 0x98560170,
1728};
1729
1730static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1731 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1732 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
d0513fc6
MR
1733};
1734
1735static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1736 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1737 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
d0513fc6
MR
1738};
1739
1740static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1741 /* SigmaTel reference board */
1742 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1743 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR
1744 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1745 "DFI LanParty", STAC_92HD83XXX_REF),
574f3c4f 1746 {} /* terminator */
d0513fc6
MR
1747};
1748
0ffa9807 1749static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1750 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1751 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1752 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR
1753};
1754
0ffa9807 1755static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1756 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1757 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1758 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1759};
1760
0ffa9807 1761static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR
1762 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1763 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1764 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR
1765};
1766
3a7abfd2
MR
1767static unsigned int dell_m4_3_pin_configs[11] = {
1768 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1769 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1770 0x40f000f0, 0x044413b0, 0x044413b0,
1771};
1772
e035b841
MR
1773static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1774 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR
1775 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1776 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1777 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1778 [STAC_HP_M4] = NULL,
1b0652eb 1779 [STAC_HP_DV5] = NULL,
e035b841
MR
1780};
1781
1782static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1783 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR
1784 [STAC_DELL_M4_1] = "dell-m4-1",
1785 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1786 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1787 [STAC_HP_M4] = "hp-m4",
1b0652eb 1788 [STAC_HP_DV5] = "hp-dv5",
e035b841
MR
1789};
1790
1791static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1792 /* SigmaTel reference board */
1793 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1794 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR
1795 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1796 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI
1797 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1798 "HP dv5", STAC_HP_M4),
1799 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1800 "HP dv7", STAC_HP_M4),
e0c0e943
TI
1801 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f7,
1802 "HP dv4", STAC_HP_DV5),
69dfaefe
TI
1803 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc,
1804 "HP dv7", STAC_HP_M4),
dafb70ce 1805 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603,
1b0652eb 1806 "HP dv5", STAC_HP_DV5),
9a9e2359
MR
1807 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1808 "unknown HP", STAC_HP_M4),
a7662640
MR
1809 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1810 "unknown Dell", STAC_DELL_M4_1),
1811 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1812 "unknown Dell", STAC_DELL_M4_1),
1813 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1814 "unknown Dell", STAC_DELL_M4_1),
1815 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1816 "unknown Dell", STAC_DELL_M4_1),
1817 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1818 "unknown Dell", STAC_DELL_M4_1),
1819 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1820 "unknown Dell", STAC_DELL_M4_1),
1821 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1822 "unknown Dell", STAC_DELL_M4_1),
1823 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1824 "unknown Dell", STAC_DELL_M4_2),
1825 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1826 "unknown Dell", STAC_DELL_M4_2),
1827 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1828 "unknown Dell", STAC_DELL_M4_2),
1829 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1830 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR
1831 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1832 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR
1833 {} /* terminator */
1834};
1835
403d1944
MP
1836static unsigned int ref922x_pin_configs[10] = {
1837 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1838 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M
1839 0x40000100, 0x40000100,
1840};
1841
dfe495d0
TI
1842/*
1843 STAC 922X pin configs for
1844 102801A7
1845 102801AB
1846 102801A9
1847 102801D1
1848 102801D2
1849*/
1850static unsigned int dell_922x_d81_pin_configs[10] = {
1851 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1852 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1853 0x01813122, 0x400001f2,
1854};
1855
1856/*
1857 STAC 922X pin configs for
1858 102801AC
1859 102801D0
1860*/
1861static unsigned int dell_922x_d82_pin_configs[10] = {
1862 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1863 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1864 0x01813122, 0x400001f1,
1865};
1866
1867/*
1868 STAC 922X pin configs for
1869 102801BF
1870*/
1871static unsigned int dell_922x_m81_pin_configs[10] = {
1872 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1873 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1874 0x40C003f1, 0x405003f0,
1875};
1876
1877/*
1878 STAC 9221 A1 pin configs for
1879 102801D7 (Dell XPS M1210)
1880*/
1881static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ
1882 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1883 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI
1884 0x508003f3, 0x405003f4,
1885};
1886
403d1944 1887static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1888 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP
1889 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1890 0x02a19120, 0x40000100,
1891};
1892
1893static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP
1894 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1895 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP
1896 0x02a19320, 0x40000100,
1897};
1898
5d5d3bc3
IZ
1899static unsigned int intel_mac_v1_pin_configs[10] = {
1900 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1901 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1902 0x400000fc, 0x400000fb,
1903};
1904
1905static unsigned int intel_mac_v2_pin_configs[10] = {
1906 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1907 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1908 0x400000fc, 0x400000fb,
6f0778d8
NB
1909};
1910
5d5d3bc3
IZ
1911static unsigned int intel_mac_v3_pin_configs[10] = {
1912 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1913 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI
1914 0x400000fc, 0x400000fb,
1915};
1916
5d5d3bc3
IZ
1917static unsigned int intel_mac_v4_pin_configs[10] = {
1918 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1919 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF
1920 0x400000fc, 0x400000fb,
1921};
1922
5d5d3bc3
IZ
1923static unsigned int intel_mac_v5_pin_configs[10] = {
1924 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1925 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1926 0x400000fc, 0x400000fb,
0dae0f83
TI
1927};
1928
8c650087
MCC
1929static unsigned int ecs202_pin_configs[10] = {
1930 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1931 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1932 0x9037012e, 0x40e000f2,
1933};
76c08828 1934
19039bd0 1935static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1936 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI
1937 [STAC_D945GTP3] = d945gtp3_pin_configs,
1938 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ
1939 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1940 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1941 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1942 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1943 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1944 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1945 /* for backward compatibility */
5d5d3bc3
IZ
1946 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1947 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1948 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1949 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1950 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1951 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1952 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI
1953 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1954 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1955 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1956 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP
1957};
1958
f5fcc13c
TI
1959static const char *stac922x_models[STAC_922X_MODELS] = {
1960 [STAC_D945_REF] = "ref",
1961 [STAC_D945GTP5] = "5stack",
1962 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ
1963 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1964 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1965 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1966 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1967 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1968 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1969 /* for backward compatibility */
f5fcc13c 1970 [STAC_MACMINI] = "macmini",
3fc24d85 1971 [STAC_MACBOOK] = "macbook",
6f0778d8
NB
1972 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1973 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1974 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1975 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1976 [STAC_ECS_202] = "ecs202",
dfe495d0
TI
1977 [STAC_922X_DELL_D81] = "dell-d81",
1978 [STAC_922X_DELL_D82] = "dell-d82",
1979 [STAC_922X_DELL_M81] = "dell-m81",
1980 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI
1981};
1982
1983static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1984 /* SigmaTel reference board */
1985 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1986 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR
1987 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1988 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI
1989 /* Intel 945G based systems */
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1991 "Intel D945G", STAC_D945GTP3),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1993 "Intel D945G", STAC_D945GTP3),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1995 "Intel D945G", STAC_D945GTP3),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1997 "Intel D945G", STAC_D945GTP3),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1999 "Intel D945G", STAC_D945GTP3),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2001 "Intel D945G", STAC_D945GTP3),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2003 "Intel D945G", STAC_D945GTP3),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2005 "Intel D945G", STAC_D945GTP3),
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2007 "Intel D945G", STAC_D945GTP3),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2009 "Intel D945G", STAC_D945GTP3),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2011 "Intel D945G", STAC_D945GTP3),
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2013 "Intel D945G", STAC_D945GTP3),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2015 "Intel D945G", STAC_D945GTP3),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2017 "Intel D945G", STAC_D945GTP3),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2019 "Intel D945G", STAC_D945GTP3),
2020 /* Intel D945G 5-stack systems */
2021 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2022 "Intel D945G", STAC_D945GTP5),
2023 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2024 "Intel D945G", STAC_D945GTP5),
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2026 "Intel D945G", STAC_D945GTP5),
2027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2028 "Intel D945G", STAC_D945GTP5),
2029 /* Intel 945P based systems */
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2031 "Intel D945P", STAC_D945GTP3),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2033 "Intel D945P", STAC_D945GTP3),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2035 "Intel D945P", STAC_D945GTP3),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2037 "Intel D945P", STAC_D945GTP3),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2039 "Intel D945P", STAC_D945GTP3),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2041 "Intel D945P", STAC_D945GTP5),
8056d47e
TI
2042 /* other intel */
2043 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2044 "Intel D945", STAC_D945_REF),
f5fcc13c 2045 /* other systems */
536319af 2046 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2047 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2048 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI
2049 /* Dell systems */
2050 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2051 "unknown Dell", STAC_922X_DELL_D81),
2052 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2053 "unknown Dell", STAC_922X_DELL_D81),
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2055 "unknown Dell", STAC_922X_DELL_D81),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2057 "unknown Dell", STAC_922X_DELL_D82),
2058 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2059 "unknown Dell", STAC_922X_DELL_M81),
2060 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2061 "unknown Dell", STAC_922X_DELL_D82),
2062 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2063 "unknown Dell", STAC_922X_DELL_D81),
2064 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2065 "unknown Dell", STAC_922X_DELL_D81),
2066 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2067 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC
2068 /* ECS/PC Chips boards */
2069 SND_PCI_QUIRK(0x1019, 0x2144,
2070 "ECS/PC chips", STAC_ECS_202),
2071 SND_PCI_QUIRK(0x1019, 0x2608,
2072 "ECS/PC chips", STAC_ECS_202),
2073 SND_PCI_QUIRK(0x1019, 0x2633,
2074 "ECS/PC chips P17G/1333", STAC_ECS_202),
2075 SND_PCI_QUIRK(0x1019, 0x2811,
2076 "ECS/PC chips", STAC_ECS_202),
2077 SND_PCI_QUIRK(0x1019, 0x2812,
2078 "ECS/PC chips", STAC_ECS_202),
2079 SND_PCI_QUIRK(0x1019, 0x2813,
2080 "ECS/PC chips", STAC_ECS_202),
2081 SND_PCI_QUIRK(0x1019, 0x2814,
2082 "ECS/PC chips", STAC_ECS_202),
2083 SND_PCI_QUIRK(0x1019, 0x2815,
2084 "ECS/PC chips", STAC_ECS_202),
2085 SND_PCI_QUIRK(0x1019, 0x2816,
2086 "ECS/PC chips", STAC_ECS_202),
2087 SND_PCI_QUIRK(0x1019, 0x2817,
2088 "ECS/PC chips", STAC_ECS_202),
2089 SND_PCI_QUIRK(0x1019, 0x2818,
2090 "ECS/PC chips", STAC_ECS_202),
2091 SND_PCI_QUIRK(0x1019, 0x2819,
2092 "ECS/PC chips", STAC_ECS_202),
2093 SND_PCI_QUIRK(0x1019, 0x2820,
2094 "ECS/PC chips", STAC_ECS_202),
403d1944
MP
2095 {} /* terminator */
2096};
2097
3cc08dc6 2098static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD
2099 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2100 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2101 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2102 0x01c42190, 0x40000100,
3cc08dc6
MP
2103};
2104
93ed1503 2105static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD
2106 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2107 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2108 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2109 0x40000100, 0x40000100
2110};
2111
93ed1503
TD
2112static unsigned int d965_5st_pin_configs[14] = {
2113 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2114 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2115 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2116 0x40000100, 0x40000100
2117};
2118
4ff076e5
TD
2119static unsigned int dell_3st_pin_configs[14] = {
2120 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2121 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2122 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD
2123 0x40c003fc, 0x40000100
2124};
2125
93ed1503 2126static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2127 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR
2128 [STAC_D965_REF] = ref927x_pin_configs,
2129 [STAC_D965_3ST] = d965_3st_pin_configs,
2130 [STAC_D965_5ST] = d965_5st_pin_configs,
2131 [STAC_DELL_3ST] = dell_3st_pin_configs,
2132 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP
2133};
2134
f5fcc13c 2135static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2136 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR
2137 [STAC_D965_REF] = "ref",
2138 [STAC_D965_3ST] = "3stack",
2139 [STAC_D965_5ST] = "5stack",
2140 [STAC_DELL_3ST] = "dell-3stack",
2141 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI
2142};
2143
2144static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2145 /* SigmaTel reference board */
2146 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2147 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR
2148 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2149 "DFI LanParty", STAC_D965_REF),
81d3dbde 2150 /* Intel 946 based systems */
f5fcc13c
TI
2151 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2152 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2153 /* 965 based 3 stack systems */
f5fcc13c
TI
2154 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2155 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2157 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2158 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2159 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2160 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2161 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2163 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2164 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2165 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2166 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2167 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2168 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2169 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2170 /* Dell 3 stack systems */
8e9068b1 2171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD
2173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2175 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR
2176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2182 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2183 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2184 /* 965 based 5 stack systems */
f5fcc13c
TI
2185 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2186 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2187 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2188 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2189 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2190 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2191 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2192 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2193 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP
2194 {} /* terminator */
2195};
2196
f3302a59
MP
2197static unsigned int ref9205_pin_configs[12] = {
2198 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2199 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2200 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP
2201};
2202
dfe495d0
TI
2203/*
2204 STAC 9205 pin configs for
2205 102801F1
2206 102801F2
2207 102801FC
2208 102801FD
2209 10280204
2210 1028021F
3fa2ef74 2211 10280228 (Dell Vostro 1500)
dfe495d0
TI
2212*/
2213static unsigned int dell_9205_m42_pin_configs[12] = {
2214 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2215 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2216 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2217};
2218
2219/*
2220 STAC 9205 pin configs for
2221 102801F9
2222 102801FA
2223 102801FE
2224 102801FF (Dell Precision M4300)
2225 10280206
2226 10280200
2227 10280201
2228*/
2229static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD
2230 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2231 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2232 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2233};
2234
dfe495d0 2235static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD
2236 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2237 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2238 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2239};
2240
f5fcc13c 2241static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2242 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI
2243 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2244 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2245 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2246 [STAC_9205_EAPD] = NULL,
f3302a59
MP
2247};
2248
f5fcc13c
TI
2249static const char *stac9205_models[STAC_9205_MODELS] = {
2250 [STAC_9205_REF] = "ref",
dfe495d0 2251 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD
2252 [STAC_9205_DELL_M43] = "dell-m43",
2253 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2254 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI
2255};
2256
2257static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2258 /* SigmaTel reference board */
2259 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2260 "DFI LanParty", STAC_9205_REF),
577aa2c1
MR
2261 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2262 "DFI LanParty", STAC_9205_REF),
d9a4268e 2263 /* Dell */
dfe495d0
TI
2264 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2265 "unknown Dell", STAC_9205_DELL_M42),
2266 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2267 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2268 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2269 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2271 "Dell Precision", STAC_9205_DELL_M43),
2272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2273 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI
2274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2275 "unknown Dell", STAC_9205_DELL_M42),
2276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2277 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD
2278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2279 "Dell Precision", STAC_9205_DELL_M43),
2280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2281 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI
2282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2283 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI
2284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2285 "Dell Precision", STAC_9205_DELL_M43),
2286 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2287 "Dell Precision", STAC_9205_DELL_M43),
2288 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2289 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2290 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2291 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR
2292 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2293 "Dell Vostro 1500", STAC_9205_DELL_M42),
d9a4268e
TI
2294 /* Gateway */
2295 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP
2296 {} /* terminator */
2297};
2298
11b44bbd
RF
2299static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2300{
2301 int i;
2302 struct sigmatel_spec *spec = codec->spec;
2303
af9f341a
TI
2304 kfree(spec->pin_configs);
2305 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2306 GFP_KERNEL);
2307 if (!spec->pin_configs)
2308 return -ENOMEM;
11b44bbd
RF
2309
2310 for (i = 0; i < spec->num_pins; i++) {
2311 hda_nid_t nid = spec->pin_nids[i];
2312 unsigned int pin_cfg;
2313
2314 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2315 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2316 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2317 nid, pin_cfg);
af9f341a 2318 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF
2319 }
2320
2321 return 0;
2322}
2323
87d48363
MR
2324static void stac92xx_set_config_reg(struct hda_codec *codec,
2325 hda_nid_t pin_nid, unsigned int pin_config)
2326{
2327 int i;
2328 snd_hda_codec_write(codec, pin_nid, 0,
2329 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2330 pin_config & 0x000000ff);
2331 snd_hda_codec_write(codec, pin_nid, 0,
2332 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2333 (pin_config & 0x0000ff00) >> 8);
2334 snd_hda_codec_write(codec, pin_nid, 0,
2335 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2336 (pin_config & 0x00ff0000) >> 16);
2337 snd_hda_codec_write(codec, pin_nid, 0,
2338 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2339 pin_config >> 24);
2340 i = snd_hda_codec_read(codec, pin_nid, 0,
2341 AC_VERB_GET_CONFIG_DEFAULT,
2342 0x00);
2343 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2344 pin_nid, i);
2345}
2346
2f2f4251
M
2347static void stac92xx_set_config_regs(struct hda_codec *codec)
2348{
2349 int i;
2350 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2351
87d48363
MR
2352 if (!spec->pin_configs)
2353 return;
11b44bbd 2354
87d48363
MR
2355 for (i = 0; i < spec->num_pins; i++)
2356 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2357 spec->pin_configs[i]);
2f2f4251 2358}
2f2f4251 2359
af9f341a
TI
2360static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2361{
2362 struct sigmatel_spec *spec = codec->spec;
2363
2364 if (!pins)
2365 return stac92xx_save_bios_config_regs(codec);
2366
2367 kfree(spec->pin_configs);
2368 spec->pin_configs = kmemdup(pins,
2369 spec->num_pins * sizeof(*pins),
2370 GFP_KERNEL);
2371 if (!spec->pin_configs)
2372 return -ENOMEM;
2373
2374 stac92xx_set_config_regs(codec);
2375 return 0;
2376}
2377
2378static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2379 unsigned int cfg)
2380{
2381 struct sigmatel_spec *spec = codec->spec;
2382 int i;
2383
2384 for (i = 0; i < spec->num_pins; i++) {
2385 if (spec->pin_nids[i] == nid) {
2386 spec->pin_configs[i] = cfg;
2387 stac92xx_set_config_reg(codec, nid, cfg);
2388 break;
2389 }
2390 }
2391}
2392
dabbed6f 2393/*
c7d4b2fa 2394 * Analog playback callbacks
dabbed6f 2395 */
c7d4b2fa
M
2396static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2397 struct hda_codec *codec,
c8b6bf9b 2398 struct snd_pcm_substream *substream)
2f2f4251 2399{
dabbed6f 2400 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR
2401 if (spec->stream_delay)
2402 msleep(spec->stream_delay);
9a08160b
TI
2403 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2404 hinfo);
2f2f4251
M
2405}
2406
2f2f4251
M
2407static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2408 struct hda_codec *codec,
2409 unsigned int stream_tag,
2410 unsigned int format,
c8b6bf9b 2411 struct snd_pcm_substream *substream)
2f2f4251
M
2412{
2413 struct sigmatel_spec *spec = codec->spec;
403d1944 2414 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M
2415}
2416
2417static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2418 struct hda_codec *codec,
c8b6bf9b 2419 struct snd_pcm_substream *substream)
2f2f4251
M
2420{
2421 struct sigmatel_spec *spec = codec->spec;
2422 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2423}
2424
dabbed6f
M
2425/*
2426 * Digital playback callbacks
2427 */
2428static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2429 struct hda_codec *codec,
c8b6bf9b 2430 struct snd_pcm_substream *substream)
dabbed6f
M
2431{
2432 struct sigmatel_spec *spec = codec->spec;
2433 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2434}
2435
2436static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2437 struct hda_codec *codec,
c8b6bf9b 2438 struct snd_pcm_substream *substream)
dabbed6f
M
2439{
2440 struct sigmatel_spec *spec = codec->spec;
2441 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2442}
2443
6b97eb45
TI
2444static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2445 struct hda_codec *codec,
2446 unsigned int stream_tag,
2447 unsigned int format,
2448 struct snd_pcm_substream *substream)
2449{
2450 struct sigmatel_spec *spec = codec->spec;
2451 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2452 stream_tag, format, substream);
2453}
2454
dabbed6f 2455
2f2f4251
M
2456/*
2457 * Analog capture callbacks
2458 */
2459static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2460 struct hda_codec *codec,
2461 unsigned int stream_tag,
2462 unsigned int format,
c8b6bf9b 2463 struct snd_pcm_substream *substream)
2f2f4251
M
2464{
2465 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2466 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2467
8daaaa97
MR
2468 if (spec->powerdown_adcs) {
2469 msleep(40);
8c2f767b 2470 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR
2471 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2472 }
2473 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M
2474 return 0;
2475}
2476
2477static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2478 struct hda_codec *codec,
c8b6bf9b 2479 struct snd_pcm_substream *substream)
2f2f4251
M
2480{
2481 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2482 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2483
8daaaa97
MR
2484 snd_hda_codec_cleanup_stream(codec, nid);
2485 if (spec->powerdown_adcs)
8c2f767b 2486 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2487 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M
2488 return 0;
2489}
2490
dabbed6f
M
2491static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2492 .substreams = 1,
2493 .channels_min = 2,
2494 .channels_max = 2,
2495 /* NID is set in stac92xx_build_pcms */
2496 .ops = {
2497 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI
2498 .close = stac92xx_dig_playback_pcm_close,
2499 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M
2500 },
2501};
2502
2503static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2504 .substreams = 1,
2505 .channels_min = 2,
2506 .channels_max = 2,
2507 /* NID is set in stac92xx_build_pcms */
2508};
2509
2f2f4251
M
2510static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2511 .substreams = 1,
2512 .channels_min = 2,
c7d4b2fa 2513 .channels_max = 8,
2f2f4251
M
2514 .nid = 0x02, /* NID to query formats and rates */
2515 .ops = {
2516 .open = stac92xx_playback_pcm_open,
2517 .prepare = stac92xx_playback_pcm_prepare,
2518 .cleanup = stac92xx_playback_pcm_cleanup
2519 },
2520};
2521
3cc08dc6
MP
2522static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2523 .substreams = 1,
2524 .channels_min = 2,
2525 .channels_max = 2,
2526 .nid = 0x06, /* NID to query formats and rates */
2527 .ops = {
2528 .open = stac92xx_playback_pcm_open,
2529 .prepare = stac92xx_playback_pcm_prepare,
2530 .cleanup = stac92xx_playback_pcm_cleanup
2531 },
2532};
2533
2f2f4251 2534static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M
2535 .channels_min = 2,
2536 .channels_max = 2,
9e05b7a3 2537 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M
2538 .ops = {
2539 .prepare = stac92xx_capture_pcm_prepare,
2540 .cleanup = stac92xx_capture_pcm_cleanup
2541 },
2542};
2543
2544static int stac92xx_build_pcms(struct hda_codec *codec)
2545{
2546 struct sigmatel_spec *spec = codec->spec;
2547 struct hda_pcm *info = spec->pcm_rec;
2548
2549 codec->num_pcms = 1;
2550 codec->pcm_info = info;
2551
c7d4b2fa 2552 info->name = "STAC92xx Analog";
2f2f4251 2553 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI
2554 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2555 spec->multiout.dac_nids[0];
2f2f4251 2556 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2557 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2558 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP
2559
2560 if (spec->alt_switch) {
2561 codec->num_pcms++;
2562 info++;
2563 info->name = "STAC92xx Analog Alt";
2564 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2565 }
2f2f4251 2566
dabbed6f
M
2567 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2568 codec->num_pcms++;
2569 info++;
2570 info->name = "STAC92xx Digital";
8c441982 2571 info->pcm_type = spec->autocfg.dig_out_type;
dabbed6f
M
2572 if (spec->multiout.dig_out_nid) {
2573 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2574 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2575 }
2576 if (spec->dig_in_nid) {
2577 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2578 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2579 }
2580 }
2581
2f2f4251
M
2582 return 0;
2583}
2584
c960a03b
TI
2585static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2586{
2587 unsigned int pincap = snd_hda_param_read(codec, nid,
2588 AC_PAR_PIN_CAP);
2589 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2590 if (pincap & AC_PINCAP_VREF_100)
2591 return AC_PINCTL_VREF_100;
2592 if (pincap & AC_PINCAP_VREF_80)
2593 return AC_PINCTL_VREF_80;
2594 if (pincap & AC_PINCAP_VREF_50)
2595 return AC_PINCTL_VREF_50;
2596 if (pincap & AC_PINCAP_VREF_GRD)
2597 return AC_PINCTL_VREF_GRD;
2598 return 0;
2599}
2600
403d1944
MP
2601static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2602
2603{
82beb8fd
TI
2604 snd_hda_codec_write_cache(codec, nid, 0,
2605 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP
2606}
2607
7c2ba97b
MR
2608#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2609
2610static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2611 struct snd_ctl_elem_value *ucontrol)
2612{
2613 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2614 struct sigmatel_spec *spec = codec->spec;
2615
d7a89436 2616 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR
2617 return 0;
2618}
2619
c6e4c666
TI
2620static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2621 unsigned char type);
2622
7c2ba97b
MR
2623static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2624 struct snd_ctl_elem_value *ucontrol)
2625{
2626 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2627 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI
2628 int nid = kcontrol->private_value;
2629
2630 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR
2631
2632 /* check to be sure that the ports are upto date with
2633 * switch changes
2634 */
c6e4c666 2635 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR
2636
2637 return 1;
2638}
2639
a5ce8890 2640#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP
2641
2642static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2643{
2644 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2645 struct sigmatel_spec *spec = codec->spec;
2646 int io_idx = kcontrol-> private_value & 0xff;
2647
2648 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2649 return 0;
2650}
2651
2652static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2653{
2654 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2655 struct sigmatel_spec *spec = codec->spec;
2656 hda_nid_t nid = kcontrol->private_value >> 8;
2657 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2658 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP
2659
2660 spec->io_switch[io_idx] = val;
2661
2662 if (val)
2663 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI
2664 else {
2665 unsigned int pinctl = AC_PINCTL_IN_EN;
2666 if (io_idx) /* set VREF for mic */
2667 pinctl |= stac92xx_get_vref(codec, nid);
2668 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2669 }
40c1d308
JZ
2670
2671 /* check the auto-mute again: we need to mute/unmute the speaker
2672 * appropriately according to the pin direction
2673 */
2674 if (spec->hp_detect)
c6e4c666 2675 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2676
403d1944
MP
2677 return 1;
2678}
2679
0fb87bb4
ML
2680#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2681
2682static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2683 struct snd_ctl_elem_value *ucontrol)
2684{
2685 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2686 struct sigmatel_spec *spec = codec->spec;
2687
2688 ucontrol->value.integer.value[0] = spec->clfe_swap;
2689 return 0;
2690}
2691
2692static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2693 struct snd_ctl_elem_value *ucontrol)
2694{
2695 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2696 struct sigmatel_spec *spec = codec->spec;
2697 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2698 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2699
68ea7b2f 2700 if (spec->clfe_swap == val)
0fb87bb4
ML
2701 return 0;
2702
68ea7b2f 2703 spec->clfe_swap = val;
0fb87bb4
ML
2704
2705 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2706 spec->clfe_swap ? 0x4 : 0x0);
2707
2708 return 1;
2709}
2710
7c2ba97b
MR
2711#define STAC_CODEC_HP_SWITCH(xname) \
2712 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2713 .name = xname, \
2714 .index = 0, \
2715 .info = stac92xx_hp_switch_info, \
2716 .get = stac92xx_hp_switch_get, \
2717 .put = stac92xx_hp_switch_put, \
2718 }
2719
403d1944
MP
2720#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2721 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2722 .name = xname, \
2723 .index = 0, \
2724 .info = stac92xx_io_switch_info, \
2725 .get = stac92xx_io_switch_get, \
2726 .put = stac92xx_io_switch_put, \
2727 .private_value = xpval, \
2728 }
2729
0fb87bb4
ML
2730#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2731 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2732 .name = xname, \
2733 .index = 0, \
2734 .info = stac92xx_clfe_switch_info, \
2735 .get = stac92xx_clfe_switch_get, \
2736 .put = stac92xx_clfe_switch_put, \
2737 .private_value = xpval, \
2738 }
403d1944 2739
c7d4b2fa
M
2740enum {
2741 STAC_CTL_WIDGET_VOL,
2742 STAC_CTL_WIDGET_MUTE,
09a99959 2743 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR
2744 STAC_CTL_WIDGET_AMP_MUX,
2745 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2746 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2747 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2748 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M
2749};
2750
c8b6bf9b 2751static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M
2752 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2753 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2754 STAC_MONO_MUX,
89385035
MR
2755 STAC_AMP_MUX,
2756 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2757 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2758 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2759 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M
2760};
2761
2762/* add dynamic controls */
e3c75964
TI
2763static struct snd_kcontrol_new *
2764stac_control_new(struct sigmatel_spec *spec,
2765 struct snd_kcontrol_new *ktemp,
2766 const char *name)
c7d4b2fa 2767{
c8b6bf9b 2768 struct snd_kcontrol_new *knew;
c7d4b2fa 2769
603c4019
TI
2770 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2771 knew = snd_array_new(&spec->kctls);
2772 if (!knew)
e3c75964 2773 return NULL;
4d4e9bb3 2774 *knew = *ktemp;
82fe0c58 2775 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI
2776 if (!knew->name) {
2777 /* roolback */
2778 memset(knew, 0, sizeof(*knew));
2779 spec->kctls.alloced--;
2780 return NULL;
2781 }
2782 return knew;
2783}
2784
2785static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2786 struct snd_kcontrol_new *ktemp,
2787 int idx, const char *name,
2788 unsigned long val)
2789{
2790 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name);
2791 if (!knew)
c7d4b2fa 2792 return -ENOMEM;
e3c75964 2793 knew->index = idx;
c7d4b2fa 2794 knew->private_value = val;
c7d4b2fa
M
2795 return 0;
2796}
2797
4d4e9bb3
TI
2798static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2799 int type, int idx, const char *name,
2800 unsigned long val)
2801{
2802 return stac92xx_add_control_temp(spec,
2803 &stac92xx_control_templates[type],
2804 idx, name, val);
2805}
2806
4682eee0
MR
2807
2808/* add dynamic controls */
4d4e9bb3
TI
2809static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2810 const char *name, unsigned long val)
4682eee0
MR
2811{
2812 return stac92xx_add_control_idx(spec, type, 0, name, val);
2813}
2814
e3c75964
TI
2815static struct snd_kcontrol_new stac_input_src_temp = {
2816 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2817 .name = "Input Source",
2818 .info = stac92xx_mux_enum_info,
2819 .get = stac92xx_mux_enum_get,
2820 .put = stac92xx_mux_enum_put,
2821};
2822
2823static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2824{
2825 struct snd_kcontrol_new *knew;
2826 struct hda_input_mux *imux = &spec->private_imux;
2827
2828 if (!spec->num_adcs || imux->num_items <= 1)
2829 return 0; /* no need for input source control */
2830 knew = stac_control_new(spec, &stac_input_src_temp,
2831 stac_input_src_temp.name);
2832 if (!knew)
2833 return -ENOMEM;
2834 knew->count = spec->num_adcs;
2835 return 0;
2836}
2837
c21ca4a8
TI
2838/* check whether the line-input can be used as line-out */
2839static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP
2840{
2841 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2842 struct auto_pin_cfg *cfg = &spec->autocfg;
2843 hda_nid_t nid;
2844 unsigned int pincap;
8e9068b1 2845
c21ca4a8
TI
2846 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2847 return 0;
2848 nid = cfg->input_pins[AUTO_PIN_LINE];
2849 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2850 if (pincap & AC_PINCAP_OUT)
2851 return nid;
2852 return 0;
2853}
403d1944 2854
c21ca4a8
TI
2855/* check whether the mic-input can be used as line-out */
2856static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2857{
2858 struct sigmatel_spec *spec = codec->spec;
2859 struct auto_pin_cfg *cfg = &spec->autocfg;
2860 unsigned int def_conf, pincap;
2861 unsigned int mic_pin;
2862
2863 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2864 return 0;
2865 mic_pin = AUTO_PIN_MIC;
2866 for (;;) {
2867 hda_nid_t nid = cfg->input_pins[mic_pin];
2868 def_conf = snd_hda_codec_read(codec, nid, 0,
2869 AC_VERB_GET_CONFIG_DEFAULT, 0);
2870 /* some laptops have an internal analog microphone
2871 * which can't be used as a output */
2872 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2873 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2874 if (pincap & AC_PINCAP_OUT)
2875 return nid;
403d1944 2876 }
c21ca4a8
TI
2877 if (mic_pin == AUTO_PIN_MIC)
2878 mic_pin = AUTO_PIN_FRONT_MIC;
2879 else
2880 break;
403d1944 2881 }
403d1944
MP
2882 return 0;
2883}
2884
7b043899
SL
2885static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2886{
2887 int i;
2888
2889 for (i = 0; i < spec->multiout.num_dacs; i++) {
2890 if (spec->multiout.dac_nids[i] == nid)
2891 return 1;
2892 }
2893
2894 return 0;
2895}
2896
c21ca4a8
TI
2897static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2898{
2899 int i;
2900 if (is_in_dac_nids(spec, nid))
2901 return 1;
2902 for (i = 0; i < spec->autocfg.hp_outs; i++)
2903 if (spec->hp_dacs[i] == nid)
2904 return 1;
2905 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2906 if (spec->speaker_dacs[i] == nid)
2907 return 1;
2908 return 0;
2909}
2910
2911static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2912{
2913 struct sigmatel_spec *spec = codec->spec;
2914 int j, conn_len;
2915 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2916 unsigned int wcaps, wtype;
2917
2918 conn_len = snd_hda_get_connections(codec, nid, conn,
2919 HDA_MAX_CONNECTIONS);
2920 for (j = 0; j < conn_len; j++) {
2921 wcaps = snd_hda_param_read(codec, conn[j],
2922 AC_PAR_AUDIO_WIDGET_CAP);
2923 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2924 /* we check only analog outputs */
2925 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2926 continue;
2927 /* if this route has a free DAC, assign it */
2928 if (!check_all_dac_nids(spec, conn[j])) {
2929 if (conn_len > 1) {
2930 /* select this DAC in the pin's input mux */
2931 snd_hda_codec_write_cache(codec, nid, 0,
2932 AC_VERB_SET_CONNECT_SEL, j);
2933 }
2934 return conn[j];
2935 }
2936 }
2937 return 0;
2938}
2939
2940static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2941static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2942
3cc08dc6 2943/*
7b043899
SL
2944 * Fill in the dac_nids table from the parsed pin configuration
2945 * This function only works when every pin in line_out_pins[]
2946 * contains atleast one DAC in its connection list. Some 92xx
2947 * codecs are not connected directly to a DAC, such as the 9200
2948 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2949 */
c21ca4a8 2950static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M
2951{
2952 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2953 struct auto_pin_cfg *cfg = &spec->autocfg;
2954 int i;
2955 hda_nid_t nid, dac;
7b043899 2956
c7d4b2fa
M
2957 for (i = 0; i < cfg->line_outs; i++) {
2958 nid = cfg->line_out_pins[i];
c21ca4a8
TI
2959 dac = get_unassigned_dac(codec, nid);
2960 if (!dac) {
df802952
TI
2961 if (spec->multiout.num_dacs > 0) {
2962 /* we have already working output pins,
2963 * so let's drop the broken ones again
2964 */
2965 cfg->line_outs = spec->multiout.num_dacs;
2966 break;
2967 }
7b043899
SL
2968 /* error out, no available DAC found */
2969 snd_printk(KERN_ERR
2970 "%s: No available DAC for pin 0x%x\n",
2971 __func__, nid);
2972 return -ENODEV;
2973 }
c21ca4a8
TI
2974 add_spec_dacs(spec, dac);
2975 }
7b043899 2976
c21ca4a8
TI
2977 /* add line-in as output */
2978 nid = check_line_out_switch(codec);
2979 if (nid) {
2980 dac = get_unassigned_dac(codec, nid);
2981 if (dac) {
2982 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2983 nid, cfg->line_outs);
2984 cfg->line_out_pins[cfg->line_outs] = nid;
2985 cfg->line_outs++;
2986 spec->line_switch = nid;
2987 add_spec_dacs(spec, dac);
2988 }
2989 }
2990 /* add mic as output */
2991 nid = check_mic_out_switch(codec);
2992 if (nid) {
2993 dac = get_unassigned_dac(codec, nid);
2994 if (dac) {
2995 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2996 nid, cfg->line_outs);
2997 cfg->line_out_pins[cfg->line_outs] = nid;
2998 cfg->line_outs++;
2999 spec->mic_switch = nid;
3000 add_spec_dacs(spec, dac);
3001 }
3002 }
c7d4b2fa 3003
c21ca4a8
TI
3004 for (i = 0; i < cfg->hp_outs; i++) {
3005 nid = cfg->hp_pins[i];
3006 dac = get_unassigned_dac(codec, nid);
3007 if (dac) {
3008 if (!spec->multiout.hp_nid)
3009 spec->multiout.hp_nid = dac;
3010 else
3011 add_spec_extra_dacs(spec, dac);
7b043899 3012 }
c21ca4a8
TI
3013 spec->hp_dacs[i] = dac;
3014 }
3015
3016 for (i = 0; i < cfg->speaker_outs; i++) {
3017 nid = cfg->speaker_pins[i];
3018 dac = get_unassigned_dac(codec, nid);
3019 if (dac)
3020 add_spec_extra_dacs(spec, dac);
3021 spec->speaker_dacs[i] = dac;
7b043899 3022 }
c7d4b2fa 3023
c21ca4a8 3024 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL
3025 spec->multiout.num_dacs,
3026 spec->multiout.dac_nids[0],
3027 spec->multiout.dac_nids[1],
3028 spec->multiout.dac_nids[2],
3029 spec->multiout.dac_nids[3],
3030 spec->multiout.dac_nids[4]);
c21ca4a8 3031
c7d4b2fa
M
3032 return 0;
3033}
3034
eb06ed8f 3035/* create volume control/switch for the given prefx type */
7c7767eb
TI
3036static int create_controls(struct hda_codec *codec, const char *pfx,
3037 hda_nid_t nid, int chs)
eb06ed8f 3038{
7c7767eb 3039 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI
3040 char name[32];
3041 int err;
3042
7c7767eb
TI
3043 if (!spec->check_volume_offset) {
3044 unsigned int caps, step, nums, db_scale;
3045 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3046 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3047 AC_AMPCAP_STEP_SIZE_SHIFT;
3048 step = (step + 1) * 25; /* in .01dB unit */
3049 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3050 AC_AMPCAP_NUM_STEPS_SHIFT;
3051 db_scale = nums * step;
3052 /* if dB scale is over -64dB, and finer enough,
3053 * let's reduce it to half
3054 */
3055 if (db_scale > 6400 && nums >= 0x1f)
3056 spec->volume_offset = nums / 2;
3057 spec->check_volume_offset = 1;
3058 }
3059
eb06ed8f
TI
3060 sprintf(name, "%s Playback Volume", pfx);
3061 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
7c7767eb
TI
3062 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3063 spec->volume_offset));
eb06ed8f
TI
3064 if (err < 0)
3065 return err;
3066 sprintf(name, "%s Playback Switch", pfx);
3067 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
3068 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3069 if (err < 0)
3070 return err;
3071 return 0;
3072}
3073
ae0afd81
MR
3074static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3075{
c21ca4a8 3076 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR
3077 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3078 return 1;
3079 } else {
3080 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3081 spec->multiout.num_dacs++;
3082 }
3083 return 0;
3084}
3085
c21ca4a8 3086static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3087{
c21ca4a8
TI
3088 int i;
3089 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3090 if (!spec->multiout.extra_out_nid[i]) {
3091 spec->multiout.extra_out_nid[i] = nid;
3092 return 0;
3093 }
3094 }
3095 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3096 return 1;
ae0afd81
MR
3097}
3098
76624534
TI
3099static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid)
3100{
3101 int i;
3102
3103 if (spec->autocfg.line_outs != 1)
3104 return 0;
3105 if (spec->multiout.hp_nid == nid)
3106 return 0;
3107 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++)
3108 if (spec->multiout.extra_out_nid[i] == nid)
3109 return 0;
3110 return 1;
3111}
3112
c7d4b2fa 3113/* add playback controls from the parsed DAC table */
0fb87bb4 3114static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 3115 const struct auto_pin_cfg *cfg)
c7d4b2fa 3116{
76624534 3117 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI
3118 static const char *chname[4] = {
3119 "Front", "Surround", NULL /*CLFE*/, "Side"
3120 };
d21995e3 3121 hda_nid_t nid = 0;
91589232
TI
3122 int i, err;
3123 unsigned int wid_caps;
0fb87bb4 3124
c21ca4a8 3125 for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
c7d4b2fa 3126 nid = spec->multiout.dac_nids[i];
c7d4b2fa
M
3127 if (i == 2) {
3128 /* Center/LFE */
7c7767eb 3129 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3130 if (err < 0)
c7d4b2fa 3131 return err;
7c7767eb 3132 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3133 if (err < 0)
c7d4b2fa 3134 return err;
0fb87bb4
ML
3135
3136 wid_caps = get_wcaps(codec, nid);
3137
3138 if (wid_caps & AC_WCAP_LR_SWAP) {
3139 err = stac92xx_add_control(spec,
3140 STAC_CTL_WIDGET_CLFE_SWITCH,
3141 "Swap Center/LFE Playback Switch", nid);
3142
3143 if (err < 0)
3144 return err;
3145 }
3146
c7d4b2fa 3147 } else {
76624534
TI
3148 const char *name = chname[i];
3149 /* if it's a single DAC, assign a better name */
3150 if (!i && is_unique_dac(spec, nid)) {
3151 switch (cfg->line_out_type) {
3152 case AUTO_PIN_HP_OUT:
3153 name = "Headphone";
3154 break;
3155 case AUTO_PIN_SPEAKER_OUT:
3156 name = "Speaker";
3157 break;
3158 }
3159 }
7c7767eb 3160 err = create_controls(codec, name, nid, 3);
eb06ed8f 3161 if (err < 0)
c7d4b2fa
M
3162 return err;
3163 }
3164 }
3165
a9cb5c90 3166 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR
3167 err = stac92xx_add_control(spec,
3168 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI
3169 "Headphone as Line Out Switch",
3170 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR
3171 if (err < 0)
3172 return err;
3173 }
3174
b5895dc8 3175 if (spec->line_switch) {
c21ca4a8
TI
3176 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3177 "Line In as Output Switch",
3178 spec->line_switch << 8);
3179 if (err < 0)
3180 return err;
b5895dc8 3181 }
403d1944 3182
b5895dc8 3183 if (spec->mic_switch) {
c21ca4a8
TI
3184 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3185 "Mic as Output Switch",
3186 (spec->mic_switch << 8) | 1);
3187 if (err < 0)
3188 return err;
b5895dc8 3189 }
403d1944 3190
c7d4b2fa
M
3191 return 0;
3192}
3193
eb06ed8f
TI
3194/* add playback controls for Speaker and HP outputs */
3195static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3196 struct auto_pin_cfg *cfg)
3197{
3198 struct sigmatel_spec *spec = codec->spec;
3199 hda_nid_t nid;
c21ca4a8 3200 int i, err, nums;
eb06ed8f 3201
c21ca4a8 3202 nums = 0;
eb06ed8f 3203 for (i = 0; i < cfg->hp_outs; i++) {
c21ca4a8
TI
3204 static const char *pfxs[] = {
3205 "Headphone", "Headphone2", "Headphone3",
3206 };
eb06ed8f
TI
3207 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3208 if (wid_caps & AC_WCAP_UNSOL_CAP)
3209 spec->hp_detect = 1;
c21ca4a8 3210 if (nums >= ARRAY_SIZE(pfxs))
c7d4b2fa 3211 continue;
c21ca4a8
TI
3212 nid = spec->hp_dacs[i];
3213 if (!nid)
eb06ed8f 3214 continue;
7c7767eb 3215 err = create_controls(codec, pfxs[nums++], nid, 3);
c21ca4a8
TI
3216 if (err < 0)
3217 return err;
1b290a51 3218 }
c21ca4a8
TI
3219 nums = 0;
3220 for (i = 0; i < cfg->speaker_outs; i++) {
eb06ed8f
TI
3221 static const char *pfxs[] = {
3222 "Speaker", "External Speaker", "Speaker2",
3223 };
c21ca4a8
TI
3224 if (nums >= ARRAY_SIZE(pfxs))
3225 continue;
3226 nid = spec->speaker_dacs[i];
3227 if (!nid)
3228 continue;
7c7767eb 3229 err = create_controls(codec, pfxs[nums++], nid, 3);
eb06ed8f
TI
3230 if (err < 0)
3231 return err;
3232 }
c7d4b2fa
M
3233 return 0;
3234}
3235
b22b4821 3236/* labels for mono mux outputs */
d0513fc6
MR
3237static const char *stac92xx_mono_labels[4] = {
3238 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR
3239};
3240
3241/* create mono mux for mono out on capable codecs */
3242static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3243{
3244 struct sigmatel_spec *spec = codec->spec;
3245 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3246 int i, num_cons;
3247 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3248
3249 num_cons = snd_hda_get_connections(codec,
3250 spec->mono_nid,
3251 con_lst,
3252 HDA_MAX_NUM_INPUTS);
3253 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3254 return -EINVAL;
3255
3256 for (i = 0; i < num_cons; i++) {
3257 mono_mux->items[mono_mux->num_items].label =
3258 stac92xx_mono_labels[i];
3259 mono_mux->items[mono_mux->num_items].index = i;
3260 mono_mux->num_items++;
3261 }
09a99959
MR
3262
3263 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3264 "Mono Mux", spec->mono_nid);
b22b4821
MR
3265}
3266
89385035
MR
3267/* labels for amp mux outputs */
3268static const char *stac92xx_amp_labels[3] = {
4b33c767 3269 "Front Microphone", "Microphone", "Line In",
89385035
MR
3270};
3271
3272/* create amp out controls mux on capable codecs */
3273static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3274{
3275 struct sigmatel_spec *spec = codec->spec;
3276 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3277 int i, err;
3278
2a9c7816 3279 for (i = 0; i < spec->num_amps; i++) {
89385035
MR
3280 amp_mux->items[amp_mux->num_items].label =
3281 stac92xx_amp_labels[i];
3282 amp_mux->items[amp_mux->num_items].index = i;
3283 amp_mux->num_items++;
3284 }
3285
2a9c7816
MR
3286 if (spec->num_amps > 1) {
3287 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3288 "Amp Selector Capture Switch", 0);
3289 if (err < 0)
3290 return err;
3291 }
89385035
MR
3292 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3293 "Amp Capture Volume",
3294 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3295}
3296
3297
1cd2224c
MR
3298/* create PC beep volume controls */
3299static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3300 hda_nid_t nid)
3301{
3302 struct sigmatel_spec *spec = codec->spec;
3303 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3304 int err;
3305
3306 /* check for mute support for the the amp */
3307 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3308 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3309 "PC Beep Playback Switch",
3310 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3311 if (err < 0)
3312 return err;
3313 }
3314
3315 /* check to see if there is volume support for the amp */
3316 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3317 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3318 "PC Beep Playback Volume",
3319 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3320 if (err < 0)
3321 return err;
3322 }
3323 return 0;
3324}
3325
4d4e9bb3
TI
3326#ifdef CONFIG_SND_HDA_INPUT_BEEP
3327#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3328
3329static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3330 struct snd_ctl_elem_value *ucontrol)
3331{
3332 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3333 ucontrol->value.integer.value[0] = codec->beep->enabled;
3334 return 0;
3335}
3336
3337static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3338 struct snd_ctl_elem_value *ucontrol)
3339{
3340 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3341 int enabled = !!ucontrol->value.integer.value[0];
3342 if (codec->beep->enabled != enabled) {
3343 codec->beep->enabled = enabled;
3344 return 1;
3345 }
3346 return 0;
3347}
3348
3349static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3350 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3351 .info = stac92xx_dig_beep_switch_info,
3352 .get = stac92xx_dig_beep_switch_get,
3353 .put = stac92xx_dig_beep_switch_put,
3354};
3355
3356static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3357{
3358 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3359 0, "PC Beep Playback Switch", 0);
3360}
3361#endif
3362
4682eee0
MR
3363static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3364{
3365 struct sigmatel_spec *spec = codec->spec;
3366 int wcaps, nid, i, err = 0;
3367
3368 for (i = 0; i < spec->num_muxes; i++) {
3369 nid = spec->mux_nids[i];
3370 wcaps = get_wcaps(codec, nid);
3371
3372 if (wcaps & AC_WCAP_OUT_AMP) {
3373 err = stac92xx_add_control_idx(spec,
3374 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3375 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3376 if (err < 0)
3377 return err;
3378 }
3379 }
3380 return 0;
3381};
3382
d9737751 3383static const char *stac92xx_spdif_labels[3] = {
65973632 3384 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR
3385};
3386
3387static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3388{
3389 struct sigmatel_spec *spec = codec->spec;
3390 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3391 const char **labels = spec->spdif_labels;
d9737751 3392 int i, num_cons;
65973632 3393 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR
3394
3395 num_cons = snd_hda_get_connections(codec,
3396 spec->smux_nids[0],
3397 con_lst,
3398 HDA_MAX_NUM_INPUTS);
65973632 3399 if (!num_cons)
d9737751
MR
3400 return -EINVAL;
3401
65973632
MR
3402 if (!labels)
3403 labels = stac92xx_spdif_labels;
3404
d9737751 3405 for (i = 0; i < num_cons; i++) {
65973632 3406 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR
3407 spdif_mux->items[spdif_mux->num_items].index = i;
3408 spdif_mux->num_items++;
3409 }
3410
3411 return 0;
3412}
3413
8b65727b 3414/* labels for dmic mux inputs */
ddc2cec4 3415static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP
3416 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3417 "Digital Mic 3", "Digital Mic 4"
3418};
3419
3420/* create playback/capture controls for input pins on dmic capable codecs */
3421static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3422 const struct auto_pin_cfg *cfg)
3423{
3424 struct sigmatel_spec *spec = codec->spec;
3425 struct hda_input_mux *dimux = &spec->private_dimux;
3426 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR
3427 int err, i, j;
3428 char name[32];
8b65727b
MP
3429
3430 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3431 dimux->items[dimux->num_items].index = 0;
3432 dimux->num_items++;
3433
3434 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3435 hda_nid_t nid;
8b65727b
MP
3436 int index;
3437 int num_cons;
0678accd 3438 unsigned int wcaps;
8b65727b
MP
3439 unsigned int def_conf;
3440
3441 def_conf = snd_hda_codec_read(codec,
3442 spec->dmic_nids[i],
3443 0,
3444 AC_VERB_GET_CONFIG_DEFAULT,
3445 0);
3446 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3447 continue;
3448
0678accd 3449 nid = spec->dmic_nids[i];
8b65727b 3450 num_cons = snd_hda_get_connections(codec,
e1f0d669 3451 spec->dmux_nids[0],
8b65727b
MP
3452 con_lst,
3453 HDA_MAX_NUM_INPUTS);
3454 for (j = 0; j < num_cons; j++)
0678accd 3455 if (con_lst[j] == nid) {
8b65727b
MP
3456 index = j;
3457 goto found;
3458 }
3459 continue;
3460found:
d0513fc6
MR
3461 wcaps = get_wcaps(codec, nid) &
3462 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3463
d0513fc6 3464 if (wcaps) {
0678accd
MR
3465 sprintf(name, "%s Capture Volume",
3466 stac92xx_dmic_labels[dimux->num_items]);
3467
3468 err = stac92xx_add_control(spec,
3469 STAC_CTL_WIDGET_VOL,
3470 name,
d0513fc6
MR
3471 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3472 (wcaps & AC_WCAP_OUT_AMP) ?
3473 HDA_OUTPUT : HDA_INPUT));
0678accd
MR
3474 if (err < 0)
3475 return err;
3476 }
3477
8b65727b
MP
3478 dimux->items[dimux->num_items].label =
3479 stac92xx_dmic_labels[dimux->num_items];
3480 dimux->items[dimux->num_items].index = index;
3481 dimux->num_items++;
3482 }
3483
3484 return 0;
3485}
3486
c7d4b2fa
M
3487/* create playback/capture controls for input pins */
3488static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3489{
3490 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
3491 struct hda_input_mux *imux = &spec->private_imux;
3492 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3493 int i, j, k;
3494
3495 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI
3496 int index;
3497
3498 if (!cfg->input_pins[i])
3499 continue;
3500 index = -1;
3501 for (j = 0; j < spec->num_muxes; j++) {
3502 int num_cons;
3503 num_cons = snd_hda_get_connections(codec,
3504 spec->mux_nids[j],
3505 con_lst,
3506 HDA_MAX_NUM_INPUTS);
3507 for (k = 0; k < num_cons; k++)
3508 if (con_lst[k] == cfg->input_pins[i]) {
3509 index = k;
3510 goto found;
3511 }
c7d4b2fa 3512 }
314634bc
TI
3513 continue;
3514 found:
3515 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3516 imux->items[imux->num_items].index = index;
3517 imux->num_items++;
c7d4b2fa
M
3518 }
3519
7b043899 3520 if (imux->num_items) {
62fe78e9
SR
3521 /*
3522 * Set the current input for the muxes.
3523 * The STAC9221 has two input muxes with identical source
3524 * NID lists. Hopefully this won't get confused.
3525 */
3526 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI
3527 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3528 AC_VERB_SET_CONNECT_SEL,
3529 imux->items[0].index);
62fe78e9
SR
3530 }
3531 }
3532
c7d4b2fa
M
3533 return 0;
3534}
3535
c7d4b2fa
M
3536static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3537{
3538 struct sigmatel_spec *spec = codec->spec;
3539 int i;
3540
3541 for (i = 0; i < spec->autocfg.line_outs; i++) {
3542 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3543 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3544 }
3545}
3546
3547static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3548{
3549 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3550 int i;
c7d4b2fa 3551
eb06ed8f
TI
3552 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3553 hda_nid_t pin;
3554 pin = spec->autocfg.hp_pins[i];
3555 if (pin) /* connect to front */
3556 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3557 }
3558 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3559 hda_nid_t pin;
3560 pin = spec->autocfg.speaker_pins[i];
3561 if (pin) /* connect to front */
3562 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3563 }
c7d4b2fa
M
3564}
3565
3cc08dc6 3566static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M
3567{
3568 struct sigmatel_spec *spec = codec->spec;
3569 int err;
3570
8b65727b
MP
3571 if ((err = snd_hda_parse_pin_def_config(codec,
3572 &spec->autocfg,
3573 spec->dmic_nids)) < 0)
c7d4b2fa 3574 return err;
82bc955f 3575 if (! spec->autocfg.line_outs)
869264c4 3576 return 0; /* can't find valid pin config */
19039bd0 3577
bcecd9bd
JZ
3578 /* If we have no real line-out pin and multiple hp-outs, HPs should
3579 * be set up as multi-channel outputs.
3580 */
3581 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3582 spec->autocfg.hp_outs > 1) {
3583 /* Copy hp_outs to line_outs, backup line_outs in
3584 * speaker_outs so that the following routines can handle
3585 * HP pins as primary outputs.
3586 */
c21ca4a8 3587 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ
3588 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3589 sizeof(spec->autocfg.line_out_pins));
3590 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3591 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3592 sizeof(spec->autocfg.hp_pins));
3593 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI
3594 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3595 spec->autocfg.hp_outs = 0;
bcecd9bd 3596 }
09a99959 3597 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR
3598 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3599 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR
3600 u32 caps = query_amp_caps(codec,
3601 spec->autocfg.mono_out_pin, dir);
3602 hda_nid_t conn_list[1];
3603
3604 /* get the mixer node and then the mono mux if it exists */
3605 if (snd_hda_get_connections(codec,
3606 spec->autocfg.mono_out_pin, conn_list, 1) &&
3607 snd_hda_get_connections(codec, conn_list[0],
3608 conn_list, 1)) {
3609
3610 int wcaps = get_wcaps(codec, conn_list[0]);
3611 int wid_type = (wcaps & AC_WCAP_TYPE)
3612 >> AC_WCAP_TYPE_SHIFT;
3613 /* LR swap check, some stac925x have a mux that
3614 * changes the DACs output path instead of the
3615 * mono-mux path.
3616 */
3617 if (wid_type == AC_WID_AUD_SEL &&
3618 !(wcaps & AC_WCAP_LR_SWAP))
3619 spec->mono_nid = conn_list[0];
3620 }
d0513fc6
MR
3621 if (dir) {
3622 hda_nid_t nid = spec->autocfg.mono_out_pin;
3623
3624 /* most mono outs have a least a mute/unmute switch */
3625 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3626 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3627 "Mono Playback Switch",
3628 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR
3629 if (err < 0)
3630 return err;
d0513fc6
MR
3631 /* check for volume support for the amp */
3632 if ((caps & AC_AMPCAP_NUM_STEPS)
3633 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3634 err = stac92xx_add_control(spec,
3635 STAC_CTL_WIDGET_VOL,
3636 "Mono Playback Volume",
3637 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3638 if (err < 0)
3639 return err;
3640 }
09a99959
MR
3641 }
3642
3643 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3644 AC_PINCTL_OUT_EN);
3645 }
bcecd9bd 3646
c21ca4a8
TI
3647 if (!spec->multiout.num_dacs) {
3648 err = stac92xx_auto_fill_dac_nids(codec);
3649 if (err < 0)
19039bd0 3650 return err;
c9280d68
TI
3651 err = stac92xx_auto_create_multi_out_ctls(codec,
3652 &spec->autocfg);
3653 if (err < 0)
3654 return err;
c21ca4a8 3655 }
c7d4b2fa 3656
1cd2224c
MR
3657 /* setup analog beep controls */
3658 if (spec->anabeep_nid > 0) {
3659 err = stac92xx_auto_create_beep_ctls(codec,
3660 spec->anabeep_nid);
3661 if (err < 0)
3662 return err;
3663 }
3664
3665 /* setup digital beep controls and input device */
3666#ifdef CONFIG_SND_HDA_INPUT_BEEP
3667 if (spec->digbeep_nid > 0) {
3668 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3669 unsigned int caps;
1cd2224c
MR
3670
3671 err = stac92xx_auto_create_beep_ctls(codec, nid);
3672 if (err < 0)
3673 return err;
3674 err = snd_hda_attach_beep_device(codec, nid);
3675 if (err < 0)
3676 return err;
4d4e9bb3
TI
3677 /* if no beep switch is available, make its own one */
3678 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3679 if (codec->beep &&
3680 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3681 err = stac92xx_beep_switch_ctl(codec);
3682 if (err < 0)
3683 return err;
3684 }
1cd2224c
MR
3685 }
3686#endif
3687
0fb87bb4
ML
3688 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3689
3690 if (err < 0)
3691 return err;
3692
3693 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3694
3695 if (err < 0)
c7d4b2fa
M
3696 return err;
3697
b22b4821
MR
3698 if (spec->mono_nid > 0) {
3699 err = stac92xx_auto_create_mono_output_ctls(codec);
3700 if (err < 0)
3701 return err;
3702 }
2a9c7816 3703 if (spec->num_amps > 0) {
89385035
MR
3704 err = stac92xx_auto_create_amp_output_ctls(codec);
3705 if (err < 0)
3706 return err;
3707 }
2a9c7816 3708 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP
3709 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3710 &spec->autocfg)) < 0)
3711 return err;
4682eee0
MR
3712 if (spec->num_muxes > 0) {
3713 err = stac92xx_auto_create_mux_input_ctls(codec);
3714 if (err < 0)
3715 return err;
3716 }
d9737751
MR
3717 if (spec->num_smuxes > 0) {
3718 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3719 if (err < 0)
3720 return err;
3721 }
8b65727b 3722
e3c75964
TI
3723 err = stac92xx_add_input_source(spec);
3724 if (err < 0)
3725 return err;
3726
c7d4b2fa 3727 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3728 if (spec->multiout.max_channels > 2)
c7d4b2fa 3729 spec->surr_switch = 1;
c7d4b2fa 3730
82bc955f 3731 if (spec->autocfg.dig_out_pin)
3cc08dc6 3732 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3733 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3734 spec->dig_in_nid = dig_in;
c7d4b2fa 3735
603c4019
TI
3736 if (spec->kctls.list)
3737 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3738
3739 spec->input_mux = &spec->private_imux;
f8ccbf65
MR
3740 if (!spec->dinput_mux)
3741 spec->dinput_mux = &spec->private_dimux;
d9737751 3742 spec->sinput_mux = &spec->private_smux;
b22b4821 3743 spec->mono_mux = &spec->private_mono_mux;
89385035 3744 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M
3745 return 1;
3746}
3747
82bc955f
TI
3748/* add playback controls for HP output */
3749static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3750 struct auto_pin_cfg *cfg)
3751{
3752 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3753 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI
3754 unsigned int wid_caps;
3755
3756 if (! pin)
3757 return 0;
3758
3759 wid_caps = get_wcaps(codec, pin);
505cb341 3760 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3761 spec->hp_detect = 1;
82bc955f
TI
3762
3763 return 0;
3764}
3765
160ea0dc
RF
3766/* add playback controls for LFE output */
3767static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3768 struct auto_pin_cfg *cfg)
3769{
3770 struct sigmatel_spec *spec = codec->spec;
3771 int err;
3772 hda_nid_t lfe_pin = 0x0;
3773 int i;
3774
3775 /*
3776 * search speaker outs and line outs for a mono speaker pin
3777 * with an amp. If one is found, add LFE controls
3778 * for it.
3779 */
3780 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3781 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3782 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3783 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3784 if (wcaps == AC_WCAP_OUT_AMP)
3785 /* found a mono speaker with an amp, must be lfe */
3786 lfe_pin = pin;
3787 }
3788
3789 /* if speaker_outs is 0, then speakers may be in line_outs */
3790 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3791 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3792 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3793 unsigned int defcfg;
8b551785 3794 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF
3795 AC_VERB_GET_CONFIG_DEFAULT,
3796 0x00);
8b551785 3797 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3798 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3799 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3800 if (wcaps == AC_WCAP_OUT_AMP)
3801 /* found a mono speaker with an amp,
3802 must be lfe */
3803 lfe_pin = pin;
3804 }
3805 }
3806 }
3807
3808 if (lfe_pin) {
7c7767eb 3809 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF
3810 if (err < 0)
3811 return err;
3812 }
3813
3814 return 0;
3815}
3816
c7d4b2fa
M
3817static int stac9200_parse_auto_config(struct hda_codec *codec)
3818{
3819 struct sigmatel_spec *spec = codec->spec;
3820 int err;
3821
df694daa 3822 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M
3823 return err;
3824
3825 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3826 return err;
3827
82bc955f
TI
3828 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3829 return err;
3830
160ea0dc
RF
3831 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3832 return err;
3833
355a0ec4
TI
3834 if (spec->num_muxes > 0) {
3835 err = stac92xx_auto_create_mux_input_ctls(codec);
3836 if (err < 0)
3837 return err;
3838 }
3839
e3c75964
TI
3840 err = stac92xx_add_input_source(spec);
3841 if (err < 0)
3842 return err;
3843
82bc955f 3844 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3845 spec->multiout.dig_out_nid = 0x05;
82bc955f 3846 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3847 spec->dig_in_nid = 0x04;
c7d4b2fa 3848
603c4019
TI
3849 if (spec->kctls.list)
3850 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3851
3852 spec->input_mux = &spec->private_imux;
8b65727b 3853 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M
3854
3855 return 1;
3856}
3857
62fe78e9
SR
3858/*
3859 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3860 * funky external mute control using GPIO pins.
3861 */
3862
76e1ddfb 3863static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3864 unsigned int dir_mask, unsigned int data)
62fe78e9
SR
3865{
3866 unsigned int gpiostate, gpiomask, gpiodir;
3867
3868 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3869 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3870 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR
3871
3872 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3873 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3874 gpiomask |= mask;
62fe78e9
SR
3875
3876 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3877 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3878 gpiodir |= dir_mask;
62fe78e9 3879
76e1ddfb 3880 /* Configure GPIOx as CMOS */
62fe78e9
SR
3881 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3882
3883 snd_hda_codec_write(codec, codec->afg, 0,
3884 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI
3885 snd_hda_codec_read(codec, codec->afg, 0,
3886 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR
3887
3888 msleep(1);
3889
76e1ddfb
TI
3890 snd_hda_codec_read(codec, codec->afg, 0,
3891 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR
3892}
3893
74aeaabc
MR
3894static int stac92xx_add_jack(struct hda_codec *codec,
3895 hda_nid_t nid, int type)
3896{
e4973e1e 3897#ifdef CONFIG_SND_JACK
74aeaabc
MR
3898 struct sigmatel_spec *spec = codec->spec;
3899 struct sigmatel_jack *jack;
3900 int def_conf = snd_hda_codec_read(codec, nid,
3901 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3902 int connectivity = get_defcfg_connect(def_conf);
3903 char name[32];
3904
3905 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3906 return 0;
3907
3908 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3909 jack = snd_array_new(&spec->jacks);
3910 if (!jack)
3911 return -ENOMEM;
3912 jack->nid = nid;
3913 jack->type = type;
3914
3915 sprintf(name, "%s at %s %s Jack",
3916 snd_hda_get_jack_type(def_conf),
3917 snd_hda_get_jack_connectivity(def_conf),
3918 snd_hda_get_jack_location(def_conf));
3919
3920 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI
3921#else
3922 return 0;
3923#endif
74aeaabc
MR
3924}
3925
c6e4c666
TI
3926static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3927 unsigned char type, int data)
74aeaabc
MR
3928{
3929 struct sigmatel_event *event;
3930
3931 snd_array_init(&spec->events, sizeof(*event), 32);
3932 event = snd_array_new(&spec->events);
3933 if (!event)
3934 return -ENOMEM;
3935 event->nid = nid;
c6e4c666
TI
3936 event->type = type;
3937 event->tag = spec->events.used;
74aeaabc
MR
3938 event->data = data;
3939
c6e4c666 3940 return event->tag;
74aeaabc
MR
3941}
3942
c6e4c666
TI
3943static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3944 hda_nid_t nid, unsigned char type)
74aeaabc
MR
3945{
3946 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
3947 struct sigmatel_event *event = spec->events.list;
3948 int i;
3949
3950 for (i = 0; i < spec->events.used; i++, event++) {
3951 if (event->nid == nid && event->type == type)
3952 return event;
74aeaabc 3953 }
c6e4c666 3954 return NULL;
74aeaabc
MR
3955}
3956
c6e4c666
TI
3957static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3958 unsigned char tag)
314634bc 3959{
c6e4c666
TI
3960 struct sigmatel_spec *spec = codec->spec;
3961 struct sigmatel_event *event = spec->events.list;
3962 int i;
3963
3964 for (i = 0; i < spec->events.used; i++, event++) {
3965 if (event->tag == tag)
3966 return event;
74aeaabc 3967 }
c6e4c666
TI
3968 return NULL;
3969}
3970
3971static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3972 unsigned int type)
3973{
3974 struct sigmatel_event *event;
3975 int tag;
3976
3977 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3978 return;
3979 event = stac_get_event(codec, nid, type);
3980 if (event)
3981 tag = event->tag;
3982 else
3983 tag = stac_add_event(codec->spec, nid, type, 0);
3984 if (tag < 0)
3985 return;
3986 snd_hda_codec_write_cache(codec, nid, 0,
3987 AC_VERB_SET_UNSOLICITED_ENABLE,
3988 AC_USRSP_EN | tag);
314634bc
TI
3989}
3990
a64135a2
MR
3991static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3992{
3993 int i;
3994 for (i = 0; i < cfg->hp_outs; i++)
3995 if (cfg->hp_pins[i] == nid)
3996 return 1; /* nid is a HP-Out */
3997
3998 return 0; /* nid is not a HP-Out */
3999};
4000
b76c850f
MR
4001static void stac92xx_power_down(struct hda_codec *codec)
4002{
4003 struct sigmatel_spec *spec = codec->spec;
4004
4005 /* power down inactive DACs */
4006 hda_nid_t *dac;
4007 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4008 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4009 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR
4010 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4011}
4012
f73d3585
TI
4013static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4014 int enable);
4015
c7d4b2fa
M
4016static int stac92xx_init(struct hda_codec *codec)
4017{
4018 struct sigmatel_spec *spec = codec->spec;
82bc955f 4019 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4020 unsigned int gpio;
e4973e1e 4021 int i;
c7d4b2fa 4022
c7d4b2fa
M
4023 snd_hda_sequence_write(codec, spec->init);
4024
8daaaa97
MR
4025 /* power down adcs initially */
4026 if (spec->powerdown_adcs)
4027 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4028 snd_hda_codec_write(codec,
8daaaa97
MR
4029 spec->adc_nids[i], 0,
4030 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI
4031
4032 /* set up GPIO */
4033 gpio = spec->gpio_data;
4034 /* turn on EAPD statically when spec->eapd_switch isn't set.
4035 * otherwise, unsol event will turn it on/off dynamically
4036 */
4037 if (!spec->eapd_switch)
4038 gpio |= spec->eapd_mask;
4039 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4040
82bc955f
TI
4041 /* set up pins */
4042 if (spec->hp_detect) {
505cb341 4043 /* Enable unsolicited responses on the HP widget */
74aeaabc 4044 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4045 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4046 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4047 }
0a07acaf
TI
4048 /* force to enable the first line-out; the others are set up
4049 * in unsol_event
4050 */
4051 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4052 AC_PINCTL_OUT_EN);
82bc955f 4053 /* fake event to set up pins */
c6e4c666
TI
4054 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4055 STAC_HP_EVENT);
82bc955f
TI
4056 } else {
4057 stac92xx_auto_init_multi_out(codec);
4058 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI
4059 for (i = 0; i < cfg->hp_outs; i++)
4060 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI
4061 }
4062 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI
4063 hda_nid_t nid = cfg->input_pins[i];
4064 if (nid) {
12dde4c6 4065 unsigned int pinctl, conf;
4f1e6bc3
TI
4066 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
4067 /* for mic pins, force to initialize */
4068 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI
4069 pinctl |= AC_PINCTL_IN_EN;
4070 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI
4071 } else {
4072 pinctl = snd_hda_codec_read(codec, nid, 0,
4073 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4074 /* if PINCTL already set then skip */
12dde4c6
TI
4075 if (!(pinctl & AC_PINCTL_IN_EN)) {
4076 pinctl |= AC_PINCTL_IN_EN;
4077 stac92xx_auto_set_pinctl(codec, nid,
4078 pinctl);
4079 }
4080 }
4081 conf = snd_hda_codec_read(codec, nid, 0,
4082 AC_VERB_GET_CONFIG_DEFAULT, 0);
4083 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4084 enable_pin_detect(codec, nid,
4085 STAC_INSERT_EVENT);
4086 stac_issue_unsol_event(codec, nid,
4087 STAC_INSERT_EVENT);
4f1e6bc3 4088 }
c960a03b 4089 }
82bc955f 4090 }
a64135a2
MR
4091 for (i = 0; i < spec->num_dmics; i++)
4092 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4093 AC_PINCTL_IN_EN);
f73d3585
TI
4094 if (cfg->dig_out_pin)
4095 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
4096 AC_PINCTL_OUT_EN);
4097 if (cfg->dig_in_pin)
4098 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4099 AC_PINCTL_IN_EN);
a64135a2 4100 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI
4101 hda_nid_t nid = spec->pwr_nids[i];
4102 int pinctl, def_conf;
f73d3585 4103
eb632128
TI
4104 /* power on when no jack detection is available */
4105 if (!spec->hp_detect) {
4106 stac_toggle_power_map(codec, nid, 1);
4107 continue;
4108 }
4109
4110 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI
4111 continue; /* already has an unsol event */
4112
4113 pinctl = snd_hda_codec_read(codec, nid, 0,
4114 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR
4115 /* outputs are only ports capable of power management
4116 * any attempts on powering down a input port cause the
4117 * referenced VREF to act quirky.
4118 */
eb632128
TI
4119 if (pinctl & AC_PINCTL_IN_EN) {
4120 stac_toggle_power_map(codec, nid, 1);
a64135a2 4121 continue;
eb632128 4122 }
f73d3585
TI
4123 def_conf = snd_hda_codec_read(codec, nid, 0,
4124 AC_VERB_GET_CONFIG_DEFAULT, 0);
4125 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR
4126 /* skip any ports that don't have jacks since presence
4127 * detection is useless */
f73d3585
TI
4128 if (def_conf != AC_JACK_PORT_COMPLEX) {
4129 if (def_conf != AC_JACK_PORT_NONE)
4130 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4131 continue;
f73d3585 4132 }
12dde4c6
TI
4133 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
4134 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4135 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
4136 }
a64135a2 4137 }
b76c850f
MR
4138 if (spec->dac_list)
4139 stac92xx_power_down(codec);
c7d4b2fa
M
4140 return 0;
4141}
4142
74aeaabc
MR
4143static void stac92xx_free_jacks(struct hda_codec *codec)
4144{
e4973e1e 4145#ifdef CONFIG_SND_JACK
b94d3539 4146 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4147 struct sigmatel_spec *spec = codec->spec;
b94d3539 4148 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR
4149 struct sigmatel_jack *jacks = spec->jacks.list;
4150 int i;
4151 for (i = 0; i < spec->jacks.used; i++)
4152 snd_device_free(codec->bus->card, &jacks[i].jack);
4153 }
4154 snd_array_free(&spec->jacks);
e4973e1e 4155#endif
74aeaabc
MR
4156}
4157
603c4019
TI
4158static void stac92xx_free_kctls(struct hda_codec *codec)
4159{
4160 struct sigmatel_spec *spec = codec->spec;
4161
4162 if (spec->kctls.list) {
4163 struct snd_kcontrol_new *kctl = spec->kctls.list;
4164 int i;
4165 for (i = 0; i < spec->kctls.used; i++)
4166 kfree(kctl[i].name);
4167 }
4168 snd_array_free(&spec->kctls);
4169}
4170
2f2f4251
M
4171static void stac92xx_free(struct hda_codec *codec)
4172{
c7d4b2fa 4173 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
4174
4175 if (! spec)
4176 return;
4177
af9f341a 4178 kfree(spec->pin_configs);
74aeaabc
MR
4179 stac92xx_free_jacks(codec);
4180 snd_array_free(&spec->events);
11b44bbd 4181
c7d4b2fa 4182 kfree(spec);
1cd2224c 4183 snd_hda_detach_beep_device(codec);
2f2f4251
M
4184}
4185
4e55096e
M
4186static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4187 unsigned int flag)
4188{
8ce84198
TI
4189 unsigned int old_ctl, pin_ctl;
4190
4191 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4192 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4193
f9acba43
TI
4194 if (pin_ctl & AC_PINCTL_IN_EN) {
4195 /*
4196 * we need to check the current set-up direction of
4197 * shared input pins since they can be switched via
4198 * "xxx as Output" mixer switch
4199 */
4200 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4201 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI
4202 return;
4203 }
4204
8ce84198 4205 old_ctl = pin_ctl;
7b043899
SL
4206 /* if setting pin direction bits, clear the current
4207 direction bits first */
4208 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4209 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4210
8ce84198
TI
4211 pin_ctl |= flag;
4212 if (old_ctl != pin_ctl)
4213 snd_hda_codec_write_cache(codec, nid, 0,
4214 AC_VERB_SET_PIN_WIDGET_CONTROL,
4215 pin_ctl);
4e55096e
M
4216}
4217
4218static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4219 unsigned int flag)
4220{
4221 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4222 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI
4223 if (pin_ctl & flag)
4224 snd_hda_codec_write_cache(codec, nid, 0,
4225 AC_VERB_SET_PIN_WIDGET_CONTROL,
4226 pin_ctl & ~flag);
4e55096e
M
4227}
4228
e6e3ea25 4229static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI
4230{
4231 if (!nid)
4232 return 0;
4233 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI
4234 & (1 << 31))
4235 return 1;
314634bc
TI
4236 return 0;
4237}
4238
d7a89436
TI
4239/* return non-zero if the hp-pin of the given array index isn't
4240 * a jack-detection target
4241 */
4242static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4243{
4244 struct auto_pin_cfg *cfg = &spec->autocfg;
4245
4246 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4247 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4248 return 1;
c21ca4a8 4249 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI
4250 return 1;
4251 /* ignore if the pin is set as line-out */
4252 if (cfg->hp_pins[i] == spec->hp_switch)
4253 return 1;
4254 return 0;
4255}
4256
c6e4c666 4257static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M
4258{
4259 struct sigmatel_spec *spec = codec->spec;
4260 struct auto_pin_cfg *cfg = &spec->autocfg;
4261 int i, presence;
4262
eb06ed8f 4263 presence = 0;
4fe5195c
MR
4264 if (spec->gpio_mute)
4265 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4266 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4267
eb06ed8f 4268 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI
4269 if (presence)
4270 break;
d7a89436
TI
4271 if (no_hp_sensing(spec, i))
4272 continue;
e6e3ea25
TI
4273 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4274 if (presence) {
4275 unsigned int pinctl;
4276 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4277 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4278 if (pinctl & AC_PINCTL_IN_EN)
4279 presence = 0; /* mic- or line-input */
4280 }
eb06ed8f 4281 }
4e55096e
M
4282
4283 if (presence) {
d7a89436 4284 /* disable lineouts */
7c2ba97b 4285 if (spec->hp_switch)
d7a89436
TI
4286 stac92xx_reset_pinctl(codec, spec->hp_switch,
4287 AC_PINCTL_OUT_EN);
4e55096e
M
4288 for (i = 0; i < cfg->line_outs; i++)
4289 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4290 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4291 for (i = 0; i < cfg->speaker_outs; i++)
4292 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4293 AC_PINCTL_OUT_EN);
c0cea0d0 4294 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4295 stac_gpio_set(codec, spec->gpio_mask,
4296 spec->gpio_dir, spec->gpio_data &
4297 ~spec->eapd_mask);
4e55096e 4298 } else {
d7a89436 4299 /* enable lineouts */
7c2ba97b 4300 if (spec->hp_switch)
d7a89436
TI
4301 stac92xx_set_pinctl(codec, spec->hp_switch,
4302 AC_PINCTL_OUT_EN);
4e55096e
M
4303 for (i = 0; i < cfg->line_outs; i++)
4304 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4305 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4306 for (i = 0; i < cfg->speaker_outs; i++)
4307 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4308 AC_PINCTL_OUT_EN);
c0cea0d0 4309 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4310 stac_gpio_set(codec, spec->gpio_mask,
4311 spec->gpio_dir, spec->gpio_data |
4312 spec->eapd_mask);
4e55096e 4313 }
d7a89436
TI
4314 /* toggle hp outs */
4315 for (i = 0; i < cfg->hp_outs; i++) {
4316 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4317 if (no_hp_sensing(spec, i))
4318 continue;
4319 if (presence)
4320 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI
4321#if 0 /* FIXME */
4322/* Resetting the pinctl like below may lead to (a sort of) regressions
4323 * on some devices since they use the HP pin actually for line/speaker
4324 * outs although the default pin config shows a different pin (that is
4325 * wrong and useless).
4326 *
4327 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4328 * But, disabling the code below just works around it, and I'm too tired of
4329 * bug reports with such devices...
4330 */
d7a89436
TI
4331 else
4332 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4333#endif /* FIXME */
d7a89436 4334 }
4e55096e
M
4335}
4336
f73d3585
TI
4337static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4338 int enable)
a64135a2
MR
4339{
4340 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI
4341 unsigned int idx, val;
4342
4343 for (idx = 0; idx < spec->num_pwrs; idx++) {
4344 if (spec->pwr_nids[idx] == nid)
4345 break;
4346 }
4347 if (idx >= spec->num_pwrs)
4348 return;
d0513fc6
MR
4349
4350 /* several codecs have two power down bits */
4351 if (spec->pwr_mapping)
4352 idx = spec->pwr_mapping[idx];
4353 else
4354 idx = 1 << idx;
a64135a2 4355
f73d3585
TI
4356 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4357 if (enable)
a64135a2
MR
4358 val &= ~idx;
4359 else
4360 val |= idx;
4361
4362 /* power down unused output ports */
4363 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR
4364}
4365
f73d3585
TI
4366static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4367{
e6e3ea25 4368 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4369}
a64135a2 4370
74aeaabc
MR
4371static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4372{
4373 struct sigmatel_spec *spec = codec->spec;
4374 struct sigmatel_jack *jacks = spec->jacks.list;
4375
4376 if (jacks) {
4377 int i;
4378 for (i = 0; i < spec->jacks.used; i++) {
4379 if (jacks->nid == nid) {
4380 unsigned int pin_ctl =
4381 snd_hda_codec_read(codec, nid,
4382 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4383 0x00);
4384 int type = jacks->type;
4385 if (type == (SND_JACK_LINEOUT
4386 | SND_JACK_HEADPHONE))
4387 type = (pin_ctl & AC_PINCTL_HP_EN)
4388 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4389 snd_jack_report(jacks->jack,
e6e3ea25 4390 get_pin_presence(codec, nid)
74aeaabc
MR
4391 ? type : 0);
4392 }
4393 jacks++;
4394 }
4395 }
4396}
a64135a2 4397
c6e4c666
TI
4398static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4399 unsigned char type)
4400{
4401 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4402 if (!event)
4403 return;
4404 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4405}
4406
314634bc
TI
4407static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4408{
a64135a2 4409 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
4410 struct sigmatel_event *event;
4411 int tag, data;
a64135a2 4412
c6e4c666
TI
4413 tag = (res >> 26) & 0x7f;
4414 event = stac_get_event_from_tag(codec, tag);
4415 if (!event)
4416 return;
4417
4418 switch (event->type) {
314634bc 4419 case STAC_HP_EVENT:
c6e4c666 4420 stac92xx_hp_detect(codec);
a64135a2 4421 /* fallthru */
74aeaabc 4422 case STAC_INSERT_EVENT:
a64135a2 4423 case STAC_PWR_EVENT:
c6e4c666
TI
4424 if (spec->num_pwrs > 0)
4425 stac92xx_pin_sense(codec, event->nid);
4426 stac92xx_report_jack(codec, event->nid);
72474be6 4427 break;
c6e4c666
TI
4428 case STAC_VREF_EVENT:
4429 data = snd_hda_codec_read(codec, codec->afg, 0,
4430 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR
4431 /* toggle VREF state based on GPIOx status */
4432 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4433 !!(data & (1 << event->data)));
72474be6 4434 break;
314634bc
TI
4435 }
4436}
4437
2d34e1b3
TI
4438#ifdef CONFIG_PROC_FS
4439static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4440 struct hda_codec *codec, hda_nid_t nid)
4441{
4442 if (nid == codec->afg)
4443 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4444 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4445}
4446
4447static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4448 struct hda_codec *codec,
4449 unsigned int verb)
4450{
4451 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4452 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4453}
4454
4455/* stac92hd71bxx, stac92hd73xx */
4456static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4457 struct hda_codec *codec, hda_nid_t nid)
4458{
4459 stac92hd_proc_hook(buffer, codec, nid);
4460 if (nid == codec->afg)
4461 analog_loop_proc_hook(buffer, codec, 0xfa0);
4462}
4463
4464static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4465 struct hda_codec *codec, hda_nid_t nid)
4466{
4467 if (nid == codec->afg)
4468 analog_loop_proc_hook(buffer, codec, 0xfe0);
4469}
4470
4471static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4472 struct hda_codec *codec, hda_nid_t nid)
4473{
4474 if (nid == codec->afg)
4475 analog_loop_proc_hook(buffer, codec, 0xfeb);
4476}
4477#else
4478#define stac92hd_proc_hook NULL
4479#define stac92hd7x_proc_hook NULL
4480#define stac9205_proc_hook NULL
4481#define stac927x_proc_hook NULL
4482#endif
4483
cb53c626 4484#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M
4485static int stac92xx_resume(struct hda_codec *codec)
4486{
dc81bed1
TI
4487 struct sigmatel_spec *spec = codec->spec;
4488
11b44bbd 4489 stac92xx_set_config_regs(codec);
2c885878 4490 stac92xx_init(codec);
82beb8fd
TI
4491 snd_hda_codec_resume_amp(codec);
4492 snd_hda_codec_resume_cache(codec);
2c885878 4493 /* fake event to set up pins again to override cached values */
dc81bed1 4494 if (spec->hp_detect)
c6e4c666
TI
4495 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4496 STAC_HP_EVENT);
ff6fdc37
M
4497 return 0;
4498}
c6798d2b
MR
4499
4500static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4501{
4502 struct sigmatel_spec *spec = codec->spec;
4503 if (spec->eapd_mask)
4504 stac_gpio_set(codec, spec->gpio_mask,
4505 spec->gpio_dir, spec->gpio_data &
4506 ~spec->eapd_mask);
4507 return 0;
4508}
ff6fdc37
M
4509#endif
4510
2f2f4251
M
4511static struct hda_codec_ops stac92xx_patch_ops = {
4512 .build_controls = stac92xx_build_controls,
4513 .build_pcms = stac92xx_build_pcms,
4514 .init = stac92xx_init,
4515 .free = stac92xx_free,
4e55096e 4516 .unsol_event = stac92xx_unsol_event,
cb53c626 4517#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4518 .suspend = stac92xx_suspend,
ff6fdc37
M
4519 .resume = stac92xx_resume,
4520#endif
2f2f4251
M
4521};
4522
4523static int patch_stac9200(struct hda_codec *codec)
4524{
4525 struct sigmatel_spec *spec;
c7d4b2fa 4526 int err;
2f2f4251 4527
e560d8d8 4528 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
4529 if (spec == NULL)
4530 return -ENOMEM;
4531
4532 codec->spec = spec;
a4eed138 4533 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4534 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI
4535 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4536 stac9200_models,
4537 stac9200_cfg_tbl);
11b44bbd
RF
4538 if (spec->board_config < 0) {
4539 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4540 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4541 } else
4542 err = stac_save_pin_cfgs(codec,
4543 stac9200_brd_tbl[spec->board_config]);
4544 if (err < 0) {
4545 stac92xx_free(codec);
4546 return err;
403d1944 4547 }
2f2f4251
M
4548
4549 spec->multiout.max_channels = 2;
4550 spec->multiout.num_dacs = 1;
4551 spec->multiout.dac_nids = stac9200_dac_nids;
4552 spec->adc_nids = stac9200_adc_nids;
4553 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4554 spec->num_muxes = 1;
8b65727b 4555 spec->num_dmics = 0;
9e05b7a3 4556 spec->num_adcs = 1;
a64135a2 4557 spec->num_pwrs = 0;
c7d4b2fa 4558
58eec423
MCC
4559 if (spec->board_config == STAC_9200_M4 ||
4560 spec->board_config == STAC_9200_M4_2 ||
bf277785 4561 spec->board_config == STAC_9200_OQO)
1194b5b7
TI
4562 spec->init = stac9200_eapd_init;
4563 else
4564 spec->init = stac9200_core_init;
2f2f4251 4565 spec->mixer = stac9200_mixer;
c7d4b2fa 4566
117f257d
TI
4567 if (spec->board_config == STAC_9200_PANASONIC) {
4568 spec->gpio_mask = spec->gpio_dir = 0x09;
4569 spec->gpio_data = 0x00;
4570 }
4571
c7d4b2fa
M
4572 err = stac9200_parse_auto_config(codec);
4573 if (err < 0) {
4574 stac92xx_free(codec);
4575 return err;
4576 }
2f2f4251 4577
2acc9dcb
TI
4578 /* CF-74 has no headphone detection, and the driver should *NOT*
4579 * do detection and HP/speaker toggle because the hardware does it.
4580 */
4581 if (spec->board_config == STAC_9200_PANASONIC)
4582 spec->hp_detect = 0;
4583
2f2f4251
M
4584 codec->patch_ops = stac92xx_patch_ops;
4585
4586 return 0;
4587}
4588
8e21c34c
TD
4589static int patch_stac925x(struct hda_codec *codec)
4590{
4591 struct sigmatel_spec *spec;
4592 int err;
4593
4594 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4595 if (spec == NULL)
4596 return -ENOMEM;
4597
4598 codec->spec = spec;
a4eed138 4599 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4600 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC
4601
4602 /* Check first for codec ID */
4603 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4604 STAC_925x_MODELS,
4605 stac925x_models,
4606 stac925x_codec_id_cfg_tbl);
4607
4608 /* Now checks for PCI ID, if codec ID is not found */
4609 if (spec->board_config < 0)
4610 spec->board_config = snd_hda_check_board_config(codec,
4611 STAC_925x_MODELS,
8e21c34c
TD
4612 stac925x_models,
4613 stac925x_cfg_tbl);
9e507abd 4614 again:
8e21c34c 4615 if (spec->board_config < 0) {
9cb36c2a 4616 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4617 "using BIOS defaults\n");
8e21c34c 4618 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4619 } else
4620 err = stac_save_pin_cfgs(codec,
4621 stac925x_brd_tbl[spec->board_config]);
4622 if (err < 0) {
4623 stac92xx_free(codec);
4624 return err;
8e21c34c
TD
4625 }
4626
4627 spec->multiout.max_channels = 2;
4628 spec->multiout.num_dacs = 1;
4629 spec->multiout.dac_nids = stac925x_dac_nids;
4630 spec->adc_nids = stac925x_adc_nids;
4631 spec->mux_nids = stac925x_mux_nids;
4632 spec->num_muxes = 1;
9e05b7a3 4633 spec->num_adcs = 1;
a64135a2 4634 spec->num_pwrs = 0;
2c11f955
TD
4635 switch (codec->vendor_id) {
4636 case 0x83847632: /* STAC9202 */
4637 case 0x83847633: /* STAC9202D */
4638 case 0x83847636: /* STAC9251 */
4639 case 0x83847637: /* STAC9251D */
f6e9852a 4640 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4641 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI
4642 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4643 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD
4644 break;
4645 default:
4646 spec->num_dmics = 0;
4647 break;
4648 }
8e21c34c
TD
4649
4650 spec->init = stac925x_core_init;
4651 spec->mixer = stac925x_mixer;
4652
4653 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI
4654 if (!err) {
4655 if (spec->board_config < 0) {
4656 printk(KERN_WARNING "hda_codec: No auto-config is "
4657 "available, default to model=ref\n");
4658 spec->board_config = STAC_925x_REF;
4659 goto again;
4660 }
4661 err = -EINVAL;
4662 }
8e21c34c
TD
4663 if (err < 0) {
4664 stac92xx_free(codec);
4665 return err;
4666 }
4667
4668 codec->patch_ops = stac92xx_patch_ops;
4669
4670 return 0;
4671}
4672
e1f0d669
MR
4673static struct hda_input_mux stac92hd73xx_dmux = {
4674 .num_items = 4,
4675 .items = {
4676 { "Analog Inputs", 0x0b },
e1f0d669
MR
4677 { "Digital Mic 1", 0x09 },
4678 { "Digital Mic 2", 0x0a },
2a9c7816 4679 { "CD", 0x08 },
e1f0d669
MR
4680 }
4681};
4682
4683static int patch_stac92hd73xx(struct hda_codec *codec)
4684{
4685 struct sigmatel_spec *spec;
4686 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4687 int err = 0;
c21ca4a8 4688 int num_dacs;
e1f0d669
MR
4689
4690 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4691 if (spec == NULL)
4692 return -ENOMEM;
4693
4694 codec->spec = spec;
e99d32b3 4695 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR
4696 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4697 spec->pin_nids = stac92hd73xx_pin_nids;
4698 spec->board_config = snd_hda_check_board_config(codec,
4699 STAC_92HD73XX_MODELS,
4700 stac92hd73xx_models,
4701 stac92hd73xx_cfg_tbl);
4702again:
4703 if (spec->board_config < 0) {
4704 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4705 " STAC92HD73XX, using BIOS defaults\n");
4706 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4707 } else
4708 err = stac_save_pin_cfgs(codec,
4709 stac92hd73xx_brd_tbl[spec->board_config]);
4710 if (err < 0) {
4711 stac92xx_free(codec);
4712 return err;
e1f0d669
MR
4713 }
4714
c21ca4a8 4715 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR
4716 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4717
c21ca4a8 4718 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR
4719 printk(KERN_WARNING "hda_codec: Could not determine "
4720 "number of channels defaulting to DAC count\n");
c21ca4a8 4721 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4722 }
c21ca4a8 4723 switch (num_dacs) {
e1f0d669
MR
4724 case 0x3: /* 6 Channel */
4725 spec->mixer = stac92hd73xx_6ch_mixer;
4726 spec->init = stac92hd73xx_6ch_core_init;
4727 break;
4728 case 0x4: /* 8 Channel */
e1f0d669
MR
4729 spec->mixer = stac92hd73xx_8ch_mixer;
4730 spec->init = stac92hd73xx_8ch_core_init;
4731 break;
4732 case 0x5: /* 10 Channel */
e1f0d669
MR
4733 spec->mixer = stac92hd73xx_10ch_mixer;
4734 spec->init = stac92hd73xx_10ch_core_init;
c21ca4a8
TI
4735 }
4736 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4737
e1f0d669
MR
4738 spec->aloopback_mask = 0x01;
4739 spec->aloopback_shift = 8;
4740
1cd2224c 4741 spec->digbeep_nid = 0x1c;
e1f0d669
MR
4742 spec->mux_nids = stac92hd73xx_mux_nids;
4743 spec->adc_nids = stac92hd73xx_adc_nids;
4744 spec->dmic_nids = stac92hd73xx_dmic_nids;
4745 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4746 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4747 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4748 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR
4749
4750 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4751 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4752 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR
4753 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4754 sizeof(stac92hd73xx_dmux));
4755
a7662640 4756 switch (spec->board_config) {
6b3ab21e 4757 case STAC_DELL_EQ:
d654a660 4758 spec->init = dell_eq_core_init;
6b3ab21e 4759 /* fallthru */
661cd8fb
TI
4760 case STAC_DELL_M6_AMIC:
4761 case STAC_DELL_M6_DMIC:
4762 case STAC_DELL_M6_BOTH:
2a9c7816 4763 spec->num_smuxes = 0;
2a9c7816
MR
4764 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4765 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4766 spec->eapd_switch = 0;
2a9c7816 4767 spec->num_amps = 1;
6b3ab21e 4768
c21ca4a8 4769 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4770 spec->init = dell_m6_core_init;
661cd8fb
TI
4771 switch (spec->board_config) {
4772 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR
4773 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4774 spec->num_dmics = 0;
2a9c7816 4775 spec->private_dimux.num_items = 1;
a7662640 4776 break;
661cd8fb 4777 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR
4778 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4779 spec->num_dmics = 1;
2a9c7816 4780 spec->private_dimux.num_items = 2;
a7662640 4781 break;
661cd8fb 4782 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR
4783 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4784 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4785 spec->num_dmics = 1;
2a9c7816 4786 spec->private_dimux.num_items = 2;
a7662640
MR
4787 break;
4788 }
4789 break;
4790 default:
4791 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4792 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4793 spec->eapd_switch = 1;
a7662640 4794 }
b2c4f4d7
MR
4795 if (spec->board_config > STAC_92HD73XX_REF) {
4796 /* GPIO0 High = Enable EAPD */
4797 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4798 spec->gpio_data = 0x01;
4799 }
2a9c7816 4800 spec->dinput_mux = &spec->private_dimux;
a7662640 4801
a64135a2
MR
4802 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4803 spec->pwr_nids = stac92hd73xx_pwr_nids;
4804
d9737751 4805 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR
4806
4807 if (!err) {
4808 if (spec->board_config < 0) {
4809 printk(KERN_WARNING "hda_codec: No auto-config is "
4810 "available, default to model=ref\n");
4811 spec->board_config = STAC_92HD73XX_REF;
4812 goto again;
4813 }
4814 err = -EINVAL;
4815 }
4816
4817 if (err < 0) {
4818 stac92xx_free(codec);
4819 return err;
4820 }
4821
9e43f0de
TI
4822 if (spec->board_config == STAC_92HD73XX_NO_JD)
4823 spec->hp_detect = 0;
4824
e1f0d669
MR
4825 codec->patch_ops = stac92xx_patch_ops;
4826
2d34e1b3
TI
4827 codec->proc_widget_hook = stac92hd7x_proc_hook;
4828
e1f0d669
MR
4829 return 0;
4830}
4831
d0513fc6
MR
4832static struct hda_input_mux stac92hd83xxx_dmux = {
4833 .num_items = 3,
4834 .items = {
4835 { "Analog Inputs", 0x03 },
4836 { "Digital Mic 1", 0x04 },
4837 { "Digital Mic 2", 0x05 },
4838 }
4839};
4840
4841static int patch_stac92hd83xxx(struct hda_codec *codec)
4842{
4843 struct sigmatel_spec *spec;
65557f35 4844 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 4845 int err;
65557f35 4846 int num_dacs;
d0513fc6
MR
4847
4848 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4849 if (spec == NULL)
4850 return -ENOMEM;
4851
4852 codec->spec = spec;
0ffa9807 4853 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR
4854 spec->mono_nid = 0x19;
4855 spec->digbeep_nid = 0x21;
4856 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4857 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4858 spec->adc_nids = stac92hd83xxx_adc_nids;
4859 spec->pwr_nids = stac92hd83xxx_pwr_nids;
c15c5060 4860 spec->amp_nids = stac92hd83xxx_amp_nids;
d0513fc6
MR
4861 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4862 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4863 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 4864
65557f35
MR
4865
4866 /* set port 0xe to select the last DAC
4867 */
4868 num_dacs = snd_hda_get_connections(codec, 0x0e,
4869 conn, STAC92HD83_DAC_COUNT + 1) - 1;
4870
4871 snd_hda_codec_write_cache(codec, 0xe, 0,
4872 AC_VERB_SET_CONNECT_SEL, num_dacs);
4873
d0513fc6 4874 spec->init = stac92hd83xxx_core_init;
d0513fc6
MR
4875 spec->mixer = stac92hd83xxx_mixer;
4876 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4877 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4878 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
c15c5060 4879 spec->num_amps = ARRAY_SIZE(stac92hd83xxx_amp_nids);
d0513fc6
MR
4880 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4881 spec->dinput_mux = &stac92hd83xxx_dmux;
4882 spec->pin_nids = stac92hd83xxx_pin_nids;
4883 spec->board_config = snd_hda_check_board_config(codec,
4884 STAC_92HD83XXX_MODELS,
4885 stac92hd83xxx_models,
4886 stac92hd83xxx_cfg_tbl);
4887again:
4888 if (spec->board_config < 0) {
4889 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4890 " STAC92HD83XXX, using BIOS defaults\n");
4891 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4892 } else
4893 err = stac_save_pin_cfgs(codec,
4894 stac92hd83xxx_brd_tbl[spec->board_config]);
4895 if (err < 0) {
4896 stac92xx_free(codec);
4897 return err;
d0513fc6
MR
4898 }
4899
32ed3f46
MR
4900 switch (codec->vendor_id) {
4901 case 0x111d7604:
4902 case 0x111d7605:
4903 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
4904 break;
4905 spec->num_pwrs = 0;
4906 break;
4907 }
4908
d0513fc6
MR
4909 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4910 if (!err) {
4911 if (spec->board_config < 0) {
4912 printk(KERN_WARNING "hda_codec: No auto-config is "
4913 "available, default to model=ref\n");
4914 spec->board_config = STAC_92HD83XXX_REF;
4915 goto again;
4916 }
4917 err = -EINVAL;
4918 }
4919
4920 if (err < 0) {
4921 stac92xx_free(codec);
4922 return err;
4923 }
4924
4925 codec->patch_ops = stac92xx_patch_ops;
4926
2d34e1b3
TI
4927 codec->proc_widget_hook = stac92hd_proc_hook;
4928
d0513fc6
MR
4929 return 0;
4930}
4931
4b33c767
MR
4932static struct hda_input_mux stac92hd71bxx_dmux = {
4933 .num_items = 4,
4934 .items = {
4935 { "Analog Inputs", 0x00 },
4936 { "Mixer", 0x01 },
4937 { "Digital Mic 1", 0x02 },
4938 { "Digital Mic 2", 0x03 },
4939 }
4940};
4941
e035b841
MR
4942static int patch_stac92hd71bxx(struct hda_codec *codec)
4943{
4944 struct sigmatel_spec *spec;
4945 int err = 0;
4946
4947 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4948 if (spec == NULL)
4949 return -ENOMEM;
4950
4951 codec->spec = spec;
8daaaa97 4952 codec->patch_ops = stac92xx_patch_ops;
e035b841 4953 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4954 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4955 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR
4956 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4957 sizeof(stac92hd71bxx_dmux));
e035b841
MR
4958 spec->board_config = snd_hda_check_board_config(codec,
4959 STAC_92HD71BXX_MODELS,
4960 stac92hd71bxx_models,
4961 stac92hd71bxx_cfg_tbl);
4962again:
4963 if (spec->board_config < 0) {
4964 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4965 " STAC92HD71BXX, using BIOS defaults\n");
4966 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4967 } else
4968 err = stac_save_pin_cfgs(codec,
4969 stac92hd71bxx_brd_tbl[spec->board_config]);
4970 if (err < 0) {
4971 stac92xx_free(codec);
4972 return err;
e035b841
MR
4973 }
4974
41c3b648
TI
4975 if (spec->board_config > STAC_92HD71BXX_REF) {
4976 /* GPIO0 = EAPD */
4977 spec->gpio_mask = 0x01;
4978 spec->gpio_dir = 0x01;
4979 spec->gpio_data = 0x01;
4980 }
4981
541eee87
MR
4982 switch (codec->vendor_id) {
4983 case 0x111d76b6: /* 4 Port without Analog Mixer */
4984 case 0x111d76b7:
4985 case 0x111d76b4: /* 6 Port without Analog Mixer */
4986 case 0x111d76b5:
4987 spec->mixer = stac92hd71bxx_mixer;
4988 spec->init = stac92hd71bxx_core_init;
0ffa9807 4989 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4990 break;
aafc4412 4991 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI
4992 switch (spec->board_config) {
4993 case STAC_HP_M4:
72474be6 4994 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI
4995 err = stac_add_event(spec, codec->afg,
4996 STAC_VREF_EVENT, 0x02);
4997 if (err < 0)
4998 return err;
c5d08bb5 4999 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR
5000 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
5001 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 5002 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 5003 AC_USRSP_EN | err);
72474be6
MR
5004 spec->gpio_mask |= 0x02;
5005 break;
5006 }
8daaaa97 5007 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5008 (codec->revision_id & 0xf) == 1)
8daaaa97 5009 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5010
aafc4412
MR
5011 /* no output amps */
5012 spec->num_pwrs = 0;
5013 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 5014 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR
5015
5016 /* disable VSW */
5017 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 5018 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR
5019 break;
5020 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5021 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5022 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5023
aafc4412
MR
5024 /* no output amps */
5025 spec->num_pwrs = 0;
5026 /* fallthru */
541eee87 5027 default:
4b33c767 5028 spec->dinput_mux = &spec->private_dimux;
541eee87
MR
5029 spec->mixer = stac92hd71bxx_analog_mixer;
5030 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 5031 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR
5032 }
5033
4b33c767 5034 spec->aloopback_mask = 0x50;
541eee87
MR
5035 spec->aloopback_shift = 0;
5036
8daaaa97 5037 spec->powerdown_adcs = 1;
1cd2224c 5038 spec->digbeep_nid = 0x26;
e035b841
MR
5039 spec->mux_nids = stac92hd71bxx_mux_nids;
5040 spec->adc_nids = stac92hd71bxx_adc_nids;
5041 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 5042 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 5043 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5044 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR
5045
5046 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5047 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 5048
6a14f585
MR
5049 switch (spec->board_config) {
5050 case STAC_HP_M4:
6a14f585 5051 /* enable internal microphone */
af9f341a 5052 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR
5053 stac92xx_auto_set_pinctl(codec, 0x0e,
5054 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR
5055 /* fallthru */
5056 case STAC_DELL_M4_2:
5057 spec->num_dmics = 0;
5058 spec->num_smuxes = 0;
5059 spec->num_dmuxes = 0;
5060 break;
5061 case STAC_DELL_M4_1:
5062 case STAC_DELL_M4_3:
5063 spec->num_dmics = 1;
5064 spec->num_smuxes = 0;
5065 spec->num_dmuxes = 0;
6a14f585
MR
5066 break;
5067 default:
5068 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
5069 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
5070 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
5071 };
5072
c21ca4a8 5073 spec->multiout.dac_nids = spec->dac_nids;
4b33c767
MR
5074 if (spec->dinput_mux)
5075 spec->private_dimux.num_items +=
5076 spec->num_dmics -
5077 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR
5078
5079 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
5080 if (!err) {
5081 if (spec->board_config < 0) {
5082 printk(KERN_WARNING "hda_codec: No auto-config is "
5083 "available, default to model=ref\n");
5084 spec->board_config = STAC_92HD71BXX_REF;
5085 goto again;
5086 }
5087 err = -EINVAL;
5088 }
5089
5090 if (err < 0) {
5091 stac92xx_free(codec);
5092 return err;
5093 }
5094
2d34e1b3
TI
5095 codec->proc_widget_hook = stac92hd7x_proc_hook;
5096
e035b841
MR
5097 return 0;
5098};
5099
2f2f4251
M
5100static int patch_stac922x(struct hda_codec *codec)
5101{
5102 struct sigmatel_spec *spec;
c7d4b2fa 5103 int err;
2f2f4251 5104
e560d8d8 5105 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
5106 if (spec == NULL)
5107 return -ENOMEM;
5108
5109 codec->spec = spec;
a4eed138 5110 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5111 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI
5112 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5113 stac922x_models,
5114 stac922x_cfg_tbl);
536319af 5115 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR
5116 spec->gpio_mask = spec->gpio_dir = 0x03;
5117 spec->gpio_data = 0x03;
3fc24d85
TI
5118 /* Intel Macs have all same PCI SSID, so we need to check
5119 * codec SSID to distinguish the exact models
5120 */
6f0778d8 5121 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5122 switch (codec->subsystem_id) {
5d5d3bc3
IZ
5123
5124 case 0x106b0800:
5125 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5126 break;
5d5d3bc3
IZ
5127 case 0x106b0600:
5128 case 0x106b0700:
5129 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5130 break;
5d5d3bc3
IZ
5131 case 0x106b0e00:
5132 case 0x106b0f00:
5133 case 0x106b1600:
5134 case 0x106b1700:
5135 case 0x106b0200:
5136 case 0x106b1e00:
5137 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5138 break;
5d5d3bc3
IZ
5139 case 0x106b1a00:
5140 case 0x00000100:
5141 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5142 break;
5d5d3bc3
IZ
5143 case 0x106b0a00:
5144 case 0x106b2200:
5145 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5146 break;
536319af
NB
5147 default:
5148 spec->board_config = STAC_INTEL_MAC_V3;
5149 break;
3fc24d85
TI
5150 }
5151 }
5152
9e507abd 5153 again:
11b44bbd
RF
5154 if (spec->board_config < 0) {
5155 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5156 "using BIOS defaults\n");
5157 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5158 } else
5159 err = stac_save_pin_cfgs(codec,
5160 stac922x_brd_tbl[spec->board_config]);
5161 if (err < 0) {
5162 stac92xx_free(codec);
5163 return err;
403d1944 5164 }
2f2f4251 5165
c7d4b2fa
M
5166 spec->adc_nids = stac922x_adc_nids;
5167 spec->mux_nids = stac922x_mux_nids;
2549413e 5168 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5169 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5170 spec->num_dmics = 0;
a64135a2 5171 spec->num_pwrs = 0;
c7d4b2fa
M
5172
5173 spec->init = stac922x_core_init;
2f2f4251 5174 spec->mixer = stac922x_mixer;
c7d4b2fa
M
5175
5176 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5177
3cc08dc6 5178 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI
5179 if (!err) {
5180 if (spec->board_config < 0) {
5181 printk(KERN_WARNING "hda_codec: No auto-config is "
5182 "available, default to model=ref\n");
5183 spec->board_config = STAC_D945_REF;
5184 goto again;
5185 }
5186 err = -EINVAL;
5187 }
3cc08dc6
MP
5188 if (err < 0) {
5189 stac92xx_free(codec);
5190 return err;
5191 }
5192
5193 codec->patch_ops = stac92xx_patch_ops;
5194
807a4636
TI
5195 /* Fix Mux capture level; max to 2 */
5196 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5197 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5198 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5199 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5200 (0 << AC_AMPCAP_MUTE_SHIFT));
5201
3cc08dc6
MP
5202 return 0;
5203}
5204
5205static int patch_stac927x(struct hda_codec *codec)
5206{
5207 struct sigmatel_spec *spec;
5208 int err;
5209
5210 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5211 if (spec == NULL)
5212 return -ENOMEM;
5213
5214 codec->spec = spec;
a4eed138 5215 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5216 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI
5217 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5218 stac927x_models,
5219 stac927x_cfg_tbl);
9e507abd 5220 again:
8e9068b1
MR
5221 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5222 if (spec->board_config < 0)
5223 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5224 "STAC927x, using BIOS defaults\n");
11b44bbd 5225 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5226 } else
5227 err = stac_save_pin_cfgs(codec,
5228 stac927x_brd_tbl[spec->board_config]);
5229 if (err < 0) {
5230 stac92xx_free(codec);
5231 return err;
3cc08dc6
MP
5232 }
5233
1cd2224c 5234 spec->digbeep_nid = 0x23;
8e9068b1
MR
5235 spec->adc_nids = stac927x_adc_nids;
5236 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5237 spec->mux_nids = stac927x_mux_nids;
5238 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR
5239 spec->smux_nids = stac927x_smux_nids;
5240 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5241 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5242 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR
5243 spec->multiout.dac_nids = spec->dac_nids;
5244
81d3dbde 5245 switch (spec->board_config) {
93ed1503 5246 case STAC_D965_3ST:
93ed1503 5247 case STAC_D965_5ST:
8e9068b1 5248 /* GPIO0 High = Enable EAPD */
0fc9dec4 5249 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5250 spec->gpio_data = 0x01;
8e9068b1
MR
5251 spec->num_dmics = 0;
5252
93ed1503 5253 spec->init = d965_core_init;
9e05b7a3 5254 spec->mixer = stac927x_mixer;
81d3dbde 5255 break;
8e9068b1 5256 case STAC_DELL_BIOS:
780c8be4
MR
5257 switch (codec->subsystem_id) {
5258 case 0x10280209:
5259 case 0x1028022e:
5260 /* correct the device field to SPDIF out */
af9f341a 5261 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR
5262 break;
5263 };
03d7ca17 5264 /* configure the analog microphone on some laptops */
af9f341a 5265 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5266 /* correct the front output jack as a hp out */
af9f341a 5267 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5268 /* correct the front input jack as a mic */
af9f341a 5269 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5270 /* fallthru */
8e9068b1
MR
5271 case STAC_DELL_3ST:
5272 /* GPIO2 High = Enable EAPD */
0fc9dec4 5273 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5274 spec->gpio_data = 0x04;
7f16859a
MR
5275 spec->dmic_nids = stac927x_dmic_nids;
5276 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5277
8e9068b1
MR
5278 spec->init = d965_core_init;
5279 spec->mixer = stac927x_mixer;
5280 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5281 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR
5282 break;
5283 default:
b2c4f4d7
MR
5284 if (spec->board_config > STAC_D965_REF) {
5285 /* GPIO0 High = Enable EAPD */
5286 spec->eapd_mask = spec->gpio_mask = 0x01;
5287 spec->gpio_dir = spec->gpio_data = 0x01;
5288 }
8e9068b1
MR
5289 spec->num_dmics = 0;
5290
5291 spec->init = stac927x_core_init;
5292 spec->mixer = stac927x_mixer;
7f16859a
MR
5293 }
5294
a64135a2 5295 spec->num_pwrs = 0;
e1f0d669
MR
5296 spec->aloopback_mask = 0x40;
5297 spec->aloopback_shift = 0;
c0cea0d0 5298 spec->eapd_switch = 1;
8e9068b1 5299
3cc08dc6 5300 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI
5301 if (!err) {
5302 if (spec->board_config < 0) {
5303 printk(KERN_WARNING "hda_codec: No auto-config is "
5304 "available, default to model=ref\n");
5305 spec->board_config = STAC_D965_REF;
5306 goto again;
5307 }
5308 err = -EINVAL;
5309 }
c7d4b2fa
M
5310 if (err < 0) {
5311 stac92xx_free(codec);
5312 return err;
5313 }
2f2f4251
M
5314
5315 codec->patch_ops = stac92xx_patch_ops;
5316
2d34e1b3
TI
5317 codec->proc_widget_hook = stac927x_proc_hook;
5318
52987656
TI
5319 /*
5320 * !!FIXME!!
5321 * The STAC927x seem to require fairly long delays for certain
5322 * command sequences. With too short delays (even if the answer
5323 * is set to RIRB properly), it results in the silence output
5324 * on some hardwares like Dell.
5325 *
5326 * The below flag enables the longer delay (see get_response
5327 * in hda_intel.c).
5328 */
5329 codec->bus->needs_damn_long_delay = 1;
5330
e28d8322
TI
5331 /* no jack detecion for ref-no-jd model */
5332 if (spec->board_config == STAC_D965_REF_NO_JD)
5333 spec->hp_detect = 0;
5334
2f2f4251
M
5335 return 0;
5336}
5337
f3302a59
MP
5338static int patch_stac9205(struct hda_codec *codec)
5339{
5340 struct sigmatel_spec *spec;
8259980e 5341 int err;
f3302a59
MP
5342
5343 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5344 if (spec == NULL)
5345 return -ENOMEM;
5346
5347 codec->spec = spec;
a4eed138 5348 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5349 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI
5350 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5351 stac9205_models,
5352 stac9205_cfg_tbl);
9e507abd 5353 again:
11b44bbd
RF
5354 if (spec->board_config < 0) {
5355 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5356 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5357 } else
5358 err = stac_save_pin_cfgs(codec,
5359 stac9205_brd_tbl[spec->board_config]);
5360 if (err < 0) {
5361 stac92xx_free(codec);
5362 return err;
f3302a59
MP
5363 }
5364
1cd2224c 5365 spec->digbeep_nid = 0x23;
f3302a59 5366 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5367 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5368 spec->mux_nids = stac9205_mux_nids;
2549413e 5369 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR
5370 spec->smux_nids = stac9205_smux_nids;
5371 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5372 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5373 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5374 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5375 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5376 spec->num_pwrs = 0;
f3302a59
MP
5377
5378 spec->init = stac9205_core_init;
5379 spec->mixer = stac9205_mixer;
5380
e1f0d669
MR
5381 spec->aloopback_mask = 0x40;
5382 spec->aloopback_shift = 0;
d9a4268e
TI
5383 /* Turn on/off EAPD per HP plugging */
5384 if (spec->board_config != STAC_9205_EAPD)
5385 spec->eapd_switch = 1;
f3302a59 5386 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5387
ae0a8ed8 5388 switch (spec->board_config){
ae0a8ed8 5389 case STAC_9205_DELL_M43:
87d48363 5390 /* Enable SPDIF in/out */
af9f341a
TI
5391 stac_change_pin_config(codec, 0x1f, 0x01441030);
5392 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5393
4fe5195c 5394 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI
5395 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5396 if (err < 0)
5397 return err;
c5d08bb5 5398 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR
5399 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5400 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI
5401 AC_VERB_SET_UNSOLICITED_ENABLE,
5402 AC_USRSP_EN | err);
4fe5195c
MR
5403
5404 spec->gpio_dir = 0x0b;
0fc9dec4 5405 spec->eapd_mask = 0x01;
4fe5195c
MR
5406 spec->gpio_mask = 0x1b;
5407 spec->gpio_mute = 0x10;
e2e7d624 5408 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5409 * GPIO3 Low = DRM
87d48363 5410 */
4fe5195c 5411 spec->gpio_data = 0x01;
ae0a8ed8 5412 break;
b2c4f4d7
MR
5413 case STAC_9205_REF:
5414 /* SPDIF-In enabled */
5415 break;
ae0a8ed8
TD
5416 default:
5417 /* GPIO0 High = EAPD */
0fc9dec4 5418 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5419 spec->gpio_data = 0x01;
ae0a8ed8
TD
5420 break;
5421 }
33382403 5422
f3302a59 5423 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI
5424 if (!err) {
5425 if (spec->board_config < 0) {
5426 printk(KERN_WARNING "hda_codec: No auto-config is "
5427 "available, default to model=ref\n");
5428 spec->board_config = STAC_9205_REF;
5429 goto again;
5430 }
5431 err = -EINVAL;
5432 }
f3302a59
MP
5433 if (err < 0) {
5434 stac92xx_free(codec);
5435 return err;
5436 }
5437
5438 codec->patch_ops = stac92xx_patch_ops;
5439
2d34e1b3
TI
5440 codec->proc_widget_hook = stac9205_proc_hook;
5441
f3302a59
MP
5442 return 0;
5443}
5444
db064e50 5445/*
6d859065 5446 * STAC9872 hack
db064e50
TI
5447 */
5448
1e137f92 5449static struct hda_verb stac9872_core_init[] = {
1624cb9a 5450 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM
5451 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5452 {}
5453};
5454
caa10b6e
TI
5455static struct snd_kcontrol_new stac9872_mixer[] = {
5456 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5457 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
caa10b6e
TI
5458 { } /* end */
5459};
5460
5461static hda_nid_t stac9872_pin_nids[] = {
5462 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
5463 0x11, 0x13, 0x14,
5464};
5465
5466static hda_nid_t stac9872_adc_nids[] = {
5467 0x8 /*,0x6*/
5468};
5469
5470static hda_nid_t stac9872_mux_nids[] = {
5471 0x15
5472};
5473
6d859065 5474static int patch_stac9872(struct hda_codec *codec)
db064e50
TI
5475{
5476 struct sigmatel_spec *spec;
1e137f92 5477 int err;
db064e50 5478
db064e50
TI
5479 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5480 if (spec == NULL)
5481 return -ENOMEM;
db064e50 5482 codec->spec = spec;
caa10b6e 5483
1e137f92 5484#if 0 /* no model right now */
caa10b6e
TI
5485 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5486 stac9872_models,
5487 stac9872_cfg_tbl);
1e137f92 5488#endif
db064e50 5489
1e137f92
TI
5490 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
5491 spec->pin_nids = stac9872_pin_nids;
5492 spec->multiout.dac_nids = spec->dac_nids;
5493 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
5494 spec->adc_nids = stac9872_adc_nids;
5495 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
5496 spec->mux_nids = stac9872_mux_nids;
5497 spec->mixer = stac9872_mixer;
5498 spec->init = stac9872_core_init;
5499
5500 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
5501 if (err < 0) {
5502 stac92xx_free(codec);
5503 return -EINVAL;
5504 }
5505 spec->input_mux = &spec->private_imux;
5506 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI
5507 return 0;
5508}
5509
5510
2f2f4251
M
5511/*
5512 * patch entries
5513 */
1289e9e8 5514static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M
5515 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5516 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5517 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5518 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5519 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5520 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5521 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP
5522 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5523 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5524 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5525 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5526 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5527 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP
5528 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5529 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5530 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5531 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5532 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5533 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5534 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5535 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5536 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5537 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD
5538 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5539 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5540 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5541 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5542 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5543 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI
5544 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5545 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM
5546 /* The following does not take into account .id=0x83847661 when subsys =
5547 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5548 * currently not fully supported.
5549 */
5550 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5551 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5552 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP
5553 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5554 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5555 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5556 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5557 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5558 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5559 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5560 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5561 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR
5562 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5563 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5564 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR
5565 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5566 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5567 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR
5568 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5569 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5570 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5571 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5572 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5573 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5574 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5575 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M
5576 {} /* terminator */
5577};
1289e9e8
TI
5578
5579MODULE_ALIAS("snd-hda-codec-id:8384*");
5580MODULE_ALIAS("snd-hda-codec-id:111d*");
5581
5582MODULE_LICENSE("GPL");
5583MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5584
5585static struct hda_codec_preset_list sigmatel_list = {
5586 .preset = snd_hda_preset_sigmatel,
5587 .owner = THIS_MODULE,
5588};
5589
5590static int __init patch_sigmatel_init(void)
5591{
5592 return snd_hda_add_codec_preset(&sigmatel_list);
5593}
5594
5595static void __exit patch_sigmatel_exit(void)
5596{
5597 snd_hda_delete_codec_preset(&sigmatel_list);
5598}
5599
5600module_init(patch_sigmatel_init)
5601module_exit(patch_sigmatel_exit)