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[ALSA] ASoC: sh: improve generated code for HAC module (AC97)
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <sound/driver.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/pci.h>
32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
36
4e55096e
M		 37#define NUM_CONTROL_ALLOC 32
38#define STAC_HP_EVENT 0x37
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
dfe495d0
TI		 42 STAC_9200_DELL_D21,
43 STAC_9200_DELL_D22,
44 STAC_9200_DELL_D23,
45 STAC_9200_DELL_M21,
46 STAC_9200_DELL_M22,
47 STAC_9200_DELL_M23,
48 STAC_9200_DELL_M24,
49 STAC_9200_DELL_M25,
50 STAC_9200_DELL_M26,
51 STAC_9200_DELL_M27,
1194b5b7 52 STAC_9200_GATEWAY,
f5fcc13c
TI		 53 STAC_9200_MODELS
54};
55
56enum {
57 STAC_9205_REF,
dfe495d0 58 STAC_9205_DELL_M42,
ae0a8ed8
TD		 59 STAC_9205_DELL_M43,
60 STAC_9205_DELL_M44,
f5fcc13c
TI		 61 STAC_9205_MODELS
62};
63
e035b841
MR		 64enum {
65 STAC_92HD71BXX_REF,
66 STAC_92HD71BXX_MODELS
67};
68
8e21c34c
TD		 69enum {
70 STAC_925x_REF,
71 STAC_M2_2,
72 STAC_MA6,
2c11f955 73 STAC_PA6,
8e21c34c
TD		 74 STAC_925x_MODELS
75};
76
f5fcc13c
TI		 77enum {
78 STAC_D945_REF,
79 STAC_D945GTP3,
80 STAC_D945GTP5,
5d5d3bc3
IZ		 81 STAC_INTEL_MAC_V1,
82 STAC_INTEL_MAC_V2,
83 STAC_INTEL_MAC_V3,
84 STAC_INTEL_MAC_V4,
85 STAC_INTEL_MAC_V5,
dfe495d0 86 /* for backward compatibility */
f5fcc13c 87 STAC_MACMINI,
3fc24d85 88 STAC_MACBOOK,
6f0778d8
NB		 89 STAC_MACBOOK_PRO_V1,
90 STAC_MACBOOK_PRO_V2,
f16928fb 91 STAC_IMAC_INTEL,
0dae0f83 92 STAC_IMAC_INTEL_20,
dfe495d0
TI		 93 STAC_922X_DELL_D81,
94 STAC_922X_DELL_D82,
95 STAC_922X_DELL_M81,
96 STAC_922X_DELL_M82,
f5fcc13c
TI		 97 STAC_922X_MODELS
98};
99
100enum {
101 STAC_D965_REF,
102 STAC_D965_3ST,
103 STAC_D965_5ST,
4ff076e5 104 STAC_DELL_3ST,
f5fcc13c
TI		 105 STAC_927X_MODELS
106};
403d1944 107
2f2f4251 108struct sigmatel_spec {
c8b6bf9b 109 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 110 unsigned int num_mixers;
111
403d1944 112 int board_config;
c7d4b2fa 113 unsigned int surr_switch: 1;
403d1944
MP		 114 unsigned int line_switch: 1;
115 unsigned int mic_switch: 1;
3cc08dc6 116 unsigned int alt_switch: 1;
82bc955f 117 unsigned int hp_detect: 1;
62fe78e9 118 unsigned int gpio_mute: 1;
c7d4b2fa 119
8259980e
TI		 120 unsigned int gpio_mask, gpio_data;
121
2f2f4251
M		 122 /* playback */
123 struct hda_multi_out multiout;
3cc08dc6 124 hda_nid_t dac_nids[5];
2f2f4251
M		 125
126 /* capture */
127 hda_nid_t *adc_nids;
2f2f4251 128 unsigned int num_adcs;
dabbed6f
M		 129 hda_nid_t *mux_nids;
130 unsigned int num_muxes;
8b65727b
MP		 131 hda_nid_t *dmic_nids;
132 unsigned int num_dmics;
133 hda_nid_t dmux_nid;
dabbed6f 134 hda_nid_t dig_in_nid;
2f2f4251 135
2f2f4251
M		 136 /* pin widgets */
137 hda_nid_t *pin_nids;
138 unsigned int num_pins;
2f2f4251 139 unsigned int *pin_configs;
11b44bbd 140 unsigned int *bios_pin_configs;
2f2f4251
M		 141
142 /* codec specific stuff */
143 struct hda_verb *init;
c8b6bf9b 144 struct snd_kcontrol_new *mixer;
2f2f4251
M		 145
146 /* capture source */
8b65727b
MP		 147 struct hda_input_mux *dinput_mux;
148 unsigned int cur_dmux;
c7d4b2fa 149 struct hda_input_mux *input_mux;
3cc08dc6 150 unsigned int cur_mux[3];
2f2f4251 151
403d1944
MP		 152 /* i/o switches */
153 unsigned int io_switch[2];
0fb87bb4 154 unsigned int clfe_swap;
5f10c4a9 155 unsigned int aloopback;
2f2f4251 156
c7d4b2fa
M		 157 struct hda_pcm pcm_rec[2]; /* PCM information */
158
159 /* dynamic controls and input_mux */
160 struct auto_pin_cfg autocfg;
161 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 162 struct snd_kcontrol_new *kctl_alloc;
8b65727b 163 struct hda_input_mux private_dimux;
c7d4b2fa 164 struct hda_input_mux private_imux;
2f2f4251
M		 165};
166
167static hda_nid_t stac9200_adc_nids[1] = {
168 0x03,
169};
170
171static hda_nid_t stac9200_mux_nids[1] = {
172 0x0c,
173};
174
175static hda_nid_t stac9200_dac_nids[1] = {
176 0x02,
177};
178
e035b841
MR		 179static hda_nid_t stac92hd71bxx_adc_nids[2] = {
180 0x12, 0x13,
181};
182
183static hda_nid_t stac92hd71bxx_mux_nids[2] = {
184 0x1a, 0x1b
185};
186
187static hda_nid_t stac92hd71bxx_dac_nids[2] = {
188 0x10, /*0x11, */
189};
190
191#define STAC92HD71BXX_NUM_DMICS 2
192static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
193 0x18, 0x19, 0
194};
195
8e21c34c
TD		 196static hda_nid_t stac925x_adc_nids[1] = {
197 0x03,
198};
199
200static hda_nid_t stac925x_mux_nids[1] = {
201 0x0f,
202};
203
204static hda_nid_t stac925x_dac_nids[1] = {
205 0x02,
206};
207
f6e9852a
TI		 208#define STAC925X_NUM_DMICS 1
209static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
210 0x15, 0
2c11f955
TD		 211};
212
2f2f4251
M		 213static hda_nid_t stac922x_adc_nids[2] = {
214 0x06, 0x07,
215};
216
217static hda_nid_t stac922x_mux_nids[2] = {
218 0x12, 0x13,
219};
220
3cc08dc6
MP		 221static hda_nid_t stac927x_adc_nids[3] = {
222 0x07, 0x08, 0x09
223};
224
225static hda_nid_t stac927x_mux_nids[3] = {
226 0x15, 0x16, 0x17
227};
228
7f16859a
MR		 229#define STAC927X_NUM_DMICS 2
230static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
231 0x13, 0x14, 0
232};
233
f3302a59
MP		 234static hda_nid_t stac9205_adc_nids[2] = {
235 0x12, 0x13
236};
237
238static hda_nid_t stac9205_mux_nids[2] = {
239 0x19, 0x1a
240};
241
f6e9852a
TI		 242#define STAC9205_NUM_DMICS 2
243static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
244 0x17, 0x18, 0
8b65727b
MP		 245};
246
c7d4b2fa 247static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 248 0x08, 0x09, 0x0d, 0x0e,
249 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 250};
251
8e21c34c
TD		 252static hda_nid_t stac925x_pin_nids[8] = {
253 0x07, 0x08, 0x0a, 0x0b,
254 0x0c, 0x0d, 0x10, 0x11,
255};
256
2f2f4251
M		 257static hda_nid_t stac922x_pin_nids[10] = {
258 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
259 0x0f, 0x10, 0x11, 0x15, 0x1b,
260};
261
e035b841
MR		 262static hda_nid_t stac92hd71bxx_pin_nids[10] = {
263 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
264 0x0f, 0x14, 0x18, 0x19, 0x1e,
265};
266
3cc08dc6
MP		 267static hda_nid_t stac927x_pin_nids[14] = {
268 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
269 0x0f, 0x10, 0x11, 0x12, 0x13,
270 0x14, 0x21, 0x22, 0x23,
271};
272
f3302a59
MP		 273static hda_nid_t stac9205_pin_nids[12] = {
274 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
275 0x0f, 0x14, 0x16, 0x17, 0x18,
276 0x21, 0x22,
f3302a59
MP		 277};
278
8b65727b
MP		 279static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
280 struct snd_ctl_elem_info *uinfo)
281{
282 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
283 struct sigmatel_spec *spec = codec->spec;
284 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
285}
286
287static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
288 struct snd_ctl_elem_value *ucontrol)
289{
290 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
291 struct sigmatel_spec *spec = codec->spec;
292
293 ucontrol->value.enumerated.item[0] = spec->cur_dmux;
294 return 0;
295}
296
297static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
298 struct snd_ctl_elem_value *ucontrol)
299{
300 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
301 struct sigmatel_spec *spec = codec->spec;
302
303 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
304 spec->dmux_nid, &spec->cur_dmux);
305}
306
c8b6bf9b 307static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 308{
309 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
310 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 311 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 312}
313
c8b6bf9b 314static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 315{
316 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
317 struct sigmatel_spec *spec = codec->spec;
318 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
319
320 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
321 return 0;
322}
323
c8b6bf9b 324static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 325{
326 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
327 struct sigmatel_spec *spec = codec->spec;
328 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
329
c7d4b2fa 330 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 331 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
332}
333
5f10c4a9
ML		 334#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
335
336static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
337 struct snd_ctl_elem_value *ucontrol)
338{
339 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
340 struct sigmatel_spec *spec = codec->spec;
341
342 ucontrol->value.integer.value[0] = spec->aloopback;
343 return 0;
344}
345
346static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
347 struct snd_ctl_elem_value *ucontrol)
348{
349 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
350 struct sigmatel_spec *spec = codec->spec;
351 unsigned int dac_mode;
352
353 if (spec->aloopback == ucontrol->value.integer.value[0])
354 return 0;
355
356 spec->aloopback = ucontrol->value.integer.value[0];
357
358
359 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
360 kcontrol->private_value & 0xFFFF, 0x0);
361
362 if (spec->aloopback) {
363 snd_hda_power_up(codec);
364 dac_mode |= 0x40;
365 } else {
366 snd_hda_power_down(codec);
367 dac_mode &= ~0x40;
368 }
369
370 snd_hda_codec_write_cache(codec, codec->afg, 0,
371 kcontrol->private_value >> 16, dac_mode);
372
373 return 1;
374}
375
c7d4b2fa 376static struct hda_verb stac9200_core_init[] = {
2f2f4251 377 /* set dac0mux for dac converter */
c7d4b2fa 378 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 379 {}
380};
381
1194b5b7
TI		 382static struct hda_verb stac9200_eapd_init[] = {
383 /* set dac0mux for dac converter */
384 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
385 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
386 {}
387};
388
e035b841
MR		 389static struct hda_verb stac92hd71bxx_core_init[] = {
390 /* set master volume and direct control */
391 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
392 /* connect headphone jack to dac1 */
393 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
394 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
395 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
396 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
397 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
398 /* unmute mono out node */
399 { 0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
400 {}
401};
402
8e21c34c
TD		 403static struct hda_verb stac925x_core_init[] = {
404 /* set dac0mux for dac converter */
405 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
406 {}
407};
408
c7d4b2fa 409static struct hda_verb stac922x_core_init[] = {
2f2f4251 410 /* set master volume and direct control */
c7d4b2fa 411 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 412 {}
413};
414
93ed1503 415static struct hda_verb d965_core_init[] = {
19039bd0 416 /* set master volume and direct control */
93ed1503 417 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 418 /* unmute node 0x1b */
419 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
420 /* select node 0x03 as DAC */
421 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
422 {}
423};
424
3cc08dc6
MP		 425static struct hda_verb stac927x_core_init[] = {
426 /* set master volume and direct control */
427 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
428 {}
429};
430
f3302a59
MP		 431static struct hda_verb stac9205_core_init[] = {
432 /* set master volume and direct control */
433 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
434 {}
435};
436
47744f63
MR		 437#define STAC_DIGITAL_INPUT_SOURCE(cnt) \
438 { \
439 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
440 .name = "Digital Input Source", \
441 .count = cnt, \
442 .info = stac92xx_dmux_enum_info, \
443 .get = stac92xx_dmux_enum_get, \
444 .put = stac92xx_dmux_enum_put,\
445 }
446
9e05b7a3 447#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 448 { \
449 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
450 .name = "Input Source", \
9e05b7a3 451 .count = cnt, \
ca7c5a8b
ML		 452 .info = stac92xx_mux_enum_info, \
453 .get = stac92xx_mux_enum_get, \
454 .put = stac92xx_mux_enum_put, \
455 }
456
5f10c4a9
ML		 457#define STAC_ANALOG_LOOPBACK(verb_read,verb_write) \
458 { \
459 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
460 .name = "Analog Loopback", \
461 .count = 1, \
462 .info = stac92xx_aloopback_info, \
463 .get = stac92xx_aloopback_get, \
464 .put = stac92xx_aloopback_put, \
465 .private_value = verb_read | (verb_write << 16), \
466 }
467
c8b6bf9b 468static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 469 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
470 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 471 STAC_INPUT_SOURCE(1),
2f2f4251
M		 472 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
473 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 474 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 475 { } /* end */
476};
477
e035b841
MR		 478static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
479 STAC_DIGITAL_INPUT_SOURCE(1),
480 STAC_INPUT_SOURCE(2),
481 STAC_VOLKNOB(0x28),
482
483 /* hardware gain controls */
484 HDA_CODEC_VOLUME("Digital Mic 1 Volume", 0x18, 0, HDA_OUTPUT),
485 HDA_CODEC_VOLUME("Digital Mic 2 Volume", 0x19, 0, HDA_OUTPUT),
486
487 HDA_CODEC_VOLUME("Capture Volume", 0x1c, 0, HDA_OUTPUT),
488 HDA_CODEC_MUTE("Capture Switch", 0x1c, 0, HDA_OUTPUT),
489 HDA_CODEC_VOLUME("Capture Mux Volume", 0x1a, 0, HDA_OUTPUT),
490 { } /* end */
491};
492
8e21c34c 493static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 494 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 495 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
496 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
497 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
498 { } /* end */
499};
500
9e05b7a3 501static struct snd_kcontrol_new stac9205_mixer[] = {
47744f63 502 STAC_DIGITAL_INPUT_SOURCE(1),
9e05b7a3
ML		 503 STAC_INPUT_SOURCE(2),
504 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0),
9e05b7a3
ML		 505
506 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
507 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
508 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
509
510 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
511 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
512 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
513
2f2f4251
M		 514 { } /* end */
515};
516
19039bd0 517/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 518static struct snd_kcontrol_new stac922x_mixer[] = {
519 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 520 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
521 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
522 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
523
524 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
525 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
526 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 527 { } /* end */
528};
529
9e05b7a3 530
d1d985f0 531static struct snd_kcontrol_new stac927x_mixer[] = {
47744f63 532 STAC_DIGITAL_INPUT_SOURCE(1),
9e05b7a3 533 STAC_INPUT_SOURCE(3),
5f10c4a9 534 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB),
3cc08dc6 535
9e05b7a3
ML		 536 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
537 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
538 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
539
540 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
541 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
542 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
543
544 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
545 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
546 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 547 { } /* end */
548};
549
2f2f4251
M		 550static int stac92xx_build_controls(struct hda_codec *codec)
551{
552 struct sigmatel_spec *spec = codec->spec;
553 int err;
c7d4b2fa 554 int i;
2f2f4251
M		 555
556 err = snd_hda_add_new_ctls(codec, spec->mixer);
557 if (err < 0)
558 return err;
c7d4b2fa
M		 559
560 for (i = 0; i < spec->num_mixers; i++) {
561 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
562 if (err < 0)
563 return err;
564 }
565
dabbed6f
M		 566 if (spec->multiout.dig_out_nid) {
567 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
568 if (err < 0)
569 return err;
570 }
571 if (spec->dig_in_nid) {
572 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
573 if (err < 0)
574 return err;
575 }
576 return 0;
2f2f4251
M		 577}
578
403d1944 579static unsigned int ref9200_pin_configs[8] = {
dabbed6f 580 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 581 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
582};
583
dfe495d0
TI		 584/*
585 STAC 9200 pin configs for
586 102801A8
587 102801DE
588 102801E8
589*/
590static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 591 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
592 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 593};
594
595/*
596 STAC 9200 pin configs for
597 102801C0
598 102801C1
599*/
600static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 601 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
602 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 603};
604
605/*
606 STAC 9200 pin configs for
607 102801C4 (Dell Dimension E310)
608 102801C5
609 102801C7
610 102801D9
611 102801DA
612 102801E3
613*/
614static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 615 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
616 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 617};
618
619
620/*
621 STAC 9200-32 pin configs for
622 102801B5 (Dell Inspiron 630m)
623 102801D8 (Dell Inspiron 640m)
624*/
625static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 626 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
627 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 628};
629
630/*
631 STAC 9200-32 pin configs for
632 102801C2 (Dell Latitude D620)
633 102801C8
634 102801CC (Dell Latitude D820)
635 102801D4
636 102801D6
637*/
638static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 639 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
640 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 641};
642
643/*
644 STAC 9200-32 pin configs for
645 102801CE (Dell XPS M1710)
646 102801CF (Dell Precision M90)
647*/
648static unsigned int dell9200_m23_pin_configs[8] = {
649 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
650 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
651};
652
653/*
654 STAC 9200-32 pin configs for
655 102801C9
656 102801CA
657 102801CB (Dell Latitude 120L)
658 102801D3
659*/
660static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 661 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
662 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 663};
664
665/*
666 STAC 9200-32 pin configs for
667 102801BD (Dell Inspiron E1505n)
668 102801EE
669 102801EF
670*/
671static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 672 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
673 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 674};
675
676/*
677 STAC 9200-32 pin configs for
678 102801F5 (Dell Inspiron 1501)
679 102801F6
680*/
681static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 682 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
683 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 684};
685
686/*
687 STAC 9200-32
688 102801CD (Dell Inspiron E1705/9400)
689*/
690static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 691 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
692 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 693};
694
695
f5fcc13c
TI		 696static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
697 [STAC_REF] = ref9200_pin_configs,
dfe495d0
TI		 698 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
699 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
700 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
701 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
702 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
703 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
704 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
705 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
706 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
707 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 708};
709
f5fcc13c
TI		 710static const char *stac9200_models[STAC_9200_MODELS] = {
711 [STAC_REF] = "ref",
dfe495d0
TI		 712 [STAC_9200_DELL_D21] = "dell-d21",
713 [STAC_9200_DELL_D22] = "dell-d22",
714 [STAC_9200_DELL_D23] = "dell-d23",
715 [STAC_9200_DELL_M21] = "dell-m21",
716 [STAC_9200_DELL_M22] = "dell-m22",
717 [STAC_9200_DELL_M23] = "dell-m23",
718 [STAC_9200_DELL_M24] = "dell-m24",
719 [STAC_9200_DELL_M25] = "dell-m25",
720 [STAC_9200_DELL_M26] = "dell-m26",
721 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 722 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 723};
724
725static struct snd_pci_quirk stac9200_cfg_tbl[] = {
726 /* SigmaTel reference board */
727 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
728 "DFI LanParty", STAC_REF),
e7377071 729 /* Dell laptops have BIOS problem */
dfe495d0
TI		 730 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
731 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 732 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 733 "Dell Inspiron 630m", STAC_9200_DELL_M21),
734 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
735 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
736 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
737 "unknown Dell", STAC_9200_DELL_D22),
738 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
739 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 740 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 741 "Dell Latitude D620", STAC_9200_DELL_M22),
742 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
743 "unknown Dell", STAC_9200_DELL_D23),
744 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
745 "unknown Dell", STAC_9200_DELL_D23),
746 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
747 "unknown Dell", STAC_9200_DELL_M22),
748 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
749 "unknown Dell", STAC_9200_DELL_M24),
750 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
751 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 752 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 753 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 754 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 755 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 756 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 757 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 758 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 759 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 760 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 761 "Dell Precision M90", STAC_9200_DELL_M23),
762 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
763 "unknown Dell", STAC_9200_DELL_M22),
764 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
765 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 766 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 767 "unknown Dell", STAC_9200_DELL_M22),
49c605db 768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 769 "Dell Inspiron 640m", STAC_9200_DELL_M21),
770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
771 "unknown Dell", STAC_9200_DELL_D23),
772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
773 "unknown Dell", STAC_9200_DELL_D23),
774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
775 "unknown Dell", STAC_9200_DELL_D21),
776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
777 "unknown Dell", STAC_9200_DELL_D23),
778 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
779 "unknown Dell", STAC_9200_DELL_D21),
780 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
781 "unknown Dell", STAC_9200_DELL_M25),
782 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
783 "unknown Dell", STAC_9200_DELL_M25),
49c605db 784 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 785 "Dell Inspiron 1501", STAC_9200_DELL_M26),
786 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
787 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 788 /* Panasonic */
789 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 790 /* Gateway machines needs EAPD to be set on resume */
791 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
792 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
793 STAC_9200_GATEWAY),
794 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
795 STAC_9200_GATEWAY),
403d1944
MP		 796 {} /* terminator */
797};
798
8e21c34c
TD		 799static unsigned int ref925x_pin_configs[8] = {
800 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
801 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
802};
803
804static unsigned int stac925x_MA6_pin_configs[8] = {
805 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
806 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
807};
808
2c11f955
TD		 809static unsigned int stac925x_PA6_pin_configs[8] = {
810 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
811 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
812};
813
8e21c34c 814static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 815 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
816 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 817};
818
819static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
820 [STAC_REF] = ref925x_pin_configs,
821 [STAC_M2_2] = stac925xM2_2_pin_configs,
822 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 823 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 824};
825
826static const char *stac925x_models[STAC_925x_MODELS] = {
827 [STAC_REF] = "ref",
828 [STAC_M2_2] = "m2-2",
829 [STAC_MA6] = "m6",
2c11f955 830 [STAC_PA6] = "pa6",
8e21c34c
TD		 831};
832
833static struct snd_pci_quirk stac925x_cfg_tbl[] = {
834 /* SigmaTel reference board */
835 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 836 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 837 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
838 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
839 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 840 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 841 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
842 {} /* terminator */
843};
844
e035b841
MR		 845static unsigned int ref92hd71bxx_pin_configs[10] = {
846 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
847 0x0181302e, 0x01114010, 0x01a19020, 0x90a000f0,
848 0x90a000f0, 0x01452050,
849};
850
851static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
852 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
853};
854
855static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
856 [STAC_92HD71BXX_REF] = "ref",
857};
858
859static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
860 /* SigmaTel reference board */
861 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
862 "DFI LanParty", STAC_92HD71BXX_REF),
863 {} /* terminator */
864};
865
403d1944
MP		 866static unsigned int ref922x_pin_configs[10] = {
867 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
868 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 869 0x40000100, 0x40000100,
870};
871
dfe495d0
TI		 872/*
873 STAC 922X pin configs for
874 102801A7
875 102801AB
876 102801A9
877 102801D1
878 102801D2
879*/
880static unsigned int dell_922x_d81_pin_configs[10] = {
881 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
882 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
883 0x01813122, 0x400001f2,
884};
885
886/*
887 STAC 922X pin configs for
888 102801AC
889 102801D0
890*/
891static unsigned int dell_922x_d82_pin_configs[10] = {
892 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
893 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
894 0x01813122, 0x400001f1,
895};
896
897/*
898 STAC 922X pin configs for
899 102801BF
900*/
901static unsigned int dell_922x_m81_pin_configs[10] = {
902 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
903 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
904 0x40C003f1, 0x405003f0,
905};
906
907/*
908 STAC 9221 A1 pin configs for
909 102801D7 (Dell XPS M1210)
910*/
911static unsigned int dell_922x_m82_pin_configs[10] = {
912 0x0221121f, 0x408103ff, 0x02111212, 0x90100310,
913 0x408003f1, 0x02111211, 0x03451340, 0x40c003f2,
914 0x508003f3, 0x405003f4,
915};
916
403d1944 917static unsigned int d945gtp3_pin_configs[10] = {
869264c4 918 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 919 0x40000100, 0x40000100, 0x40000100, 0x40000100,
920 0x02a19120, 0x40000100,
921};
922
923static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 924 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
925 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 926 0x02a19320, 0x40000100,
927};
928
5d5d3bc3
IZ		 929static unsigned int intel_mac_v1_pin_configs[10] = {
930 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
931 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
932 0x400000fc, 0x400000fb,
933};
934
935static unsigned int intel_mac_v2_pin_configs[10] = {
936 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
937 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
938 0x400000fc, 0x400000fb,
6f0778d8
NB		 939};
940
5d5d3bc3
IZ		 941static unsigned int intel_mac_v3_pin_configs[10] = {
942 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
943 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 944 0x400000fc, 0x400000fb,
945};
946
5d5d3bc3
IZ		 947static unsigned int intel_mac_v4_pin_configs[10] = {
948 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
949 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 950 0x400000fc, 0x400000fb,
951};
952
5d5d3bc3
IZ		 953static unsigned int intel_mac_v5_pin_configs[10] = {
954 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
955 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
956 0x400000fc, 0x400000fb,
0dae0f83
TI		 957};
958
76c08828 959
19039bd0 960static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 961 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 962 [STAC_D945GTP3] = d945gtp3_pin_configs,
963 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 964 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
965 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
966 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
967 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
968 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 969 /* for backward compatibility */
5d5d3bc3
IZ		 970 [STAC_MACMINI] = intel_mac_v3_pin_configs,
971 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
972 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
973 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
974 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
975 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 976 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
977 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
978 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
979 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 980};
981
f5fcc13c
TI		 982static const char *stac922x_models[STAC_922X_MODELS] = {
983 [STAC_D945_REF] = "ref",
984 [STAC_D945GTP5] = "5stack",
985 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 986 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
987 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
988 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
989 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
990 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 991 /* for backward compatibility */
f5fcc13c 992 [STAC_MACMINI] = "macmini",
3fc24d85 993 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 994 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
995 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 996 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 997 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 998 [STAC_922X_DELL_D81] = "dell-d81",
999 [STAC_922X_DELL_D82] = "dell-d82",
1000 [STAC_922X_DELL_M81] = "dell-m81",
1001 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1002};
1003
1004static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1005 /* SigmaTel reference board */
1006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1007 "DFI LanParty", STAC_D945_REF),
1008 /* Intel 945G based systems */
1009 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1010 "Intel D945G", STAC_D945GTP3),
1011 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1012 "Intel D945G", STAC_D945GTP3),
1013 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1014 "Intel D945G", STAC_D945GTP3),
1015 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1016 "Intel D945G", STAC_D945GTP3),
1017 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1018 "Intel D945G", STAC_D945GTP3),
1019 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1020 "Intel D945G", STAC_D945GTP3),
1021 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1022 "Intel D945G", STAC_D945GTP3),
1023 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1024 "Intel D945G", STAC_D945GTP3),
1025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1026 "Intel D945G", STAC_D945GTP3),
1027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1028 "Intel D945G", STAC_D945GTP3),
1029 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1030 "Intel D945G", STAC_D945GTP3),
1031 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1032 "Intel D945G", STAC_D945GTP3),
1033 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1034 "Intel D945G", STAC_D945GTP3),
1035 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1036 "Intel D945G", STAC_D945GTP3),
1037 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1038 "Intel D945G", STAC_D945GTP3),
1039 /* Intel D945G 5-stack systems */
1040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1041 "Intel D945G", STAC_D945GTP5),
1042 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1043 "Intel D945G", STAC_D945GTP5),
1044 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1045 "Intel D945G", STAC_D945GTP5),
1046 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1047 "Intel D945G", STAC_D945GTP5),
1048 /* Intel 945P based systems */
1049 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1050 "Intel D945P", STAC_D945GTP3),
1051 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1052 "Intel D945P", STAC_D945GTP3),
1053 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1054 "Intel D945P", STAC_D945GTP3),
1055 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1056 "Intel D945P", STAC_D945GTP3),
1057 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1058 "Intel D945P", STAC_D945GTP3),
1059 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1060 "Intel D945P", STAC_D945GTP5),
1061 /* other systems */
1062 /* Apple Mac Mini (early 2006) */
1063 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1064 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1065 /* Dell systems */
1066 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1067 "unknown Dell", STAC_922X_DELL_D81),
1068 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1069 "unknown Dell", STAC_922X_DELL_D81),
1070 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1071 "unknown Dell", STAC_922X_DELL_D81),
1072 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1073 "unknown Dell", STAC_922X_DELL_D82),
1074 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1075 "unknown Dell", STAC_922X_DELL_M81),
1076 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1077 "unknown Dell", STAC_922X_DELL_D82),
1078 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1079 "unknown Dell", STAC_922X_DELL_D81),
1080 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1081 "unknown Dell", STAC_922X_DELL_D81),
1082 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1083 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1084 {} /* terminator */
1085};
1086
3cc08dc6 1087static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1088 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1089 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1090 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1091 0x01c42190, 0x40000100,
3cc08dc6
MP		 1092};
1093
93ed1503 1094static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1095 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1096 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1097 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1098 0x40000100, 0x40000100
1099};
1100
93ed1503
TD		 1101static unsigned int d965_5st_pin_configs[14] = {
1102 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1103 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1104 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1105 0x40000100, 0x40000100
1106};
1107
4ff076e5
TD		 1108static unsigned int dell_3st_pin_configs[14] = {
1109 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1110 0x01111212, 0x01116211, 0x01813050, 0x01112214,
1111 0x403003fa, 0x40000100, 0x40000100, 0x404003fb,
1112 0x40c003fc, 0x40000100
1113};
1114
93ed1503 1115static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
f5fcc13c 1116 [STAC_D965_REF] = ref927x_pin_configs,
93ed1503
TD		 1117 [STAC_D965_3ST] = d965_3st_pin_configs,
1118 [STAC_D965_5ST] = d965_5st_pin_configs,
4ff076e5 1119 [STAC_DELL_3ST] = dell_3st_pin_configs,
3cc08dc6
MP		 1120};
1121
f5fcc13c
TI		 1122static const char *stac927x_models[STAC_927X_MODELS] = {
1123 [STAC_D965_REF] = "ref",
1124 [STAC_D965_3ST] = "3stack",
1125 [STAC_D965_5ST] = "5stack",
4ff076e5 1126 [STAC_DELL_3ST] = "dell-3stack",
f5fcc13c
TI		 1127};
1128
1129static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1130 /* SigmaTel reference board */
1131 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1132 "DFI LanParty", STAC_D965_REF),
81d3dbde 1133 /* Intel 946 based systems */
f5fcc13c
TI		 1134 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1135 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1136 /* 965 based 3 stack systems */
f5fcc13c
TI		 1137 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1138 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1139 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1140 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1141 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1142 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1143 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1144 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1145 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1146 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1147 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1148 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1149 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1150 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1151 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1152 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
5e915bb3 1153 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_D965_3ST),
4ff076e5 1154 /* Dell 3 stack systems */
dfe495d0 1155 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1156 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1157 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
93ed1503 1158 /* 965 based 5 stack systems */
5e915bb3 1159 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_D965_5ST),
f5fcc13c
TI		 1160 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1161 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1163 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1164 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1165 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1166 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1167 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1168 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1169 {} /* terminator */
1170};
1171
f3302a59
MP		 1172static unsigned int ref9205_pin_configs[12] = {
1173 0x40000100, 0x40000100, 0x01016011, 0x01014010,
8b65727b
MP		 1174 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
1175 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1176};
1177
dfe495d0
TI		 1178/*
1179 STAC 9205 pin configs for
1180 102801F1
1181 102801F2
1182 102801FC
1183 102801FD
1184 10280204
1185 1028021F
1186*/
1187static unsigned int dell_9205_m42_pin_configs[12] = {
1188 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1189 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1190 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1191};
1192
1193/*
1194 STAC 9205 pin configs for
1195 102801F9
1196 102801FA
1197 102801FE
1198 102801FF (Dell Precision M4300)
1199 10280206
1200 10280200
1201 10280201
1202*/
1203static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1204 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1205 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1206 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1207};
1208
dfe495d0 1209static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1210 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1211 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1212 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1213};
1214
f5fcc13c 1215static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1216 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1217 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1218 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1219 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1220};
1221
f5fcc13c
TI		 1222static const char *stac9205_models[STAC_9205_MODELS] = {
1223 [STAC_9205_REF] = "ref",
dfe495d0 1224 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1225 [STAC_9205_DELL_M43] = "dell-m43",
1226 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1227};
1228
1229static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1230 /* SigmaTel reference board */
1231 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1232 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1233 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1234 "unknown Dell", STAC_9205_DELL_M42),
1235 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1236 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1237 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1238 "Dell Precision", STAC_9205_DELL_M43),
1239 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1240 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1241 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1242 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1243 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1244 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1245 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1246 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1247 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1248 "unknown Dell", STAC_9205_DELL_M42),
1249 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1250 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1251 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1252 "Dell Precision", STAC_9205_DELL_M43),
1253 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1254 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1255 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1256 "Dell Precision", STAC_9205_DELL_M43),
1257 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1258 "Dell Inspiron", STAC_9205_DELL_M44),
1259 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1260 "Dell Inspiron", STAC_9205_DELL_M44),
1261 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1262 "Dell Inspiron", STAC_9205_DELL_M44),
1263 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1264 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1265 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1266 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1267 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1268 "Dell Inspiron", STAC_9205_DELL_M44),
f3302a59
MP		 1269 {} /* terminator */
1270};
1271
11b44bbd
RF		 1272static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1273{
1274 int i;
1275 struct sigmatel_spec *spec = codec->spec;
1276
1277 if (! spec->bios_pin_configs) {
1278 spec->bios_pin_configs = kcalloc(spec->num_pins,
1279 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1280 if (! spec->bios_pin_configs)
1281 return -ENOMEM;
1282 }
1283
1284 for (i = 0; i < spec->num_pins; i++) {
1285 hda_nid_t nid = spec->pin_nids[i];
1286 unsigned int pin_cfg;
1287
1288 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1289 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1290 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1291 nid, pin_cfg);
1292 spec->bios_pin_configs[i] = pin_cfg;
1293 }
1294
1295 return 0;
1296}
1297
87d48363
MR		 1298static void stac92xx_set_config_reg(struct hda_codec *codec,
1299 hda_nid_t pin_nid, unsigned int pin_config)
1300{
1301 int i;
1302 snd_hda_codec_write(codec, pin_nid, 0,
1303 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1304 pin_config & 0x000000ff);
1305 snd_hda_codec_write(codec, pin_nid, 0,
1306 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1307 (pin_config & 0x0000ff00) >> 8);
1308 snd_hda_codec_write(codec, pin_nid, 0,
1309 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1310 (pin_config & 0x00ff0000) >> 16);
1311 snd_hda_codec_write(codec, pin_nid, 0,
1312 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1313 pin_config >> 24);
1314 i = snd_hda_codec_read(codec, pin_nid, 0,
1315 AC_VERB_GET_CONFIG_DEFAULT,
1316 0x00);
1317 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1318 pin_nid, i);
1319}
1320
2f2f4251
M		 1321static void stac92xx_set_config_regs(struct hda_codec *codec)
1322{
1323 int i;
1324 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1325
87d48363
MR		 1326 if (!spec->pin_configs)
1327 return;
11b44bbd 1328
87d48363
MR		 1329 for (i = 0; i < spec->num_pins; i++)
1330 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1331 spec->pin_configs[i]);
2f2f4251 1332}
2f2f4251 1333
8259980e 1334static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
92a22beb 1335{
8259980e 1336 struct sigmatel_spec *spec = codec->spec;
87d48363 1337 /* Configure GPIOx as output */
82beb8fd
TI		 1338 snd_hda_codec_write_cache(codec, codec->afg, 0,
1339 AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
87d48363 1340 /* Configure GPIOx as CMOS */
82beb8fd 1341 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
87d48363 1342 /* Assert GPIOx */
82beb8fd
TI		 1343 snd_hda_codec_write_cache(codec, codec->afg, 0,
1344 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
87d48363 1345 /* Enable GPIOx */
82beb8fd
TI		 1346 snd_hda_codec_write_cache(codec, codec->afg, 0,
1347 AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
92a22beb
MR		 1348}
1349
dabbed6f 1350/*
c7d4b2fa 1351 * Analog playback callbacks
dabbed6f 1352 */
c7d4b2fa
M		 1353static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1354 struct hda_codec *codec,
c8b6bf9b 1355 struct snd_pcm_substream *substream)
2f2f4251 1356{
dabbed6f 1357 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1358 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1359}
1360
2f2f4251
M		 1361static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1362 struct hda_codec *codec,
1363 unsigned int stream_tag,
1364 unsigned int format,
c8b6bf9b 1365 struct snd_pcm_substream *substream)
2f2f4251
M		 1366{
1367 struct sigmatel_spec *spec = codec->spec;
403d1944 1368 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1369}
1370
1371static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1372 struct hda_codec *codec,
c8b6bf9b 1373 struct snd_pcm_substream *substream)
2f2f4251
M		 1374{
1375 struct sigmatel_spec *spec = codec->spec;
1376 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1377}
1378
dabbed6f
M		 1379/*
1380 * Digital playback callbacks
1381 */
1382static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1383 struct hda_codec *codec,
c8b6bf9b 1384 struct snd_pcm_substream *substream)
dabbed6f
M		 1385{
1386 struct sigmatel_spec *spec = codec->spec;
1387 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1388}
1389
1390static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1391 struct hda_codec *codec,
c8b6bf9b 1392 struct snd_pcm_substream *substream)
dabbed6f
M		 1393{
1394 struct sigmatel_spec *spec = codec->spec;
1395 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1396}
1397
6b97eb45
TI		 1398static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1399 struct hda_codec *codec,
1400 unsigned int stream_tag,
1401 unsigned int format,
1402 struct snd_pcm_substream *substream)
1403{
1404 struct sigmatel_spec *spec = codec->spec;
1405 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1406 stream_tag, format, substream);
1407}
1408
dabbed6f 1409
2f2f4251
M		 1410/*
1411 * Analog capture callbacks
1412 */
1413static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1414 struct hda_codec *codec,
1415 unsigned int stream_tag,
1416 unsigned int format,
c8b6bf9b 1417 struct snd_pcm_substream *substream)
2f2f4251
M		 1418{
1419 struct sigmatel_spec *spec = codec->spec;
1420
1421 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1422 stream_tag, 0, format);
1423 return 0;
1424}
1425
1426static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1427 struct hda_codec *codec,
c8b6bf9b 1428 struct snd_pcm_substream *substream)
2f2f4251
M		 1429{
1430 struct sigmatel_spec *spec = codec->spec;
1431
1432 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1433 return 0;
1434}
1435
dabbed6f
M		 1436static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1437 .substreams = 1,
1438 .channels_min = 2,
1439 .channels_max = 2,
1440 /* NID is set in stac92xx_build_pcms */
1441 .ops = {
1442 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1443 .close = stac92xx_dig_playback_pcm_close,
1444 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1445 },
1446};
1447
1448static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1449 .substreams = 1,
1450 .channels_min = 2,
1451 .channels_max = 2,
1452 /* NID is set in stac92xx_build_pcms */
1453};
1454
2f2f4251
M		 1455static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1456 .substreams = 1,
1457 .channels_min = 2,
c7d4b2fa 1458 .channels_max = 8,
2f2f4251
M		 1459 .nid = 0x02, /* NID to query formats and rates */
1460 .ops = {
1461 .open = stac92xx_playback_pcm_open,
1462 .prepare = stac92xx_playback_pcm_prepare,
1463 .cleanup = stac92xx_playback_pcm_cleanup
1464 },
1465};
1466
3cc08dc6
MP		 1467static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1468 .substreams = 1,
1469 .channels_min = 2,
1470 .channels_max = 2,
1471 .nid = 0x06, /* NID to query formats and rates */
1472 .ops = {
1473 .open = stac92xx_playback_pcm_open,
1474 .prepare = stac92xx_playback_pcm_prepare,
1475 .cleanup = stac92xx_playback_pcm_cleanup
1476 },
1477};
1478
2f2f4251 1479static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1480 .channels_min = 2,
1481 .channels_max = 2,
9e05b7a3 1482 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1483 .ops = {
1484 .prepare = stac92xx_capture_pcm_prepare,
1485 .cleanup = stac92xx_capture_pcm_cleanup
1486 },
1487};
1488
1489static int stac92xx_build_pcms(struct hda_codec *codec)
1490{
1491 struct sigmatel_spec *spec = codec->spec;
1492 struct hda_pcm *info = spec->pcm_rec;
1493
1494 codec->num_pcms = 1;
1495 codec->pcm_info = info;
1496
c7d4b2fa 1497 info->name = "STAC92xx Analog";
2f2f4251 1498 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1499 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1500 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1501 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1502
1503 if (spec->alt_switch) {
1504 codec->num_pcms++;
1505 info++;
1506 info->name = "STAC92xx Analog Alt";
1507 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1508 }
2f2f4251 1509
dabbed6f
M		 1510 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1511 codec->num_pcms++;
1512 info++;
1513 info->name = "STAC92xx Digital";
1514 if (spec->multiout.dig_out_nid) {
1515 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1516 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1517 }
1518 if (spec->dig_in_nid) {
1519 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1520 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1521 }
1522 }
1523
2f2f4251
M		 1524 return 0;
1525}
1526
c960a03b
TI		 1527static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1528{
1529 unsigned int pincap = snd_hda_param_read(codec, nid,
1530 AC_PAR_PIN_CAP);
1531 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1532 if (pincap & AC_PINCAP_VREF_100)
1533 return AC_PINCTL_VREF_100;
1534 if (pincap & AC_PINCAP_VREF_80)
1535 return AC_PINCTL_VREF_80;
1536 if (pincap & AC_PINCAP_VREF_50)
1537 return AC_PINCTL_VREF_50;
1538 if (pincap & AC_PINCAP_VREF_GRD)
1539 return AC_PINCTL_VREF_GRD;
1540 return 0;
1541}
1542
403d1944
MP		 1543static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1544
1545{
82beb8fd
TI		 1546 snd_hda_codec_write_cache(codec, nid, 0,
1547 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1548}
1549
a5ce8890 1550#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1551
1552static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1553{
1554 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1555 struct sigmatel_spec *spec = codec->spec;
1556 int io_idx = kcontrol-> private_value & 0xff;
1557
1558 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1559 return 0;
1560}
1561
1562static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1563{
1564 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1565 struct sigmatel_spec *spec = codec->spec;
1566 hda_nid_t nid = kcontrol->private_value >> 8;
1567 int io_idx = kcontrol-> private_value & 0xff;
1568 unsigned short val = ucontrol->value.integer.value[0];
1569
1570 spec->io_switch[io_idx] = val;
1571
1572 if (val)
1573 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1574 else {
1575 unsigned int pinctl = AC_PINCTL_IN_EN;
1576 if (io_idx) /* set VREF for mic */
1577 pinctl |= stac92xx_get_vref(codec, nid);
1578 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1579 }
403d1944
MP		 1580 return 1;
1581}
1582
0fb87bb4
ML		 1583#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
1584
1585static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
1586 struct snd_ctl_elem_value *ucontrol)
1587{
1588 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1589 struct sigmatel_spec *spec = codec->spec;
1590
1591 ucontrol->value.integer.value[0] = spec->clfe_swap;
1592 return 0;
1593}
1594
1595static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
1596 struct snd_ctl_elem_value *ucontrol)
1597{
1598 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1599 struct sigmatel_spec *spec = codec->spec;
1600 hda_nid_t nid = kcontrol->private_value & 0xff;
1601
1602 if (spec->clfe_swap == ucontrol->value.integer.value[0])
1603 return 0;
1604
1605 spec->clfe_swap = ucontrol->value.integer.value[0];
1606
1607 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
1608 spec->clfe_swap ? 0x4 : 0x0);
1609
1610 return 1;
1611}
1612
403d1944
MP		 1613#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1614 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1615 .name = xname, \
1616 .index = 0, \
1617 .info = stac92xx_io_switch_info, \
1618 .get = stac92xx_io_switch_get, \
1619 .put = stac92xx_io_switch_put, \
1620 .private_value = xpval, \
1621 }
1622
0fb87bb4
ML		 1623#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
1624 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1625 .name = xname, \
1626 .index = 0, \
1627 .info = stac92xx_clfe_switch_info, \
1628 .get = stac92xx_clfe_switch_get, \
1629 .put = stac92xx_clfe_switch_put, \
1630 .private_value = xpval, \
1631 }
403d1944 1632
c7d4b2fa
M		 1633enum {
1634 STAC_CTL_WIDGET_VOL,
1635 STAC_CTL_WIDGET_MUTE,
403d1944 1636 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 1637 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 1638};
1639
c8b6bf9b 1640static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 1641 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
1642 HDA_CODEC_MUTE(NULL, 0, 0, 0),
403d1944 1643 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 1644 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 1645};
1646
1647/* add dynamic controls */
1648static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
1649{
c8b6bf9b 1650 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 1651
1652 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
1653 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
1654
1655 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
1656 if (! knew)
1657 return -ENOMEM;
1658 if (spec->kctl_alloc) {
1659 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
1660 kfree(spec->kctl_alloc);
1661 }
1662 spec->kctl_alloc = knew;
1663 spec->num_kctl_alloc = num;
1664 }
1665
1666 knew = &spec->kctl_alloc[spec->num_kctl_used];
1667 *knew = stac92xx_control_templates[type];
82fe0c58 1668 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 1669 if (! knew->name)
1670 return -ENOMEM;
1671 knew->private_value = val;
1672 spec->num_kctl_used++;
1673 return 0;
1674}
1675
403d1944
MP		 1676/* flag inputs as additional dynamic lineouts */
1677static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
1678{
1679 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1680 unsigned int wcaps, wtype;
1681 int i, num_dacs = 0;
1682
1683 /* use the wcaps cache to count all DACs available for line-outs */
1684 for (i = 0; i < codec->num_nodes; i++) {
1685 wcaps = codec->wcaps[i];
1686 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1687 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
1688 num_dacs++;
1689 }
403d1944 1690
7b043899
SL		 1691 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
1692
403d1944
MP		 1693 switch (cfg->line_outs) {
1694 case 3:
1695 /* add line-in as side */
7b043899 1696 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 1697 cfg->line_out_pins[cfg->line_outs] =
1698 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1699 spec->line_switch = 1;
1700 cfg->line_outs++;
1701 }
1702 break;
1703 case 2:
1704 /* add line-in as clfe and mic as side */
7b043899 1705 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 1706 cfg->line_out_pins[cfg->line_outs] =
1707 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1708 spec->line_switch = 1;
1709 cfg->line_outs++;
1710 }
7b043899 1711 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 1712 cfg->line_out_pins[cfg->line_outs] =
1713 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 1714 spec->mic_switch = 1;
1715 cfg->line_outs++;
1716 }
1717 break;
1718 case 1:
1719 /* add line-in as surr and mic as clfe */
7b043899 1720 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 1721 cfg->line_out_pins[cfg->line_outs] =
1722 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1723 spec->line_switch = 1;
1724 cfg->line_outs++;
1725 }
7b043899 1726 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 1727 cfg->line_out_pins[cfg->line_outs] =
1728 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 1729 spec->mic_switch = 1;
1730 cfg->line_outs++;
1731 }
1732 break;
1733 }
1734
1735 return 0;
1736}
1737
7b043899
SL		 1738
1739static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
1740{
1741 int i;
1742
1743 for (i = 0; i < spec->multiout.num_dacs; i++) {
1744 if (spec->multiout.dac_nids[i] == nid)
1745 return 1;
1746 }
1747
1748 return 0;
1749}
1750
3cc08dc6 1751/*
7b043899
SL		 1752 * Fill in the dac_nids table from the parsed pin configuration
1753 * This function only works when every pin in line_out_pins[]
1754 * contains atleast one DAC in its connection list. Some 92xx
1755 * codecs are not connected directly to a DAC, such as the 9200
1756 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 1757 */
19039bd0 1758static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 1759 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 1760{
1761 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1762 int i, j, conn_len = 0;
1763 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
1764 unsigned int wcaps, wtype;
1765
c7d4b2fa
M		 1766 for (i = 0; i < cfg->line_outs; i++) {
1767 nid = cfg->line_out_pins[i];
7b043899
SL		 1768 conn_len = snd_hda_get_connections(codec, nid, conn,
1769 HDA_MAX_CONNECTIONS);
1770 for (j = 0; j < conn_len; j++) {
1771 wcaps = snd_hda_param_read(codec, conn[j],
1772 AC_PAR_AUDIO_WIDGET_CAP);
1773 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1774
1775 if (wtype != AC_WID_AUD_OUT ||
1776 (wcaps & AC_WCAP_DIGITAL))
1777 continue;
1778 /* conn[j] is a DAC routed to this line-out */
1779 if (!is_in_dac_nids(spec, conn[j]))
1780 break;
1781 }
1782
1783 if (j == conn_len) {
df802952
TI		 1784 if (spec->multiout.num_dacs > 0) {
1785 /* we have already working output pins,
1786 * so let's drop the broken ones again
1787 */
1788 cfg->line_outs = spec->multiout.num_dacs;
1789 break;
1790 }
7b043899
SL		 1791 /* error out, no available DAC found */
1792 snd_printk(KERN_ERR
1793 "%s: No available DAC for pin 0x%x\n",
1794 __func__, nid);
1795 return -ENODEV;
1796 }
1797
1798 spec->multiout.dac_nids[i] = conn[j];
1799 spec->multiout.num_dacs++;
1800 if (conn_len > 1) {
1801 /* select this DAC in the pin's input mux */
82beb8fd
TI		 1802 snd_hda_codec_write_cache(codec, nid, 0,
1803 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 1804
7b043899
SL		 1805 }
1806 }
c7d4b2fa 1807
7b043899
SL		 1808 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
1809 spec->multiout.num_dacs,
1810 spec->multiout.dac_nids[0],
1811 spec->multiout.dac_nids[1],
1812 spec->multiout.dac_nids[2],
1813 spec->multiout.dac_nids[3],
1814 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 1815 return 0;
1816}
1817
eb06ed8f
TI		 1818/* create volume control/switch for the given prefx type */
1819static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
1820{
1821 char name[32];
1822 int err;
1823
1824 sprintf(name, "%s Playback Volume", pfx);
1825 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
1826 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1827 if (err < 0)
1828 return err;
1829 sprintf(name, "%s Playback Switch", pfx);
1830 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
1831 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1832 if (err < 0)
1833 return err;
1834 return 0;
1835}
1836
c7d4b2fa 1837/* add playback controls from the parsed DAC table */
0fb87bb4 1838static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 1839 const struct auto_pin_cfg *cfg)
c7d4b2fa 1840{
19039bd0
TI		 1841 static const char *chname[4] = {
1842 "Front", "Surround", NULL /*CLFE*/, "Side"
1843 };
c7d4b2fa
M		 1844 hda_nid_t nid;
1845 int i, err;
1846
0fb87bb4
ML		 1847 struct sigmatel_spec *spec = codec->spec;
1848 unsigned int wid_caps;
1849
1850
c7d4b2fa 1851 for (i = 0; i < cfg->line_outs; i++) {
403d1944 1852 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 1853 continue;
1854
1855 nid = spec->multiout.dac_nids[i];
1856
1857 if (i == 2) {
1858 /* Center/LFE */
eb06ed8f
TI		 1859 err = create_controls(spec, "Center", nid, 1);
1860 if (err < 0)
c7d4b2fa 1861 return err;
eb06ed8f
TI		 1862 err = create_controls(spec, "LFE", nid, 2);
1863 if (err < 0)
c7d4b2fa 1864 return err;
0fb87bb4
ML		 1865
1866 wid_caps = get_wcaps(codec, nid);
1867
1868 if (wid_caps & AC_WCAP_LR_SWAP) {
1869 err = stac92xx_add_control(spec,
1870 STAC_CTL_WIDGET_CLFE_SWITCH,
1871 "Swap Center/LFE Playback Switch", nid);
1872
1873 if (err < 0)
1874 return err;
1875 }
1876
c7d4b2fa 1877 } else {
eb06ed8f
TI		 1878 err = create_controls(spec, chname[i], nid, 3);
1879 if (err < 0)
c7d4b2fa
M		 1880 return err;
1881 }
1882 }
1883
403d1944
MP		 1884 if (spec->line_switch)
1885 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
1886 return err;
1887
1888 if (spec->mic_switch)
1889 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
1890 return err;
1891
c7d4b2fa
M		 1892 return 0;
1893}
1894
eb06ed8f 1895static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 1896{
7b043899
SL		 1897 if (is_in_dac_nids(spec, nid))
1898 return 1;
eb06ed8f
TI		 1899 if (spec->multiout.hp_nid == nid)
1900 return 1;
1901 return 0;
1902}
c7d4b2fa 1903
eb06ed8f
TI		 1904static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
1905{
1906 if (!spec->multiout.hp_nid)
1907 spec->multiout.hp_nid = nid;
1908 else if (spec->multiout.num_dacs > 4) {
1909 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
1910 return 1;
1911 } else {
1912 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
1913 spec->multiout.num_dacs++;
1914 }
1915 return 0;
1916}
4e55096e 1917
eb06ed8f
TI		 1918/* add playback controls for Speaker and HP outputs */
1919static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
1920 struct auto_pin_cfg *cfg)
1921{
1922 struct sigmatel_spec *spec = codec->spec;
1923 hda_nid_t nid;
1924 int i, old_num_dacs, err;
1925
1926 old_num_dacs = spec->multiout.num_dacs;
1927 for (i = 0; i < cfg->hp_outs; i++) {
1928 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
1929 if (wid_caps & AC_WCAP_UNSOL_CAP)
1930 spec->hp_detect = 1;
1931 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
1932 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1933 if (check_in_dac_nids(spec, nid))
1934 nid = 0;
1935 if (! nid)
c7d4b2fa 1936 continue;
eb06ed8f
TI		 1937 add_spec_dacs(spec, nid);
1938 }
1939 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 1940 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 1941 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1942 if (check_in_dac_nids(spec, nid))
1943 nid = 0;
eb06ed8f
TI		 1944 if (! nid)
1945 continue;
1946 add_spec_dacs(spec, nid);
c7d4b2fa 1947 }
1b290a51
MR		 1948 for (i = 0; i < cfg->line_outs; i++) {
1949 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
1950 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1951 if (check_in_dac_nids(spec, nid))
1952 nid = 0;
1953 if (! nid)
1954 continue;
1955 add_spec_dacs(spec, nid);
1956 }
eb06ed8f
TI		 1957 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
1958 static const char *pfxs[] = {
1959 "Speaker", "External Speaker", "Speaker2",
1960 };
1961 err = create_controls(spec, pfxs[i - old_num_dacs],
1962 spec->multiout.dac_nids[i], 3);
1963 if (err < 0)
1964 return err;
1965 }
1966 if (spec->multiout.hp_nid) {
1967 const char *pfx;
6020c008 1968 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 1969 pfx = "Master";
1970 else
1971 pfx = "Headphone";
1972 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
1973 if (err < 0)
1974 return err;
1975 }
c7d4b2fa
M		 1976
1977 return 0;
1978}
1979
8b65727b 1980/* labels for dmic mux inputs */
ddc2cec4 1981static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 1982 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
1983 "Digital Mic 3", "Digital Mic 4"
1984};
1985
1986/* create playback/capture controls for input pins on dmic capable codecs */
1987static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
1988 const struct auto_pin_cfg *cfg)
1989{
1990 struct sigmatel_spec *spec = codec->spec;
1991 struct hda_input_mux *dimux = &spec->private_dimux;
1992 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1993 int i, j;
1994
1995 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
1996 dimux->items[dimux->num_items].index = 0;
1997 dimux->num_items++;
1998
1999 for (i = 0; i < spec->num_dmics; i++) {
2000 int index;
2001 int num_cons;
2002 unsigned int def_conf;
2003
2004 def_conf = snd_hda_codec_read(codec,
2005 spec->dmic_nids[i],
2006 0,
2007 AC_VERB_GET_CONFIG_DEFAULT,
2008 0);
2009 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2010 continue;
2011
2012 num_cons = snd_hda_get_connections(codec,
2013 spec->dmux_nid,
2014 con_lst,
2015 HDA_MAX_NUM_INPUTS);
2016 for (j = 0; j < num_cons; j++)
2017 if (con_lst[j] == spec->dmic_nids[i]) {
2018 index = j;
2019 goto found;
2020 }
2021 continue;
2022found:
2023 dimux->items[dimux->num_items].label =
2024 stac92xx_dmic_labels[dimux->num_items];
2025 dimux->items[dimux->num_items].index = index;
2026 dimux->num_items++;
2027 }
2028
2029 return 0;
2030}
2031
c7d4b2fa
M		 2032/* create playback/capture controls for input pins */
2033static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2034{
2035 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2036 struct hda_input_mux *imux = &spec->private_imux;
2037 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2038 int i, j, k;
2039
2040 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2041 int index;
2042
2043 if (!cfg->input_pins[i])
2044 continue;
2045 index = -1;
2046 for (j = 0; j < spec->num_muxes; j++) {
2047 int num_cons;
2048 num_cons = snd_hda_get_connections(codec,
2049 spec->mux_nids[j],
2050 con_lst,
2051 HDA_MAX_NUM_INPUTS);
2052 for (k = 0; k < num_cons; k++)
2053 if (con_lst[k] == cfg->input_pins[i]) {
2054 index = k;
2055 goto found;
2056 }
c7d4b2fa 2057 }
314634bc
TI		 2058 continue;
2059 found:
2060 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2061 imux->items[imux->num_items].index = index;
2062 imux->num_items++;
c7d4b2fa
M		 2063 }
2064
7b043899 2065 if (imux->num_items) {
62fe78e9
SR		 2066 /*
2067 * Set the current input for the muxes.
2068 * The STAC9221 has two input muxes with identical source
2069 * NID lists. Hopefully this won't get confused.
2070 */
2071 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2072 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2073 AC_VERB_SET_CONNECT_SEL,
2074 imux->items[0].index);
62fe78e9
SR		 2075 }
2076 }
2077
c7d4b2fa
M		 2078 return 0;
2079}
2080
c7d4b2fa
M		 2081static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2082{
2083 struct sigmatel_spec *spec = codec->spec;
2084 int i;
2085
2086 for (i = 0; i < spec->autocfg.line_outs; i++) {
2087 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2088 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2089 }
2090}
2091
2092static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2093{
2094 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2095 int i;
c7d4b2fa 2096
eb06ed8f
TI		 2097 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2098 hda_nid_t pin;
2099 pin = spec->autocfg.hp_pins[i];
2100 if (pin) /* connect to front */
2101 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2102 }
2103 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2104 hda_nid_t pin;
2105 pin = spec->autocfg.speaker_pins[i];
2106 if (pin) /* connect to front */
2107 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2108 }
c7d4b2fa
M		 2109}
2110
3cc08dc6 2111static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2112{
2113 struct sigmatel_spec *spec = codec->spec;
2114 int err;
2115
8b65727b
MP		 2116 if ((err = snd_hda_parse_pin_def_config(codec,
2117 &spec->autocfg,
2118 spec->dmic_nids)) < 0)
c7d4b2fa 2119 return err;
82bc955f 2120 if (! spec->autocfg.line_outs)
869264c4 2121 return 0; /* can't find valid pin config */
19039bd0 2122
403d1944
MP		 2123 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2124 return err;
19039bd0
TI		 2125 if (spec->multiout.num_dacs == 0)
2126 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2127 return err;
c7d4b2fa 2128
0fb87bb4
ML		 2129 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2130
2131 if (err < 0)
2132 return err;
2133
2134 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2135
2136 if (err < 0)
2137 return err;
2138
2139 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2140
2141 if (err < 0)
c7d4b2fa
M		 2142 return err;
2143
8b65727b
MP		 2144 if (spec->num_dmics > 0)
2145 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2146 &spec->autocfg)) < 0)
2147 return err;
2148
c7d4b2fa 2149 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2150 if (spec->multiout.max_channels > 2)
c7d4b2fa 2151 spec->surr_switch = 1;
c7d4b2fa 2152
82bc955f 2153 if (spec->autocfg.dig_out_pin)
3cc08dc6 2154 spec->multiout.dig_out_nid = dig_out;
82bc955f 2155 if (spec->autocfg.dig_in_pin)
3cc08dc6 2156 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2157
2158 if (spec->kctl_alloc)
2159 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2160
2161 spec->input_mux = &spec->private_imux;
8b65727b 2162 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2163
2164 return 1;
2165}
2166
82bc955f
TI		 2167/* add playback controls for HP output */
2168static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2169 struct auto_pin_cfg *cfg)
2170{
2171 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2172 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2173 unsigned int wid_caps;
2174
2175 if (! pin)
2176 return 0;
2177
2178 wid_caps = get_wcaps(codec, pin);
505cb341 2179 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2180 spec->hp_detect = 1;
82bc955f
TI		 2181
2182 return 0;
2183}
2184
160ea0dc
RF		 2185/* add playback controls for LFE output */
2186static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2187 struct auto_pin_cfg *cfg)
2188{
2189 struct sigmatel_spec *spec = codec->spec;
2190 int err;
2191 hda_nid_t lfe_pin = 0x0;
2192 int i;
2193
2194 /*
2195 * search speaker outs and line outs for a mono speaker pin
2196 * with an amp. If one is found, add LFE controls
2197 * for it.
2198 */
2199 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2200 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2201 unsigned long wcaps = get_wcaps(codec, pin);
2202 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2203 if (wcaps == AC_WCAP_OUT_AMP)
2204 /* found a mono speaker with an amp, must be lfe */
2205 lfe_pin = pin;
2206 }
2207
2208 /* if speaker_outs is 0, then speakers may be in line_outs */
2209 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2210 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2211 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2212 unsigned long cfg;
2213 cfg = snd_hda_codec_read(codec, pin, 0,
2214 AC_VERB_GET_CONFIG_DEFAULT,
2215 0x00);
2216 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2217 unsigned long wcaps = get_wcaps(codec, pin);
2218 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2219 if (wcaps == AC_WCAP_OUT_AMP)
2220 /* found a mono speaker with an amp,
2221 must be lfe */
2222 lfe_pin = pin;
2223 }
2224 }
2225 }
2226
2227 if (lfe_pin) {
eb06ed8f 2228 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2229 if (err < 0)
2230 return err;
2231 }
2232
2233 return 0;
2234}
2235
c7d4b2fa
M		 2236static int stac9200_parse_auto_config(struct hda_codec *codec)
2237{
2238 struct sigmatel_spec *spec = codec->spec;
2239 int err;
2240
df694daa 2241 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2242 return err;
2243
2244 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2245 return err;
2246
82bc955f
TI		 2247 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2248 return err;
2249
160ea0dc
RF		 2250 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2251 return err;
2252
82bc955f 2253 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2254 spec->multiout.dig_out_nid = 0x05;
82bc955f 2255 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2256 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2257
2258 if (spec->kctl_alloc)
2259 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2260
2261 spec->input_mux = &spec->private_imux;
8b65727b 2262 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2263
2264 return 1;
2265}
2266
62fe78e9
SR		 2267/*
2268 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2269 * funky external mute control using GPIO pins.
2270 */
2271
2272static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
2273{
2274 unsigned int gpiostate, gpiomask, gpiodir;
2275
2276 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2277 AC_VERB_GET_GPIO_DATA, 0);
2278
2279 if (!muted)
2280 gpiostate |= (1 << pin);
2281 else
2282 gpiostate &= ~(1 << pin);
2283
2284 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2285 AC_VERB_GET_GPIO_MASK, 0);
2286 gpiomask |= (1 << pin);
2287
2288 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2289 AC_VERB_GET_GPIO_DIRECTION, 0);
2290 gpiodir |= (1 << pin);
2291
2292 /* AppleHDA seems to do this -- WTF is this verb?? */
2293 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2294
2295 snd_hda_codec_write(codec, codec->afg, 0,
2296 AC_VERB_SET_GPIO_MASK, gpiomask);
2297 snd_hda_codec_write(codec, codec->afg, 0,
2298 AC_VERB_SET_GPIO_DIRECTION, gpiodir);
2299
2300 msleep(1);
2301
2302 snd_hda_codec_write(codec, codec->afg, 0,
2303 AC_VERB_SET_GPIO_DATA, gpiostate);
2304}
2305
314634bc
TI		 2306static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2307 unsigned int event)
2308{
2309 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2310 snd_hda_codec_write_cache(codec, nid, 0,
2311 AC_VERB_SET_UNSOLICITED_ENABLE,
2312 (AC_USRSP_EN | event));
314634bc
TI		 2313}
2314
c7d4b2fa
M		 2315static int stac92xx_init(struct hda_codec *codec)
2316{
2317 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2318 struct auto_pin_cfg *cfg = &spec->autocfg;
2319 int i;
c7d4b2fa 2320
c7d4b2fa
M		 2321 snd_hda_sequence_write(codec, spec->init);
2322
82bc955f
TI		 2323 /* set up pins */
2324 if (spec->hp_detect) {
505cb341 2325 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2326 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2327 enable_pin_detect(codec, cfg->hp_pins[i],
2328 STAC_HP_EVENT);
0a07acaf
TI		 2329 /* force to enable the first line-out; the others are set up
2330 * in unsol_event
2331 */
2332 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2333 AC_PINCTL_OUT_EN);
eb995a8c 2334 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2335 /* fake event to set up pins */
2336 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2337 } else {
2338 stac92xx_auto_init_multi_out(codec);
2339 stac92xx_auto_init_hp_out(codec);
2340 }
2341 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2342 hda_nid_t nid = cfg->input_pins[i];
2343 if (nid) {
2344 unsigned int pinctl = AC_PINCTL_IN_EN;
2345 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2346 pinctl |= stac92xx_get_vref(codec, nid);
2347 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2348 }
82bc955f 2349 }
8b65727b
MP		 2350 if (spec->num_dmics > 0)
2351 for (i = 0; i < spec->num_dmics; i++)
2352 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2353 AC_PINCTL_IN_EN);
2354
82bc955f
TI		 2355 if (cfg->dig_out_pin)
2356 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2357 AC_PINCTL_OUT_EN);
2358 if (cfg->dig_in_pin)
2359 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2360 AC_PINCTL_IN_EN);
2361
62fe78e9
SR		 2362 if (spec->gpio_mute) {
2363 stac922x_gpio_mute(codec, 0, 0);
2364 stac922x_gpio_mute(codec, 1, 0);
2365 }
2366
c7d4b2fa
M		 2367 return 0;
2368}
2369
2f2f4251
M		 2370static void stac92xx_free(struct hda_codec *codec)
2371{
c7d4b2fa
M		 2372 struct sigmatel_spec *spec = codec->spec;
2373 int i;
2374
2375 if (! spec)
2376 return;
2377
2378 if (spec->kctl_alloc) {
2379 for (i = 0; i < spec->num_kctl_used; i++)
2380 kfree(spec->kctl_alloc[i].name);
2381 kfree(spec->kctl_alloc);
2382 }
2383
11b44bbd
RF		 2384 if (spec->bios_pin_configs)
2385 kfree(spec->bios_pin_configs);
2386
c7d4b2fa 2387 kfree(spec);
2f2f4251
M		 2388}
2389
4e55096e
M		 2390static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2391 unsigned int flag)
2392{
2393 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2394 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2395
f9acba43
TI		 2396 if (pin_ctl & AC_PINCTL_IN_EN) {
2397 /*
2398 * we need to check the current set-up direction of
2399 * shared input pins since they can be switched via
2400 * "xxx as Output" mixer switch
2401 */
2402 struct sigmatel_spec *spec = codec->spec;
2403 struct auto_pin_cfg *cfg = &spec->autocfg;
2404 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2405 spec->line_switch) ||
2406 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2407 spec->mic_switch))
2408 return;
2409 }
2410
7b043899
SL		 2411 /* if setting pin direction bits, clear the current
2412 direction bits first */
2413 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2414 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2415
82beb8fd 2416 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2417 AC_VERB_SET_PIN_WIDGET_CONTROL,
2418 pin_ctl | flag);
2419}
2420
2421static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2422 unsigned int flag)
2423{
2424 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2425 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 2426 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2427 AC_VERB_SET_PIN_WIDGET_CONTROL,
2428 pin_ctl & ~flag);
2429}
2430
314634bc
TI		 2431static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
2432{
2433 if (!nid)
2434 return 0;
2435 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
2436 & (1 << 31))
2437 return 1;
2438 return 0;
2439}
2440
2441static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 2442{
2443 struct sigmatel_spec *spec = codec->spec;
2444 struct auto_pin_cfg *cfg = &spec->autocfg;
2445 int i, presence;
2446
eb06ed8f
TI		 2447 presence = 0;
2448 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 2449 presence = get_pin_presence(codec, cfg->hp_pins[i]);
2450 if (presence)
2451 break;
eb06ed8f 2452 }
4e55096e
M		 2453
2454 if (presence) {
2455 /* disable lineouts, enable hp */
2456 for (i = 0; i < cfg->line_outs; i++)
2457 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
2458 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2459 for (i = 0; i < cfg->speaker_outs; i++)
2460 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
2461 AC_PINCTL_OUT_EN);
4e55096e
M		 2462 } else {
2463 /* enable lineouts, disable hp */
2464 for (i = 0; i < cfg->line_outs; i++)
2465 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
2466 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2467 for (i = 0; i < cfg->speaker_outs; i++)
2468 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
2469 AC_PINCTL_OUT_EN);
4e55096e
M		 2470 }
2471}
2472
314634bc
TI		 2473static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
2474{
2475 switch (res >> 26) {
2476 case STAC_HP_EVENT:
2477 stac92xx_hp_detect(codec, res);
2478 break;
2479 }
2480}
2481
cb53c626 2482#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2483static int stac92xx_resume(struct hda_codec *codec)
2484{
dc81bed1
TI		 2485 struct sigmatel_spec *spec = codec->spec;
2486
11b44bbd 2487 stac92xx_set_config_regs(codec);
dc81bed1
TI		 2488 snd_hda_sequence_write(codec, spec->init);
2489 if (spec->gpio_mute) {
2490 stac922x_gpio_mute(codec, 0, 0);
2491 stac922x_gpio_mute(codec, 1, 0);
2492 }
82beb8fd
TI		 2493 snd_hda_codec_resume_amp(codec);
2494 snd_hda_codec_resume_cache(codec);
dc81bed1
TI		 2495 /* invoke unsolicited event to reset the HP state */
2496 if (spec->hp_detect)
2497 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 2498 return 0;
2499}
2500#endif
2501
2f2f4251
M		 2502static struct hda_codec_ops stac92xx_patch_ops = {
2503 .build_controls = stac92xx_build_controls,
2504 .build_pcms = stac92xx_build_pcms,
2505 .init = stac92xx_init,
2506 .free = stac92xx_free,
4e55096e 2507 .unsol_event = stac92xx_unsol_event,
cb53c626 2508#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2509 .resume = stac92xx_resume,
2510#endif
2f2f4251
M		 2511};
2512
2513static int patch_stac9200(struct hda_codec *codec)
2514{
2515 struct sigmatel_spec *spec;
c7d4b2fa 2516 int err;
2f2f4251 2517
e560d8d8 2518 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2519 if (spec == NULL)
2520 return -ENOMEM;
2521
2522 codec->spec = spec;
a4eed138 2523 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 2524 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 2525 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
2526 stac9200_models,
2527 stac9200_cfg_tbl);
11b44bbd
RF		 2528 if (spec->board_config < 0) {
2529 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
2530 err = stac92xx_save_bios_config_regs(codec);
2531 if (err < 0) {
2532 stac92xx_free(codec);
2533 return err;
2534 }
2535 spec->pin_configs = spec->bios_pin_configs;
2536 } else {
403d1944
MP		 2537 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
2538 stac92xx_set_config_regs(codec);
2539 }
2f2f4251
M		 2540
2541 spec->multiout.max_channels = 2;
2542 spec->multiout.num_dacs = 1;
2543 spec->multiout.dac_nids = stac9200_dac_nids;
2544 spec->adc_nids = stac9200_adc_nids;
2545 spec->mux_nids = stac9200_mux_nids;
dabbed6f 2546 spec->num_muxes = 1;
8b65727b 2547 spec->num_dmics = 0;
9e05b7a3 2548 spec->num_adcs = 1;
c7d4b2fa 2549
1194b5b7
TI		 2550 if (spec->board_config == STAC_9200_GATEWAY)
2551 spec->init = stac9200_eapd_init;
2552 else
2553 spec->init = stac9200_core_init;
2f2f4251 2554 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 2555
2556 err = stac9200_parse_auto_config(codec);
2557 if (err < 0) {
2558 stac92xx_free(codec);
2559 return err;
2560 }
2f2f4251
M		 2561
2562 codec->patch_ops = stac92xx_patch_ops;
2563
2564 return 0;
2565}
2566
8e21c34c
TD		 2567static int patch_stac925x(struct hda_codec *codec)
2568{
2569 struct sigmatel_spec *spec;
2570 int err;
2571
2572 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2573 if (spec == NULL)
2574 return -ENOMEM;
2575
2576 codec->spec = spec;
a4eed138 2577 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 2578 spec->pin_nids = stac925x_pin_nids;
2579 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
2580 stac925x_models,
2581 stac925x_cfg_tbl);
9e507abd 2582 again:
8e21c34c 2583 if (spec->board_config < 0) {
2c11f955
TD		 2584 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2585 "using BIOS defaults\n");
8e21c34c
TD		 2586 err = stac92xx_save_bios_config_regs(codec);
2587 if (err < 0) {
2588 stac92xx_free(codec);
2589 return err;
2590 }
2591 spec->pin_configs = spec->bios_pin_configs;
2592 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
2593 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
2594 stac92xx_set_config_regs(codec);
2595 }
2596
2597 spec->multiout.max_channels = 2;
2598 spec->multiout.num_dacs = 1;
2599 spec->multiout.dac_nids = stac925x_dac_nids;
2600 spec->adc_nids = stac925x_adc_nids;
2601 spec->mux_nids = stac925x_mux_nids;
2602 spec->num_muxes = 1;
9e05b7a3 2603 spec->num_adcs = 1;
2c11f955
TD		 2604 switch (codec->vendor_id) {
2605 case 0x83847632: /* STAC9202 */
2606 case 0x83847633: /* STAC9202D */
2607 case 0x83847636: /* STAC9251 */
2608 case 0x83847637: /* STAC9251D */
f6e9852a 2609 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955
TD		 2610 spec->dmic_nids = stac925x_dmic_nids;
2611 break;
2612 default:
2613 spec->num_dmics = 0;
2614 break;
2615 }
8e21c34c
TD		 2616
2617 spec->init = stac925x_core_init;
2618 spec->mixer = stac925x_mixer;
2619
2620 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 2621 if (!err) {
2622 if (spec->board_config < 0) {
2623 printk(KERN_WARNING "hda_codec: No auto-config is "
2624 "available, default to model=ref\n");
2625 spec->board_config = STAC_925x_REF;
2626 goto again;
2627 }
2628 err = -EINVAL;
2629 }
8e21c34c
TD		 2630 if (err < 0) {
2631 stac92xx_free(codec);
2632 return err;
2633 }
2634
2635 codec->patch_ops = stac92xx_patch_ops;
2636
2637 return 0;
2638}
2639
e035b841
MR		 2640static int patch_stac92hd71bxx(struct hda_codec *codec)
2641{
2642 struct sigmatel_spec *spec;
2643 int err = 0;
2644
2645 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2646 if (spec == NULL)
2647 return -ENOMEM;
2648
2649 codec->spec = spec;
2650 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
2651 spec->pin_nids = stac92hd71bxx_pin_nids;
2652 spec->board_config = snd_hda_check_board_config(codec,
2653 STAC_92HD71BXX_MODELS,
2654 stac92hd71bxx_models,
2655 stac92hd71bxx_cfg_tbl);
2656again:
2657 if (spec->board_config < 0) {
2658 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
2659 " STAC92HD71BXX, using BIOS defaults\n");
2660 err = stac92xx_save_bios_config_regs(codec);
2661 if (err < 0) {
2662 stac92xx_free(codec);
2663 return err;
2664 }
2665 spec->pin_configs = spec->bios_pin_configs;
2666 } else {
2667 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
2668 stac92xx_set_config_regs(codec);
2669 }
2670
2671 spec->gpio_mask = spec->gpio_data = 0x00000001; /* GPIO0 High = EAPD */
2672 stac92xx_enable_gpio_mask(codec);
2673
2674 spec->init = stac92hd71bxx_core_init;
2675 spec->mixer = stac92hd71bxx_mixer;
2676
2677 spec->mux_nids = stac92hd71bxx_mux_nids;
2678 spec->adc_nids = stac92hd71bxx_adc_nids;
2679 spec->dmic_nids = stac92hd71bxx_dmic_nids;
2680 spec->dmux_nid = 0x1c;
2681
2682 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
2683 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
2684 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
2685
2686 spec->multiout.num_dacs = 2;
2687 spec->multiout.hp_nid = 0x11;
2688 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
2689
2690 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
2691 if (!err) {
2692 if (spec->board_config < 0) {
2693 printk(KERN_WARNING "hda_codec: No auto-config is "
2694 "available, default to model=ref\n");
2695 spec->board_config = STAC_92HD71BXX_REF;
2696 goto again;
2697 }
2698 err = -EINVAL;
2699 }
2700
2701 if (err < 0) {
2702 stac92xx_free(codec);
2703 return err;
2704 }
2705
2706 codec->patch_ops = stac92xx_patch_ops;
2707
2708 return 0;
2709};
2710
2f2f4251
M		 2711static int patch_stac922x(struct hda_codec *codec)
2712{
2713 struct sigmatel_spec *spec;
c7d4b2fa 2714 int err;
2f2f4251 2715
e560d8d8 2716 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2717 if (spec == NULL)
2718 return -ENOMEM;
2719
2720 codec->spec = spec;
a4eed138 2721 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 2722 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 2723 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
2724 stac922x_models,
2725 stac922x_cfg_tbl);
5d5d3bc3 2726 if (spec->board_config == STAC_INTEL_MAC_V3) {
3fc24d85
TI		 2727 spec->gpio_mute = 1;
2728 /* Intel Macs have all same PCI SSID, so we need to check
2729 * codec SSID to distinguish the exact models
2730 */
6f0778d8 2731 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 2732 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 2733
2734 case 0x106b0800:
2735 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 2736 break;
5d5d3bc3
IZ		 2737 case 0x106b0600:
2738 case 0x106b0700:
2739 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 2740 break;
5d5d3bc3
IZ		 2741 case 0x106b0e00:
2742 case 0x106b0f00:
2743 case 0x106b1600:
2744 case 0x106b1700:
2745 case 0x106b0200:
2746 case 0x106b1e00:
2747 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 2748 break;
5d5d3bc3
IZ		 2749 case 0x106b1a00:
2750 case 0x00000100:
2751 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 2752 break;
5d5d3bc3
IZ		 2753 case 0x106b0a00:
2754 case 0x106b2200:
2755 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 2756 break;
3fc24d85
TI		 2757 }
2758 }
2759
9e507abd 2760 again:
11b44bbd
RF		 2761 if (spec->board_config < 0) {
2762 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
2763 "using BIOS defaults\n");
2764 err = stac92xx_save_bios_config_regs(codec);
2765 if (err < 0) {
2766 stac92xx_free(codec);
2767 return err;
2768 }
2769 spec->pin_configs = spec->bios_pin_configs;
2770 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 2771 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
2772 stac92xx_set_config_regs(codec);
2773 }
2f2f4251 2774
c7d4b2fa
M		 2775 spec->adc_nids = stac922x_adc_nids;
2776 spec->mux_nids = stac922x_mux_nids;
2549413e 2777 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 2778 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 2779 spec->num_dmics = 0;
c7d4b2fa
M		 2780
2781 spec->init = stac922x_core_init;
2f2f4251 2782 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 2783
2784 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 2785
3cc08dc6 2786 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 2787 if (!err) {
2788 if (spec->board_config < 0) {
2789 printk(KERN_WARNING "hda_codec: No auto-config is "
2790 "available, default to model=ref\n");
2791 spec->board_config = STAC_D945_REF;
2792 goto again;
2793 }
2794 err = -EINVAL;
2795 }
3cc08dc6
MP		 2796 if (err < 0) {
2797 stac92xx_free(codec);
2798 return err;
2799 }
2800
2801 codec->patch_ops = stac92xx_patch_ops;
2802
807a4636
TI		 2803 /* Fix Mux capture level; max to 2 */
2804 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
2805 (0 << AC_AMPCAP_OFFSET_SHIFT) |
2806 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
2807 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
2808 (0 << AC_AMPCAP_MUTE_SHIFT));
2809
3cc08dc6
MP		 2810 return 0;
2811}
2812
2813static int patch_stac927x(struct hda_codec *codec)
2814{
2815 struct sigmatel_spec *spec;
2816 int err;
2817
2818 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2819 if (spec == NULL)
2820 return -ENOMEM;
2821
2822 codec->spec = spec;
a4eed138 2823 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 2824 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 2825 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
2826 stac927x_models,
2827 stac927x_cfg_tbl);
9e507abd 2828 again:
11b44bbd 2829 if (spec->board_config < 0) {
3cc08dc6 2830 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n");
11b44bbd
RF		 2831 err = stac92xx_save_bios_config_regs(codec);
2832 if (err < 0) {
2833 stac92xx_free(codec);
2834 return err;
2835 }
2836 spec->pin_configs = spec->bios_pin_configs;
2837 } else if (stac927x_brd_tbl[spec->board_config] != NULL) {
3cc08dc6
MP		 2838 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
2839 stac92xx_set_config_regs(codec);
2840 }
2841
81d3dbde 2842 switch (spec->board_config) {
93ed1503 2843 case STAC_D965_3ST:
81d3dbde
TD		 2844 spec->adc_nids = stac927x_adc_nids;
2845 spec->mux_nids = stac927x_mux_nids;
2549413e 2846 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
9e05b7a3 2847 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
93ed1503 2848 spec->init = d965_core_init;
9e05b7a3 2849 spec->mixer = stac927x_mixer;
81d3dbde 2850 break;
93ed1503
TD		 2851 case STAC_D965_5ST:
2852 spec->adc_nids = stac927x_adc_nids;
2853 spec->mux_nids = stac927x_mux_nids;
2549413e 2854 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
9e05b7a3 2855 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
93ed1503 2856 spec->init = d965_core_init;
9e05b7a3 2857 spec->mixer = stac927x_mixer;
81d3dbde
TD		 2858 break;
2859 default:
2860 spec->adc_nids = stac927x_adc_nids;
2861 spec->mux_nids = stac927x_mux_nids;
2549413e 2862 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
9e05b7a3 2863 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
81d3dbde
TD		 2864 spec->init = stac927x_core_init;
2865 spec->mixer = stac927x_mixer;
2866 }
3cc08dc6 2867
7f16859a
MR		 2868 switch (codec->subsystem_id) {
2869 case 0x1028020A: /* STAC 9228 */
2870 case 0x10280209: /* STAC 9228 */
2871 spec->dmic_nids = stac927x_dmic_nids;
2872 spec->num_dmics = STAC927X_NUM_DMICS;
83eef75b 2873 spec->dmux_nid = 0x1b;
f1f208d0
MR		 2874
2875 /* Enable DMIC0 */
2876 stac92xx_set_config_reg(codec, 0x13, 0x90a60040);
2877
2878 /* GPIO2 High = Enable EAPD */
2879 spec->gpio_mask = spec->gpio_data = 0x00000004;
7f16859a
MR		 2880 break;
2881 default:
f1f208d0
MR		 2882 spec->num_dmics = 0;
2883
2884 /* GPIO0 High = Enable EAPD */
2885 spec->gpio_mask = spec->gpio_data = 0x00000001;
7f16859a
MR		 2886 }
2887
3cc08dc6 2888 spec->multiout.dac_nids = spec->dac_nids;
8259980e 2889 stac92xx_enable_gpio_mask(codec);
92a22beb 2890
3cc08dc6 2891 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 2892 if (!err) {
2893 if (spec->board_config < 0) {
2894 printk(KERN_WARNING "hda_codec: No auto-config is "
2895 "available, default to model=ref\n");
2896 spec->board_config = STAC_D965_REF;
2897 goto again;
2898 }
2899 err = -EINVAL;
2900 }
c7d4b2fa
M		 2901 if (err < 0) {
2902 stac92xx_free(codec);
2903 return err;
2904 }
2f2f4251
M		 2905
2906 codec->patch_ops = stac92xx_patch_ops;
2907
2908 return 0;
2909}
2910
f3302a59
MP		 2911static int patch_stac9205(struct hda_codec *codec)
2912{
2913 struct sigmatel_spec *spec;
8259980e 2914 int err;
f3302a59
MP		 2915
2916 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2917 if (spec == NULL)
2918 return -ENOMEM;
2919
2920 codec->spec = spec;
a4eed138 2921 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 2922 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 2923 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
2924 stac9205_models,
2925 stac9205_cfg_tbl);
9e507abd 2926 again:
11b44bbd
RF		 2927 if (spec->board_config < 0) {
2928 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
2929 err = stac92xx_save_bios_config_regs(codec);
2930 if (err < 0) {
2931 stac92xx_free(codec);
2932 return err;
2933 }
2934 spec->pin_configs = spec->bios_pin_configs;
2935 } else {
f3302a59
MP		 2936 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
2937 stac92xx_set_config_regs(codec);
2938 }
2939
2940 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 2941 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 2942 spec->mux_nids = stac9205_mux_nids;
2549413e 2943 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 2944 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 2945 spec->num_dmics = STAC9205_NUM_DMICS;
8b65727b 2946 spec->dmux_nid = 0x1d;
f3302a59
MP		 2947
2948 spec->init = stac9205_core_init;
2949 spec->mixer = stac9205_mixer;
2950
2951 spec->multiout.dac_nids = spec->dac_nids;
87d48363 2952
ae0a8ed8 2953 switch (spec->board_config){
ae0a8ed8 2954 case STAC_9205_DELL_M43:
87d48363
MR		 2955 /* Enable SPDIF in/out */
2956 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
2957 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
2958
8259980e 2959 spec->gpio_mask = 0x00000007; /* GPIO0-2 */
87d48363
MR		 2960 /* GPIO0 High = EAPD, GPIO1 Low = DRM,
2961 * GPIO2 High = Headphone Mute
2962 */
8259980e 2963 spec->gpio_data = 0x00000005;
ae0a8ed8
TD		 2964 break;
2965 default:
2966 /* GPIO0 High = EAPD */
2967 spec->gpio_mask = spec->gpio_data = 0x00000001;
2968 break;
2969 }
33382403 2970
8259980e 2971 stac92xx_enable_gpio_mask(codec);
f3302a59 2972 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 2973 if (!err) {
2974 if (spec->board_config < 0) {
2975 printk(KERN_WARNING "hda_codec: No auto-config is "
2976 "available, default to model=ref\n");
2977 spec->board_config = STAC_9205_REF;
2978 goto again;
2979 }
2980 err = -EINVAL;
2981 }
f3302a59
MP		 2982 if (err < 0) {
2983 stac92xx_free(codec);
2984 return err;
2985 }
2986
2987 codec->patch_ops = stac92xx_patch_ops;
2988
2989 return 0;
2990}
2991
db064e50 2992/*
6d859065 2993 * STAC9872 hack
db064e50
TI		 2994 */
2995
99ccc560 2996/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 2997static hda_nid_t vaio_dacs[] = { 0x2 };
2998#define VAIO_HP_DAC 0x5
2999static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
3000static hda_nid_t vaio_mux_nids[] = { 0x15 };
3001
3002static struct hda_input_mux vaio_mux = {
a3a2f429 3003 .num_items = 3,
db064e50 3004 .items = {
d773781c 3005 /* { "HP", 0x0 }, */
1624cb9a
TI		 3006 { "Mic Jack", 0x1 },
3007 { "Internal Mic", 0x2 },
db064e50
TI		 3008 { "PCM", 0x3 },
3009 }
3010};
3011
3012static struct hda_verb vaio_init[] = {
3013 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 3014 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 3015 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3016 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3017 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3018 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3019 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 3020 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3021 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3022 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3023 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3024 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3025 {}
3026};
3027
6d859065
GM		 3028static struct hda_verb vaio_ar_init[] = {
3029 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
3030 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3031 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3032 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3033/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
3034 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3035 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 3036 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3037 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3038/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
3039 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3040 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3041 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3042 {}
3043};
3044
db064e50 3045/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3046static struct hda_bind_ctls vaio_bind_master_vol = {
3047 .ops = &snd_hda_bind_vol,
3048 .values = {
3049 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3050 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3051 0
3052 },
3053};
db064e50
TI		 3054
3055/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3056static struct hda_bind_ctls vaio_bind_master_sw = {
3057 .ops = &snd_hda_bind_sw,
3058 .values = {
3059 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3060 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3061 0,
3062 },
3063};
db064e50
TI		 3064
3065static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 3066 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3067 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 3068 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3069 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3070 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3071 {
3072 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3073 .name = "Capture Source",
3074 .count = 1,
3075 .info = stac92xx_mux_enum_info,
3076 .get = stac92xx_mux_enum_get,
3077 .put = stac92xx_mux_enum_put,
3078 },
3079 {}
3080};
3081
6d859065 3082static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 3083 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3084 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 3085 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3086 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3087 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3088 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
3089 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
3090 {
3091 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3092 .name = "Capture Source",
3093 .count = 1,
3094 .info = stac92xx_mux_enum_info,
3095 .get = stac92xx_mux_enum_get,
3096 .put = stac92xx_mux_enum_put,
3097 },
3098 {}
3099};
3100
3101static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 3102 .build_controls = stac92xx_build_controls,
3103 .build_pcms = stac92xx_build_pcms,
3104 .init = stac92xx_init,
3105 .free = stac92xx_free,
cb53c626 3106#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 3107 .resume = stac92xx_resume,
3108#endif
3109};
3110
72e7b0dd
TI		 3111static int stac9872_vaio_init(struct hda_codec *codec)
3112{
3113 int err;
3114
3115 err = stac92xx_init(codec);
3116 if (err < 0)
3117 return err;
3118 if (codec->patch_ops.unsol_event)
3119 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3120 return 0;
3121}
3122
3123static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
3124{
3125 if (get_pin_presence(codec, 0x0a)) {
3126 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3127 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3128 } else {
3129 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3130 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3131 }
3132}
3133
3134static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
3135{
3136 switch (res >> 26) {
3137 case STAC_HP_EVENT:
3138 stac9872_vaio_hp_detect(codec, res);
3139 break;
3140 }
3141}
3142
3143static struct hda_codec_ops stac9872_vaio_patch_ops = {
3144 .build_controls = stac92xx_build_controls,
3145 .build_pcms = stac92xx_build_pcms,
3146 .init = stac9872_vaio_init,
3147 .free = stac92xx_free,
3148 .unsol_event = stac9872_vaio_unsol_event,
3149#ifdef CONFIG_PM
3150 .resume = stac92xx_resume,
3151#endif
3152};
3153
6d859065
GM		 3154enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
3155 CXD9872RD_VAIO,
3156 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
3157 STAC9872AK_VAIO,
3158 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
3159 STAC9872K_VAIO,
3160 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 3161 CXD9872AKD_VAIO,
3162 STAC_9872_MODELS,
3163};
3164
3165static const char *stac9872_models[STAC_9872_MODELS] = {
3166 [CXD9872RD_VAIO] = "vaio",
3167 [CXD9872AKD_VAIO] = "vaio-ar",
3168};
3169
3170static struct snd_pci_quirk stac9872_cfg_tbl[] = {
3171 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
3172 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
3173 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 3174 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 3175 {}
3176};
3177
6d859065 3178static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 3179{
3180 struct sigmatel_spec *spec;
3181 int board_config;
3182
f5fcc13c
TI		 3183 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
3184 stac9872_models,
3185 stac9872_cfg_tbl);
db064e50
TI		 3186 if (board_config < 0)
3187 /* unknown config, let generic-parser do its job... */
3188 return snd_hda_parse_generic_codec(codec);
3189
3190 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3191 if (spec == NULL)
3192 return -ENOMEM;
3193
3194 codec->spec = spec;
3195 switch (board_config) {
6d859065
GM		 3196 case CXD9872RD_VAIO:
3197 case STAC9872AK_VAIO:
3198 case STAC9872K_VAIO:
db064e50
TI		 3199 spec->mixer = vaio_mixer;
3200 spec->init = vaio_init;
3201 spec->multiout.max_channels = 2;
3202 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3203 spec->multiout.dac_nids = vaio_dacs;
3204 spec->multiout.hp_nid = VAIO_HP_DAC;
3205 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3206 spec->adc_nids = vaio_adcs;
3207 spec->input_mux = &vaio_mux;
3208 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3209 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 3210 break;
6d859065
GM		 3211
3212 case CXD9872AKD_VAIO:
3213 spec->mixer = vaio_ar_mixer;
3214 spec->init = vaio_ar_init;
3215 spec->multiout.max_channels = 2;
3216 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3217 spec->multiout.dac_nids = vaio_dacs;
3218 spec->multiout.hp_nid = VAIO_HP_DAC;
3219 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3220 spec->adc_nids = vaio_adcs;
3221 spec->input_mux = &vaio_mux;
3222 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3223 codec->patch_ops = stac9872_patch_ops;
6d859065 3224 break;
db064e50
TI		 3225 }
3226
db064e50
TI		 3227 return 0;
3228}
3229
3230
2f2f4251
M		 3231/*
3232 * patch entries
3233 */
3234struct hda_codec_preset snd_hda_preset_sigmatel[] = {
3235 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
3236 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
3237 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
3238 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
3239 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
3240 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
3241 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 3242 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
3243 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
3244 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
3245 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
3246 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
3247 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 3248 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
3249 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
3250 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
3251 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
3252 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
3253 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
3254 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
3255 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
3256 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
3257 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 3258 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
3259 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
3260 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
3261 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
3262 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
3263 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 3264 /* The following does not take into account .id=0x83847661 when subsys =
3265 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
3266 * currently not fully supported.
3267 */
3268 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
3269 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
3270 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 3271 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
3272 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
3273 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
3274 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
3275 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
3276 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
3277 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
3278 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
e035b841 3279 { .id = 0x111d76b0, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
2f2f4251
M		 3280 {} /* terminator */
3281};
Clone of davem's net-next-2.6 tree