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[ALSA] hda-codec - Add model for MSI m673x
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <sound/driver.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/pci.h>
32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
36
4e55096e
M		 37#define NUM_CONTROL_ALLOC 32
38#define STAC_HP_EVENT 0x37
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
42 STAC_9200_MODELS
43};
44
45enum {
46 STAC_9205_REF,
ae0a8ed8
TD		 47 STAC_9205_DELL_M43,
48 STAC_9205_DELL_M44,
49 STAC_9205_M43xx,
f5fcc13c
TI		 50 STAC_9205_MODELS
51};
52
8e21c34c
TD		 53enum {
54 STAC_925x_REF,
55 STAC_M2_2,
56 STAC_MA6,
2c11f955 57 STAC_PA6,
8e21c34c
TD		 58 STAC_925x_MODELS
59};
60
f5fcc13c
TI		 61enum {
62 STAC_D945_REF,
63 STAC_D945GTP3,
64 STAC_D945GTP5,
76c08828 65 STAC_922X_DELL,
5d5d3bc3
IZ		 66 STAC_INTEL_MAC_V1,
67 STAC_INTEL_MAC_V2,
68 STAC_INTEL_MAC_V3,
69 STAC_INTEL_MAC_V4,
70 STAC_INTEL_MAC_V5,
71 /* for backward compitability */
f5fcc13c 72 STAC_MACMINI,
3fc24d85 73 STAC_MACBOOK,
6f0778d8
NB		 74 STAC_MACBOOK_PRO_V1,
75 STAC_MACBOOK_PRO_V2,
f16928fb 76 STAC_IMAC_INTEL,
0dae0f83 77 STAC_IMAC_INTEL_20,
f5fcc13c
TI		 78 STAC_922X_MODELS
79};
80
81enum {
82 STAC_D965_REF,
83 STAC_D965_3ST,
84 STAC_D965_5ST,
4ff076e5 85 STAC_DELL_3ST,
f5fcc13c
TI		 86 STAC_927X_MODELS
87};
403d1944 88
2f2f4251 89struct sigmatel_spec {
c8b6bf9b 90 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 91 unsigned int num_mixers;
92
403d1944 93 int board_config;
c7d4b2fa 94 unsigned int surr_switch: 1;
403d1944
MP		 95 unsigned int line_switch: 1;
96 unsigned int mic_switch: 1;
3cc08dc6 97 unsigned int alt_switch: 1;
82bc955f 98 unsigned int hp_detect: 1;
62fe78e9 99 unsigned int gpio_mute: 1;
c7d4b2fa 100
8259980e
TI		 101 unsigned int gpio_mask, gpio_data;
102
2f2f4251
M		 103 /* playback */
104 struct hda_multi_out multiout;
3cc08dc6 105 hda_nid_t dac_nids[5];
2f2f4251
M		 106
107 /* capture */
108 hda_nid_t *adc_nids;
2f2f4251 109 unsigned int num_adcs;
dabbed6f
M		 110 hda_nid_t *mux_nids;
111 unsigned int num_muxes;
8b65727b
MP		 112 hda_nid_t *dmic_nids;
113 unsigned int num_dmics;
114 hda_nid_t dmux_nid;
dabbed6f 115 hda_nid_t dig_in_nid;
2f2f4251 116
2f2f4251
M		 117 /* pin widgets */
118 hda_nid_t *pin_nids;
119 unsigned int num_pins;
2f2f4251 120 unsigned int *pin_configs;
11b44bbd 121 unsigned int *bios_pin_configs;
2f2f4251
M		 122
123 /* codec specific stuff */
124 struct hda_verb *init;
c8b6bf9b 125 struct snd_kcontrol_new *mixer;
2f2f4251
M		 126
127 /* capture source */
8b65727b
MP		 128 struct hda_input_mux *dinput_mux;
129 unsigned int cur_dmux;
c7d4b2fa 130 struct hda_input_mux *input_mux;
3cc08dc6 131 unsigned int cur_mux[3];
2f2f4251 132
403d1944
MP		 133 /* i/o switches */
134 unsigned int io_switch[2];
2f2f4251 135
c7d4b2fa
M		 136 struct hda_pcm pcm_rec[2]; /* PCM information */
137
138 /* dynamic controls and input_mux */
139 struct auto_pin_cfg autocfg;
140 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 141 struct snd_kcontrol_new *kctl_alloc;
8b65727b 142 struct hda_input_mux private_dimux;
c7d4b2fa 143 struct hda_input_mux private_imux;
2f2f4251
M		 144};
145
146static hda_nid_t stac9200_adc_nids[1] = {
147 0x03,
148};
149
150static hda_nid_t stac9200_mux_nids[1] = {
151 0x0c,
152};
153
154static hda_nid_t stac9200_dac_nids[1] = {
155 0x02,
156};
157
8e21c34c
TD		 158static hda_nid_t stac925x_adc_nids[1] = {
159 0x03,
160};
161
162static hda_nid_t stac925x_mux_nids[1] = {
163 0x0f,
164};
165
166static hda_nid_t stac925x_dac_nids[1] = {
167 0x02,
168};
169
2c11f955
TD		 170static hda_nid_t stac925x_dmic_nids[1] = {
171 0x15,
172};
173
2f2f4251
M		 174static hda_nid_t stac922x_adc_nids[2] = {
175 0x06, 0x07,
176};
177
178static hda_nid_t stac922x_mux_nids[2] = {
179 0x12, 0x13,
180};
181
3cc08dc6
MP		 182static hda_nid_t stac927x_adc_nids[3] = {
183 0x07, 0x08, 0x09
184};
185
186static hda_nid_t stac927x_mux_nids[3] = {
187 0x15, 0x16, 0x17
188};
189
f3302a59
MP		 190static hda_nid_t stac9205_adc_nids[2] = {
191 0x12, 0x13
192};
193
194static hda_nid_t stac9205_mux_nids[2] = {
195 0x19, 0x1a
196};
197
2549413e
TI		 198static hda_nid_t stac9205_dmic_nids[2] = {
199 0x17, 0x18,
8b65727b
MP		 200};
201
c7d4b2fa 202static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 203 0x08, 0x09, 0x0d, 0x0e,
204 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 205};
206
8e21c34c
TD		 207static hda_nid_t stac925x_pin_nids[8] = {
208 0x07, 0x08, 0x0a, 0x0b,
209 0x0c, 0x0d, 0x10, 0x11,
210};
211
2f2f4251
M		 212static hda_nid_t stac922x_pin_nids[10] = {
213 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
214 0x0f, 0x10, 0x11, 0x15, 0x1b,
215};
216
3cc08dc6
MP		 217static hda_nid_t stac927x_pin_nids[14] = {
218 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
219 0x0f, 0x10, 0x11, 0x12, 0x13,
220 0x14, 0x21, 0x22, 0x23,
221};
222
f3302a59
MP		 223static hda_nid_t stac9205_pin_nids[12] = {
224 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
225 0x0f, 0x14, 0x16, 0x17, 0x18,
226 0x21, 0x22,
f3302a59
MP		 227};
228
8b65727b
MP		 229static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
230 struct snd_ctl_elem_info *uinfo)
231{
232 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
233 struct sigmatel_spec *spec = codec->spec;
234 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
235}
236
237static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
238 struct snd_ctl_elem_value *ucontrol)
239{
240 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
241 struct sigmatel_spec *spec = codec->spec;
242
243 ucontrol->value.enumerated.item[0] = spec->cur_dmux;
244 return 0;
245}
246
247static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
248 struct snd_ctl_elem_value *ucontrol)
249{
250 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
251 struct sigmatel_spec *spec = codec->spec;
252
253 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
254 spec->dmux_nid, &spec->cur_dmux);
255}
256
c8b6bf9b 257static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 258{
259 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
260 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 261 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 262}
263
c8b6bf9b 264static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 265{
266 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
267 struct sigmatel_spec *spec = codec->spec;
268 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
269
270 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
271 return 0;
272}
273
c8b6bf9b 274static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 275{
276 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
277 struct sigmatel_spec *spec = codec->spec;
278 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
279
c7d4b2fa 280 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 281 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
282}
283
c7d4b2fa 284static struct hda_verb stac9200_core_init[] = {
2f2f4251 285 /* set dac0mux for dac converter */
c7d4b2fa 286 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 287 {}
288};
289
8e21c34c
TD		 290static struct hda_verb stac925x_core_init[] = {
291 /* set dac0mux for dac converter */
292 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
293 {}
294};
295
c7d4b2fa 296static struct hda_verb stac922x_core_init[] = {
2f2f4251 297 /* set master volume and direct control */
c7d4b2fa 298 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 299 {}
300};
301
93ed1503 302static struct hda_verb d965_core_init[] = {
19039bd0 303 /* set master volume and direct control */
93ed1503 304 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 305 /* unmute node 0x1b */
306 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
307 /* select node 0x03 as DAC */
308 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
309 {}
310};
311
3cc08dc6
MP		 312static struct hda_verb stac927x_core_init[] = {
313 /* set master volume and direct control */
314 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
315 {}
316};
317
f3302a59
MP		 318static struct hda_verb stac9205_core_init[] = {
319 /* set master volume and direct control */
320 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
321 {}
322};
323
c8b6bf9b 324static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 325 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
326 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
327 {
328 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
329 .name = "Input Source",
330 .count = 1,
331 .info = stac92xx_mux_enum_info,
332 .get = stac92xx_mux_enum_get,
333 .put = stac92xx_mux_enum_put,
334 },
335 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
336 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 337 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 338 { } /* end */
339};
340
8e21c34c 341static struct snd_kcontrol_new stac925x_mixer[] = {
8e21c34c
TD		 342 {
343 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
344 .name = "Input Source",
345 .count = 1,
346 .info = stac92xx_mux_enum_info,
347 .get = stac92xx_mux_enum_get,
348 .put = stac92xx_mux_enum_put,
349 },
350 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
351 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
352 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
353 { } /* end */
354};
355
c7d4b2fa 356/* This needs to be generated dynamically based on sequence */
c8b6bf9b 357static struct snd_kcontrol_new stac922x_mixer[] = {
2f2f4251
M		 358 {
359 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
360 .name = "Input Source",
361 .count = 1,
362 .info = stac92xx_mux_enum_info,
363 .get = stac92xx_mux_enum_get,
364 .put = stac92xx_mux_enum_put,
365 },
366 HDA_CODEC_VOLUME("Capture Volume", 0x17, 0x0, HDA_INPUT),
0fd1708a 367 HDA_CODEC_MUTE("Capture Switch", 0x17, 0x0, HDA_INPUT),
2f2f4251
M		 368 HDA_CODEC_VOLUME("Mux Capture Volume", 0x12, 0x0, HDA_OUTPUT),
369 { } /* end */
370};
371
19039bd0
TI		 372/* This needs to be generated dynamically based on sequence */
373static struct snd_kcontrol_new stac9227_mixer[] = {
374 {
375 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
376 .name = "Input Source",
377 .count = 1,
378 .info = stac92xx_mux_enum_info,
379 .get = stac92xx_mux_enum_get,
380 .put = stac92xx_mux_enum_put,
381 },
382 HDA_CODEC_VOLUME("Capture Volume", 0x15, 0x0, HDA_OUTPUT),
383 HDA_CODEC_MUTE("Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
384 { } /* end */
385};
386
d1d985f0 387static struct snd_kcontrol_new stac927x_mixer[] = {
3cc08dc6
MP		 388 {
389 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
390 .name = "Input Source",
391 .count = 1,
392 .info = stac92xx_mux_enum_info,
393 .get = stac92xx_mux_enum_get,
394 .put = stac92xx_mux_enum_put,
395 },
396 HDA_CODEC_VOLUME("InMux Capture Volume", 0x15, 0x0, HDA_OUTPUT),
397 HDA_CODEC_VOLUME("InVol Capture Volume", 0x18, 0x0, HDA_INPUT),
398 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
399 { } /* end */
400};
401
d1d985f0 402static struct snd_kcontrol_new stac9205_mixer[] = {
8b65727b
MP		 403 {
404 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
405 .name = "Digital Input Source",
406 .count = 1,
407 .info = stac92xx_dmux_enum_info,
408 .get = stac92xx_dmux_enum_get,
409 .put = stac92xx_dmux_enum_put,
410 },
f3302a59
MP		 411 {
412 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
413 .name = "Input Source",
414 .count = 1,
415 .info = stac92xx_mux_enum_info,
416 .get = stac92xx_mux_enum_get,
417 .put = stac92xx_mux_enum_put,
418 },
419 HDA_CODEC_VOLUME("InMux Capture Volume", 0x19, 0x0, HDA_OUTPUT),
420 HDA_CODEC_VOLUME("InVol Capture Volume", 0x1b, 0x0, HDA_INPUT),
421 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1d, 0x0, HDA_OUTPUT),
422 { } /* end */
423};
424
2f2f4251
M		 425static int stac92xx_build_controls(struct hda_codec *codec)
426{
427 struct sigmatel_spec *spec = codec->spec;
428 int err;
c7d4b2fa 429 int i;
2f2f4251
M		 430
431 err = snd_hda_add_new_ctls(codec, spec->mixer);
432 if (err < 0)
433 return err;
c7d4b2fa
M		 434
435 for (i = 0; i < spec->num_mixers; i++) {
436 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
437 if (err < 0)
438 return err;
439 }
440
dabbed6f
M		 441 if (spec->multiout.dig_out_nid) {
442 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
443 if (err < 0)
444 return err;
445 }
446 if (spec->dig_in_nid) {
447 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
448 if (err < 0)
449 return err;
450 }
451 return 0;
2f2f4251
M		 452}
453
403d1944 454static unsigned int ref9200_pin_configs[8] = {
dabbed6f 455 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 456 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
457};
458
f5fcc13c
TI		 459static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
460 [STAC_REF] = ref9200_pin_configs,
403d1944
MP		 461};
462
f5fcc13c
TI		 463static const char *stac9200_models[STAC_9200_MODELS] = {
464 [STAC_REF] = "ref",
465};
466
467static struct snd_pci_quirk stac9200_cfg_tbl[] = {
468 /* SigmaTel reference board */
469 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
470 "DFI LanParty", STAC_REF),
e7377071 471 /* Dell laptops have BIOS problem */
f5fcc13c
TI		 472 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
473 "Dell Inspiron 630m", STAC_REF),
474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
475 "Dell Latitude D620", STAC_REF),
476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
477 "Dell Latitude 120L", STAC_REF),
877b866d
CT		 478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
479 "Dell Latitude D820", STAC_REF),
46f02ca3
MN		 480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
481 "Dell Inspiron E1705/9400", STAC_REF),
482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
483 "Dell XPS M1710", STAC_REF),
f0f96745
TI		 484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
485 "Dell Precision M90", STAC_REF),
8286c53e
DC		 486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
487 "unknown Dell", STAC_REF),
49c605db
TD		 488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
489 "Dell Inspiron 640m", STAC_REF),
490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
491 "Dell Inspiron 1501", STAC_REF),
492
493 /* Panasonic */
494 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
495
403d1944
MP		 496 {} /* terminator */
497};
498
8e21c34c
TD		 499static unsigned int ref925x_pin_configs[8] = {
500 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
501 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
502};
503
504static unsigned int stac925x_MA6_pin_configs[8] = {
505 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
506 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
507};
508
2c11f955
TD		 509static unsigned int stac925x_PA6_pin_configs[8] = {
510 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
511 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
512};
513
8e21c34c 514static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 515 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
516 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 517};
518
519static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
520 [STAC_REF] = ref925x_pin_configs,
521 [STAC_M2_2] = stac925xM2_2_pin_configs,
522 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 523 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 524};
525
526static const char *stac925x_models[STAC_925x_MODELS] = {
527 [STAC_REF] = "ref",
528 [STAC_M2_2] = "m2-2",
529 [STAC_MA6] = "m6",
2c11f955 530 [STAC_PA6] = "pa6",
8e21c34c
TD		 531};
532
533static struct snd_pci_quirk stac925x_cfg_tbl[] = {
534 /* SigmaTel reference board */
535 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 536 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 537 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
538 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
539 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 540 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 541 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
542 {} /* terminator */
543};
544
403d1944
MP		 545static unsigned int ref922x_pin_configs[10] = {
546 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
547 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 548 0x40000100, 0x40000100,
549};
550
403d1944 551static unsigned int d945gtp3_pin_configs[10] = {
869264c4 552 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 553 0x40000100, 0x40000100, 0x40000100, 0x40000100,
554 0x02a19120, 0x40000100,
555};
556
557static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 558 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
559 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 560 0x02a19320, 0x40000100,
561};
562
5d5d3bc3
IZ		 563static unsigned int intel_mac_v1_pin_configs[10] = {
564 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
565 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
566 0x400000fc, 0x400000fb,
567};
568
569static unsigned int intel_mac_v2_pin_configs[10] = {
570 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
571 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
572 0x400000fc, 0x400000fb,
6f0778d8
NB		 573};
574
5d5d3bc3
IZ		 575static unsigned int intel_mac_v3_pin_configs[10] = {
576 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
577 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 578 0x400000fc, 0x400000fb,
579};
580
5d5d3bc3
IZ		 581static unsigned int intel_mac_v4_pin_configs[10] = {
582 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
583 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 584 0x400000fc, 0x400000fb,
585};
586
5d5d3bc3
IZ		 587static unsigned int intel_mac_v5_pin_configs[10] = {
588 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
589 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
590 0x400000fc, 0x400000fb,
0dae0f83
TI		 591};
592
76c08828
TI		 593static unsigned int stac922x_dell_pin_configs[10] = {
594 0x0221121e, 0x408103ff, 0x02a1123e, 0x90100310,
595 0x408003f1, 0x0221122f, 0x03451340, 0x40c003f2,
596 0x50a003f3, 0x405003f4
597};
598
19039bd0 599static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 600 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 601 [STAC_D945GTP3] = d945gtp3_pin_configs,
602 [STAC_D945GTP5] = d945gtp5_pin_configs,
76c08828 603 [STAC_922X_DELL] = stac922x_dell_pin_configs,
5d5d3bc3
IZ		 604 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
605 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
606 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
607 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
608 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
609 /* for backward compitability */
610 [STAC_MACMINI] = intel_mac_v3_pin_configs,
611 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
612 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
613 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
614 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
615 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
403d1944
MP		 616};
617
f5fcc13c
TI		 618static const char *stac922x_models[STAC_922X_MODELS] = {
619 [STAC_D945_REF] = "ref",
620 [STAC_D945GTP5] = "5stack",
621 [STAC_D945GTP3] = "3stack",
76c08828 622 [STAC_922X_DELL] = "dell",
5d5d3bc3
IZ		 623 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
624 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
625 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
626 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
627 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
628 /* for backward compitability */
f5fcc13c 629 [STAC_MACMINI] = "macmini",
3fc24d85 630 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 631 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
632 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 633 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 634 [STAC_IMAC_INTEL_20] = "imac-intel-20",
f5fcc13c
TI		 635};
636
637static struct snd_pci_quirk stac922x_cfg_tbl[] = {
638 /* SigmaTel reference board */
639 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
640 "DFI LanParty", STAC_D945_REF),
641 /* Intel 945G based systems */
642 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
643 "Intel D945G", STAC_D945GTP3),
644 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
645 "Intel D945G", STAC_D945GTP3),
646 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
647 "Intel D945G", STAC_D945GTP3),
648 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
649 "Intel D945G", STAC_D945GTP3),
650 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
651 "Intel D945G", STAC_D945GTP3),
652 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
653 "Intel D945G", STAC_D945GTP3),
654 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
655 "Intel D945G", STAC_D945GTP3),
656 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
657 "Intel D945G", STAC_D945GTP3),
658 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
659 "Intel D945G", STAC_D945GTP3),
660 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
661 "Intel D945G", STAC_D945GTP3),
662 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
663 "Intel D945G", STAC_D945GTP3),
664 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
665 "Intel D945G", STAC_D945GTP3),
666 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
667 "Intel D945G", STAC_D945GTP3),
668 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
669 "Intel D945G", STAC_D945GTP3),
670 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
671 "Intel D945G", STAC_D945GTP3),
672 /* Intel D945G 5-stack systems */
673 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
674 "Intel D945G", STAC_D945GTP5),
675 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
676 "Intel D945G", STAC_D945GTP5),
677 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
678 "Intel D945G", STAC_D945GTP5),
679 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
680 "Intel D945G", STAC_D945GTP5),
681 /* Intel 945P based systems */
682 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
683 "Intel D945P", STAC_D945GTP3),
684 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
685 "Intel D945P", STAC_D945GTP3),
686 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
687 "Intel D945P", STAC_D945GTP3),
688 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
689 "Intel D945P", STAC_D945GTP3),
690 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
691 "Intel D945P", STAC_D945GTP3),
692 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
693 "Intel D945P", STAC_D945GTP5),
694 /* other systems */
695 /* Apple Mac Mini (early 2006) */
696 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 697 "Mac Mini", STAC_INTEL_MAC_V3),
76c08828
TI		 698 /* Dell */
699 SND_PCI_QUIRK(0x1028, 0x01d7, "Dell XPS M1210", STAC_922X_DELL),
700
403d1944
MP		 701 {} /* terminator */
702};
703
3cc08dc6 704static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 705 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
706 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
707 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
708 0x01c42190, 0x40000100,
3cc08dc6
MP		 709};
710
93ed1503 711static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 712 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
713 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
714 0x40000100, 0x40000100, 0x40000100, 0x40000100,
715 0x40000100, 0x40000100
716};
717
93ed1503
TD		 718static unsigned int d965_5st_pin_configs[14] = {
719 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
720 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
721 0x40000100, 0x40000100, 0x40000100, 0x01442070,
722 0x40000100, 0x40000100
723};
724
4ff076e5
TD		 725static unsigned int dell_3st_pin_configs[14] = {
726 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
727 0x01111212, 0x01116211, 0x01813050, 0x01112214,
728 0x403003fa, 0x40000100, 0x40000100, 0x404003fb,
729 0x40c003fc, 0x40000100
730};
731
93ed1503 732static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
f5fcc13c 733 [STAC_D965_REF] = ref927x_pin_configs,
93ed1503
TD		 734 [STAC_D965_3ST] = d965_3st_pin_configs,
735 [STAC_D965_5ST] = d965_5st_pin_configs,
4ff076e5 736 [STAC_DELL_3ST] = dell_3st_pin_configs,
3cc08dc6
MP		 737};
738
f5fcc13c
TI		 739static const char *stac927x_models[STAC_927X_MODELS] = {
740 [STAC_D965_REF] = "ref",
741 [STAC_D965_3ST] = "3stack",
742 [STAC_D965_5ST] = "5stack",
4ff076e5 743 [STAC_DELL_3ST] = "dell-3stack",
f5fcc13c
TI		 744};
745
746static struct snd_pci_quirk stac927x_cfg_tbl[] = {
747 /* SigmaTel reference board */
748 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
749 "DFI LanParty", STAC_D965_REF),
81d3dbde 750 /* Intel 946 based systems */
f5fcc13c
TI		 751 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
752 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 753 /* 965 based 3 stack systems */
f5fcc13c
TI		 754 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
755 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
756 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
757 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
758 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
759 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
760 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
761 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
762 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
763 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
764 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
765 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
766 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
767 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
768 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
769 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5
TD		 770 /* Dell 3 stack systems */
771 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell E520", STAC_DELL_3ST),
772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
773 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
93ed1503 774 /* 965 based 5 stack systems */
f5fcc13c
TI		 775 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
776 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
777 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
778 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
779 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
780 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
781 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
782 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
783 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 784 {} /* terminator */
785};
786
f3302a59
MP		 787static unsigned int ref9205_pin_configs[12] = {
788 0x40000100, 0x40000100, 0x01016011, 0x01014010,
8b65727b
MP		 789 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
790 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 791};
792
ae0a8ed8
TD		 793static unsigned int dell_m43_9205_pin_configs[12] = {
794 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
795 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
796 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
797};
798
799static unsigned int dell_m44_9205_pin_configs[12] = {
800 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
801 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
802 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
803};
804
805
f5fcc13c 806static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8
TD		 807 [STAC_9205_REF] = ref9205_pin_configs,
808 [STAC_9205_DELL_M43] = dell_m43_9205_pin_configs,
809 [STAC_9205_DELL_M44] = dell_m44_9205_pin_configs,
810 [STAC_9205_M43xx] = NULL,
f3302a59
MP		 811};
812
f5fcc13c
TI		 813static const char *stac9205_models[STAC_9205_MODELS] = {
814 [STAC_9205_REF] = "ref",
ae0a8ed8
TD		 815 [STAC_9205_DELL_M43] = "dell-m43",
816 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 817};
818
819static struct snd_pci_quirk stac9205_cfg_tbl[] = {
820 /* SigmaTel reference board */
821 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
822 "DFI LanParty", STAC_9205_REF),
ae0a8ed8
TD		 823 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
824 "Dell Precision", STAC_9205_M43xx),
825 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
826 "Dell Precision", STAC_9205_DELL_M43),
827 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
828 "Dell Precision", STAC_9205_DELL_M43),
829 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
830 "Dell Precision", STAC_9205_DELL_M43),
831 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
832 "Dell Precision", STAC_9205_DELL_M43),
833 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
834 "Dell Precision", STAC_9205_DELL_M43),
835 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
836 "Dell Inspiron", STAC_9205_DELL_M44),
837 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
838 "Dell Inspiron", STAC_9205_DELL_M44),
839 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
840 "Dell Inspiron", STAC_9205_DELL_M44),
841 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
842 "Dell Inspiron", STAC_9205_DELL_M44),
843 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
844 "Dell Inspiron", STAC_9205_DELL_M44),
f3302a59
MP		 845 {} /* terminator */
846};
847
11b44bbd
RF		 848static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
849{
850 int i;
851 struct sigmatel_spec *spec = codec->spec;
852
853 if (! spec->bios_pin_configs) {
854 spec->bios_pin_configs = kcalloc(spec->num_pins,
855 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
856 if (! spec->bios_pin_configs)
857 return -ENOMEM;
858 }
859
860 for (i = 0; i < spec->num_pins; i++) {
861 hda_nid_t nid = spec->pin_nids[i];
862 unsigned int pin_cfg;
863
864 pin_cfg = snd_hda_codec_read(codec, nid, 0,
865 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
866 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
867 nid, pin_cfg);
868 spec->bios_pin_configs[i] = pin_cfg;
869 }
870
871 return 0;
872}
873
87d48363
MR		 874static void stac92xx_set_config_reg(struct hda_codec *codec,
875 hda_nid_t pin_nid, unsigned int pin_config)
876{
877 int i;
878 snd_hda_codec_write(codec, pin_nid, 0,
879 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
880 pin_config & 0x000000ff);
881 snd_hda_codec_write(codec, pin_nid, 0,
882 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
883 (pin_config & 0x0000ff00) >> 8);
884 snd_hda_codec_write(codec, pin_nid, 0,
885 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
886 (pin_config & 0x00ff0000) >> 16);
887 snd_hda_codec_write(codec, pin_nid, 0,
888 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
889 pin_config >> 24);
890 i = snd_hda_codec_read(codec, pin_nid, 0,
891 AC_VERB_GET_CONFIG_DEFAULT,
892 0x00);
893 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
894 pin_nid, i);
895}
896
2f2f4251
M		 897static void stac92xx_set_config_regs(struct hda_codec *codec)
898{
899 int i;
900 struct sigmatel_spec *spec = codec->spec;
2f2f4251 901
87d48363
MR		 902 if (!spec->pin_configs)
903 return;
11b44bbd 904
87d48363
MR		 905 for (i = 0; i < spec->num_pins; i++)
906 stac92xx_set_config_reg(codec, spec->pin_nids[i],
907 spec->pin_configs[i]);
2f2f4251 908}
2f2f4251 909
8259980e 910static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
92a22beb 911{
8259980e 912 struct sigmatel_spec *spec = codec->spec;
87d48363 913 /* Configure GPIOx as output */
82beb8fd
TI		 914 snd_hda_codec_write_cache(codec, codec->afg, 0,
915 AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
87d48363 916 /* Configure GPIOx as CMOS */
82beb8fd 917 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
87d48363 918 /* Assert GPIOx */
82beb8fd
TI		 919 snd_hda_codec_write_cache(codec, codec->afg, 0,
920 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
87d48363 921 /* Enable GPIOx */
82beb8fd
TI		 922 snd_hda_codec_write_cache(codec, codec->afg, 0,
923 AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
92a22beb
MR		 924}
925
dabbed6f 926/*
c7d4b2fa 927 * Analog playback callbacks
dabbed6f 928 */
c7d4b2fa
M		 929static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
930 struct hda_codec *codec,
c8b6bf9b 931 struct snd_pcm_substream *substream)
2f2f4251 932{
dabbed6f 933 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 934 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 935}
936
2f2f4251
M		 937static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
938 struct hda_codec *codec,
939 unsigned int stream_tag,
940 unsigned int format,
c8b6bf9b 941 struct snd_pcm_substream *substream)
2f2f4251
M		 942{
943 struct sigmatel_spec *spec = codec->spec;
403d1944 944 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 945}
946
947static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
948 struct hda_codec *codec,
c8b6bf9b 949 struct snd_pcm_substream *substream)
2f2f4251
M		 950{
951 struct sigmatel_spec *spec = codec->spec;
952 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
953}
954
dabbed6f
M		 955/*
956 * Digital playback callbacks
957 */
958static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
959 struct hda_codec *codec,
c8b6bf9b 960 struct snd_pcm_substream *substream)
dabbed6f
M		 961{
962 struct sigmatel_spec *spec = codec->spec;
963 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
964}
965
966static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
967 struct hda_codec *codec,
c8b6bf9b 968 struct snd_pcm_substream *substream)
dabbed6f
M		 969{
970 struct sigmatel_spec *spec = codec->spec;
971 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
972}
973
6b97eb45
TI		 974static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
975 struct hda_codec *codec,
976 unsigned int stream_tag,
977 unsigned int format,
978 struct snd_pcm_substream *substream)
979{
980 struct sigmatel_spec *spec = codec->spec;
981 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
982 stream_tag, format, substream);
983}
984
dabbed6f 985
2f2f4251
M		 986/*
987 * Analog capture callbacks
988 */
989static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
990 struct hda_codec *codec,
991 unsigned int stream_tag,
992 unsigned int format,
c8b6bf9b 993 struct snd_pcm_substream *substream)
2f2f4251
M		 994{
995 struct sigmatel_spec *spec = codec->spec;
996
997 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
998 stream_tag, 0, format);
999 return 0;
1000}
1001
1002static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1003 struct hda_codec *codec,
c8b6bf9b 1004 struct snd_pcm_substream *substream)
2f2f4251
M		 1005{
1006 struct sigmatel_spec *spec = codec->spec;
1007
1008 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1009 return 0;
1010}
1011
dabbed6f
M		 1012static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1013 .substreams = 1,
1014 .channels_min = 2,
1015 .channels_max = 2,
1016 /* NID is set in stac92xx_build_pcms */
1017 .ops = {
1018 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1019 .close = stac92xx_dig_playback_pcm_close,
1020 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1021 },
1022};
1023
1024static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1025 .substreams = 1,
1026 .channels_min = 2,
1027 .channels_max = 2,
1028 /* NID is set in stac92xx_build_pcms */
1029};
1030
2f2f4251
M		 1031static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1032 .substreams = 1,
1033 .channels_min = 2,
c7d4b2fa 1034 .channels_max = 8,
2f2f4251
M		 1035 .nid = 0x02, /* NID to query formats and rates */
1036 .ops = {
1037 .open = stac92xx_playback_pcm_open,
1038 .prepare = stac92xx_playback_pcm_prepare,
1039 .cleanup = stac92xx_playback_pcm_cleanup
1040 },
1041};
1042
3cc08dc6
MP		 1043static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1044 .substreams = 1,
1045 .channels_min = 2,
1046 .channels_max = 2,
1047 .nid = 0x06, /* NID to query formats and rates */
1048 .ops = {
1049 .open = stac92xx_playback_pcm_open,
1050 .prepare = stac92xx_playback_pcm_prepare,
1051 .cleanup = stac92xx_playback_pcm_cleanup
1052 },
1053};
1054
2f2f4251
M		 1055static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
1056 .substreams = 2,
1057 .channels_min = 2,
1058 .channels_max = 2,
3cc08dc6 1059 /* NID is set in stac92xx_build_pcms */
2f2f4251
M		 1060 .ops = {
1061 .prepare = stac92xx_capture_pcm_prepare,
1062 .cleanup = stac92xx_capture_pcm_cleanup
1063 },
1064};
1065
1066static int stac92xx_build_pcms(struct hda_codec *codec)
1067{
1068 struct sigmatel_spec *spec = codec->spec;
1069 struct hda_pcm *info = spec->pcm_rec;
1070
1071 codec->num_pcms = 1;
1072 codec->pcm_info = info;
1073
c7d4b2fa 1074 info->name = "STAC92xx Analog";
2f2f4251 1075 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1076 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6
MP		 1077 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
1078
1079 if (spec->alt_switch) {
1080 codec->num_pcms++;
1081 info++;
1082 info->name = "STAC92xx Analog Alt";
1083 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1084 }
2f2f4251 1085
dabbed6f
M		 1086 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1087 codec->num_pcms++;
1088 info++;
1089 info->name = "STAC92xx Digital";
1090 if (spec->multiout.dig_out_nid) {
1091 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1092 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1093 }
1094 if (spec->dig_in_nid) {
1095 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1096 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1097 }
1098 }
1099
2f2f4251
M		 1100 return 0;
1101}
1102
c960a03b
TI		 1103static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1104{
1105 unsigned int pincap = snd_hda_param_read(codec, nid,
1106 AC_PAR_PIN_CAP);
1107 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1108 if (pincap & AC_PINCAP_VREF_100)
1109 return AC_PINCTL_VREF_100;
1110 if (pincap & AC_PINCAP_VREF_80)
1111 return AC_PINCTL_VREF_80;
1112 if (pincap & AC_PINCAP_VREF_50)
1113 return AC_PINCTL_VREF_50;
1114 if (pincap & AC_PINCAP_VREF_GRD)
1115 return AC_PINCTL_VREF_GRD;
1116 return 0;
1117}
1118
403d1944
MP		 1119static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1120
1121{
82beb8fd
TI		 1122 snd_hda_codec_write_cache(codec, nid, 0,
1123 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1124}
1125
a5ce8890 1126#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1127
1128static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1129{
1130 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1131 struct sigmatel_spec *spec = codec->spec;
1132 int io_idx = kcontrol-> private_value & 0xff;
1133
1134 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1135 return 0;
1136}
1137
1138static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1139{
1140 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1141 struct sigmatel_spec *spec = codec->spec;
1142 hda_nid_t nid = kcontrol->private_value >> 8;
1143 int io_idx = kcontrol-> private_value & 0xff;
1144 unsigned short val = ucontrol->value.integer.value[0];
1145
1146 spec->io_switch[io_idx] = val;
1147
1148 if (val)
1149 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1150 else {
1151 unsigned int pinctl = AC_PINCTL_IN_EN;
1152 if (io_idx) /* set VREF for mic */
1153 pinctl |= stac92xx_get_vref(codec, nid);
1154 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1155 }
403d1944
MP		 1156 return 1;
1157}
1158
1159#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1160 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1161 .name = xname, \
1162 .index = 0, \
1163 .info = stac92xx_io_switch_info, \
1164 .get = stac92xx_io_switch_get, \
1165 .put = stac92xx_io_switch_put, \
1166 .private_value = xpval, \
1167 }
1168
1169
c7d4b2fa
M		 1170enum {
1171 STAC_CTL_WIDGET_VOL,
1172 STAC_CTL_WIDGET_MUTE,
403d1944 1173 STAC_CTL_WIDGET_IO_SWITCH,
c7d4b2fa
M		 1174};
1175
c8b6bf9b 1176static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 1177 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
1178 HDA_CODEC_MUTE(NULL, 0, 0, 0),
403d1944 1179 STAC_CODEC_IO_SWITCH(NULL, 0),
c7d4b2fa
M		 1180};
1181
1182/* add dynamic controls */
1183static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
1184{
c8b6bf9b 1185 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 1186
1187 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
1188 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
1189
1190 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
1191 if (! knew)
1192 return -ENOMEM;
1193 if (spec->kctl_alloc) {
1194 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
1195 kfree(spec->kctl_alloc);
1196 }
1197 spec->kctl_alloc = knew;
1198 spec->num_kctl_alloc = num;
1199 }
1200
1201 knew = &spec->kctl_alloc[spec->num_kctl_used];
1202 *knew = stac92xx_control_templates[type];
82fe0c58 1203 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 1204 if (! knew->name)
1205 return -ENOMEM;
1206 knew->private_value = val;
1207 spec->num_kctl_used++;
1208 return 0;
1209}
1210
403d1944
MP		 1211/* flag inputs as additional dynamic lineouts */
1212static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
1213{
1214 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1215 unsigned int wcaps, wtype;
1216 int i, num_dacs = 0;
1217
1218 /* use the wcaps cache to count all DACs available for line-outs */
1219 for (i = 0; i < codec->num_nodes; i++) {
1220 wcaps = codec->wcaps[i];
1221 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1222 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
1223 num_dacs++;
1224 }
403d1944 1225
7b043899
SL		 1226 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
1227
403d1944
MP		 1228 switch (cfg->line_outs) {
1229 case 3:
1230 /* add line-in as side */
7b043899 1231 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
403d1944
MP		 1232 cfg->line_out_pins[3] = cfg->input_pins[AUTO_PIN_LINE];
1233 spec->line_switch = 1;
1234 cfg->line_outs++;
1235 }
1236 break;
1237 case 2:
1238 /* add line-in as clfe and mic as side */
7b043899 1239 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
403d1944
MP		 1240 cfg->line_out_pins[2] = cfg->input_pins[AUTO_PIN_LINE];
1241 spec->line_switch = 1;
1242 cfg->line_outs++;
1243 }
7b043899 1244 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
403d1944
MP		 1245 cfg->line_out_pins[3] = cfg->input_pins[AUTO_PIN_MIC];
1246 spec->mic_switch = 1;
1247 cfg->line_outs++;
1248 }
1249 break;
1250 case 1:
1251 /* add line-in as surr and mic as clfe */
7b043899 1252 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
403d1944
MP		 1253 cfg->line_out_pins[1] = cfg->input_pins[AUTO_PIN_LINE];
1254 spec->line_switch = 1;
1255 cfg->line_outs++;
1256 }
7b043899 1257 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
403d1944
MP		 1258 cfg->line_out_pins[2] = cfg->input_pins[AUTO_PIN_MIC];
1259 spec->mic_switch = 1;
1260 cfg->line_outs++;
1261 }
1262 break;
1263 }
1264
1265 return 0;
1266}
1267
7b043899
SL		 1268
1269static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
1270{
1271 int i;
1272
1273 for (i = 0; i < spec->multiout.num_dacs; i++) {
1274 if (spec->multiout.dac_nids[i] == nid)
1275 return 1;
1276 }
1277
1278 return 0;
1279}
1280
3cc08dc6 1281/*
7b043899
SL		 1282 * Fill in the dac_nids table from the parsed pin configuration
1283 * This function only works when every pin in line_out_pins[]
1284 * contains atleast one DAC in its connection list. Some 92xx
1285 * codecs are not connected directly to a DAC, such as the 9200
1286 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 1287 */
19039bd0 1288static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 1289 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 1290{
1291 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1292 int i, j, conn_len = 0;
1293 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
1294 unsigned int wcaps, wtype;
1295
c7d4b2fa
M		 1296 for (i = 0; i < cfg->line_outs; i++) {
1297 nid = cfg->line_out_pins[i];
7b043899
SL		 1298 conn_len = snd_hda_get_connections(codec, nid, conn,
1299 HDA_MAX_CONNECTIONS);
1300 for (j = 0; j < conn_len; j++) {
1301 wcaps = snd_hda_param_read(codec, conn[j],
1302 AC_PAR_AUDIO_WIDGET_CAP);
1303 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1304
1305 if (wtype != AC_WID_AUD_OUT ||
1306 (wcaps & AC_WCAP_DIGITAL))
1307 continue;
1308 /* conn[j] is a DAC routed to this line-out */
1309 if (!is_in_dac_nids(spec, conn[j]))
1310 break;
1311 }
1312
1313 if (j == conn_len) {
df802952
TI		 1314 if (spec->multiout.num_dacs > 0) {
1315 /* we have already working output pins,
1316 * so let's drop the broken ones again
1317 */
1318 cfg->line_outs = spec->multiout.num_dacs;
1319 break;
1320 }
7b043899
SL		 1321 /* error out, no available DAC found */
1322 snd_printk(KERN_ERR
1323 "%s: No available DAC for pin 0x%x\n",
1324 __func__, nid);
1325 return -ENODEV;
1326 }
1327
1328 spec->multiout.dac_nids[i] = conn[j];
1329 spec->multiout.num_dacs++;
1330 if (conn_len > 1) {
1331 /* select this DAC in the pin's input mux */
82beb8fd
TI		 1332 snd_hda_codec_write_cache(codec, nid, 0,
1333 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 1334
7b043899
SL		 1335 }
1336 }
c7d4b2fa 1337
7b043899
SL		 1338 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
1339 spec->multiout.num_dacs,
1340 spec->multiout.dac_nids[0],
1341 spec->multiout.dac_nids[1],
1342 spec->multiout.dac_nids[2],
1343 spec->multiout.dac_nids[3],
1344 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 1345 return 0;
1346}
1347
eb06ed8f
TI		 1348/* create volume control/switch for the given prefx type */
1349static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
1350{
1351 char name[32];
1352 int err;
1353
1354 sprintf(name, "%s Playback Volume", pfx);
1355 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
1356 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1357 if (err < 0)
1358 return err;
1359 sprintf(name, "%s Playback Switch", pfx);
1360 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
1361 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1362 if (err < 0)
1363 return err;
1364 return 0;
1365}
1366
c7d4b2fa 1367/* add playback controls from the parsed DAC table */
19039bd0
TI		 1368static int stac92xx_auto_create_multi_out_ctls(struct sigmatel_spec *spec,
1369 const struct auto_pin_cfg *cfg)
c7d4b2fa 1370{
19039bd0
TI		 1371 static const char *chname[4] = {
1372 "Front", "Surround", NULL /*CLFE*/, "Side"
1373 };
c7d4b2fa
M		 1374 hda_nid_t nid;
1375 int i, err;
1376
1377 for (i = 0; i < cfg->line_outs; i++) {
403d1944 1378 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 1379 continue;
1380
1381 nid = spec->multiout.dac_nids[i];
1382
1383 if (i == 2) {
1384 /* Center/LFE */
eb06ed8f
TI		 1385 err = create_controls(spec, "Center", nid, 1);
1386 if (err < 0)
c7d4b2fa 1387 return err;
eb06ed8f
TI		 1388 err = create_controls(spec, "LFE", nid, 2);
1389 if (err < 0)
c7d4b2fa
M		 1390 return err;
1391 } else {
eb06ed8f
TI		 1392 err = create_controls(spec, chname[i], nid, 3);
1393 if (err < 0)
c7d4b2fa
M		 1394 return err;
1395 }
1396 }
1397
403d1944
MP		 1398 if (spec->line_switch)
1399 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
1400 return err;
1401
1402 if (spec->mic_switch)
1403 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
1404 return err;
1405
c7d4b2fa
M		 1406 return 0;
1407}
1408
eb06ed8f 1409static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 1410{
7b043899
SL		 1411 if (is_in_dac_nids(spec, nid))
1412 return 1;
eb06ed8f
TI		 1413 if (spec->multiout.hp_nid == nid)
1414 return 1;
1415 return 0;
1416}
c7d4b2fa 1417
eb06ed8f
TI		 1418static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
1419{
1420 if (!spec->multiout.hp_nid)
1421 spec->multiout.hp_nid = nid;
1422 else if (spec->multiout.num_dacs > 4) {
1423 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
1424 return 1;
1425 } else {
1426 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
1427 spec->multiout.num_dacs++;
1428 }
1429 return 0;
1430}
4e55096e 1431
eb06ed8f
TI		 1432/* add playback controls for Speaker and HP outputs */
1433static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
1434 struct auto_pin_cfg *cfg)
1435{
1436 struct sigmatel_spec *spec = codec->spec;
1437 hda_nid_t nid;
1438 int i, old_num_dacs, err;
1439
1440 old_num_dacs = spec->multiout.num_dacs;
1441 for (i = 0; i < cfg->hp_outs; i++) {
1442 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
1443 if (wid_caps & AC_WCAP_UNSOL_CAP)
1444 spec->hp_detect = 1;
1445 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
1446 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1447 if (check_in_dac_nids(spec, nid))
1448 nid = 0;
1449 if (! nid)
c7d4b2fa 1450 continue;
eb06ed8f
TI		 1451 add_spec_dacs(spec, nid);
1452 }
1453 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 1454 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 1455 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1456 if (check_in_dac_nids(spec, nid))
1457 nid = 0;
eb06ed8f
TI		 1458 if (! nid)
1459 continue;
1460 add_spec_dacs(spec, nid);
c7d4b2fa 1461 }
1b290a51
MR		 1462 for (i = 0; i < cfg->line_outs; i++) {
1463 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
1464 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1465 if (check_in_dac_nids(spec, nid))
1466 nid = 0;
1467 if (! nid)
1468 continue;
1469 add_spec_dacs(spec, nid);
1470 }
eb06ed8f
TI		 1471 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
1472 static const char *pfxs[] = {
1473 "Speaker", "External Speaker", "Speaker2",
1474 };
1475 err = create_controls(spec, pfxs[i - old_num_dacs],
1476 spec->multiout.dac_nids[i], 3);
1477 if (err < 0)
1478 return err;
1479 }
1480 if (spec->multiout.hp_nid) {
1481 const char *pfx;
1482 if (old_num_dacs == spec->multiout.num_dacs)
1483 pfx = "Master";
1484 else
1485 pfx = "Headphone";
1486 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
1487 if (err < 0)
1488 return err;
1489 }
c7d4b2fa
M		 1490
1491 return 0;
1492}
1493
8b65727b 1494/* labels for dmic mux inputs */
ddc2cec4 1495static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 1496 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
1497 "Digital Mic 3", "Digital Mic 4"
1498};
1499
1500/* create playback/capture controls for input pins on dmic capable codecs */
1501static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
1502 const struct auto_pin_cfg *cfg)
1503{
1504 struct sigmatel_spec *spec = codec->spec;
1505 struct hda_input_mux *dimux = &spec->private_dimux;
1506 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1507 int i, j;
1508
1509 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
1510 dimux->items[dimux->num_items].index = 0;
1511 dimux->num_items++;
1512
1513 for (i = 0; i < spec->num_dmics; i++) {
1514 int index;
1515 int num_cons;
1516 unsigned int def_conf;
1517
1518 def_conf = snd_hda_codec_read(codec,
1519 spec->dmic_nids[i],
1520 0,
1521 AC_VERB_GET_CONFIG_DEFAULT,
1522 0);
1523 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
1524 continue;
1525
1526 num_cons = snd_hda_get_connections(codec,
1527 spec->dmux_nid,
1528 con_lst,
1529 HDA_MAX_NUM_INPUTS);
1530 for (j = 0; j < num_cons; j++)
1531 if (con_lst[j] == spec->dmic_nids[i]) {
1532 index = j;
1533 goto found;
1534 }
1535 continue;
1536found:
1537 dimux->items[dimux->num_items].label =
1538 stac92xx_dmic_labels[dimux->num_items];
1539 dimux->items[dimux->num_items].index = index;
1540 dimux->num_items++;
1541 }
1542
1543 return 0;
1544}
1545
c7d4b2fa
M		 1546/* create playback/capture controls for input pins */
1547static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
1548{
1549 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 1550 struct hda_input_mux *imux = &spec->private_imux;
1551 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1552 int i, j, k;
1553
1554 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 1555 int index;
1556
1557 if (!cfg->input_pins[i])
1558 continue;
1559 index = -1;
1560 for (j = 0; j < spec->num_muxes; j++) {
1561 int num_cons;
1562 num_cons = snd_hda_get_connections(codec,
1563 spec->mux_nids[j],
1564 con_lst,
1565 HDA_MAX_NUM_INPUTS);
1566 for (k = 0; k < num_cons; k++)
1567 if (con_lst[k] == cfg->input_pins[i]) {
1568 index = k;
1569 goto found;
1570 }
c7d4b2fa 1571 }
314634bc
TI		 1572 continue;
1573 found:
1574 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
1575 imux->items[imux->num_items].index = index;
1576 imux->num_items++;
c7d4b2fa
M		 1577 }
1578
7b043899 1579 if (imux->num_items) {
62fe78e9
SR		 1580 /*
1581 * Set the current input for the muxes.
1582 * The STAC9221 has two input muxes with identical source
1583 * NID lists. Hopefully this won't get confused.
1584 */
1585 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 1586 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
1587 AC_VERB_SET_CONNECT_SEL,
1588 imux->items[0].index);
62fe78e9
SR		 1589 }
1590 }
1591
c7d4b2fa
M		 1592 return 0;
1593}
1594
c7d4b2fa
M		 1595static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
1596{
1597 struct sigmatel_spec *spec = codec->spec;
1598 int i;
1599
1600 for (i = 0; i < spec->autocfg.line_outs; i++) {
1601 hda_nid_t nid = spec->autocfg.line_out_pins[i];
1602 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
1603 }
1604}
1605
1606static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
1607{
1608 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 1609 int i;
c7d4b2fa 1610
eb06ed8f
TI		 1611 for (i = 0; i < spec->autocfg.hp_outs; i++) {
1612 hda_nid_t pin;
1613 pin = spec->autocfg.hp_pins[i];
1614 if (pin) /* connect to front */
1615 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
1616 }
1617 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
1618 hda_nid_t pin;
1619 pin = spec->autocfg.speaker_pins[i];
1620 if (pin) /* connect to front */
1621 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
1622 }
c7d4b2fa
M		 1623}
1624
3cc08dc6 1625static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 1626{
1627 struct sigmatel_spec *spec = codec->spec;
1628 int err;
1629
8b65727b
MP		 1630 if ((err = snd_hda_parse_pin_def_config(codec,
1631 &spec->autocfg,
1632 spec->dmic_nids)) < 0)
c7d4b2fa 1633 return err;
82bc955f 1634 if (! spec->autocfg.line_outs)
869264c4 1635 return 0; /* can't find valid pin config */
19039bd0 1636
403d1944
MP		 1637 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
1638 return err;
19039bd0
TI		 1639 if (spec->multiout.num_dacs == 0)
1640 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
1641 return err;
c7d4b2fa
M		 1642
1643 if ((err = stac92xx_auto_create_multi_out_ctls(spec, &spec->autocfg)) < 0 ||
1644 (err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg)) < 0 ||
1645 (err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
1646 return err;
1647
8b65727b
MP		 1648 if (spec->num_dmics > 0)
1649 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
1650 &spec->autocfg)) < 0)
1651 return err;
1652
c7d4b2fa 1653 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 1654 if (spec->multiout.max_channels > 2)
c7d4b2fa 1655 spec->surr_switch = 1;
c7d4b2fa 1656
82bc955f 1657 if (spec->autocfg.dig_out_pin)
3cc08dc6 1658 spec->multiout.dig_out_nid = dig_out;
82bc955f 1659 if (spec->autocfg.dig_in_pin)
3cc08dc6 1660 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 1661
1662 if (spec->kctl_alloc)
1663 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
1664
1665 spec->input_mux = &spec->private_imux;
8b65727b 1666 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 1667
1668 return 1;
1669}
1670
82bc955f
TI		 1671/* add playback controls for HP output */
1672static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
1673 struct auto_pin_cfg *cfg)
1674{
1675 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 1676 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 1677 unsigned int wid_caps;
1678
1679 if (! pin)
1680 return 0;
1681
1682 wid_caps = get_wcaps(codec, pin);
505cb341 1683 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 1684 spec->hp_detect = 1;
82bc955f
TI		 1685
1686 return 0;
1687}
1688
160ea0dc
RF		 1689/* add playback controls for LFE output */
1690static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
1691 struct auto_pin_cfg *cfg)
1692{
1693 struct sigmatel_spec *spec = codec->spec;
1694 int err;
1695 hda_nid_t lfe_pin = 0x0;
1696 int i;
1697
1698 /*
1699 * search speaker outs and line outs for a mono speaker pin
1700 * with an amp. If one is found, add LFE controls
1701 * for it.
1702 */
1703 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
1704 hda_nid_t pin = spec->autocfg.speaker_pins[i];
1705 unsigned long wcaps = get_wcaps(codec, pin);
1706 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
1707 if (wcaps == AC_WCAP_OUT_AMP)
1708 /* found a mono speaker with an amp, must be lfe */
1709 lfe_pin = pin;
1710 }
1711
1712 /* if speaker_outs is 0, then speakers may be in line_outs */
1713 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
1714 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
1715 hda_nid_t pin = spec->autocfg.line_out_pins[i];
1716 unsigned long cfg;
1717 cfg = snd_hda_codec_read(codec, pin, 0,
1718 AC_VERB_GET_CONFIG_DEFAULT,
1719 0x00);
1720 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
1721 unsigned long wcaps = get_wcaps(codec, pin);
1722 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
1723 if (wcaps == AC_WCAP_OUT_AMP)
1724 /* found a mono speaker with an amp,
1725 must be lfe */
1726 lfe_pin = pin;
1727 }
1728 }
1729 }
1730
1731 if (lfe_pin) {
eb06ed8f 1732 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 1733 if (err < 0)
1734 return err;
1735 }
1736
1737 return 0;
1738}
1739
c7d4b2fa
M		 1740static int stac9200_parse_auto_config(struct hda_codec *codec)
1741{
1742 struct sigmatel_spec *spec = codec->spec;
1743 int err;
1744
df694daa 1745 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 1746 return err;
1747
1748 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
1749 return err;
1750
82bc955f
TI		 1751 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
1752 return err;
1753
160ea0dc
RF		 1754 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
1755 return err;
1756
82bc955f 1757 if (spec->autocfg.dig_out_pin)
c7d4b2fa 1758 spec->multiout.dig_out_nid = 0x05;
82bc955f 1759 if (spec->autocfg.dig_in_pin)
c7d4b2fa 1760 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 1761
1762 if (spec->kctl_alloc)
1763 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
1764
1765 spec->input_mux = &spec->private_imux;
8b65727b 1766 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 1767
1768 return 1;
1769}
1770
62fe78e9
SR		 1771/*
1772 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
1773 * funky external mute control using GPIO pins.
1774 */
1775
1776static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
1777{
1778 unsigned int gpiostate, gpiomask, gpiodir;
1779
1780 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
1781 AC_VERB_GET_GPIO_DATA, 0);
1782
1783 if (!muted)
1784 gpiostate |= (1 << pin);
1785 else
1786 gpiostate &= ~(1 << pin);
1787
1788 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
1789 AC_VERB_GET_GPIO_MASK, 0);
1790 gpiomask |= (1 << pin);
1791
1792 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
1793 AC_VERB_GET_GPIO_DIRECTION, 0);
1794 gpiodir |= (1 << pin);
1795
1796 /* AppleHDA seems to do this -- WTF is this verb?? */
1797 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
1798
1799 snd_hda_codec_write(codec, codec->afg, 0,
1800 AC_VERB_SET_GPIO_MASK, gpiomask);
1801 snd_hda_codec_write(codec, codec->afg, 0,
1802 AC_VERB_SET_GPIO_DIRECTION, gpiodir);
1803
1804 msleep(1);
1805
1806 snd_hda_codec_write(codec, codec->afg, 0,
1807 AC_VERB_SET_GPIO_DATA, gpiostate);
1808}
1809
314634bc
TI		 1810static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
1811 unsigned int event)
1812{
1813 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
1814 snd_hda_codec_write(codec, nid, 0,
1815 AC_VERB_SET_UNSOLICITED_ENABLE,
1816 (AC_USRSP_EN | event));
1817}
1818
c7d4b2fa
M		 1819static int stac92xx_init(struct hda_codec *codec)
1820{
1821 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 1822 struct auto_pin_cfg *cfg = &spec->autocfg;
1823 int i;
c7d4b2fa 1824
c7d4b2fa
M		 1825 snd_hda_sequence_write(codec, spec->init);
1826
82bc955f
TI		 1827 /* set up pins */
1828 if (spec->hp_detect) {
505cb341 1829 /* Enable unsolicited responses on the HP widget */
eb06ed8f 1830 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 1831 enable_pin_detect(codec, cfg->hp_pins[i],
1832 STAC_HP_EVENT);
0a07acaf
TI		 1833 /* force to enable the first line-out; the others are set up
1834 * in unsol_event
1835 */
1836 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
1837 AC_PINCTL_OUT_EN);
eb995a8c 1838 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 1839 /* fake event to set up pins */
1840 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
1841 } else {
1842 stac92xx_auto_init_multi_out(codec);
1843 stac92xx_auto_init_hp_out(codec);
1844 }
1845 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 1846 hda_nid_t nid = cfg->input_pins[i];
1847 if (nid) {
1848 unsigned int pinctl = AC_PINCTL_IN_EN;
1849 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
1850 pinctl |= stac92xx_get_vref(codec, nid);
1851 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1852 }
82bc955f 1853 }
8b65727b
MP		 1854 if (spec->num_dmics > 0)
1855 for (i = 0; i < spec->num_dmics; i++)
1856 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
1857 AC_PINCTL_IN_EN);
1858
82bc955f
TI		 1859 if (cfg->dig_out_pin)
1860 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
1861 AC_PINCTL_OUT_EN);
1862 if (cfg->dig_in_pin)
1863 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
1864 AC_PINCTL_IN_EN);
1865
62fe78e9
SR		 1866 if (spec->gpio_mute) {
1867 stac922x_gpio_mute(codec, 0, 0);
1868 stac922x_gpio_mute(codec, 1, 0);
1869 }
1870
c7d4b2fa
M		 1871 return 0;
1872}
1873
2f2f4251
M		 1874static void stac92xx_free(struct hda_codec *codec)
1875{
c7d4b2fa
M		 1876 struct sigmatel_spec *spec = codec->spec;
1877 int i;
1878
1879 if (! spec)
1880 return;
1881
1882 if (spec->kctl_alloc) {
1883 for (i = 0; i < spec->num_kctl_used; i++)
1884 kfree(spec->kctl_alloc[i].name);
1885 kfree(spec->kctl_alloc);
1886 }
1887
11b44bbd
RF		 1888 if (spec->bios_pin_configs)
1889 kfree(spec->bios_pin_configs);
1890
c7d4b2fa 1891 kfree(spec);
2f2f4251
M		 1892}
1893
4e55096e
M		 1894static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
1895 unsigned int flag)
1896{
1897 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
1898 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 1899
f9acba43
TI		 1900 if (pin_ctl & AC_PINCTL_IN_EN) {
1901 /*
1902 * we need to check the current set-up direction of
1903 * shared input pins since they can be switched via
1904 * "xxx as Output" mixer switch
1905 */
1906 struct sigmatel_spec *spec = codec->spec;
1907 struct auto_pin_cfg *cfg = &spec->autocfg;
1908 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
1909 spec->line_switch) ||
1910 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
1911 spec->mic_switch))
1912 return;
1913 }
1914
7b043899
SL		 1915 /* if setting pin direction bits, clear the current
1916 direction bits first */
1917 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
1918 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
1919
82beb8fd 1920 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 1921 AC_VERB_SET_PIN_WIDGET_CONTROL,
1922 pin_ctl | flag);
1923}
1924
1925static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
1926 unsigned int flag)
1927{
1928 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
1929 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 1930 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 1931 AC_VERB_SET_PIN_WIDGET_CONTROL,
1932 pin_ctl & ~flag);
1933}
1934
314634bc
TI		 1935static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
1936{
1937 if (!nid)
1938 return 0;
1939 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
1940 & (1 << 31))
1941 return 1;
1942 return 0;
1943}
1944
1945static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 1946{
1947 struct sigmatel_spec *spec = codec->spec;
1948 struct auto_pin_cfg *cfg = &spec->autocfg;
1949 int i, presence;
1950
eb06ed8f
TI		 1951 presence = 0;
1952 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 1953 presence = get_pin_presence(codec, cfg->hp_pins[i]);
1954 if (presence)
1955 break;
eb06ed8f 1956 }
4e55096e
M		 1957
1958 if (presence) {
1959 /* disable lineouts, enable hp */
1960 for (i = 0; i < cfg->line_outs; i++)
1961 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
1962 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 1963 for (i = 0; i < cfg->speaker_outs; i++)
1964 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
1965 AC_PINCTL_OUT_EN);
4e55096e
M		 1966 } else {
1967 /* enable lineouts, disable hp */
1968 for (i = 0; i < cfg->line_outs; i++)
1969 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
1970 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 1971 for (i = 0; i < cfg->speaker_outs; i++)
1972 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
1973 AC_PINCTL_OUT_EN);
4e55096e
M		 1974 }
1975}
1976
314634bc
TI		 1977static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
1978{
1979 switch (res >> 26) {
1980 case STAC_HP_EVENT:
1981 stac92xx_hp_detect(codec, res);
1982 break;
1983 }
1984}
1985
cb53c626 1986#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 1987static int stac92xx_resume(struct hda_codec *codec)
1988{
11b44bbd 1989 stac92xx_set_config_regs(codec);
8259980e 1990 stac92xx_init(codec);
82beb8fd
TI		 1991 snd_hda_codec_resume_amp(codec);
1992 snd_hda_codec_resume_cache(codec);
ff6fdc37
M		 1993 return 0;
1994}
1995#endif
1996
2f2f4251
M		 1997static struct hda_codec_ops stac92xx_patch_ops = {
1998 .build_controls = stac92xx_build_controls,
1999 .build_pcms = stac92xx_build_pcms,
2000 .init = stac92xx_init,
2001 .free = stac92xx_free,
4e55096e 2002 .unsol_event = stac92xx_unsol_event,
cb53c626 2003#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2004 .resume = stac92xx_resume,
2005#endif
2f2f4251
M		 2006};
2007
2008static int patch_stac9200(struct hda_codec *codec)
2009{
2010 struct sigmatel_spec *spec;
c7d4b2fa 2011 int err;
2f2f4251 2012
e560d8d8 2013 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2014 if (spec == NULL)
2015 return -ENOMEM;
2016
2017 codec->spec = spec;
a4eed138 2018 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 2019 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 2020 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
2021 stac9200_models,
2022 stac9200_cfg_tbl);
11b44bbd
RF		 2023 if (spec->board_config < 0) {
2024 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
2025 err = stac92xx_save_bios_config_regs(codec);
2026 if (err < 0) {
2027 stac92xx_free(codec);
2028 return err;
2029 }
2030 spec->pin_configs = spec->bios_pin_configs;
2031 } else {
403d1944
MP		 2032 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
2033 stac92xx_set_config_regs(codec);
2034 }
2f2f4251
M		 2035
2036 spec->multiout.max_channels = 2;
2037 spec->multiout.num_dacs = 1;
2038 spec->multiout.dac_nids = stac9200_dac_nids;
2039 spec->adc_nids = stac9200_adc_nids;
2040 spec->mux_nids = stac9200_mux_nids;
dabbed6f 2041 spec->num_muxes = 1;
8b65727b 2042 spec->num_dmics = 0;
c7d4b2fa
M		 2043
2044 spec->init = stac9200_core_init;
2f2f4251 2045 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 2046
2047 err = stac9200_parse_auto_config(codec);
2048 if (err < 0) {
2049 stac92xx_free(codec);
2050 return err;
2051 }
2f2f4251
M		 2052
2053 codec->patch_ops = stac92xx_patch_ops;
2054
2055 return 0;
2056}
2057
8e21c34c
TD		 2058static int patch_stac925x(struct hda_codec *codec)
2059{
2060 struct sigmatel_spec *spec;
2061 int err;
2062
2063 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2064 if (spec == NULL)
2065 return -ENOMEM;
2066
2067 codec->spec = spec;
a4eed138 2068 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 2069 spec->pin_nids = stac925x_pin_nids;
2070 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
2071 stac925x_models,
2072 stac925x_cfg_tbl);
9e507abd 2073 again:
8e21c34c 2074 if (spec->board_config < 0) {
2c11f955
TD		 2075 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2076 "using BIOS defaults\n");
8e21c34c
TD		 2077 err = stac92xx_save_bios_config_regs(codec);
2078 if (err < 0) {
2079 stac92xx_free(codec);
2080 return err;
2081 }
2082 spec->pin_configs = spec->bios_pin_configs;
2083 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
2084 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
2085 stac92xx_set_config_regs(codec);
2086 }
2087
2088 spec->multiout.max_channels = 2;
2089 spec->multiout.num_dacs = 1;
2090 spec->multiout.dac_nids = stac925x_dac_nids;
2091 spec->adc_nids = stac925x_adc_nids;
2092 spec->mux_nids = stac925x_mux_nids;
2093 spec->num_muxes = 1;
2c11f955
TD		 2094 switch (codec->vendor_id) {
2095 case 0x83847632: /* STAC9202 */
2096 case 0x83847633: /* STAC9202D */
2097 case 0x83847636: /* STAC9251 */
2098 case 0x83847637: /* STAC9251D */
2099 spec->num_dmics = 1;
2100 spec->dmic_nids = stac925x_dmic_nids;
2101 break;
2102 default:
2103 spec->num_dmics = 0;
2104 break;
2105 }
8e21c34c
TD		 2106
2107 spec->init = stac925x_core_init;
2108 spec->mixer = stac925x_mixer;
2109
2110 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 2111 if (!err) {
2112 if (spec->board_config < 0) {
2113 printk(KERN_WARNING "hda_codec: No auto-config is "
2114 "available, default to model=ref\n");
2115 spec->board_config = STAC_925x_REF;
2116 goto again;
2117 }
2118 err = -EINVAL;
2119 }
8e21c34c
TD		 2120 if (err < 0) {
2121 stac92xx_free(codec);
2122 return err;
2123 }
2124
2125 codec->patch_ops = stac92xx_patch_ops;
2126
2127 return 0;
2128}
2129
2f2f4251
M		 2130static int patch_stac922x(struct hda_codec *codec)
2131{
2132 struct sigmatel_spec *spec;
c7d4b2fa 2133 int err;
2f2f4251 2134
e560d8d8 2135 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2136 if (spec == NULL)
2137 return -ENOMEM;
2138
2139 codec->spec = spec;
a4eed138 2140 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 2141 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 2142 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
2143 stac922x_models,
2144 stac922x_cfg_tbl);
5d5d3bc3 2145 if (spec->board_config == STAC_INTEL_MAC_V3) {
3fc24d85
TI		 2146 spec->gpio_mute = 1;
2147 /* Intel Macs have all same PCI SSID, so we need to check
2148 * codec SSID to distinguish the exact models
2149 */
6f0778d8 2150 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 2151 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 2152
2153 case 0x106b0800:
2154 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 2155 break;
5d5d3bc3
IZ		 2156 case 0x106b0600:
2157 case 0x106b0700:
2158 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 2159 break;
5d5d3bc3
IZ		 2160 case 0x106b0e00:
2161 case 0x106b0f00:
2162 case 0x106b1600:
2163 case 0x106b1700:
2164 case 0x106b0200:
2165 case 0x106b1e00:
2166 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 2167 break;
5d5d3bc3
IZ		 2168 case 0x106b1a00:
2169 case 0x00000100:
2170 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 2171 break;
5d5d3bc3
IZ		 2172 case 0x106b0a00:
2173 case 0x106b2200:
2174 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 2175 break;
3fc24d85
TI		 2176 }
2177 }
2178
9e507abd 2179 again:
11b44bbd
RF		 2180 if (spec->board_config < 0) {
2181 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
2182 "using BIOS defaults\n");
2183 err = stac92xx_save_bios_config_regs(codec);
2184 if (err < 0) {
2185 stac92xx_free(codec);
2186 return err;
2187 }
2188 spec->pin_configs = spec->bios_pin_configs;
2189 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 2190 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
2191 stac92xx_set_config_regs(codec);
2192 }
2f2f4251 2193
c7d4b2fa
M		 2194 spec->adc_nids = stac922x_adc_nids;
2195 spec->mux_nids = stac922x_mux_nids;
2549413e 2196 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
8b65727b 2197 spec->num_dmics = 0;
c7d4b2fa
M		 2198
2199 spec->init = stac922x_core_init;
2f2f4251 2200 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 2201
2202 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 2203
3cc08dc6 2204 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 2205 if (!err) {
2206 if (spec->board_config < 0) {
2207 printk(KERN_WARNING "hda_codec: No auto-config is "
2208 "available, default to model=ref\n");
2209 spec->board_config = STAC_D945_REF;
2210 goto again;
2211 }
2212 err = -EINVAL;
2213 }
3cc08dc6
MP		 2214 if (err < 0) {
2215 stac92xx_free(codec);
2216 return err;
2217 }
2218
2219 codec->patch_ops = stac92xx_patch_ops;
2220
807a4636
TI		 2221 /* Fix Mux capture level; max to 2 */
2222 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
2223 (0 << AC_AMPCAP_OFFSET_SHIFT) |
2224 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
2225 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
2226 (0 << AC_AMPCAP_MUTE_SHIFT));
2227
3cc08dc6
MP		 2228 return 0;
2229}
2230
2231static int patch_stac927x(struct hda_codec *codec)
2232{
2233 struct sigmatel_spec *spec;
2234 int err;
2235
2236 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2237 if (spec == NULL)
2238 return -ENOMEM;
2239
2240 codec->spec = spec;
a4eed138 2241 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 2242 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 2243 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
2244 stac927x_models,
2245 stac927x_cfg_tbl);
9e507abd 2246 again:
11b44bbd 2247 if (spec->board_config < 0) {
3cc08dc6 2248 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n");
11b44bbd
RF		 2249 err = stac92xx_save_bios_config_regs(codec);
2250 if (err < 0) {
2251 stac92xx_free(codec);
2252 return err;
2253 }
2254 spec->pin_configs = spec->bios_pin_configs;
2255 } else if (stac927x_brd_tbl[spec->board_config] != NULL) {
3cc08dc6
MP		 2256 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
2257 stac92xx_set_config_regs(codec);
2258 }
2259
81d3dbde 2260 switch (spec->board_config) {
93ed1503 2261 case STAC_D965_3ST:
81d3dbde
TD		 2262 spec->adc_nids = stac927x_adc_nids;
2263 spec->mux_nids = stac927x_mux_nids;
2549413e 2264 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
8b65727b 2265 spec->num_dmics = 0;
93ed1503 2266 spec->init = d965_core_init;
81d3dbde
TD		 2267 spec->mixer = stac9227_mixer;
2268 break;
93ed1503
TD		 2269 case STAC_D965_5ST:
2270 spec->adc_nids = stac927x_adc_nids;
2271 spec->mux_nids = stac927x_mux_nids;
2549413e 2272 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
8b65727b 2273 spec->num_dmics = 0;
93ed1503 2274 spec->init = d965_core_init;
81d3dbde
TD		 2275 spec->mixer = stac9227_mixer;
2276 break;
2277 default:
2278 spec->adc_nids = stac927x_adc_nids;
2279 spec->mux_nids = stac927x_mux_nids;
2549413e 2280 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
8b65727b 2281 spec->num_dmics = 0;
81d3dbde
TD		 2282 spec->init = stac927x_core_init;
2283 spec->mixer = stac927x_mixer;
2284 }
3cc08dc6
MP		 2285
2286 spec->multiout.dac_nids = spec->dac_nids;
87d48363 2287 /* GPIO0 High = Enable EAPD */
8259980e
TI		 2288 spec->gpio_mask = spec->gpio_data = 0x00000001;
2289 stac92xx_enable_gpio_mask(codec);
92a22beb 2290
3cc08dc6 2291 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 2292 if (!err) {
2293 if (spec->board_config < 0) {
2294 printk(KERN_WARNING "hda_codec: No auto-config is "
2295 "available, default to model=ref\n");
2296 spec->board_config = STAC_D965_REF;
2297 goto again;
2298 }
2299 err = -EINVAL;
2300 }
c7d4b2fa
M		 2301 if (err < 0) {
2302 stac92xx_free(codec);
2303 return err;
2304 }
2f2f4251
M		 2305
2306 codec->patch_ops = stac92xx_patch_ops;
2307
2308 return 0;
2309}
2310
f3302a59
MP		 2311static int patch_stac9205(struct hda_codec *codec)
2312{
2313 struct sigmatel_spec *spec;
8259980e 2314 int err;
f3302a59
MP		 2315
2316 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2317 if (spec == NULL)
2318 return -ENOMEM;
2319
2320 codec->spec = spec;
a4eed138 2321 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 2322 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 2323 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
2324 stac9205_models,
2325 stac9205_cfg_tbl);
9e507abd 2326 again:
11b44bbd
RF		 2327 if (spec->board_config < 0) {
2328 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
2329 err = stac92xx_save_bios_config_regs(codec);
2330 if (err < 0) {
2331 stac92xx_free(codec);
2332 return err;
2333 }
2334 spec->pin_configs = spec->bios_pin_configs;
2335 } else {
f3302a59
MP		 2336 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
2337 stac92xx_set_config_regs(codec);
2338 }
2339
2340 spec->adc_nids = stac9205_adc_nids;
2341 spec->mux_nids = stac9205_mux_nids;
2549413e 2342 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 2343 spec->dmic_nids = stac9205_dmic_nids;
2549413e 2344 spec->num_dmics = ARRAY_SIZE(stac9205_dmic_nids);
8b65727b 2345 spec->dmux_nid = 0x1d;
f3302a59
MP		 2346
2347 spec->init = stac9205_core_init;
2348 spec->mixer = stac9205_mixer;
2349
2350 spec->multiout.dac_nids = spec->dac_nids;
87d48363 2351
ae0a8ed8
TD		 2352 switch (spec->board_config){
2353 case STAC_9205_M43xx:
2354 case STAC_9205_DELL_M43:
87d48363
MR		 2355 /* Enable SPDIF in/out */
2356 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
2357 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
2358
8259980e 2359 spec->gpio_mask = 0x00000007; /* GPIO0-2 */
87d48363
MR		 2360 /* GPIO0 High = EAPD, GPIO1 Low = DRM,
2361 * GPIO2 High = Headphone Mute
2362 */
8259980e 2363 spec->gpio_data = 0x00000005;
ae0a8ed8
TD		 2364 break;
2365 default:
2366 /* GPIO0 High = EAPD */
2367 spec->gpio_mask = spec->gpio_data = 0x00000001;
2368 break;
2369 }
33382403 2370
8259980e 2371 stac92xx_enable_gpio_mask(codec);
f3302a59 2372 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 2373 if (!err) {
2374 if (spec->board_config < 0) {
2375 printk(KERN_WARNING "hda_codec: No auto-config is "
2376 "available, default to model=ref\n");
2377 spec->board_config = STAC_9205_REF;
2378 goto again;
2379 }
2380 err = -EINVAL;
2381 }
f3302a59
MP		 2382 if (err < 0) {
2383 stac92xx_free(codec);
2384 return err;
2385 }
2386
2387 codec->patch_ops = stac92xx_patch_ops;
2388
2389 return 0;
2390}
2391
db064e50 2392/*
6d859065 2393 * STAC9872 hack
db064e50
TI		 2394 */
2395
99ccc560 2396/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 2397static hda_nid_t vaio_dacs[] = { 0x2 };
2398#define VAIO_HP_DAC 0x5
2399static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
2400static hda_nid_t vaio_mux_nids[] = { 0x15 };
2401
2402static struct hda_input_mux vaio_mux = {
2403 .num_items = 2,
2404 .items = {
d773781c 2405 /* { "HP", 0x0 }, */
1624cb9a
TI		 2406 { "Mic Jack", 0x1 },
2407 { "Internal Mic", 0x2 },
db064e50
TI		 2408 { "PCM", 0x3 },
2409 }
2410};
2411
2412static struct hda_verb vaio_init[] = {
2413 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
2414 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2415 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2416 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2417 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2418 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 2419 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2420 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2421 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2422 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2423 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2424 {}
2425};
2426
6d859065
GM		 2427static struct hda_verb vaio_ar_init[] = {
2428 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
2429 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2430 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2431 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2432/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
2433 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2434 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 2435 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2436 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2437/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
2438 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2439 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2440 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2441 {}
2442};
2443
db064e50 2444/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 2445static struct hda_bind_ctls vaio_bind_master_vol = {
2446 .ops = &snd_hda_bind_vol,
2447 .values = {
2448 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2449 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2450 0
2451 },
2452};
db064e50
TI		 2453
2454/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 2455static struct hda_bind_ctls vaio_bind_master_sw = {
2456 .ops = &snd_hda_bind_sw,
2457 .values = {
2458 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2459 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2460 0,
2461 },
2462};
db064e50
TI		 2463
2464static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 2465 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2466 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 2467 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2468 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2469 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2470 {
2471 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2472 .name = "Capture Source",
2473 .count = 1,
2474 .info = stac92xx_mux_enum_info,
2475 .get = stac92xx_mux_enum_get,
2476 .put = stac92xx_mux_enum_put,
2477 },
2478 {}
2479};
2480
6d859065 2481static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 2482 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2483 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 2484 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2485 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2486 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2487 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
2488 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
2489 {
2490 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2491 .name = "Capture Source",
2492 .count = 1,
2493 .info = stac92xx_mux_enum_info,
2494 .get = stac92xx_mux_enum_get,
2495 .put = stac92xx_mux_enum_put,
2496 },
2497 {}
2498};
2499
2500static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 2501 .build_controls = stac92xx_build_controls,
2502 .build_pcms = stac92xx_build_pcms,
2503 .init = stac92xx_init,
2504 .free = stac92xx_free,
cb53c626 2505#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 2506 .resume = stac92xx_resume,
2507#endif
2508};
2509
6d859065
GM		 2510enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
2511 CXD9872RD_VAIO,
2512 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
2513 STAC9872AK_VAIO,
2514 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
2515 STAC9872K_VAIO,
2516 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 2517 CXD9872AKD_VAIO,
2518 STAC_9872_MODELS,
2519};
2520
2521static const char *stac9872_models[STAC_9872_MODELS] = {
2522 [CXD9872RD_VAIO] = "vaio",
2523 [CXD9872AKD_VAIO] = "vaio-ar",
2524};
2525
2526static struct snd_pci_quirk stac9872_cfg_tbl[] = {
2527 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
2528 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
2529 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 2530 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 2531 {}
2532};
2533
6d859065 2534static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 2535{
2536 struct sigmatel_spec *spec;
2537 int board_config;
2538
f5fcc13c
TI		 2539 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
2540 stac9872_models,
2541 stac9872_cfg_tbl);
db064e50
TI		 2542 if (board_config < 0)
2543 /* unknown config, let generic-parser do its job... */
2544 return snd_hda_parse_generic_codec(codec);
2545
2546 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2547 if (spec == NULL)
2548 return -ENOMEM;
2549
2550 codec->spec = spec;
2551 switch (board_config) {
6d859065
GM		 2552 case CXD9872RD_VAIO:
2553 case STAC9872AK_VAIO:
2554 case STAC9872K_VAIO:
db064e50
TI		 2555 spec->mixer = vaio_mixer;
2556 spec->init = vaio_init;
2557 spec->multiout.max_channels = 2;
2558 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
2559 spec->multiout.dac_nids = vaio_dacs;
2560 spec->multiout.hp_nid = VAIO_HP_DAC;
2561 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
2562 spec->adc_nids = vaio_adcs;
2563 spec->input_mux = &vaio_mux;
2564 spec->mux_nids = vaio_mux_nids;
2565 break;
6d859065
GM		 2566
2567 case CXD9872AKD_VAIO:
2568 spec->mixer = vaio_ar_mixer;
2569 spec->init = vaio_ar_init;
2570 spec->multiout.max_channels = 2;
2571 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
2572 spec->multiout.dac_nids = vaio_dacs;
2573 spec->multiout.hp_nid = VAIO_HP_DAC;
2574 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
2575 spec->adc_nids = vaio_adcs;
2576 spec->input_mux = &vaio_mux;
2577 spec->mux_nids = vaio_mux_nids;
2578 break;
db064e50
TI		 2579 }
2580
6d859065 2581 codec->patch_ops = stac9872_patch_ops;
db064e50
TI		 2582 return 0;
2583}
2584
2585
2f2f4251
M		 2586/*
2587 * patch entries
2588 */
2589struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2590 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
2591 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
2592 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
2593 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
2594 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
2595 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
2596 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 2597 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
2598 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
2599 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
2600 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
2601 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
2602 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 2603 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
2604 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
2605 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
2606 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
2607 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
2608 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
2609 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
2610 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
2611 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
2612 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 2613 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
2614 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
2615 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
2616 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
2617 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
2618 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 2619 /* The following does not take into account .id=0x83847661 when subsys =
2620 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
2621 * currently not fully supported.
2622 */
2623 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
2624 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
2625 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 2626 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
2627 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
2628 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
2629 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
2630 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
2631 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
2632 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
2633 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
2f2f4251
M		 2634 {} /* terminator */
2635};
Clone of davem's net-next-2.6 tree