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[ALSA] hda-codec - Fix handling of multiple capture streams
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
35
4e55096e 36#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 37#define STAC_PWR_EVENT 0x20
38#define STAC_HP_EVENT 0x30
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
dfe495d0
TI		 42 STAC_9200_DELL_D21,
43 STAC_9200_DELL_D22,
44 STAC_9200_DELL_D23,
45 STAC_9200_DELL_M21,
46 STAC_9200_DELL_M22,
47 STAC_9200_DELL_M23,
48 STAC_9200_DELL_M24,
49 STAC_9200_DELL_M25,
50 STAC_9200_DELL_M26,
51 STAC_9200_DELL_M27,
1194b5b7 52 STAC_9200_GATEWAY,
f5fcc13c
TI		 53 STAC_9200_MODELS
54};
55
56enum {
57 STAC_9205_REF,
dfe495d0 58 STAC_9205_DELL_M42,
ae0a8ed8
TD		 59 STAC_9205_DELL_M43,
60 STAC_9205_DELL_M44,
f5fcc13c
TI		 61 STAC_9205_MODELS
62};
63
e1f0d669
MR		 64enum {
65 STAC_92HD73XX_REF,
66 STAC_92HD73XX_MODELS
67};
68
e035b841
MR		 69enum {
70 STAC_92HD71BXX_REF,
71 STAC_92HD71BXX_MODELS
72};
73
8e21c34c
TD		 74enum {
75 STAC_925x_REF,
76 STAC_M2_2,
77 STAC_MA6,
2c11f955 78 STAC_PA6,
8e21c34c
TD		 79 STAC_925x_MODELS
80};
81
f5fcc13c
TI		 82enum {
83 STAC_D945_REF,
84 STAC_D945GTP3,
85 STAC_D945GTP5,
5d5d3bc3
IZ		 86 STAC_INTEL_MAC_V1,
87 STAC_INTEL_MAC_V2,
88 STAC_INTEL_MAC_V3,
89 STAC_INTEL_MAC_V4,
90 STAC_INTEL_MAC_V5,
dfe495d0 91 /* for backward compatibility */
f5fcc13c 92 STAC_MACMINI,
3fc24d85 93 STAC_MACBOOK,
6f0778d8
NB		 94 STAC_MACBOOK_PRO_V1,
95 STAC_MACBOOK_PRO_V2,
f16928fb 96 STAC_IMAC_INTEL,
0dae0f83 97 STAC_IMAC_INTEL_20,
dfe495d0
TI		 98 STAC_922X_DELL_D81,
99 STAC_922X_DELL_D82,
100 STAC_922X_DELL_M81,
101 STAC_922X_DELL_M82,
f5fcc13c
TI		 102 STAC_922X_MODELS
103};
104
105enum {
106 STAC_D965_REF,
107 STAC_D965_3ST,
108 STAC_D965_5ST,
4ff076e5 109 STAC_DELL_3ST,
8e9068b1 110 STAC_DELL_BIOS,
f5fcc13c
TI		 111 STAC_927X_MODELS
112};
403d1944 113
2f2f4251 114struct sigmatel_spec {
c8b6bf9b 115 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 116 unsigned int num_mixers;
117
403d1944 118 int board_config;
c7d4b2fa 119 unsigned int surr_switch: 1;
403d1944
MP		 120 unsigned int line_switch: 1;
121 unsigned int mic_switch: 1;
3cc08dc6 122 unsigned int alt_switch: 1;
82bc955f 123 unsigned int hp_detect: 1;
c7d4b2fa 124
8259980e 125 unsigned int gpio_mask, gpio_data;
e1f0d669
MR		 126 unsigned char aloopback_mask;
127 unsigned char aloopback_shift;
8259980e 128
a64135a2
MR		 129 /* power management */
130 unsigned int num_pwrs;
131 hda_nid_t *pwr_nids;
132
2f2f4251 133 /* playback */
b22b4821
MR		 134 struct hda_input_mux *mono_mux;
135 unsigned int cur_mmux;
2f2f4251 136 struct hda_multi_out multiout;
3cc08dc6 137 hda_nid_t dac_nids[5];
2f2f4251
M		 138
139 /* capture */
140 hda_nid_t *adc_nids;
2f2f4251 141 unsigned int num_adcs;
dabbed6f
M		 142 hda_nid_t *mux_nids;
143 unsigned int num_muxes;
8b65727b
MP		 144 hda_nid_t *dmic_nids;
145 unsigned int num_dmics;
e1f0d669 146 hda_nid_t *dmux_nids;
1697055e 147 unsigned int num_dmuxes;
dabbed6f 148 hda_nid_t dig_in_nid;
b22b4821 149 hda_nid_t mono_nid;
2f2f4251 150
2f2f4251
M		 151 /* pin widgets */
152 hda_nid_t *pin_nids;
153 unsigned int num_pins;
2f2f4251 154 unsigned int *pin_configs;
11b44bbd 155 unsigned int *bios_pin_configs;
2f2f4251
M		 156
157 /* codec specific stuff */
158 struct hda_verb *init;
c8b6bf9b 159 struct snd_kcontrol_new *mixer;
2f2f4251
M		 160
161 /* capture source */
8b65727b 162 struct hda_input_mux *dinput_mux;
e1f0d669 163 unsigned int cur_dmux[2];
c7d4b2fa 164 struct hda_input_mux *input_mux;
3cc08dc6 165 unsigned int cur_mux[3];
2f2f4251 166
403d1944
MP		 167 /* i/o switches */
168 unsigned int io_switch[2];
0fb87bb4 169 unsigned int clfe_swap;
5f10c4a9 170 unsigned int aloopback;
2f2f4251 171
c7d4b2fa
M		 172 struct hda_pcm pcm_rec[2]; /* PCM information */
173
174 /* dynamic controls and input_mux */
175 struct auto_pin_cfg autocfg;
176 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 177 struct snd_kcontrol_new *kctl_alloc;
8b65727b 178 struct hda_input_mux private_dimux;
c7d4b2fa 179 struct hda_input_mux private_imux;
b22b4821 180 struct hda_input_mux private_mono_mux;
2134ea4f
TI		 181
182 /* virtual master */
183 unsigned int vmaster_tlv[4];
2f2f4251
M		 184};
185
186static hda_nid_t stac9200_adc_nids[1] = {
187 0x03,
188};
189
190static hda_nid_t stac9200_mux_nids[1] = {
191 0x0c,
192};
193
194static hda_nid_t stac9200_dac_nids[1] = {
195 0x02,
196};
197
a64135a2
MR		 198static hda_nid_t stac92hd73xx_pwr_nids[8] = {
199 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
200 0x0f, 0x10, 0x11
201};
202
e1f0d669
MR		 203static hda_nid_t stac92hd73xx_adc_nids[2] = {
204 0x1a, 0x1b
205};
206
207#define STAC92HD73XX_NUM_DMICS 2
208static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
209 0x13, 0x14, 0
210};
211
212#define STAC92HD73_DAC_COUNT 5
213static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
214 0x15, 0x16, 0x17, 0x18, 0x19,
215};
216
217static hda_nid_t stac92hd73xx_mux_nids[4] = {
218 0x28, 0x29, 0x2a, 0x2b,
219};
220
221static hda_nid_t stac92hd73xx_dmux_nids[2] = {
222 0x20, 0x21,
223};
224
a64135a2
MR		 225static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
226 0x0a, 0x0d, 0x0f
227};
228
e035b841
MR		 229static hda_nid_t stac92hd71bxx_adc_nids[2] = {
230 0x12, 0x13,
231};
232
233static hda_nid_t stac92hd71bxx_mux_nids[2] = {
234 0x1a, 0x1b
235};
236
e1f0d669
MR		 237static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
238 0x1c,
239};
240
e035b841
MR		 241static hda_nid_t stac92hd71bxx_dac_nids[2] = {
242 0x10, /*0x11, */
243};
244
245#define STAC92HD71BXX_NUM_DMICS 2
246static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
247 0x18, 0x19, 0
248};
249
8e21c34c
TD		 250static hda_nid_t stac925x_adc_nids[1] = {
251 0x03,
252};
253
254static hda_nid_t stac925x_mux_nids[1] = {
255 0x0f,
256};
257
258static hda_nid_t stac925x_dac_nids[1] = {
259 0x02,
260};
261
f6e9852a
TI		 262#define STAC925X_NUM_DMICS 1
263static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
264 0x15, 0
2c11f955
TD		 265};
266
1697055e
TI		 267static hda_nid_t stac925x_dmux_nids[1] = {
268 0x14,
269};
270
2f2f4251
M		 271static hda_nid_t stac922x_adc_nids[2] = {
272 0x06, 0x07,
273};
274
275static hda_nid_t stac922x_mux_nids[2] = {
276 0x12, 0x13,
277};
278
3cc08dc6
MP		 279static hda_nid_t stac927x_adc_nids[3] = {
280 0x07, 0x08, 0x09
281};
282
283static hda_nid_t stac927x_mux_nids[3] = {
284 0x15, 0x16, 0x17
285};
286
e1f0d669
MR		 287static hda_nid_t stac927x_dmux_nids[1] = {
288 0x1b,
289};
290
7f16859a
MR		 291#define STAC927X_NUM_DMICS 2
292static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
293 0x13, 0x14, 0
294};
295
f3302a59
MP		 296static hda_nid_t stac9205_adc_nids[2] = {
297 0x12, 0x13
298};
299
300static hda_nid_t stac9205_mux_nids[2] = {
301 0x19, 0x1a
302};
303
e1f0d669 304static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 305 0x1d,
e1f0d669
MR		 306};
307
f6e9852a
TI		 308#define STAC9205_NUM_DMICS 2
309static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
310 0x17, 0x18, 0
8b65727b
MP		 311};
312
c7d4b2fa 313static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 314 0x08, 0x09, 0x0d, 0x0e,
315 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 316};
317
8e21c34c
TD		 318static hda_nid_t stac925x_pin_nids[8] = {
319 0x07, 0x08, 0x0a, 0x0b,
320 0x0c, 0x0d, 0x10, 0x11,
321};
322
2f2f4251
M		 323static hda_nid_t stac922x_pin_nids[10] = {
324 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
325 0x0f, 0x10, 0x11, 0x15, 0x1b,
326};
327
e1f0d669
MR		 328static hda_nid_t stac92hd73xx_pin_nids[12] = {
329 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
330 0x0f, 0x10, 0x11, 0x12, 0x13,
331 0x14, 0x22
332};
333
e035b841
MR		 334static hda_nid_t stac92hd71bxx_pin_nids[10] = {
335 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
336 0x0f, 0x14, 0x18, 0x19, 0x1e,
337};
338
3cc08dc6
MP		 339static hda_nid_t stac927x_pin_nids[14] = {
340 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
341 0x0f, 0x10, 0x11, 0x12, 0x13,
342 0x14, 0x21, 0x22, 0x23,
343};
344
f3302a59
MP		 345static hda_nid_t stac9205_pin_nids[12] = {
346 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
347 0x0f, 0x14, 0x16, 0x17, 0x18,
348 0x21, 0x22,
f3302a59
MP		 349};
350
8b65727b
MP		 351static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
352 struct snd_ctl_elem_info *uinfo)
353{
354 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
355 struct sigmatel_spec *spec = codec->spec;
356 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
357}
358
359static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
360 struct snd_ctl_elem_value *ucontrol)
361{
362 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
363 struct sigmatel_spec *spec = codec->spec;
e1f0d669 364 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 365
e1f0d669 366 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 367 return 0;
368}
369
370static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
371 struct snd_ctl_elem_value *ucontrol)
372{
373 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
374 struct sigmatel_spec *spec = codec->spec;
e1f0d669 375 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 376
377 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 378 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 379}
380
c8b6bf9b 381static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 382{
383 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
384 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 385 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 386}
387
c8b6bf9b 388static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 389{
390 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
391 struct sigmatel_spec *spec = codec->spec;
392 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
393
394 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
395 return 0;
396}
397
c8b6bf9b 398static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 399{
400 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
401 struct sigmatel_spec *spec = codec->spec;
402 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
403
c7d4b2fa 404 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 405 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
406}
407
b22b4821
MR		 408static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
409 struct snd_ctl_elem_info *uinfo)
410{
411 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
412 struct sigmatel_spec *spec = codec->spec;
413 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
414}
415
416static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
417 struct snd_ctl_elem_value *ucontrol)
418{
419 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
420 struct sigmatel_spec *spec = codec->spec;
421
422 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
423 return 0;
424}
425
426static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
427 struct snd_ctl_elem_value *ucontrol)
428{
429 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
430 struct sigmatel_spec *spec = codec->spec;
431
432 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
433 spec->mono_nid, &spec->cur_mmux);
434}
435
5f10c4a9
ML		 436#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
437
438static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
439 struct snd_ctl_elem_value *ucontrol)
440{
441 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 442 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 443 struct sigmatel_spec *spec = codec->spec;
444
e1f0d669
MR		 445 ucontrol->value.integer.value[0] = !!(spec->aloopback &
446 (spec->aloopback_mask << idx));
5f10c4a9
ML		 447 return 0;
448}
449
450static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
451 struct snd_ctl_elem_value *ucontrol)
452{
453 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
454 struct sigmatel_spec *spec = codec->spec;
e1f0d669 455 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 456 unsigned int dac_mode;
e1f0d669 457 unsigned int val, idx_val;
5f10c4a9 458
e1f0d669
MR		 459 idx_val = spec->aloopback_mask << idx;
460 if (ucontrol->value.integer.value[0])
461 val = spec->aloopback | idx_val;
462 else
463 val = spec->aloopback & ~idx_val;
68ea7b2f 464 if (spec->aloopback == val)
5f10c4a9
ML		 465 return 0;
466
68ea7b2f 467 spec->aloopback = val;
5f10c4a9 468
e1f0d669
MR		 469 /* Only return the bits defined by the shift value of the
470 * first two bytes of the mask
471 */
5f10c4a9 472 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 473 kcontrol->private_value & 0xFFFF, 0x0);
474 dac_mode >>= spec->aloopback_shift;
5f10c4a9 475
e1f0d669 476 if (spec->aloopback & idx_val) {
5f10c4a9 477 snd_hda_power_up(codec);
e1f0d669 478 dac_mode |= idx_val;
5f10c4a9
ML		 479 } else {
480 snd_hda_power_down(codec);
e1f0d669 481 dac_mode &= ~idx_val;
5f10c4a9
ML		 482 }
483
484 snd_hda_codec_write_cache(codec, codec->afg, 0,
485 kcontrol->private_value >> 16, dac_mode);
486
487 return 1;
488}
489
c7d4b2fa 490static struct hda_verb stac9200_core_init[] = {
2f2f4251 491 /* set dac0mux for dac converter */
c7d4b2fa 492 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 493 {}
494};
495
1194b5b7
TI		 496static struct hda_verb stac9200_eapd_init[] = {
497 /* set dac0mux for dac converter */
498 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
499 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
500 {}
501};
502
e1f0d669
MR		 503static struct hda_verb stac92hd73xx_6ch_core_init[] = {
504 /* set master volume and direct control */
505 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
506 /* setup audio connections */
507 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
508 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
509 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
510 /* setup adcs to point to mixer */
511 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
512 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 513 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
514 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
515 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
516 /* setup import muxs */
517 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
518 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
519 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
520 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
521 {}
522};
523
524static struct hda_verb stac92hd73xx_8ch_core_init[] = {
525 /* set master volume and direct control */
526 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
527 /* setup audio connections */
528 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
529 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
530 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
531 /* connect hp ports to dac3 */
532 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
533 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
534 /* setup adcs to point to mixer */
535 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
536 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 537 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
538 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
539 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
540 /* setup import muxs */
541 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
542 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
543 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
544 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
545 {}
546};
547
548static struct hda_verb stac92hd73xx_10ch_core_init[] = {
549 /* set master volume and direct control */
550 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
551 /* setup audio connections */
552 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
553 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
554 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
555 /* dac3 is connected to import3 mux */
556 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
557 /* connect hp ports to dac4 */
558 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
559 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
560 /* setup adcs to point to mixer */
561 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
562 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 563 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
564 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
565 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
566 /* setup import muxs */
567 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
568 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
569 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
570 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
571 {}
572};
573
e035b841 574static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 575 /* set master volume and direct control */
576 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
577 /* connect headphone jack to dac1 */
578 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
579 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
580 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
581 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
582 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
583 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 584};
585
586static struct hda_verb stac92hd71bxx_analog_core_init[] = {
e035b841
MR		 587 /* set master volume and direct control */
588 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
589 /* connect headphone jack to dac1 */
590 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
9b35947f
MR		 591 /* connect ports 0d and 0f to audio mixer */
592 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
593 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
a64135a2 594 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
9b35947f
MR		 595 /* unmute dac0 input in audio mixer */
596 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
e035b841
MR		 597 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
598 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
599 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
600 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 601 {}
602};
603
8e21c34c
TD		 604static struct hda_verb stac925x_core_init[] = {
605 /* set dac0mux for dac converter */
606 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
607 {}
608};
609
c7d4b2fa 610static struct hda_verb stac922x_core_init[] = {
2f2f4251 611 /* set master volume and direct control */
c7d4b2fa 612 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 613 {}
614};
615
93ed1503 616static struct hda_verb d965_core_init[] = {
19039bd0 617 /* set master volume and direct control */
93ed1503 618 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 619 /* unmute node 0x1b */
620 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
621 /* select node 0x03 as DAC */
622 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
623 {}
624};
625
3cc08dc6
MP		 626static struct hda_verb stac927x_core_init[] = {
627 /* set master volume and direct control */
628 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
629 {}
630};
631
f3302a59
MP		 632static struct hda_verb stac9205_core_init[] = {
633 /* set master volume and direct control */
634 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
635 {}
636};
637
b22b4821
MR		 638#define STAC_MONO_MUX \
639 { \
640 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
641 .name = "Mono Mux", \
642 .count = 1, \
643 .info = stac92xx_mono_mux_enum_info, \
644 .get = stac92xx_mono_mux_enum_get, \
645 .put = stac92xx_mono_mux_enum_put, \
646 }
647
9e05b7a3 648#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 649 { \
650 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
651 .name = "Input Source", \
9e05b7a3 652 .count = cnt, \
ca7c5a8b
ML		 653 .info = stac92xx_mux_enum_info, \
654 .get = stac92xx_mux_enum_get, \
655 .put = stac92xx_mux_enum_put, \
656 }
657
e1f0d669 658#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 659 { \
660 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
661 .name = "Analog Loopback", \
e1f0d669 662 .count = cnt, \
5f10c4a9
ML		 663 .info = stac92xx_aloopback_info, \
664 .get = stac92xx_aloopback_get, \
665 .put = stac92xx_aloopback_put, \
666 .private_value = verb_read | (verb_write << 16), \
667 }
668
c8b6bf9b 669static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 670 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
671 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 672 STAC_INPUT_SOURCE(1),
2f2f4251
M		 673 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
674 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 675 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 676 { } /* end */
677};
678
e1f0d669 679static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 680 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
681
e1f0d669
MR		 682 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
683 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
684
685 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
686 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
687
688 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
689 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
690
691 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
692 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
693
694 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
695 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
696
697 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
698 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
699
700 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
701 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
702 { } /* end */
703};
704
705static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 706 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
707
e1f0d669
MR		 708 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
709 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
710
711 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
712 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
713
714 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
715 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
716
717 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
718 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
719
720 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
721 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
722
723 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
724 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
725
726 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
727 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
728 { } /* end */
729};
730
731static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 732 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
733
e1f0d669
MR		 734 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
735 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
736
737 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
738 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
739
740 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
741 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
742
743 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
744 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
745
746 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
747 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
748
749 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
750 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
751
752 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
753 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
754 { } /* end */
755};
756
541eee87 757static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 758 STAC_INPUT_SOURCE(2),
e035b841 759
9b35947f
MR		 760 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
761 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
762 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
763
764 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
765 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
766 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 767
9b35947f
MR		 768 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
769 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 770 { } /* end */
771};
772
541eee87 773static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 774 STAC_INPUT_SOURCE(2),
775 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
776
541eee87
MR		 777 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
778 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
779 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
780
781 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
782 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
783 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
784 { } /* end */
785};
786
8e21c34c 787static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 788 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 789 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
790 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
791 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
792 { } /* end */
793};
794
9e05b7a3 795static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 796 STAC_INPUT_SOURCE(2),
e1f0d669 797 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 798
799 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
800 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
801 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
802
803 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
804 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
805 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
806
2f2f4251
M		 807 { } /* end */
808};
809
19039bd0 810/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 811static struct snd_kcontrol_new stac922x_mixer[] = {
812 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 813 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
814 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
815 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
816
817 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
818 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
819 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 820 { } /* end */
821};
822
9e05b7a3 823
d1d985f0 824static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 825 STAC_INPUT_SOURCE(3),
e1f0d669 826 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 827
9e05b7a3
ML		 828 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
829 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
830 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
831
832 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
833 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
834 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
835
836 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
837 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
838 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 839 { } /* end */
840};
841
1697055e
TI		 842static struct snd_kcontrol_new stac_dmux_mixer = {
843 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
844 .name = "Digital Input Source",
845 /* count set later */
846 .info = stac92xx_dmux_enum_info,
847 .get = stac92xx_dmux_enum_get,
848 .put = stac92xx_dmux_enum_put,
849};
850
2134ea4f
TI		 851static const char *slave_vols[] = {
852 "Front Playback Volume",
853 "Surround Playback Volume",
854 "Center Playback Volume",
855 "LFE Playback Volume",
856 "Side Playback Volume",
857 "Headphone Playback Volume",
858 "Headphone Playback Volume",
859 "Speaker Playback Volume",
860 "External Speaker Playback Volume",
861 "Speaker2 Playback Volume",
862 NULL
863};
864
865static const char *slave_sws[] = {
866 "Front Playback Switch",
867 "Surround Playback Switch",
868 "Center Playback Switch",
869 "LFE Playback Switch",
870 "Side Playback Switch",
871 "Headphone Playback Switch",
872 "Headphone Playback Switch",
873 "Speaker Playback Switch",
874 "External Speaker Playback Switch",
875 "Speaker2 Playback Switch",
876 NULL
877};
878
2f2f4251
M		 879static int stac92xx_build_controls(struct hda_codec *codec)
880{
881 struct sigmatel_spec *spec = codec->spec;
882 int err;
c7d4b2fa 883 int i;
2f2f4251
M		 884
885 err = snd_hda_add_new_ctls(codec, spec->mixer);
886 if (err < 0)
887 return err;
c7d4b2fa
M		 888
889 for (i = 0; i < spec->num_mixers; i++) {
890 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
891 if (err < 0)
892 return err;
893 }
1697055e
TI		 894 if (spec->num_dmuxes > 0) {
895 stac_dmux_mixer.count = spec->num_dmuxes;
896 err = snd_ctl_add(codec->bus->card,
897 snd_ctl_new1(&stac_dmux_mixer, codec));
898 if (err < 0)
899 return err;
900 }
c7d4b2fa 901
dabbed6f
M		 902 if (spec->multiout.dig_out_nid) {
903 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
904 if (err < 0)
905 return err;
906 }
907 if (spec->dig_in_nid) {
908 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
909 if (err < 0)
910 return err;
911 }
2134ea4f
TI		 912
913 /* if we have no master control, let's create it */
914 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
915 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
916 HDA_OUTPUT, spec->vmaster_tlv);
917 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
918 spec->vmaster_tlv, slave_vols);
919 if (err < 0)
920 return err;
921 }
922 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
923 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
924 NULL, slave_sws);
925 if (err < 0)
926 return err;
927 }
928
dabbed6f 929 return 0;
2f2f4251
M		 930}
931
403d1944 932static unsigned int ref9200_pin_configs[8] = {
dabbed6f 933 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 934 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
935};
936
dfe495d0
TI		 937/*
938 STAC 9200 pin configs for
939 102801A8
940 102801DE
941 102801E8
942*/
943static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 944 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
945 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 946};
947
948/*
949 STAC 9200 pin configs for
950 102801C0
951 102801C1
952*/
953static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 954 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
955 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 956};
957
958/*
959 STAC 9200 pin configs for
960 102801C4 (Dell Dimension E310)
961 102801C5
962 102801C7
963 102801D9
964 102801DA
965 102801E3
966*/
967static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 968 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
969 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 970};
971
972
973/*
974 STAC 9200-32 pin configs for
975 102801B5 (Dell Inspiron 630m)
976 102801D8 (Dell Inspiron 640m)
977*/
978static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 979 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
980 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 981};
982
983/*
984 STAC 9200-32 pin configs for
985 102801C2 (Dell Latitude D620)
986 102801C8
987 102801CC (Dell Latitude D820)
988 102801D4
989 102801D6
990*/
991static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 992 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
993 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 994};
995
996/*
997 STAC 9200-32 pin configs for
998 102801CE (Dell XPS M1710)
999 102801CF (Dell Precision M90)
1000*/
1001static unsigned int dell9200_m23_pin_configs[8] = {
1002 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1003 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1004};
1005
1006/*
1007 STAC 9200-32 pin configs for
1008 102801C9
1009 102801CA
1010 102801CB (Dell Latitude 120L)
1011 102801D3
1012*/
1013static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1014 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1015 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1016};
1017
1018/*
1019 STAC 9200-32 pin configs for
1020 102801BD (Dell Inspiron E1505n)
1021 102801EE
1022 102801EF
1023*/
1024static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1025 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1026 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1027};
1028
1029/*
1030 STAC 9200-32 pin configs for
1031 102801F5 (Dell Inspiron 1501)
1032 102801F6
1033*/
1034static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1035 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1036 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1037};
1038
1039/*
1040 STAC 9200-32
1041 102801CD (Dell Inspiron E1705/9400)
1042*/
1043static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1044 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1045 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1046};
1047
1048
f5fcc13c
TI		 1049static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1050 [STAC_REF] = ref9200_pin_configs,
dfe495d0
TI		 1051 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1052 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1053 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1054 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1055 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1056 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1057 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1058 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1059 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1060 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 1061};
1062
f5fcc13c
TI		 1063static const char *stac9200_models[STAC_9200_MODELS] = {
1064 [STAC_REF] = "ref",
dfe495d0
TI		 1065 [STAC_9200_DELL_D21] = "dell-d21",
1066 [STAC_9200_DELL_D22] = "dell-d22",
1067 [STAC_9200_DELL_D23] = "dell-d23",
1068 [STAC_9200_DELL_M21] = "dell-m21",
1069 [STAC_9200_DELL_M22] = "dell-m22",
1070 [STAC_9200_DELL_M23] = "dell-m23",
1071 [STAC_9200_DELL_M24] = "dell-m24",
1072 [STAC_9200_DELL_M25] = "dell-m25",
1073 [STAC_9200_DELL_M26] = "dell-m26",
1074 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1075 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 1076};
1077
1078static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1079 /* SigmaTel reference board */
1080 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1081 "DFI LanParty", STAC_REF),
e7377071 1082 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1083 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1084 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1085 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1086 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1087 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1088 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1089 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1090 "unknown Dell", STAC_9200_DELL_D22),
1091 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1092 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1093 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1094 "Dell Latitude D620", STAC_9200_DELL_M22),
1095 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1096 "unknown Dell", STAC_9200_DELL_D23),
1097 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1098 "unknown Dell", STAC_9200_DELL_D23),
1099 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1100 "unknown Dell", STAC_9200_DELL_M22),
1101 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1102 "unknown Dell", STAC_9200_DELL_M24),
1103 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1104 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1105 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1106 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1107 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1108 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1109 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1110 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1111 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1112 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1113 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1114 "Dell Precision M90", STAC_9200_DELL_M23),
1115 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1116 "unknown Dell", STAC_9200_DELL_M22),
1117 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1118 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1119 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1120 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1121 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1122 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1123 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1124 "unknown Dell", STAC_9200_DELL_D23),
1125 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1126 "unknown Dell", STAC_9200_DELL_D23),
1127 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1128 "unknown Dell", STAC_9200_DELL_D21),
1129 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1130 "unknown Dell", STAC_9200_DELL_D23),
1131 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1132 "unknown Dell", STAC_9200_DELL_D21),
1133 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1134 "unknown Dell", STAC_9200_DELL_M25),
1135 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1136 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1137 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1138 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1139 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1140 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 1141 /* Panasonic */
1142 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 1143 /* Gateway machines needs EAPD to be set on resume */
1144 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1145 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1146 STAC_9200_GATEWAY),
1147 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1148 STAC_9200_GATEWAY),
403d1944
MP		 1149 {} /* terminator */
1150};
1151
8e21c34c
TD		 1152static unsigned int ref925x_pin_configs[8] = {
1153 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1154 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1155};
1156
1157static unsigned int stac925x_MA6_pin_configs[8] = {
1158 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1159 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1160};
1161
2c11f955
TD		 1162static unsigned int stac925x_PA6_pin_configs[8] = {
1163 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1164 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1165};
1166
8e21c34c 1167static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1168 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1169 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1170};
1171
1172static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1173 [STAC_REF] = ref925x_pin_configs,
1174 [STAC_M2_2] = stac925xM2_2_pin_configs,
1175 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1176 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1177};
1178
1179static const char *stac925x_models[STAC_925x_MODELS] = {
1180 [STAC_REF] = "ref",
1181 [STAC_M2_2] = "m2-2",
1182 [STAC_MA6] = "m6",
2c11f955 1183 [STAC_PA6] = "pa6",
8e21c34c
TD		 1184};
1185
1186static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1187 /* SigmaTel reference board */
1188 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1189 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1190 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1191 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1192 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1193 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1194 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1195 {} /* terminator */
1196};
1197
e1f0d669
MR		 1198static unsigned int ref92hd73xx_pin_configs[12] = {
1199 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1200 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1201 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
1202};
1203
1204static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
1205 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1206};
1207
1208static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1209 [STAC_92HD73XX_REF] = "ref",
1210};
1211
1212static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1213 /* SigmaTel reference board */
1214 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1215 "DFI LanParty", STAC_92HD73XX_REF),
1216 {} /* terminator */
1217};
1218
e035b841
MR		 1219static unsigned int ref92hd71bxx_pin_configs[10] = {
1220 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1221 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1222 0x90a000f0, 0x01452050,
1223};
1224
1225static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1226 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
1227};
1228
1229static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1230 [STAC_92HD71BXX_REF] = "ref",
1231};
1232
1233static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1234 /* SigmaTel reference board */
1235 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1236 "DFI LanParty", STAC_92HD71BXX_REF),
1237 {} /* terminator */
1238};
1239
403d1944
MP		 1240static unsigned int ref922x_pin_configs[10] = {
1241 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1242 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1243 0x40000100, 0x40000100,
1244};
1245
dfe495d0
TI		 1246/*
1247 STAC 922X pin configs for
1248 102801A7
1249 102801AB
1250 102801A9
1251 102801D1
1252 102801D2
1253*/
1254static unsigned int dell_922x_d81_pin_configs[10] = {
1255 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1256 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1257 0x01813122, 0x400001f2,
1258};
1259
1260/*
1261 STAC 922X pin configs for
1262 102801AC
1263 102801D0
1264*/
1265static unsigned int dell_922x_d82_pin_configs[10] = {
1266 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1267 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1268 0x01813122, 0x400001f1,
1269};
1270
1271/*
1272 STAC 922X pin configs for
1273 102801BF
1274*/
1275static unsigned int dell_922x_m81_pin_configs[10] = {
1276 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1277 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1278 0x40C003f1, 0x405003f0,
1279};
1280
1281/*
1282 STAC 9221 A1 pin configs for
1283 102801D7 (Dell XPS M1210)
1284*/
1285static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1286 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1287 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1288 0x508003f3, 0x405003f4,
1289};
1290
403d1944 1291static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1292 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1293 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1294 0x02a19120, 0x40000100,
1295};
1296
1297static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1298 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1299 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1300 0x02a19320, 0x40000100,
1301};
1302
5d5d3bc3
IZ		 1303static unsigned int intel_mac_v1_pin_configs[10] = {
1304 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1305 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1306 0x400000fc, 0x400000fb,
1307};
1308
1309static unsigned int intel_mac_v2_pin_configs[10] = {
1310 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1311 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1312 0x400000fc, 0x400000fb,
6f0778d8
NB		 1313};
1314
5d5d3bc3
IZ		 1315static unsigned int intel_mac_v3_pin_configs[10] = {
1316 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1317 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1318 0x400000fc, 0x400000fb,
1319};
1320
5d5d3bc3
IZ		 1321static unsigned int intel_mac_v4_pin_configs[10] = {
1322 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1323 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1324 0x400000fc, 0x400000fb,
1325};
1326
5d5d3bc3
IZ		 1327static unsigned int intel_mac_v5_pin_configs[10] = {
1328 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1329 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1330 0x400000fc, 0x400000fb,
0dae0f83
TI		 1331};
1332
76c08828 1333
19039bd0 1334static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1335 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1336 [STAC_D945GTP3] = d945gtp3_pin_configs,
1337 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1338 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1339 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1340 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1341 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1342 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1343 /* for backward compatibility */
5d5d3bc3
IZ		 1344 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1345 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1346 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1347 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1348 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1349 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1350 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1351 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1352 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1353 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1354};
1355
f5fcc13c
TI		 1356static const char *stac922x_models[STAC_922X_MODELS] = {
1357 [STAC_D945_REF] = "ref",
1358 [STAC_D945GTP5] = "5stack",
1359 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1360 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1361 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1362 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1363 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1364 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1365 /* for backward compatibility */
f5fcc13c 1366 [STAC_MACMINI] = "macmini",
3fc24d85 1367 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1368 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1369 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1370 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1371 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1372 [STAC_922X_DELL_D81] = "dell-d81",
1373 [STAC_922X_DELL_D82] = "dell-d82",
1374 [STAC_922X_DELL_M81] = "dell-m81",
1375 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1376};
1377
1378static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1379 /* SigmaTel reference board */
1380 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1381 "DFI LanParty", STAC_D945_REF),
1382 /* Intel 945G based systems */
1383 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1384 "Intel D945G", STAC_D945GTP3),
1385 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1386 "Intel D945G", STAC_D945GTP3),
1387 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1388 "Intel D945G", STAC_D945GTP3),
1389 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1390 "Intel D945G", STAC_D945GTP3),
1391 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1392 "Intel D945G", STAC_D945GTP3),
1393 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1394 "Intel D945G", STAC_D945GTP3),
1395 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1396 "Intel D945G", STAC_D945GTP3),
1397 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1398 "Intel D945G", STAC_D945GTP3),
1399 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1400 "Intel D945G", STAC_D945GTP3),
1401 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1402 "Intel D945G", STAC_D945GTP3),
1403 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1404 "Intel D945G", STAC_D945GTP3),
1405 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1406 "Intel D945G", STAC_D945GTP3),
1407 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1408 "Intel D945G", STAC_D945GTP3),
1409 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1410 "Intel D945G", STAC_D945GTP3),
1411 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1412 "Intel D945G", STAC_D945GTP3),
1413 /* Intel D945G 5-stack systems */
1414 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1415 "Intel D945G", STAC_D945GTP5),
1416 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1417 "Intel D945G", STAC_D945GTP5),
1418 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1419 "Intel D945G", STAC_D945GTP5),
1420 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1421 "Intel D945G", STAC_D945GTP5),
1422 /* Intel 945P based systems */
1423 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1424 "Intel D945P", STAC_D945GTP3),
1425 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1426 "Intel D945P", STAC_D945GTP3),
1427 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1428 "Intel D945P", STAC_D945GTP3),
1429 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1430 "Intel D945P", STAC_D945GTP3),
1431 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1432 "Intel D945P", STAC_D945GTP3),
1433 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1434 "Intel D945P", STAC_D945GTP5),
1435 /* other systems */
1436 /* Apple Mac Mini (early 2006) */
1437 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1438 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1439 /* Dell systems */
1440 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1441 "unknown Dell", STAC_922X_DELL_D81),
1442 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1443 "unknown Dell", STAC_922X_DELL_D81),
1444 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1445 "unknown Dell", STAC_922X_DELL_D81),
1446 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1447 "unknown Dell", STAC_922X_DELL_D82),
1448 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1449 "unknown Dell", STAC_922X_DELL_M81),
1450 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1451 "unknown Dell", STAC_922X_DELL_D82),
1452 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1453 "unknown Dell", STAC_922X_DELL_D81),
1454 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1455 "unknown Dell", STAC_922X_DELL_D81),
1456 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1457 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1458 {} /* terminator */
1459};
1460
3cc08dc6 1461static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1462 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1463 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1464 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1465 0x01c42190, 0x40000100,
3cc08dc6
MP		 1466};
1467
93ed1503 1468static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1469 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1470 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1471 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1472 0x40000100, 0x40000100
1473};
1474
93ed1503
TD		 1475static unsigned int d965_5st_pin_configs[14] = {
1476 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1477 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1478 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1479 0x40000100, 0x40000100
1480};
1481
4ff076e5
TD		 1482static unsigned int dell_3st_pin_configs[14] = {
1483 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1484 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1485 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1486 0x40c003fc, 0x40000100
1487};
1488
93ed1503 1489static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1490 [STAC_D965_REF] = ref927x_pin_configs,
1491 [STAC_D965_3ST] = d965_3st_pin_configs,
1492 [STAC_D965_5ST] = d965_5st_pin_configs,
1493 [STAC_DELL_3ST] = dell_3st_pin_configs,
1494 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1495};
1496
f5fcc13c 1497static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1498 [STAC_D965_REF] = "ref",
1499 [STAC_D965_3ST] = "3stack",
1500 [STAC_D965_5ST] = "5stack",
1501 [STAC_DELL_3ST] = "dell-3stack",
1502 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1503};
1504
1505static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1506 /* SigmaTel reference board */
1507 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1508 "DFI LanParty", STAC_D965_REF),
81d3dbde 1509 /* Intel 946 based systems */
f5fcc13c
TI		 1510 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1511 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1512 /* 965 based 3 stack systems */
f5fcc13c
TI		 1513 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1517 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1529 /* Dell 3 stack systems */
8e9068b1 1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1534 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1
MR		 1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1543 /* 965 based 5 stack systems */
f5fcc13c
TI		 1544 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1545 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1548 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1550 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1551 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1552 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1553 {} /* terminator */
1554};
1555
f3302a59
MP		 1556static unsigned int ref9205_pin_configs[12] = {
1557 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1558 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1559 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1560};
1561
dfe495d0
TI		 1562/*
1563 STAC 9205 pin configs for
1564 102801F1
1565 102801F2
1566 102801FC
1567 102801FD
1568 10280204
1569 1028021F
3fa2ef74 1570 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1571*/
1572static unsigned int dell_9205_m42_pin_configs[12] = {
1573 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1574 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1575 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1576};
1577
1578/*
1579 STAC 9205 pin configs for
1580 102801F9
1581 102801FA
1582 102801FE
1583 102801FF (Dell Precision M4300)
1584 10280206
1585 10280200
1586 10280201
1587*/
1588static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1589 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1590 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1591 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1592};
1593
dfe495d0 1594static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1595 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1596 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1597 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1598};
1599
f5fcc13c 1600static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1601 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1602 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1603 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1604 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1605};
1606
f5fcc13c
TI		 1607static const char *stac9205_models[STAC_9205_MODELS] = {
1608 [STAC_9205_REF] = "ref",
dfe495d0 1609 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1610 [STAC_9205_DELL_M43] = "dell-m43",
1611 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1612};
1613
1614static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1615 /* SigmaTel reference board */
1616 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1617 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1618 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1619 "unknown Dell", STAC_9205_DELL_M42),
1620 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1621 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1622 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1623 "Dell Precision", STAC_9205_DELL_M43),
1624 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1625 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1626 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1627 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1628 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1629 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1630 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1631 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1632 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1633 "unknown Dell", STAC_9205_DELL_M42),
1634 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1635 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1636 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1637 "Dell Precision", STAC_9205_DELL_M43),
1638 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1639 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1640 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1641 "Dell Precision", STAC_9205_DELL_M43),
1642 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1643 "Dell Inspiron", STAC_9205_DELL_M44),
1644 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1645 "Dell Inspiron", STAC_9205_DELL_M44),
1646 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1647 "Dell Inspiron", STAC_9205_DELL_M44),
1648 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1649 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1650 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1651 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1652 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1653 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1654 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1655 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1656 {} /* terminator */
1657};
1658
11b44bbd
RF		 1659static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1660{
1661 int i;
1662 struct sigmatel_spec *spec = codec->spec;
1663
1664 if (! spec->bios_pin_configs) {
1665 spec->bios_pin_configs = kcalloc(spec->num_pins,
1666 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1667 if (! spec->bios_pin_configs)
1668 return -ENOMEM;
1669 }
1670
1671 for (i = 0; i < spec->num_pins; i++) {
1672 hda_nid_t nid = spec->pin_nids[i];
1673 unsigned int pin_cfg;
1674
1675 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1676 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1677 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1678 nid, pin_cfg);
1679 spec->bios_pin_configs[i] = pin_cfg;
1680 }
1681
1682 return 0;
1683}
1684
87d48363
MR		 1685static void stac92xx_set_config_reg(struct hda_codec *codec,
1686 hda_nid_t pin_nid, unsigned int pin_config)
1687{
1688 int i;
1689 snd_hda_codec_write(codec, pin_nid, 0,
1690 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1691 pin_config & 0x000000ff);
1692 snd_hda_codec_write(codec, pin_nid, 0,
1693 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1694 (pin_config & 0x0000ff00) >> 8);
1695 snd_hda_codec_write(codec, pin_nid, 0,
1696 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1697 (pin_config & 0x00ff0000) >> 16);
1698 snd_hda_codec_write(codec, pin_nid, 0,
1699 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1700 pin_config >> 24);
1701 i = snd_hda_codec_read(codec, pin_nid, 0,
1702 AC_VERB_GET_CONFIG_DEFAULT,
1703 0x00);
1704 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1705 pin_nid, i);
1706}
1707
2f2f4251
M		 1708static void stac92xx_set_config_regs(struct hda_codec *codec)
1709{
1710 int i;
1711 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1712
87d48363
MR		 1713 if (!spec->pin_configs)
1714 return;
11b44bbd 1715
87d48363
MR		 1716 for (i = 0; i < spec->num_pins; i++)
1717 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1718 spec->pin_configs[i]);
2f2f4251 1719}
2f2f4251 1720
dabbed6f 1721/*
c7d4b2fa 1722 * Analog playback callbacks
dabbed6f 1723 */
c7d4b2fa
M		 1724static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1725 struct hda_codec *codec,
c8b6bf9b 1726 struct snd_pcm_substream *substream)
2f2f4251 1727{
dabbed6f 1728 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1729 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1730}
1731
2f2f4251
M		 1732static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1733 struct hda_codec *codec,
1734 unsigned int stream_tag,
1735 unsigned int format,
c8b6bf9b 1736 struct snd_pcm_substream *substream)
2f2f4251
M		 1737{
1738 struct sigmatel_spec *spec = codec->spec;
403d1944 1739 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1740}
1741
1742static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1743 struct hda_codec *codec,
c8b6bf9b 1744 struct snd_pcm_substream *substream)
2f2f4251
M		 1745{
1746 struct sigmatel_spec *spec = codec->spec;
1747 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1748}
1749
dabbed6f
M		 1750/*
1751 * Digital playback callbacks
1752 */
1753static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1754 struct hda_codec *codec,
c8b6bf9b 1755 struct snd_pcm_substream *substream)
dabbed6f
M		 1756{
1757 struct sigmatel_spec *spec = codec->spec;
1758 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1759}
1760
1761static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1762 struct hda_codec *codec,
c8b6bf9b 1763 struct snd_pcm_substream *substream)
dabbed6f
M		 1764{
1765 struct sigmatel_spec *spec = codec->spec;
1766 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1767}
1768
6b97eb45
TI		 1769static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1770 struct hda_codec *codec,
1771 unsigned int stream_tag,
1772 unsigned int format,
1773 struct snd_pcm_substream *substream)
1774{
1775 struct sigmatel_spec *spec = codec->spec;
1776 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1777 stream_tag, format, substream);
1778}
1779
dabbed6f 1780
2f2f4251
M		 1781/*
1782 * Analog capture callbacks
1783 */
1784static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1785 struct hda_codec *codec,
1786 unsigned int stream_tag,
1787 unsigned int format,
c8b6bf9b 1788 struct snd_pcm_substream *substream)
2f2f4251
M		 1789{
1790 struct sigmatel_spec *spec = codec->spec;
1791
1792 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1793 stream_tag, 0, format);
1794 return 0;
1795}
1796
1797static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1798 struct hda_codec *codec,
c8b6bf9b 1799 struct snd_pcm_substream *substream)
2f2f4251
M		 1800{
1801 struct sigmatel_spec *spec = codec->spec;
1802
1803 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1804 return 0;
1805}
1806
dabbed6f
M		 1807static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1808 .substreams = 1,
1809 .channels_min = 2,
1810 .channels_max = 2,
1811 /* NID is set in stac92xx_build_pcms */
1812 .ops = {
1813 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1814 .close = stac92xx_dig_playback_pcm_close,
1815 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1816 },
1817};
1818
1819static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1820 .substreams = 1,
1821 .channels_min = 2,
1822 .channels_max = 2,
1823 /* NID is set in stac92xx_build_pcms */
1824};
1825
2f2f4251
M		 1826static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1827 .substreams = 1,
1828 .channels_min = 2,
c7d4b2fa 1829 .channels_max = 8,
2f2f4251
M		 1830 .nid = 0x02, /* NID to query formats and rates */
1831 .ops = {
1832 .open = stac92xx_playback_pcm_open,
1833 .prepare = stac92xx_playback_pcm_prepare,
1834 .cleanup = stac92xx_playback_pcm_cleanup
1835 },
1836};
1837
3cc08dc6
MP		 1838static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1839 .substreams = 1,
1840 .channels_min = 2,
1841 .channels_max = 2,
1842 .nid = 0x06, /* NID to query formats and rates */
1843 .ops = {
1844 .open = stac92xx_playback_pcm_open,
1845 .prepare = stac92xx_playback_pcm_prepare,
1846 .cleanup = stac92xx_playback_pcm_cleanup
1847 },
1848};
1849
2f2f4251 1850static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1851 .channels_min = 2,
1852 .channels_max = 2,
9e05b7a3 1853 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1854 .ops = {
1855 .prepare = stac92xx_capture_pcm_prepare,
1856 .cleanup = stac92xx_capture_pcm_cleanup
1857 },
1858};
1859
1860static int stac92xx_build_pcms(struct hda_codec *codec)
1861{
1862 struct sigmatel_spec *spec = codec->spec;
1863 struct hda_pcm *info = spec->pcm_rec;
1864
1865 codec->num_pcms = 1;
1866 codec->pcm_info = info;
1867
c7d4b2fa 1868 info->name = "STAC92xx Analog";
2f2f4251 1869 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1870 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1871 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1872 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1873
1874 if (spec->alt_switch) {
1875 codec->num_pcms++;
1876 info++;
1877 info->name = "STAC92xx Analog Alt";
1878 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1879 }
2f2f4251 1880
dabbed6f
M		 1881 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1882 codec->num_pcms++;
1883 info++;
1884 info->name = "STAC92xx Digital";
1885 if (spec->multiout.dig_out_nid) {
1886 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1887 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1888 }
1889 if (spec->dig_in_nid) {
1890 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1891 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1892 }
1893 }
1894
2f2f4251
M		 1895 return 0;
1896}
1897
c960a03b
TI		 1898static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1899{
1900 unsigned int pincap = snd_hda_param_read(codec, nid,
1901 AC_PAR_PIN_CAP);
1902 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1903 if (pincap & AC_PINCAP_VREF_100)
1904 return AC_PINCTL_VREF_100;
1905 if (pincap & AC_PINCAP_VREF_80)
1906 return AC_PINCTL_VREF_80;
1907 if (pincap & AC_PINCAP_VREF_50)
1908 return AC_PINCTL_VREF_50;
1909 if (pincap & AC_PINCAP_VREF_GRD)
1910 return AC_PINCTL_VREF_GRD;
1911 return 0;
1912}
1913
403d1944
MP		 1914static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1915
1916{
82beb8fd
TI		 1917 snd_hda_codec_write_cache(codec, nid, 0,
1918 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1919}
1920
a5ce8890 1921#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1922
1923static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1924{
1925 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1926 struct sigmatel_spec *spec = codec->spec;
1927 int io_idx = kcontrol-> private_value & 0xff;
1928
1929 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1930 return 0;
1931}
1932
1933static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1934{
1935 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1936 struct sigmatel_spec *spec = codec->spec;
1937 hda_nid_t nid = kcontrol->private_value >> 8;
1938 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 1939 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 1940
1941 spec->io_switch[io_idx] = val;
1942
1943 if (val)
1944 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1945 else {
1946 unsigned int pinctl = AC_PINCTL_IN_EN;
1947 if (io_idx) /* set VREF for mic */
1948 pinctl |= stac92xx_get_vref(codec, nid);
1949 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1950 }
40c1d308
JZ		 1951
1952 /* check the auto-mute again: we need to mute/unmute the speaker
1953 * appropriately according to the pin direction
1954 */
1955 if (spec->hp_detect)
1956 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
1957
403d1944
MP		 1958 return 1;
1959}
1960
0fb87bb4
ML		 1961#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
1962
1963static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
1964 struct snd_ctl_elem_value *ucontrol)
1965{
1966 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1967 struct sigmatel_spec *spec = codec->spec;
1968
1969 ucontrol->value.integer.value[0] = spec->clfe_swap;
1970 return 0;
1971}
1972
1973static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
1974 struct snd_ctl_elem_value *ucontrol)
1975{
1976 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1977 struct sigmatel_spec *spec = codec->spec;
1978 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 1979 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 1980
68ea7b2f 1981 if (spec->clfe_swap == val)
0fb87bb4
ML		 1982 return 0;
1983
68ea7b2f 1984 spec->clfe_swap = val;
0fb87bb4
ML		 1985
1986 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
1987 spec->clfe_swap ? 0x4 : 0x0);
1988
1989 return 1;
1990}
1991
403d1944
MP		 1992#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1993 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1994 .name = xname, \
1995 .index = 0, \
1996 .info = stac92xx_io_switch_info, \
1997 .get = stac92xx_io_switch_get, \
1998 .put = stac92xx_io_switch_put, \
1999 .private_value = xpval, \
2000 }
2001
0fb87bb4
ML		 2002#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2003 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2004 .name = xname, \
2005 .index = 0, \
2006 .info = stac92xx_clfe_switch_info, \
2007 .get = stac92xx_clfe_switch_get, \
2008 .put = stac92xx_clfe_switch_put, \
2009 .private_value = xpval, \
2010 }
403d1944 2011
c7d4b2fa
M		 2012enum {
2013 STAC_CTL_WIDGET_VOL,
2014 STAC_CTL_WIDGET_MUTE,
09a99959 2015 STAC_CTL_WIDGET_MONO_MUX,
403d1944 2016 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2017 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2018};
2019
c8b6bf9b 2020static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2021 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2022 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2023 STAC_MONO_MUX,
403d1944 2024 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2025 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2026};
2027
2028/* add dynamic controls */
2029static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2030{
c8b6bf9b 2031 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2032
2033 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2034 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2035
2036 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2037 if (! knew)
2038 return -ENOMEM;
2039 if (spec->kctl_alloc) {
2040 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2041 kfree(spec->kctl_alloc);
2042 }
2043 spec->kctl_alloc = knew;
2044 spec->num_kctl_alloc = num;
2045 }
2046
2047 knew = &spec->kctl_alloc[spec->num_kctl_used];
2048 *knew = stac92xx_control_templates[type];
82fe0c58 2049 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2050 if (! knew->name)
2051 return -ENOMEM;
2052 knew->private_value = val;
2053 spec->num_kctl_used++;
2054 return 0;
2055}
2056
403d1944
MP		 2057/* flag inputs as additional dynamic lineouts */
2058static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2059{
2060 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2061 unsigned int wcaps, wtype;
2062 int i, num_dacs = 0;
2063
2064 /* use the wcaps cache to count all DACs available for line-outs */
2065 for (i = 0; i < codec->num_nodes; i++) {
2066 wcaps = codec->wcaps[i];
2067 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2068
7b043899
SL		 2069 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2070 num_dacs++;
2071 }
403d1944 2072
7b043899
SL		 2073 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2074
403d1944
MP		 2075 switch (cfg->line_outs) {
2076 case 3:
2077 /* add line-in as side */
7b043899 2078 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2079 cfg->line_out_pins[cfg->line_outs] =
2080 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2081 spec->line_switch = 1;
2082 cfg->line_outs++;
2083 }
2084 break;
2085 case 2:
2086 /* add line-in as clfe and mic as side */
7b043899 2087 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2088 cfg->line_out_pins[cfg->line_outs] =
2089 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2090 spec->line_switch = 1;
2091 cfg->line_outs++;
2092 }
7b043899 2093 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2094 cfg->line_out_pins[cfg->line_outs] =
2095 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2096 spec->mic_switch = 1;
2097 cfg->line_outs++;
2098 }
2099 break;
2100 case 1:
2101 /* add line-in as surr and mic as clfe */
7b043899 2102 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2103 cfg->line_out_pins[cfg->line_outs] =
2104 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2105 spec->line_switch = 1;
2106 cfg->line_outs++;
2107 }
7b043899 2108 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2109 cfg->line_out_pins[cfg->line_outs] =
2110 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2111 spec->mic_switch = 1;
2112 cfg->line_outs++;
2113 }
2114 break;
2115 }
2116
2117 return 0;
2118}
2119
7b043899
SL		 2120
2121static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2122{
2123 int i;
2124
2125 for (i = 0; i < spec->multiout.num_dacs; i++) {
2126 if (spec->multiout.dac_nids[i] == nid)
2127 return 1;
2128 }
2129
2130 return 0;
2131}
2132
3cc08dc6 2133/*
7b043899
SL		 2134 * Fill in the dac_nids table from the parsed pin configuration
2135 * This function only works when every pin in line_out_pins[]
2136 * contains atleast one DAC in its connection list. Some 92xx
2137 * codecs are not connected directly to a DAC, such as the 9200
2138 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2139 */
19039bd0 2140static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2141 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2142{
2143 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2144 int i, j, conn_len = 0;
2145 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2146 unsigned int wcaps, wtype;
2147
c7d4b2fa
M		 2148 for (i = 0; i < cfg->line_outs; i++) {
2149 nid = cfg->line_out_pins[i];
7b043899
SL		 2150 conn_len = snd_hda_get_connections(codec, nid, conn,
2151 HDA_MAX_CONNECTIONS);
2152 for (j = 0; j < conn_len; j++) {
2153 wcaps = snd_hda_param_read(codec, conn[j],
2154 AC_PAR_AUDIO_WIDGET_CAP);
2155 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2156 if (wtype != AC_WID_AUD_OUT ||
2157 (wcaps & AC_WCAP_DIGITAL))
2158 continue;
2159 /* conn[j] is a DAC routed to this line-out */
2160 if (!is_in_dac_nids(spec, conn[j]))
2161 break;
2162 }
2163
2164 if (j == conn_len) {
df802952
TI		 2165 if (spec->multiout.num_dacs > 0) {
2166 /* we have already working output pins,
2167 * so let's drop the broken ones again
2168 */
2169 cfg->line_outs = spec->multiout.num_dacs;
2170 break;
2171 }
7b043899
SL		 2172 /* error out, no available DAC found */
2173 snd_printk(KERN_ERR
2174 "%s: No available DAC for pin 0x%x\n",
2175 __func__, nid);
2176 return -ENODEV;
2177 }
2178
2179 spec->multiout.dac_nids[i] = conn[j];
2180 spec->multiout.num_dacs++;
2181 if (conn_len > 1) {
2182 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2183 snd_hda_codec_write_cache(codec, nid, 0,
2184 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2185
7b043899
SL		 2186 }
2187 }
c7d4b2fa 2188
7b043899
SL		 2189 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2190 spec->multiout.num_dacs,
2191 spec->multiout.dac_nids[0],
2192 spec->multiout.dac_nids[1],
2193 spec->multiout.dac_nids[2],
2194 spec->multiout.dac_nids[3],
2195 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2196 return 0;
2197}
2198
eb06ed8f
TI		 2199/* create volume control/switch for the given prefx type */
2200static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2201{
2202 char name[32];
2203 int err;
2204
2205 sprintf(name, "%s Playback Volume", pfx);
2206 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2207 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2208 if (err < 0)
2209 return err;
2210 sprintf(name, "%s Playback Switch", pfx);
2211 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2212 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2213 if (err < 0)
2214 return err;
2215 return 0;
2216}
2217
c7d4b2fa 2218/* add playback controls from the parsed DAC table */
0fb87bb4 2219static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2220 const struct auto_pin_cfg *cfg)
c7d4b2fa 2221{
19039bd0
TI		 2222 static const char *chname[4] = {
2223 "Front", "Surround", NULL /*CLFE*/, "Side"
2224 };
c7d4b2fa
M		 2225 hda_nid_t nid;
2226 int i, err;
2227
0fb87bb4
ML		 2228 struct sigmatel_spec *spec = codec->spec;
2229 unsigned int wid_caps;
2230
2231
c7d4b2fa 2232 for (i = 0; i < cfg->line_outs; i++) {
403d1944 2233 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2234 continue;
2235
2236 nid = spec->multiout.dac_nids[i];
2237
2238 if (i == 2) {
2239 /* Center/LFE */
eb06ed8f
TI		 2240 err = create_controls(spec, "Center", nid, 1);
2241 if (err < 0)
c7d4b2fa 2242 return err;
eb06ed8f
TI		 2243 err = create_controls(spec, "LFE", nid, 2);
2244 if (err < 0)
c7d4b2fa 2245 return err;
0fb87bb4
ML		 2246
2247 wid_caps = get_wcaps(codec, nid);
2248
2249 if (wid_caps & AC_WCAP_LR_SWAP) {
2250 err = stac92xx_add_control(spec,
2251 STAC_CTL_WIDGET_CLFE_SWITCH,
2252 "Swap Center/LFE Playback Switch", nid);
2253
2254 if (err < 0)
2255 return err;
2256 }
2257
c7d4b2fa 2258 } else {
eb06ed8f
TI		 2259 err = create_controls(spec, chname[i], nid, 3);
2260 if (err < 0)
c7d4b2fa
M		 2261 return err;
2262 }
2263 }
2264
403d1944
MP		 2265 if (spec->line_switch)
2266 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
2267 return err;
2268
2269 if (spec->mic_switch)
2270 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
2271 return err;
2272
c7d4b2fa
M		 2273 return 0;
2274}
2275
eb06ed8f 2276static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 2277{
7b043899
SL		 2278 if (is_in_dac_nids(spec, nid))
2279 return 1;
eb06ed8f
TI		 2280 if (spec->multiout.hp_nid == nid)
2281 return 1;
2282 return 0;
2283}
c7d4b2fa 2284
eb06ed8f
TI		 2285static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2286{
2287 if (!spec->multiout.hp_nid)
2288 spec->multiout.hp_nid = nid;
2289 else if (spec->multiout.num_dacs > 4) {
2290 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2291 return 1;
2292 } else {
2293 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2294 spec->multiout.num_dacs++;
2295 }
2296 return 0;
2297}
4e55096e 2298
eb06ed8f
TI		 2299/* add playback controls for Speaker and HP outputs */
2300static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2301 struct auto_pin_cfg *cfg)
2302{
2303 struct sigmatel_spec *spec = codec->spec;
2304 hda_nid_t nid;
2305 int i, old_num_dacs, err;
2306
2307 old_num_dacs = spec->multiout.num_dacs;
2308 for (i = 0; i < cfg->hp_outs; i++) {
2309 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2310 if (wid_caps & AC_WCAP_UNSOL_CAP)
2311 spec->hp_detect = 1;
2312 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2313 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2314 if (check_in_dac_nids(spec, nid))
2315 nid = 0;
2316 if (! nid)
c7d4b2fa 2317 continue;
eb06ed8f
TI		 2318 add_spec_dacs(spec, nid);
2319 }
2320 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2321 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2322 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2323 if (check_in_dac_nids(spec, nid))
2324 nid = 0;
eb06ed8f
TI		 2325 if (! nid)
2326 continue;
2327 add_spec_dacs(spec, nid);
c7d4b2fa 2328 }
1b290a51
MR		 2329 for (i = 0; i < cfg->line_outs; i++) {
2330 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2331 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2332 if (check_in_dac_nids(spec, nid))
2333 nid = 0;
2334 if (! nid)
2335 continue;
2336 add_spec_dacs(spec, nid);
2337 }
eb06ed8f
TI		 2338 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2339 static const char *pfxs[] = {
2340 "Speaker", "External Speaker", "Speaker2",
2341 };
2342 err = create_controls(spec, pfxs[i - old_num_dacs],
2343 spec->multiout.dac_nids[i], 3);
2344 if (err < 0)
2345 return err;
2346 }
2347 if (spec->multiout.hp_nid) {
2348 const char *pfx;
6020c008 2349 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 2350 pfx = "Master";
2351 else
2352 pfx = "Headphone";
2353 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
2354 if (err < 0)
2355 return err;
2356 }
c7d4b2fa
M		 2357
2358 return 0;
2359}
2360
b22b4821
MR		 2361/* labels for mono mux outputs */
2362static const char *stac92xx_mono_labels[3] = {
2363 "DAC0", "DAC1", "Mixer"
2364};
2365
2366/* create mono mux for mono out on capable codecs */
2367static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2368{
2369 struct sigmatel_spec *spec = codec->spec;
2370 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2371 int i, num_cons;
2372 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2373
2374 num_cons = snd_hda_get_connections(codec,
2375 spec->mono_nid,
2376 con_lst,
2377 HDA_MAX_NUM_INPUTS);
2378 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2379 return -EINVAL;
2380
2381 for (i = 0; i < num_cons; i++) {
2382 mono_mux->items[mono_mux->num_items].label =
2383 stac92xx_mono_labels[i];
2384 mono_mux->items[mono_mux->num_items].index = i;
2385 mono_mux->num_items++;
2386 }
09a99959
MR		 2387
2388 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2389 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2390}
2391
8b65727b 2392/* labels for dmic mux inputs */
ddc2cec4 2393static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2394 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2395 "Digital Mic 3", "Digital Mic 4"
2396};
2397
2398/* create playback/capture controls for input pins on dmic capable codecs */
2399static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2400 const struct auto_pin_cfg *cfg)
2401{
2402 struct sigmatel_spec *spec = codec->spec;
2403 struct hda_input_mux *dimux = &spec->private_dimux;
2404 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2405 int err, i, j;
2406 char name[32];
8b65727b
MP		 2407
2408 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2409 dimux->items[dimux->num_items].index = 0;
2410 dimux->num_items++;
2411
2412 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2413 hda_nid_t nid;
8b65727b
MP		 2414 int index;
2415 int num_cons;
0678accd 2416 unsigned int wcaps;
8b65727b
MP		 2417 unsigned int def_conf;
2418
2419 def_conf = snd_hda_codec_read(codec,
2420 spec->dmic_nids[i],
2421 0,
2422 AC_VERB_GET_CONFIG_DEFAULT,
2423 0);
2424 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2425 continue;
2426
0678accd 2427 nid = spec->dmic_nids[i];
8b65727b 2428 num_cons = snd_hda_get_connections(codec,
e1f0d669 2429 spec->dmux_nids[0],
8b65727b
MP		 2430 con_lst,
2431 HDA_MAX_NUM_INPUTS);
2432 for (j = 0; j < num_cons; j++)
0678accd 2433 if (con_lst[j] == nid) {
8b65727b
MP		 2434 index = j;
2435 goto found;
2436 }
2437 continue;
2438found:
0678accd
MR		 2439 wcaps = get_wcaps(codec, nid);
2440
2441 if (wcaps & AC_WCAP_OUT_AMP) {
2442 sprintf(name, "%s Capture Volume",
2443 stac92xx_dmic_labels[dimux->num_items]);
2444
2445 err = stac92xx_add_control(spec,
2446 STAC_CTL_WIDGET_VOL,
2447 name,
2448 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2449 if (err < 0)
2450 return err;
2451 }
2452
8b65727b
MP		 2453 dimux->items[dimux->num_items].label =
2454 stac92xx_dmic_labels[dimux->num_items];
2455 dimux->items[dimux->num_items].index = index;
2456 dimux->num_items++;
2457 }
2458
2459 return 0;
2460}
2461
c7d4b2fa
M		 2462/* create playback/capture controls for input pins */
2463static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2464{
2465 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2466 struct hda_input_mux *imux = &spec->private_imux;
2467 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2468 int i, j, k;
2469
2470 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2471 int index;
2472
2473 if (!cfg->input_pins[i])
2474 continue;
2475 index = -1;
2476 for (j = 0; j < spec->num_muxes; j++) {
2477 int num_cons;
2478 num_cons = snd_hda_get_connections(codec,
2479 spec->mux_nids[j],
2480 con_lst,
2481 HDA_MAX_NUM_INPUTS);
2482 for (k = 0; k < num_cons; k++)
2483 if (con_lst[k] == cfg->input_pins[i]) {
2484 index = k;
2485 goto found;
2486 }
c7d4b2fa 2487 }
314634bc
TI		 2488 continue;
2489 found:
2490 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2491 imux->items[imux->num_items].index = index;
2492 imux->num_items++;
c7d4b2fa
M		 2493 }
2494
7b043899 2495 if (imux->num_items) {
62fe78e9
SR		 2496 /*
2497 * Set the current input for the muxes.
2498 * The STAC9221 has two input muxes with identical source
2499 * NID lists. Hopefully this won't get confused.
2500 */
2501 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2502 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2503 AC_VERB_SET_CONNECT_SEL,
2504 imux->items[0].index);
62fe78e9
SR		 2505 }
2506 }
2507
c7d4b2fa
M		 2508 return 0;
2509}
2510
c7d4b2fa
M		 2511static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2512{
2513 struct sigmatel_spec *spec = codec->spec;
2514 int i;
2515
2516 for (i = 0; i < spec->autocfg.line_outs; i++) {
2517 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2518 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2519 }
2520}
2521
2522static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2523{
2524 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2525 int i;
c7d4b2fa 2526
eb06ed8f
TI		 2527 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2528 hda_nid_t pin;
2529 pin = spec->autocfg.hp_pins[i];
2530 if (pin) /* connect to front */
2531 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2532 }
2533 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2534 hda_nid_t pin;
2535 pin = spec->autocfg.speaker_pins[i];
2536 if (pin) /* connect to front */
2537 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2538 }
c7d4b2fa
M		 2539}
2540
3cc08dc6 2541static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2542{
2543 struct sigmatel_spec *spec = codec->spec;
2544 int err;
bcecd9bd 2545 int hp_speaker_swap = 0;
c7d4b2fa 2546
8b65727b
MP		 2547 if ((err = snd_hda_parse_pin_def_config(codec,
2548 &spec->autocfg,
2549 spec->dmic_nids)) < 0)
c7d4b2fa 2550 return err;
82bc955f 2551 if (! spec->autocfg.line_outs)
869264c4 2552 return 0; /* can't find valid pin config */
19039bd0 2553
bcecd9bd
JZ		 2554 /* If we have no real line-out pin and multiple hp-outs, HPs should
2555 * be set up as multi-channel outputs.
2556 */
2557 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2558 spec->autocfg.hp_outs > 1) {
2559 /* Copy hp_outs to line_outs, backup line_outs in
2560 * speaker_outs so that the following routines can handle
2561 * HP pins as primary outputs.
2562 */
2563 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2564 sizeof(spec->autocfg.line_out_pins));
2565 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2566 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2567 sizeof(spec->autocfg.hp_pins));
2568 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2569 hp_speaker_swap = 1;
2570 }
09a99959
MR		 2571 if (spec->autocfg.mono_out_pin) {
2572 int dir = (get_wcaps(codec, spec->autocfg.mono_out_pin)
2573 & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
2574 u32 caps = query_amp_caps(codec,
2575 spec->autocfg.mono_out_pin, dir);
2576 hda_nid_t conn_list[1];
2577
2578 /* get the mixer node and then the mono mux if it exists */
2579 if (snd_hda_get_connections(codec,
2580 spec->autocfg.mono_out_pin, conn_list, 1) &&
2581 snd_hda_get_connections(codec, conn_list[0],
2582 conn_list, 1)) {
2583
2584 int wcaps = get_wcaps(codec, conn_list[0]);
2585 int wid_type = (wcaps & AC_WCAP_TYPE)
2586 >> AC_WCAP_TYPE_SHIFT;
2587 /* LR swap check, some stac925x have a mux that
2588 * changes the DACs output path instead of the
2589 * mono-mux path.
2590 */
2591 if (wid_type == AC_WID_AUD_SEL &&
2592 !(wcaps & AC_WCAP_LR_SWAP))
2593 spec->mono_nid = conn_list[0];
2594 }
2595 /* all mono outs have a least a mute/unmute switch */
2596 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2597 "Mono Playback Switch",
2598 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2599 1, 0, dir));
2600 if (err < 0)
2601 return err;
2602 /* check to see if there is volume support for the amp */
2603 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2604 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2605 "Mono Playback Volume",
2606 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2607 1, 0, dir));
2608 if (err < 0)
2609 return err;
2610 }
2611
2612 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
2613 AC_PINCTL_OUT_EN);
2614 }
bcecd9bd 2615
403d1944
MP		 2616 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2617 return err;
19039bd0
TI		 2618 if (spec->multiout.num_dacs == 0)
2619 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2620 return err;
c7d4b2fa 2621
0fb87bb4
ML		 2622 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2623
2624 if (err < 0)
2625 return err;
2626
bcecd9bd
JZ		 2627 if (hp_speaker_swap == 1) {
2628 /* Restore the hp_outs and line_outs */
2629 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2630 sizeof(spec->autocfg.line_out_pins));
2631 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2632 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2633 sizeof(spec->autocfg.speaker_pins));
2634 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2635 memset(spec->autocfg.speaker_pins, 0,
2636 sizeof(spec->autocfg.speaker_pins));
2637 spec->autocfg.speaker_outs = 0;
2638 }
2639
0fb87bb4
ML		 2640 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2641
2642 if (err < 0)
2643 return err;
2644
2645 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2646
2647 if (err < 0)
c7d4b2fa
M		 2648 return err;
2649
b22b4821
MR		 2650 if (spec->mono_nid > 0) {
2651 err = stac92xx_auto_create_mono_output_ctls(codec);
2652 if (err < 0)
2653 return err;
2654 }
2655
8b65727b
MP		 2656 if (spec->num_dmics > 0)
2657 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2658 &spec->autocfg)) < 0)
2659 return err;
2660
c7d4b2fa 2661 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2662 if (spec->multiout.max_channels > 2)
c7d4b2fa 2663 spec->surr_switch = 1;
c7d4b2fa 2664
82bc955f 2665 if (spec->autocfg.dig_out_pin)
3cc08dc6 2666 spec->multiout.dig_out_nid = dig_out;
82bc955f 2667 if (spec->autocfg.dig_in_pin)
3cc08dc6 2668 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2669
2670 if (spec->kctl_alloc)
2671 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2672
2673 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2674 if (!spec->dinput_mux)
2675 spec->dinput_mux = &spec->private_dimux;
b22b4821 2676 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 2677
2678 return 1;
2679}
2680
82bc955f
TI		 2681/* add playback controls for HP output */
2682static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2683 struct auto_pin_cfg *cfg)
2684{
2685 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2686 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2687 unsigned int wid_caps;
2688
2689 if (! pin)
2690 return 0;
2691
2692 wid_caps = get_wcaps(codec, pin);
505cb341 2693 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2694 spec->hp_detect = 1;
82bc955f
TI		 2695
2696 return 0;
2697}
2698
160ea0dc
RF		 2699/* add playback controls for LFE output */
2700static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2701 struct auto_pin_cfg *cfg)
2702{
2703 struct sigmatel_spec *spec = codec->spec;
2704 int err;
2705 hda_nid_t lfe_pin = 0x0;
2706 int i;
2707
2708 /*
2709 * search speaker outs and line outs for a mono speaker pin
2710 * with an amp. If one is found, add LFE controls
2711 * for it.
2712 */
2713 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2714 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2715 unsigned long wcaps = get_wcaps(codec, pin);
2716 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2717 if (wcaps == AC_WCAP_OUT_AMP)
2718 /* found a mono speaker with an amp, must be lfe */
2719 lfe_pin = pin;
2720 }
2721
2722 /* if speaker_outs is 0, then speakers may be in line_outs */
2723 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2724 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2725 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2726 unsigned long cfg;
2727 cfg = snd_hda_codec_read(codec, pin, 0,
2728 AC_VERB_GET_CONFIG_DEFAULT,
2729 0x00);
2730 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2731 unsigned long wcaps = get_wcaps(codec, pin);
2732 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2733 if (wcaps == AC_WCAP_OUT_AMP)
2734 /* found a mono speaker with an amp,
2735 must be lfe */
2736 lfe_pin = pin;
2737 }
2738 }
2739 }
2740
2741 if (lfe_pin) {
eb06ed8f 2742 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2743 if (err < 0)
2744 return err;
2745 }
2746
2747 return 0;
2748}
2749
c7d4b2fa
M		 2750static int stac9200_parse_auto_config(struct hda_codec *codec)
2751{
2752 struct sigmatel_spec *spec = codec->spec;
2753 int err;
2754
df694daa 2755 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2756 return err;
2757
2758 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2759 return err;
2760
82bc955f
TI		 2761 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2762 return err;
2763
160ea0dc
RF		 2764 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2765 return err;
2766
82bc955f 2767 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2768 spec->multiout.dig_out_nid = 0x05;
82bc955f 2769 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2770 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2771
2772 if (spec->kctl_alloc)
2773 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2774
2775 spec->input_mux = &spec->private_imux;
8b65727b 2776 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2777
2778 return 1;
2779}
2780
62fe78e9
SR		 2781/*
2782 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2783 * funky external mute control using GPIO pins.
2784 */
2785
76e1ddfb
TI		 2786static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
2787 unsigned int data)
62fe78e9
SR		 2788{
2789 unsigned int gpiostate, gpiomask, gpiodir;
2790
2791 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2792 AC_VERB_GET_GPIO_DATA, 0);
76e1ddfb 2793 gpiostate = (gpiostate & ~mask) | (data & mask);
62fe78e9
SR		 2794
2795 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2796 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 2797 gpiomask |= mask;
62fe78e9
SR		 2798
2799 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2800 AC_VERB_GET_GPIO_DIRECTION, 0);
76e1ddfb 2801 gpiodir |= mask;
62fe78e9 2802
76e1ddfb 2803 /* Configure GPIOx as CMOS */
62fe78e9
SR		 2804 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2805
2806 snd_hda_codec_write(codec, codec->afg, 0,
2807 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 2808 snd_hda_codec_read(codec, codec->afg, 0,
2809 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 2810
2811 msleep(1);
2812
76e1ddfb
TI		 2813 snd_hda_codec_read(codec, codec->afg, 0,
2814 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 2815}
2816
314634bc
TI		 2817static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2818 unsigned int event)
2819{
2820 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2821 snd_hda_codec_write_cache(codec, nid, 0,
2822 AC_VERB_SET_UNSOLICITED_ENABLE,
2823 (AC_USRSP_EN | event));
314634bc
TI		 2824}
2825
a64135a2
MR		 2826static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
2827{
2828 int i;
2829 for (i = 0; i < cfg->hp_outs; i++)
2830 if (cfg->hp_pins[i] == nid)
2831 return 1; /* nid is a HP-Out */
2832
2833 return 0; /* nid is not a HP-Out */
2834};
2835
c7d4b2fa
M		 2836static int stac92xx_init(struct hda_codec *codec)
2837{
2838 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2839 struct auto_pin_cfg *cfg = &spec->autocfg;
2840 int i;
c7d4b2fa 2841
c7d4b2fa
M		 2842 snd_hda_sequence_write(codec, spec->init);
2843
82bc955f
TI		 2844 /* set up pins */
2845 if (spec->hp_detect) {
505cb341 2846 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2847 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2848 enable_pin_detect(codec, cfg->hp_pins[i],
2849 STAC_HP_EVENT);
0a07acaf
TI		 2850 /* force to enable the first line-out; the others are set up
2851 * in unsol_event
2852 */
2853 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2854 AC_PINCTL_OUT_EN);
eb995a8c 2855 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2856 /* fake event to set up pins */
2857 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2858 } else {
2859 stac92xx_auto_init_multi_out(codec);
2860 stac92xx_auto_init_hp_out(codec);
2861 }
2862 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2863 hda_nid_t nid = cfg->input_pins[i];
2864 if (nid) {
2865 unsigned int pinctl = AC_PINCTL_IN_EN;
2866 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2867 pinctl |= stac92xx_get_vref(codec, nid);
2868 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2869 }
82bc955f 2870 }
a64135a2
MR		 2871 for (i = 0; i < spec->num_dmics; i++)
2872 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2873 AC_PINCTL_IN_EN);
2874 for (i = 0; i < spec->num_pwrs; i++) {
2875 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
2876 ? STAC_HP_EVENT : STAC_PWR_EVENT;
2877 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
2878 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2879 /* outputs are only ports capable of power management
2880 * any attempts on powering down a input port cause the
2881 * referenced VREF to act quirky.
2882 */
2883 if (pinctl & AC_PINCTL_IN_EN)
2884 continue;
2885 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
2886 codec->patch_ops.unsol_event(codec, (event | i) << 26);
2887 }
8b65727b 2888
82bc955f
TI		 2889 if (cfg->dig_out_pin)
2890 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2891 AC_PINCTL_OUT_EN);
2892 if (cfg->dig_in_pin)
2893 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2894 AC_PINCTL_IN_EN);
2895
76e1ddfb 2896 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_data);
62fe78e9 2897
c7d4b2fa
M		 2898 return 0;
2899}
2900
2f2f4251
M		 2901static void stac92xx_free(struct hda_codec *codec)
2902{
c7d4b2fa
M		 2903 struct sigmatel_spec *spec = codec->spec;
2904 int i;
2905
2906 if (! spec)
2907 return;
2908
2909 if (spec->kctl_alloc) {
2910 for (i = 0; i < spec->num_kctl_used; i++)
2911 kfree(spec->kctl_alloc[i].name);
2912 kfree(spec->kctl_alloc);
2913 }
2914
11b44bbd
RF		 2915 if (spec->bios_pin_configs)
2916 kfree(spec->bios_pin_configs);
2917
c7d4b2fa 2918 kfree(spec);
2f2f4251
M		 2919}
2920
4e55096e
M		 2921static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2922 unsigned int flag)
2923{
2924 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2925 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2926
f9acba43
TI		 2927 if (pin_ctl & AC_PINCTL_IN_EN) {
2928 /*
2929 * we need to check the current set-up direction of
2930 * shared input pins since they can be switched via
2931 * "xxx as Output" mixer switch
2932 */
2933 struct sigmatel_spec *spec = codec->spec;
2934 struct auto_pin_cfg *cfg = &spec->autocfg;
2935 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2936 spec->line_switch) ||
2937 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2938 spec->mic_switch))
2939 return;
2940 }
2941
7b043899
SL		 2942 /* if setting pin direction bits, clear the current
2943 direction bits first */
2944 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2945 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2946
82beb8fd 2947 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2948 AC_VERB_SET_PIN_WIDGET_CONTROL,
2949 pin_ctl | flag);
2950}
2951
2952static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2953 unsigned int flag)
2954{
2955 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2956 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 2957 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2958 AC_VERB_SET_PIN_WIDGET_CONTROL,
2959 pin_ctl & ~flag);
2960}
2961
40c1d308 2962static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 2963{
2964 if (!nid)
2965 return 0;
2966 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 2967 & (1 << 31)) {
2968 unsigned int pinctl;
2969 pinctl = snd_hda_codec_read(codec, nid, 0,
2970 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2971 if (pinctl & AC_PINCTL_IN_EN)
2972 return 0; /* mic- or line-input */
2973 else
2974 return 1; /* HP-output */
2975 }
314634bc
TI		 2976 return 0;
2977}
2978
2979static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 2980{
2981 struct sigmatel_spec *spec = codec->spec;
2982 struct auto_pin_cfg *cfg = &spec->autocfg;
2983 int i, presence;
2984
eb06ed8f
TI		 2985 presence = 0;
2986 for (i = 0; i < cfg->hp_outs; i++) {
40c1d308 2987 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
314634bc
TI		 2988 if (presence)
2989 break;
eb06ed8f 2990 }
4e55096e
M		 2991
2992 if (presence) {
2993 /* disable lineouts, enable hp */
2994 for (i = 0; i < cfg->line_outs; i++)
2995 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
2996 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2997 for (i = 0; i < cfg->speaker_outs; i++)
2998 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
2999 AC_PINCTL_OUT_EN);
4e55096e
M		 3000 } else {
3001 /* enable lineouts, disable hp */
3002 for (i = 0; i < cfg->line_outs; i++)
3003 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3004 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3005 for (i = 0; i < cfg->speaker_outs; i++)
3006 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3007 AC_PINCTL_OUT_EN);
4e55096e
M		 3008 }
3009}
3010
a64135a2
MR		 3011static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3012{
3013 struct sigmatel_spec *spec = codec->spec;
3014 hda_nid_t nid = spec->pwr_nids[idx];
3015 int presence, val;
3016 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3017 & 0x000000ff;
3018 presence = get_hp_pin_presence(codec, nid);
3019 idx = 1 << idx;
3020
3021 if (presence)
3022 val &= ~idx;
3023 else
3024 val |= idx;
3025
3026 /* power down unused output ports */
3027 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3028};
3029
314634bc
TI		 3030static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3031{
a64135a2
MR		 3032 struct sigmatel_spec *spec = codec->spec;
3033 int idx = res >> 26 & 0x0f;
3034
3035 switch ((res >> 26) & 0x30) {
314634bc
TI		 3036 case STAC_HP_EVENT:
3037 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3038 /* fallthru */
3039 case STAC_PWR_EVENT:
3040 if (spec->num_pwrs > 0)
3041 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3042 }
3043}
3044
cb53c626 3045#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3046static int stac92xx_resume(struct hda_codec *codec)
3047{
dc81bed1
TI		 3048 struct sigmatel_spec *spec = codec->spec;
3049
11b44bbd 3050 stac92xx_set_config_regs(codec);
dc81bed1 3051 snd_hda_sequence_write(codec, spec->init);
76e1ddfb 3052 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_data);
82beb8fd
TI		 3053 snd_hda_codec_resume_amp(codec);
3054 snd_hda_codec_resume_cache(codec);
dc81bed1
TI		 3055 /* invoke unsolicited event to reset the HP state */
3056 if (spec->hp_detect)
3057 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3058 return 0;
3059}
3060#endif
3061
2f2f4251
M		 3062static struct hda_codec_ops stac92xx_patch_ops = {
3063 .build_controls = stac92xx_build_controls,
3064 .build_pcms = stac92xx_build_pcms,
3065 .init = stac92xx_init,
3066 .free = stac92xx_free,
4e55096e 3067 .unsol_event = stac92xx_unsol_event,
cb53c626 3068#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3069 .resume = stac92xx_resume,
3070#endif
2f2f4251
M		 3071};
3072
3073static int patch_stac9200(struct hda_codec *codec)
3074{
3075 struct sigmatel_spec *spec;
c7d4b2fa 3076 int err;
2f2f4251 3077
e560d8d8 3078 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3079 if (spec == NULL)
3080 return -ENOMEM;
3081
3082 codec->spec = spec;
a4eed138 3083 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3084 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3085 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3086 stac9200_models,
3087 stac9200_cfg_tbl);
11b44bbd
RF		 3088 if (spec->board_config < 0) {
3089 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3090 err = stac92xx_save_bios_config_regs(codec);
3091 if (err < 0) {
3092 stac92xx_free(codec);
3093 return err;
3094 }
3095 spec->pin_configs = spec->bios_pin_configs;
3096 } else {
403d1944
MP		 3097 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3098 stac92xx_set_config_regs(codec);
3099 }
2f2f4251
M		 3100
3101 spec->multiout.max_channels = 2;
3102 spec->multiout.num_dacs = 1;
3103 spec->multiout.dac_nids = stac9200_dac_nids;
3104 spec->adc_nids = stac9200_adc_nids;
3105 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3106 spec->num_muxes = 1;
8b65727b 3107 spec->num_dmics = 0;
9e05b7a3 3108 spec->num_adcs = 1;
a64135a2 3109 spec->num_pwrs = 0;
c7d4b2fa 3110
1194b5b7
TI		 3111 if (spec->board_config == STAC_9200_GATEWAY)
3112 spec->init = stac9200_eapd_init;
3113 else
3114 spec->init = stac9200_core_init;
2f2f4251 3115 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 3116
3117 err = stac9200_parse_auto_config(codec);
3118 if (err < 0) {
3119 stac92xx_free(codec);
3120 return err;
3121 }
2f2f4251
M		 3122
3123 codec->patch_ops = stac92xx_patch_ops;
3124
3125 return 0;
3126}
3127
8e21c34c
TD		 3128static int patch_stac925x(struct hda_codec *codec)
3129{
3130 struct sigmatel_spec *spec;
3131 int err;
3132
3133 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3134 if (spec == NULL)
3135 return -ENOMEM;
3136
3137 codec->spec = spec;
a4eed138 3138 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3139 spec->pin_nids = stac925x_pin_nids;
3140 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3141 stac925x_models,
3142 stac925x_cfg_tbl);
9e507abd 3143 again:
8e21c34c 3144 if (spec->board_config < 0) {
2c11f955
TD		 3145 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3146 "using BIOS defaults\n");
8e21c34c
TD		 3147 err = stac92xx_save_bios_config_regs(codec);
3148 if (err < 0) {
3149 stac92xx_free(codec);
3150 return err;
3151 }
3152 spec->pin_configs = spec->bios_pin_configs;
3153 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3154 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3155 stac92xx_set_config_regs(codec);
3156 }
3157
3158 spec->multiout.max_channels = 2;
3159 spec->multiout.num_dacs = 1;
3160 spec->multiout.dac_nids = stac925x_dac_nids;
3161 spec->adc_nids = stac925x_adc_nids;
3162 spec->mux_nids = stac925x_mux_nids;
3163 spec->num_muxes = 1;
9e05b7a3 3164 spec->num_adcs = 1;
a64135a2 3165 spec->num_pwrs = 0;
2c11f955
TD		 3166 switch (codec->vendor_id) {
3167 case 0x83847632: /* STAC9202 */
3168 case 0x83847633: /* STAC9202D */
3169 case 0x83847636: /* STAC9251 */
3170 case 0x83847637: /* STAC9251D */
f6e9852a 3171 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3172 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3173 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3174 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3175 break;
3176 default:
3177 spec->num_dmics = 0;
3178 break;
3179 }
8e21c34c
TD		 3180
3181 spec->init = stac925x_core_init;
3182 spec->mixer = stac925x_mixer;
3183
3184 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3185 if (!err) {
3186 if (spec->board_config < 0) {
3187 printk(KERN_WARNING "hda_codec: No auto-config is "
3188 "available, default to model=ref\n");
3189 spec->board_config = STAC_925x_REF;
3190 goto again;
3191 }
3192 err = -EINVAL;
3193 }
8e21c34c
TD		 3194 if (err < 0) {
3195 stac92xx_free(codec);
3196 return err;
3197 }
3198
3199 codec->patch_ops = stac92xx_patch_ops;
3200
3201 return 0;
3202}
3203
e1f0d669
MR		 3204static struct hda_input_mux stac92hd73xx_dmux = {
3205 .num_items = 4,
3206 .items = {
3207 { "Analog Inputs", 0x0b },
3208 { "CD", 0x08 },
3209 { "Digital Mic 1", 0x09 },
3210 { "Digital Mic 2", 0x0a },
3211 }
3212};
3213
3214static int patch_stac92hd73xx(struct hda_codec *codec)
3215{
3216 struct sigmatel_spec *spec;
3217 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3218 int err = 0;
3219
3220 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3221 if (spec == NULL)
3222 return -ENOMEM;
3223
3224 codec->spec = spec;
3225 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3226 spec->pin_nids = stac92hd73xx_pin_nids;
3227 spec->board_config = snd_hda_check_board_config(codec,
3228 STAC_92HD73XX_MODELS,
3229 stac92hd73xx_models,
3230 stac92hd73xx_cfg_tbl);
3231again:
3232 if (spec->board_config < 0) {
3233 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3234 " STAC92HD73XX, using BIOS defaults\n");
3235 err = stac92xx_save_bios_config_regs(codec);
3236 if (err < 0) {
3237 stac92xx_free(codec);
3238 return err;
3239 }
3240 spec->pin_configs = spec->bios_pin_configs;
3241 } else {
3242 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3243 stac92xx_set_config_regs(codec);
3244 }
3245
3246 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3247 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3248
3249 if (spec->multiout.num_dacs < 0) {
3250 printk(KERN_WARNING "hda_codec: Could not determine "
3251 "number of channels defaulting to DAC count\n");
3252 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3253 }
3254
3255 switch (spec->multiout.num_dacs) {
3256 case 0x3: /* 6 Channel */
3257 spec->mixer = stac92hd73xx_6ch_mixer;
3258 spec->init = stac92hd73xx_6ch_core_init;
3259 break;
3260 case 0x4: /* 8 Channel */
3261 spec->multiout.hp_nid = 0x18;
3262 spec->mixer = stac92hd73xx_8ch_mixer;
3263 spec->init = stac92hd73xx_8ch_core_init;
3264 break;
3265 case 0x5: /* 10 Channel */
3266 spec->multiout.hp_nid = 0x19;
3267 spec->mixer = stac92hd73xx_10ch_mixer;
3268 spec->init = stac92hd73xx_10ch_core_init;
3269 };
3270
3271 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3272 spec->aloopback_mask = 0x01;
3273 spec->aloopback_shift = 8;
3274
3275 spec->mux_nids = stac92hd73xx_mux_nids;
3276 spec->adc_nids = stac92hd73xx_adc_nids;
3277 spec->dmic_nids = stac92hd73xx_dmic_nids;
3278 spec->dmux_nids = stac92hd73xx_dmux_nids;
3279
3280 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3281 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
3282 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
1697055e 3283 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3284 spec->dinput_mux = &stac92hd73xx_dmux;
3285 /* GPIO0 High = Enable EAPD */
3286 spec->gpio_mask = spec->gpio_data = 0x000001;
e1f0d669 3287
a64135a2
MR		 3288 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3289 spec->pwr_nids = stac92hd73xx_pwr_nids;
3290
e1f0d669
MR		 3291 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3292
3293 if (!err) {
3294 if (spec->board_config < 0) {
3295 printk(KERN_WARNING "hda_codec: No auto-config is "
3296 "available, default to model=ref\n");
3297 spec->board_config = STAC_92HD73XX_REF;
3298 goto again;
3299 }
3300 err = -EINVAL;
3301 }
3302
3303 if (err < 0) {
3304 stac92xx_free(codec);
3305 return err;
3306 }
3307
3308 codec->patch_ops = stac92xx_patch_ops;
3309
3310 return 0;
3311}
3312
e035b841
MR		 3313static int patch_stac92hd71bxx(struct hda_codec *codec)
3314{
3315 struct sigmatel_spec *spec;
3316 int err = 0;
3317
3318 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3319 if (spec == NULL)
3320 return -ENOMEM;
3321
3322 codec->spec = spec;
3323 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
3324 spec->pin_nids = stac92hd71bxx_pin_nids;
3325 spec->board_config = snd_hda_check_board_config(codec,
3326 STAC_92HD71BXX_MODELS,
3327 stac92hd71bxx_models,
3328 stac92hd71bxx_cfg_tbl);
3329again:
3330 if (spec->board_config < 0) {
3331 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3332 " STAC92HD71BXX, using BIOS defaults\n");
3333 err = stac92xx_save_bios_config_regs(codec);
3334 if (err < 0) {
3335 stac92xx_free(codec);
3336 return err;
3337 }
3338 spec->pin_configs = spec->bios_pin_configs;
3339 } else {
3340 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3341 stac92xx_set_config_regs(codec);
3342 }
3343
541eee87
MR		 3344 switch (codec->vendor_id) {
3345 case 0x111d76b6: /* 4 Port without Analog Mixer */
3346 case 0x111d76b7:
3347 case 0x111d76b4: /* 6 Port without Analog Mixer */
3348 case 0x111d76b5:
3349 spec->mixer = stac92hd71bxx_mixer;
3350 spec->init = stac92hd71bxx_core_init;
3351 break;
3352 default:
3353 spec->mixer = stac92hd71bxx_analog_mixer;
3354 spec->init = stac92hd71bxx_analog_core_init;
3355 }
3356
3357 spec->aloopback_mask = 0x20;
3358 spec->aloopback_shift = 0;
3359
e035b841 3360 spec->gpio_mask = spec->gpio_data = 0x00000001; /* GPIO0 High = EAPD */
e035b841 3361
e035b841
MR		 3362 spec->mux_nids = stac92hd71bxx_mux_nids;
3363 spec->adc_nids = stac92hd71bxx_adc_nids;
3364 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3365 spec->dmux_nids = stac92hd71bxx_dmux_nids;
e035b841
MR		 3366
3367 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3368 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3369 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3370 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3371
a64135a2
MR		 3372 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3373 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3374
e035b841
MR		 3375 spec->multiout.num_dacs = 2;
3376 spec->multiout.hp_nid = 0x11;
3377 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3378
3379 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3380 if (!err) {
3381 if (spec->board_config < 0) {
3382 printk(KERN_WARNING "hda_codec: No auto-config is "
3383 "available, default to model=ref\n");
3384 spec->board_config = STAC_92HD71BXX_REF;
3385 goto again;
3386 }
3387 err = -EINVAL;
3388 }
3389
3390 if (err < 0) {
3391 stac92xx_free(codec);
3392 return err;
3393 }
3394
3395 codec->patch_ops = stac92xx_patch_ops;
3396
3397 return 0;
3398};
3399
2f2f4251
M		 3400static int patch_stac922x(struct hda_codec *codec)
3401{
3402 struct sigmatel_spec *spec;
c7d4b2fa 3403 int err;
2f2f4251 3404
e560d8d8 3405 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3406 if (spec == NULL)
3407 return -ENOMEM;
3408
3409 codec->spec = spec;
a4eed138 3410 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3411 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3412 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3413 stac922x_models,
3414 stac922x_cfg_tbl);
5d5d3bc3 3415 if (spec->board_config == STAC_INTEL_MAC_V3) {
76e1ddfb 3416 spec->gpio_mask = spec->gpio_data = 0x03;
3fc24d85
TI		 3417 /* Intel Macs have all same PCI SSID, so we need to check
3418 * codec SSID to distinguish the exact models
3419 */
6f0778d8 3420 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3421 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3422
3423 case 0x106b0800:
3424 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3425 break;
5d5d3bc3
IZ		 3426 case 0x106b0600:
3427 case 0x106b0700:
3428 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3429 break;
5d5d3bc3
IZ		 3430 case 0x106b0e00:
3431 case 0x106b0f00:
3432 case 0x106b1600:
3433 case 0x106b1700:
3434 case 0x106b0200:
3435 case 0x106b1e00:
3436 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3437 break;
5d5d3bc3
IZ		 3438 case 0x106b1a00:
3439 case 0x00000100:
3440 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3441 break;
5d5d3bc3
IZ		 3442 case 0x106b0a00:
3443 case 0x106b2200:
3444 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3445 break;
3fc24d85
TI		 3446 }
3447 }
3448
9e507abd 3449 again:
11b44bbd
RF		 3450 if (spec->board_config < 0) {
3451 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3452 "using BIOS defaults\n");
3453 err = stac92xx_save_bios_config_regs(codec);
3454 if (err < 0) {
3455 stac92xx_free(codec);
3456 return err;
3457 }
3458 spec->pin_configs = spec->bios_pin_configs;
3459 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3460 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3461 stac92xx_set_config_regs(codec);
3462 }
2f2f4251 3463
c7d4b2fa
M		 3464 spec->adc_nids = stac922x_adc_nids;
3465 spec->mux_nids = stac922x_mux_nids;
2549413e 3466 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3467 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3468 spec->num_dmics = 0;
a64135a2 3469 spec->num_pwrs = 0;
c7d4b2fa
M		 3470
3471 spec->init = stac922x_core_init;
2f2f4251 3472 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3473
3474 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3475
3cc08dc6 3476 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3477 if (!err) {
3478 if (spec->board_config < 0) {
3479 printk(KERN_WARNING "hda_codec: No auto-config is "
3480 "available, default to model=ref\n");
3481 spec->board_config = STAC_D945_REF;
3482 goto again;
3483 }
3484 err = -EINVAL;
3485 }
3cc08dc6
MP		 3486 if (err < 0) {
3487 stac92xx_free(codec);
3488 return err;
3489 }
3490
3491 codec->patch_ops = stac92xx_patch_ops;
3492
807a4636
TI		 3493 /* Fix Mux capture level; max to 2 */
3494 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3495 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3496 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3497 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3498 (0 << AC_AMPCAP_MUTE_SHIFT));
3499
3cc08dc6
MP		 3500 return 0;
3501}
3502
3503static int patch_stac927x(struct hda_codec *codec)
3504{
3505 struct sigmatel_spec *spec;
3506 int err;
3507
3508 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3509 if (spec == NULL)
3510 return -ENOMEM;
3511
3512 codec->spec = spec;
a4eed138 3513 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3514 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3515 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3516 stac927x_models,
3517 stac927x_cfg_tbl);
9e507abd 3518 again:
8e9068b1
MR		 3519 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3520 if (spec->board_config < 0)
3521 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3522 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3523 err = stac92xx_save_bios_config_regs(codec);
3524 if (err < 0) {
3525 stac92xx_free(codec);
3526 return err;
3527 }
3528 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3529 } else {
3cc08dc6
MP		 3530 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3531 stac92xx_set_config_regs(codec);
3532 }
3533
8e9068b1
MR		 3534 spec->adc_nids = stac927x_adc_nids;
3535 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3536 spec->mux_nids = stac927x_mux_nids;
3537 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
3538 spec->multiout.dac_nids = spec->dac_nids;
3539
81d3dbde 3540 switch (spec->board_config) {
93ed1503 3541 case STAC_D965_3ST:
93ed1503 3542 case STAC_D965_5ST:
8e9068b1
MR		 3543 /* GPIO0 High = Enable EAPD */
3544 spec->gpio_mask = spec->gpio_data = 0x00000001;
3545 spec->num_dmics = 0;
3546
93ed1503 3547 spec->init = d965_core_init;
9e05b7a3 3548 spec->mixer = stac927x_mixer;
81d3dbde 3549 break;
8e9068b1 3550 case STAC_DELL_BIOS:
2f32d909
MR		 3551 /* correct the front output jack as a hp out */
3552 stac92xx_set_config_reg(codec, 0x0f, 0x02270110);
c481fca3
MR		 3553 /* correct the front input jack as a mic */
3554 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3555 /* fallthru */
8e9068b1
MR		 3556 case STAC_DELL_3ST:
3557 /* GPIO2 High = Enable EAPD */
3558 spec->gpio_mask = spec->gpio_data = 0x00000004;
7f16859a
MR		 3559 spec->dmic_nids = stac927x_dmic_nids;
3560 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3561
8e9068b1
MR		 3562 spec->init = d965_core_init;
3563 spec->mixer = stac927x_mixer;
3564 spec->dmux_nids = stac927x_dmux_nids;
1697055e 3565 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 3566 break;
3567 default:
f1f208d0
MR		 3568 /* GPIO0 High = Enable EAPD */
3569 spec->gpio_mask = spec->gpio_data = 0x00000001;
8e9068b1
MR		 3570 spec->num_dmics = 0;
3571
3572 spec->init = stac927x_core_init;
3573 spec->mixer = stac927x_mixer;
7f16859a
MR		 3574 }
3575
a64135a2 3576 spec->num_pwrs = 0;
e1f0d669
MR		 3577 spec->aloopback_mask = 0x40;
3578 spec->aloopback_shift = 0;
8e9068b1 3579
3cc08dc6 3580 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3581 if (!err) {
3582 if (spec->board_config < 0) {
3583 printk(KERN_WARNING "hda_codec: No auto-config is "
3584 "available, default to model=ref\n");
3585 spec->board_config = STAC_D965_REF;
3586 goto again;
3587 }
3588 err = -EINVAL;
3589 }
c7d4b2fa
M		 3590 if (err < 0) {
3591 stac92xx_free(codec);
3592 return err;
3593 }
2f2f4251
M		 3594
3595 codec->patch_ops = stac92xx_patch_ops;
3596
52987656
TI		 3597 /*
3598 * !!FIXME!!
3599 * The STAC927x seem to require fairly long delays for certain
3600 * command sequences. With too short delays (even if the answer
3601 * is set to RIRB properly), it results in the silence output
3602 * on some hardwares like Dell.
3603 *
3604 * The below flag enables the longer delay (see get_response
3605 * in hda_intel.c).
3606 */
3607 codec->bus->needs_damn_long_delay = 1;
3608
2f2f4251
M		 3609 return 0;
3610}
3611
f3302a59
MP		 3612static int patch_stac9205(struct hda_codec *codec)
3613{
3614 struct sigmatel_spec *spec;
8259980e 3615 int err;
f3302a59
MP		 3616
3617 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3618 if (spec == NULL)
3619 return -ENOMEM;
3620
3621 codec->spec = spec;
a4eed138 3622 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3623 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3624 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3625 stac9205_models,
3626 stac9205_cfg_tbl);
9e507abd 3627 again:
11b44bbd
RF		 3628 if (spec->board_config < 0) {
3629 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3630 err = stac92xx_save_bios_config_regs(codec);
3631 if (err < 0) {
3632 stac92xx_free(codec);
3633 return err;
3634 }
3635 spec->pin_configs = spec->bios_pin_configs;
3636 } else {
f3302a59
MP		 3637 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3638 stac92xx_set_config_regs(codec);
3639 }
3640
3641 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3642 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3643 spec->mux_nids = stac9205_mux_nids;
2549413e 3644 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3645 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3646 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3647 spec->dmux_nids = stac9205_dmux_nids;
1697055e 3648 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 3649 spec->num_pwrs = 0;
f3302a59
MP		 3650
3651 spec->init = stac9205_core_init;
3652 spec->mixer = stac9205_mixer;
3653
e1f0d669
MR		 3654 spec->aloopback_mask = 0x40;
3655 spec->aloopback_shift = 0;
f3302a59 3656 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3657
ae0a8ed8 3658 switch (spec->board_config){
ae0a8ed8 3659 case STAC_9205_DELL_M43:
87d48363
MR		 3660 /* Enable SPDIF in/out */
3661 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3662 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3663
8259980e 3664 spec->gpio_mask = 0x00000007; /* GPIO0-2 */
87d48363
MR		 3665 /* GPIO0 High = EAPD, GPIO1 Low = DRM,
3666 * GPIO2 High = Headphone Mute
3667 */
8259980e 3668 spec->gpio_data = 0x00000005;
ae0a8ed8
TD		 3669 break;
3670 default:
3671 /* GPIO0 High = EAPD */
3672 spec->gpio_mask = spec->gpio_data = 0x00000001;
3673 break;
3674 }
33382403 3675
f3302a59 3676 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 3677 if (!err) {
3678 if (spec->board_config < 0) {
3679 printk(KERN_WARNING "hda_codec: No auto-config is "
3680 "available, default to model=ref\n");
3681 spec->board_config = STAC_9205_REF;
3682 goto again;
3683 }
3684 err = -EINVAL;
3685 }
f3302a59
MP		 3686 if (err < 0) {
3687 stac92xx_free(codec);
3688 return err;
3689 }
3690
3691 codec->patch_ops = stac92xx_patch_ops;
3692
3693 return 0;
3694}
3695
db064e50 3696/*
6d859065 3697 * STAC9872 hack
db064e50
TI		 3698 */
3699
99ccc560 3700/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 3701static hda_nid_t vaio_dacs[] = { 0x2 };
3702#define VAIO_HP_DAC 0x5
3703static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
3704static hda_nid_t vaio_mux_nids[] = { 0x15 };
3705
3706static struct hda_input_mux vaio_mux = {
a3a2f429 3707 .num_items = 3,
db064e50 3708 .items = {
d773781c 3709 /* { "HP", 0x0 }, */
1624cb9a
TI		 3710 { "Mic Jack", 0x1 },
3711 { "Internal Mic", 0x2 },
db064e50
TI		 3712 { "PCM", 0x3 },
3713 }
3714};
3715
3716static struct hda_verb vaio_init[] = {
3717 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 3718 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 3719 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3720 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3721 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3722 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3723 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 3724 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3725 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3726 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3727 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3728 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3729 {}
3730};
3731
6d859065
GM		 3732static struct hda_verb vaio_ar_init[] = {
3733 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
3734 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3735 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3736 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3737/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
3738 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3739 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 3740 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3741 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3742/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
3743 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3744 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3745 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3746 {}
3747};
3748
db064e50 3749/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3750static struct hda_bind_ctls vaio_bind_master_vol = {
3751 .ops = &snd_hda_bind_vol,
3752 .values = {
3753 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3754 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3755 0
3756 },
3757};
db064e50
TI		 3758
3759/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3760static struct hda_bind_ctls vaio_bind_master_sw = {
3761 .ops = &snd_hda_bind_sw,
3762 .values = {
3763 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3764 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3765 0,
3766 },
3767};
db064e50
TI		 3768
3769static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 3770 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3771 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 3772 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3773 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3774 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3775 {
3776 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3777 .name = "Capture Source",
3778 .count = 1,
3779 .info = stac92xx_mux_enum_info,
3780 .get = stac92xx_mux_enum_get,
3781 .put = stac92xx_mux_enum_put,
3782 },
3783 {}
3784};
3785
6d859065 3786static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 3787 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3788 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 3789 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3790 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3791 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3792 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
3793 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
3794 {
3795 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3796 .name = "Capture Source",
3797 .count = 1,
3798 .info = stac92xx_mux_enum_info,
3799 .get = stac92xx_mux_enum_get,
3800 .put = stac92xx_mux_enum_put,
3801 },
3802 {}
3803};
3804
3805static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 3806 .build_controls = stac92xx_build_controls,
3807 .build_pcms = stac92xx_build_pcms,
3808 .init = stac92xx_init,
3809 .free = stac92xx_free,
cb53c626 3810#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 3811 .resume = stac92xx_resume,
3812#endif
3813};
3814
72e7b0dd
TI		 3815static int stac9872_vaio_init(struct hda_codec *codec)
3816{
3817 int err;
3818
3819 err = stac92xx_init(codec);
3820 if (err < 0)
3821 return err;
3822 if (codec->patch_ops.unsol_event)
3823 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3824 return 0;
3825}
3826
3827static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
3828{
40c1d308 3829 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 3830 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3831 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3832 } else {
3833 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3834 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3835 }
3836}
3837
3838static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
3839{
3840 switch (res >> 26) {
3841 case STAC_HP_EVENT:
3842 stac9872_vaio_hp_detect(codec, res);
3843 break;
3844 }
3845}
3846
3847static struct hda_codec_ops stac9872_vaio_patch_ops = {
3848 .build_controls = stac92xx_build_controls,
3849 .build_pcms = stac92xx_build_pcms,
3850 .init = stac9872_vaio_init,
3851 .free = stac92xx_free,
3852 .unsol_event = stac9872_vaio_unsol_event,
3853#ifdef CONFIG_PM
3854 .resume = stac92xx_resume,
3855#endif
3856};
3857
6d859065
GM		 3858enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
3859 CXD9872RD_VAIO,
3860 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
3861 STAC9872AK_VAIO,
3862 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
3863 STAC9872K_VAIO,
3864 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 3865 CXD9872AKD_VAIO,
3866 STAC_9872_MODELS,
3867};
3868
3869static const char *stac9872_models[STAC_9872_MODELS] = {
3870 [CXD9872RD_VAIO] = "vaio",
3871 [CXD9872AKD_VAIO] = "vaio-ar",
3872};
3873
3874static struct snd_pci_quirk stac9872_cfg_tbl[] = {
3875 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
3876 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
3877 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 3878 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 3879 {}
3880};
3881
6d859065 3882static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 3883{
3884 struct sigmatel_spec *spec;
3885 int board_config;
3886
f5fcc13c
TI		 3887 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
3888 stac9872_models,
3889 stac9872_cfg_tbl);
db064e50
TI		 3890 if (board_config < 0)
3891 /* unknown config, let generic-parser do its job... */
3892 return snd_hda_parse_generic_codec(codec);
3893
3894 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3895 if (spec == NULL)
3896 return -ENOMEM;
3897
3898 codec->spec = spec;
3899 switch (board_config) {
6d859065
GM		 3900 case CXD9872RD_VAIO:
3901 case STAC9872AK_VAIO:
3902 case STAC9872K_VAIO:
db064e50
TI		 3903 spec->mixer = vaio_mixer;
3904 spec->init = vaio_init;
3905 spec->multiout.max_channels = 2;
3906 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3907 spec->multiout.dac_nids = vaio_dacs;
3908 spec->multiout.hp_nid = VAIO_HP_DAC;
3909 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3910 spec->adc_nids = vaio_adcs;
a64135a2 3911 spec->num_pwrs = 0;
db064e50
TI		 3912 spec->input_mux = &vaio_mux;
3913 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3914 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 3915 break;
6d859065
GM		 3916
3917 case CXD9872AKD_VAIO:
3918 spec->mixer = vaio_ar_mixer;
3919 spec->init = vaio_ar_init;
3920 spec->multiout.max_channels = 2;
3921 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3922 spec->multiout.dac_nids = vaio_dacs;
3923 spec->multiout.hp_nid = VAIO_HP_DAC;
3924 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 3925 spec->num_pwrs = 0;
6d859065
GM		 3926 spec->adc_nids = vaio_adcs;
3927 spec->input_mux = &vaio_mux;
3928 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3929 codec->patch_ops = stac9872_patch_ops;
6d859065 3930 break;
db064e50
TI		 3931 }
3932
db064e50
TI		 3933 return 0;
3934}
3935
3936
2f2f4251
M		 3937/*
3938 * patch entries
3939 */
3940struct hda_codec_preset snd_hda_preset_sigmatel[] = {
3941 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
3942 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
3943 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
3944 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
3945 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
3946 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
3947 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 3948 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
3949 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
3950 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
3951 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
3952 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
3953 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 3954 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
3955 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
3956 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
3957 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
3958 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
3959 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
3960 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
3961 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
3962 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
3963 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 3964 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
3965 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
3966 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
3967 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
3968 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
3969 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 3970 /* The following does not take into account .id=0x83847661 when subsys =
3971 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
3972 * currently not fully supported.
3973 */
3974 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
3975 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
3976 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 3977 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
3978 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
3979 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
3980 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
3981 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
3982 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
3983 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
3984 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
541eee87
MR		 3985 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
3986 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 3987 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 3988 { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
3989 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
3990 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
3991 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
3992 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
3993 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
3994 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
3995 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
3996 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 3997 {} /* terminator */
3998};
Clone of davem's net-next-2.6 tree