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ALSA: hda - Add missing terminators in patch_sigmatel.c
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
4e55096e 38#define NUM_CONTROL_ALLOC 32
c39555d6
MR		 39
40#define STAC_VREF_EVENT 0x00
41#define STAC_INSERT_EVENT 0x10
a64135a2
MR		 42#define STAC_PWR_EVENT 0x20
43#define STAC_HP_EVENT 0x30
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
1194b5b7 58 STAC_9200_GATEWAY,
117f257d 59 STAC_9200_PANASONIC,
f5fcc13c
TI		 60 STAC_9200_MODELS
61};
62
63enum {
64 STAC_9205_REF,
dfe495d0 65 STAC_9205_DELL_M42,
ae0a8ed8
TD		 66 STAC_9205_DELL_M43,
67 STAC_9205_DELL_M44,
f5fcc13c
TI		 68 STAC_9205_MODELS
69};
70
e1f0d669 71enum {
9e43f0de 72 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 73 STAC_92HD73XX_REF,
661cd8fb
TI		 74 STAC_DELL_M6_AMIC,
75 STAC_DELL_M6_DMIC,
76 STAC_DELL_M6_BOTH,
6b3ab21e 77 STAC_DELL_EQ,
e1f0d669
MR		 78 STAC_92HD73XX_MODELS
79};
80
d0513fc6
MR		 81enum {
82 STAC_92HD83XXX_REF,
83 STAC_92HD83XXX_MODELS
84};
85
e035b841
MR		 86enum {
87 STAC_92HD71BXX_REF,
a7662640
MR		 88 STAC_DELL_M4_1,
89 STAC_DELL_M4_2,
3a7abfd2 90 STAC_DELL_M4_3,
6a14f585 91 STAC_HP_M4,
e035b841
MR		 92 STAC_92HD71BXX_MODELS
93};
94
8e21c34c
TD		 95enum {
96 STAC_925x_REF,
97 STAC_M2_2,
98 STAC_MA6,
2c11f955 99 STAC_PA6,
8e21c34c
TD		 100 STAC_925x_MODELS
101};
102
f5fcc13c
TI		 103enum {
104 STAC_D945_REF,
105 STAC_D945GTP3,
106 STAC_D945GTP5,
5d5d3bc3
IZ		 107 STAC_INTEL_MAC_V1,
108 STAC_INTEL_MAC_V2,
109 STAC_INTEL_MAC_V3,
110 STAC_INTEL_MAC_V4,
111 STAC_INTEL_MAC_V5,
536319af
NB		 112 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
113 * is given, one of the above models will be
114 * chosen according to the subsystem id. */
dfe495d0 115 /* for backward compatibility */
f5fcc13c 116 STAC_MACMINI,
3fc24d85 117 STAC_MACBOOK,
6f0778d8
NB		 118 STAC_MACBOOK_PRO_V1,
119 STAC_MACBOOK_PRO_V2,
f16928fb 120 STAC_IMAC_INTEL,
0dae0f83 121 STAC_IMAC_INTEL_20,
8c650087 122 STAC_ECS_202,
dfe495d0
TI		 123 STAC_922X_DELL_D81,
124 STAC_922X_DELL_D82,
125 STAC_922X_DELL_M81,
126 STAC_922X_DELL_M82,
f5fcc13c
TI		 127 STAC_922X_MODELS
128};
129
130enum {
e28d8322 131 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 132 STAC_D965_REF,
133 STAC_D965_3ST,
134 STAC_D965_5ST,
4ff076e5 135 STAC_DELL_3ST,
8e9068b1 136 STAC_DELL_BIOS,
f5fcc13c
TI		 137 STAC_927X_MODELS
138};
403d1944 139
2f2f4251 140struct sigmatel_spec {
c8b6bf9b 141 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 142 unsigned int num_mixers;
143
403d1944 144 int board_config;
0253fdcd 145 unsigned int eapd_switch: 1;
c7d4b2fa 146 unsigned int surr_switch: 1;
403d1944
MP		 147 unsigned int line_switch: 1;
148 unsigned int mic_switch: 1;
3cc08dc6 149 unsigned int alt_switch: 1;
82bc955f 150 unsigned int hp_detect: 1;
00ef50c2 151 unsigned int spdif_mute: 1;
c7d4b2fa 152
4fe5195c 153 /* gpio lines */
0fc9dec4 154 unsigned int eapd_mask;
4fe5195c
MR		 155 unsigned int gpio_mask;
156 unsigned int gpio_dir;
157 unsigned int gpio_data;
158 unsigned int gpio_mute;
159
8daaaa97
MR		 160 /* stream */
161 unsigned int stream_delay;
162
4fe5195c 163 /* analog loopback */
e1f0d669
MR		 164 unsigned char aloopback_mask;
165 unsigned char aloopback_shift;
8259980e 166
a64135a2
MR		 167 /* power management */
168 unsigned int num_pwrs;
d0513fc6 169 unsigned int *pwr_mapping;
a64135a2 170 hda_nid_t *pwr_nids;
b76c850f 171 hda_nid_t *dac_list;
a64135a2 172
2f2f4251 173 /* playback */
b22b4821 174 struct hda_input_mux *mono_mux;
89385035 175 struct hda_input_mux *amp_mux;
b22b4821 176 unsigned int cur_mmux;
2f2f4251 177 struct hda_multi_out multiout;
3cc08dc6 178 hda_nid_t dac_nids[5];
2f2f4251
M		 179
180 /* capture */
181 hda_nid_t *adc_nids;
2f2f4251 182 unsigned int num_adcs;
dabbed6f
M		 183 hda_nid_t *mux_nids;
184 unsigned int num_muxes;
8b65727b
MP		 185 hda_nid_t *dmic_nids;
186 unsigned int num_dmics;
e1f0d669 187 hda_nid_t *dmux_nids;
1697055e 188 unsigned int num_dmuxes;
d9737751
MR		 189 hda_nid_t *smux_nids;
190 unsigned int num_smuxes;
65973632 191 const char **spdif_labels;
d9737751 192
dabbed6f 193 hda_nid_t dig_in_nid;
b22b4821 194 hda_nid_t mono_nid;
1cd2224c
MR		 195 hda_nid_t anabeep_nid;
196 hda_nid_t digbeep_nid;
2f2f4251 197
2f2f4251
M		 198 /* pin widgets */
199 hda_nid_t *pin_nids;
200 unsigned int num_pins;
2f2f4251 201 unsigned int *pin_configs;
11b44bbd 202 unsigned int *bios_pin_configs;
2f2f4251
M		 203
204 /* codec specific stuff */
205 struct hda_verb *init;
c8b6bf9b 206 struct snd_kcontrol_new *mixer;
2f2f4251
M		 207
208 /* capture source */
8b65727b 209 struct hda_input_mux *dinput_mux;
e1f0d669 210 unsigned int cur_dmux[2];
c7d4b2fa 211 struct hda_input_mux *input_mux;
3cc08dc6 212 unsigned int cur_mux[3];
d9737751
MR		 213 struct hda_input_mux *sinput_mux;
214 unsigned int cur_smux[2];
2a9c7816
MR		 215 unsigned int cur_amux;
216 hda_nid_t *amp_nids;
217 unsigned int num_amps;
8daaaa97 218 unsigned int powerdown_adcs;
2f2f4251 219
403d1944
MP		 220 /* i/o switches */
221 unsigned int io_switch[2];
0fb87bb4 222 unsigned int clfe_swap;
d7a89436 223 unsigned int hp_switch; /* NID of HP as line-out */
5f10c4a9 224 unsigned int aloopback;
2f2f4251 225
c7d4b2fa
M		 226 struct hda_pcm pcm_rec[2]; /* PCM information */
227
228 /* dynamic controls and input_mux */
229 struct auto_pin_cfg autocfg;
230 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 231 struct snd_kcontrol_new *kctl_alloc;
8b65727b 232 struct hda_input_mux private_dimux;
c7d4b2fa 233 struct hda_input_mux private_imux;
d9737751 234 struct hda_input_mux private_smux;
89385035 235 struct hda_input_mux private_amp_mux;
b22b4821 236 struct hda_input_mux private_mono_mux;
2f2f4251
M		 237};
238
239static hda_nid_t stac9200_adc_nids[1] = {
240 0x03,
241};
242
243static hda_nid_t stac9200_mux_nids[1] = {
244 0x0c,
245};
246
247static hda_nid_t stac9200_dac_nids[1] = {
248 0x02,
249};
250
a64135a2
MR		 251static hda_nid_t stac92hd73xx_pwr_nids[8] = {
252 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
253 0x0f, 0x10, 0x11
254};
255
0ffa9807
MR		 256static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
257 0x26, 0,
258};
259
e1f0d669
MR		 260static hda_nid_t stac92hd73xx_adc_nids[2] = {
261 0x1a, 0x1b
262};
263
2a9c7816
MR		 264#define DELL_M6_AMP 2
265static hda_nid_t stac92hd73xx_amp_nids[3] = {
266 0x0b, 0x0c, 0x0e
89385035
MR		 267};
268
e1f0d669
MR		 269#define STAC92HD73XX_NUM_DMICS 2
270static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
271 0x13, 0x14, 0
272};
273
274#define STAC92HD73_DAC_COUNT 5
275static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
276 0x15, 0x16, 0x17, 0x18, 0x19,
277};
278
279static hda_nid_t stac92hd73xx_mux_nids[4] = {
280 0x28, 0x29, 0x2a, 0x2b,
281};
282
283static hda_nid_t stac92hd73xx_dmux_nids[2] = {
284 0x20, 0x21,
285};
286
d9737751
MR		 287static hda_nid_t stac92hd73xx_smux_nids[2] = {
288 0x22, 0x23,
289};
290
d0513fc6
MR		 291#define STAC92HD83XXX_NUM_DMICS 2
292static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
293 0x11, 0x12, 0
294};
295
296#define STAC92HD81_DAC_COUNT 2
297#define STAC92HD83_DAC_COUNT 3
298static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
299 0x13, 0x14, 0x22,
300};
301
302static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
303 0x17, 0x18,
304};
305
306static hda_nid_t stac92hd83xxx_adc_nids[2] = {
307 0x15, 0x16,
308};
309
310static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
311 0xa, 0xb, 0xd, 0xe,
312};
313
0ffa9807
MR		 314static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
315 0x1e, 0,
316};
317
d0513fc6
MR		 318static unsigned int stac92hd83xxx_pwr_mapping[4] = {
319 0x03, 0x0c, 0x10, 0x40,
320};
321
a64135a2
MR		 322static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
323 0x0a, 0x0d, 0x0f
324};
325
e035b841
MR		 326static hda_nid_t stac92hd71bxx_adc_nids[2] = {
327 0x12, 0x13,
328};
329
330static hda_nid_t stac92hd71bxx_mux_nids[2] = {
331 0x1a, 0x1b
332};
333
4b33c767
MR		 334static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
335 0x1c, 0x1d,
e1f0d669
MR		 336};
337
d9737751
MR		 338static hda_nid_t stac92hd71bxx_smux_nids[2] = {
339 0x24, 0x25,
340};
341
aea7bb0a 342static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 343 0x10, /*0x11, */
344};
345
346#define STAC92HD71BXX_NUM_DMICS 2
347static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
348 0x18, 0x19, 0
349};
350
0ffa9807
MR		 351static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
352 0x22, 0
353};
354
8e21c34c
TD		 355static hda_nid_t stac925x_adc_nids[1] = {
356 0x03,
357};
358
359static hda_nid_t stac925x_mux_nids[1] = {
360 0x0f,
361};
362
363static hda_nid_t stac925x_dac_nids[1] = {
364 0x02,
365};
366
f6e9852a
TI		 367#define STAC925X_NUM_DMICS 1
368static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
369 0x15, 0
2c11f955
TD		 370};
371
1697055e
TI		 372static hda_nid_t stac925x_dmux_nids[1] = {
373 0x14,
374};
375
2f2f4251
M		 376static hda_nid_t stac922x_adc_nids[2] = {
377 0x06, 0x07,
378};
379
380static hda_nid_t stac922x_mux_nids[2] = {
381 0x12, 0x13,
382};
383
3cc08dc6
MP		 384static hda_nid_t stac927x_adc_nids[3] = {
385 0x07, 0x08, 0x09
386};
387
388static hda_nid_t stac927x_mux_nids[3] = {
389 0x15, 0x16, 0x17
390};
391
d9737751
MR		 392static hda_nid_t stac927x_smux_nids[1] = {
393 0x21,
394};
395
b76c850f
MR		 396static hda_nid_t stac927x_dac_nids[6] = {
397 0x02, 0x03, 0x04, 0x05, 0x06, 0
398};
399
e1f0d669
MR		 400static hda_nid_t stac927x_dmux_nids[1] = {
401 0x1b,
402};
403
7f16859a
MR		 404#define STAC927X_NUM_DMICS 2
405static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
406 0x13, 0x14, 0
407};
408
65973632
MR		 409static const char *stac927x_spdif_labels[5] = {
410 "Digital Playback", "ADAT", "Analog Mux 1",
411 "Analog Mux 2", "Analog Mux 3"
412};
413
f3302a59
MP		 414static hda_nid_t stac9205_adc_nids[2] = {
415 0x12, 0x13
416};
417
418static hda_nid_t stac9205_mux_nids[2] = {
419 0x19, 0x1a
420};
421
e1f0d669 422static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 423 0x1d,
e1f0d669
MR		 424};
425
d9737751
MR		 426static hda_nid_t stac9205_smux_nids[1] = {
427 0x21,
428};
429
f6e9852a
TI		 430#define STAC9205_NUM_DMICS 2
431static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
432 0x17, 0x18, 0
8b65727b
MP		 433};
434
c7d4b2fa 435static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 436 0x08, 0x09, 0x0d, 0x0e,
437 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 438};
439
8e21c34c
TD		 440static hda_nid_t stac925x_pin_nids[8] = {
441 0x07, 0x08, 0x0a, 0x0b,
442 0x0c, 0x0d, 0x10, 0x11,
443};
444
2f2f4251
M		 445static hda_nid_t stac922x_pin_nids[10] = {
446 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
447 0x0f, 0x10, 0x11, 0x15, 0x1b,
448};
449
a7662640 450static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 451 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
452 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 453 0x14, 0x22, 0x23
e1f0d669
MR		 454};
455
d0513fc6
MR		 456static hda_nid_t stac92hd83xxx_pin_nids[14] = {
457 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
458 0x0f, 0x10, 0x11, 0x12, 0x13,
459 0x1d, 0x1e, 0x1f, 0x20
460};
0ffa9807 461static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 462 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
463 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 464 0x1f,
e035b841
MR		 465};
466
3cc08dc6
MP		 467static hda_nid_t stac927x_pin_nids[14] = {
468 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
469 0x0f, 0x10, 0x11, 0x12, 0x13,
470 0x14, 0x21, 0x22, 0x23,
471};
472
f3302a59
MP		 473static hda_nid_t stac9205_pin_nids[12] = {
474 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
475 0x0f, 0x14, 0x16, 0x17, 0x18,
476 0x21, 0x22,
f3302a59
MP		 477};
478
89385035
MR		 479#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
480
481static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
482 struct snd_ctl_elem_value *ucontrol)
483{
484 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
485 struct sigmatel_spec *spec = codec->spec;
486 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
487
488 kcontrol->private_value ^= get_amp_nid(kcontrol);
489 kcontrol->private_value |= nid;
490
491 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
492}
493
494static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
495 struct snd_ctl_elem_value *ucontrol)
496{
497 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
498 struct sigmatel_spec *spec = codec->spec;
499 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
500
501 kcontrol->private_value ^= get_amp_nid(kcontrol);
502 kcontrol->private_value |= nid;
503
504 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
505}
506
8b65727b
MP		 507static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
508 struct snd_ctl_elem_info *uinfo)
509{
510 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
511 struct sigmatel_spec *spec = codec->spec;
512 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
513}
514
515static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
516 struct snd_ctl_elem_value *ucontrol)
517{
518 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
519 struct sigmatel_spec *spec = codec->spec;
e1f0d669 520 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 521
e1f0d669 522 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 523 return 0;
524}
525
526static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
527 struct snd_ctl_elem_value *ucontrol)
528{
529 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
530 struct sigmatel_spec *spec = codec->spec;
e1f0d669 531 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 532
533 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 534 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 535}
536
d9737751
MR		 537static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
538 struct snd_ctl_elem_info *uinfo)
539{
540 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
541 struct sigmatel_spec *spec = codec->spec;
542 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
543}
544
545static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
546 struct snd_ctl_elem_value *ucontrol)
547{
548 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
549 struct sigmatel_spec *spec = codec->spec;
550 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
551
552 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
553 return 0;
554}
555
556static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
557 struct snd_ctl_elem_value *ucontrol)
558{
559 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
560 struct sigmatel_spec *spec = codec->spec;
00ef50c2 561 struct hda_input_mux *smux = &spec->private_smux;
d9737751 562 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 563 int err, val;
564 hda_nid_t nid;
d9737751 565
00ef50c2 566 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 567 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 568 if (err < 0)
569 return err;
570
571 if (spec->spdif_mute) {
572 if (smux_idx == 0)
573 nid = spec->multiout.dig_out_nid;
574 else
575 nid = codec->slave_dig_outs[smux_idx - 1];
576 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
577 val = AMP_OUT_MUTE;
00ef50c2 578 else
c1e99bd9 579 val = AMP_OUT_UNMUTE;
00ef50c2
MR		 580 /* un/mute SPDIF out */
581 snd_hda_codec_write_cache(codec, nid, 0,
582 AC_VERB_SET_AMP_GAIN_MUTE, val);
583 }
584 return 0;
d9737751
MR		 585}
586
c8b6bf9b 587static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 588{
589 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
590 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 591 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 592}
593
c8b6bf9b 594static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 595{
596 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
597 struct sigmatel_spec *spec = codec->spec;
598 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
599
600 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
601 return 0;
602}
603
c8b6bf9b 604static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 605{
606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
607 struct sigmatel_spec *spec = codec->spec;
608 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
609
c7d4b2fa 610 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 611 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
612}
613
b22b4821
MR		 614static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
615 struct snd_ctl_elem_info *uinfo)
616{
617 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
618 struct sigmatel_spec *spec = codec->spec;
619 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
620}
621
622static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
623 struct snd_ctl_elem_value *ucontrol)
624{
625 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
626 struct sigmatel_spec *spec = codec->spec;
627
628 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
629 return 0;
630}
631
632static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
633 struct snd_ctl_elem_value *ucontrol)
634{
635 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
636 struct sigmatel_spec *spec = codec->spec;
637
638 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
639 spec->mono_nid, &spec->cur_mmux);
640}
641
89385035
MR		 642static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
643 struct snd_ctl_elem_info *uinfo)
644{
645 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
646 struct sigmatel_spec *spec = codec->spec;
647 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
648}
649
650static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
651 struct snd_ctl_elem_value *ucontrol)
652{
653 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
654 struct sigmatel_spec *spec = codec->spec;
655
656 ucontrol->value.enumerated.item[0] = spec->cur_amux;
657 return 0;
658}
659
660static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
661 struct snd_ctl_elem_value *ucontrol)
662{
663 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
664 struct sigmatel_spec *spec = codec->spec;
665 struct snd_kcontrol *ctl =
666 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
667 if (!ctl)
668 return -EINVAL;
669
670 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
671 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
672
673 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
674 0, &spec->cur_amux);
675}
676
5f10c4a9
ML		 677#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
678
679static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
680 struct snd_ctl_elem_value *ucontrol)
681{
682 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 683 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 684 struct sigmatel_spec *spec = codec->spec;
685
e1f0d669
MR		 686 ucontrol->value.integer.value[0] = !!(spec->aloopback &
687 (spec->aloopback_mask << idx));
5f10c4a9
ML		 688 return 0;
689}
690
691static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
692 struct snd_ctl_elem_value *ucontrol)
693{
694 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
695 struct sigmatel_spec *spec = codec->spec;
e1f0d669 696 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 697 unsigned int dac_mode;
e1f0d669 698 unsigned int val, idx_val;
5f10c4a9 699
e1f0d669
MR		 700 idx_val = spec->aloopback_mask << idx;
701 if (ucontrol->value.integer.value[0])
702 val = spec->aloopback | idx_val;
703 else
704 val = spec->aloopback & ~idx_val;
68ea7b2f 705 if (spec->aloopback == val)
5f10c4a9
ML		 706 return 0;
707
68ea7b2f 708 spec->aloopback = val;
5f10c4a9 709
e1f0d669
MR		 710 /* Only return the bits defined by the shift value of the
711 * first two bytes of the mask
712 */
5f10c4a9 713 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 714 kcontrol->private_value & 0xFFFF, 0x0);
715 dac_mode >>= spec->aloopback_shift;
5f10c4a9 716
e1f0d669 717 if (spec->aloopback & idx_val) {
5f10c4a9 718 snd_hda_power_up(codec);
e1f0d669 719 dac_mode |= idx_val;
5f10c4a9
ML		 720 } else {
721 snd_hda_power_down(codec);
e1f0d669 722 dac_mode &= ~idx_val;
5f10c4a9
ML		 723 }
724
725 snd_hda_codec_write_cache(codec, codec->afg, 0,
726 kcontrol->private_value >> 16, dac_mode);
727
728 return 1;
729}
730
c7d4b2fa 731static struct hda_verb stac9200_core_init[] = {
2f2f4251 732 /* set dac0mux for dac converter */
c7d4b2fa 733 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 734 {}
735};
736
1194b5b7
TI		 737static struct hda_verb stac9200_eapd_init[] = {
738 /* set dac0mux for dac converter */
739 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
740 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
741 {}
742};
743
e1f0d669
MR		 744static struct hda_verb stac92hd73xx_6ch_core_init[] = {
745 /* set master volume and direct control */
746 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
747 /* setup audio connections */
748 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
749 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
750 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
751 /* setup adcs to point to mixer */
752 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
753 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 754 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
755 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
756 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
757 /* setup import muxs */
758 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
759 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
760 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
761 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
762 {}
763};
764
d654a660
MR		 765static struct hda_verb dell_eq_core_init[] = {
766 /* set master volume to max value without distortion
767 * and direct control */
768 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
769 /* setup audio connections */
770 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 771 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
772 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 773 /* setup adcs to point to mixer */
774 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
775 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
776 /* setup import muxs */
777 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
778 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
779 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
780 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
781 {}
782};
783
52fe0f9d 784static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 785 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d 786 /* setup audio connections */
7747ecce
MR		 787 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
788 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 789 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
790 /* setup adcs to point to mixer */
791 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
792 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
793 /* setup import muxs */
794 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
795 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
796 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
797 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
798 {}
799};
800
e1f0d669
MR		 801static struct hda_verb stac92hd73xx_8ch_core_init[] = {
802 /* set master volume and direct control */
803 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
804 /* setup audio connections */
805 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
806 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
807 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
808 /* connect hp ports to dac3 */
809 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
810 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
811 /* setup adcs to point to mixer */
812 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
813 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 814 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
815 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
816 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
817 /* setup import muxs */
818 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
819 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
820 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
821 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
822 {}
823};
824
825static struct hda_verb stac92hd73xx_10ch_core_init[] = {
826 /* set master volume and direct control */
827 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
828 /* setup audio connections */
829 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
830 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
831 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
832 /* dac3 is connected to import3 mux */
833 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
834 /* connect hp ports to dac4 */
835 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
836 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
837 /* setup adcs to point to mixer */
838 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
839 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 840 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
841 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
842 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
843 /* setup import muxs */
844 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
845 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
846 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
847 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
848 {}
849};
850
d0513fc6
MR		 851static struct hda_verb stac92hd83xxx_core_init[] = {
852 /* start of config #1 */
853 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
854
855 /* start of config #2 */
856 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
857 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
858 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
859
860 /* power state controls amps */
861 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 862 {}
d0513fc6
MR		 863};
864
e035b841 865static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 866 /* set master volume and direct control */
867 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
868 /* connect headphone jack to dac1 */
869 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
541eee87
MR		 870 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
871 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
872 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
873 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
574f3c4f 874 {}
541eee87
MR		 875};
876
4b33c767 877#define HD_DISABLE_PORTF 2
541eee87 878static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 879 /* start of config #1 */
880
881 /* connect port 0f to audio mixer */
882 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 883 /* unmute right and left channels for node 0x0f */
884 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
885 /* start of config #2 */
886
e035b841
MR		 887 /* set master volume and direct control */
888 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
889 /* connect headphone jack to dac1 */
890 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 891 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 892 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
893 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 894 {}
895};
896
8e21c34c
TD		 897static struct hda_verb stac925x_core_init[] = {
898 /* set dac0mux for dac converter */
899 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
900 {}
901};
902
c7d4b2fa 903static struct hda_verb stac922x_core_init[] = {
2f2f4251 904 /* set master volume and direct control */
c7d4b2fa 905 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 906 {}
907};
908
93ed1503 909static struct hda_verb d965_core_init[] = {
19039bd0 910 /* set master volume and direct control */
93ed1503 911 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 912 /* unmute node 0x1b */
913 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
914 /* select node 0x03 as DAC */
915 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
916 {}
917};
918
3cc08dc6
MP		 919static struct hda_verb stac927x_core_init[] = {
920 /* set master volume and direct control */
921 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 922 /* enable analog pc beep path */
923 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 924 {}
925};
926
f3302a59
MP		 927static struct hda_verb stac9205_core_init[] = {
928 /* set master volume and direct control */
929 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 930 /* enable analog pc beep path */
931 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 932 {}
933};
934
b22b4821
MR		 935#define STAC_MONO_MUX \
936 { \
937 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
938 .name = "Mono Mux", \
939 .count = 1, \
940 .info = stac92xx_mono_mux_enum_info, \
941 .get = stac92xx_mono_mux_enum_get, \
942 .put = stac92xx_mono_mux_enum_put, \
943 }
944
89385035
MR		 945#define STAC_AMP_MUX \
946 { \
947 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
948 .name = "Amp Selector Capture Switch", \
949 .count = 1, \
950 .info = stac92xx_amp_mux_enum_info, \
951 .get = stac92xx_amp_mux_enum_get, \
952 .put = stac92xx_amp_mux_enum_put, \
953 }
954
955#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
956 { \
957 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
958 .name = xname, \
959 .index = 0, \
960 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
961 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
962 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
963 .info = stac92xx_amp_volume_info, \
964 .get = stac92xx_amp_volume_get, \
965 .put = stac92xx_amp_volume_put, \
966 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
967 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
968 }
969
9e05b7a3 970#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 971 { \
972 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
973 .name = "Input Source", \
9e05b7a3 974 .count = cnt, \
ca7c5a8b
ML		 975 .info = stac92xx_mux_enum_info, \
976 .get = stac92xx_mux_enum_get, \
977 .put = stac92xx_mux_enum_put, \
978 }
979
e1f0d669 980#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 981 { \
982 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
983 .name = "Analog Loopback", \
e1f0d669 984 .count = cnt, \
5f10c4a9
ML		 985 .info = stac92xx_aloopback_info, \
986 .get = stac92xx_aloopback_get, \
987 .put = stac92xx_aloopback_put, \
988 .private_value = verb_read | (verb_write << 16), \
989 }
990
c8b6bf9b 991static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 992 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
993 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 994 STAC_INPUT_SOURCE(1),
2f2f4251
M		 995 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
996 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 997 { } /* end */
998};
999
2a9c7816 1000#define DELL_M6_MIXER 6
e1f0d669 1001static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 1002 /* start of config #1 */
e1f0d669
MR		 1003 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1004 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1005
e1f0d669
MR		 1006 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1007 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1008
2a9c7816
MR		 1009 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1010 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1011
1012 /* start of config #2 */
1013 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1014 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1015
e1f0d669
MR		 1016 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1017 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1018
2a9c7816
MR		 1019 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1020
1021 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1022 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1023
1024 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1025 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1026
e1f0d669
MR		 1027 { } /* end */
1028};
1029
1030static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1031 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1032
e1f0d669
MR		 1033 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1034 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1035
1036 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1037 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1038
1039 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1040 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1041
1042 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1043 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1044
1045 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1046 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1047
1048 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1049 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1050
1051 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1052 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1053 { } /* end */
1054};
1055
1056static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1057 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1058
e1f0d669
MR		 1059 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1060 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1061
1062 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1063 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1064
1065 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1066 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1067
1068 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1069 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1070
1071 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1072 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1073
1074 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1075 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1076
1077 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1078 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1079 { } /* end */
1080};
1081
d0513fc6
MR		 1082
1083static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1084 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1085 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1086
1087 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1088 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1089
1090 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1091 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1092
1093 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1094 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1095
1096 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1097 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1098
1099 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1100 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1101
1102 /*
1103 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1104 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1105 */
1106 { } /* end */
1107};
1108
541eee87 1109static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1110 STAC_INPUT_SOURCE(2),
4b33c767 1111 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1112
9b35947f
MR		 1113 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1114 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1115
1116 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1117 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1118 /* analog pc-beep replaced with digital beep support */
1119 /*
f7c5dda2
MR		 1120 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1121 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1122 */
f7c5dda2 1123
687cb98e
MR		 1124 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1125 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1126
687cb98e
MR		 1127 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1128 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1129
1130 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1131 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1132
1133 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1134 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1135 { } /* end */
1136};
1137
541eee87 1138static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1139 STAC_INPUT_SOURCE(2),
1140 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1141
541eee87
MR		 1142 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1143 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1144
1145 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1146 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1147 { } /* end */
1148};
1149
8e21c34c 1150static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1151 STAC_INPUT_SOURCE(1),
8e21c34c 1152 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1153 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1154 { } /* end */
1155};
1156
9e05b7a3 1157static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1158 STAC_INPUT_SOURCE(2),
e1f0d669 1159 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1160
1161 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1162 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1163
1164 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1165 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1166 { } /* end */
1167};
1168
19039bd0 1169/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1170static struct snd_kcontrol_new stac922x_mixer[] = {
1171 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1172 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1173 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1174
1175 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1176 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1177 { } /* end */
1178};
1179
9e05b7a3 1180
d1d985f0 1181static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1182 STAC_INPUT_SOURCE(3),
e1f0d669 1183 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1184
9e05b7a3
ML		 1185 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1186 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1187
1188 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1189 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1190
1191 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1192 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1193 { } /* end */
1194};
1195
1697055e
TI		 1196static struct snd_kcontrol_new stac_dmux_mixer = {
1197 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1198 .name = "Digital Input Source",
1199 /* count set later */
1200 .info = stac92xx_dmux_enum_info,
1201 .get = stac92xx_dmux_enum_get,
1202 .put = stac92xx_dmux_enum_put,
1203};
1204
d9737751
MR		 1205static struct snd_kcontrol_new stac_smux_mixer = {
1206 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1207 .name = "IEC958 Playback Source",
d9737751
MR		 1208 /* count set later */
1209 .info = stac92xx_smux_enum_info,
1210 .get = stac92xx_smux_enum_get,
1211 .put = stac92xx_smux_enum_put,
1212};
1213
2134ea4f
TI		 1214static const char *slave_vols[] = {
1215 "Front Playback Volume",
1216 "Surround Playback Volume",
1217 "Center Playback Volume",
1218 "LFE Playback Volume",
1219 "Side Playback Volume",
1220 "Headphone Playback Volume",
1221 "Headphone Playback Volume",
1222 "Speaker Playback Volume",
1223 "External Speaker Playback Volume",
1224 "Speaker2 Playback Volume",
1225 NULL
1226};
1227
1228static const char *slave_sws[] = {
1229 "Front Playback Switch",
1230 "Surround Playback Switch",
1231 "Center Playback Switch",
1232 "LFE Playback Switch",
1233 "Side Playback Switch",
1234 "Headphone Playback Switch",
1235 "Headphone Playback Switch",
1236 "Speaker Playback Switch",
1237 "External Speaker Playback Switch",
1238 "Speaker2 Playback Switch",
edb54a55 1239 "IEC958 Playback Switch",
2134ea4f
TI		 1240 NULL
1241};
1242
2f2f4251
M		 1243static int stac92xx_build_controls(struct hda_codec *codec)
1244{
1245 struct sigmatel_spec *spec = codec->spec;
1246 int err;
c7d4b2fa 1247 int i;
2f2f4251
M		 1248
1249 err = snd_hda_add_new_ctls(codec, spec->mixer);
1250 if (err < 0)
1251 return err;
c7d4b2fa
M		 1252
1253 for (i = 0; i < spec->num_mixers; i++) {
1254 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1255 if (err < 0)
1256 return err;
1257 }
1697055e
TI		 1258 if (spec->num_dmuxes > 0) {
1259 stac_dmux_mixer.count = spec->num_dmuxes;
1260 err = snd_ctl_add(codec->bus->card,
1261 snd_ctl_new1(&stac_dmux_mixer, codec));
1262 if (err < 0)
1263 return err;
1264 }
d9737751 1265 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1266 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1267 struct hda_input_mux *smux = &spec->private_smux;
1268 /* check for mute support on SPDIF out */
1269 if (wcaps & AC_WCAP_OUT_AMP) {
1270 smux->items[smux->num_items].label = "Off";
1271 smux->items[smux->num_items].index = 0;
1272 smux->num_items++;
1273 spec->spdif_mute = 1;
1274 }
d9737751
MR		 1275 stac_smux_mixer.count = spec->num_smuxes;
1276 err = snd_ctl_add(codec->bus->card,
1277 snd_ctl_new1(&stac_smux_mixer, codec));
1278 if (err < 0)
1279 return err;
1280 }
c7d4b2fa 1281
dabbed6f
M		 1282 if (spec->multiout.dig_out_nid) {
1283 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1284 if (err < 0)
1285 return err;
9a08160b
TI		 1286 err = snd_hda_create_spdif_share_sw(codec,
1287 &spec->multiout);
1288 if (err < 0)
1289 return err;
1290 spec->multiout.share_spdif = 1;
dabbed6f 1291 }
da74ae3e 1292 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1293 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1294 if (err < 0)
1295 return err;
1296 }
2134ea4f
TI		 1297
1298 /* if we have no master control, let's create it */
1299 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1300 unsigned int vmaster_tlv[4];
2134ea4f 1301 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1302 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1303 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1304 vmaster_tlv, slave_vols);
2134ea4f
TI		 1305 if (err < 0)
1306 return err;
1307 }
1308 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1309 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1310 NULL, slave_sws);
1311 if (err < 0)
1312 return err;
1313 }
1314
dabbed6f 1315 return 0;
2f2f4251
M		 1316}
1317
403d1944 1318static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1319 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1320 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1321};
1322
dfe495d0
TI		 1323/*
1324 STAC 9200 pin configs for
1325 102801A8
1326 102801DE
1327 102801E8
1328*/
1329static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1330 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1331 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1332};
1333
1334/*
1335 STAC 9200 pin configs for
1336 102801C0
1337 102801C1
1338*/
1339static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1340 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1341 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1342};
1343
1344/*
1345 STAC 9200 pin configs for
1346 102801C4 (Dell Dimension E310)
1347 102801C5
1348 102801C7
1349 102801D9
1350 102801DA
1351 102801E3
1352*/
1353static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1354 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1355 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1356};
1357
1358
1359/*
1360 STAC 9200-32 pin configs for
1361 102801B5 (Dell Inspiron 630m)
1362 102801D8 (Dell Inspiron 640m)
1363*/
1364static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1365 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1366 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1367};
1368
1369/*
1370 STAC 9200-32 pin configs for
1371 102801C2 (Dell Latitude D620)
1372 102801C8
1373 102801CC (Dell Latitude D820)
1374 102801D4
1375 102801D6
1376*/
1377static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1378 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1379 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1380};
1381
1382/*
1383 STAC 9200-32 pin configs for
1384 102801CE (Dell XPS M1710)
1385 102801CF (Dell Precision M90)
1386*/
1387static unsigned int dell9200_m23_pin_configs[8] = {
1388 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1389 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1390};
1391
1392/*
1393 STAC 9200-32 pin configs for
1394 102801C9
1395 102801CA
1396 102801CB (Dell Latitude 120L)
1397 102801D3
1398*/
1399static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1400 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1401 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1402};
1403
1404/*
1405 STAC 9200-32 pin configs for
1406 102801BD (Dell Inspiron E1505n)
1407 102801EE
1408 102801EF
1409*/
1410static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1411 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1412 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1413};
1414
1415/*
1416 STAC 9200-32 pin configs for
1417 102801F5 (Dell Inspiron 1501)
1418 102801F6
1419*/
1420static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1421 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1422 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1423};
1424
1425/*
1426 STAC 9200-32
1427 102801CD (Dell Inspiron E1705/9400)
1428*/
1429static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1430 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1431 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1432};
1433
bf277785
TD		 1434static unsigned int oqo9200_pin_configs[8] = {
1435 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1436 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1437};
1438
dfe495d0 1439
f5fcc13c
TI		 1440static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1441 [STAC_REF] = ref9200_pin_configs,
bf277785 1442 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1443 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1444 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1445 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1446 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1447 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1448 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1449 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1450 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1451 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1452 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1453 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1454};
1455
f5fcc13c
TI		 1456static const char *stac9200_models[STAC_9200_MODELS] = {
1457 [STAC_REF] = "ref",
bf277785 1458 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1459 [STAC_9200_DELL_D21] = "dell-d21",
1460 [STAC_9200_DELL_D22] = "dell-d22",
1461 [STAC_9200_DELL_D23] = "dell-d23",
1462 [STAC_9200_DELL_M21] = "dell-m21",
1463 [STAC_9200_DELL_M22] = "dell-m22",
1464 [STAC_9200_DELL_M23] = "dell-m23",
1465 [STAC_9200_DELL_M24] = "dell-m24",
1466 [STAC_9200_DELL_M25] = "dell-m25",
1467 [STAC_9200_DELL_M26] = "dell-m26",
1468 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1469 [STAC_9200_GATEWAY] = "gateway",
117f257d 1470 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1471};
1472
1473static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1474 /* SigmaTel reference board */
1475 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1476 "DFI LanParty", STAC_REF),
e7377071 1477 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1479 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1481 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1483 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1485 "unknown Dell", STAC_9200_DELL_D22),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1487 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1489 "Dell Latitude D620", STAC_9200_DELL_M22),
1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1491 "unknown Dell", STAC_9200_DELL_D23),
1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1493 "unknown Dell", STAC_9200_DELL_D23),
1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1495 "unknown Dell", STAC_9200_DELL_M22),
1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1497 "unknown Dell", STAC_9200_DELL_M24),
1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1499 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1501 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1503 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1505 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1507 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1509 "Dell Precision M90", STAC_9200_DELL_M23),
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1511 "unknown Dell", STAC_9200_DELL_M22),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1513 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1515 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1517 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1519 "unknown Dell", STAC_9200_DELL_D23),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1521 "unknown Dell", STAC_9200_DELL_D23),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1523 "unknown Dell", STAC_9200_DELL_D21),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1525 "unknown Dell", STAC_9200_DELL_D23),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1527 "unknown Dell", STAC_9200_DELL_D21),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1529 "unknown Dell", STAC_9200_DELL_M25),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1531 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1533 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1535 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1536 /* Panasonic */
117f257d 1537 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1538 /* Gateway machines needs EAPD to be set on resume */
1539 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1540 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1541 STAC_9200_GATEWAY),
1542 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1543 STAC_9200_GATEWAY),
bf277785
TD		 1544 /* OQO Mobile */
1545 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1546 {} /* terminator */
1547};
1548
8e21c34c
TD		 1549static unsigned int ref925x_pin_configs[8] = {
1550 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1551 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1552};
1553
1554static unsigned int stac925x_MA6_pin_configs[8] = {
1555 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1556 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1557};
1558
2c11f955
TD		 1559static unsigned int stac925x_PA6_pin_configs[8] = {
1560 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1561 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1562};
1563
8e21c34c 1564static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1565 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1566 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1567};
1568
1569static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1570 [STAC_REF] = ref925x_pin_configs,
1571 [STAC_M2_2] = stac925xM2_2_pin_configs,
1572 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1573 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1574};
1575
1576static const char *stac925x_models[STAC_925x_MODELS] = {
1577 [STAC_REF] = "ref",
1578 [STAC_M2_2] = "m2-2",
1579 [STAC_MA6] = "m6",
2c11f955 1580 [STAC_PA6] = "pa6",
8e21c34c
TD		 1581};
1582
1583static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1584 /* SigmaTel reference board */
1585 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1586 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1587 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1588 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1589 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1590 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1591 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1592 {} /* terminator */
1593};
1594
a7662640 1595static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1596 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1597 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1598 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1599 0x01452050,
1600};
1601
1602static unsigned int dell_m6_pin_configs[13] = {
1603 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1604 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1605 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1606 0x4f0000f0,
e1f0d669
MR		 1607};
1608
1609static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1610 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1611 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1612 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1613 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1614 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1615};
1616
1617static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1618 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1619 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI		 1620 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1621 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1622 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1623 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1624};
1625
1626static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1627 /* SigmaTel reference board */
1628 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1629 "DFI LanParty", STAC_92HD73XX_REF),
1630 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1631 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1632 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1633 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1634 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1635 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1636 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1637 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1638 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1639 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1640 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1641 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1642 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1643 "unknown Dell", STAC_DELL_M6_DMIC),
1644 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1645 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1646 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1647 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1648 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1649 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1650 {} /* terminator */
1651};
1652
d0513fc6
MR		 1653static unsigned int ref92hd83xxx_pin_configs[14] = {
1654 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1655 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1656 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1657 0x01451160, 0x98560170,
1658};
1659
1660static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1661 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1662};
1663
1664static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1665 [STAC_92HD83XXX_REF] = "ref",
1666};
1667
1668static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1669 /* SigmaTel reference board */
1670 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1671 "DFI LanParty", STAC_92HD71BXX_REF),
574f3c4f 1672 {} /* terminator */
d0513fc6
MR		 1673};
1674
0ffa9807 1675static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1676 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1677 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1678 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1679};
1680
0ffa9807 1681static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1682 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1683 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1684 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1685};
1686
0ffa9807 1687static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1688 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1689 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1690 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1691};
1692
3a7abfd2
MR		 1693static unsigned int dell_m4_3_pin_configs[11] = {
1694 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1695 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1696 0x40f000f0, 0x044413b0, 0x044413b0,
1697};
1698
e035b841
MR		 1699static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1700 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1701 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1702 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1703 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1704 [STAC_HP_M4] = NULL,
e035b841
MR		 1705};
1706
1707static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1708 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1709 [STAC_DELL_M4_1] = "dell-m4-1",
1710 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1711 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1712 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1713};
1714
1715static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1716 /* SigmaTel reference board */
1717 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1718 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1719 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1720 "HP dv5", STAC_HP_M4),
1721 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1722 "HP dv7", STAC_HP_M4),
9a9e2359
MR		 1723 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1724 "unknown HP", STAC_HP_M4),
a7662640
MR		 1725 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1726 "unknown Dell", STAC_DELL_M4_1),
1727 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1728 "unknown Dell", STAC_DELL_M4_1),
1729 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1730 "unknown Dell", STAC_DELL_M4_1),
1731 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1732 "unknown Dell", STAC_DELL_M4_1),
1733 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1734 "unknown Dell", STAC_DELL_M4_1),
1735 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1736 "unknown Dell", STAC_DELL_M4_1),
1737 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1738 "unknown Dell", STAC_DELL_M4_1),
1739 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1740 "unknown Dell", STAC_DELL_M4_2),
1741 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1742 "unknown Dell", STAC_DELL_M4_2),
1743 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1744 "unknown Dell", STAC_DELL_M4_2),
1745 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1746 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1747 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1748 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1749 {} /* terminator */
1750};
1751
403d1944
MP		 1752static unsigned int ref922x_pin_configs[10] = {
1753 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1754 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1755 0x40000100, 0x40000100,
1756};
1757
dfe495d0
TI		 1758/*
1759 STAC 922X pin configs for
1760 102801A7
1761 102801AB
1762 102801A9
1763 102801D1
1764 102801D2
1765*/
1766static unsigned int dell_922x_d81_pin_configs[10] = {
1767 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1768 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1769 0x01813122, 0x400001f2,
1770};
1771
1772/*
1773 STAC 922X pin configs for
1774 102801AC
1775 102801D0
1776*/
1777static unsigned int dell_922x_d82_pin_configs[10] = {
1778 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1779 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1780 0x01813122, 0x400001f1,
1781};
1782
1783/*
1784 STAC 922X pin configs for
1785 102801BF
1786*/
1787static unsigned int dell_922x_m81_pin_configs[10] = {
1788 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1789 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1790 0x40C003f1, 0x405003f0,
1791};
1792
1793/*
1794 STAC 9221 A1 pin configs for
1795 102801D7 (Dell XPS M1210)
1796*/
1797static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1798 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1799 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1800 0x508003f3, 0x405003f4,
1801};
1802
403d1944 1803static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1804 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1805 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1806 0x02a19120, 0x40000100,
1807};
1808
1809static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1810 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1811 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1812 0x02a19320, 0x40000100,
1813};
1814
5d5d3bc3
IZ		 1815static unsigned int intel_mac_v1_pin_configs[10] = {
1816 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1817 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1818 0x400000fc, 0x400000fb,
1819};
1820
1821static unsigned int intel_mac_v2_pin_configs[10] = {
1822 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1823 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1824 0x400000fc, 0x400000fb,
6f0778d8
NB		 1825};
1826
5d5d3bc3
IZ		 1827static unsigned int intel_mac_v3_pin_configs[10] = {
1828 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1829 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1830 0x400000fc, 0x400000fb,
1831};
1832
5d5d3bc3
IZ		 1833static unsigned int intel_mac_v4_pin_configs[10] = {
1834 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1835 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1836 0x400000fc, 0x400000fb,
1837};
1838
5d5d3bc3
IZ		 1839static unsigned int intel_mac_v5_pin_configs[10] = {
1840 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1841 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1842 0x400000fc, 0x400000fb,
0dae0f83
TI		 1843};
1844
8c650087
MCC		 1845static unsigned int ecs202_pin_configs[10] = {
1846 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1847 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1848 0x9037012e, 0x40e000f2,
1849};
76c08828 1850
19039bd0 1851static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1852 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1853 [STAC_D945GTP3] = d945gtp3_pin_configs,
1854 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1855 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1856 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1857 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1858 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1859 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1860 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1861 /* for backward compatibility */
5d5d3bc3
IZ		 1862 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1863 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1864 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1865 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1866 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1867 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1868 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1869 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1870 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1871 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1872 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1873};
1874
f5fcc13c
TI		 1875static const char *stac922x_models[STAC_922X_MODELS] = {
1876 [STAC_D945_REF] = "ref",
1877 [STAC_D945GTP5] = "5stack",
1878 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1879 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1880 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1881 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1882 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1883 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1884 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1885 /* for backward compatibility */
f5fcc13c 1886 [STAC_MACMINI] = "macmini",
3fc24d85 1887 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1888 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1889 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1890 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1891 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1892 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1893 [STAC_922X_DELL_D81] = "dell-d81",
1894 [STAC_922X_DELL_D82] = "dell-d82",
1895 [STAC_922X_DELL_M81] = "dell-m81",
1896 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1897};
1898
1899static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1900 /* SigmaTel reference board */
1901 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1902 "DFI LanParty", STAC_D945_REF),
1903 /* Intel 945G based systems */
1904 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1905 "Intel D945G", STAC_D945GTP3),
1906 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1907 "Intel D945G", STAC_D945GTP3),
1908 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1909 "Intel D945G", STAC_D945GTP3),
1910 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1911 "Intel D945G", STAC_D945GTP3),
1912 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1913 "Intel D945G", STAC_D945GTP3),
1914 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1915 "Intel D945G", STAC_D945GTP3),
1916 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1917 "Intel D945G", STAC_D945GTP3),
1918 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1919 "Intel D945G", STAC_D945GTP3),
1920 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1921 "Intel D945G", STAC_D945GTP3),
1922 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1923 "Intel D945G", STAC_D945GTP3),
1924 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1925 "Intel D945G", STAC_D945GTP3),
1926 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1927 "Intel D945G", STAC_D945GTP3),
1928 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1929 "Intel D945G", STAC_D945GTP3),
1930 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1931 "Intel D945G", STAC_D945GTP3),
1932 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1933 "Intel D945G", STAC_D945GTP3),
1934 /* Intel D945G 5-stack systems */
1935 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1936 "Intel D945G", STAC_D945GTP5),
1937 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1938 "Intel D945G", STAC_D945GTP5),
1939 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1940 "Intel D945G", STAC_D945GTP5),
1941 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1942 "Intel D945G", STAC_D945GTP5),
1943 /* Intel 945P based systems */
1944 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1945 "Intel D945P", STAC_D945GTP3),
1946 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1947 "Intel D945P", STAC_D945GTP3),
1948 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1949 "Intel D945P", STAC_D945GTP3),
1950 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1951 "Intel D945P", STAC_D945GTP3),
1952 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1953 "Intel D945P", STAC_D945GTP3),
1954 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1955 "Intel D945P", STAC_D945GTP5),
1956 /* other systems */
536319af 1957 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1958 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1959 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1960 /* Dell systems */
1961 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1962 "unknown Dell", STAC_922X_DELL_D81),
1963 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1964 "unknown Dell", STAC_922X_DELL_D81),
1965 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1966 "unknown Dell", STAC_922X_DELL_D81),
1967 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1968 "unknown Dell", STAC_922X_DELL_D82),
1969 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1970 "unknown Dell", STAC_922X_DELL_M81),
1971 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1972 "unknown Dell", STAC_922X_DELL_D82),
1973 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1974 "unknown Dell", STAC_922X_DELL_D81),
1975 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1976 "unknown Dell", STAC_922X_DELL_D81),
1977 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1978 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1979 /* ECS/PC Chips boards */
1980 SND_PCI_QUIRK(0x1019, 0x2144,
1981 "ECS/PC chips", STAC_ECS_202),
1982 SND_PCI_QUIRK(0x1019, 0x2608,
1983 "ECS/PC chips", STAC_ECS_202),
1984 SND_PCI_QUIRK(0x1019, 0x2633,
1985 "ECS/PC chips P17G/1333", STAC_ECS_202),
1986 SND_PCI_QUIRK(0x1019, 0x2811,
1987 "ECS/PC chips", STAC_ECS_202),
1988 SND_PCI_QUIRK(0x1019, 0x2812,
1989 "ECS/PC chips", STAC_ECS_202),
1990 SND_PCI_QUIRK(0x1019, 0x2813,
1991 "ECS/PC chips", STAC_ECS_202),
1992 SND_PCI_QUIRK(0x1019, 0x2814,
1993 "ECS/PC chips", STAC_ECS_202),
1994 SND_PCI_QUIRK(0x1019, 0x2815,
1995 "ECS/PC chips", STAC_ECS_202),
1996 SND_PCI_QUIRK(0x1019, 0x2816,
1997 "ECS/PC chips", STAC_ECS_202),
1998 SND_PCI_QUIRK(0x1019, 0x2817,
1999 "ECS/PC chips", STAC_ECS_202),
2000 SND_PCI_QUIRK(0x1019, 0x2818,
2001 "ECS/PC chips", STAC_ECS_202),
2002 SND_PCI_QUIRK(0x1019, 0x2819,
2003 "ECS/PC chips", STAC_ECS_202),
2004 SND_PCI_QUIRK(0x1019, 0x2820,
2005 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2006 {} /* terminator */
2007};
2008
3cc08dc6 2009static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2010 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2011 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2012 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2013 0x01c42190, 0x40000100,
3cc08dc6
MP		 2014};
2015
93ed1503 2016static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2017 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2018 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2019 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2020 0x40000100, 0x40000100
2021};
2022
93ed1503
TD		 2023static unsigned int d965_5st_pin_configs[14] = {
2024 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2025 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2026 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2027 0x40000100, 0x40000100
2028};
2029
4ff076e5
TD		 2030static unsigned int dell_3st_pin_configs[14] = {
2031 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2032 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2033 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2034 0x40c003fc, 0x40000100
2035};
2036
93ed1503 2037static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2038 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2039 [STAC_D965_REF] = ref927x_pin_configs,
2040 [STAC_D965_3ST] = d965_3st_pin_configs,
2041 [STAC_D965_5ST] = d965_5st_pin_configs,
2042 [STAC_DELL_3ST] = dell_3st_pin_configs,
2043 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2044};
2045
f5fcc13c 2046static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2047 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2048 [STAC_D965_REF] = "ref",
2049 [STAC_D965_3ST] = "3stack",
2050 [STAC_D965_5ST] = "5stack",
2051 [STAC_DELL_3ST] = "dell-3stack",
2052 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2053};
2054
2055static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2056 /* SigmaTel reference board */
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2058 "DFI LanParty", STAC_D965_REF),
81d3dbde 2059 /* Intel 946 based systems */
f5fcc13c
TI		 2060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2062 /* 965 based 3 stack systems */
f5fcc13c
TI		 2063 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2064 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2065 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2066 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2067 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2068 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2069 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2070 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2071 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2072 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2073 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2074 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2075 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2076 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2077 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2078 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2079 /* Dell 3 stack systems */
8e9068b1 2080 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2081 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2082 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2083 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2084 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2085 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2086 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2087 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2088 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2089 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2090 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2091 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2092 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2093 /* 965 based 5 stack systems */
f5fcc13c
TI		 2094 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2095 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2096 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2097 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2098 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2099 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2100 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2101 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2102 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2103 {} /* terminator */
2104};
2105
f3302a59
MP		 2106static unsigned int ref9205_pin_configs[12] = {
2107 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2108 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2109 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2110};
2111
dfe495d0
TI		 2112/*
2113 STAC 9205 pin configs for
2114 102801F1
2115 102801F2
2116 102801FC
2117 102801FD
2118 10280204
2119 1028021F
3fa2ef74 2120 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2121*/
2122static unsigned int dell_9205_m42_pin_configs[12] = {
2123 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2124 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2125 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2126};
2127
2128/*
2129 STAC 9205 pin configs for
2130 102801F9
2131 102801FA
2132 102801FE
2133 102801FF (Dell Precision M4300)
2134 10280206
2135 10280200
2136 10280201
2137*/
2138static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2139 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2140 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2141 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2142};
2143
dfe495d0 2144static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2145 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2146 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2147 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2148};
2149
f5fcc13c 2150static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2151 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2152 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2153 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2154 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2155};
2156
f5fcc13c
TI		 2157static const char *stac9205_models[STAC_9205_MODELS] = {
2158 [STAC_9205_REF] = "ref",
dfe495d0 2159 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2160 [STAC_9205_DELL_M43] = "dell-m43",
2161 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2162};
2163
2164static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2165 /* SigmaTel reference board */
2166 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2167 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2169 "unknown Dell", STAC_9205_DELL_M42),
2170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2171 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2173 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2175 "Dell Precision", STAC_9205_DELL_M43),
2176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2177 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2179 "unknown Dell", STAC_9205_DELL_M42),
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2181 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2182 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2183 "Dell Precision", STAC_9205_DELL_M43),
2184 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2185 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2186 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2187 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2189 "Dell Precision", STAC_9205_DELL_M43),
2190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2191 "Dell Precision", STAC_9205_DELL_M43),
2192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2193 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2195 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2197 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2198 {} /* terminator */
2199};
2200
11b44bbd
RF		 2201static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2202{
2203 int i;
2204 struct sigmatel_spec *spec = codec->spec;
2205
2206 if (! spec->bios_pin_configs) {
2207 spec->bios_pin_configs = kcalloc(spec->num_pins,
2208 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
2209 if (! spec->bios_pin_configs)
2210 return -ENOMEM;
2211 }
2212
2213 for (i = 0; i < spec->num_pins; i++) {
2214 hda_nid_t nid = spec->pin_nids[i];
2215 unsigned int pin_cfg;
2216
2217 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2218 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2219 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2220 nid, pin_cfg);
2221 spec->bios_pin_configs[i] = pin_cfg;
2222 }
2223
2224 return 0;
2225}
2226
87d48363
MR		 2227static void stac92xx_set_config_reg(struct hda_codec *codec,
2228 hda_nid_t pin_nid, unsigned int pin_config)
2229{
2230 int i;
2231 snd_hda_codec_write(codec, pin_nid, 0,
2232 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2233 pin_config & 0x000000ff);
2234 snd_hda_codec_write(codec, pin_nid, 0,
2235 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2236 (pin_config & 0x0000ff00) >> 8);
2237 snd_hda_codec_write(codec, pin_nid, 0,
2238 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2239 (pin_config & 0x00ff0000) >> 16);
2240 snd_hda_codec_write(codec, pin_nid, 0,
2241 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2242 pin_config >> 24);
2243 i = snd_hda_codec_read(codec, pin_nid, 0,
2244 AC_VERB_GET_CONFIG_DEFAULT,
2245 0x00);
2246 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2247 pin_nid, i);
2248}
2249
2f2f4251
M		 2250static void stac92xx_set_config_regs(struct hda_codec *codec)
2251{
2252 int i;
2253 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2254
87d48363
MR		 2255 if (!spec->pin_configs)
2256 return;
11b44bbd 2257
87d48363
MR		 2258 for (i = 0; i < spec->num_pins; i++)
2259 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2260 spec->pin_configs[i]);
2f2f4251 2261}
2f2f4251 2262
dabbed6f 2263/*
c7d4b2fa 2264 * Analog playback callbacks
dabbed6f 2265 */
c7d4b2fa
M		 2266static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2267 struct hda_codec *codec,
c8b6bf9b 2268 struct snd_pcm_substream *substream)
2f2f4251 2269{
dabbed6f 2270 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2271 if (spec->stream_delay)
2272 msleep(spec->stream_delay);
9a08160b
TI		 2273 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2274 hinfo);
2f2f4251
M		 2275}
2276
2f2f4251
M		 2277static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2278 struct hda_codec *codec,
2279 unsigned int stream_tag,
2280 unsigned int format,
c8b6bf9b 2281 struct snd_pcm_substream *substream)
2f2f4251
M		 2282{
2283 struct sigmatel_spec *spec = codec->spec;
403d1944 2284 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2285}
2286
2287static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2288 struct hda_codec *codec,
c8b6bf9b 2289 struct snd_pcm_substream *substream)
2f2f4251
M		 2290{
2291 struct sigmatel_spec *spec = codec->spec;
2292 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2293}
2294
dabbed6f
M		 2295/*
2296 * Digital playback callbacks
2297 */
2298static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2299 struct hda_codec *codec,
c8b6bf9b 2300 struct snd_pcm_substream *substream)
dabbed6f
M		 2301{
2302 struct sigmatel_spec *spec = codec->spec;
2303 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2304}
2305
2306static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2307 struct hda_codec *codec,
c8b6bf9b 2308 struct snd_pcm_substream *substream)
dabbed6f
M		 2309{
2310 struct sigmatel_spec *spec = codec->spec;
2311 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2312}
2313
6b97eb45
TI		 2314static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2315 struct hda_codec *codec,
2316 unsigned int stream_tag,
2317 unsigned int format,
2318 struct snd_pcm_substream *substream)
2319{
2320 struct sigmatel_spec *spec = codec->spec;
2321 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2322 stream_tag, format, substream);
2323}
2324
dabbed6f 2325
2f2f4251
M		 2326/*
2327 * Analog capture callbacks
2328 */
2329static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2330 struct hda_codec *codec,
2331 unsigned int stream_tag,
2332 unsigned int format,
c8b6bf9b 2333 struct snd_pcm_substream *substream)
2f2f4251
M		 2334{
2335 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2336 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2337
8daaaa97
MR		 2338 if (spec->powerdown_adcs) {
2339 msleep(40);
2340 snd_hda_codec_write_cache(codec, nid, 0,
2341 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2342 }
2343 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2344 return 0;
2345}
2346
2347static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2348 struct hda_codec *codec,
c8b6bf9b 2349 struct snd_pcm_substream *substream)
2f2f4251
M		 2350{
2351 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2352 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2353
8daaaa97
MR		 2354 snd_hda_codec_cleanup_stream(codec, nid);
2355 if (spec->powerdown_adcs)
2356 snd_hda_codec_write_cache(codec, nid, 0,
2357 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2358 return 0;
2359}
2360
dabbed6f
M		 2361static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2362 .substreams = 1,
2363 .channels_min = 2,
2364 .channels_max = 2,
2365 /* NID is set in stac92xx_build_pcms */
2366 .ops = {
2367 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2368 .close = stac92xx_dig_playback_pcm_close,
2369 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2370 },
2371};
2372
2373static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2374 .substreams = 1,
2375 .channels_min = 2,
2376 .channels_max = 2,
2377 /* NID is set in stac92xx_build_pcms */
2378};
2379
2f2f4251
M		 2380static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2381 .substreams = 1,
2382 .channels_min = 2,
c7d4b2fa 2383 .channels_max = 8,
2f2f4251
M		 2384 .nid = 0x02, /* NID to query formats and rates */
2385 .ops = {
2386 .open = stac92xx_playback_pcm_open,
2387 .prepare = stac92xx_playback_pcm_prepare,
2388 .cleanup = stac92xx_playback_pcm_cleanup
2389 },
2390};
2391
3cc08dc6
MP		 2392static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2393 .substreams = 1,
2394 .channels_min = 2,
2395 .channels_max = 2,
2396 .nid = 0x06, /* NID to query formats and rates */
2397 .ops = {
2398 .open = stac92xx_playback_pcm_open,
2399 .prepare = stac92xx_playback_pcm_prepare,
2400 .cleanup = stac92xx_playback_pcm_cleanup
2401 },
2402};
2403
2f2f4251 2404static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2405 .channels_min = 2,
2406 .channels_max = 2,
9e05b7a3 2407 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2408 .ops = {
2409 .prepare = stac92xx_capture_pcm_prepare,
2410 .cleanup = stac92xx_capture_pcm_cleanup
2411 },
2412};
2413
2414static int stac92xx_build_pcms(struct hda_codec *codec)
2415{
2416 struct sigmatel_spec *spec = codec->spec;
2417 struct hda_pcm *info = spec->pcm_rec;
2418
2419 codec->num_pcms = 1;
2420 codec->pcm_info = info;
2421
c7d4b2fa 2422 info->name = "STAC92xx Analog";
2f2f4251 2423 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2424 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2425 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2426 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2427
2428 if (spec->alt_switch) {
2429 codec->num_pcms++;
2430 info++;
2431 info->name = "STAC92xx Analog Alt";
2432 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2433 }
2f2f4251 2434
dabbed6f
M		 2435 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2436 codec->num_pcms++;
2437 info++;
2438 info->name = "STAC92xx Digital";
7ba72ba1 2439 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2440 if (spec->multiout.dig_out_nid) {
2441 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2442 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2443 }
2444 if (spec->dig_in_nid) {
2445 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2446 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2447 }
2448 }
2449
2f2f4251
M		 2450 return 0;
2451}
2452
c960a03b
TI		 2453static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2454{
2455 unsigned int pincap = snd_hda_param_read(codec, nid,
2456 AC_PAR_PIN_CAP);
2457 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2458 if (pincap & AC_PINCAP_VREF_100)
2459 return AC_PINCTL_VREF_100;
2460 if (pincap & AC_PINCAP_VREF_80)
2461 return AC_PINCTL_VREF_80;
2462 if (pincap & AC_PINCAP_VREF_50)
2463 return AC_PINCTL_VREF_50;
2464 if (pincap & AC_PINCAP_VREF_GRD)
2465 return AC_PINCTL_VREF_GRD;
2466 return 0;
2467}
2468
403d1944
MP		 2469static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2470
2471{
82beb8fd
TI		 2472 snd_hda_codec_write_cache(codec, nid, 0,
2473 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2474}
2475
7c2ba97b
MR		 2476#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2477
2478static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2479 struct snd_ctl_elem_value *ucontrol)
2480{
2481 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2482 struct sigmatel_spec *spec = codec->spec;
2483
d7a89436 2484 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2485 return 0;
2486}
2487
2488static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2489 struct snd_ctl_elem_value *ucontrol)
2490{
2491 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2492 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2493 int nid = kcontrol->private_value;
2494
2495 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2496
2497 /* check to be sure that the ports are upto date with
2498 * switch changes
2499 */
2500 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2501
2502 return 1;
2503}
2504
a5ce8890 2505#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2506
2507static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2508{
2509 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2510 struct sigmatel_spec *spec = codec->spec;
2511 int io_idx = kcontrol-> private_value & 0xff;
2512
2513 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2514 return 0;
2515}
2516
2517static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2518{
2519 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2520 struct sigmatel_spec *spec = codec->spec;
2521 hda_nid_t nid = kcontrol->private_value >> 8;
2522 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2523 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2524
2525 spec->io_switch[io_idx] = val;
2526
2527 if (val)
2528 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2529 else {
2530 unsigned int pinctl = AC_PINCTL_IN_EN;
2531 if (io_idx) /* set VREF for mic */
2532 pinctl |= stac92xx_get_vref(codec, nid);
2533 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2534 }
40c1d308
JZ		 2535
2536 /* check the auto-mute again: we need to mute/unmute the speaker
2537 * appropriately according to the pin direction
2538 */
2539 if (spec->hp_detect)
2540 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2541
403d1944
MP		 2542 return 1;
2543}
2544
0fb87bb4
ML		 2545#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2546
2547static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2548 struct snd_ctl_elem_value *ucontrol)
2549{
2550 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2551 struct sigmatel_spec *spec = codec->spec;
2552
2553 ucontrol->value.integer.value[0] = spec->clfe_swap;
2554 return 0;
2555}
2556
2557static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2558 struct snd_ctl_elem_value *ucontrol)
2559{
2560 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2561 struct sigmatel_spec *spec = codec->spec;
2562 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2563 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2564
68ea7b2f 2565 if (spec->clfe_swap == val)
0fb87bb4
ML		 2566 return 0;
2567
68ea7b2f 2568 spec->clfe_swap = val;
0fb87bb4
ML		 2569
2570 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2571 spec->clfe_swap ? 0x4 : 0x0);
2572
2573 return 1;
2574}
2575
7c2ba97b
MR		 2576#define STAC_CODEC_HP_SWITCH(xname) \
2577 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2578 .name = xname, \
2579 .index = 0, \
2580 .info = stac92xx_hp_switch_info, \
2581 .get = stac92xx_hp_switch_get, \
2582 .put = stac92xx_hp_switch_put, \
2583 }
2584
403d1944
MP		 2585#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2586 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2587 .name = xname, \
2588 .index = 0, \
2589 .info = stac92xx_io_switch_info, \
2590 .get = stac92xx_io_switch_get, \
2591 .put = stac92xx_io_switch_put, \
2592 .private_value = xpval, \
2593 }
2594
0fb87bb4
ML		 2595#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2596 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2597 .name = xname, \
2598 .index = 0, \
2599 .info = stac92xx_clfe_switch_info, \
2600 .get = stac92xx_clfe_switch_get, \
2601 .put = stac92xx_clfe_switch_put, \
2602 .private_value = xpval, \
2603 }
403d1944 2604
c7d4b2fa
M		 2605enum {
2606 STAC_CTL_WIDGET_VOL,
2607 STAC_CTL_WIDGET_MUTE,
09a99959 2608 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2609 STAC_CTL_WIDGET_AMP_MUX,
2610 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2611 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2612 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2613 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2614};
2615
c8b6bf9b 2616static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2617 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2618 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2619 STAC_MONO_MUX,
89385035
MR		 2620 STAC_AMP_MUX,
2621 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2622 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2623 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2624 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2625};
2626
2627/* add dynamic controls */
4d4e9bb3
TI		 2628static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2629 struct snd_kcontrol_new *ktemp,
2630 int idx, const char *name,
2631 unsigned long val)
c7d4b2fa 2632{
c8b6bf9b 2633 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2634
2635 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2636 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2637
2638 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2639 if (! knew)
2640 return -ENOMEM;
2641 if (spec->kctl_alloc) {
2642 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2643 kfree(spec->kctl_alloc);
2644 }
2645 spec->kctl_alloc = knew;
2646 spec->num_kctl_alloc = num;
2647 }
2648
2649 knew = &spec->kctl_alloc[spec->num_kctl_used];
4d4e9bb3 2650 *knew = *ktemp;
4682eee0 2651 knew->index = idx;
82fe0c58 2652 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2653 if (!knew->name)
c7d4b2fa
M		 2654 return -ENOMEM;
2655 knew->private_value = val;
2656 spec->num_kctl_used++;
2657 return 0;
2658}
2659
4d4e9bb3
TI		 2660static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2661 int type, int idx, const char *name,
2662 unsigned long val)
2663{
2664 return stac92xx_add_control_temp(spec,
2665 &stac92xx_control_templates[type],
2666 idx, name, val);
2667}
2668
4682eee0
MR		 2669
2670/* add dynamic controls */
4d4e9bb3
TI		 2671static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2672 const char *name, unsigned long val)
4682eee0
MR		 2673{
2674 return stac92xx_add_control_idx(spec, type, 0, name, val);
2675}
2676
403d1944
MP		 2677/* flag inputs as additional dynamic lineouts */
2678static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2679{
2680 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2681 unsigned int wcaps, wtype;
2682 int i, num_dacs = 0;
2683
2684 /* use the wcaps cache to count all DACs available for line-outs */
2685 for (i = 0; i < codec->num_nodes; i++) {
2686 wcaps = codec->wcaps[i];
2687 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2688
7b043899
SL		 2689 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2690 num_dacs++;
2691 }
403d1944 2692
7b043899
SL		 2693 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2694
403d1944
MP		 2695 switch (cfg->line_outs) {
2696 case 3:
2697 /* add line-in as side */
7b043899 2698 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2699 cfg->line_out_pins[cfg->line_outs] =
2700 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2701 spec->line_switch = 1;
2702 cfg->line_outs++;
2703 }
2704 break;
2705 case 2:
2706 /* add line-in as clfe and mic as side */
7b043899 2707 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2708 cfg->line_out_pins[cfg->line_outs] =
2709 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2710 spec->line_switch = 1;
2711 cfg->line_outs++;
2712 }
7b043899 2713 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2714 cfg->line_out_pins[cfg->line_outs] =
2715 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2716 spec->mic_switch = 1;
2717 cfg->line_outs++;
2718 }
2719 break;
2720 case 1:
2721 /* add line-in as surr and mic as clfe */
7b043899 2722 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2723 cfg->line_out_pins[cfg->line_outs] =
2724 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2725 spec->line_switch = 1;
2726 cfg->line_outs++;
2727 }
7b043899 2728 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2729 cfg->line_out_pins[cfg->line_outs] =
2730 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2731 spec->mic_switch = 1;
2732 cfg->line_outs++;
2733 }
2734 break;
2735 }
2736
2737 return 0;
2738}
2739
7b043899
SL		 2740
2741static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2742{
2743 int i;
2744
2745 for (i = 0; i < spec->multiout.num_dacs; i++) {
2746 if (spec->multiout.dac_nids[i] == nid)
2747 return 1;
2748 }
2749
2750 return 0;
2751}
2752
3cc08dc6 2753/*
7b043899
SL		 2754 * Fill in the dac_nids table from the parsed pin configuration
2755 * This function only works when every pin in line_out_pins[]
2756 * contains atleast one DAC in its connection list. Some 92xx
2757 * codecs are not connected directly to a DAC, such as the 9200
2758 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2759 */
19039bd0 2760static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2761 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2762{
2763 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2764 int i, j, conn_len = 0;
2765 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2766 unsigned int wcaps, wtype;
2767
c7d4b2fa
M		 2768 for (i = 0; i < cfg->line_outs; i++) {
2769 nid = cfg->line_out_pins[i];
7b043899
SL		 2770 conn_len = snd_hda_get_connections(codec, nid, conn,
2771 HDA_MAX_CONNECTIONS);
2772 for (j = 0; j < conn_len; j++) {
2773 wcaps = snd_hda_param_read(codec, conn[j],
2774 AC_PAR_AUDIO_WIDGET_CAP);
2775 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2776 if (wtype != AC_WID_AUD_OUT ||
2777 (wcaps & AC_WCAP_DIGITAL))
2778 continue;
2779 /* conn[j] is a DAC routed to this line-out */
2780 if (!is_in_dac_nids(spec, conn[j]))
2781 break;
2782 }
2783
2784 if (j == conn_len) {
df802952
TI		 2785 if (spec->multiout.num_dacs > 0) {
2786 /* we have already working output pins,
2787 * so let's drop the broken ones again
2788 */
2789 cfg->line_outs = spec->multiout.num_dacs;
2790 break;
2791 }
7b043899
SL		 2792 /* error out, no available DAC found */
2793 snd_printk(KERN_ERR
2794 "%s: No available DAC for pin 0x%x\n",
2795 __func__, nid);
2796 return -ENODEV;
2797 }
2798
2799 spec->multiout.dac_nids[i] = conn[j];
2800 spec->multiout.num_dacs++;
2801 if (conn_len > 1) {
2802 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2803 snd_hda_codec_write_cache(codec, nid, 0,
2804 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2805
7b043899
SL		 2806 }
2807 }
c7d4b2fa 2808
7b043899
SL		 2809 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2810 spec->multiout.num_dacs,
2811 spec->multiout.dac_nids[0],
2812 spec->multiout.dac_nids[1],
2813 spec->multiout.dac_nids[2],
2814 spec->multiout.dac_nids[3],
2815 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2816 return 0;
2817}
2818
eb06ed8f
TI		 2819/* create volume control/switch for the given prefx type */
2820static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2821{
2822 char name[32];
2823 int err;
2824
2825 sprintf(name, "%s Playback Volume", pfx);
2826 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2827 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2828 if (err < 0)
2829 return err;
2830 sprintf(name, "%s Playback Switch", pfx);
2831 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2832 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2833 if (err < 0)
2834 return err;
2835 return 0;
2836}
2837
ae0afd81
MR		 2838static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2839{
2840 if (!spec->multiout.hp_nid)
2841 spec->multiout.hp_nid = nid;
2842 else if (spec->multiout.num_dacs > 4) {
2843 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2844 return 1;
2845 } else {
2846 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2847 spec->multiout.num_dacs++;
2848 }
2849 return 0;
2850}
2851
2852static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2853{
2854 if (is_in_dac_nids(spec, nid))
2855 return 1;
2856 if (spec->multiout.hp_nid == nid)
2857 return 1;
2858 return 0;
2859}
2860
c7d4b2fa 2861/* add playback controls from the parsed DAC table */
0fb87bb4 2862static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2863 const struct auto_pin_cfg *cfg)
c7d4b2fa 2864{
19039bd0
TI		 2865 static const char *chname[4] = {
2866 "Front", "Surround", NULL /*CLFE*/, "Side"
2867 };
d21995e3 2868 hda_nid_t nid = 0;
c7d4b2fa
M		 2869 int i, err;
2870
0fb87bb4 2871 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2872 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2873
2874
40ac8c4f 2875 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2876 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2877 continue;
2878
2879 nid = spec->multiout.dac_nids[i];
2880
2881 if (i == 2) {
2882 /* Center/LFE */
eb06ed8f
TI		 2883 err = create_controls(spec, "Center", nid, 1);
2884 if (err < 0)
c7d4b2fa 2885 return err;
eb06ed8f
TI		 2886 err = create_controls(spec, "LFE", nid, 2);
2887 if (err < 0)
c7d4b2fa 2888 return err;
0fb87bb4
ML		 2889
2890 wid_caps = get_wcaps(codec, nid);
2891
2892 if (wid_caps & AC_WCAP_LR_SWAP) {
2893 err = stac92xx_add_control(spec,
2894 STAC_CTL_WIDGET_CLFE_SWITCH,
2895 "Swap Center/LFE Playback Switch", nid);
2896
2897 if (err < 0)
2898 return err;
2899 }
2900
c7d4b2fa 2901 } else {
eb06ed8f
TI		 2902 err = create_controls(spec, chname[i], nid, 3);
2903 if (err < 0)
c7d4b2fa
M		 2904 return err;
2905 }
2906 }
2907
fedb7569 2908 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
8f55c1e5 2909 cfg->hp_outs == 1 && !spec->multiout.hp_nid)
fedb7569
MR		 2910 spec->multiout.hp_nid = nid;
2911
95026623 2912 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 2913 err = stac92xx_add_control(spec,
2914 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 2915 "Headphone as Line Out Switch",
2916 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 2917 if (err < 0)
2918 return err;
2919 }
2920
b5895dc8
MR		 2921 if (spec->line_switch) {
2922 nid = cfg->input_pins[AUTO_PIN_LINE];
2923 pincap = snd_hda_param_read(codec, nid,
2924 AC_PAR_PIN_CAP);
2925 if (pincap & AC_PINCAP_OUT) {
2926 err = stac92xx_add_control(spec,
2927 STAC_CTL_WIDGET_IO_SWITCH,
2928 "Line In as Output Switch", nid << 8);
2929 if (err < 0)
2930 return err;
2931 }
2932 }
403d1944 2933
b5895dc8 2934 if (spec->mic_switch) {
cace16f1 2935 unsigned int def_conf;
ae0afd81
MR		 2936 unsigned int mic_pin = AUTO_PIN_MIC;
2937again:
2938 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2939 def_conf = snd_hda_codec_read(codec, nid, 0,
2940 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2941 /* some laptops have an internal analog microphone
2942 * which can't be used as a output */
2943 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2944 pincap = snd_hda_param_read(codec, nid,
2945 AC_PAR_PIN_CAP);
2946 if (pincap & AC_PINCAP_OUT) {
2947 err = stac92xx_add_control(spec,
2948 STAC_CTL_WIDGET_IO_SWITCH,
2949 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2950 nid = snd_hda_codec_read(codec, nid, 0,
2951 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2952 if (!check_in_dac_nids(spec, nid))
2953 add_spec_dacs(spec, nid);
cace16f1
MR		 2954 if (err < 0)
2955 return err;
2956 }
ae0afd81
MR		 2957 } else if (mic_pin == AUTO_PIN_MIC) {
2958 mic_pin = AUTO_PIN_FRONT_MIC;
2959 goto again;
b5895dc8
MR		 2960 }
2961 }
403d1944 2962
c7d4b2fa
M		 2963 return 0;
2964}
2965
eb06ed8f
TI		 2966/* add playback controls for Speaker and HP outputs */
2967static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2968 struct auto_pin_cfg *cfg)
2969{
2970 struct sigmatel_spec *spec = codec->spec;
2971 hda_nid_t nid;
2972 int i, old_num_dacs, err;
2973
2974 old_num_dacs = spec->multiout.num_dacs;
2975 for (i = 0; i < cfg->hp_outs; i++) {
2976 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2977 if (wid_caps & AC_WCAP_UNSOL_CAP)
2978 spec->hp_detect = 1;
2979 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2980 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2981 if (check_in_dac_nids(spec, nid))
2982 nid = 0;
2983 if (! nid)
c7d4b2fa 2984 continue;
eb06ed8f
TI		 2985 add_spec_dacs(spec, nid);
2986 }
2987 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2988 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2989 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2990 if (check_in_dac_nids(spec, nid))
2991 nid = 0;
eb06ed8f
TI		 2992 if (! nid)
2993 continue;
2994 add_spec_dacs(spec, nid);
c7d4b2fa 2995 }
1b290a51
MR		 2996 for (i = 0; i < cfg->line_outs; i++) {
2997 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2998 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2999 if (check_in_dac_nids(spec, nid))
3000 nid = 0;
3001 if (! nid)
3002 continue;
3003 add_spec_dacs(spec, nid);
3004 }
eb06ed8f
TI		 3005 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
3006 static const char *pfxs[] = {
3007 "Speaker", "External Speaker", "Speaker2",
3008 };
3009 err = create_controls(spec, pfxs[i - old_num_dacs],
3010 spec->multiout.dac_nids[i], 3);
3011 if (err < 0)
3012 return err;
3013 }
3014 if (spec->multiout.hp_nid) {
2626a263
TI		 3015 err = create_controls(spec, "Headphone",
3016 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 3017 if (err < 0)
3018 return err;
3019 }
c7d4b2fa
M		 3020
3021 return 0;
3022}
3023
b22b4821 3024/* labels for mono mux outputs */
d0513fc6
MR		 3025static const char *stac92xx_mono_labels[4] = {
3026 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3027};
3028
3029/* create mono mux for mono out on capable codecs */
3030static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3031{
3032 struct sigmatel_spec *spec = codec->spec;
3033 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3034 int i, num_cons;
3035 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3036
3037 num_cons = snd_hda_get_connections(codec,
3038 spec->mono_nid,
3039 con_lst,
3040 HDA_MAX_NUM_INPUTS);
3041 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3042 return -EINVAL;
3043
3044 for (i = 0; i < num_cons; i++) {
3045 mono_mux->items[mono_mux->num_items].label =
3046 stac92xx_mono_labels[i];
3047 mono_mux->items[mono_mux->num_items].index = i;
3048 mono_mux->num_items++;
3049 }
09a99959
MR		 3050
3051 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3052 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3053}
3054
89385035
MR		 3055/* labels for amp mux outputs */
3056static const char *stac92xx_amp_labels[3] = {
4b33c767 3057 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3058};
3059
3060/* create amp out controls mux on capable codecs */
3061static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3062{
3063 struct sigmatel_spec *spec = codec->spec;
3064 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3065 int i, err;
3066
2a9c7816 3067 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3068 amp_mux->items[amp_mux->num_items].label =
3069 stac92xx_amp_labels[i];
3070 amp_mux->items[amp_mux->num_items].index = i;
3071 amp_mux->num_items++;
3072 }
3073
2a9c7816
MR		 3074 if (spec->num_amps > 1) {
3075 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3076 "Amp Selector Capture Switch", 0);
3077 if (err < 0)
3078 return err;
3079 }
89385035
MR		 3080 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3081 "Amp Capture Volume",
3082 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3083}
3084
3085
1cd2224c
MR		 3086/* create PC beep volume controls */
3087static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3088 hda_nid_t nid)
3089{
3090 struct sigmatel_spec *spec = codec->spec;
3091 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3092 int err;
3093
3094 /* check for mute support for the the amp */
3095 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3096 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3097 "PC Beep Playback Switch",
3098 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3099 if (err < 0)
3100 return err;
3101 }
3102
3103 /* check to see if there is volume support for the amp */
3104 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3105 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3106 "PC Beep Playback Volume",
3107 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3108 if (err < 0)
3109 return err;
3110 }
3111 return 0;
3112}
3113
4d4e9bb3
TI		 3114#ifdef CONFIG_SND_HDA_INPUT_BEEP
3115#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3116
3117static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3118 struct snd_ctl_elem_value *ucontrol)
3119{
3120 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3121 ucontrol->value.integer.value[0] = codec->beep->enabled;
3122 return 0;
3123}
3124
3125static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3126 struct snd_ctl_elem_value *ucontrol)
3127{
3128 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3129 int enabled = !!ucontrol->value.integer.value[0];
3130 if (codec->beep->enabled != enabled) {
3131 codec->beep->enabled = enabled;
3132 return 1;
3133 }
3134 return 0;
3135}
3136
3137static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3138 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3139 .info = stac92xx_dig_beep_switch_info,
3140 .get = stac92xx_dig_beep_switch_get,
3141 .put = stac92xx_dig_beep_switch_put,
3142};
3143
3144static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3145{
3146 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3147 0, "PC Beep Playback Switch", 0);
3148}
3149#endif
3150
4682eee0
MR		 3151static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3152{
3153 struct sigmatel_spec *spec = codec->spec;
3154 int wcaps, nid, i, err = 0;
3155
3156 for (i = 0; i < spec->num_muxes; i++) {
3157 nid = spec->mux_nids[i];
3158 wcaps = get_wcaps(codec, nid);
3159
3160 if (wcaps & AC_WCAP_OUT_AMP) {
3161 err = stac92xx_add_control_idx(spec,
3162 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3163 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3164 if (err < 0)
3165 return err;
3166 }
3167 }
3168 return 0;
3169};
3170
d9737751 3171static const char *stac92xx_spdif_labels[3] = {
65973632 3172 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3173};
3174
3175static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3176{
3177 struct sigmatel_spec *spec = codec->spec;
3178 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3179 const char **labels = spec->spdif_labels;
d9737751 3180 int i, num_cons;
65973632 3181 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3182
3183 num_cons = snd_hda_get_connections(codec,
3184 spec->smux_nids[0],
3185 con_lst,
3186 HDA_MAX_NUM_INPUTS);
65973632 3187 if (!num_cons)
d9737751
MR		 3188 return -EINVAL;
3189
65973632
MR		 3190 if (!labels)
3191 labels = stac92xx_spdif_labels;
3192
d9737751 3193 for (i = 0; i < num_cons; i++) {
65973632 3194 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3195 spdif_mux->items[spdif_mux->num_items].index = i;
3196 spdif_mux->num_items++;
3197 }
3198
3199 return 0;
3200}
3201
8b65727b 3202/* labels for dmic mux inputs */
ddc2cec4 3203static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3204 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3205 "Digital Mic 3", "Digital Mic 4"
3206};
3207
3208/* create playback/capture controls for input pins on dmic capable codecs */
3209static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3210 const struct auto_pin_cfg *cfg)
3211{
3212 struct sigmatel_spec *spec = codec->spec;
3213 struct hda_input_mux *dimux = &spec->private_dimux;
3214 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3215 int err, i, j;
3216 char name[32];
8b65727b
MP		 3217
3218 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3219 dimux->items[dimux->num_items].index = 0;
3220 dimux->num_items++;
3221
3222 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3223 hda_nid_t nid;
8b65727b
MP		 3224 int index;
3225 int num_cons;
0678accd 3226 unsigned int wcaps;
8b65727b
MP		 3227 unsigned int def_conf;
3228
3229 def_conf = snd_hda_codec_read(codec,
3230 spec->dmic_nids[i],
3231 0,
3232 AC_VERB_GET_CONFIG_DEFAULT,
3233 0);
3234 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3235 continue;
3236
0678accd 3237 nid = spec->dmic_nids[i];
8b65727b 3238 num_cons = snd_hda_get_connections(codec,
e1f0d669 3239 spec->dmux_nids[0],
8b65727b
MP		 3240 con_lst,
3241 HDA_MAX_NUM_INPUTS);
3242 for (j = 0; j < num_cons; j++)
0678accd 3243 if (con_lst[j] == nid) {
8b65727b
MP		 3244 index = j;
3245 goto found;
3246 }
3247 continue;
3248found:
d0513fc6
MR		 3249 wcaps = get_wcaps(codec, nid) &
3250 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3251
d0513fc6 3252 if (wcaps) {
0678accd
MR		 3253 sprintf(name, "%s Capture Volume",
3254 stac92xx_dmic_labels[dimux->num_items]);
3255
3256 err = stac92xx_add_control(spec,
3257 STAC_CTL_WIDGET_VOL,
3258 name,
d0513fc6
MR		 3259 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3260 (wcaps & AC_WCAP_OUT_AMP) ?
3261 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3262 if (err < 0)
3263 return err;
3264 }
3265
8b65727b
MP		 3266 dimux->items[dimux->num_items].label =
3267 stac92xx_dmic_labels[dimux->num_items];
3268 dimux->items[dimux->num_items].index = index;
3269 dimux->num_items++;
3270 }
3271
3272 return 0;
3273}
3274
c7d4b2fa
M		 3275/* create playback/capture controls for input pins */
3276static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3277{
3278 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3279 struct hda_input_mux *imux = &spec->private_imux;
3280 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3281 int i, j, k;
3282
3283 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3284 int index;
3285
3286 if (!cfg->input_pins[i])
3287 continue;
3288 index = -1;
3289 for (j = 0; j < spec->num_muxes; j++) {
3290 int num_cons;
3291 num_cons = snd_hda_get_connections(codec,
3292 spec->mux_nids[j],
3293 con_lst,
3294 HDA_MAX_NUM_INPUTS);
3295 for (k = 0; k < num_cons; k++)
3296 if (con_lst[k] == cfg->input_pins[i]) {
3297 index = k;
3298 goto found;
3299 }
c7d4b2fa 3300 }
314634bc
TI		 3301 continue;
3302 found:
3303 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3304 imux->items[imux->num_items].index = index;
3305 imux->num_items++;
c7d4b2fa
M		 3306 }
3307
7b043899 3308 if (imux->num_items) {
62fe78e9
SR		 3309 /*
3310 * Set the current input for the muxes.
3311 * The STAC9221 has two input muxes with identical source
3312 * NID lists. Hopefully this won't get confused.
3313 */
3314 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3315 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3316 AC_VERB_SET_CONNECT_SEL,
3317 imux->items[0].index);
62fe78e9
SR		 3318 }
3319 }
3320
c7d4b2fa
M		 3321 return 0;
3322}
3323
c7d4b2fa
M		 3324static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3325{
3326 struct sigmatel_spec *spec = codec->spec;
3327 int i;
3328
3329 for (i = 0; i < spec->autocfg.line_outs; i++) {
3330 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3331 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3332 }
3333}
3334
3335static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3336{
3337 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3338 int i;
c7d4b2fa 3339
eb06ed8f
TI		 3340 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3341 hda_nid_t pin;
3342 pin = spec->autocfg.hp_pins[i];
3343 if (pin) /* connect to front */
3344 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3345 }
3346 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3347 hda_nid_t pin;
3348 pin = spec->autocfg.speaker_pins[i];
3349 if (pin) /* connect to front */
3350 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3351 }
c7d4b2fa
M		 3352}
3353
3cc08dc6 3354static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3355{
3356 struct sigmatel_spec *spec = codec->spec;
3357 int err;
bcecd9bd 3358 int hp_speaker_swap = 0;
c7d4b2fa 3359
8b65727b
MP		 3360 if ((err = snd_hda_parse_pin_def_config(codec,
3361 &spec->autocfg,
3362 spec->dmic_nids)) < 0)
c7d4b2fa 3363 return err;
82bc955f 3364 if (! spec->autocfg.line_outs)
869264c4 3365 return 0; /* can't find valid pin config */
19039bd0 3366
bcecd9bd
JZ		 3367 /* If we have no real line-out pin and multiple hp-outs, HPs should
3368 * be set up as multi-channel outputs.
3369 */
3370 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3371 spec->autocfg.hp_outs > 1) {
3372 /* Copy hp_outs to line_outs, backup line_outs in
3373 * speaker_outs so that the following routines can handle
3374 * HP pins as primary outputs.
3375 */
3376 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3377 sizeof(spec->autocfg.line_out_pins));
3378 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3379 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3380 sizeof(spec->autocfg.hp_pins));
3381 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3382 hp_speaker_swap = 1;
3383 }
09a99959 3384 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3385 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3386 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3387 u32 caps = query_amp_caps(codec,
3388 spec->autocfg.mono_out_pin, dir);
3389 hda_nid_t conn_list[1];
3390
3391 /* get the mixer node and then the mono mux if it exists */
3392 if (snd_hda_get_connections(codec,
3393 spec->autocfg.mono_out_pin, conn_list, 1) &&
3394 snd_hda_get_connections(codec, conn_list[0],
3395 conn_list, 1)) {
3396
3397 int wcaps = get_wcaps(codec, conn_list[0]);
3398 int wid_type = (wcaps & AC_WCAP_TYPE)
3399 >> AC_WCAP_TYPE_SHIFT;
3400 /* LR swap check, some stac925x have a mux that
3401 * changes the DACs output path instead of the
3402 * mono-mux path.
3403 */
3404 if (wid_type == AC_WID_AUD_SEL &&
3405 !(wcaps & AC_WCAP_LR_SWAP))
3406 spec->mono_nid = conn_list[0];
3407 }
d0513fc6
MR		 3408 if (dir) {
3409 hda_nid_t nid = spec->autocfg.mono_out_pin;
3410
3411 /* most mono outs have a least a mute/unmute switch */
3412 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3413 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3414 "Mono Playback Switch",
3415 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3416 if (err < 0)
3417 return err;
d0513fc6
MR		 3418 /* check for volume support for the amp */
3419 if ((caps & AC_AMPCAP_NUM_STEPS)
3420 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3421 err = stac92xx_add_control(spec,
3422 STAC_CTL_WIDGET_VOL,
3423 "Mono Playback Volume",
3424 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3425 if (err < 0)
3426 return err;
3427 }
09a99959
MR		 3428 }
3429
3430 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3431 AC_PINCTL_OUT_EN);
3432 }
bcecd9bd 3433
403d1944
MP		 3434 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3435 return err;
19039bd0
TI		 3436 if (spec->multiout.num_dacs == 0)
3437 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3438 return err;
c7d4b2fa 3439
0fb87bb4
ML		 3440 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3441
3442 if (err < 0)
3443 return err;
3444
1cd2224c
MR		 3445 /* setup analog beep controls */
3446 if (spec->anabeep_nid > 0) {
3447 err = stac92xx_auto_create_beep_ctls(codec,
3448 spec->anabeep_nid);
3449 if (err < 0)
3450 return err;
3451 }
3452
3453 /* setup digital beep controls and input device */
3454#ifdef CONFIG_SND_HDA_INPUT_BEEP
3455 if (spec->digbeep_nid > 0) {
3456 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3457 unsigned int caps;
1cd2224c
MR		 3458
3459 err = stac92xx_auto_create_beep_ctls(codec, nid);
3460 if (err < 0)
3461 return err;
3462 err = snd_hda_attach_beep_device(codec, nid);
3463 if (err < 0)
3464 return err;
4d4e9bb3
TI		 3465 /* if no beep switch is available, make its own one */
3466 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3467 if (codec->beep &&
3468 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3469 err = stac92xx_beep_switch_ctl(codec);
3470 if (err < 0)
3471 return err;
3472 }
1cd2224c
MR		 3473 }
3474#endif
3475
bcecd9bd
JZ		 3476 if (hp_speaker_swap == 1) {
3477 /* Restore the hp_outs and line_outs */
3478 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3479 sizeof(spec->autocfg.line_out_pins));
3480 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3481 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3482 sizeof(spec->autocfg.speaker_pins));
3483 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3484 memset(spec->autocfg.speaker_pins, 0,
3485 sizeof(spec->autocfg.speaker_pins));
3486 spec->autocfg.speaker_outs = 0;
3487 }
3488
0fb87bb4
ML		 3489 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3490
3491 if (err < 0)
3492 return err;
3493
3494 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3495
3496 if (err < 0)
c7d4b2fa
M		 3497 return err;
3498
b22b4821
MR		 3499 if (spec->mono_nid > 0) {
3500 err = stac92xx_auto_create_mono_output_ctls(codec);
3501 if (err < 0)
3502 return err;
3503 }
2a9c7816 3504 if (spec->num_amps > 0) {
89385035
MR		 3505 err = stac92xx_auto_create_amp_output_ctls(codec);
3506 if (err < 0)
3507 return err;
3508 }
2a9c7816 3509 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3510 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3511 &spec->autocfg)) < 0)
3512 return err;
4682eee0
MR		 3513 if (spec->num_muxes > 0) {
3514 err = stac92xx_auto_create_mux_input_ctls(codec);
3515 if (err < 0)
3516 return err;
3517 }
d9737751
MR		 3518 if (spec->num_smuxes > 0) {
3519 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3520 if (err < 0)
3521 return err;
3522 }
8b65727b 3523
c7d4b2fa 3524 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3525 if (spec->multiout.max_channels > 2)
c7d4b2fa 3526 spec->surr_switch = 1;
c7d4b2fa 3527
82bc955f 3528 if (spec->autocfg.dig_out_pin)
3cc08dc6 3529 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3530 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3531 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 3532
3533 if (spec->kctl_alloc)
3534 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3535
3536 spec->input_mux = &spec->private_imux;
2a9c7816 3537 spec->dinput_mux = &spec->private_dimux;
d9737751 3538 spec->sinput_mux = &spec->private_smux;
b22b4821 3539 spec->mono_mux = &spec->private_mono_mux;
89385035 3540 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3541 return 1;
3542}
3543
82bc955f
TI		 3544/* add playback controls for HP output */
3545static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3546 struct auto_pin_cfg *cfg)
3547{
3548 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3549 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3550 unsigned int wid_caps;
3551
3552 if (! pin)
3553 return 0;
3554
3555 wid_caps = get_wcaps(codec, pin);
505cb341 3556 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3557 spec->hp_detect = 1;
82bc955f
TI		 3558
3559 return 0;
3560}
3561
160ea0dc
RF		 3562/* add playback controls for LFE output */
3563static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3564 struct auto_pin_cfg *cfg)
3565{
3566 struct sigmatel_spec *spec = codec->spec;
3567 int err;
3568 hda_nid_t lfe_pin = 0x0;
3569 int i;
3570
3571 /*
3572 * search speaker outs and line outs for a mono speaker pin
3573 * with an amp. If one is found, add LFE controls
3574 * for it.
3575 */
3576 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3577 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3578 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3579 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3580 if (wcaps == AC_WCAP_OUT_AMP)
3581 /* found a mono speaker with an amp, must be lfe */
3582 lfe_pin = pin;
3583 }
3584
3585 /* if speaker_outs is 0, then speakers may be in line_outs */
3586 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3587 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3588 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3589 unsigned int defcfg;
8b551785 3590 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3591 AC_VERB_GET_CONFIG_DEFAULT,
3592 0x00);
8b551785 3593 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3594 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3595 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3596 if (wcaps == AC_WCAP_OUT_AMP)
3597 /* found a mono speaker with an amp,
3598 must be lfe */
3599 lfe_pin = pin;
3600 }
3601 }
3602 }
3603
3604 if (lfe_pin) {
eb06ed8f 3605 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3606 if (err < 0)
3607 return err;
3608 }
3609
3610 return 0;
3611}
3612
c7d4b2fa
M		 3613static int stac9200_parse_auto_config(struct hda_codec *codec)
3614{
3615 struct sigmatel_spec *spec = codec->spec;
3616 int err;
3617
df694daa 3618 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3619 return err;
3620
3621 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3622 return err;
3623
82bc955f
TI		 3624 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3625 return err;
3626
160ea0dc
RF		 3627 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3628 return err;
3629
355a0ec4
TI		 3630 if (spec->num_muxes > 0) {
3631 err = stac92xx_auto_create_mux_input_ctls(codec);
3632 if (err < 0)
3633 return err;
3634 }
3635
82bc955f 3636 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3637 spec->multiout.dig_out_nid = 0x05;
82bc955f 3638 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3639 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 3640
3641 if (spec->kctl_alloc)
3642 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3643
3644 spec->input_mux = &spec->private_imux;
8b65727b 3645 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3646
3647 return 1;
3648}
3649
62fe78e9
SR		 3650/*
3651 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3652 * funky external mute control using GPIO pins.
3653 */
3654
76e1ddfb 3655static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3656 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3657{
3658 unsigned int gpiostate, gpiomask, gpiodir;
3659
3660 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3661 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3662 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3663
3664 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3665 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3666 gpiomask |= mask;
62fe78e9
SR		 3667
3668 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3669 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3670 gpiodir |= dir_mask;
62fe78e9 3671
76e1ddfb 3672 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3673 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3674
3675 snd_hda_codec_write(codec, codec->afg, 0,
3676 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3677 snd_hda_codec_read(codec, codec->afg, 0,
3678 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3679
3680 msleep(1);
3681
76e1ddfb
TI		 3682 snd_hda_codec_read(codec, codec->afg, 0,
3683 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3684}
3685
314634bc
TI		 3686static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3687 unsigned int event)
3688{
3689 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3690 snd_hda_codec_write_cache(codec, nid, 0,
3691 AC_VERB_SET_UNSOLICITED_ENABLE,
3692 (AC_USRSP_EN | event));
314634bc
TI		 3693}
3694
a64135a2
MR		 3695static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3696{
3697 int i;
3698 for (i = 0; i < cfg->hp_outs; i++)
3699 if (cfg->hp_pins[i] == nid)
3700 return 1; /* nid is a HP-Out */
3701
3702 return 0; /* nid is not a HP-Out */
3703};
3704
b76c850f
MR		 3705static void stac92xx_power_down(struct hda_codec *codec)
3706{
3707 struct sigmatel_spec *spec = codec->spec;
3708
3709 /* power down inactive DACs */
3710 hda_nid_t *dac;
3711 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3712 if (!is_in_dac_nids(spec, *dac) &&
3713 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3714 snd_hda_codec_write_cache(codec, *dac, 0,
3715 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3716}
3717
f73d3585
TI		 3718static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3719 int enable);
3720
c7d4b2fa
M		 3721static int stac92xx_init(struct hda_codec *codec)
3722{
3723 struct sigmatel_spec *spec = codec->spec;
82bc955f 3724 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3725 unsigned int gpio;
82bc955f 3726 int i;
c7d4b2fa 3727
c7d4b2fa
M		 3728 snd_hda_sequence_write(codec, spec->init);
3729
8daaaa97
MR		 3730 /* power down adcs initially */
3731 if (spec->powerdown_adcs)
3732 for (i = 0; i < spec->num_adcs; i++)
3733 snd_hda_codec_write_cache(codec,
3734 spec->adc_nids[i], 0,
3735 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI		 3736
3737 /* set up GPIO */
3738 gpio = spec->gpio_data;
3739 /* turn on EAPD statically when spec->eapd_switch isn't set.
3740 * otherwise, unsol event will turn it on/off dynamically
3741 */
3742 if (!spec->eapd_switch)
3743 gpio |= spec->eapd_mask;
3744 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3745
82bc955f
TI		 3746 /* set up pins */
3747 if (spec->hp_detect) {
505cb341 3748 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3749 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3750 enable_pin_detect(codec, cfg->hp_pins[i],
3751 STAC_HP_EVENT);
0a07acaf
TI		 3752 /* force to enable the first line-out; the others are set up
3753 * in unsol_event
3754 */
3755 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3756 AC_PINCTL_OUT_EN);
eb995a8c 3757 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3758 /* fake event to set up pins */
3759 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3760 } else {
3761 stac92xx_auto_init_multi_out(codec);
3762 stac92xx_auto_init_hp_out(codec);
3763 }
3764 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3765 hda_nid_t nid = cfg->input_pins[i];
3766 if (nid) {
4f1e6bc3
TI		 3767 unsigned int pinctl;
3768 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3769 /* for mic pins, force to initialize */
3770 pinctl = stac92xx_get_vref(codec, nid);
3771 } else {
3772 pinctl = snd_hda_codec_read(codec, nid, 0,
3773 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3774 /* if PINCTL already set then skip */
3775 if (pinctl & AC_PINCTL_IN_EN)
3776 continue;
3777 }
3778 pinctl |= AC_PINCTL_IN_EN;
c960a03b
TI		 3779 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3780 }
82bc955f 3781 }
a64135a2
MR		 3782 for (i = 0; i < spec->num_dmics; i++)
3783 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3784 AC_PINCTL_IN_EN);
f73d3585
TI		 3785 if (cfg->dig_out_pin)
3786 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3787 AC_PINCTL_OUT_EN);
3788 if (cfg->dig_in_pin)
3789 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3790 AC_PINCTL_IN_EN);
a64135a2 3791 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 3792 hda_nid_t nid = spec->pwr_nids[i];
3793 int pinctl, def_conf;
3794 int event = STAC_PWR_EVENT;
3795
3796 if (is_nid_hp_pin(cfg, nid) && spec->hp_detect)
3797 continue; /* already has an unsol event */
3798
3799 pinctl = snd_hda_codec_read(codec, nid, 0,
3800 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 3801 /* outputs are only ports capable of power management
3802 * any attempts on powering down a input port cause the
3803 * referenced VREF to act quirky.
3804 */
3805 if (pinctl & AC_PINCTL_IN_EN)
3806 continue;
f73d3585
TI		 3807 def_conf = snd_hda_codec_read(codec, nid, 0,
3808 AC_VERB_GET_CONFIG_DEFAULT, 0);
3809 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 3810 /* skip any ports that don't have jacks since presence
3811 * detection is useless */
f73d3585
TI		 3812 if (def_conf != AC_JACK_PORT_COMPLEX) {
3813 if (def_conf != AC_JACK_PORT_NONE)
3814 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 3815 continue;
f73d3585 3816 }
a64135a2
MR		 3817 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3818 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3819 }
b76c850f
MR		 3820 if (spec->dac_list)
3821 stac92xx_power_down(codec);
c7d4b2fa
M		 3822 return 0;
3823}
3824
2f2f4251
M		 3825static void stac92xx_free(struct hda_codec *codec)
3826{
c7d4b2fa
M		 3827 struct sigmatel_spec *spec = codec->spec;
3828 int i;
3829
3830 if (! spec)
3831 return;
3832
3833 if (spec->kctl_alloc) {
3834 for (i = 0; i < spec->num_kctl_used; i++)
3835 kfree(spec->kctl_alloc[i].name);
3836 kfree(spec->kctl_alloc);
3837 }
3838
11b44bbd
RF		 3839 if (spec->bios_pin_configs)
3840 kfree(spec->bios_pin_configs);
3841
c7d4b2fa 3842 kfree(spec);
1cd2224c 3843 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3844}
3845
4e55096e
M		 3846static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3847 unsigned int flag)
3848{
3849 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3850 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3851
f9acba43
TI		 3852 if (pin_ctl & AC_PINCTL_IN_EN) {
3853 /*
3854 * we need to check the current set-up direction of
3855 * shared input pins since they can be switched via
3856 * "xxx as Output" mixer switch
3857 */
3858 struct sigmatel_spec *spec = codec->spec;
3859 struct auto_pin_cfg *cfg = &spec->autocfg;
3860 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3861 spec->line_switch) ||
3862 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3863 spec->mic_switch))
3864 return;
3865 }
3866
7b043899
SL		 3867 /* if setting pin direction bits, clear the current
3868 direction bits first */
3869 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3870 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3871
82beb8fd 3872 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3873 AC_VERB_SET_PIN_WIDGET_CONTROL,
3874 pin_ctl | flag);
3875}
3876
3877static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3878 unsigned int flag)
3879{
3880 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3881 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3882 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3883 AC_VERB_SET_PIN_WIDGET_CONTROL,
3884 pin_ctl & ~flag);
3885}
3886
40c1d308 3887static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3888{
3889 if (!nid)
3890 return 0;
3891 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3892 & (1 << 31)) {
3893 unsigned int pinctl;
3894 pinctl = snd_hda_codec_read(codec, nid, 0,
3895 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3896 if (pinctl & AC_PINCTL_IN_EN)
3897 return 0; /* mic- or line-input */
3898 else
3899 return 1; /* HP-output */
3900 }
314634bc
TI		 3901 return 0;
3902}
3903
d7a89436
TI		 3904/* return non-zero if the hp-pin of the given array index isn't
3905 * a jack-detection target
3906 */
3907static int no_hp_sensing(struct sigmatel_spec *spec, int i)
3908{
3909 struct auto_pin_cfg *cfg = &spec->autocfg;
3910
3911 /* ignore sensing of shared line and mic jacks */
3912 if (spec->line_switch &&
3913 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_LINE])
3914 return 1;
3915 if (spec->mic_switch &&
3916 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_MIC])
3917 return 1;
3918 /* ignore if the pin is set as line-out */
3919 if (cfg->hp_pins[i] == spec->hp_switch)
3920 return 1;
3921 return 0;
3922}
3923
314634bc 3924static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3925{
3926 struct sigmatel_spec *spec = codec->spec;
3927 struct auto_pin_cfg *cfg = &spec->autocfg;
3928 int i, presence;
3929
eb06ed8f 3930 presence = 0;
4fe5195c
MR		 3931 if (spec->gpio_mute)
3932 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3933 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3934
eb06ed8f 3935 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3936 if (presence)
3937 break;
d7a89436
TI		 3938 if (no_hp_sensing(spec, i))
3939 continue;
4fe5195c 3940 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3941 }
4e55096e
M		 3942
3943 if (presence) {
d7a89436 3944 /* disable lineouts */
7c2ba97b 3945 if (spec->hp_switch)
d7a89436
TI		 3946 stac92xx_reset_pinctl(codec, spec->hp_switch,
3947 AC_PINCTL_OUT_EN);
4e55096e
M		 3948 for (i = 0; i < cfg->line_outs; i++)
3949 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3950 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3951 for (i = 0; i < cfg->speaker_outs; i++)
3952 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3953 AC_PINCTL_OUT_EN);
0253fdcd 3954 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 3955 stac_gpio_set(codec, spec->gpio_mask,
3956 spec->gpio_dir, spec->gpio_data &
3957 ~spec->eapd_mask);
4e55096e 3958 } else {
d7a89436 3959 /* enable lineouts */
7c2ba97b 3960 if (spec->hp_switch)
d7a89436
TI		 3961 stac92xx_set_pinctl(codec, spec->hp_switch,
3962 AC_PINCTL_OUT_EN);
4e55096e
M		 3963 for (i = 0; i < cfg->line_outs; i++)
3964 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3965 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3966 for (i = 0; i < cfg->speaker_outs; i++)
3967 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3968 AC_PINCTL_OUT_EN);
0253fdcd 3969 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 3970 stac_gpio_set(codec, spec->gpio_mask,
3971 spec->gpio_dir, spec->gpio_data |
3972 spec->eapd_mask);
4e55096e 3973 }
d7a89436
TI		 3974 /* toggle hp outs */
3975 for (i = 0; i < cfg->hp_outs; i++) {
3976 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
3977 if (no_hp_sensing(spec, i))
3978 continue;
3979 if (presence)
3980 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
3981 else
3982 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
3983 }
4e55096e
M		 3984}
3985
f73d3585
TI		 3986static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3987 int enable)
a64135a2
MR		 3988{
3989 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 3990 unsigned int idx, val;
3991
3992 for (idx = 0; idx < spec->num_pwrs; idx++) {
3993 if (spec->pwr_nids[idx] == nid)
3994 break;
3995 }
3996 if (idx >= spec->num_pwrs)
3997 return;
d0513fc6
MR		 3998
3999 /* several codecs have two power down bits */
4000 if (spec->pwr_mapping)
4001 idx = spec->pwr_mapping[idx];
4002 else
4003 idx = 1 << idx;
a64135a2 4004
f73d3585
TI		 4005 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4006 if (enable)
a64135a2
MR		 4007 val &= ~idx;
4008 else
4009 val |= idx;
4010
4011 /* power down unused output ports */
4012 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
f73d3585
TI		 4013}
4014
4015static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4016{
4017 stac_toggle_power_map(codec, nid, get_hp_pin_presence(codec, nid));
4018}
a64135a2 4019
314634bc
TI		 4020static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4021{
a64135a2
MR		 4022 struct sigmatel_spec *spec = codec->spec;
4023 int idx = res >> 26 & 0x0f;
4024
72474be6 4025 switch ((res >> 26) & 0x70) {
314634bc
TI		 4026 case STAC_HP_EVENT:
4027 stac92xx_hp_detect(codec, res);
a64135a2
MR		 4028 /* fallthru */
4029 case STAC_PWR_EVENT:
4030 if (spec->num_pwrs > 0)
4031 stac92xx_pin_sense(codec, idx);
72474be6
MR		 4032 break;
4033 case STAC_VREF_EVENT: {
4034 int data = snd_hda_codec_read(codec, codec->afg, 0,
4035 AC_VERB_GET_GPIO_DATA, 0);
4036 /* toggle VREF state based on GPIOx status */
4037 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
4038 !!(data & (1 << idx)));
4039 break;
4040 }
314634bc
TI		 4041 }
4042}
4043
cb53c626 4044#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4045static int stac92xx_resume(struct hda_codec *codec)
4046{
dc81bed1
TI		 4047 struct sigmatel_spec *spec = codec->spec;
4048
11b44bbd 4049 stac92xx_set_config_regs(codec);
dc81bed1 4050 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 4051 stac_gpio_set(codec, spec->gpio_mask,
4052 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 4053 snd_hda_codec_resume_amp(codec);
4054 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 4055 /* power down inactive DACs */
4056 if (spec->dac_list)
4057 stac92xx_power_down(codec);
dc81bed1
TI		 4058 /* invoke unsolicited event to reset the HP state */
4059 if (spec->hp_detect)
4060 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 4061 return 0;
4062}
4063#endif
4064
2f2f4251
M		 4065static struct hda_codec_ops stac92xx_patch_ops = {
4066 .build_controls = stac92xx_build_controls,
4067 .build_pcms = stac92xx_build_pcms,
4068 .init = stac92xx_init,
4069 .free = stac92xx_free,
4e55096e 4070 .unsol_event = stac92xx_unsol_event,
cb53c626 4071#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4072 .resume = stac92xx_resume,
4073#endif
2f2f4251
M		 4074};
4075
4076static int patch_stac9200(struct hda_codec *codec)
4077{
4078 struct sigmatel_spec *spec;
c7d4b2fa 4079 int err;
2f2f4251 4080
e560d8d8 4081 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4082 if (spec == NULL)
4083 return -ENOMEM;
4084
4085 codec->spec = spec;
a4eed138 4086 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4087 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4088 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4089 stac9200_models,
4090 stac9200_cfg_tbl);
11b44bbd
RF		 4091 if (spec->board_config < 0) {
4092 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4093 err = stac92xx_save_bios_config_regs(codec);
4094 if (err < 0) {
4095 stac92xx_free(codec);
4096 return err;
4097 }
4098 spec->pin_configs = spec->bios_pin_configs;
4099 } else {
403d1944
MP		 4100 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
4101 stac92xx_set_config_regs(codec);
4102 }
2f2f4251
M		 4103
4104 spec->multiout.max_channels = 2;
4105 spec->multiout.num_dacs = 1;
4106 spec->multiout.dac_nids = stac9200_dac_nids;
4107 spec->adc_nids = stac9200_adc_nids;
4108 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4109 spec->num_muxes = 1;
8b65727b 4110 spec->num_dmics = 0;
9e05b7a3 4111 spec->num_adcs = 1;
a64135a2 4112 spec->num_pwrs = 0;
c7d4b2fa 4113
bf277785
TD		 4114 if (spec->board_config == STAC_9200_GATEWAY ||
4115 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4116 spec->init = stac9200_eapd_init;
4117 else
4118 spec->init = stac9200_core_init;
2f2f4251 4119 spec->mixer = stac9200_mixer;
c7d4b2fa 4120
117f257d
TI		 4121 if (spec->board_config == STAC_9200_PANASONIC) {
4122 spec->gpio_mask = spec->gpio_dir = 0x09;
4123 spec->gpio_data = 0x00;
4124 }
4125
c7d4b2fa
M		 4126 err = stac9200_parse_auto_config(codec);
4127 if (err < 0) {
4128 stac92xx_free(codec);
4129 return err;
4130 }
2f2f4251
M		 4131
4132 codec->patch_ops = stac92xx_patch_ops;
4133
4134 return 0;
4135}
4136
8e21c34c
TD		 4137static int patch_stac925x(struct hda_codec *codec)
4138{
4139 struct sigmatel_spec *spec;
4140 int err;
4141
4142 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4143 if (spec == NULL)
4144 return -ENOMEM;
4145
4146 codec->spec = spec;
a4eed138 4147 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 4148 spec->pin_nids = stac925x_pin_nids;
4149 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
4150 stac925x_models,
4151 stac925x_cfg_tbl);
9e507abd 4152 again:
8e21c34c 4153 if (spec->board_config < 0) {
2c11f955
TD		 4154 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
4155 "using BIOS defaults\n");
8e21c34c
TD		 4156 err = stac92xx_save_bios_config_regs(codec);
4157 if (err < 0) {
4158 stac92xx_free(codec);
4159 return err;
4160 }
4161 spec->pin_configs = spec->bios_pin_configs;
4162 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
4163 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
4164 stac92xx_set_config_regs(codec);
4165 }
4166
4167 spec->multiout.max_channels = 2;
4168 spec->multiout.num_dacs = 1;
4169 spec->multiout.dac_nids = stac925x_dac_nids;
4170 spec->adc_nids = stac925x_adc_nids;
4171 spec->mux_nids = stac925x_mux_nids;
4172 spec->num_muxes = 1;
9e05b7a3 4173 spec->num_adcs = 1;
a64135a2 4174 spec->num_pwrs = 0;
2c11f955
TD		 4175 switch (codec->vendor_id) {
4176 case 0x83847632: /* STAC9202 */
4177 case 0x83847633: /* STAC9202D */
4178 case 0x83847636: /* STAC9251 */
4179 case 0x83847637: /* STAC9251D */
f6e9852a 4180 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4181 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4182 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4183 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4184 break;
4185 default:
4186 spec->num_dmics = 0;
4187 break;
4188 }
8e21c34c
TD		 4189
4190 spec->init = stac925x_core_init;
4191 spec->mixer = stac925x_mixer;
4192
4193 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4194 if (!err) {
4195 if (spec->board_config < 0) {
4196 printk(KERN_WARNING "hda_codec: No auto-config is "
4197 "available, default to model=ref\n");
4198 spec->board_config = STAC_925x_REF;
4199 goto again;
4200 }
4201 err = -EINVAL;
4202 }
8e21c34c
TD		 4203 if (err < 0) {
4204 stac92xx_free(codec);
4205 return err;
4206 }
4207
4208 codec->patch_ops = stac92xx_patch_ops;
4209
4210 return 0;
4211}
4212
e1f0d669
MR		 4213static struct hda_input_mux stac92hd73xx_dmux = {
4214 .num_items = 4,
4215 .items = {
4216 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4217 { "Digital Mic 1", 0x09 },
4218 { "Digital Mic 2", 0x0a },
2a9c7816 4219 { "CD", 0x08 },
e1f0d669
MR		 4220 }
4221};
4222
4223static int patch_stac92hd73xx(struct hda_codec *codec)
4224{
4225 struct sigmatel_spec *spec;
4226 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4227 int err = 0;
4228
4229 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4230 if (spec == NULL)
4231 return -ENOMEM;
4232
4233 codec->spec = spec;
e99d32b3 4234 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4235 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4236 spec->pin_nids = stac92hd73xx_pin_nids;
4237 spec->board_config = snd_hda_check_board_config(codec,
4238 STAC_92HD73XX_MODELS,
4239 stac92hd73xx_models,
4240 stac92hd73xx_cfg_tbl);
4241again:
4242 if (spec->board_config < 0) {
4243 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4244 " STAC92HD73XX, using BIOS defaults\n");
4245 err = stac92xx_save_bios_config_regs(codec);
4246 if (err < 0) {
4247 stac92xx_free(codec);
4248 return err;
4249 }
4250 spec->pin_configs = spec->bios_pin_configs;
4251 } else {
4252 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
4253 stac92xx_set_config_regs(codec);
4254 }
4255
4256 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4257 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4258
4259 if (spec->multiout.num_dacs < 0) {
4260 printk(KERN_WARNING "hda_codec: Could not determine "
4261 "number of channels defaulting to DAC count\n");
4262 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4263 }
4264
4265 switch (spec->multiout.num_dacs) {
4266 case 0x3: /* 6 Channel */
85f13b67 4267 spec->multiout.hp_nid = 0x17;
e1f0d669
MR		 4268 spec->mixer = stac92hd73xx_6ch_mixer;
4269 spec->init = stac92hd73xx_6ch_core_init;
4270 break;
4271 case 0x4: /* 8 Channel */
85f13b67 4272 spec->multiout.hp_nid = 0x18;
e1f0d669
MR		 4273 spec->mixer = stac92hd73xx_8ch_mixer;
4274 spec->init = stac92hd73xx_8ch_core_init;
4275 break;
4276 case 0x5: /* 10 Channel */
85f13b67 4277 spec->multiout.hp_nid = 0x19;
e1f0d669
MR		 4278 spec->mixer = stac92hd73xx_10ch_mixer;
4279 spec->init = stac92hd73xx_10ch_core_init;
4280 };
4281
4282 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4283 spec->aloopback_mask = 0x01;
4284 spec->aloopback_shift = 8;
4285
1cd2224c 4286 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4287 spec->mux_nids = stac92hd73xx_mux_nids;
4288 spec->adc_nids = stac92hd73xx_adc_nids;
4289 spec->dmic_nids = stac92hd73xx_dmic_nids;
4290 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4291 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4292 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4293 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4294
4295 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4296 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4297 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4298 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4299 sizeof(stac92hd73xx_dmux));
4300
a7662640 4301 switch (spec->board_config) {
6b3ab21e 4302 case STAC_DELL_EQ:
d654a660 4303 spec->init = dell_eq_core_init;
6b3ab21e 4304 /* fallthru */
661cd8fb
TI		 4305 case STAC_DELL_M6_AMIC:
4306 case STAC_DELL_M6_DMIC:
4307 case STAC_DELL_M6_BOTH:
2a9c7816 4308 spec->num_smuxes = 0;
2a9c7816
MR		 4309 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4310 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
0253fdcd 4311 spec->eapd_switch = 0;
2a9c7816 4312 spec->num_amps = 1;
8f55c1e5 4313 spec->multiout.hp_nid = 0; /* dual HPs */
6b3ab21e
MR		 4314
4315 if (!spec->init)
4316 spec->init = dell_m6_core_init;
661cd8fb
TI		 4317 switch (spec->board_config) {
4318 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR		 4319 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4320 spec->num_dmics = 0;
2a9c7816 4321 spec->private_dimux.num_items = 1;
a7662640 4322 break;
661cd8fb 4323 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR		 4324 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4325 spec->num_dmics = 1;
2a9c7816 4326 spec->private_dimux.num_items = 2;
a7662640 4327 break;
661cd8fb 4328 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR		 4329 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4330 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4331 spec->num_dmics = 1;
2a9c7816 4332 spec->private_dimux.num_items = 2;
a7662640
MR		 4333 break;
4334 }
4335 break;
4336 default:
4337 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4338 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
0253fdcd 4339 spec->eapd_switch = 1;
a7662640 4340 }
b2c4f4d7
MR		 4341 if (spec->board_config > STAC_92HD73XX_REF) {
4342 /* GPIO0 High = Enable EAPD */
4343 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4344 spec->gpio_data = 0x01;
4345 }
2a9c7816 4346 spec->dinput_mux = &spec->private_dimux;
a7662640 4347
a64135a2
MR		 4348 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4349 spec->pwr_nids = stac92hd73xx_pwr_nids;
4350
d9737751 4351 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4352
4353 if (!err) {
4354 if (spec->board_config < 0) {
4355 printk(KERN_WARNING "hda_codec: No auto-config is "
4356 "available, default to model=ref\n");
4357 spec->board_config = STAC_92HD73XX_REF;
4358 goto again;
4359 }
4360 err = -EINVAL;
4361 }
4362
4363 if (err < 0) {
4364 stac92xx_free(codec);
4365 return err;
4366 }
4367
9e43f0de
TI		 4368 if (spec->board_config == STAC_92HD73XX_NO_JD)
4369 spec->hp_detect = 0;
4370
e1f0d669
MR		 4371 codec->patch_ops = stac92xx_patch_ops;
4372
4373 return 0;
4374}
4375
d0513fc6
MR		 4376static struct hda_input_mux stac92hd83xxx_dmux = {
4377 .num_items = 3,
4378 .items = {
4379 { "Analog Inputs", 0x03 },
4380 { "Digital Mic 1", 0x04 },
4381 { "Digital Mic 2", 0x05 },
4382 }
4383};
4384
4385static int patch_stac92hd83xxx(struct hda_codec *codec)
4386{
4387 struct sigmatel_spec *spec;
4388 int err;
4389
4390 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4391 if (spec == NULL)
4392 return -ENOMEM;
4393
4394 codec->spec = spec;
0ffa9807 4395 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4396 spec->mono_nid = 0x19;
4397 spec->digbeep_nid = 0x21;
4398 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4399 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4400 spec->adc_nids = stac92hd83xxx_adc_nids;
4401 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4402 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4403 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4404 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4405
4406 spec->init = stac92hd83xxx_core_init;
4407 switch (codec->vendor_id) {
4408 case 0x111d7605:
4409 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4410 break;
4411 default:
4412 spec->num_pwrs--;
4413 spec->init++; /* switch to config #2 */
4414 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4415 }
4416
4417 spec->mixer = stac92hd83xxx_mixer;
4418 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4419 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4420 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4421 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4422 spec->dinput_mux = &stac92hd83xxx_dmux;
4423 spec->pin_nids = stac92hd83xxx_pin_nids;
4424 spec->board_config = snd_hda_check_board_config(codec,
4425 STAC_92HD83XXX_MODELS,
4426 stac92hd83xxx_models,
4427 stac92hd83xxx_cfg_tbl);
4428again:
4429 if (spec->board_config < 0) {
4430 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4431 " STAC92HD83XXX, using BIOS defaults\n");
4432 err = stac92xx_save_bios_config_regs(codec);
4433 if (err < 0) {
4434 stac92xx_free(codec);
4435 return err;
4436 }
4437 spec->pin_configs = spec->bios_pin_configs;
4438 } else {
4439 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
4440 stac92xx_set_config_regs(codec);
4441 }
4442
4443 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4444 if (!err) {
4445 if (spec->board_config < 0) {
4446 printk(KERN_WARNING "hda_codec: No auto-config is "
4447 "available, default to model=ref\n");
4448 spec->board_config = STAC_92HD83XXX_REF;
4449 goto again;
4450 }
4451 err = -EINVAL;
4452 }
4453
4454 if (err < 0) {
4455 stac92xx_free(codec);
4456 return err;
4457 }
4458
4459 codec->patch_ops = stac92xx_patch_ops;
4460
4461 return 0;
4462}
4463
8daaaa97
MR		 4464#ifdef SND_HDA_NEEDS_RESUME
4465static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4466{
4467 struct sigmatel_spec *spec = codec->spec;
4468 int i;
4469 snd_hda_codec_write_cache(codec, codec->afg, 0,
4470 AC_VERB_SET_POWER_STATE, pwr);
4471
4472 msleep(1);
4473 for (i = 0; i < spec->num_adcs; i++) {
4474 snd_hda_codec_write_cache(codec,
4475 spec->adc_nids[i], 0,
4476 AC_VERB_SET_POWER_STATE, pwr);
4477 }
4478};
4479
4480static int stac92hd71xx_resume(struct hda_codec *codec)
4481{
4482 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4483 return stac92xx_resume(codec);
4484}
4485
4486static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4487{
0253fdcd
MR		 4488 struct sigmatel_spec *spec = codec->spec;
4489
8daaaa97 4490 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
0253fdcd
MR		 4491 if (spec->eapd_mask)
4492 stac_gpio_set(codec, spec->gpio_mask,
4493 spec->gpio_dir, spec->gpio_data &
4494 ~spec->eapd_mask);
8daaaa97
MR		 4495 return 0;
4496};
4497
4498#endif
4499
4500static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4501 .build_controls = stac92xx_build_controls,
4502 .build_pcms = stac92xx_build_pcms,
4503 .init = stac92xx_init,
4504 .free = stac92xx_free,
4505 .unsol_event = stac92xx_unsol_event,
4506#ifdef SND_HDA_NEEDS_RESUME
4507 .resume = stac92hd71xx_resume,
4508 .suspend = stac92hd71xx_suspend,
4509#endif
4510};
d0513fc6 4511
4b33c767
MR		 4512static struct hda_input_mux stac92hd71bxx_dmux = {
4513 .num_items = 4,
4514 .items = {
4515 { "Analog Inputs", 0x00 },
4516 { "Mixer", 0x01 },
4517 { "Digital Mic 1", 0x02 },
4518 { "Digital Mic 2", 0x03 },
4519 }
4520};
4521
e035b841
MR		 4522static int patch_stac92hd71bxx(struct hda_codec *codec)
4523{
4524 struct sigmatel_spec *spec;
4525 int err = 0;
4526
4527 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4528 if (spec == NULL)
4529 return -ENOMEM;
4530
4531 codec->spec = spec;
8daaaa97 4532 codec->patch_ops = stac92xx_patch_ops;
e035b841 4533 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4534 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4535 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4536 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4537 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4538 spec->board_config = snd_hda_check_board_config(codec,
4539 STAC_92HD71BXX_MODELS,
4540 stac92hd71bxx_models,
4541 stac92hd71bxx_cfg_tbl);
4542again:
4543 if (spec->board_config < 0) {
4544 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4545 " STAC92HD71BXX, using BIOS defaults\n");
4546 err = stac92xx_save_bios_config_regs(codec);
4547 if (err < 0) {
4548 stac92xx_free(codec);
4549 return err;
4550 }
4551 spec->pin_configs = spec->bios_pin_configs;
4552 } else {
4553 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
4554 stac92xx_set_config_regs(codec);
4555 }
4556
41c3b648
TI		 4557 if (spec->board_config > STAC_92HD71BXX_REF) {
4558 /* GPIO0 = EAPD */
4559 spec->gpio_mask = 0x01;
4560 spec->gpio_dir = 0x01;
4561 spec->gpio_data = 0x01;
4562 }
4563
541eee87
MR		 4564 switch (codec->vendor_id) {
4565 case 0x111d76b6: /* 4 Port without Analog Mixer */
4566 case 0x111d76b7:
4567 case 0x111d76b4: /* 6 Port without Analog Mixer */
4568 case 0x111d76b5:
4569 spec->mixer = stac92hd71bxx_mixer;
4570 spec->init = stac92hd71bxx_core_init;
0ffa9807 4571 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4572 break;
aafc4412 4573 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4574 switch (spec->board_config) {
4575 case STAC_HP_M4:
72474be6 4576 /* Enable VREF power saving on GPIO1 detect */
c5d08bb5 4577 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4578 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4579 snd_hda_codec_write_cache(codec, codec->afg, 0,
4580 AC_VERB_SET_UNSOLICITED_ENABLE,
4581 (AC_USRSP_EN | STAC_VREF_EVENT | 0x01));
4582 spec->gpio_mask |= 0x02;
4583 break;
4584 }
8daaaa97
MR		 4585 if ((codec->revision_id & 0xf) == 0 ||
4586 (codec->revision_id & 0xf) == 1) {
4587#ifdef SND_HDA_NEEDS_RESUME
4588 codec->patch_ops = stac92hd71bxx_patch_ops;
4589#endif
4590 spec->stream_delay = 40; /* 40 milliseconds */
4591 }
4592
aafc4412
MR		 4593 /* no output amps */
4594 spec->num_pwrs = 0;
4595 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4596 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4597
4598 /* disable VSW */
4599 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
4600 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
4601 break;
4602 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4603 if ((codec->revision_id & 0xf) == 1) {
4604#ifdef SND_HDA_NEEDS_RESUME
4605 codec->patch_ops = stac92hd71bxx_patch_ops;
4606#endif
4607 spec->stream_delay = 40; /* 40 milliseconds */
4608 }
4609
aafc4412
MR		 4610 /* no output amps */
4611 spec->num_pwrs = 0;
4612 /* fallthru */
541eee87 4613 default:
4b33c767 4614 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4615 spec->mixer = stac92hd71bxx_analog_mixer;
4616 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4617 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4618 }
4619
4b33c767 4620 spec->aloopback_mask = 0x50;
541eee87
MR		 4621 spec->aloopback_shift = 0;
4622
8daaaa97 4623 spec->powerdown_adcs = 1;
1cd2224c 4624 spec->digbeep_nid = 0x26;
e035b841
MR		 4625 spec->mux_nids = stac92hd71bxx_mux_nids;
4626 spec->adc_nids = stac92hd71bxx_adc_nids;
4627 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4628 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4629 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4630 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4631
4632 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4633 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4634
6a14f585
MR		 4635 switch (spec->board_config) {
4636 case STAC_HP_M4:
6a14f585 4637 /* enable internal microphone */
b9aea715
MR		 4638 stac92xx_set_config_reg(codec, 0x0e, 0x01813040);
4639 stac92xx_auto_set_pinctl(codec, 0x0e,
4640 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4641 /* fallthru */
4642 case STAC_DELL_M4_2:
4643 spec->num_dmics = 0;
4644 spec->num_smuxes = 0;
4645 spec->num_dmuxes = 0;
4646 break;
4647 case STAC_DELL_M4_1:
4648 case STAC_DELL_M4_3:
4649 spec->num_dmics = 1;
4650 spec->num_smuxes = 0;
4651 spec->num_dmuxes = 0;
6a14f585
MR		 4652 break;
4653 default:
4654 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4655 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4656 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4657 };
4658
aea7bb0a 4659 spec->multiout.num_dacs = 1;
e035b841
MR		 4660 spec->multiout.hp_nid = 0x11;
4661 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4b33c767
MR		 4662 if (spec->dinput_mux)
4663 spec->private_dimux.num_items +=
4664 spec->num_dmics -
4665 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4666
4667 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4668 if (!err) {
4669 if (spec->board_config < 0) {
4670 printk(KERN_WARNING "hda_codec: No auto-config is "
4671 "available, default to model=ref\n");
4672 spec->board_config = STAC_92HD71BXX_REF;
4673 goto again;
4674 }
4675 err = -EINVAL;
4676 }
4677
4678 if (err < 0) {
4679 stac92xx_free(codec);
4680 return err;
4681 }
4682
e035b841
MR		 4683 return 0;
4684};
4685
2f2f4251
M		 4686static int patch_stac922x(struct hda_codec *codec)
4687{
4688 struct sigmatel_spec *spec;
c7d4b2fa 4689 int err;
2f2f4251 4690
e560d8d8 4691 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4692 if (spec == NULL)
4693 return -ENOMEM;
4694
4695 codec->spec = spec;
a4eed138 4696 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4697 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4698 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4699 stac922x_models,
4700 stac922x_cfg_tbl);
536319af 4701 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4702 spec->gpio_mask = spec->gpio_dir = 0x03;
4703 spec->gpio_data = 0x03;
3fc24d85
TI		 4704 /* Intel Macs have all same PCI SSID, so we need to check
4705 * codec SSID to distinguish the exact models
4706 */
6f0778d8 4707 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4708 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4709
4710 case 0x106b0800:
4711 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4712 break;
5d5d3bc3
IZ		 4713 case 0x106b0600:
4714 case 0x106b0700:
4715 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4716 break;
5d5d3bc3
IZ		 4717 case 0x106b0e00:
4718 case 0x106b0f00:
4719 case 0x106b1600:
4720 case 0x106b1700:
4721 case 0x106b0200:
4722 case 0x106b1e00:
4723 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4724 break;
5d5d3bc3
IZ		 4725 case 0x106b1a00:
4726 case 0x00000100:
4727 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4728 break;
5d5d3bc3
IZ		 4729 case 0x106b0a00:
4730 case 0x106b2200:
4731 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4732 break;
536319af
NB		 4733 default:
4734 spec->board_config = STAC_INTEL_MAC_V3;
4735 break;
3fc24d85
TI		 4736 }
4737 }
4738
9e507abd 4739 again:
11b44bbd
RF		 4740 if (spec->board_config < 0) {
4741 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4742 "using BIOS defaults\n");
4743 err = stac92xx_save_bios_config_regs(codec);
4744 if (err < 0) {
4745 stac92xx_free(codec);
4746 return err;
4747 }
4748 spec->pin_configs = spec->bios_pin_configs;
4749 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4750 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4751 stac92xx_set_config_regs(codec);
4752 }
2f2f4251 4753
c7d4b2fa
M		 4754 spec->adc_nids = stac922x_adc_nids;
4755 spec->mux_nids = stac922x_mux_nids;
2549413e 4756 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4757 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4758 spec->num_dmics = 0;
a64135a2 4759 spec->num_pwrs = 0;
c7d4b2fa
M		 4760
4761 spec->init = stac922x_core_init;
2f2f4251 4762 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4763
4764 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4765
3cc08dc6 4766 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4767 if (!err) {
4768 if (spec->board_config < 0) {
4769 printk(KERN_WARNING "hda_codec: No auto-config is "
4770 "available, default to model=ref\n");
4771 spec->board_config = STAC_D945_REF;
4772 goto again;
4773 }
4774 err = -EINVAL;
4775 }
3cc08dc6
MP		 4776 if (err < 0) {
4777 stac92xx_free(codec);
4778 return err;
4779 }
4780
4781 codec->patch_ops = stac92xx_patch_ops;
4782
807a4636
TI		 4783 /* Fix Mux capture level; max to 2 */
4784 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4785 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4786 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4787 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4788 (0 << AC_AMPCAP_MUTE_SHIFT));
4789
3cc08dc6
MP		 4790 return 0;
4791}
4792
4793static int patch_stac927x(struct hda_codec *codec)
4794{
4795 struct sigmatel_spec *spec;
4796 int err;
4797
4798 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4799 if (spec == NULL)
4800 return -ENOMEM;
4801
4802 codec->spec = spec;
a4eed138 4803 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4804 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4805 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4806 stac927x_models,
4807 stac927x_cfg_tbl);
9e507abd 4808 again:
8e9068b1
MR		 4809 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4810 if (spec->board_config < 0)
4811 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4812 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4813 err = stac92xx_save_bios_config_regs(codec);
4814 if (err < 0) {
4815 stac92xx_free(codec);
4816 return err;
4817 }
4818 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4819 } else {
3cc08dc6
MP		 4820 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4821 stac92xx_set_config_regs(codec);
4822 }
4823
1cd2224c 4824 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4825 spec->adc_nids = stac927x_adc_nids;
4826 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4827 spec->mux_nids = stac927x_mux_nids;
4828 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4829 spec->smux_nids = stac927x_smux_nids;
4830 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 4831 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 4832 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4833 spec->multiout.dac_nids = spec->dac_nids;
4834
81d3dbde 4835 switch (spec->board_config) {
93ed1503 4836 case STAC_D965_3ST:
93ed1503 4837 case STAC_D965_5ST:
8e9068b1 4838 /* GPIO0 High = Enable EAPD */
0fc9dec4 4839 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4840 spec->gpio_data = 0x01;
8e9068b1
MR		 4841 spec->num_dmics = 0;
4842
93ed1503 4843 spec->init = d965_core_init;
9e05b7a3 4844 spec->mixer = stac927x_mixer;
81d3dbde 4845 break;
8e9068b1 4846 case STAC_DELL_BIOS:
780c8be4
MR		 4847 switch (codec->subsystem_id) {
4848 case 0x10280209:
4849 case 0x1028022e:
4850 /* correct the device field to SPDIF out */
4851 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4852 break;
4853 };
03d7ca17
MR		 4854 /* configure the analog microphone on some laptops */
4855 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4856 /* correct the front output jack as a hp out */
7989fba9 4857 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4858 /* correct the front input jack as a mic */
4859 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4860 /* fallthru */
8e9068b1
MR		 4861 case STAC_DELL_3ST:
4862 /* GPIO2 High = Enable EAPD */
0fc9dec4 4863 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4864 spec->gpio_data = 0x04;
7f16859a
MR		 4865 spec->dmic_nids = stac927x_dmic_nids;
4866 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4867
8e9068b1
MR		 4868 spec->init = d965_core_init;
4869 spec->mixer = stac927x_mixer;
4870 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4871 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4872 break;
4873 default:
b2c4f4d7
MR		 4874 if (spec->board_config > STAC_D965_REF) {
4875 /* GPIO0 High = Enable EAPD */
4876 spec->eapd_mask = spec->gpio_mask = 0x01;
4877 spec->gpio_dir = spec->gpio_data = 0x01;
4878 }
8e9068b1
MR		 4879 spec->num_dmics = 0;
4880
4881 spec->init = stac927x_core_init;
4882 spec->mixer = stac927x_mixer;
7f16859a
MR		 4883 }
4884
a64135a2 4885 spec->num_pwrs = 0;
e1f0d669
MR		 4886 spec->aloopback_mask = 0x40;
4887 spec->aloopback_shift = 0;
0253fdcd 4888 spec->eapd_switch = 1;
8e9068b1 4889
3cc08dc6 4890 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4891 if (!err) {
4892 if (spec->board_config < 0) {
4893 printk(KERN_WARNING "hda_codec: No auto-config is "
4894 "available, default to model=ref\n");
4895 spec->board_config = STAC_D965_REF;
4896 goto again;
4897 }
4898 err = -EINVAL;
4899 }
c7d4b2fa
M		 4900 if (err < 0) {
4901 stac92xx_free(codec);
4902 return err;
4903 }
2f2f4251
M		 4904
4905 codec->patch_ops = stac92xx_patch_ops;
4906
52987656
TI		 4907 /*
4908 * !!FIXME!!
4909 * The STAC927x seem to require fairly long delays for certain
4910 * command sequences. With too short delays (even if the answer
4911 * is set to RIRB properly), it results in the silence output
4912 * on some hardwares like Dell.
4913 *
4914 * The below flag enables the longer delay (see get_response
4915 * in hda_intel.c).
4916 */
4917 codec->bus->needs_damn_long_delay = 1;
4918
e28d8322
TI		 4919 /* no jack detecion for ref-no-jd model */
4920 if (spec->board_config == STAC_D965_REF_NO_JD)
4921 spec->hp_detect = 0;
4922
2f2f4251
M		 4923 return 0;
4924}
4925
f3302a59
MP		 4926static int patch_stac9205(struct hda_codec *codec)
4927{
4928 struct sigmatel_spec *spec;
8259980e 4929 int err;
f3302a59
MP		 4930
4931 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4932 if (spec == NULL)
4933 return -ENOMEM;
4934
4935 codec->spec = spec;
a4eed138 4936 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4937 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4938 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4939 stac9205_models,
4940 stac9205_cfg_tbl);
9e507abd 4941 again:
11b44bbd
RF		 4942 if (spec->board_config < 0) {
4943 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4944 err = stac92xx_save_bios_config_regs(codec);
4945 if (err < 0) {
4946 stac92xx_free(codec);
4947 return err;
4948 }
4949 spec->pin_configs = spec->bios_pin_configs;
4950 } else {
f3302a59
MP		 4951 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4952 stac92xx_set_config_regs(codec);
4953 }
4954
1cd2224c 4955 spec->digbeep_nid = 0x23;
f3302a59 4956 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4957 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4958 spec->mux_nids = stac9205_mux_nids;
2549413e 4959 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 4960 spec->smux_nids = stac9205_smux_nids;
4961 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 4962 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4963 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4964 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4965 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4966 spec->num_pwrs = 0;
f3302a59
MP		 4967
4968 spec->init = stac9205_core_init;
4969 spec->mixer = stac9205_mixer;
4970
e1f0d669
MR		 4971 spec->aloopback_mask = 0x40;
4972 spec->aloopback_shift = 0;
0253fdcd 4973 spec->eapd_switch = 1;
f3302a59 4974 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4975
ae0a8ed8 4976 switch (spec->board_config){
ae0a8ed8 4977 case STAC_9205_DELL_M43:
87d48363
MR		 4978 /* Enable SPDIF in/out */
4979 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4980 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4981
4fe5195c 4982 /* Enable unsol response for GPIO4/Dock HP connection */
c5d08bb5 4983 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 4984 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4985 snd_hda_codec_write_cache(codec, codec->afg, 0,
4986 AC_VERB_SET_UNSOLICITED_ENABLE,
4987 (AC_USRSP_EN | STAC_HP_EVENT));
4988
4989 spec->gpio_dir = 0x0b;
0fc9dec4 4990 spec->eapd_mask = 0x01;
4fe5195c
MR		 4991 spec->gpio_mask = 0x1b;
4992 spec->gpio_mute = 0x10;
e2e7d624 4993 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4994 * GPIO3 Low = DRM
87d48363 4995 */
4fe5195c 4996 spec->gpio_data = 0x01;
ae0a8ed8 4997 break;
b2c4f4d7
MR		 4998 case STAC_9205_REF:
4999 /* SPDIF-In enabled */
5000 break;
ae0a8ed8
TD		 5001 default:
5002 /* GPIO0 High = EAPD */
0fc9dec4 5003 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5004 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5005 break;
5006 }
33382403 5007
f3302a59 5008 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5009 if (!err) {
5010 if (spec->board_config < 0) {
5011 printk(KERN_WARNING "hda_codec: No auto-config is "
5012 "available, default to model=ref\n");
5013 spec->board_config = STAC_9205_REF;
5014 goto again;
5015 }
5016 err = -EINVAL;
5017 }
f3302a59
MP		 5018 if (err < 0) {
5019 stac92xx_free(codec);
5020 return err;
5021 }
5022
5023 codec->patch_ops = stac92xx_patch_ops;
5024
5025 return 0;
5026}
5027
db064e50 5028/*
6d859065 5029 * STAC9872 hack
db064e50
TI		 5030 */
5031
99ccc560 5032/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 5033static hda_nid_t vaio_dacs[] = { 0x2 };
5034#define VAIO_HP_DAC 0x5
5035static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5036static hda_nid_t vaio_mux_nids[] = { 0x15 };
5037
5038static struct hda_input_mux vaio_mux = {
a3a2f429 5039 .num_items = 3,
db064e50 5040 .items = {
d773781c 5041 /* { "HP", 0x0 }, */
1624cb9a
TI		 5042 { "Mic Jack", 0x1 },
5043 { "Internal Mic", 0x2 },
db064e50
TI		 5044 { "PCM", 0x3 },
5045 }
5046};
5047
5048static struct hda_verb vaio_init[] = {
5049 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5050 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 5051 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5052 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5053 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5054 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5055 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 5056 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5057 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5058 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5059 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5060 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5061 {}
5062};
5063
6d859065
GM		 5064static struct hda_verb vaio_ar_init[] = {
5065 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5066 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5067 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5068 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5069/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5070 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5071 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5072 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5073 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5074/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5075 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5076 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5077 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5078 {}
5079};
5080
db064e50 5081/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 5082static struct hda_bind_ctls vaio_bind_master_vol = {
5083 .ops = &snd_hda_bind_vol,
5084 .values = {
5085 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
5086 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
5087 0
5088 },
5089};
db064e50
TI		 5090
5091/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 5092static struct hda_bind_ctls vaio_bind_master_sw = {
5093 .ops = &snd_hda_bind_sw,
5094 .values = {
5095 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
5096 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
5097 0,
5098 },
5099};
db064e50
TI		 5100
5101static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 5102 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
5103 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 5104 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5105 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5106 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5107 {
5108 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5109 .name = "Capture Source",
5110 .count = 1,
5111 .info = stac92xx_mux_enum_info,
5112 .get = stac92xx_mux_enum_get,
5113 .put = stac92xx_mux_enum_put,
5114 },
5115 {}
5116};
5117
6d859065 5118static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 5119 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
5120 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 5121 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5122 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5123 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5124 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5125 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5126 {
5127 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5128 .name = "Capture Source",
5129 .count = 1,
5130 .info = stac92xx_mux_enum_info,
5131 .get = stac92xx_mux_enum_get,
5132 .put = stac92xx_mux_enum_put,
5133 },
5134 {}
5135};
5136
5137static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5138 .build_controls = stac92xx_build_controls,
5139 .build_pcms = stac92xx_build_pcms,
5140 .init = stac92xx_init,
5141 .free = stac92xx_free,
cb53c626 5142#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5143 .resume = stac92xx_resume,
5144#endif
5145};
5146
72e7b0dd
TI		 5147static int stac9872_vaio_init(struct hda_codec *codec)
5148{
5149 int err;
5150
5151 err = stac92xx_init(codec);
5152 if (err < 0)
5153 return err;
5154 if (codec->patch_ops.unsol_event)
5155 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5156 return 0;
5157}
5158
5159static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5160{
40c1d308 5161 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5162 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5163 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5164 } else {
5165 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5166 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5167 }
5168}
5169
5170static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5171{
5172 switch (res >> 26) {
5173 case STAC_HP_EVENT:
5174 stac9872_vaio_hp_detect(codec, res);
5175 break;
5176 }
5177}
5178
5179static struct hda_codec_ops stac9872_vaio_patch_ops = {
5180 .build_controls = stac92xx_build_controls,
5181 .build_pcms = stac92xx_build_pcms,
5182 .init = stac9872_vaio_init,
5183 .free = stac92xx_free,
5184 .unsol_event = stac9872_vaio_unsol_event,
5185#ifdef CONFIG_PM
5186 .resume = stac92xx_resume,
5187#endif
5188};
5189
6d859065
GM		 5190enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5191 CXD9872RD_VAIO,
5192 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5193 STAC9872AK_VAIO,
5194 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5195 STAC9872K_VAIO,
5196 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5197 CXD9872AKD_VAIO,
5198 STAC_9872_MODELS,
5199};
5200
5201static const char *stac9872_models[STAC_9872_MODELS] = {
5202 [CXD9872RD_VAIO] = "vaio",
5203 [CXD9872AKD_VAIO] = "vaio-ar",
5204};
5205
5206static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5207 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5208 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5209 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5210 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5211 {}
5212};
5213
6d859065 5214static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5215{
5216 struct sigmatel_spec *spec;
5217 int board_config;
5218
f5fcc13c
TI		 5219 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5220 stac9872_models,
5221 stac9872_cfg_tbl);
db064e50
TI		 5222 if (board_config < 0)
5223 /* unknown config, let generic-parser do its job... */
5224 return snd_hda_parse_generic_codec(codec);
5225
5226 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5227 if (spec == NULL)
5228 return -ENOMEM;
5229
5230 codec->spec = spec;
5231 switch (board_config) {
6d859065
GM		 5232 case CXD9872RD_VAIO:
5233 case STAC9872AK_VAIO:
5234 case STAC9872K_VAIO:
db064e50
TI		 5235 spec->mixer = vaio_mixer;
5236 spec->init = vaio_init;
5237 spec->multiout.max_channels = 2;
5238 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5239 spec->multiout.dac_nids = vaio_dacs;
5240 spec->multiout.hp_nid = VAIO_HP_DAC;
5241 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5242 spec->adc_nids = vaio_adcs;
a64135a2 5243 spec->num_pwrs = 0;
db064e50
TI		 5244 spec->input_mux = &vaio_mux;
5245 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5246 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5247 break;
6d859065
GM		 5248
5249 case CXD9872AKD_VAIO:
5250 spec->mixer = vaio_ar_mixer;
5251 spec->init = vaio_ar_init;
5252 spec->multiout.max_channels = 2;
5253 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5254 spec->multiout.dac_nids = vaio_dacs;
5255 spec->multiout.hp_nid = VAIO_HP_DAC;
5256 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5257 spec->num_pwrs = 0;
6d859065
GM		 5258 spec->adc_nids = vaio_adcs;
5259 spec->input_mux = &vaio_mux;
5260 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5261 codec->patch_ops = stac9872_patch_ops;
6d859065 5262 break;
db064e50
TI		 5263 }
5264
db064e50
TI		 5265 return 0;
5266}
5267
5268
2f2f4251
M		 5269/*
5270 * patch entries
5271 */
5272struct hda_codec_preset snd_hda_preset_sigmatel[] = {
5273 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5274 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5275 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5276 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5277 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5278 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5279 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5280 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5281 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5282 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5283 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5284 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5285 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5286 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5287 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5288 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5289 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5290 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5291 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5292 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5293 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5294 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5295 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5296 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5297 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5298 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5299 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5300 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5301 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5302 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5303 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5304 /* The following does not take into account .id=0x83847661 when subsys =
5305 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5306 * currently not fully supported.
5307 */
5308 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5309 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5310 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5311 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5312 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5313 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5314 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5315 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5316 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5317 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5318 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5319 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5320 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5321 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5322 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5323 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5324 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5325 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5326 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5327 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5328 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5329 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5330 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5331 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5332 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5333 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5334 {} /* terminator */
5335};
Clone of davem's net-next-2.6 tree