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ALSA: hda - fix build warning when CONFIG_PROC_FS=n
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
3c9a3203 36#include "hda_patch.h"
1cd2224c 37#include "hda_beep.h"
2f2f4251 38
c39555d6 39#define STAC_VREF_EVENT 0x00
74aeaabc 40#define STAC_INSERT_EVENT 0x10
a64135a2
MR		 41#define STAC_PWR_EVENT 0x20
42#define STAC_HP_EVENT 0x30
4e55096e 43
f5fcc13c
TI		 44enum {
45 STAC_REF,
bf277785 46 STAC_9200_OQO,
dfe495d0
TI		 47 STAC_9200_DELL_D21,
48 STAC_9200_DELL_D22,
49 STAC_9200_DELL_D23,
50 STAC_9200_DELL_M21,
51 STAC_9200_DELL_M22,
52 STAC_9200_DELL_M23,
53 STAC_9200_DELL_M24,
54 STAC_9200_DELL_M25,
55 STAC_9200_DELL_M26,
56 STAC_9200_DELL_M27,
1194b5b7 57 STAC_9200_GATEWAY,
117f257d 58 STAC_9200_PANASONIC,
f5fcc13c
TI		 59 STAC_9200_MODELS
60};
61
62enum {
63 STAC_9205_REF,
dfe495d0 64 STAC_9205_DELL_M42,
ae0a8ed8
TD		 65 STAC_9205_DELL_M43,
66 STAC_9205_DELL_M44,
f5fcc13c
TI		 67 STAC_9205_MODELS
68};
69
e1f0d669
MR		 70enum {
71 STAC_92HD73XX_REF,
a7662640 72 STAC_DELL_M6,
6b3ab21e 73 STAC_DELL_EQ,
e1f0d669
MR		 74 STAC_92HD73XX_MODELS
75};
76
d0513fc6
MR		 77enum {
78 STAC_92HD83XXX_REF,
79 STAC_92HD83XXX_MODELS
80};
81
e035b841
MR		 82enum {
83 STAC_92HD71BXX_REF,
a7662640
MR		 84 STAC_DELL_M4_1,
85 STAC_DELL_M4_2,
3a7abfd2 86 STAC_DELL_M4_3,
6a14f585 87 STAC_HP_M4,
e035b841
MR		 88 STAC_92HD71BXX_MODELS
89};
90
8e21c34c
TD		 91enum {
92 STAC_925x_REF,
93 STAC_M2_2,
94 STAC_MA6,
2c11f955 95 STAC_PA6,
8e21c34c
TD		 96 STAC_925x_MODELS
97};
98
f5fcc13c
TI		 99enum {
100 STAC_D945_REF,
101 STAC_D945GTP3,
102 STAC_D945GTP5,
5d5d3bc3
IZ		 103 STAC_INTEL_MAC_V1,
104 STAC_INTEL_MAC_V2,
105 STAC_INTEL_MAC_V3,
106 STAC_INTEL_MAC_V4,
107 STAC_INTEL_MAC_V5,
536319af
NB		 108 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
109 * is given, one of the above models will be
110 * chosen according to the subsystem id. */
dfe495d0 111 /* for backward compatibility */
f5fcc13c 112 STAC_MACMINI,
3fc24d85 113 STAC_MACBOOK,
6f0778d8
NB		 114 STAC_MACBOOK_PRO_V1,
115 STAC_MACBOOK_PRO_V2,
f16928fb 116 STAC_IMAC_INTEL,
0dae0f83 117 STAC_IMAC_INTEL_20,
8c650087 118 STAC_ECS_202,
dfe495d0
TI		 119 STAC_922X_DELL_D81,
120 STAC_922X_DELL_D82,
121 STAC_922X_DELL_M81,
122 STAC_922X_DELL_M82,
f5fcc13c
TI		 123 STAC_922X_MODELS
124};
125
126enum {
127 STAC_D965_REF,
128 STAC_D965_3ST,
129 STAC_D965_5ST,
4ff076e5 130 STAC_DELL_3ST,
8e9068b1 131 STAC_DELL_BIOS,
f5fcc13c
TI		 132 STAC_927X_MODELS
133};
403d1944 134
74aeaabc
MR		 135struct sigmatel_event {
136 hda_nid_t nid;
137 int data;
138};
139
140struct sigmatel_jack {
141 hda_nid_t nid;
142 int type;
143 struct snd_jack *jack;
144};
145
2f2f4251 146struct sigmatel_spec {
c8b6bf9b 147 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 148 unsigned int num_mixers;
149
403d1944 150 int board_config;
c0cea0d0 151 unsigned int eapd_switch: 1;
c7d4b2fa 152 unsigned int surr_switch: 1;
403d1944
MP		 153 unsigned int line_switch: 1;
154 unsigned int mic_switch: 1;
3cc08dc6 155 unsigned int alt_switch: 1;
82bc955f 156 unsigned int hp_detect: 1;
00ef50c2 157 unsigned int spdif_mute: 1;
c7d4b2fa 158
4fe5195c 159 /* gpio lines */
0fc9dec4 160 unsigned int eapd_mask;
4fe5195c
MR		 161 unsigned int gpio_mask;
162 unsigned int gpio_dir;
163 unsigned int gpio_data;
164 unsigned int gpio_mute;
165
8daaaa97
MR		 166 /* stream */
167 unsigned int stream_delay;
168
4fe5195c 169 /* analog loopback */
e1f0d669
MR		 170 unsigned char aloopback_mask;
171 unsigned char aloopback_shift;
8259980e 172
a64135a2
MR		 173 /* power management */
174 unsigned int num_pwrs;
d0513fc6 175 unsigned int *pwr_mapping;
a64135a2 176 hda_nid_t *pwr_nids;
b76c850f 177 hda_nid_t *dac_list;
a64135a2 178
74aeaabc
MR		 179 /* jack detection */
180 struct snd_array jacks;
181
182 /* events */
183 struct snd_array events;
184
2f2f4251 185 /* playback */
b22b4821 186 struct hda_input_mux *mono_mux;
89385035 187 struct hda_input_mux *amp_mux;
b22b4821 188 unsigned int cur_mmux;
2f2f4251 189 struct hda_multi_out multiout;
3cc08dc6 190 hda_nid_t dac_nids[5];
2f2f4251
M		 191
192 /* capture */
193 hda_nid_t *adc_nids;
2f2f4251 194 unsigned int num_adcs;
dabbed6f
M		 195 hda_nid_t *mux_nids;
196 unsigned int num_muxes;
8b65727b
MP		 197 hda_nid_t *dmic_nids;
198 unsigned int num_dmics;
e1f0d669 199 hda_nid_t *dmux_nids;
1697055e 200 unsigned int num_dmuxes;
d9737751
MR		 201 hda_nid_t *smux_nids;
202 unsigned int num_smuxes;
65973632 203 const char **spdif_labels;
d9737751 204
dabbed6f 205 hda_nid_t dig_in_nid;
b22b4821 206 hda_nid_t mono_nid;
1cd2224c
MR		 207 hda_nid_t anabeep_nid;
208 hda_nid_t digbeep_nid;
2f2f4251 209
2f2f4251
M		 210 /* pin widgets */
211 hda_nid_t *pin_nids;
212 unsigned int num_pins;
2f2f4251 213 unsigned int *pin_configs;
2f2f4251
M		 214
215 /* codec specific stuff */
216 struct hda_verb *init;
c8b6bf9b 217 struct snd_kcontrol_new *mixer;
2f2f4251
M		 218
219 /* capture source */
8b65727b 220 struct hda_input_mux *dinput_mux;
e1f0d669 221 unsigned int cur_dmux[2];
c7d4b2fa 222 struct hda_input_mux *input_mux;
3cc08dc6 223 unsigned int cur_mux[3];
d9737751
MR		 224 struct hda_input_mux *sinput_mux;
225 unsigned int cur_smux[2];
2a9c7816
MR		 226 unsigned int cur_amux;
227 hda_nid_t *amp_nids;
228 unsigned int num_amps;
8daaaa97 229 unsigned int powerdown_adcs;
2f2f4251 230
403d1944
MP		 231 /* i/o switches */
232 unsigned int io_switch[2];
0fb87bb4 233 unsigned int clfe_swap;
d7a89436 234 unsigned int hp_switch; /* NID of HP as line-out */
5f10c4a9 235 unsigned int aloopback;
2f2f4251 236
c7d4b2fa
M		 237 struct hda_pcm pcm_rec[2]; /* PCM information */
238
239 /* dynamic controls and input_mux */
240 struct auto_pin_cfg autocfg;
603c4019 241 struct snd_array kctls;
8b65727b 242 struct hda_input_mux private_dimux;
c7d4b2fa 243 struct hda_input_mux private_imux;
d9737751 244 struct hda_input_mux private_smux;
89385035 245 struct hda_input_mux private_amp_mux;
b22b4821 246 struct hda_input_mux private_mono_mux;
2f2f4251
M		 247};
248
249static hda_nid_t stac9200_adc_nids[1] = {
250 0x03,
251};
252
253static hda_nid_t stac9200_mux_nids[1] = {
254 0x0c,
255};
256
257static hda_nid_t stac9200_dac_nids[1] = {
258 0x02,
259};
260
a64135a2
MR		 261static hda_nid_t stac92hd73xx_pwr_nids[8] = {
262 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
263 0x0f, 0x10, 0x11
264};
265
0ffa9807
MR		 266static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
267 0x26, 0,
268};
269
e1f0d669
MR		 270static hda_nid_t stac92hd73xx_adc_nids[2] = {
271 0x1a, 0x1b
272};
273
2a9c7816
MR		 274#define DELL_M6_AMP 2
275static hda_nid_t stac92hd73xx_amp_nids[3] = {
276 0x0b, 0x0c, 0x0e
89385035
MR		 277};
278
e1f0d669
MR		 279#define STAC92HD73XX_NUM_DMICS 2
280static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
281 0x13, 0x14, 0
282};
283
284#define STAC92HD73_DAC_COUNT 5
285static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
286 0x15, 0x16, 0x17, 0x18, 0x19,
287};
288
289static hda_nid_t stac92hd73xx_mux_nids[4] = {
290 0x28, 0x29, 0x2a, 0x2b,
291};
292
293static hda_nid_t stac92hd73xx_dmux_nids[2] = {
294 0x20, 0x21,
295};
296
d9737751
MR		 297static hda_nid_t stac92hd73xx_smux_nids[2] = {
298 0x22, 0x23,
299};
300
d0513fc6
MR		 301#define STAC92HD83XXX_NUM_DMICS 2
302static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
303 0x11, 0x12, 0
304};
305
306#define STAC92HD81_DAC_COUNT 2
307#define STAC92HD83_DAC_COUNT 3
308static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
309 0x13, 0x14, 0x22,
310};
311
312static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
313 0x17, 0x18,
314};
315
316static hda_nid_t stac92hd83xxx_adc_nids[2] = {
317 0x15, 0x16,
318};
319
320static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
321 0xa, 0xb, 0xd, 0xe,
322};
323
0ffa9807
MR		 324static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
325 0x1e, 0,
326};
327
d0513fc6
MR		 328static unsigned int stac92hd83xxx_pwr_mapping[4] = {
329 0x03, 0x0c, 0x10, 0x40,
330};
331
a64135a2
MR		 332static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
333 0x0a, 0x0d, 0x0f
334};
335
e035b841
MR		 336static hda_nid_t stac92hd71bxx_adc_nids[2] = {
337 0x12, 0x13,
338};
339
340static hda_nid_t stac92hd71bxx_mux_nids[2] = {
341 0x1a, 0x1b
342};
343
4b33c767
MR		 344static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
345 0x1c, 0x1d,
e1f0d669
MR		 346};
347
d9737751
MR		 348static hda_nid_t stac92hd71bxx_smux_nids[2] = {
349 0x24, 0x25,
350};
351
aea7bb0a 352static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 353 0x10, /*0x11, */
354};
355
356#define STAC92HD71BXX_NUM_DMICS 2
357static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
358 0x18, 0x19, 0
359};
360
0ffa9807
MR		 361static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
362 0x22, 0
363};
364
8e21c34c
TD		 365static hda_nid_t stac925x_adc_nids[1] = {
366 0x03,
367};
368
369static hda_nid_t stac925x_mux_nids[1] = {
370 0x0f,
371};
372
373static hda_nid_t stac925x_dac_nids[1] = {
374 0x02,
375};
376
f6e9852a
TI		 377#define STAC925X_NUM_DMICS 1
378static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
379 0x15, 0
2c11f955
TD		 380};
381
1697055e
TI		 382static hda_nid_t stac925x_dmux_nids[1] = {
383 0x14,
384};
385
2f2f4251
M		 386static hda_nid_t stac922x_adc_nids[2] = {
387 0x06, 0x07,
388};
389
390static hda_nid_t stac922x_mux_nids[2] = {
391 0x12, 0x13,
392};
393
3cc08dc6
MP		 394static hda_nid_t stac927x_adc_nids[3] = {
395 0x07, 0x08, 0x09
396};
397
398static hda_nid_t stac927x_mux_nids[3] = {
399 0x15, 0x16, 0x17
400};
401
d9737751
MR		 402static hda_nid_t stac927x_smux_nids[1] = {
403 0x21,
404};
405
b76c850f
MR		 406static hda_nid_t stac927x_dac_nids[6] = {
407 0x02, 0x03, 0x04, 0x05, 0x06, 0
408};
409
e1f0d669
MR		 410static hda_nid_t stac927x_dmux_nids[1] = {
411 0x1b,
412};
413
7f16859a
MR		 414#define STAC927X_NUM_DMICS 2
415static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
416 0x13, 0x14, 0
417};
418
65973632
MR		 419static const char *stac927x_spdif_labels[5] = {
420 "Digital Playback", "ADAT", "Analog Mux 1",
421 "Analog Mux 2", "Analog Mux 3"
422};
423
f3302a59
MP		 424static hda_nid_t stac9205_adc_nids[2] = {
425 0x12, 0x13
426};
427
428static hda_nid_t stac9205_mux_nids[2] = {
429 0x19, 0x1a
430};
431
e1f0d669 432static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 433 0x1d,
e1f0d669
MR		 434};
435
d9737751
MR		 436static hda_nid_t stac9205_smux_nids[1] = {
437 0x21,
438};
439
f6e9852a
TI		 440#define STAC9205_NUM_DMICS 2
441static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
442 0x17, 0x18, 0
8b65727b
MP		 443};
444
c7d4b2fa 445static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 446 0x08, 0x09, 0x0d, 0x0e,
447 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 448};
449
8e21c34c
TD		 450static hda_nid_t stac925x_pin_nids[8] = {
451 0x07, 0x08, 0x0a, 0x0b,
452 0x0c, 0x0d, 0x10, 0x11,
453};
454
2f2f4251
M		 455static hda_nid_t stac922x_pin_nids[10] = {
456 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
457 0x0f, 0x10, 0x11, 0x15, 0x1b,
458};
459
a7662640 460static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 461 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
462 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 463 0x14, 0x22, 0x23
e1f0d669
MR		 464};
465
d0513fc6
MR		 466static hda_nid_t stac92hd83xxx_pin_nids[14] = {
467 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
468 0x0f, 0x10, 0x11, 0x12, 0x13,
469 0x1d, 0x1e, 0x1f, 0x20
470};
0ffa9807 471static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 472 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
473 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 474 0x1f,
e035b841
MR		 475};
476
3cc08dc6
MP		 477static hda_nid_t stac927x_pin_nids[14] = {
478 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
479 0x0f, 0x10, 0x11, 0x12, 0x13,
480 0x14, 0x21, 0x22, 0x23,
481};
482
f3302a59
MP		 483static hda_nid_t stac9205_pin_nids[12] = {
484 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
485 0x0f, 0x14, 0x16, 0x17, 0x18,
486 0x21, 0x22,
f3302a59
MP		 487};
488
89385035
MR		 489#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
490
491static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
492 struct snd_ctl_elem_value *ucontrol)
493{
494 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
495 struct sigmatel_spec *spec = codec->spec;
496 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
497
498 kcontrol->private_value ^= get_amp_nid(kcontrol);
499 kcontrol->private_value |= nid;
500
501 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
502}
503
504static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
505 struct snd_ctl_elem_value *ucontrol)
506{
507 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
508 struct sigmatel_spec *spec = codec->spec;
509 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
510
511 kcontrol->private_value ^= get_amp_nid(kcontrol);
512 kcontrol->private_value |= nid;
513
514 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
515}
516
8b65727b
MP		 517static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
518 struct snd_ctl_elem_info *uinfo)
519{
520 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
521 struct sigmatel_spec *spec = codec->spec;
522 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
523}
524
525static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
526 struct snd_ctl_elem_value *ucontrol)
527{
528 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
529 struct sigmatel_spec *spec = codec->spec;
e1f0d669 530 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 531
e1f0d669 532 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 533 return 0;
534}
535
536static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
537 struct snd_ctl_elem_value *ucontrol)
538{
539 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
540 struct sigmatel_spec *spec = codec->spec;
e1f0d669 541 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 542
543 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 544 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 545}
546
d9737751
MR		 547static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
548 struct snd_ctl_elem_info *uinfo)
549{
550 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
551 struct sigmatel_spec *spec = codec->spec;
552 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
553}
554
555static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
556 struct snd_ctl_elem_value *ucontrol)
557{
558 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
559 struct sigmatel_spec *spec = codec->spec;
560 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
561
562 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
563 return 0;
564}
565
566static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
567 struct snd_ctl_elem_value *ucontrol)
568{
569 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
570 struct sigmatel_spec *spec = codec->spec;
00ef50c2 571 struct hda_input_mux *smux = &spec->private_smux;
d9737751 572 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 573 int err, val;
574 hda_nid_t nid;
d9737751 575
00ef50c2 576 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 577 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 578 if (err < 0)
579 return err;
580
581 if (spec->spdif_mute) {
582 if (smux_idx == 0)
583 nid = spec->multiout.dig_out_nid;
584 else
585 nid = codec->slave_dig_outs[smux_idx - 1];
586 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
587 val = AMP_OUT_MUTE;
00ef50c2 588 else
c1e99bd9 589 val = AMP_OUT_UNMUTE;
00ef50c2
MR		 590 /* un/mute SPDIF out */
591 snd_hda_codec_write_cache(codec, nid, 0,
592 AC_VERB_SET_AMP_GAIN_MUTE, val);
593 }
594 return 0;
d9737751
MR		 595}
596
c8b6bf9b 597static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 598{
599 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
600 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 601 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 602}
603
c8b6bf9b 604static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 605{
606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
607 struct sigmatel_spec *spec = codec->spec;
608 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
609
610 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
611 return 0;
612}
613
c8b6bf9b 614static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 615{
616 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
617 struct sigmatel_spec *spec = codec->spec;
618 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
619
c7d4b2fa 620 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 621 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
622}
623
b22b4821
MR		 624static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
625 struct snd_ctl_elem_info *uinfo)
626{
627 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
628 struct sigmatel_spec *spec = codec->spec;
629 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
630}
631
632static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
633 struct snd_ctl_elem_value *ucontrol)
634{
635 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
636 struct sigmatel_spec *spec = codec->spec;
637
638 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
639 return 0;
640}
641
642static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
643 struct snd_ctl_elem_value *ucontrol)
644{
645 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
646 struct sigmatel_spec *spec = codec->spec;
647
648 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
649 spec->mono_nid, &spec->cur_mmux);
650}
651
89385035
MR		 652static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
653 struct snd_ctl_elem_info *uinfo)
654{
655 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
656 struct sigmatel_spec *spec = codec->spec;
657 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
658}
659
660static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
661 struct snd_ctl_elem_value *ucontrol)
662{
663 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
664 struct sigmatel_spec *spec = codec->spec;
665
666 ucontrol->value.enumerated.item[0] = spec->cur_amux;
667 return 0;
668}
669
670static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
671 struct snd_ctl_elem_value *ucontrol)
672{
673 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
674 struct sigmatel_spec *spec = codec->spec;
675 struct snd_kcontrol *ctl =
676 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
677 if (!ctl)
678 return -EINVAL;
679
680 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
681 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
682
683 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
684 0, &spec->cur_amux);
685}
686
5f10c4a9
ML		 687#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
688
689static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
690 struct snd_ctl_elem_value *ucontrol)
691{
692 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 693 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 694 struct sigmatel_spec *spec = codec->spec;
695
e1f0d669
MR		 696 ucontrol->value.integer.value[0] = !!(spec->aloopback &
697 (spec->aloopback_mask << idx));
5f10c4a9
ML		 698 return 0;
699}
700
701static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
702 struct snd_ctl_elem_value *ucontrol)
703{
704 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
705 struct sigmatel_spec *spec = codec->spec;
e1f0d669 706 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 707 unsigned int dac_mode;
e1f0d669 708 unsigned int val, idx_val;
5f10c4a9 709
e1f0d669
MR		 710 idx_val = spec->aloopback_mask << idx;
711 if (ucontrol->value.integer.value[0])
712 val = spec->aloopback | idx_val;
713 else
714 val = spec->aloopback & ~idx_val;
68ea7b2f 715 if (spec->aloopback == val)
5f10c4a9
ML		 716 return 0;
717
68ea7b2f 718 spec->aloopback = val;
5f10c4a9 719
e1f0d669
MR		 720 /* Only return the bits defined by the shift value of the
721 * first two bytes of the mask
722 */
5f10c4a9 723 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 724 kcontrol->private_value & 0xFFFF, 0x0);
725 dac_mode >>= spec->aloopback_shift;
5f10c4a9 726
e1f0d669 727 if (spec->aloopback & idx_val) {
5f10c4a9 728 snd_hda_power_up(codec);
e1f0d669 729 dac_mode |= idx_val;
5f10c4a9
ML		 730 } else {
731 snd_hda_power_down(codec);
e1f0d669 732 dac_mode &= ~idx_val;
5f10c4a9
ML		 733 }
734
735 snd_hda_codec_write_cache(codec, codec->afg, 0,
736 kcontrol->private_value >> 16, dac_mode);
737
738 return 1;
739}
740
c7d4b2fa 741static struct hda_verb stac9200_core_init[] = {
2f2f4251 742 /* set dac0mux for dac converter */
c7d4b2fa 743 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 744 {}
745};
746
1194b5b7
TI		 747static struct hda_verb stac9200_eapd_init[] = {
748 /* set dac0mux for dac converter */
749 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
750 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
751 {}
752};
753
e1f0d669
MR		 754static struct hda_verb stac92hd73xx_6ch_core_init[] = {
755 /* set master volume and direct control */
756 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
757 /* setup audio connections */
758 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
759 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
760 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
761 /* setup adcs to point to mixer */
762 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
763 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 764 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
765 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
766 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
767 /* setup import muxs */
768 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
769 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
770 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
771 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
772 {}
773};
774
d654a660
MR		 775static struct hda_verb dell_eq_core_init[] = {
776 /* set master volume to max value without distortion
777 * and direct control */
778 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
779 /* setup audio connections */
780 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 781 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
782 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 783 /* setup adcs to point to mixer */
784 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
785 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
786 /* setup import muxs */
787 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
788 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
789 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
790 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
791 {}
792};
793
52fe0f9d 794static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 795 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d 796 /* setup audio connections */
7747ecce
MR		 797 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
798 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 799 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
800 /* setup adcs to point to mixer */
801 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
802 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
803 /* setup import muxs */
804 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
805 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
806 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
807 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
808 {}
809};
810
e1f0d669
MR		 811static struct hda_verb stac92hd73xx_8ch_core_init[] = {
812 /* set master volume and direct control */
813 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
814 /* setup audio connections */
815 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
816 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
817 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
818 /* connect hp ports to dac3 */
819 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
820 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
821 /* setup adcs to point to mixer */
822 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
823 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 824 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
825 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
826 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
827 /* setup import muxs */
828 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
829 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
830 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
831 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
832 {}
833};
834
835static struct hda_verb stac92hd73xx_10ch_core_init[] = {
836 /* set master volume and direct control */
837 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
838 /* setup audio connections */
839 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
840 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
841 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
842 /* dac3 is connected to import3 mux */
843 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
844 /* connect hp ports to dac4 */
845 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
846 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
847 /* setup adcs to point to mixer */
848 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
849 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 850 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
851 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
852 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
853 /* setup import muxs */
854 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
855 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
856 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
857 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
858 {}
859};
860
d0513fc6
MR		 861static struct hda_verb stac92hd83xxx_core_init[] = {
862 /* start of config #1 */
863 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
864
865 /* start of config #2 */
866 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
867 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
868 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
869
870 /* power state controls amps */
871 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
872};
873
e035b841 874static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 875 /* set master volume and direct control */
876 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
877 /* connect headphone jack to dac1 */
878 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
541eee87
MR		 879 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
880 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
881 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
882 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 883};
884
4b33c767 885#define HD_DISABLE_PORTF 2
541eee87 886static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 887 /* start of config #1 */
888
889 /* connect port 0f to audio mixer */
890 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 891 /* unmute right and left channels for node 0x0f */
892 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
893 /* start of config #2 */
894
e035b841
MR		 895 /* set master volume and direct control */
896 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
897 /* connect headphone jack to dac1 */
898 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 899 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 900 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
901 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 902 {}
903};
904
8e21c34c
TD		 905static struct hda_verb stac925x_core_init[] = {
906 /* set dac0mux for dac converter */
907 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
908 {}
909};
910
c7d4b2fa 911static struct hda_verb stac922x_core_init[] = {
2f2f4251 912 /* set master volume and direct control */
c7d4b2fa 913 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 914 {}
915};
916
93ed1503 917static struct hda_verb d965_core_init[] = {
19039bd0 918 /* set master volume and direct control */
93ed1503 919 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 920 /* unmute node 0x1b */
921 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
922 /* select node 0x03 as DAC */
923 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
924 {}
925};
926
3cc08dc6
MP		 927static struct hda_verb stac927x_core_init[] = {
928 /* set master volume and direct control */
929 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 930 /* enable analog pc beep path */
931 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 932 {}
933};
934
f3302a59
MP		 935static struct hda_verb stac9205_core_init[] = {
936 /* set master volume and direct control */
937 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 938 /* enable analog pc beep path */
939 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 940 {}
941};
942
b22b4821
MR		 943#define STAC_MONO_MUX \
944 { \
945 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
946 .name = "Mono Mux", \
947 .count = 1, \
948 .info = stac92xx_mono_mux_enum_info, \
949 .get = stac92xx_mono_mux_enum_get, \
950 .put = stac92xx_mono_mux_enum_put, \
951 }
952
89385035
MR		 953#define STAC_AMP_MUX \
954 { \
955 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
956 .name = "Amp Selector Capture Switch", \
957 .count = 1, \
958 .info = stac92xx_amp_mux_enum_info, \
959 .get = stac92xx_amp_mux_enum_get, \
960 .put = stac92xx_amp_mux_enum_put, \
961 }
962
963#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
964 { \
965 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
966 .name = xname, \
967 .index = 0, \
968 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
969 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
970 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
971 .info = stac92xx_amp_volume_info, \
972 .get = stac92xx_amp_volume_get, \
973 .put = stac92xx_amp_volume_put, \
974 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
975 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
976 }
977
9e05b7a3 978#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 979 { \
980 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
981 .name = "Input Source", \
9e05b7a3 982 .count = cnt, \
ca7c5a8b
ML		 983 .info = stac92xx_mux_enum_info, \
984 .get = stac92xx_mux_enum_get, \
985 .put = stac92xx_mux_enum_put, \
986 }
987
e1f0d669 988#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 989 { \
990 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
991 .name = "Analog Loopback", \
e1f0d669 992 .count = cnt, \
5f10c4a9
ML		 993 .info = stac92xx_aloopback_info, \
994 .get = stac92xx_aloopback_get, \
995 .put = stac92xx_aloopback_put, \
996 .private_value = verb_read | (verb_write << 16), \
997 }
998
c8b6bf9b 999static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 1000 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
1001 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 1002 STAC_INPUT_SOURCE(1),
2f2f4251
M		 1003 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1004 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 1005 { } /* end */
1006};
1007
2a9c7816 1008#define DELL_M6_MIXER 6
e1f0d669 1009static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 1010 /* start of config #1 */
e1f0d669
MR		 1011 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1012 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1013
e1f0d669
MR		 1014 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1015 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1016
2a9c7816
MR		 1017 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1018 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1019
1020 /* start of config #2 */
1021 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1022 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1023
e1f0d669
MR		 1024 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1025 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1026
2a9c7816
MR		 1027 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1028
1029 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1030 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1031
1032 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1033 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1034
e1f0d669
MR		 1035 { } /* end */
1036};
1037
1038static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1039 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1040
e1f0d669
MR		 1041 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1042 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1043
1044 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1045 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1046
1047 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1048 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1049
1050 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1051 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1052
1053 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1054 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1055
1056 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1057 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1058
1059 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1060 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1061 { } /* end */
1062};
1063
1064static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1065 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1066
e1f0d669
MR		 1067 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1068 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1069
1070 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1071 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1072
1073 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1074 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1075
1076 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1077 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1078
1079 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1080 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1081
1082 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1083 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1084
1085 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1086 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1087 { } /* end */
1088};
1089
d0513fc6
MR		 1090
1091static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1092 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1093 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1094
1095 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1096 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1097
1098 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1099 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1100
1101 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1102 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1103
1104 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1105 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1106
1107 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1108 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1109
1110 /*
1111 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1112 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1113 */
1114 { } /* end */
1115};
1116
541eee87 1117static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1118 STAC_INPUT_SOURCE(2),
4b33c767 1119 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1120
9b35947f
MR		 1121 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1122 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1123
1124 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1125 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1126 /* analog pc-beep replaced with digital beep support */
1127 /*
f7c5dda2
MR		 1128 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1129 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1130 */
f7c5dda2 1131
687cb98e
MR		 1132 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1133 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1134
687cb98e
MR		 1135 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1136 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1137
1138 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1139 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1140
1141 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1142 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1143 { } /* end */
1144};
1145
541eee87 1146static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1147 STAC_INPUT_SOURCE(2),
1148 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1149
541eee87
MR		 1150 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1151 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1152
1153 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1154 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1155 { } /* end */
1156};
1157
8e21c34c 1158static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1159 STAC_INPUT_SOURCE(1),
8e21c34c 1160 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1161 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1162 { } /* end */
1163};
1164
9e05b7a3 1165static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1166 STAC_INPUT_SOURCE(2),
e1f0d669 1167 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1168
1169 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1170 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1171
1172 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1173 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1174 { } /* end */
1175};
1176
19039bd0 1177/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1178static struct snd_kcontrol_new stac922x_mixer[] = {
1179 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1180 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1181 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1182
1183 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1184 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1185 { } /* end */
1186};
1187
9e05b7a3 1188
d1d985f0 1189static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1190 STAC_INPUT_SOURCE(3),
e1f0d669 1191 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1192
9e05b7a3
ML		 1193 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1194 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1195
1196 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1197 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1198
1199 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1200 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1201 { } /* end */
1202};
1203
1697055e
TI		 1204static struct snd_kcontrol_new stac_dmux_mixer = {
1205 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1206 .name = "Digital Input Source",
1207 /* count set later */
1208 .info = stac92xx_dmux_enum_info,
1209 .get = stac92xx_dmux_enum_get,
1210 .put = stac92xx_dmux_enum_put,
1211};
1212
d9737751
MR		 1213static struct snd_kcontrol_new stac_smux_mixer = {
1214 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1215 .name = "IEC958 Playback Source",
d9737751
MR		 1216 /* count set later */
1217 .info = stac92xx_smux_enum_info,
1218 .get = stac92xx_smux_enum_get,
1219 .put = stac92xx_smux_enum_put,
1220};
1221
2134ea4f
TI		 1222static const char *slave_vols[] = {
1223 "Front Playback Volume",
1224 "Surround Playback Volume",
1225 "Center Playback Volume",
1226 "LFE Playback Volume",
1227 "Side Playback Volume",
1228 "Headphone Playback Volume",
1229 "Headphone Playback Volume",
1230 "Speaker Playback Volume",
1231 "External Speaker Playback Volume",
1232 "Speaker2 Playback Volume",
1233 NULL
1234};
1235
1236static const char *slave_sws[] = {
1237 "Front Playback Switch",
1238 "Surround Playback Switch",
1239 "Center Playback Switch",
1240 "LFE Playback Switch",
1241 "Side Playback Switch",
1242 "Headphone Playback Switch",
1243 "Headphone Playback Switch",
1244 "Speaker Playback Switch",
1245 "External Speaker Playback Switch",
1246 "Speaker2 Playback Switch",
edb54a55 1247 "IEC958 Playback Switch",
2134ea4f
TI		 1248 NULL
1249};
1250
603c4019 1251static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1252static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1253
2f2f4251
M		 1254static int stac92xx_build_controls(struct hda_codec *codec)
1255{
1256 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1257 struct auto_pin_cfg *cfg = &spec->autocfg;
1258 hda_nid_t nid;
2f2f4251 1259 int err;
c7d4b2fa 1260 int i;
2f2f4251
M		 1261
1262 err = snd_hda_add_new_ctls(codec, spec->mixer);
1263 if (err < 0)
1264 return err;
c7d4b2fa
M		 1265
1266 for (i = 0; i < spec->num_mixers; i++) {
1267 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1268 if (err < 0)
1269 return err;
1270 }
1697055e
TI		 1271 if (spec->num_dmuxes > 0) {
1272 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1273 err = snd_hda_ctl_add(codec,
1697055e
TI		 1274 snd_ctl_new1(&stac_dmux_mixer, codec));
1275 if (err < 0)
1276 return err;
1277 }
d9737751 1278 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1279 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1280 struct hda_input_mux *smux = &spec->private_smux;
1281 /* check for mute support on SPDIF out */
1282 if (wcaps & AC_WCAP_OUT_AMP) {
1283 smux->items[smux->num_items].label = "Off";
1284 smux->items[smux->num_items].index = 0;
1285 smux->num_items++;
1286 spec->spdif_mute = 1;
1287 }
d9737751
MR		 1288 stac_smux_mixer.count = spec->num_smuxes;
1289 err = snd_ctl_add(codec->bus->card,
1290 snd_ctl_new1(&stac_smux_mixer, codec));
1291 if (err < 0)
1292 return err;
1293 }
c7d4b2fa 1294
dabbed6f
M		 1295 if (spec->multiout.dig_out_nid) {
1296 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1297 if (err < 0)
1298 return err;
9a08160b
TI		 1299 err = snd_hda_create_spdif_share_sw(codec,
1300 &spec->multiout);
1301 if (err < 0)
1302 return err;
1303 spec->multiout.share_spdif = 1;
dabbed6f 1304 }
da74ae3e 1305 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1306 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1307 if (err < 0)
1308 return err;
1309 }
2134ea4f
TI		 1310
1311 /* if we have no master control, let's create it */
1312 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1313 unsigned int vmaster_tlv[4];
2134ea4f 1314 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1315 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1316 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1317 vmaster_tlv, slave_vols);
2134ea4f
TI		 1318 if (err < 0)
1319 return err;
1320 }
1321 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1322 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1323 NULL, slave_sws);
1324 if (err < 0)
1325 return err;
1326 }
1327
603c4019 1328 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1329
1330 /* create jack input elements */
1331 if (spec->hp_detect) {
1332 for (i = 0; i < cfg->hp_outs; i++) {
1333 int type = SND_JACK_HEADPHONE;
1334 nid = cfg->hp_pins[i];
1335 /* jack detection */
1336 if (cfg->hp_outs == i)
1337 type |= SND_JACK_LINEOUT;
1338 err = stac92xx_add_jack(codec, nid, type);
1339 if (err < 0)
1340 return err;
1341 }
1342 }
1343 for (i = 0; i < cfg->line_outs; i++) {
1344 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1345 SND_JACK_LINEOUT);
1346 if (err < 0)
1347 return err;
1348 }
1349 for (i = 0; i < AUTO_PIN_LAST; i++) {
1350 nid = cfg->input_pins[i];
1351 if (nid) {
1352 err = stac92xx_add_jack(codec, nid,
1353 SND_JACK_MICROPHONE);
1354 if (err < 0)
1355 return err;
1356 }
1357 }
1358
dabbed6f 1359 return 0;
2f2f4251
M		 1360}
1361
403d1944 1362static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1363 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1364 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1365};
1366
dfe495d0
TI		 1367/*
1368 STAC 9200 pin configs for
1369 102801A8
1370 102801DE
1371 102801E8
1372*/
1373static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1374 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1375 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1376};
1377
1378/*
1379 STAC 9200 pin configs for
1380 102801C0
1381 102801C1
1382*/
1383static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1384 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1385 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1386};
1387
1388/*
1389 STAC 9200 pin configs for
1390 102801C4 (Dell Dimension E310)
1391 102801C5
1392 102801C7
1393 102801D9
1394 102801DA
1395 102801E3
1396*/
1397static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1398 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1399 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1400};
1401
1402
1403/*
1404 STAC 9200-32 pin configs for
1405 102801B5 (Dell Inspiron 630m)
1406 102801D8 (Dell Inspiron 640m)
1407*/
1408static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1409 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1410 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1411};
1412
1413/*
1414 STAC 9200-32 pin configs for
1415 102801C2 (Dell Latitude D620)
1416 102801C8
1417 102801CC (Dell Latitude D820)
1418 102801D4
1419 102801D6
1420*/
1421static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1422 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1423 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1424};
1425
1426/*
1427 STAC 9200-32 pin configs for
1428 102801CE (Dell XPS M1710)
1429 102801CF (Dell Precision M90)
1430*/
1431static unsigned int dell9200_m23_pin_configs[8] = {
1432 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1433 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1434};
1435
1436/*
1437 STAC 9200-32 pin configs for
1438 102801C9
1439 102801CA
1440 102801CB (Dell Latitude 120L)
1441 102801D3
1442*/
1443static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1444 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1445 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1446};
1447
1448/*
1449 STAC 9200-32 pin configs for
1450 102801BD (Dell Inspiron E1505n)
1451 102801EE
1452 102801EF
1453*/
1454static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1455 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1456 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1457};
1458
1459/*
1460 STAC 9200-32 pin configs for
1461 102801F5 (Dell Inspiron 1501)
1462 102801F6
1463*/
1464static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1465 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1466 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1467};
1468
1469/*
1470 STAC 9200-32
1471 102801CD (Dell Inspiron E1705/9400)
1472*/
1473static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1474 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1475 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1476};
1477
bf277785
TD		 1478static unsigned int oqo9200_pin_configs[8] = {
1479 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1480 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1481};
1482
dfe495d0 1483
f5fcc13c
TI		 1484static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1485 [STAC_REF] = ref9200_pin_configs,
bf277785 1486 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1487 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1488 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1489 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1490 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1491 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1492 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1493 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1494 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1495 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1496 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1497 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1498};
1499
f5fcc13c
TI		 1500static const char *stac9200_models[STAC_9200_MODELS] = {
1501 [STAC_REF] = "ref",
bf277785 1502 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1503 [STAC_9200_DELL_D21] = "dell-d21",
1504 [STAC_9200_DELL_D22] = "dell-d22",
1505 [STAC_9200_DELL_D23] = "dell-d23",
1506 [STAC_9200_DELL_M21] = "dell-m21",
1507 [STAC_9200_DELL_M22] = "dell-m22",
1508 [STAC_9200_DELL_M23] = "dell-m23",
1509 [STAC_9200_DELL_M24] = "dell-m24",
1510 [STAC_9200_DELL_M25] = "dell-m25",
1511 [STAC_9200_DELL_M26] = "dell-m26",
1512 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1513 [STAC_9200_GATEWAY] = "gateway",
117f257d 1514 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1515};
1516
1517static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1518 /* SigmaTel reference board */
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1520 "DFI LanParty", STAC_REF),
e7377071 1521 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1523 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1525 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1527 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1529 "unknown Dell", STAC_9200_DELL_D22),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1531 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1533 "Dell Latitude D620", STAC_9200_DELL_M22),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1535 "unknown Dell", STAC_9200_DELL_D23),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1537 "unknown Dell", STAC_9200_DELL_D23),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1539 "unknown Dell", STAC_9200_DELL_M22),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1541 "unknown Dell", STAC_9200_DELL_M24),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1543 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1545 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1547 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1549 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1550 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1551 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1552 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1553 "Dell Precision M90", STAC_9200_DELL_M23),
1554 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1555 "unknown Dell", STAC_9200_DELL_M22),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1557 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1558 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1559 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1560 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1561 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1562 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1563 "unknown Dell", STAC_9200_DELL_D23),
1564 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1565 "unknown Dell", STAC_9200_DELL_D23),
1566 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1567 "unknown Dell", STAC_9200_DELL_D21),
1568 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1569 "unknown Dell", STAC_9200_DELL_D23),
1570 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1571 "unknown Dell", STAC_9200_DELL_D21),
1572 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1573 "unknown Dell", STAC_9200_DELL_M25),
1574 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1575 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1576 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1577 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1578 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1579 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1580 /* Panasonic */
117f257d 1581 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1582 /* Gateway machines needs EAPD to be set on resume */
1583 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1584 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1585 STAC_9200_GATEWAY),
1586 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1587 STAC_9200_GATEWAY),
bf277785
TD		 1588 /* OQO Mobile */
1589 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1590 {} /* terminator */
1591};
1592
8e21c34c
TD		 1593static unsigned int ref925x_pin_configs[8] = {
1594 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1595 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1596};
1597
1598static unsigned int stac925x_MA6_pin_configs[8] = {
1599 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1600 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1601};
1602
2c11f955
TD		 1603static unsigned int stac925x_PA6_pin_configs[8] = {
1604 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1605 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1606};
1607
8e21c34c 1608static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1609 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1610 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1611};
1612
1613static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1614 [STAC_REF] = ref925x_pin_configs,
1615 [STAC_M2_2] = stac925xM2_2_pin_configs,
1616 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1617 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1618};
1619
1620static const char *stac925x_models[STAC_925x_MODELS] = {
1621 [STAC_REF] = "ref",
1622 [STAC_M2_2] = "m2-2",
1623 [STAC_MA6] = "m6",
2c11f955 1624 [STAC_PA6] = "pa6",
8e21c34c
TD		 1625};
1626
1627static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1628 /* SigmaTel reference board */
1629 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1630 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1631 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1632 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1633 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1634 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1635 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1636 {} /* terminator */
1637};
1638
a7662640 1639static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1640 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1641 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1642 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1643 0x01452050,
1644};
1645
1646static unsigned int dell_m6_pin_configs[13] = {
1647 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1648 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1649 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1650 0x4f0000f0,
e1f0d669
MR		 1651};
1652
1653static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1654 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1655 [STAC_DELL_M6] = dell_m6_pin_configs,
6b3ab21e 1656 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1657};
1658
1659static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1660 [STAC_92HD73XX_REF] = "ref",
a7662640 1661 [STAC_DELL_M6] = "dell-m6",
6b3ab21e 1662 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1663};
1664
1665static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1666 /* SigmaTel reference board */
1667 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1668 "DFI LanParty", STAC_92HD73XX_REF),
1669 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
d6752a53 1670 "Dell Studio 1535", STAC_DELL_M6),
a7662640
MR		 1671 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1672 "unknown Dell", STAC_DELL_M6),
1673 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1674 "unknown Dell", STAC_DELL_M6),
1675 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1676 "unknown Dell", STAC_DELL_M6),
1677 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1678 "unknown Dell", STAC_DELL_M6),
1679 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1680 "unknown Dell", STAC_DELL_M6),
1681 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1682 "unknown Dell", STAC_DELL_M6),
b0fc5e04
TI		 1683 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
1684 "Dell Studio 15", STAC_DELL_M6),
e1f0d669
MR		 1685 {} /* terminator */
1686};
1687
d0513fc6
MR		 1688static unsigned int ref92hd83xxx_pin_configs[14] = {
1689 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1690 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1691 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1692 0x01451160, 0x98560170,
1693};
1694
1695static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1696 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1697};
1698
1699static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1700 [STAC_92HD83XXX_REF] = "ref",
1701};
1702
1703static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1704 /* SigmaTel reference board */
1705 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1706 "DFI LanParty", STAC_92HD71BXX_REF),
1707};
1708
0ffa9807 1709static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1710 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1711 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1712 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1713};
1714
0ffa9807 1715static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1716 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1717 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1718 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1719};
1720
0ffa9807 1721static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1722 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1723 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1724 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1725};
1726
3a7abfd2
MR		 1727static unsigned int dell_m4_3_pin_configs[11] = {
1728 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1729 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1730 0x40f000f0, 0x044413b0, 0x044413b0,
1731};
1732
e035b841
MR		 1733static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1734 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1735 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1736 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1737 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1738 [STAC_HP_M4] = NULL,
e035b841
MR		 1739};
1740
1741static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1742 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1743 [STAC_DELL_M4_1] = "dell-m4-1",
1744 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1745 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1746 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1747};
1748
1749static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1750 /* SigmaTel reference board */
1751 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1752 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1753 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1754 "HP dv5", STAC_HP_M4),
1755 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1756 "HP dv7", STAC_HP_M4),
9a9e2359
MR		 1757 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1758 "unknown HP", STAC_HP_M4),
a7662640
MR		 1759 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1760 "unknown Dell", STAC_DELL_M4_1),
1761 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1762 "unknown Dell", STAC_DELL_M4_1),
1763 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1764 "unknown Dell", STAC_DELL_M4_1),
1765 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1766 "unknown Dell", STAC_DELL_M4_1),
1767 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1768 "unknown Dell", STAC_DELL_M4_1),
1769 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1770 "unknown Dell", STAC_DELL_M4_1),
1771 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1772 "unknown Dell", STAC_DELL_M4_1),
1773 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1774 "unknown Dell", STAC_DELL_M4_2),
1775 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1776 "unknown Dell", STAC_DELL_M4_2),
1777 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1778 "unknown Dell", STAC_DELL_M4_2),
1779 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1780 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1781 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1782 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1783 {} /* terminator */
1784};
1785
403d1944
MP		 1786static unsigned int ref922x_pin_configs[10] = {
1787 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1788 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1789 0x40000100, 0x40000100,
1790};
1791
dfe495d0
TI		 1792/*
1793 STAC 922X pin configs for
1794 102801A7
1795 102801AB
1796 102801A9
1797 102801D1
1798 102801D2
1799*/
1800static unsigned int dell_922x_d81_pin_configs[10] = {
1801 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1802 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1803 0x01813122, 0x400001f2,
1804};
1805
1806/*
1807 STAC 922X pin configs for
1808 102801AC
1809 102801D0
1810*/
1811static unsigned int dell_922x_d82_pin_configs[10] = {
1812 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1813 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1814 0x01813122, 0x400001f1,
1815};
1816
1817/*
1818 STAC 922X pin configs for
1819 102801BF
1820*/
1821static unsigned int dell_922x_m81_pin_configs[10] = {
1822 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1823 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1824 0x40C003f1, 0x405003f0,
1825};
1826
1827/*
1828 STAC 9221 A1 pin configs for
1829 102801D7 (Dell XPS M1210)
1830*/
1831static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1832 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1833 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1834 0x508003f3, 0x405003f4,
1835};
1836
403d1944 1837static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1838 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1839 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1840 0x02a19120, 0x40000100,
1841};
1842
1843static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1844 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1845 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1846 0x02a19320, 0x40000100,
1847};
1848
5d5d3bc3
IZ		 1849static unsigned int intel_mac_v1_pin_configs[10] = {
1850 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1851 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1852 0x400000fc, 0x400000fb,
1853};
1854
1855static unsigned int intel_mac_v2_pin_configs[10] = {
1856 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1857 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1858 0x400000fc, 0x400000fb,
6f0778d8
NB		 1859};
1860
5d5d3bc3
IZ		 1861static unsigned int intel_mac_v3_pin_configs[10] = {
1862 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1863 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1864 0x400000fc, 0x400000fb,
1865};
1866
5d5d3bc3
IZ		 1867static unsigned int intel_mac_v4_pin_configs[10] = {
1868 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1869 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1870 0x400000fc, 0x400000fb,
1871};
1872
5d5d3bc3
IZ		 1873static unsigned int intel_mac_v5_pin_configs[10] = {
1874 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1875 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1876 0x400000fc, 0x400000fb,
0dae0f83
TI		 1877};
1878
8c650087
MCC		 1879static unsigned int ecs202_pin_configs[10] = {
1880 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1881 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1882 0x9037012e, 0x40e000f2,
1883};
76c08828 1884
19039bd0 1885static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1886 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1887 [STAC_D945GTP3] = d945gtp3_pin_configs,
1888 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1889 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1890 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1891 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1892 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1893 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1894 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1895 /* for backward compatibility */
5d5d3bc3
IZ		 1896 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1897 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1898 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1899 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1900 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1901 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1902 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1903 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1904 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1905 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1906 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1907};
1908
f5fcc13c
TI		 1909static const char *stac922x_models[STAC_922X_MODELS] = {
1910 [STAC_D945_REF] = "ref",
1911 [STAC_D945GTP5] = "5stack",
1912 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1913 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1914 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1915 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1916 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1917 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1918 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1919 /* for backward compatibility */
f5fcc13c 1920 [STAC_MACMINI] = "macmini",
3fc24d85 1921 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1922 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1923 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1924 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1925 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1926 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1927 [STAC_922X_DELL_D81] = "dell-d81",
1928 [STAC_922X_DELL_D82] = "dell-d82",
1929 [STAC_922X_DELL_M81] = "dell-m81",
1930 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1931};
1932
1933static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1934 /* SigmaTel reference board */
1935 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1936 "DFI LanParty", STAC_D945_REF),
1937 /* Intel 945G based systems */
1938 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1939 "Intel D945G", STAC_D945GTP3),
1940 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1941 "Intel D945G", STAC_D945GTP3),
1942 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1943 "Intel D945G", STAC_D945GTP3),
1944 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1945 "Intel D945G", STAC_D945GTP3),
1946 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1947 "Intel D945G", STAC_D945GTP3),
1948 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1949 "Intel D945G", STAC_D945GTP3),
1950 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1951 "Intel D945G", STAC_D945GTP3),
1952 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1953 "Intel D945G", STAC_D945GTP3),
1954 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1955 "Intel D945G", STAC_D945GTP3),
1956 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1957 "Intel D945G", STAC_D945GTP3),
1958 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1959 "Intel D945G", STAC_D945GTP3),
1960 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1961 "Intel D945G", STAC_D945GTP3),
1962 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1963 "Intel D945G", STAC_D945GTP3),
1964 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1965 "Intel D945G", STAC_D945GTP3),
1966 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1967 "Intel D945G", STAC_D945GTP3),
1968 /* Intel D945G 5-stack systems */
1969 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1970 "Intel D945G", STAC_D945GTP5),
1971 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1972 "Intel D945G", STAC_D945GTP5),
1973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1974 "Intel D945G", STAC_D945GTP5),
1975 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1976 "Intel D945G", STAC_D945GTP5),
1977 /* Intel 945P based systems */
1978 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1979 "Intel D945P", STAC_D945GTP3),
1980 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1981 "Intel D945P", STAC_D945GTP3),
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1983 "Intel D945P", STAC_D945GTP3),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1985 "Intel D945P", STAC_D945GTP3),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1987 "Intel D945P", STAC_D945GTP3),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1989 "Intel D945P", STAC_D945GTP5),
1990 /* other systems */
536319af 1991 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1992 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1993 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1994 /* Dell systems */
1995 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1996 "unknown Dell", STAC_922X_DELL_D81),
1997 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1998 "unknown Dell", STAC_922X_DELL_D81),
1999 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2000 "unknown Dell", STAC_922X_DELL_D81),
2001 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2002 "unknown Dell", STAC_922X_DELL_D82),
2003 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2004 "unknown Dell", STAC_922X_DELL_M81),
2005 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2006 "unknown Dell", STAC_922X_DELL_D82),
2007 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2008 "unknown Dell", STAC_922X_DELL_D81),
2009 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2010 "unknown Dell", STAC_922X_DELL_D81),
2011 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2012 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 2013 /* ECS/PC Chips boards */
2014 SND_PCI_QUIRK(0x1019, 0x2144,
2015 "ECS/PC chips", STAC_ECS_202),
2016 SND_PCI_QUIRK(0x1019, 0x2608,
2017 "ECS/PC chips", STAC_ECS_202),
2018 SND_PCI_QUIRK(0x1019, 0x2633,
2019 "ECS/PC chips P17G/1333", STAC_ECS_202),
2020 SND_PCI_QUIRK(0x1019, 0x2811,
2021 "ECS/PC chips", STAC_ECS_202),
2022 SND_PCI_QUIRK(0x1019, 0x2812,
2023 "ECS/PC chips", STAC_ECS_202),
2024 SND_PCI_QUIRK(0x1019, 0x2813,
2025 "ECS/PC chips", STAC_ECS_202),
2026 SND_PCI_QUIRK(0x1019, 0x2814,
2027 "ECS/PC chips", STAC_ECS_202),
2028 SND_PCI_QUIRK(0x1019, 0x2815,
2029 "ECS/PC chips", STAC_ECS_202),
2030 SND_PCI_QUIRK(0x1019, 0x2816,
2031 "ECS/PC chips", STAC_ECS_202),
2032 SND_PCI_QUIRK(0x1019, 0x2817,
2033 "ECS/PC chips", STAC_ECS_202),
2034 SND_PCI_QUIRK(0x1019, 0x2818,
2035 "ECS/PC chips", STAC_ECS_202),
2036 SND_PCI_QUIRK(0x1019, 0x2819,
2037 "ECS/PC chips", STAC_ECS_202),
2038 SND_PCI_QUIRK(0x1019, 0x2820,
2039 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2040 {} /* terminator */
2041};
2042
3cc08dc6 2043static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2044 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2045 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2046 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2047 0x01c42190, 0x40000100,
3cc08dc6
MP		 2048};
2049
93ed1503 2050static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2051 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2052 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2053 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2054 0x40000100, 0x40000100
2055};
2056
93ed1503
TD		 2057static unsigned int d965_5st_pin_configs[14] = {
2058 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2059 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2060 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2061 0x40000100, 0x40000100
2062};
2063
4ff076e5
TD		 2064static unsigned int dell_3st_pin_configs[14] = {
2065 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2066 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2067 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2068 0x40c003fc, 0x40000100
2069};
2070
93ed1503 2071static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 2072 [STAC_D965_REF] = ref927x_pin_configs,
2073 [STAC_D965_3ST] = d965_3st_pin_configs,
2074 [STAC_D965_5ST] = d965_5st_pin_configs,
2075 [STAC_DELL_3ST] = dell_3st_pin_configs,
2076 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2077};
2078
f5fcc13c 2079static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 2080 [STAC_D965_REF] = "ref",
2081 [STAC_D965_3ST] = "3stack",
2082 [STAC_D965_5ST] = "5stack",
2083 [STAC_DELL_3ST] = "dell-3stack",
2084 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2085};
2086
2087static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2088 /* SigmaTel reference board */
2089 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2090 "DFI LanParty", STAC_D965_REF),
81d3dbde 2091 /* Intel 946 based systems */
f5fcc13c
TI		 2092 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2093 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2094 /* 965 based 3 stack systems */
f5fcc13c
TI		 2095 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2096 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2097 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2098 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2099 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2100 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2101 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2102 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2103 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2104 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2105 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2106 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2107 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2108 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2109 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2110 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2111 /* Dell 3 stack systems */
8e9068b1 2112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2113 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2114 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2115 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2116 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2117 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2119 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2120 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2121 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2122 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2123 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2124 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2125 /* 965 based 5 stack systems */
f5fcc13c
TI		 2126 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2127 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2128 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2129 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2130 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2131 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2132 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2133 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2134 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2135 {} /* terminator */
2136};
2137
f3302a59
MP		 2138static unsigned int ref9205_pin_configs[12] = {
2139 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2140 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2141 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2142};
2143
dfe495d0
TI		 2144/*
2145 STAC 9205 pin configs for
2146 102801F1
2147 102801F2
2148 102801FC
2149 102801FD
2150 10280204
2151 1028021F
3fa2ef74 2152 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2153*/
2154static unsigned int dell_9205_m42_pin_configs[12] = {
2155 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2156 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2157 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2158};
2159
2160/*
2161 STAC 9205 pin configs for
2162 102801F9
2163 102801FA
2164 102801FE
2165 102801FF (Dell Precision M4300)
2166 10280206
2167 10280200
2168 10280201
2169*/
2170static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2171 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2172 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2173 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2174};
2175
dfe495d0 2176static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2177 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2178 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2179 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2180};
2181
f5fcc13c 2182static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2183 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2184 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2185 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2186 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2187};
2188
f5fcc13c
TI		 2189static const char *stac9205_models[STAC_9205_MODELS] = {
2190 [STAC_9205_REF] = "ref",
dfe495d0 2191 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2192 [STAC_9205_DELL_M43] = "dell-m43",
2193 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2194};
2195
2196static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2197 /* SigmaTel reference board */
2198 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2199 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2201 "unknown Dell", STAC_9205_DELL_M42),
2202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2203 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2205 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2207 "Dell Precision", STAC_9205_DELL_M43),
2208 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2209 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2210 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2211 "unknown Dell", STAC_9205_DELL_M42),
2212 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2213 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2214 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2215 "Dell Precision", STAC_9205_DELL_M43),
2216 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2217 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2218 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2219 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2220 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2221 "Dell Precision", STAC_9205_DELL_M43),
2222 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2223 "Dell Precision", STAC_9205_DELL_M43),
2224 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2225 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2226 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2227 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2228 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2229 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2230 {} /* terminator */
2231};
2232
11b44bbd
RF		 2233static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2234{
2235 int i;
2236 struct sigmatel_spec *spec = codec->spec;
2237
af9f341a
TI		 2238 kfree(spec->pin_configs);
2239 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2240 GFP_KERNEL);
2241 if (!spec->pin_configs)
2242 return -ENOMEM;
11b44bbd
RF		 2243
2244 for (i = 0; i < spec->num_pins; i++) {
2245 hda_nid_t nid = spec->pin_nids[i];
2246 unsigned int pin_cfg;
2247
2248 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2249 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2250 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2251 nid, pin_cfg);
af9f341a 2252 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF		 2253 }
2254
2255 return 0;
2256}
2257
87d48363
MR		 2258static void stac92xx_set_config_reg(struct hda_codec *codec,
2259 hda_nid_t pin_nid, unsigned int pin_config)
2260{
2261 int i;
2262 snd_hda_codec_write(codec, pin_nid, 0,
2263 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2264 pin_config & 0x000000ff);
2265 snd_hda_codec_write(codec, pin_nid, 0,
2266 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2267 (pin_config & 0x0000ff00) >> 8);
2268 snd_hda_codec_write(codec, pin_nid, 0,
2269 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2270 (pin_config & 0x00ff0000) >> 16);
2271 snd_hda_codec_write(codec, pin_nid, 0,
2272 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2273 pin_config >> 24);
2274 i = snd_hda_codec_read(codec, pin_nid, 0,
2275 AC_VERB_GET_CONFIG_DEFAULT,
2276 0x00);
2277 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2278 pin_nid, i);
2279}
2280
2f2f4251
M		 2281static void stac92xx_set_config_regs(struct hda_codec *codec)
2282{
2283 int i;
2284 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2285
87d48363
MR		 2286 if (!spec->pin_configs)
2287 return;
11b44bbd 2288
87d48363
MR		 2289 for (i = 0; i < spec->num_pins; i++)
2290 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2291 spec->pin_configs[i]);
2f2f4251 2292}
2f2f4251 2293
af9f341a
TI		 2294static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2295{
2296 struct sigmatel_spec *spec = codec->spec;
2297
2298 if (!pins)
2299 return stac92xx_save_bios_config_regs(codec);
2300
2301 kfree(spec->pin_configs);
2302 spec->pin_configs = kmemdup(pins,
2303 spec->num_pins * sizeof(*pins),
2304 GFP_KERNEL);
2305 if (!spec->pin_configs)
2306 return -ENOMEM;
2307
2308 stac92xx_set_config_regs(codec);
2309 return 0;
2310}
2311
2312static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2313 unsigned int cfg)
2314{
2315 struct sigmatel_spec *spec = codec->spec;
2316 int i;
2317
2318 for (i = 0; i < spec->num_pins; i++) {
2319 if (spec->pin_nids[i] == nid) {
2320 spec->pin_configs[i] = cfg;
2321 stac92xx_set_config_reg(codec, nid, cfg);
2322 break;
2323 }
2324 }
2325}
2326
dabbed6f 2327/*
c7d4b2fa 2328 * Analog playback callbacks
dabbed6f 2329 */
c7d4b2fa
M		 2330static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2331 struct hda_codec *codec,
c8b6bf9b 2332 struct snd_pcm_substream *substream)
2f2f4251 2333{
dabbed6f 2334 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2335 if (spec->stream_delay)
2336 msleep(spec->stream_delay);
9a08160b
TI		 2337 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2338 hinfo);
2f2f4251
M		 2339}
2340
2f2f4251
M		 2341static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2342 struct hda_codec *codec,
2343 unsigned int stream_tag,
2344 unsigned int format,
c8b6bf9b 2345 struct snd_pcm_substream *substream)
2f2f4251
M		 2346{
2347 struct sigmatel_spec *spec = codec->spec;
403d1944 2348 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2349}
2350
2351static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2352 struct hda_codec *codec,
c8b6bf9b 2353 struct snd_pcm_substream *substream)
2f2f4251
M		 2354{
2355 struct sigmatel_spec *spec = codec->spec;
2356 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2357}
2358
dabbed6f
M		 2359/*
2360 * Digital playback callbacks
2361 */
2362static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2363 struct hda_codec *codec,
c8b6bf9b 2364 struct snd_pcm_substream *substream)
dabbed6f
M		 2365{
2366 struct sigmatel_spec *spec = codec->spec;
2367 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2368}
2369
2370static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2371 struct hda_codec *codec,
c8b6bf9b 2372 struct snd_pcm_substream *substream)
dabbed6f
M		 2373{
2374 struct sigmatel_spec *spec = codec->spec;
2375 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2376}
2377
6b97eb45
TI		 2378static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2379 struct hda_codec *codec,
2380 unsigned int stream_tag,
2381 unsigned int format,
2382 struct snd_pcm_substream *substream)
2383{
2384 struct sigmatel_spec *spec = codec->spec;
2385 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2386 stream_tag, format, substream);
2387}
2388
dabbed6f 2389
2f2f4251
M		 2390/*
2391 * Analog capture callbacks
2392 */
2393static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2394 struct hda_codec *codec,
2395 unsigned int stream_tag,
2396 unsigned int format,
c8b6bf9b 2397 struct snd_pcm_substream *substream)
2f2f4251
M		 2398{
2399 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2400 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2401
8daaaa97
MR		 2402 if (spec->powerdown_adcs) {
2403 msleep(40);
2404 snd_hda_codec_write_cache(codec, nid, 0,
2405 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2406 }
2407 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2408 return 0;
2409}
2410
2411static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2412 struct hda_codec *codec,
c8b6bf9b 2413 struct snd_pcm_substream *substream)
2f2f4251
M		 2414{
2415 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2416 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2417
8daaaa97
MR		 2418 snd_hda_codec_cleanup_stream(codec, nid);
2419 if (spec->powerdown_adcs)
2420 snd_hda_codec_write_cache(codec, nid, 0,
2421 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2422 return 0;
2423}
2424
dabbed6f
M		 2425static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2426 .substreams = 1,
2427 .channels_min = 2,
2428 .channels_max = 2,
2429 /* NID is set in stac92xx_build_pcms */
2430 .ops = {
2431 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2432 .close = stac92xx_dig_playback_pcm_close,
2433 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2434 },
2435};
2436
2437static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2438 .substreams = 1,
2439 .channels_min = 2,
2440 .channels_max = 2,
2441 /* NID is set in stac92xx_build_pcms */
2442};
2443
2f2f4251
M		 2444static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2445 .substreams = 1,
2446 .channels_min = 2,
c7d4b2fa 2447 .channels_max = 8,
2f2f4251
M		 2448 .nid = 0x02, /* NID to query formats and rates */
2449 .ops = {
2450 .open = stac92xx_playback_pcm_open,
2451 .prepare = stac92xx_playback_pcm_prepare,
2452 .cleanup = stac92xx_playback_pcm_cleanup
2453 },
2454};
2455
3cc08dc6
MP		 2456static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2457 .substreams = 1,
2458 .channels_min = 2,
2459 .channels_max = 2,
2460 .nid = 0x06, /* NID to query formats and rates */
2461 .ops = {
2462 .open = stac92xx_playback_pcm_open,
2463 .prepare = stac92xx_playback_pcm_prepare,
2464 .cleanup = stac92xx_playback_pcm_cleanup
2465 },
2466};
2467
2f2f4251 2468static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2469 .channels_min = 2,
2470 .channels_max = 2,
9e05b7a3 2471 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2472 .ops = {
2473 .prepare = stac92xx_capture_pcm_prepare,
2474 .cleanup = stac92xx_capture_pcm_cleanup
2475 },
2476};
2477
2478static int stac92xx_build_pcms(struct hda_codec *codec)
2479{
2480 struct sigmatel_spec *spec = codec->spec;
2481 struct hda_pcm *info = spec->pcm_rec;
2482
2483 codec->num_pcms = 1;
2484 codec->pcm_info = info;
2485
c7d4b2fa 2486 info->name = "STAC92xx Analog";
2f2f4251 2487 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2488 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2489 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2490 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2491
2492 if (spec->alt_switch) {
2493 codec->num_pcms++;
2494 info++;
2495 info->name = "STAC92xx Analog Alt";
2496 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2497 }
2f2f4251 2498
dabbed6f
M		 2499 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2500 codec->num_pcms++;
2501 info++;
2502 info->name = "STAC92xx Digital";
7ba72ba1 2503 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2504 if (spec->multiout.dig_out_nid) {
2505 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2506 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2507 }
2508 if (spec->dig_in_nid) {
2509 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2510 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2511 }
2512 }
2513
2f2f4251
M		 2514 return 0;
2515}
2516
c960a03b
TI		 2517static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2518{
2519 unsigned int pincap = snd_hda_param_read(codec, nid,
2520 AC_PAR_PIN_CAP);
2521 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2522 if (pincap & AC_PINCAP_VREF_100)
2523 return AC_PINCTL_VREF_100;
2524 if (pincap & AC_PINCAP_VREF_80)
2525 return AC_PINCTL_VREF_80;
2526 if (pincap & AC_PINCAP_VREF_50)
2527 return AC_PINCTL_VREF_50;
2528 if (pincap & AC_PINCAP_VREF_GRD)
2529 return AC_PINCTL_VREF_GRD;
2530 return 0;
2531}
2532
403d1944
MP		 2533static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2534
2535{
82beb8fd
TI		 2536 snd_hda_codec_write_cache(codec, nid, 0,
2537 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2538}
2539
7c2ba97b
MR		 2540#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2541
2542static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2543 struct snd_ctl_elem_value *ucontrol)
2544{
2545 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2546 struct sigmatel_spec *spec = codec->spec;
2547
d7a89436 2548 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2549 return 0;
2550}
2551
2552static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2553 struct snd_ctl_elem_value *ucontrol)
2554{
2555 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2556 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2557 int nid = kcontrol->private_value;
2558
2559 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2560
2561 /* check to be sure that the ports are upto date with
2562 * switch changes
2563 */
74aeaabc 2564 codec->patch_ops.unsol_event(codec, (STAC_HP_EVENT | nid) << 26);
7c2ba97b
MR		 2565
2566 return 1;
2567}
2568
a5ce8890 2569#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2570
2571static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2572{
2573 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2574 struct sigmatel_spec *spec = codec->spec;
2575 int io_idx = kcontrol-> private_value & 0xff;
2576
2577 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2578 return 0;
2579}
2580
2581static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2582{
2583 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2584 struct sigmatel_spec *spec = codec->spec;
2585 hda_nid_t nid = kcontrol->private_value >> 8;
2586 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2587 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2588
2589 spec->io_switch[io_idx] = val;
2590
2591 if (val)
2592 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2593 else {
2594 unsigned int pinctl = AC_PINCTL_IN_EN;
2595 if (io_idx) /* set VREF for mic */
2596 pinctl |= stac92xx_get_vref(codec, nid);
2597 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2598 }
40c1d308
JZ		 2599
2600 /* check the auto-mute again: we need to mute/unmute the speaker
2601 * appropriately according to the pin direction
2602 */
2603 if (spec->hp_detect)
74aeaabc
MR		 2604 codec->patch_ops.unsol_event(codec,
2605 (STAC_HP_EVENT | nid) << 26);
40c1d308 2606
403d1944
MP		 2607 return 1;
2608}
2609
0fb87bb4
ML		 2610#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2611
2612static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2613 struct snd_ctl_elem_value *ucontrol)
2614{
2615 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2616 struct sigmatel_spec *spec = codec->spec;
2617
2618 ucontrol->value.integer.value[0] = spec->clfe_swap;
2619 return 0;
2620}
2621
2622static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2623 struct snd_ctl_elem_value *ucontrol)
2624{
2625 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2626 struct sigmatel_spec *spec = codec->spec;
2627 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2628 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2629
68ea7b2f 2630 if (spec->clfe_swap == val)
0fb87bb4
ML		 2631 return 0;
2632
68ea7b2f 2633 spec->clfe_swap = val;
0fb87bb4
ML		 2634
2635 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2636 spec->clfe_swap ? 0x4 : 0x0);
2637
2638 return 1;
2639}
2640
7c2ba97b
MR		 2641#define STAC_CODEC_HP_SWITCH(xname) \
2642 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2643 .name = xname, \
2644 .index = 0, \
2645 .info = stac92xx_hp_switch_info, \
2646 .get = stac92xx_hp_switch_get, \
2647 .put = stac92xx_hp_switch_put, \
2648 }
2649
403d1944
MP		 2650#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2651 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2652 .name = xname, \
2653 .index = 0, \
2654 .info = stac92xx_io_switch_info, \
2655 .get = stac92xx_io_switch_get, \
2656 .put = stac92xx_io_switch_put, \
2657 .private_value = xpval, \
2658 }
2659
0fb87bb4
ML		 2660#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2661 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2662 .name = xname, \
2663 .index = 0, \
2664 .info = stac92xx_clfe_switch_info, \
2665 .get = stac92xx_clfe_switch_get, \
2666 .put = stac92xx_clfe_switch_put, \
2667 .private_value = xpval, \
2668 }
403d1944 2669
c7d4b2fa
M		 2670enum {
2671 STAC_CTL_WIDGET_VOL,
2672 STAC_CTL_WIDGET_MUTE,
09a99959 2673 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2674 STAC_CTL_WIDGET_AMP_MUX,
2675 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2676 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2677 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2678 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2679};
2680
c8b6bf9b 2681static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2682 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2683 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2684 STAC_MONO_MUX,
89385035
MR		 2685 STAC_AMP_MUX,
2686 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2687 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2688 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2689 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2690};
2691
2692/* add dynamic controls */
4d4e9bb3
TI		 2693static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2694 struct snd_kcontrol_new *ktemp,
2695 int idx, const char *name,
2696 unsigned long val)
c7d4b2fa 2697{
c8b6bf9b 2698 struct snd_kcontrol_new *knew;
c7d4b2fa 2699
603c4019
TI		 2700 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2701 knew = snd_array_new(&spec->kctls);
2702 if (!knew)
2703 return -ENOMEM;
4d4e9bb3 2704 *knew = *ktemp;
4682eee0 2705 knew->index = idx;
82fe0c58 2706 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2707 if (!knew->name)
c7d4b2fa
M		 2708 return -ENOMEM;
2709 knew->private_value = val;
c7d4b2fa
M		 2710 return 0;
2711}
2712
4d4e9bb3
TI		 2713static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2714 int type, int idx, const char *name,
2715 unsigned long val)
2716{
2717 return stac92xx_add_control_temp(spec,
2718 &stac92xx_control_templates[type],
2719 idx, name, val);
2720}
2721
4682eee0
MR		 2722
2723/* add dynamic controls */
4d4e9bb3
TI		 2724static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2725 const char *name, unsigned long val)
4682eee0
MR		 2726{
2727 return stac92xx_add_control_idx(spec, type, 0, name, val);
2728}
2729
403d1944
MP		 2730/* flag inputs as additional dynamic lineouts */
2731static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2732{
2733 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2734 unsigned int wcaps, wtype;
2735 int i, num_dacs = 0;
2736
2737 /* use the wcaps cache to count all DACs available for line-outs */
2738 for (i = 0; i < codec->num_nodes; i++) {
2739 wcaps = codec->wcaps[i];
2740 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2741
7b043899
SL		 2742 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2743 num_dacs++;
2744 }
403d1944 2745
7b043899
SL		 2746 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2747
403d1944
MP		 2748 switch (cfg->line_outs) {
2749 case 3:
2750 /* add line-in as side */
7b043899 2751 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2752 cfg->line_out_pins[cfg->line_outs] =
2753 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2754 spec->line_switch = 1;
2755 cfg->line_outs++;
2756 }
2757 break;
2758 case 2:
2759 /* add line-in as clfe and mic as side */
7b043899 2760 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2761 cfg->line_out_pins[cfg->line_outs] =
2762 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2763 spec->line_switch = 1;
2764 cfg->line_outs++;
2765 }
7b043899 2766 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2767 cfg->line_out_pins[cfg->line_outs] =
2768 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2769 spec->mic_switch = 1;
2770 cfg->line_outs++;
2771 }
2772 break;
2773 case 1:
2774 /* add line-in as surr and mic as clfe */
7b043899 2775 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2776 cfg->line_out_pins[cfg->line_outs] =
2777 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2778 spec->line_switch = 1;
2779 cfg->line_outs++;
2780 }
7b043899 2781 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2782 cfg->line_out_pins[cfg->line_outs] =
2783 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2784 spec->mic_switch = 1;
2785 cfg->line_outs++;
2786 }
2787 break;
2788 }
2789
2790 return 0;
2791}
2792
7b043899
SL		 2793
2794static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2795{
2796 int i;
2797
2798 for (i = 0; i < spec->multiout.num_dacs; i++) {
2799 if (spec->multiout.dac_nids[i] == nid)
2800 return 1;
2801 }
2802
2803 return 0;
2804}
2805
3cc08dc6 2806/*
7b043899
SL		 2807 * Fill in the dac_nids table from the parsed pin configuration
2808 * This function only works when every pin in line_out_pins[]
2809 * contains atleast one DAC in its connection list. Some 92xx
2810 * codecs are not connected directly to a DAC, such as the 9200
2811 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2812 */
19039bd0 2813static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2814 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2815{
2816 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2817 int i, j, conn_len = 0;
2818 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2819 unsigned int wcaps, wtype;
2820
c7d4b2fa
M		 2821 for (i = 0; i < cfg->line_outs; i++) {
2822 nid = cfg->line_out_pins[i];
7b043899
SL		 2823 conn_len = snd_hda_get_connections(codec, nid, conn,
2824 HDA_MAX_CONNECTIONS);
2825 for (j = 0; j < conn_len; j++) {
2826 wcaps = snd_hda_param_read(codec, conn[j],
2827 AC_PAR_AUDIO_WIDGET_CAP);
2828 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2829 if (wtype != AC_WID_AUD_OUT ||
2830 (wcaps & AC_WCAP_DIGITAL))
2831 continue;
2832 /* conn[j] is a DAC routed to this line-out */
2833 if (!is_in_dac_nids(spec, conn[j]))
2834 break;
2835 }
2836
2837 if (j == conn_len) {
df802952
TI		 2838 if (spec->multiout.num_dacs > 0) {
2839 /* we have already working output pins,
2840 * so let's drop the broken ones again
2841 */
2842 cfg->line_outs = spec->multiout.num_dacs;
2843 break;
2844 }
7b043899
SL		 2845 /* error out, no available DAC found */
2846 snd_printk(KERN_ERR
2847 "%s: No available DAC for pin 0x%x\n",
2848 __func__, nid);
2849 return -ENODEV;
2850 }
2851
2852 spec->multiout.dac_nids[i] = conn[j];
2853 spec->multiout.num_dacs++;
2854 if (conn_len > 1) {
2855 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2856 snd_hda_codec_write_cache(codec, nid, 0,
2857 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2858
7b043899
SL		 2859 }
2860 }
c7d4b2fa 2861
7b043899
SL		 2862 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2863 spec->multiout.num_dacs,
2864 spec->multiout.dac_nids[0],
2865 spec->multiout.dac_nids[1],
2866 spec->multiout.dac_nids[2],
2867 spec->multiout.dac_nids[3],
2868 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2869 return 0;
2870}
2871
eb06ed8f
TI		 2872/* create volume control/switch for the given prefx type */
2873static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2874{
2875 char name[32];
2876 int err;
2877
2878 sprintf(name, "%s Playback Volume", pfx);
2879 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2880 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2881 if (err < 0)
2882 return err;
2883 sprintf(name, "%s Playback Switch", pfx);
2884 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2885 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2886 if (err < 0)
2887 return err;
2888 return 0;
2889}
2890
ae0afd81
MR		 2891static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2892{
2893 if (!spec->multiout.hp_nid)
2894 spec->multiout.hp_nid = nid;
2895 else if (spec->multiout.num_dacs > 4) {
2896 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2897 return 1;
2898 } else {
2899 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2900 spec->multiout.num_dacs++;
2901 }
2902 return 0;
2903}
2904
2905static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2906{
2907 if (is_in_dac_nids(spec, nid))
2908 return 1;
2909 if (spec->multiout.hp_nid == nid)
2910 return 1;
2911 return 0;
2912}
2913
c7d4b2fa 2914/* add playback controls from the parsed DAC table */
0fb87bb4 2915static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2916 const struct auto_pin_cfg *cfg)
c7d4b2fa 2917{
19039bd0
TI		 2918 static const char *chname[4] = {
2919 "Front", "Surround", NULL /*CLFE*/, "Side"
2920 };
d21995e3 2921 hda_nid_t nid = 0;
c7d4b2fa
M		 2922 int i, err;
2923
0fb87bb4 2924 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2925 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2926
2927
40ac8c4f 2928 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2929 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2930 continue;
2931
2932 nid = spec->multiout.dac_nids[i];
2933
2934 if (i == 2) {
2935 /* Center/LFE */
eb06ed8f
TI		 2936 err = create_controls(spec, "Center", nid, 1);
2937 if (err < 0)
c7d4b2fa 2938 return err;
eb06ed8f
TI		 2939 err = create_controls(spec, "LFE", nid, 2);
2940 if (err < 0)
c7d4b2fa 2941 return err;
0fb87bb4
ML		 2942
2943 wid_caps = get_wcaps(codec, nid);
2944
2945 if (wid_caps & AC_WCAP_LR_SWAP) {
2946 err = stac92xx_add_control(spec,
2947 STAC_CTL_WIDGET_CLFE_SWITCH,
2948 "Swap Center/LFE Playback Switch", nid);
2949
2950 if (err < 0)
2951 return err;
2952 }
2953
c7d4b2fa 2954 } else {
eb06ed8f
TI		 2955 err = create_controls(spec, chname[i], nid, 3);
2956 if (err < 0)
c7d4b2fa
M		 2957 return err;
2958 }
2959 }
2960
fedb7569
MR		 2961 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
2962 cfg->hp_outs && !spec->multiout.hp_nid)
2963 spec->multiout.hp_nid = nid;
2964
7c2ba97b
MR		 2965 if (cfg->hp_outs > 1) {
2966 err = stac92xx_add_control(spec,
2967 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 2968 "Headphone as Line Out Switch",
2969 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 2970 if (err < 0)
2971 return err;
2972 }
2973
b5895dc8
MR		 2974 if (spec->line_switch) {
2975 nid = cfg->input_pins[AUTO_PIN_LINE];
2976 pincap = snd_hda_param_read(codec, nid,
2977 AC_PAR_PIN_CAP);
2978 if (pincap & AC_PINCAP_OUT) {
2979 err = stac92xx_add_control(spec,
2980 STAC_CTL_WIDGET_IO_SWITCH,
2981 "Line In as Output Switch", nid << 8);
2982 if (err < 0)
2983 return err;
2984 }
2985 }
403d1944 2986
b5895dc8 2987 if (spec->mic_switch) {
cace16f1 2988 unsigned int def_conf;
ae0afd81
MR		 2989 unsigned int mic_pin = AUTO_PIN_MIC;
2990again:
2991 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2992 def_conf = snd_hda_codec_read(codec, nid, 0,
2993 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2994 /* some laptops have an internal analog microphone
2995 * which can't be used as a output */
2996 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2997 pincap = snd_hda_param_read(codec, nid,
2998 AC_PAR_PIN_CAP);
2999 if (pincap & AC_PINCAP_OUT) {
3000 err = stac92xx_add_control(spec,
3001 STAC_CTL_WIDGET_IO_SWITCH,
3002 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 3003 nid = snd_hda_codec_read(codec, nid, 0,
3004 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3005 if (!check_in_dac_nids(spec, nid))
3006 add_spec_dacs(spec, nid);
cace16f1
MR		 3007 if (err < 0)
3008 return err;
3009 }
ae0afd81
MR		 3010 } else if (mic_pin == AUTO_PIN_MIC) {
3011 mic_pin = AUTO_PIN_FRONT_MIC;
3012 goto again;
b5895dc8
MR		 3013 }
3014 }
403d1944 3015
c7d4b2fa
M		 3016 return 0;
3017}
3018
eb06ed8f
TI		 3019/* add playback controls for Speaker and HP outputs */
3020static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3021 struct auto_pin_cfg *cfg)
3022{
3023 struct sigmatel_spec *spec = codec->spec;
3024 hda_nid_t nid;
3025 int i, old_num_dacs, err;
3026
3027 old_num_dacs = spec->multiout.num_dacs;
3028 for (i = 0; i < cfg->hp_outs; i++) {
3029 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3030 if (wid_caps & AC_WCAP_UNSOL_CAP)
3031 spec->hp_detect = 1;
3032 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
3033 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3034 if (check_in_dac_nids(spec, nid))
3035 nid = 0;
3036 if (! nid)
c7d4b2fa 3037 continue;
eb06ed8f
TI		 3038 add_spec_dacs(spec, nid);
3039 }
3040 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 3041 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 3042 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3043 if (check_in_dac_nids(spec, nid))
3044 nid = 0;
eb06ed8f
TI		 3045 if (! nid)
3046 continue;
3047 add_spec_dacs(spec, nid);
c7d4b2fa 3048 }
1b290a51
MR		 3049 for (i = 0; i < cfg->line_outs; i++) {
3050 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
3051 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3052 if (check_in_dac_nids(spec, nid))
3053 nid = 0;
3054 if (! nid)
3055 continue;
3056 add_spec_dacs(spec, nid);
3057 }
eb06ed8f
TI		 3058 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
3059 static const char *pfxs[] = {
3060 "Speaker", "External Speaker", "Speaker2",
3061 };
3062 err = create_controls(spec, pfxs[i - old_num_dacs],
3063 spec->multiout.dac_nids[i], 3);
3064 if (err < 0)
3065 return err;
3066 }
3067 if (spec->multiout.hp_nid) {
2626a263
TI		 3068 err = create_controls(spec, "Headphone",
3069 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 3070 if (err < 0)
3071 return err;
3072 }
c7d4b2fa
M		 3073
3074 return 0;
3075}
3076
b22b4821 3077/* labels for mono mux outputs */
d0513fc6
MR		 3078static const char *stac92xx_mono_labels[4] = {
3079 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3080};
3081
3082/* create mono mux for mono out on capable codecs */
3083static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3084{
3085 struct sigmatel_spec *spec = codec->spec;
3086 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3087 int i, num_cons;
3088 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3089
3090 num_cons = snd_hda_get_connections(codec,
3091 spec->mono_nid,
3092 con_lst,
3093 HDA_MAX_NUM_INPUTS);
3094 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3095 return -EINVAL;
3096
3097 for (i = 0; i < num_cons; i++) {
3098 mono_mux->items[mono_mux->num_items].label =
3099 stac92xx_mono_labels[i];
3100 mono_mux->items[mono_mux->num_items].index = i;
3101 mono_mux->num_items++;
3102 }
09a99959
MR		 3103
3104 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3105 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3106}
3107
89385035
MR		 3108/* labels for amp mux outputs */
3109static const char *stac92xx_amp_labels[3] = {
4b33c767 3110 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3111};
3112
3113/* create amp out controls mux on capable codecs */
3114static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3115{
3116 struct sigmatel_spec *spec = codec->spec;
3117 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3118 int i, err;
3119
2a9c7816 3120 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3121 amp_mux->items[amp_mux->num_items].label =
3122 stac92xx_amp_labels[i];
3123 amp_mux->items[amp_mux->num_items].index = i;
3124 amp_mux->num_items++;
3125 }
3126
2a9c7816
MR		 3127 if (spec->num_amps > 1) {
3128 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3129 "Amp Selector Capture Switch", 0);
3130 if (err < 0)
3131 return err;
3132 }
89385035
MR		 3133 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3134 "Amp Capture Volume",
3135 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3136}
3137
3138
1cd2224c
MR		 3139/* create PC beep volume controls */
3140static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3141 hda_nid_t nid)
3142{
3143 struct sigmatel_spec *spec = codec->spec;
3144 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3145 int err;
3146
3147 /* check for mute support for the the amp */
3148 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3149 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3150 "PC Beep Playback Switch",
3151 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3152 if (err < 0)
3153 return err;
3154 }
3155
3156 /* check to see if there is volume support for the amp */
3157 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3158 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3159 "PC Beep Playback Volume",
3160 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3161 if (err < 0)
3162 return err;
3163 }
3164 return 0;
3165}
3166
4d4e9bb3
TI		 3167#ifdef CONFIG_SND_HDA_INPUT_BEEP
3168#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3169
3170static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3171 struct snd_ctl_elem_value *ucontrol)
3172{
3173 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3174 ucontrol->value.integer.value[0] = codec->beep->enabled;
3175 return 0;
3176}
3177
3178static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3179 struct snd_ctl_elem_value *ucontrol)
3180{
3181 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3182 int enabled = !!ucontrol->value.integer.value[0];
3183 if (codec->beep->enabled != enabled) {
3184 codec->beep->enabled = enabled;
3185 return 1;
3186 }
3187 return 0;
3188}
3189
3190static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3191 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3192 .info = stac92xx_dig_beep_switch_info,
3193 .get = stac92xx_dig_beep_switch_get,
3194 .put = stac92xx_dig_beep_switch_put,
3195};
3196
3197static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3198{
3199 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3200 0, "PC Beep Playback Switch", 0);
3201}
3202#endif
3203
4682eee0
MR		 3204static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3205{
3206 struct sigmatel_spec *spec = codec->spec;
3207 int wcaps, nid, i, err = 0;
3208
3209 for (i = 0; i < spec->num_muxes; i++) {
3210 nid = spec->mux_nids[i];
3211 wcaps = get_wcaps(codec, nid);
3212
3213 if (wcaps & AC_WCAP_OUT_AMP) {
3214 err = stac92xx_add_control_idx(spec,
3215 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3216 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3217 if (err < 0)
3218 return err;
3219 }
3220 }
3221 return 0;
3222};
3223
d9737751 3224static const char *stac92xx_spdif_labels[3] = {
65973632 3225 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3226};
3227
3228static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3229{
3230 struct sigmatel_spec *spec = codec->spec;
3231 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3232 const char **labels = spec->spdif_labels;
d9737751 3233 int i, num_cons;
65973632 3234 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3235
3236 num_cons = snd_hda_get_connections(codec,
3237 spec->smux_nids[0],
3238 con_lst,
3239 HDA_MAX_NUM_INPUTS);
65973632 3240 if (!num_cons)
d9737751
MR		 3241 return -EINVAL;
3242
65973632
MR		 3243 if (!labels)
3244 labels = stac92xx_spdif_labels;
3245
d9737751 3246 for (i = 0; i < num_cons; i++) {
65973632 3247 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3248 spdif_mux->items[spdif_mux->num_items].index = i;
3249 spdif_mux->num_items++;
3250 }
3251
3252 return 0;
3253}
3254
8b65727b 3255/* labels for dmic mux inputs */
ddc2cec4 3256static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3257 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3258 "Digital Mic 3", "Digital Mic 4"
3259};
3260
3261/* create playback/capture controls for input pins on dmic capable codecs */
3262static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3263 const struct auto_pin_cfg *cfg)
3264{
3265 struct sigmatel_spec *spec = codec->spec;
3266 struct hda_input_mux *dimux = &spec->private_dimux;
3267 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3268 int err, i, j;
3269 char name[32];
8b65727b
MP		 3270
3271 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3272 dimux->items[dimux->num_items].index = 0;
3273 dimux->num_items++;
3274
3275 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3276 hda_nid_t nid;
8b65727b
MP		 3277 int index;
3278 int num_cons;
0678accd 3279 unsigned int wcaps;
8b65727b
MP		 3280 unsigned int def_conf;
3281
3282 def_conf = snd_hda_codec_read(codec,
3283 spec->dmic_nids[i],
3284 0,
3285 AC_VERB_GET_CONFIG_DEFAULT,
3286 0);
3287 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3288 continue;
3289
0678accd 3290 nid = spec->dmic_nids[i];
8b65727b 3291 num_cons = snd_hda_get_connections(codec,
e1f0d669 3292 spec->dmux_nids[0],
8b65727b
MP		 3293 con_lst,
3294 HDA_MAX_NUM_INPUTS);
3295 for (j = 0; j < num_cons; j++)
0678accd 3296 if (con_lst[j] == nid) {
8b65727b
MP		 3297 index = j;
3298 goto found;
3299 }
3300 continue;
3301found:
d0513fc6
MR		 3302 wcaps = get_wcaps(codec, nid) &
3303 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3304
d0513fc6 3305 if (wcaps) {
0678accd
MR		 3306 sprintf(name, "%s Capture Volume",
3307 stac92xx_dmic_labels[dimux->num_items]);
3308
3309 err = stac92xx_add_control(spec,
3310 STAC_CTL_WIDGET_VOL,
3311 name,
d0513fc6
MR		 3312 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3313 (wcaps & AC_WCAP_OUT_AMP) ?
3314 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3315 if (err < 0)
3316 return err;
3317 }
3318
8b65727b
MP		 3319 dimux->items[dimux->num_items].label =
3320 stac92xx_dmic_labels[dimux->num_items];
3321 dimux->items[dimux->num_items].index = index;
3322 dimux->num_items++;
3323 }
3324
3325 return 0;
3326}
3327
c7d4b2fa
M		 3328/* create playback/capture controls for input pins */
3329static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3330{
3331 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3332 struct hda_input_mux *imux = &spec->private_imux;
3333 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3334 int i, j, k;
3335
3336 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3337 int index;
3338
3339 if (!cfg->input_pins[i])
3340 continue;
3341 index = -1;
3342 for (j = 0; j < spec->num_muxes; j++) {
3343 int num_cons;
3344 num_cons = snd_hda_get_connections(codec,
3345 spec->mux_nids[j],
3346 con_lst,
3347 HDA_MAX_NUM_INPUTS);
3348 for (k = 0; k < num_cons; k++)
3349 if (con_lst[k] == cfg->input_pins[i]) {
3350 index = k;
3351 goto found;
3352 }
c7d4b2fa 3353 }
314634bc
TI		 3354 continue;
3355 found:
3356 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3357 imux->items[imux->num_items].index = index;
3358 imux->num_items++;
c7d4b2fa
M		 3359 }
3360
7b043899 3361 if (imux->num_items) {
62fe78e9
SR		 3362 /*
3363 * Set the current input for the muxes.
3364 * The STAC9221 has two input muxes with identical source
3365 * NID lists. Hopefully this won't get confused.
3366 */
3367 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3368 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3369 AC_VERB_SET_CONNECT_SEL,
3370 imux->items[0].index);
62fe78e9
SR		 3371 }
3372 }
3373
c7d4b2fa
M		 3374 return 0;
3375}
3376
c7d4b2fa
M		 3377static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3378{
3379 struct sigmatel_spec *spec = codec->spec;
3380 int i;
3381
3382 for (i = 0; i < spec->autocfg.line_outs; i++) {
3383 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3384 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3385 }
3386}
3387
3388static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3389{
3390 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3391 int i;
c7d4b2fa 3392
eb06ed8f
TI		 3393 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3394 hda_nid_t pin;
3395 pin = spec->autocfg.hp_pins[i];
3396 if (pin) /* connect to front */
3397 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3398 }
3399 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3400 hda_nid_t pin;
3401 pin = spec->autocfg.speaker_pins[i];
3402 if (pin) /* connect to front */
3403 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3404 }
c7d4b2fa
M		 3405}
3406
3cc08dc6 3407static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3408{
3409 struct sigmatel_spec *spec = codec->spec;
3410 int err;
bcecd9bd 3411 int hp_speaker_swap = 0;
c7d4b2fa 3412
8b65727b
MP		 3413 if ((err = snd_hda_parse_pin_def_config(codec,
3414 &spec->autocfg,
3415 spec->dmic_nids)) < 0)
c7d4b2fa 3416 return err;
82bc955f 3417 if (! spec->autocfg.line_outs)
869264c4 3418 return 0; /* can't find valid pin config */
19039bd0 3419
bcecd9bd
JZ		 3420 /* If we have no real line-out pin and multiple hp-outs, HPs should
3421 * be set up as multi-channel outputs.
3422 */
3423 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3424 spec->autocfg.hp_outs > 1) {
3425 /* Copy hp_outs to line_outs, backup line_outs in
3426 * speaker_outs so that the following routines can handle
3427 * HP pins as primary outputs.
3428 */
3429 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3430 sizeof(spec->autocfg.line_out_pins));
3431 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3432 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3433 sizeof(spec->autocfg.hp_pins));
3434 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3435 hp_speaker_swap = 1;
3436 }
09a99959 3437 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3438 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3439 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3440 u32 caps = query_amp_caps(codec,
3441 spec->autocfg.mono_out_pin, dir);
3442 hda_nid_t conn_list[1];
3443
3444 /* get the mixer node and then the mono mux if it exists */
3445 if (snd_hda_get_connections(codec,
3446 spec->autocfg.mono_out_pin, conn_list, 1) &&
3447 snd_hda_get_connections(codec, conn_list[0],
3448 conn_list, 1)) {
3449
3450 int wcaps = get_wcaps(codec, conn_list[0]);
3451 int wid_type = (wcaps & AC_WCAP_TYPE)
3452 >> AC_WCAP_TYPE_SHIFT;
3453 /* LR swap check, some stac925x have a mux that
3454 * changes the DACs output path instead of the
3455 * mono-mux path.
3456 */
3457 if (wid_type == AC_WID_AUD_SEL &&
3458 !(wcaps & AC_WCAP_LR_SWAP))
3459 spec->mono_nid = conn_list[0];
3460 }
d0513fc6
MR		 3461 if (dir) {
3462 hda_nid_t nid = spec->autocfg.mono_out_pin;
3463
3464 /* most mono outs have a least a mute/unmute switch */
3465 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3466 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3467 "Mono Playback Switch",
3468 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3469 if (err < 0)
3470 return err;
d0513fc6
MR		 3471 /* check for volume support for the amp */
3472 if ((caps & AC_AMPCAP_NUM_STEPS)
3473 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3474 err = stac92xx_add_control(spec,
3475 STAC_CTL_WIDGET_VOL,
3476 "Mono Playback Volume",
3477 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3478 if (err < 0)
3479 return err;
3480 }
09a99959
MR		 3481 }
3482
3483 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3484 AC_PINCTL_OUT_EN);
3485 }
bcecd9bd 3486
403d1944
MP		 3487 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3488 return err;
19039bd0
TI		 3489 if (spec->multiout.num_dacs == 0)
3490 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3491 return err;
c7d4b2fa 3492
0fb87bb4
ML		 3493 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3494
3495 if (err < 0)
3496 return err;
3497
1cd2224c
MR		 3498 /* setup analog beep controls */
3499 if (spec->anabeep_nid > 0) {
3500 err = stac92xx_auto_create_beep_ctls(codec,
3501 spec->anabeep_nid);
3502 if (err < 0)
3503 return err;
3504 }
3505
3506 /* setup digital beep controls and input device */
3507#ifdef CONFIG_SND_HDA_INPUT_BEEP
3508 if (spec->digbeep_nid > 0) {
3509 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3510 unsigned int caps;
1cd2224c
MR		 3511
3512 err = stac92xx_auto_create_beep_ctls(codec, nid);
3513 if (err < 0)
3514 return err;
3515 err = snd_hda_attach_beep_device(codec, nid);
3516 if (err < 0)
3517 return err;
4d4e9bb3
TI		 3518 /* if no beep switch is available, make its own one */
3519 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3520 if (codec->beep &&
3521 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3522 err = stac92xx_beep_switch_ctl(codec);
3523 if (err < 0)
3524 return err;
3525 }
1cd2224c
MR		 3526 }
3527#endif
3528
bcecd9bd
JZ		 3529 if (hp_speaker_swap == 1) {
3530 /* Restore the hp_outs and line_outs */
3531 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3532 sizeof(spec->autocfg.line_out_pins));
3533 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3534 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3535 sizeof(spec->autocfg.speaker_pins));
3536 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3537 memset(spec->autocfg.speaker_pins, 0,
3538 sizeof(spec->autocfg.speaker_pins));
3539 spec->autocfg.speaker_outs = 0;
3540 }
3541
0fb87bb4
ML		 3542 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3543
3544 if (err < 0)
3545 return err;
3546
3547 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3548
3549 if (err < 0)
c7d4b2fa
M		 3550 return err;
3551
b22b4821
MR		 3552 if (spec->mono_nid > 0) {
3553 err = stac92xx_auto_create_mono_output_ctls(codec);
3554 if (err < 0)
3555 return err;
3556 }
2a9c7816 3557 if (spec->num_amps > 0) {
89385035
MR		 3558 err = stac92xx_auto_create_amp_output_ctls(codec);
3559 if (err < 0)
3560 return err;
3561 }
2a9c7816 3562 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3563 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3564 &spec->autocfg)) < 0)
3565 return err;
4682eee0
MR		 3566 if (spec->num_muxes > 0) {
3567 err = stac92xx_auto_create_mux_input_ctls(codec);
3568 if (err < 0)
3569 return err;
3570 }
d9737751
MR		 3571 if (spec->num_smuxes > 0) {
3572 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3573 if (err < 0)
3574 return err;
3575 }
8b65727b 3576
c7d4b2fa 3577 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3578 if (spec->multiout.max_channels > 2)
c7d4b2fa 3579 spec->surr_switch = 1;
c7d4b2fa 3580
82bc955f 3581 if (spec->autocfg.dig_out_pin)
3cc08dc6 3582 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3583 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3584 spec->dig_in_nid = dig_in;
c7d4b2fa 3585
603c4019
TI		 3586 if (spec->kctls.list)
3587 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3588
3589 spec->input_mux = &spec->private_imux;
2a9c7816 3590 spec->dinput_mux = &spec->private_dimux;
d9737751 3591 spec->sinput_mux = &spec->private_smux;
b22b4821 3592 spec->mono_mux = &spec->private_mono_mux;
89385035 3593 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3594 return 1;
3595}
3596
82bc955f
TI		 3597/* add playback controls for HP output */
3598static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3599 struct auto_pin_cfg *cfg)
3600{
3601 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3602 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3603 unsigned int wid_caps;
3604
3605 if (! pin)
3606 return 0;
3607
3608 wid_caps = get_wcaps(codec, pin);
505cb341 3609 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3610 spec->hp_detect = 1;
82bc955f
TI		 3611
3612 return 0;
3613}
3614
160ea0dc
RF		 3615/* add playback controls for LFE output */
3616static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3617 struct auto_pin_cfg *cfg)
3618{
3619 struct sigmatel_spec *spec = codec->spec;
3620 int err;
3621 hda_nid_t lfe_pin = 0x0;
3622 int i;
3623
3624 /*
3625 * search speaker outs and line outs for a mono speaker pin
3626 * with an amp. If one is found, add LFE controls
3627 * for it.
3628 */
3629 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3630 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3631 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3632 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3633 if (wcaps == AC_WCAP_OUT_AMP)
3634 /* found a mono speaker with an amp, must be lfe */
3635 lfe_pin = pin;
3636 }
3637
3638 /* if speaker_outs is 0, then speakers may be in line_outs */
3639 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3640 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3641 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3642 unsigned int defcfg;
8b551785 3643 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3644 AC_VERB_GET_CONFIG_DEFAULT,
3645 0x00);
8b551785 3646 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3647 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3648 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3649 if (wcaps == AC_WCAP_OUT_AMP)
3650 /* found a mono speaker with an amp,
3651 must be lfe */
3652 lfe_pin = pin;
3653 }
3654 }
3655 }
3656
3657 if (lfe_pin) {
eb06ed8f 3658 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3659 if (err < 0)
3660 return err;
3661 }
3662
3663 return 0;
3664}
3665
c7d4b2fa
M		 3666static int stac9200_parse_auto_config(struct hda_codec *codec)
3667{
3668 struct sigmatel_spec *spec = codec->spec;
3669 int err;
3670
df694daa 3671 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3672 return err;
3673
3674 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3675 return err;
3676
82bc955f
TI		 3677 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3678 return err;
3679
160ea0dc
RF		 3680 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3681 return err;
3682
355a0ec4
TI		 3683 if (spec->num_muxes > 0) {
3684 err = stac92xx_auto_create_mux_input_ctls(codec);
3685 if (err < 0)
3686 return err;
3687 }
3688
82bc955f 3689 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3690 spec->multiout.dig_out_nid = 0x05;
82bc955f 3691 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3692 spec->dig_in_nid = 0x04;
c7d4b2fa 3693
603c4019
TI		 3694 if (spec->kctls.list)
3695 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3696
3697 spec->input_mux = &spec->private_imux;
8b65727b 3698 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3699
3700 return 1;
3701}
3702
62fe78e9
SR		 3703/*
3704 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3705 * funky external mute control using GPIO pins.
3706 */
3707
76e1ddfb 3708static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3709 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3710{
3711 unsigned int gpiostate, gpiomask, gpiodir;
3712
3713 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3714 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3715 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3716
3717 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3718 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3719 gpiomask |= mask;
62fe78e9
SR		 3720
3721 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3722 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3723 gpiodir |= dir_mask;
62fe78e9 3724
76e1ddfb 3725 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3726 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3727
3728 snd_hda_codec_write(codec, codec->afg, 0,
3729 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3730 snd_hda_codec_read(codec, codec->afg, 0,
3731 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3732
3733 msleep(1);
3734
76e1ddfb
TI		 3735 snd_hda_codec_read(codec, codec->afg, 0,
3736 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3737}
3738
74aeaabc
MR		 3739static int stac92xx_add_jack(struct hda_codec *codec,
3740 hda_nid_t nid, int type)
3741{
e4973e1e 3742#ifdef CONFIG_SND_JACK
74aeaabc
MR		 3743 struct sigmatel_spec *spec = codec->spec;
3744 struct sigmatel_jack *jack;
3745 int def_conf = snd_hda_codec_read(codec, nid,
3746 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3747 int connectivity = get_defcfg_connect(def_conf);
3748 char name[32];
3749
3750 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3751 return 0;
3752
3753 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3754 jack = snd_array_new(&spec->jacks);
3755 if (!jack)
3756 return -ENOMEM;
3757 jack->nid = nid;
3758 jack->type = type;
3759
3760 sprintf(name, "%s at %s %s Jack",
3761 snd_hda_get_jack_type(def_conf),
3762 snd_hda_get_jack_connectivity(def_conf),
3763 snd_hda_get_jack_location(def_conf));
3764
3765 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI		 3766#else
3767 return 0;
3768#endif
74aeaabc
MR		 3769}
3770
3771static int stac92xx_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3772 int data)
3773{
3774 struct sigmatel_event *event;
3775
3776 snd_array_init(&spec->events, sizeof(*event), 32);
3777 event = snd_array_new(&spec->events);
3778 if (!event)
3779 return -ENOMEM;
3780 event->nid = nid;
3781 event->data = data;
3782
3783 return 0;
3784}
3785
3786static int stac92xx_event_data(struct hda_codec *codec, hda_nid_t nid)
3787{
3788 struct sigmatel_spec *spec = codec->spec;
3789 struct sigmatel_event *events = spec->events.list;
3790 if (events) {
3791 int i;
3792 for (i = 0; i < spec->events.used; i++)
3793 if (events[i].nid == nid)
3794 return events[i].data;
3795 }
3796 return 0;
3797}
3798
314634bc
TI		 3799static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3800 unsigned int event)
3801{
74aeaabc 3802 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
dc81bed1
TI		 3803 snd_hda_codec_write_cache(codec, nid, 0,
3804 AC_VERB_SET_UNSOLICITED_ENABLE,
74aeaabc
MR		 3805 (AC_USRSP_EN | event | nid));
3806 }
314634bc
TI		 3807}
3808
a64135a2
MR		 3809static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3810{
3811 int i;
3812 for (i = 0; i < cfg->hp_outs; i++)
3813 if (cfg->hp_pins[i] == nid)
3814 return 1; /* nid is a HP-Out */
3815
3816 return 0; /* nid is not a HP-Out */
3817};
3818
b76c850f
MR		 3819static void stac92xx_power_down(struct hda_codec *codec)
3820{
3821 struct sigmatel_spec *spec = codec->spec;
3822
3823 /* power down inactive DACs */
3824 hda_nid_t *dac;
3825 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3826 if (!is_in_dac_nids(spec, *dac) &&
3827 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3828 snd_hda_codec_write_cache(codec, *dac, 0,
3829 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3830}
3831
c7d4b2fa
M		 3832static int stac92xx_init(struct hda_codec *codec)
3833{
3834 struct sigmatel_spec *spec = codec->spec;
82bc955f 3835 struct auto_pin_cfg *cfg = &spec->autocfg;
e4973e1e 3836 int i;
c7d4b2fa 3837
c7d4b2fa
M		 3838 snd_hda_sequence_write(codec, spec->init);
3839
8daaaa97
MR		 3840 /* power down adcs initially */
3841 if (spec->powerdown_adcs)
3842 for (i = 0; i < spec->num_adcs; i++)
3843 snd_hda_codec_write_cache(codec,
3844 spec->adc_nids[i], 0,
3845 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
82bc955f
TI		 3846 /* set up pins */
3847 if (spec->hp_detect) {
505cb341 3848 /* Enable unsolicited responses on the HP widget */
74aeaabc 3849 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc
MR		 3850 hda_nid_t nid = cfg->hp_pins[i];
3851 enable_pin_detect(codec, nid, STAC_HP_EVENT | nid);
74aeaabc 3852 }
0a07acaf
TI		 3853 /* force to enable the first line-out; the others are set up
3854 * in unsol_event
3855 */
3856 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3857 AC_PINCTL_OUT_EN);
82bc955f 3858 /* fake event to set up pins */
74aeaabc
MR		 3859 codec->patch_ops.unsol_event(codec,
3860 (STAC_HP_EVENT | spec->autocfg.hp_pins[0]) << 26);
82bc955f
TI		 3861 } else {
3862 stac92xx_auto_init_multi_out(codec);
3863 stac92xx_auto_init_hp_out(codec);
3864 }
3865 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3866 hda_nid_t nid = cfg->input_pins[i];
3867 if (nid) {
4f1e6bc3
TI		 3868 unsigned int pinctl;
3869 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3870 /* for mic pins, force to initialize */
3871 pinctl = stac92xx_get_vref(codec, nid);
3872 } else {
3873 pinctl = snd_hda_codec_read(codec, nid, 0,
3874 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3875 /* if PINCTL already set then skip */
3876 if (pinctl & AC_PINCTL_IN_EN)
3877 continue;
3878 }
3879 pinctl |= AC_PINCTL_IN_EN;
c960a03b 3880 stac92xx_auto_set_pinctl(codec, nid, pinctl);
74aeaabc 3881 enable_pin_detect(codec, nid, STAC_INSERT_EVENT | nid);
c960a03b 3882 }
82bc955f 3883 }
a64135a2
MR		 3884 for (i = 0; i < spec->num_dmics; i++)
3885 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3886 AC_PINCTL_IN_EN);
3887 for (i = 0; i < spec->num_pwrs; i++) {
3888 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3889 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3890 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3891 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3892 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3893 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3894 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3895 /* outputs are only ports capable of power management
3896 * any attempts on powering down a input port cause the
3897 * referenced VREF to act quirky.
3898 */
3899 if (pinctl & AC_PINCTL_IN_EN)
3900 continue;
aafc4412
MR		 3901 /* skip any ports that don't have jacks since presence
3902 * detection is useless */
3903 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3904 continue;
a64135a2
MR		 3905 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3906 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3907 }
b76c850f
MR		 3908 if (spec->dac_list)
3909 stac92xx_power_down(codec);
82bc955f
TI		 3910 if (cfg->dig_out_pin)
3911 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3912 AC_PINCTL_OUT_EN);
3913 if (cfg->dig_in_pin)
3914 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3915 AC_PINCTL_IN_EN);
3916
4fe5195c
MR		 3917 stac_gpio_set(codec, spec->gpio_mask,
3918 spec->gpio_dir, spec->gpio_data);
62fe78e9 3919
c7d4b2fa
M		 3920 return 0;
3921}
3922
74aeaabc
MR		 3923static void stac92xx_free_jacks(struct hda_codec *codec)
3924{
e4973e1e 3925#ifdef CONFIG_SND_JACK
b94d3539 3926 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 3927 struct sigmatel_spec *spec = codec->spec;
b94d3539 3928 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 3929 struct sigmatel_jack *jacks = spec->jacks.list;
3930 int i;
3931 for (i = 0; i < spec->jacks.used; i++)
3932 snd_device_free(codec->bus->card, &jacks[i].jack);
3933 }
3934 snd_array_free(&spec->jacks);
e4973e1e 3935#endif
74aeaabc
MR		 3936}
3937
603c4019
TI		 3938static void stac92xx_free_kctls(struct hda_codec *codec)
3939{
3940 struct sigmatel_spec *spec = codec->spec;
3941
3942 if (spec->kctls.list) {
3943 struct snd_kcontrol_new *kctl = spec->kctls.list;
3944 int i;
3945 for (i = 0; i < spec->kctls.used; i++)
3946 kfree(kctl[i].name);
3947 }
3948 snd_array_free(&spec->kctls);
3949}
3950
2f2f4251
M		 3951static void stac92xx_free(struct hda_codec *codec)
3952{
c7d4b2fa 3953 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3954
3955 if (! spec)
3956 return;
3957
af9f341a 3958 kfree(spec->pin_configs);
74aeaabc
MR		 3959 stac92xx_free_jacks(codec);
3960 snd_array_free(&spec->events);
11b44bbd 3961
c7d4b2fa 3962 kfree(spec);
1cd2224c 3963 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3964}
3965
4e55096e
M		 3966static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3967 unsigned int flag)
3968{
3969 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3970 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3971
f9acba43
TI		 3972 if (pin_ctl & AC_PINCTL_IN_EN) {
3973 /*
3974 * we need to check the current set-up direction of
3975 * shared input pins since they can be switched via
3976 * "xxx as Output" mixer switch
3977 */
3978 struct sigmatel_spec *spec = codec->spec;
3979 struct auto_pin_cfg *cfg = &spec->autocfg;
3980 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3981 spec->line_switch) ||
3982 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3983 spec->mic_switch))
3984 return;
3985 }
3986
7b043899
SL		 3987 /* if setting pin direction bits, clear the current
3988 direction bits first */
3989 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3990 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3991
82beb8fd 3992 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3993 AC_VERB_SET_PIN_WIDGET_CONTROL,
3994 pin_ctl | flag);
3995}
3996
3997static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3998 unsigned int flag)
3999{
4000 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4001 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 4002 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4003 AC_VERB_SET_PIN_WIDGET_CONTROL,
4004 pin_ctl & ~flag);
4005}
4006
40c1d308 4007static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4008{
4009 if (!nid)
4010 return 0;
4011 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 4012 & (1 << 31)) {
4013 unsigned int pinctl;
4014 pinctl = snd_hda_codec_read(codec, nid, 0,
4015 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4016 if (pinctl & AC_PINCTL_IN_EN)
4017 return 0; /* mic- or line-input */
4018 else
4019 return 1; /* HP-output */
4020 }
314634bc
TI		 4021 return 0;
4022}
4023
d7a89436
TI		 4024/* return non-zero if the hp-pin of the given array index isn't
4025 * a jack-detection target
4026 */
4027static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4028{
4029 struct auto_pin_cfg *cfg = &spec->autocfg;
4030
4031 /* ignore sensing of shared line and mic jacks */
4032 if (spec->line_switch &&
4033 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_LINE])
4034 return 1;
4035 if (spec->mic_switch &&
4036 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_MIC])
4037 return 1;
4038 /* ignore if the pin is set as line-out */
4039 if (cfg->hp_pins[i] == spec->hp_switch)
4040 return 1;
4041 return 0;
4042}
4043
314634bc 4044static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 4045{
4046 struct sigmatel_spec *spec = codec->spec;
4047 struct auto_pin_cfg *cfg = &spec->autocfg;
4048 int i, presence;
4049
eb06ed8f 4050 presence = 0;
4fe5195c
MR		 4051 if (spec->gpio_mute)
4052 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4053 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4054
eb06ed8f 4055 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4056 if (presence)
4057 break;
d7a89436
TI		 4058 if (no_hp_sensing(spec, i))
4059 continue;
4fe5195c 4060 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 4061 }
4e55096e
M		 4062
4063 if (presence) {
d7a89436 4064 /* disable lineouts */
7c2ba97b 4065 if (spec->hp_switch)
d7a89436
TI		 4066 stac92xx_reset_pinctl(codec, spec->hp_switch,
4067 AC_PINCTL_OUT_EN);
4e55096e
M		 4068 for (i = 0; i < cfg->line_outs; i++)
4069 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4070 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4071 for (i = 0; i < cfg->speaker_outs; i++)
4072 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4073 AC_PINCTL_OUT_EN);
c0cea0d0 4074 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4075 stac_gpio_set(codec, spec->gpio_mask,
4076 spec->gpio_dir, spec->gpio_data &
4077 ~spec->eapd_mask);
4e55096e 4078 } else {
d7a89436 4079 /* enable lineouts */
7c2ba97b 4080 if (spec->hp_switch)
d7a89436
TI		 4081 stac92xx_set_pinctl(codec, spec->hp_switch,
4082 AC_PINCTL_OUT_EN);
4e55096e
M		 4083 for (i = 0; i < cfg->line_outs; i++)
4084 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4085 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4086 for (i = 0; i < cfg->speaker_outs; i++)
4087 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4088 AC_PINCTL_OUT_EN);
c0cea0d0 4089 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4090 stac_gpio_set(codec, spec->gpio_mask,
4091 spec->gpio_dir, spec->gpio_data |
4092 spec->eapd_mask);
4e55096e 4093 }
d7a89436
TI		 4094 /* toggle hp outs */
4095 for (i = 0; i < cfg->hp_outs; i++) {
4096 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4097 if (no_hp_sensing(spec, i))
4098 continue;
4099 if (presence)
4100 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
4101 else
4102 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
4103 }
4e55096e
M		 4104}
4105
a64135a2
MR		 4106static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
4107{
4108 struct sigmatel_spec *spec = codec->spec;
4109 hda_nid_t nid = spec->pwr_nids[idx];
4110 int presence, val;
4111 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
4112 & 0x000000ff;
4113 presence = get_hp_pin_presence(codec, nid);
d0513fc6
MR		 4114
4115 /* several codecs have two power down bits */
4116 if (spec->pwr_mapping)
4117 idx = spec->pwr_mapping[idx];
4118 else
4119 idx = 1 << idx;
a64135a2
MR		 4120
4121 if (presence)
4122 val &= ~idx;
4123 else
4124 val |= idx;
4125
4126 /* power down unused output ports */
4127 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4128}
4129
4130static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4131{
4132 struct sigmatel_spec *spec = codec->spec;
4133 struct sigmatel_jack *jacks = spec->jacks.list;
4134
4135 if (jacks) {
4136 int i;
4137 for (i = 0; i < spec->jacks.used; i++) {
4138 if (jacks->nid == nid) {
4139 unsigned int pin_ctl =
4140 snd_hda_codec_read(codec, nid,
4141 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4142 0x00);
4143 int type = jacks->type;
4144 if (type == (SND_JACK_LINEOUT
4145 | SND_JACK_HEADPHONE))
4146 type = (pin_ctl & AC_PINCTL_HP_EN)
4147 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4148 snd_jack_report(jacks->jack,
4149 get_hp_pin_presence(codec, nid)
4150 ? type : 0);
4151 }
4152 jacks++;
4153 }
4154 }
4155}
a64135a2 4156
314634bc
TI		 4157static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4158{
a64135a2 4159 struct sigmatel_spec *spec = codec->spec;
74aeaabc
MR		 4160 int event = (res >> 26) & 0x70;
4161 int nid = res >> 26 & 0x0f;
a64135a2 4162
74aeaabc 4163 switch (event) {
314634bc
TI		 4164 case STAC_HP_EVENT:
4165 stac92xx_hp_detect(codec, res);
a64135a2 4166 /* fallthru */
74aeaabc 4167 case STAC_INSERT_EVENT:
a64135a2 4168 case STAC_PWR_EVENT:
74aeaabc
MR		 4169 if (nid) {
4170 if (spec->num_pwrs > 0)
4171 stac92xx_pin_sense(codec, nid);
4172 stac92xx_report_jack(codec, nid);
4173 }
72474be6
MR		 4174 break;
4175 case STAC_VREF_EVENT: {
4176 int data = snd_hda_codec_read(codec, codec->afg, 0,
4177 AC_VERB_GET_GPIO_DATA, 0);
74aeaabc 4178 int idx = stac92xx_event_data(codec, nid);
72474be6
MR		 4179 /* toggle VREF state based on GPIOx status */
4180 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
4181 !!(data & (1 << idx)));
4182 break;
4183 }
314634bc
TI		 4184 }
4185}
4186
cb53c626 4187#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4188static int stac92xx_resume(struct hda_codec *codec)
4189{
dc81bed1
TI		 4190 struct sigmatel_spec *spec = codec->spec;
4191
11b44bbd 4192 stac92xx_set_config_regs(codec);
2c885878 4193 stac92xx_init(codec);
82beb8fd
TI		 4194 snd_hda_codec_resume_amp(codec);
4195 snd_hda_codec_resume_cache(codec);
2c885878 4196 /* fake event to set up pins again to override cached values */
dc81bed1 4197 if (spec->hp_detect)
2c885878
TI		 4198 codec->patch_ops.unsol_event(codec,
4199 (STAC_HP_EVENT | spec->autocfg.hp_pins[0]) << 26);
ff6fdc37
M		 4200 return 0;
4201}
c6798d2b
MR		 4202
4203static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4204{
4205 struct sigmatel_spec *spec = codec->spec;
4206 if (spec->eapd_mask)
4207 stac_gpio_set(codec, spec->gpio_mask,
4208 spec->gpio_dir, spec->gpio_data &
4209 ~spec->eapd_mask);
4210 return 0;
4211}
ff6fdc37
M		 4212#endif
4213
2f2f4251
M		 4214static struct hda_codec_ops stac92xx_patch_ops = {
4215 .build_controls = stac92xx_build_controls,
4216 .build_pcms = stac92xx_build_pcms,
4217 .init = stac92xx_init,
4218 .free = stac92xx_free,
4e55096e 4219 .unsol_event = stac92xx_unsol_event,
cb53c626 4220#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4221 .suspend = stac92xx_suspend,
ff6fdc37
M		 4222 .resume = stac92xx_resume,
4223#endif
2f2f4251
M		 4224};
4225
4226static int patch_stac9200(struct hda_codec *codec)
4227{
4228 struct sigmatel_spec *spec;
c7d4b2fa 4229 int err;
2f2f4251 4230
e560d8d8 4231 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4232 if (spec == NULL)
4233 return -ENOMEM;
4234
4235 codec->spec = spec;
a4eed138 4236 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4237 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4238 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4239 stac9200_models,
4240 stac9200_cfg_tbl);
11b44bbd
RF		 4241 if (spec->board_config < 0) {
4242 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4243 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4244 } else
4245 err = stac_save_pin_cfgs(codec,
4246 stac9200_brd_tbl[spec->board_config]);
4247 if (err < 0) {
4248 stac92xx_free(codec);
4249 return err;
403d1944 4250 }
2f2f4251
M		 4251
4252 spec->multiout.max_channels = 2;
4253 spec->multiout.num_dacs = 1;
4254 spec->multiout.dac_nids = stac9200_dac_nids;
4255 spec->adc_nids = stac9200_adc_nids;
4256 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4257 spec->num_muxes = 1;
8b65727b 4258 spec->num_dmics = 0;
9e05b7a3 4259 spec->num_adcs = 1;
a64135a2 4260 spec->num_pwrs = 0;
c7d4b2fa 4261
bf277785
TD		 4262 if (spec->board_config == STAC_9200_GATEWAY ||
4263 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4264 spec->init = stac9200_eapd_init;
4265 else
4266 spec->init = stac9200_core_init;
2f2f4251 4267 spec->mixer = stac9200_mixer;
c7d4b2fa 4268
117f257d
TI		 4269 if (spec->board_config == STAC_9200_PANASONIC) {
4270 spec->gpio_mask = spec->gpio_dir = 0x09;
4271 spec->gpio_data = 0x00;
4272 }
4273
c7d4b2fa
M		 4274 err = stac9200_parse_auto_config(codec);
4275 if (err < 0) {
4276 stac92xx_free(codec);
4277 return err;
4278 }
2f2f4251
M		 4279
4280 codec->patch_ops = stac92xx_patch_ops;
4281
4282 return 0;
4283}
4284
8e21c34c
TD		 4285static int patch_stac925x(struct hda_codec *codec)
4286{
4287 struct sigmatel_spec *spec;
4288 int err;
4289
4290 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4291 if (spec == NULL)
4292 return -ENOMEM;
4293
4294 codec->spec = spec;
a4eed138 4295 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 4296 spec->pin_nids = stac925x_pin_nids;
4297 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
4298 stac925x_models,
4299 stac925x_cfg_tbl);
9e507abd 4300 again:
8e21c34c 4301 if (spec->board_config < 0) {
2c11f955
TD		 4302 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
4303 "using BIOS defaults\n");
8e21c34c 4304 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4305 } else
4306 err = stac_save_pin_cfgs(codec,
4307 stac925x_brd_tbl[spec->board_config]);
4308 if (err < 0) {
4309 stac92xx_free(codec);
4310 return err;
8e21c34c
TD		 4311 }
4312
4313 spec->multiout.max_channels = 2;
4314 spec->multiout.num_dacs = 1;
4315 spec->multiout.dac_nids = stac925x_dac_nids;
4316 spec->adc_nids = stac925x_adc_nids;
4317 spec->mux_nids = stac925x_mux_nids;
4318 spec->num_muxes = 1;
9e05b7a3 4319 spec->num_adcs = 1;
a64135a2 4320 spec->num_pwrs = 0;
2c11f955
TD		 4321 switch (codec->vendor_id) {
4322 case 0x83847632: /* STAC9202 */
4323 case 0x83847633: /* STAC9202D */
4324 case 0x83847636: /* STAC9251 */
4325 case 0x83847637: /* STAC9251D */
f6e9852a 4326 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4327 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4328 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4329 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4330 break;
4331 default:
4332 spec->num_dmics = 0;
4333 break;
4334 }
8e21c34c
TD		 4335
4336 spec->init = stac925x_core_init;
4337 spec->mixer = stac925x_mixer;
4338
4339 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4340 if (!err) {
4341 if (spec->board_config < 0) {
4342 printk(KERN_WARNING "hda_codec: No auto-config is "
4343 "available, default to model=ref\n");
4344 spec->board_config = STAC_925x_REF;
4345 goto again;
4346 }
4347 err = -EINVAL;
4348 }
8e21c34c
TD		 4349 if (err < 0) {
4350 stac92xx_free(codec);
4351 return err;
4352 }
4353
4354 codec->patch_ops = stac92xx_patch_ops;
4355
4356 return 0;
4357}
4358
e1f0d669
MR		 4359static struct hda_input_mux stac92hd73xx_dmux = {
4360 .num_items = 4,
4361 .items = {
4362 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4363 { "Digital Mic 1", 0x09 },
4364 { "Digital Mic 2", 0x0a },
2a9c7816 4365 { "CD", 0x08 },
e1f0d669
MR		 4366 }
4367};
4368
4369static int patch_stac92hd73xx(struct hda_codec *codec)
4370{
4371 struct sigmatel_spec *spec;
4372 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4373 int err = 0;
4374
4375 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4376 if (spec == NULL)
4377 return -ENOMEM;
4378
4379 codec->spec = spec;
e99d32b3 4380 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4381 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4382 spec->pin_nids = stac92hd73xx_pin_nids;
4383 spec->board_config = snd_hda_check_board_config(codec,
4384 STAC_92HD73XX_MODELS,
4385 stac92hd73xx_models,
4386 stac92hd73xx_cfg_tbl);
4387again:
4388 if (spec->board_config < 0) {
4389 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4390 " STAC92HD73XX, using BIOS defaults\n");
4391 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4392 } else
4393 err = stac_save_pin_cfgs(codec,
4394 stac92hd73xx_brd_tbl[spec->board_config]);
4395 if (err < 0) {
4396 stac92xx_free(codec);
4397 return err;
e1f0d669
MR		 4398 }
4399
4400 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4401 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4402
4403 if (spec->multiout.num_dacs < 0) {
4404 printk(KERN_WARNING "hda_codec: Could not determine "
4405 "number of channels defaulting to DAC count\n");
4406 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4407 }
4408
4409 switch (spec->multiout.num_dacs) {
4410 case 0x3: /* 6 Channel */
4411 spec->mixer = stac92hd73xx_6ch_mixer;
4412 spec->init = stac92hd73xx_6ch_core_init;
4413 break;
4414 case 0x4: /* 8 Channel */
e1f0d669
MR		 4415 spec->mixer = stac92hd73xx_8ch_mixer;
4416 spec->init = stac92hd73xx_8ch_core_init;
4417 break;
4418 case 0x5: /* 10 Channel */
e1f0d669
MR		 4419 spec->mixer = stac92hd73xx_10ch_mixer;
4420 spec->init = stac92hd73xx_10ch_core_init;
4421 };
4422
4423 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4424 spec->aloopback_mask = 0x01;
4425 spec->aloopback_shift = 8;
4426
1cd2224c 4427 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4428 spec->mux_nids = stac92hd73xx_mux_nids;
4429 spec->adc_nids = stac92hd73xx_adc_nids;
4430 spec->dmic_nids = stac92hd73xx_dmic_nids;
4431 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4432 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4433 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4434 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4435
4436 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4437 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4438 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4439 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4440 sizeof(stac92hd73xx_dmux));
4441
a7662640 4442 switch (spec->board_config) {
6b3ab21e 4443 case STAC_DELL_EQ:
d654a660 4444 spec->init = dell_eq_core_init;
6b3ab21e
MR		 4445 /* fallthru */
4446 case STAC_DELL_M6:
2a9c7816 4447 spec->num_smuxes = 0;
2a9c7816
MR		 4448 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4449 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4450 spec->eapd_switch = 0;
2a9c7816 4451 spec->num_amps = 1;
6b3ab21e
MR		 4452
4453 if (!spec->init)
4454 spec->init = dell_m6_core_init;
a7662640
MR		 4455 switch (codec->subsystem_id) {
4456 case 0x1028025e: /* Analog Mics */
4457 case 0x1028025f:
4458 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4459 spec->num_dmics = 0;
2a9c7816 4460 spec->private_dimux.num_items = 1;
a7662640 4461 break;
d654a660 4462 case 0x10280271: /* Digital Mics */
a7662640 4463 case 0x10280272:
d654a660
MR		 4464 case 0x10280254:
4465 case 0x10280255:
a7662640
MR		 4466 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4467 spec->num_dmics = 1;
2a9c7816 4468 spec->private_dimux.num_items = 2;
a7662640
MR		 4469 break;
4470 case 0x10280256: /* Both */
4471 case 0x10280057:
4472 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4473 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4474 spec->num_dmics = 1;
2a9c7816 4475 spec->private_dimux.num_items = 2;
a7662640
MR		 4476 break;
4477 }
4478 break;
4479 default:
4480 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4481 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4482 spec->eapd_switch = 1;
a7662640 4483 }
b2c4f4d7
MR		 4484 if (spec->board_config > STAC_92HD73XX_REF) {
4485 /* GPIO0 High = Enable EAPD */
4486 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4487 spec->gpio_data = 0x01;
4488 }
2a9c7816 4489 spec->dinput_mux = &spec->private_dimux;
a7662640 4490
a64135a2
MR		 4491 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4492 spec->pwr_nids = stac92hd73xx_pwr_nids;
4493
d9737751 4494 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4495
4496 if (!err) {
4497 if (spec->board_config < 0) {
4498 printk(KERN_WARNING "hda_codec: No auto-config is "
4499 "available, default to model=ref\n");
4500 spec->board_config = STAC_92HD73XX_REF;
4501 goto again;
4502 }
4503 err = -EINVAL;
4504 }
4505
4506 if (err < 0) {
4507 stac92xx_free(codec);
4508 return err;
4509 }
4510
4511 codec->patch_ops = stac92xx_patch_ops;
4512
4513 return 0;
4514}
4515
d0513fc6
MR		 4516static struct hda_input_mux stac92hd83xxx_dmux = {
4517 .num_items = 3,
4518 .items = {
4519 { "Analog Inputs", 0x03 },
4520 { "Digital Mic 1", 0x04 },
4521 { "Digital Mic 2", 0x05 },
4522 }
4523};
4524
4525static int patch_stac92hd83xxx(struct hda_codec *codec)
4526{
4527 struct sigmatel_spec *spec;
4528 int err;
4529
4530 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4531 if (spec == NULL)
4532 return -ENOMEM;
4533
4534 codec->spec = spec;
0ffa9807 4535 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4536 spec->mono_nid = 0x19;
4537 spec->digbeep_nid = 0x21;
4538 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4539 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4540 spec->adc_nids = stac92hd83xxx_adc_nids;
4541 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4542 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4543 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4544 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4545
4546 spec->init = stac92hd83xxx_core_init;
4547 switch (codec->vendor_id) {
4548 case 0x111d7605:
4549 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4550 break;
4551 default:
4552 spec->num_pwrs--;
4553 spec->init++; /* switch to config #2 */
4554 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4555 }
4556
4557 spec->mixer = stac92hd83xxx_mixer;
4558 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4559 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4560 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4561 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4562 spec->dinput_mux = &stac92hd83xxx_dmux;
4563 spec->pin_nids = stac92hd83xxx_pin_nids;
4564 spec->board_config = snd_hda_check_board_config(codec,
4565 STAC_92HD83XXX_MODELS,
4566 stac92hd83xxx_models,
4567 stac92hd83xxx_cfg_tbl);
4568again:
4569 if (spec->board_config < 0) {
4570 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4571 " STAC92HD83XXX, using BIOS defaults\n");
4572 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4573 } else
4574 err = stac_save_pin_cfgs(codec,
4575 stac92hd83xxx_brd_tbl[spec->board_config]);
4576 if (err < 0) {
4577 stac92xx_free(codec);
4578 return err;
d0513fc6
MR		 4579 }
4580
4581 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4582 if (!err) {
4583 if (spec->board_config < 0) {
4584 printk(KERN_WARNING "hda_codec: No auto-config is "
4585 "available, default to model=ref\n");
4586 spec->board_config = STAC_92HD83XXX_REF;
4587 goto again;
4588 }
4589 err = -EINVAL;
4590 }
4591
4592 if (err < 0) {
4593 stac92xx_free(codec);
4594 return err;
4595 }
4596
4597 codec->patch_ops = stac92xx_patch_ops;
4598
4599 return 0;
4600}
4601
8daaaa97
MR		 4602#ifdef SND_HDA_NEEDS_RESUME
4603static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4604{
4605 struct sigmatel_spec *spec = codec->spec;
4606 int i;
4607 snd_hda_codec_write_cache(codec, codec->afg, 0,
4608 AC_VERB_SET_POWER_STATE, pwr);
4609
4610 msleep(1);
4611 for (i = 0; i < spec->num_adcs; i++) {
4612 snd_hda_codec_write_cache(codec,
4613 spec->adc_nids[i], 0,
4614 AC_VERB_SET_POWER_STATE, pwr);
4615 }
4616};
4617
4618static int stac92hd71xx_resume(struct hda_codec *codec)
4619{
4620 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4621 return stac92xx_resume(codec);
4622}
4623
4624static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4625{
4626 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
c6798d2b 4627 return stac92xx_suspend(codec, state);
8daaaa97
MR		 4628};
4629
4630#endif
4631
4632static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4633 .build_controls = stac92xx_build_controls,
4634 .build_pcms = stac92xx_build_pcms,
4635 .init = stac92xx_init,
4636 .free = stac92xx_free,
4637 .unsol_event = stac92xx_unsol_event,
4638#ifdef SND_HDA_NEEDS_RESUME
8daaaa97 4639 .suspend = stac92hd71xx_suspend,
c6798d2b 4640 .resume = stac92hd71xx_resume,
8daaaa97
MR		 4641#endif
4642};
d0513fc6 4643
4b33c767
MR		 4644static struct hda_input_mux stac92hd71bxx_dmux = {
4645 .num_items = 4,
4646 .items = {
4647 { "Analog Inputs", 0x00 },
4648 { "Mixer", 0x01 },
4649 { "Digital Mic 1", 0x02 },
4650 { "Digital Mic 2", 0x03 },
4651 }
4652};
4653
e035b841
MR		 4654static int patch_stac92hd71bxx(struct hda_codec *codec)
4655{
4656 struct sigmatel_spec *spec;
4657 int err = 0;
4658
4659 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4660 if (spec == NULL)
4661 return -ENOMEM;
4662
4663 codec->spec = spec;
8daaaa97 4664 codec->patch_ops = stac92xx_patch_ops;
e035b841 4665 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4666 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4667 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4668 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4669 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4670 spec->board_config = snd_hda_check_board_config(codec,
4671 STAC_92HD71BXX_MODELS,
4672 stac92hd71bxx_models,
4673 stac92hd71bxx_cfg_tbl);
4674again:
4675 if (spec->board_config < 0) {
4676 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4677 " STAC92HD71BXX, using BIOS defaults\n");
4678 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4679 } else
4680 err = stac_save_pin_cfgs(codec,
4681 stac92hd71bxx_brd_tbl[spec->board_config]);
4682 if (err < 0) {
4683 stac92xx_free(codec);
4684 return err;
e035b841
MR		 4685 }
4686
41c3b648
TI		 4687 if (spec->board_config > STAC_92HD71BXX_REF) {
4688 /* GPIO0 = EAPD */
4689 spec->gpio_mask = 0x01;
4690 spec->gpio_dir = 0x01;
4691 spec->gpio_data = 0x01;
4692 }
4693
541eee87
MR		 4694 switch (codec->vendor_id) {
4695 case 0x111d76b6: /* 4 Port without Analog Mixer */
4696 case 0x111d76b7:
4697 case 0x111d76b4: /* 6 Port without Analog Mixer */
4698 case 0x111d76b5:
4699 spec->mixer = stac92hd71bxx_mixer;
4700 spec->init = stac92hd71bxx_core_init;
0ffa9807 4701 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4702 break;
aafc4412 4703 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4704 switch (spec->board_config) {
4705 case STAC_HP_M4:
72474be6 4706 /* Enable VREF power saving on GPIO1 detect */
c5d08bb5 4707 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4708 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4709 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc
MR		 4710 AC_VERB_SET_UNSOLICITED_ENABLE,
4711 (AC_USRSP_EN | STAC_VREF_EVENT | codec->afg));
4712 err = stac92xx_add_event(spec, codec->afg, 0x02);
4713 if (err < 0)
4714 return err;
72474be6
MR		 4715 spec->gpio_mask |= 0x02;
4716 break;
4717 }
8daaaa97
MR		 4718 if ((codec->revision_id & 0xf) == 0 ||
4719 (codec->revision_id & 0xf) == 1) {
4720#ifdef SND_HDA_NEEDS_RESUME
4721 codec->patch_ops = stac92hd71bxx_patch_ops;
4722#endif
4723 spec->stream_delay = 40; /* 40 milliseconds */
4724 }
4725
aafc4412
MR		 4726 /* no output amps */
4727 spec->num_pwrs = 0;
4728 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4729 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4730
4731 /* disable VSW */
4732 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4733 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR		 4734 break;
4735 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4736 if ((codec->revision_id & 0xf) == 1) {
4737#ifdef SND_HDA_NEEDS_RESUME
4738 codec->patch_ops = stac92hd71bxx_patch_ops;
4739#endif
4740 spec->stream_delay = 40; /* 40 milliseconds */
4741 }
4742
aafc4412
MR		 4743 /* no output amps */
4744 spec->num_pwrs = 0;
4745 /* fallthru */
541eee87 4746 default:
4b33c767 4747 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4748 spec->mixer = stac92hd71bxx_analog_mixer;
4749 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4750 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4751 }
4752
4b33c767 4753 spec->aloopback_mask = 0x50;
541eee87
MR		 4754 spec->aloopback_shift = 0;
4755
8daaaa97 4756 spec->powerdown_adcs = 1;
1cd2224c 4757 spec->digbeep_nid = 0x26;
e035b841
MR		 4758 spec->mux_nids = stac92hd71bxx_mux_nids;
4759 spec->adc_nids = stac92hd71bxx_adc_nids;
4760 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4761 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4762 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4763 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4764
4765 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4766 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4767
6a14f585
MR		 4768 switch (spec->board_config) {
4769 case STAC_HP_M4:
6a14f585 4770 /* enable internal microphone */
af9f341a 4771 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR		 4772 stac92xx_auto_set_pinctl(codec, 0x0e,
4773 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4774 /* fallthru */
4775 case STAC_DELL_M4_2:
4776 spec->num_dmics = 0;
4777 spec->num_smuxes = 0;
4778 spec->num_dmuxes = 0;
4779 break;
4780 case STAC_DELL_M4_1:
4781 case STAC_DELL_M4_3:
4782 spec->num_dmics = 1;
4783 spec->num_smuxes = 0;
4784 spec->num_dmuxes = 0;
6a14f585
MR		 4785 break;
4786 default:
4787 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4788 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4789 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4790 };
4791
aea7bb0a 4792 spec->multiout.num_dacs = 1;
e035b841
MR		 4793 spec->multiout.hp_nid = 0x11;
4794 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4b33c767
MR		 4795 if (spec->dinput_mux)
4796 spec->private_dimux.num_items +=
4797 spec->num_dmics -
4798 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4799
4800 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4801 if (!err) {
4802 if (spec->board_config < 0) {
4803 printk(KERN_WARNING "hda_codec: No auto-config is "
4804 "available, default to model=ref\n");
4805 spec->board_config = STAC_92HD71BXX_REF;
4806 goto again;
4807 }
4808 err = -EINVAL;
4809 }
4810
4811 if (err < 0) {
4812 stac92xx_free(codec);
4813 return err;
4814 }
4815
e035b841
MR		 4816 return 0;
4817};
4818
2f2f4251
M		 4819static int patch_stac922x(struct hda_codec *codec)
4820{
4821 struct sigmatel_spec *spec;
c7d4b2fa 4822 int err;
2f2f4251 4823
e560d8d8 4824 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4825 if (spec == NULL)
4826 return -ENOMEM;
4827
4828 codec->spec = spec;
a4eed138 4829 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4830 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4831 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4832 stac922x_models,
4833 stac922x_cfg_tbl);
536319af 4834 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4835 spec->gpio_mask = spec->gpio_dir = 0x03;
4836 spec->gpio_data = 0x03;
3fc24d85
TI		 4837 /* Intel Macs have all same PCI SSID, so we need to check
4838 * codec SSID to distinguish the exact models
4839 */
6f0778d8 4840 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4841 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4842
4843 case 0x106b0800:
4844 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4845 break;
5d5d3bc3
IZ		 4846 case 0x106b0600:
4847 case 0x106b0700:
4848 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4849 break;
5d5d3bc3
IZ		 4850 case 0x106b0e00:
4851 case 0x106b0f00:
4852 case 0x106b1600:
4853 case 0x106b1700:
4854 case 0x106b0200:
4855 case 0x106b1e00:
4856 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4857 break;
5d5d3bc3
IZ		 4858 case 0x106b1a00:
4859 case 0x00000100:
4860 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4861 break;
5d5d3bc3
IZ		 4862 case 0x106b0a00:
4863 case 0x106b2200:
4864 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4865 break;
536319af
NB		 4866 default:
4867 spec->board_config = STAC_INTEL_MAC_V3;
4868 break;
3fc24d85
TI		 4869 }
4870 }
4871
9e507abd 4872 again:
11b44bbd
RF		 4873 if (spec->board_config < 0) {
4874 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4875 "using BIOS defaults\n");
4876 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4877 } else
4878 err = stac_save_pin_cfgs(codec,
4879 stac922x_brd_tbl[spec->board_config]);
4880 if (err < 0) {
4881 stac92xx_free(codec);
4882 return err;
403d1944 4883 }
2f2f4251 4884
c7d4b2fa
M		 4885 spec->adc_nids = stac922x_adc_nids;
4886 spec->mux_nids = stac922x_mux_nids;
2549413e 4887 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4888 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4889 spec->num_dmics = 0;
a64135a2 4890 spec->num_pwrs = 0;
c7d4b2fa
M		 4891
4892 spec->init = stac922x_core_init;
2f2f4251 4893 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4894
4895 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4896
3cc08dc6 4897 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4898 if (!err) {
4899 if (spec->board_config < 0) {
4900 printk(KERN_WARNING "hda_codec: No auto-config is "
4901 "available, default to model=ref\n");
4902 spec->board_config = STAC_D945_REF;
4903 goto again;
4904 }
4905 err = -EINVAL;
4906 }
3cc08dc6
MP		 4907 if (err < 0) {
4908 stac92xx_free(codec);
4909 return err;
4910 }
4911
4912 codec->patch_ops = stac92xx_patch_ops;
4913
807a4636
TI		 4914 /* Fix Mux capture level; max to 2 */
4915 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4916 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4917 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4918 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4919 (0 << AC_AMPCAP_MUTE_SHIFT));
4920
3cc08dc6
MP		 4921 return 0;
4922}
4923
4924static int patch_stac927x(struct hda_codec *codec)
4925{
4926 struct sigmatel_spec *spec;
4927 int err;
4928
4929 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4930 if (spec == NULL)
4931 return -ENOMEM;
4932
4933 codec->spec = spec;
a4eed138 4934 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4935 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4936 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4937 stac927x_models,
4938 stac927x_cfg_tbl);
9e507abd 4939 again:
8e9068b1
MR		 4940 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4941 if (spec->board_config < 0)
4942 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4943 "STAC927x, using BIOS defaults\n");
11b44bbd 4944 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4945 } else
4946 err = stac_save_pin_cfgs(codec,
4947 stac927x_brd_tbl[spec->board_config]);
4948 if (err < 0) {
4949 stac92xx_free(codec);
4950 return err;
3cc08dc6
MP		 4951 }
4952
1cd2224c 4953 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4954 spec->adc_nids = stac927x_adc_nids;
4955 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4956 spec->mux_nids = stac927x_mux_nids;
4957 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4958 spec->smux_nids = stac927x_smux_nids;
4959 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 4960 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 4961 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4962 spec->multiout.dac_nids = spec->dac_nids;
4963
81d3dbde 4964 switch (spec->board_config) {
93ed1503 4965 case STAC_D965_3ST:
93ed1503 4966 case STAC_D965_5ST:
8e9068b1 4967 /* GPIO0 High = Enable EAPD */
0fc9dec4 4968 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4969 spec->gpio_data = 0x01;
8e9068b1
MR		 4970 spec->num_dmics = 0;
4971
93ed1503 4972 spec->init = d965_core_init;
9e05b7a3 4973 spec->mixer = stac927x_mixer;
81d3dbde 4974 break;
8e9068b1 4975 case STAC_DELL_BIOS:
780c8be4
MR		 4976 switch (codec->subsystem_id) {
4977 case 0x10280209:
4978 case 0x1028022e:
4979 /* correct the device field to SPDIF out */
af9f341a 4980 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR		 4981 break;
4982 };
03d7ca17 4983 /* configure the analog microphone on some laptops */
af9f341a 4984 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 4985 /* correct the front output jack as a hp out */
af9f341a 4986 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 4987 /* correct the front input jack as a mic */
af9f341a 4988 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 4989 /* fallthru */
8e9068b1
MR		 4990 case STAC_DELL_3ST:
4991 /* GPIO2 High = Enable EAPD */
0fc9dec4 4992 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4993 spec->gpio_data = 0x04;
7f16859a
MR		 4994 spec->dmic_nids = stac927x_dmic_nids;
4995 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4996
8e9068b1
MR		 4997 spec->init = d965_core_init;
4998 spec->mixer = stac927x_mixer;
4999 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5000 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 5001 break;
5002 default:
b2c4f4d7
MR		 5003 if (spec->board_config > STAC_D965_REF) {
5004 /* GPIO0 High = Enable EAPD */
5005 spec->eapd_mask = spec->gpio_mask = 0x01;
5006 spec->gpio_dir = spec->gpio_data = 0x01;
5007 }
8e9068b1
MR		 5008 spec->num_dmics = 0;
5009
5010 spec->init = stac927x_core_init;
5011 spec->mixer = stac927x_mixer;
7f16859a
MR		 5012 }
5013
a64135a2 5014 spec->num_pwrs = 0;
e1f0d669
MR		 5015 spec->aloopback_mask = 0x40;
5016 spec->aloopback_shift = 0;
c0cea0d0 5017 spec->eapd_switch = 1;
8e9068b1 5018
3cc08dc6 5019 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5020 if (!err) {
5021 if (spec->board_config < 0) {
5022 printk(KERN_WARNING "hda_codec: No auto-config is "
5023 "available, default to model=ref\n");
5024 spec->board_config = STAC_D965_REF;
5025 goto again;
5026 }
5027 err = -EINVAL;
5028 }
c7d4b2fa
M		 5029 if (err < 0) {
5030 stac92xx_free(codec);
5031 return err;
5032 }
2f2f4251
M		 5033
5034 codec->patch_ops = stac92xx_patch_ops;
5035
52987656
TI		 5036 /*
5037 * !!FIXME!!
5038 * The STAC927x seem to require fairly long delays for certain
5039 * command sequences. With too short delays (even if the answer
5040 * is set to RIRB properly), it results in the silence output
5041 * on some hardwares like Dell.
5042 *
5043 * The below flag enables the longer delay (see get_response
5044 * in hda_intel.c).
5045 */
5046 codec->bus->needs_damn_long_delay = 1;
5047
2f2f4251
M		 5048 return 0;
5049}
5050
f3302a59
MP		 5051static int patch_stac9205(struct hda_codec *codec)
5052{
5053 struct sigmatel_spec *spec;
8259980e 5054 int err;
f3302a59
MP		 5055
5056 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5057 if (spec == NULL)
5058 return -ENOMEM;
5059
5060 codec->spec = spec;
a4eed138 5061 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5062 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 5063 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5064 stac9205_models,
5065 stac9205_cfg_tbl);
9e507abd 5066 again:
11b44bbd
RF		 5067 if (spec->board_config < 0) {
5068 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5069 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5070 } else
5071 err = stac_save_pin_cfgs(codec,
5072 stac9205_brd_tbl[spec->board_config]);
5073 if (err < 0) {
5074 stac92xx_free(codec);
5075 return err;
f3302a59
MP		 5076 }
5077
1cd2224c 5078 spec->digbeep_nid = 0x23;
f3302a59 5079 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5080 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5081 spec->mux_nids = stac9205_mux_nids;
2549413e 5082 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 5083 spec->smux_nids = stac9205_smux_nids;
5084 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5085 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5086 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5087 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5088 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5089 spec->num_pwrs = 0;
f3302a59
MP		 5090
5091 spec->init = stac9205_core_init;
5092 spec->mixer = stac9205_mixer;
5093
e1f0d669
MR		 5094 spec->aloopback_mask = 0x40;
5095 spec->aloopback_shift = 0;
c0cea0d0 5096 spec->eapd_switch = 1;
f3302a59 5097 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5098
ae0a8ed8 5099 switch (spec->board_config){
ae0a8ed8 5100 case STAC_9205_DELL_M43:
87d48363 5101 /* Enable SPDIF in/out */
af9f341a
TI		 5102 stac_change_pin_config(codec, 0x1f, 0x01441030);
5103 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5104
4fe5195c 5105 /* Enable unsol response for GPIO4/Dock HP connection */
c5d08bb5 5106 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 5107 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5108 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc
MR		 5109 AC_VERB_SET_UNSOLICITED_ENABLE,
5110 (AC_USRSP_EN | STAC_VREF_EVENT | codec->afg));
5111 err = stac92xx_add_event(spec, codec->afg, 0x01);
5112 if (err < 0)
5113 return err;
4fe5195c
MR		 5114
5115 spec->gpio_dir = 0x0b;
0fc9dec4 5116 spec->eapd_mask = 0x01;
4fe5195c
MR		 5117 spec->gpio_mask = 0x1b;
5118 spec->gpio_mute = 0x10;
e2e7d624 5119 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5120 * GPIO3 Low = DRM
87d48363 5121 */
4fe5195c 5122 spec->gpio_data = 0x01;
ae0a8ed8 5123 break;
b2c4f4d7
MR		 5124 case STAC_9205_REF:
5125 /* SPDIF-In enabled */
5126 break;
ae0a8ed8
TD		 5127 default:
5128 /* GPIO0 High = EAPD */
0fc9dec4 5129 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5130 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5131 break;
5132 }
33382403 5133
f3302a59 5134 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5135 if (!err) {
5136 if (spec->board_config < 0) {
5137 printk(KERN_WARNING "hda_codec: No auto-config is "
5138 "available, default to model=ref\n");
5139 spec->board_config = STAC_9205_REF;
5140 goto again;
5141 }
5142 err = -EINVAL;
5143 }
f3302a59
MP		 5144 if (err < 0) {
5145 stac92xx_free(codec);
5146 return err;
5147 }
5148
5149 codec->patch_ops = stac92xx_patch_ops;
5150
5151 return 0;
5152}
5153
db064e50 5154/*
6d859065 5155 * STAC9872 hack
db064e50
TI		 5156 */
5157
99ccc560 5158/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 5159static hda_nid_t vaio_dacs[] = { 0x2 };
5160#define VAIO_HP_DAC 0x5
5161static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5162static hda_nid_t vaio_mux_nids[] = { 0x15 };
5163
5164static struct hda_input_mux vaio_mux = {
a3a2f429 5165 .num_items = 3,
db064e50 5166 .items = {
d773781c 5167 /* { "HP", 0x0 }, */
1624cb9a
TI		 5168 { "Mic Jack", 0x1 },
5169 { "Internal Mic", 0x2 },
db064e50
TI		 5170 { "PCM", 0x3 },
5171 }
5172};
5173
5174static struct hda_verb vaio_init[] = {
5175 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5176 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 5177 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5178 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5179 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5180 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5181 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 5182 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5183 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5184 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5185 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5186 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5187 {}
5188};
5189
6d859065
GM		 5190static struct hda_verb vaio_ar_init[] = {
5191 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5192 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5193 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5194 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5195/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5196 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5197 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5198 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5199 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5200/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5201 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5202 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5203 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5204 {}
5205};
5206
db064e50 5207static struct snd_kcontrol_new vaio_mixer[] = {
127e82e3
TI		 5208 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5209 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5210 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5211 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
db064e50
TI		 5212 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5213 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5214 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5215 {
5216 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5217 .name = "Capture Source",
5218 .count = 1,
5219 .info = stac92xx_mux_enum_info,
5220 .get = stac92xx_mux_enum_get,
5221 .put = stac92xx_mux_enum_put,
5222 },
5223 {}
5224};
5225
6d859065 5226static struct snd_kcontrol_new vaio_ar_mixer[] = {
127e82e3
TI		 5227 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5228 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5229 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5230 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
6d859065
GM		 5231 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5232 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5233 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5234 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5235 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5236 {
5237 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5238 .name = "Capture Source",
5239 .count = 1,
5240 .info = stac92xx_mux_enum_info,
5241 .get = stac92xx_mux_enum_get,
5242 .put = stac92xx_mux_enum_put,
5243 },
5244 {}
5245};
5246
5247static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5248 .build_controls = stac92xx_build_controls,
5249 .build_pcms = stac92xx_build_pcms,
5250 .init = stac92xx_init,
5251 .free = stac92xx_free,
cb53c626 5252#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5253 .resume = stac92xx_resume,
5254#endif
5255};
5256
72e7b0dd
TI		 5257static int stac9872_vaio_init(struct hda_codec *codec)
5258{
5259 int err;
5260
5261 err = stac92xx_init(codec);
5262 if (err < 0)
5263 return err;
5264 if (codec->patch_ops.unsol_event)
5265 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5266 return 0;
5267}
5268
5269static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5270{
40c1d308 5271 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5272 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5273 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5274 } else {
5275 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5276 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5277 }
5278}
5279
5280static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5281{
5282 switch (res >> 26) {
5283 case STAC_HP_EVENT:
5284 stac9872_vaio_hp_detect(codec, res);
5285 break;
5286 }
5287}
5288
5289static struct hda_codec_ops stac9872_vaio_patch_ops = {
5290 .build_controls = stac92xx_build_controls,
5291 .build_pcms = stac92xx_build_pcms,
5292 .init = stac9872_vaio_init,
5293 .free = stac92xx_free,
5294 .unsol_event = stac9872_vaio_unsol_event,
5295#ifdef CONFIG_PM
5296 .resume = stac92xx_resume,
5297#endif
5298};
5299
6d859065
GM		 5300enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5301 CXD9872RD_VAIO,
5302 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5303 STAC9872AK_VAIO,
5304 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5305 STAC9872K_VAIO,
5306 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5307 CXD9872AKD_VAIO,
5308 STAC_9872_MODELS,
5309};
5310
5311static const char *stac9872_models[STAC_9872_MODELS] = {
5312 [CXD9872RD_VAIO] = "vaio",
5313 [CXD9872AKD_VAIO] = "vaio-ar",
5314};
5315
5316static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5317 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5318 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5319 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5320 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5321 {}
5322};
5323
6d859065 5324static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5325{
5326 struct sigmatel_spec *spec;
5327 int board_config;
5328
f5fcc13c
TI		 5329 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5330 stac9872_models,
5331 stac9872_cfg_tbl);
db064e50
TI		 5332 if (board_config < 0)
5333 /* unknown config, let generic-parser do its job... */
5334 return snd_hda_parse_generic_codec(codec);
5335
5336 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5337 if (spec == NULL)
5338 return -ENOMEM;
5339
5340 codec->spec = spec;
5341 switch (board_config) {
6d859065
GM		 5342 case CXD9872RD_VAIO:
5343 case STAC9872AK_VAIO:
5344 case STAC9872K_VAIO:
db064e50
TI		 5345 spec->mixer = vaio_mixer;
5346 spec->init = vaio_init;
5347 spec->multiout.max_channels = 2;
5348 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5349 spec->multiout.dac_nids = vaio_dacs;
5350 spec->multiout.hp_nid = VAIO_HP_DAC;
5351 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5352 spec->adc_nids = vaio_adcs;
a64135a2 5353 spec->num_pwrs = 0;
db064e50
TI		 5354 spec->input_mux = &vaio_mux;
5355 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5356 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5357 break;
6d859065
GM		 5358
5359 case CXD9872AKD_VAIO:
5360 spec->mixer = vaio_ar_mixer;
5361 spec->init = vaio_ar_init;
5362 spec->multiout.max_channels = 2;
5363 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5364 spec->multiout.dac_nids = vaio_dacs;
5365 spec->multiout.hp_nid = VAIO_HP_DAC;
5366 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5367 spec->num_pwrs = 0;
6d859065
GM		 5368 spec->adc_nids = vaio_adcs;
5369 spec->input_mux = &vaio_mux;
5370 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5371 codec->patch_ops = stac9872_patch_ops;
6d859065 5372 break;
db064e50
TI		 5373 }
5374
db064e50
TI		 5375 return 0;
5376}
5377
5378
2f2f4251
M		 5379/*
5380 * patch entries
5381 */
5382struct hda_codec_preset snd_hda_preset_sigmatel[] = {
5383 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5384 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5385 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5386 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5387 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5388 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5389 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5390 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5391 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5392 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5393 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5394 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5395 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5396 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5397 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5398 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5399 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5400 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5401 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5402 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5403 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5404 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5405 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5406 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5407 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5408 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5409 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5410 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5411 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5412 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5413 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5414 /* The following does not take into account .id=0x83847661 when subsys =
5415 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5416 * currently not fully supported.
5417 */
5418 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5419 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5420 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5421 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5422 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5423 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5424 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5425 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5426 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5427 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5428 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5429 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5430 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5431 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5432 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5433 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5434 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5435 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5436 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5437 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5438 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5439 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5440 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5441 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5442 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5443 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5444 {} /* terminator */
5445};
Clone of davem's net-next-2.6 tree