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ALSA: hda - Fix IDT92HD83* codec setup
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
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2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
TI		 38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
fefd67f3 43 STAC_LO_EVENT,
3d21d3f7 44 STAC_MIC_EVENT,
c6e4c666 45};
4e55096e 46
f5fcc13c 47enum {
1607b8ea 48 STAC_AUTO,
f5fcc13c 49 STAC_REF,
bf277785 50 STAC_9200_OQO,
dfe495d0
TI		 51 STAC_9200_DELL_D21,
52 STAC_9200_DELL_D22,
53 STAC_9200_DELL_D23,
54 STAC_9200_DELL_M21,
55 STAC_9200_DELL_M22,
56 STAC_9200_DELL_M23,
57 STAC_9200_DELL_M24,
58 STAC_9200_DELL_M25,
59 STAC_9200_DELL_M26,
60 STAC_9200_DELL_M27,
58eec423
MCC		 61 STAC_9200_M4,
62 STAC_9200_M4_2,
117f257d 63 STAC_9200_PANASONIC,
f5fcc13c
TI		 64 STAC_9200_MODELS
65};
66
67enum {
1607b8ea 68 STAC_9205_AUTO,
f5fcc13c 69 STAC_9205_REF,
dfe495d0 70 STAC_9205_DELL_M42,
ae0a8ed8
TD		 71 STAC_9205_DELL_M43,
72 STAC_9205_DELL_M44,
d9a4268e 73 STAC_9205_EAPD,
f5fcc13c
TI		 74 STAC_9205_MODELS
75};
76
e1f0d669 77enum {
1607b8ea 78 STAC_92HD73XX_AUTO,
9e43f0de 79 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 80 STAC_92HD73XX_REF,
ae709440 81 STAC_92HD73XX_INTEL,
661cd8fb
TI		 82 STAC_DELL_M6_AMIC,
83 STAC_DELL_M6_DMIC,
84 STAC_DELL_M6_BOTH,
6b3ab21e 85 STAC_DELL_EQ,
842ae638 86 STAC_ALIENWARE_M17X,
e1f0d669
MR		 87 STAC_92HD73XX_MODELS
88};
89
d0513fc6 90enum {
1607b8ea 91 STAC_92HD83XXX_AUTO,
d0513fc6 92 STAC_92HD83XXX_REF,
32ed3f46 93 STAC_92HD83XXX_PWR_REF,
8bb0ac55 94 STAC_DELL_S14,
d0513fc6
MR		 95 STAC_92HD83XXX_MODELS
96};
97
e035b841 98enum {
1607b8ea 99 STAC_92HD71BXX_AUTO,
e035b841 100 STAC_92HD71BXX_REF,
a7662640
MR		 101 STAC_DELL_M4_1,
102 STAC_DELL_M4_2,
3a7abfd2 103 STAC_DELL_M4_3,
6a14f585 104 STAC_HP_M4,
1b0652eb 105 STAC_HP_DV5,
ae6241fb 106 STAC_HP_HDX,
514bf54c 107 STAC_HP_DV4_1222NR,
e035b841
MR		 108 STAC_92HD71BXX_MODELS
109};
110
8e21c34c 111enum {
1607b8ea 112 STAC_925x_AUTO,
8e21c34c 113 STAC_925x_REF,
9cb36c2a
MCC		 114 STAC_M1,
115 STAC_M1_2,
116 STAC_M2,
8e21c34c 117 STAC_M2_2,
9cb36c2a
MCC		 118 STAC_M3,
119 STAC_M5,
120 STAC_M6,
8e21c34c
TD		 121 STAC_925x_MODELS
122};
123
f5fcc13c 124enum {
1607b8ea 125 STAC_922X_AUTO,
f5fcc13c
TI		 126 STAC_D945_REF,
127 STAC_D945GTP3,
128 STAC_D945GTP5,
5d5d3bc3
IZ		 129 STAC_INTEL_MAC_V1,
130 STAC_INTEL_MAC_V2,
131 STAC_INTEL_MAC_V3,
132 STAC_INTEL_MAC_V4,
133 STAC_INTEL_MAC_V5,
536319af
NB		 134 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
135 * is given, one of the above models will be
136 * chosen according to the subsystem id. */
dfe495d0 137 /* for backward compatibility */
f5fcc13c 138 STAC_MACMINI,
3fc24d85 139 STAC_MACBOOK,
6f0778d8
NB		 140 STAC_MACBOOK_PRO_V1,
141 STAC_MACBOOK_PRO_V2,
f16928fb 142 STAC_IMAC_INTEL,
0dae0f83 143 STAC_IMAC_INTEL_20,
8c650087 144 STAC_ECS_202,
dfe495d0
TI		 145 STAC_922X_DELL_D81,
146 STAC_922X_DELL_D82,
147 STAC_922X_DELL_M81,
148 STAC_922X_DELL_M82,
f5fcc13c
TI		 149 STAC_922X_MODELS
150};
151
152enum {
1607b8ea 153 STAC_927X_AUTO,
e28d8322 154 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 155 STAC_D965_REF,
156 STAC_D965_3ST,
157 STAC_D965_5ST,
679d92ed 158 STAC_D965_5ST_NO_FP,
4ff076e5 159 STAC_DELL_3ST,
8e9068b1 160 STAC_DELL_BIOS,
f5fcc13c
TI		 161 STAC_927X_MODELS
162};
403d1944 163
307282c8
TI		 164enum {
165 STAC_9872_AUTO,
166 STAC_9872_VAIO,
167 STAC_9872_MODELS
168};
169
74aeaabc
MR		 170struct sigmatel_event {
171 hda_nid_t nid;
c6e4c666
TI		 172 unsigned char type;
173 unsigned char tag;
74aeaabc
MR		 174 int data;
175};
176
177struct sigmatel_jack {
178 hda_nid_t nid;
179 int type;
180 struct snd_jack *jack;
181};
182
3d21d3f7
TI		 183struct sigmatel_mic_route {
184 hda_nid_t pin;
185 unsigned char mux_idx;
186 unsigned char dmux_idx;
187};
188
2f2f4251 189struct sigmatel_spec {
c8b6bf9b 190 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 191 unsigned int num_mixers;
192
403d1944 193 int board_config;
c0cea0d0 194 unsigned int eapd_switch: 1;
c7d4b2fa 195 unsigned int surr_switch: 1;
3cc08dc6 196 unsigned int alt_switch: 1;
82bc955f 197 unsigned int hp_detect: 1;
00ef50c2 198 unsigned int spdif_mute: 1;
7c7767eb 199 unsigned int check_volume_offset:1;
3d21d3f7 200 unsigned int auto_mic:1;
c7d4b2fa 201
4fe5195c 202 /* gpio lines */
0fc9dec4 203 unsigned int eapd_mask;
4fe5195c
MR		 204 unsigned int gpio_mask;
205 unsigned int gpio_dir;
206 unsigned int gpio_data;
207 unsigned int gpio_mute;
86d190e7 208 unsigned int gpio_led;
4fe5195c 209
8daaaa97
MR		 210 /* stream */
211 unsigned int stream_delay;
212
4fe5195c 213 /* analog loopback */
d78d7a90 214 struct snd_kcontrol_new *aloopback_ctl;
e1f0d669
MR		 215 unsigned char aloopback_mask;
216 unsigned char aloopback_shift;
8259980e 217
a64135a2
MR		 218 /* power management */
219 unsigned int num_pwrs;
d0513fc6 220 unsigned int *pwr_mapping;
a64135a2 221 hda_nid_t *pwr_nids;
b76c850f 222 hda_nid_t *dac_list;
a64135a2 223
74aeaabc
MR		 224 /* jack detection */
225 struct snd_array jacks;
226
227 /* events */
228 struct snd_array events;
229
2f2f4251 230 /* playback */
b22b4821
MR		 231 struct hda_input_mux *mono_mux;
232 unsigned int cur_mmux;
2f2f4251 233 struct hda_multi_out multiout;
3cc08dc6 234 hda_nid_t dac_nids[5];
c21ca4a8
TI		 235 hda_nid_t hp_dacs[5];
236 hda_nid_t speaker_dacs[5];
2f2f4251 237
7c7767eb
TI		 238 int volume_offset;
239
2f2f4251
M		 240 /* capture */
241 hda_nid_t *adc_nids;
2f2f4251 242 unsigned int num_adcs;
dabbed6f
M		 243 hda_nid_t *mux_nids;
244 unsigned int num_muxes;
8b65727b
MP		 245 hda_nid_t *dmic_nids;
246 unsigned int num_dmics;
e1f0d669 247 hda_nid_t *dmux_nids;
1697055e 248 unsigned int num_dmuxes;
d9737751
MR		 249 hda_nid_t *smux_nids;
250 unsigned int num_smuxes;
5207e10e 251 unsigned int num_analog_muxes;
6479c631
TI		 252
253 unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
254 unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
255 unsigned int num_caps; /* number of capture volume/switch elements */
256
3d21d3f7
TI		 257 struct sigmatel_mic_route ext_mic;
258 struct sigmatel_mic_route int_mic;
259
65973632 260 const char **spdif_labels;
d9737751 261
dabbed6f 262 hda_nid_t dig_in_nid;
b22b4821 263 hda_nid_t mono_nid;
1cd2224c
MR		 264 hda_nid_t anabeep_nid;
265 hda_nid_t digbeep_nid;
2f2f4251 266
2f2f4251
M		 267 /* pin widgets */
268 hda_nid_t *pin_nids;
269 unsigned int num_pins;
2f2f4251
M		 270
271 /* codec specific stuff */
272 struct hda_verb *init;
c8b6bf9b 273 struct snd_kcontrol_new *mixer;
2f2f4251
M		 274
275 /* capture source */
8b65727b 276 struct hda_input_mux *dinput_mux;
e1f0d669 277 unsigned int cur_dmux[2];
c7d4b2fa 278 struct hda_input_mux *input_mux;
3cc08dc6 279 unsigned int cur_mux[3];
d9737751
MR		 280 struct hda_input_mux *sinput_mux;
281 unsigned int cur_smux[2];
2a9c7816
MR		 282 unsigned int cur_amux;
283 hda_nid_t *amp_nids;
8daaaa97 284 unsigned int powerdown_adcs;
2f2f4251 285
403d1944
MP		 286 /* i/o switches */
287 unsigned int io_switch[2];
0fb87bb4 288 unsigned int clfe_swap;
c21ca4a8
TI		 289 hda_nid_t line_switch; /* shared line-in for input and output */
290 hda_nid_t mic_switch; /* shared mic-in for input and output */
291 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 292 unsigned int aloopback;
2f2f4251 293
c7d4b2fa
M		 294 struct hda_pcm pcm_rec[2]; /* PCM information */
295
296 /* dynamic controls and input_mux */
297 struct auto_pin_cfg autocfg;
603c4019 298 struct snd_array kctls;
8b65727b 299 struct hda_input_mux private_dimux;
c7d4b2fa 300 struct hda_input_mux private_imux;
d9737751 301 struct hda_input_mux private_smux;
b22b4821 302 struct hda_input_mux private_mono_mux;
2f2f4251
M		 303};
304
305static hda_nid_t stac9200_adc_nids[1] = {
306 0x03,
307};
308
309static hda_nid_t stac9200_mux_nids[1] = {
310 0x0c,
311};
312
313static hda_nid_t stac9200_dac_nids[1] = {
314 0x02,
315};
316
a64135a2
MR		 317static hda_nid_t stac92hd73xx_pwr_nids[8] = {
318 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
319 0x0f, 0x10, 0x11
320};
321
0ffa9807
MR		 322static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
323 0x26, 0,
324};
325
e1f0d669
MR		 326static hda_nid_t stac92hd73xx_adc_nids[2] = {
327 0x1a, 0x1b
328};
329
330#define STAC92HD73XX_NUM_DMICS 2
331static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
332 0x13, 0x14, 0
333};
334
335#define STAC92HD73_DAC_COUNT 5
e1f0d669 336
e2aec171
TI		 337static hda_nid_t stac92hd73xx_mux_nids[2] = {
338 0x20, 0x21,
e1f0d669
MR		 339};
340
341static hda_nid_t stac92hd73xx_dmux_nids[2] = {
342 0x20, 0x21,
343};
344
d9737751
MR		 345static hda_nid_t stac92hd73xx_smux_nids[2] = {
346 0x22, 0x23,
347};
348
6479c631
TI		 349#define STAC92HD73XX_NUM_CAPS 2
350static unsigned long stac92hd73xx_capvols[] = {
351 HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
352 HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
353};
354#define stac92hd73xx_capsws stac92hd73xx_capvols
355
d0513fc6 356#define STAC92HD83_DAC_COUNT 3
d0513fc6 357
667067d8 358static hda_nid_t stac92hd83xxx_mux_nids[2] = {
d0513fc6
MR		 359 0x17, 0x18,
360};
361
362static hda_nid_t stac92hd83xxx_adc_nids[2] = {
363 0x15, 0x16,
364};
365
366static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
367 0xa, 0xb, 0xd, 0xe,
368};
369
0ffa9807
MR		 370static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
371 0x1e, 0,
372};
373
d0513fc6 374static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 375 0x03, 0x0c, 0x20, 0x40,
d0513fc6
MR		 376};
377
6479c631
TI		 378#define STAC92HD83XXX_NUM_CAPS 2
379static unsigned long stac92hd83xxx_capvols[] = {
380 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_OUTPUT),
381 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_OUTPUT),
382};
383#define stac92hd83xxx_capsws stac92hd83xxx_capvols
384
a64135a2
MR		 385static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
386 0x0a, 0x0d, 0x0f
387};
388
e035b841
MR		 389static hda_nid_t stac92hd71bxx_adc_nids[2] = {
390 0x12, 0x13,
391};
392
393static hda_nid_t stac92hd71bxx_mux_nids[2] = {
394 0x1a, 0x1b
395};
396
4b33c767
MR		 397static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
398 0x1c, 0x1d,
e1f0d669
MR		 399};
400
d9737751
MR		 401static hda_nid_t stac92hd71bxx_smux_nids[2] = {
402 0x24, 0x25,
403};
404
e035b841
MR		 405#define STAC92HD71BXX_NUM_DMICS 2
406static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
407 0x18, 0x19, 0
408};
409
0ffa9807
MR		 410static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
411 0x22, 0
412};
413
6479c631
TI		 414#define STAC92HD71BXX_NUM_CAPS 2
415static unsigned long stac92hd71bxx_capvols[] = {
416 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
417 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
418};
419#define stac92hd71bxx_capsws stac92hd71bxx_capvols
420
8e21c34c
TD		 421static hda_nid_t stac925x_adc_nids[1] = {
422 0x03,
423};
424
425static hda_nid_t stac925x_mux_nids[1] = {
426 0x0f,
427};
428
429static hda_nid_t stac925x_dac_nids[1] = {
430 0x02,
431};
432
f6e9852a
TI		 433#define STAC925X_NUM_DMICS 1
434static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
435 0x15, 0
2c11f955
TD		 436};
437
1697055e
TI		 438static hda_nid_t stac925x_dmux_nids[1] = {
439 0x14,
440};
441
6479c631
TI		 442static unsigned long stac925x_capvols[] = {
443 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
444};
445static unsigned long stac925x_capsws[] = {
446 HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
447};
448
2f2f4251
M		 449static hda_nid_t stac922x_adc_nids[2] = {
450 0x06, 0x07,
451};
452
453static hda_nid_t stac922x_mux_nids[2] = {
454 0x12, 0x13,
455};
456
6479c631
TI		 457#define STAC922X_NUM_CAPS 2
458static unsigned long stac922x_capvols[] = {
459 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
460 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
461};
462#define stac922x_capsws stac922x_capvols
463
45c1d85b
MR		 464static hda_nid_t stac927x_slave_dig_outs[2] = {
465 0x1f, 0,
466};
467
3cc08dc6
MP		 468static hda_nid_t stac927x_adc_nids[3] = {
469 0x07, 0x08, 0x09
470};
471
472static hda_nid_t stac927x_mux_nids[3] = {
473 0x15, 0x16, 0x17
474};
475
d9737751
MR		 476static hda_nid_t stac927x_smux_nids[1] = {
477 0x21,
478};
479
b76c850f
MR		 480static hda_nid_t stac927x_dac_nids[6] = {
481 0x02, 0x03, 0x04, 0x05, 0x06, 0
482};
483
e1f0d669
MR		 484static hda_nid_t stac927x_dmux_nids[1] = {
485 0x1b,
486};
487
7f16859a
MR		 488#define STAC927X_NUM_DMICS 2
489static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
490 0x13, 0x14, 0
491};
492
6479c631
TI		 493#define STAC927X_NUM_CAPS 3
494static unsigned long stac927x_capvols[] = {
495 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
496 HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
497 HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
498};
499static unsigned long stac927x_capsws[] = {
500 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
501 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
502 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
503};
504
65973632
MR		 505static const char *stac927x_spdif_labels[5] = {
506 "Digital Playback", "ADAT", "Analog Mux 1",
507 "Analog Mux 2", "Analog Mux 3"
508};
509
f3302a59
MP		 510static hda_nid_t stac9205_adc_nids[2] = {
511 0x12, 0x13
512};
513
514static hda_nid_t stac9205_mux_nids[2] = {
515 0x19, 0x1a
516};
517
e1f0d669 518static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 519 0x1d,
e1f0d669
MR		 520};
521
d9737751
MR		 522static hda_nid_t stac9205_smux_nids[1] = {
523 0x21,
524};
525
f6e9852a
TI		 526#define STAC9205_NUM_DMICS 2
527static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
528 0x17, 0x18, 0
8b65727b
MP		 529};
530
6479c631
TI		 531#define STAC9205_NUM_CAPS 2
532static unsigned long stac9205_capvols[] = {
533 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
534 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
535};
536static unsigned long stac9205_capsws[] = {
537 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
538 HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
539};
540
c7d4b2fa 541static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 542 0x08, 0x09, 0x0d, 0x0e,
543 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 544};
545
8e21c34c
TD		 546static hda_nid_t stac925x_pin_nids[8] = {
547 0x07, 0x08, 0x0a, 0x0b,
548 0x0c, 0x0d, 0x10, 0x11,
549};
550
2f2f4251
M		 551static hda_nid_t stac922x_pin_nids[10] = {
552 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
553 0x0f, 0x10, 0x11, 0x15, 0x1b,
554};
555
a7662640 556static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 557 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
558 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 559 0x14, 0x22, 0x23
e1f0d669
MR		 560};
561
8bb0ac55 562static hda_nid_t stac92hd83xxx_pin_nids[10] = {
d0513fc6 563 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
8bb0ac55 564 0x0f, 0x10, 0x11, 0x1f, 0x20,
d0513fc6 565};
616f89e7
HRK		 566
567#define STAC92HD71BXX_NUM_PINS 13
568static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
569 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
570 0x00, 0x14, 0x18, 0x19, 0x1e,
571 0x1f, 0x20, 0x27
572};
573static hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR		 574 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
575 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 576 0x1f, 0x20, 0x27
e035b841
MR		 577};
578
3cc08dc6
MP		 579static hda_nid_t stac927x_pin_nids[14] = {
580 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
581 0x0f, 0x10, 0x11, 0x12, 0x13,
582 0x14, 0x21, 0x22, 0x23,
583};
584
f3302a59
MP		 585static hda_nid_t stac9205_pin_nids[12] = {
586 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
587 0x0f, 0x14, 0x16, 0x17, 0x18,
588 0x21, 0x22,
f3302a59
MP		 589};
590
8b65727b
MP		 591static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
592 struct snd_ctl_elem_info *uinfo)
593{
594 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
595 struct sigmatel_spec *spec = codec->spec;
596 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
597}
598
599static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
600 struct snd_ctl_elem_value *ucontrol)
601{
602 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
603 struct sigmatel_spec *spec = codec->spec;
e1f0d669 604 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 605
e1f0d669 606 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 607 return 0;
608}
609
610static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
611 struct snd_ctl_elem_value *ucontrol)
612{
613 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
614 struct sigmatel_spec *spec = codec->spec;
e1f0d669 615 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 616
617 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 618 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 619}
620
d9737751
MR		 621static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
622 struct snd_ctl_elem_info *uinfo)
623{
624 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
625 struct sigmatel_spec *spec = codec->spec;
626 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
627}
628
629static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
630 struct snd_ctl_elem_value *ucontrol)
631{
632 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
633 struct sigmatel_spec *spec = codec->spec;
634 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
635
636 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
637 return 0;
638}
639
640static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
641 struct snd_ctl_elem_value *ucontrol)
642{
643 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
644 struct sigmatel_spec *spec = codec->spec;
00ef50c2 645 struct hda_input_mux *smux = &spec->private_smux;
d9737751 646 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 647 int err, val;
648 hda_nid_t nid;
d9737751 649
00ef50c2 650 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 651 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 652 if (err < 0)
653 return err;
654
655 if (spec->spdif_mute) {
656 if (smux_idx == 0)
657 nid = spec->multiout.dig_out_nid;
658 else
659 nid = codec->slave_dig_outs[smux_idx - 1];
660 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 661 val = HDA_AMP_MUTE;
00ef50c2 662 else
c9b46f91 663 val = 0;
00ef50c2 664 /* un/mute SPDIF out */
c9b46f91
TI		 665 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
666 HDA_AMP_MUTE, val);
00ef50c2
MR		 667 }
668 return 0;
d9737751
MR		 669}
670
2fc99890
NL		 671static unsigned int stac92xx_vref_set(struct hda_codec *codec,
672 hda_nid_t nid, unsigned int new_vref)
673{
b8621516 674 int error;
2fc99890
NL		 675 unsigned int pincfg;
676 pincfg = snd_hda_codec_read(codec, nid, 0,
677 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
678
679 pincfg &= 0xff;
680 pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
681 pincfg |= new_vref;
682
683 if (new_vref == AC_PINCTL_VREF_HIZ)
684 pincfg |= AC_PINCTL_OUT_EN;
685 else
686 pincfg |= AC_PINCTL_IN_EN;
687
688 error = snd_hda_codec_write_cache(codec, nid, 0,
689 AC_VERB_SET_PIN_WIDGET_CONTROL, pincfg);
690 if (error < 0)
691 return error;
692 else
693 return 1;
694}
695
696static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
697{
698 unsigned int vref;
699 vref = snd_hda_codec_read(codec, nid, 0,
700 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
701 vref &= AC_PINCTL_VREFEN;
702 return vref;
703}
704
c8b6bf9b 705static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 706{
707 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
708 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 709 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 710}
711
c8b6bf9b 712static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 713{
714 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
715 struct sigmatel_spec *spec = codec->spec;
716 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
717
718 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
719 return 0;
720}
721
c8b6bf9b 722static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 723{
724 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
725 struct sigmatel_spec *spec = codec->spec;
726 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5207e10e
TI		 727 const struct hda_input_mux *imux = spec->input_mux;
728 unsigned int idx, prev_idx;
729
730 idx = ucontrol->value.enumerated.item[0];
731 if (idx >= imux->num_items)
732 idx = imux->num_items - 1;
733 prev_idx = spec->cur_mux[adc_idx];
734 if (prev_idx == idx)
735 return 0;
736 if (idx < spec->num_analog_muxes) {
737 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
738 AC_VERB_SET_CONNECT_SEL,
739 imux->items[idx].index);
740 if (prev_idx >= spec->num_analog_muxes) {
741 imux = spec->dinput_mux;
742 /* 0 = analog */
743 snd_hda_codec_write_cache(codec,
744 spec->dmux_nids[adc_idx], 0,
745 AC_VERB_SET_CONNECT_SEL,
746 imux->items[0].index);
747 }
748 } else {
749 imux = spec->dinput_mux;
750 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
751 AC_VERB_SET_CONNECT_SEL,
752 imux->items[idx - 1].index);
753 }
754 spec->cur_mux[adc_idx] = idx;
755 return 1;
2f2f4251
M		 756}
757
b22b4821
MR		 758static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
759 struct snd_ctl_elem_info *uinfo)
760{
761 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
762 struct sigmatel_spec *spec = codec->spec;
763 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
764}
765
766static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
767 struct snd_ctl_elem_value *ucontrol)
768{
769 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
770 struct sigmatel_spec *spec = codec->spec;
771
772 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
773 return 0;
774}
775
776static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
777 struct snd_ctl_elem_value *ucontrol)
778{
779 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
780 struct sigmatel_spec *spec = codec->spec;
781
782 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
783 spec->mono_nid, &spec->cur_mmux);
784}
785
5f10c4a9
ML		 786#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
787
788static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
789 struct snd_ctl_elem_value *ucontrol)
790{
791 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 792 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 793 struct sigmatel_spec *spec = codec->spec;
794
e1f0d669
MR		 795 ucontrol->value.integer.value[0] = !!(spec->aloopback &
796 (spec->aloopback_mask << idx));
5f10c4a9
ML		 797 return 0;
798}
799
800static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
801 struct snd_ctl_elem_value *ucontrol)
802{
803 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
804 struct sigmatel_spec *spec = codec->spec;
e1f0d669 805 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 806 unsigned int dac_mode;
e1f0d669 807 unsigned int val, idx_val;
5f10c4a9 808
e1f0d669
MR		 809 idx_val = spec->aloopback_mask << idx;
810 if (ucontrol->value.integer.value[0])
811 val = spec->aloopback | idx_val;
812 else
813 val = spec->aloopback & ~idx_val;
68ea7b2f 814 if (spec->aloopback == val)
5f10c4a9
ML		 815 return 0;
816
68ea7b2f 817 spec->aloopback = val;
5f10c4a9 818
e1f0d669
MR		 819 /* Only return the bits defined by the shift value of the
820 * first two bytes of the mask
821 */
5f10c4a9 822 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 823 kcontrol->private_value & 0xFFFF, 0x0);
824 dac_mode >>= spec->aloopback_shift;
5f10c4a9 825
e1f0d669 826 if (spec->aloopback & idx_val) {
5f10c4a9 827 snd_hda_power_up(codec);
e1f0d669 828 dac_mode |= idx_val;
5f10c4a9
ML		 829 } else {
830 snd_hda_power_down(codec);
e1f0d669 831 dac_mode &= ~idx_val;
5f10c4a9
ML		 832 }
833
834 snd_hda_codec_write_cache(codec, codec->afg, 0,
835 kcontrol->private_value >> 16, dac_mode);
836
837 return 1;
838}
839
c7d4b2fa 840static struct hda_verb stac9200_core_init[] = {
2f2f4251 841 /* set dac0mux for dac converter */
c7d4b2fa 842 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 843 {}
844};
845
1194b5b7
TI		 846static struct hda_verb stac9200_eapd_init[] = {
847 /* set dac0mux for dac converter */
848 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
849 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
850 {}
851};
852
d654a660
MR		 853static struct hda_verb dell_eq_core_init[] = {
854 /* set master volume to max value without distortion
855 * and direct control */
856 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
e1f0d669
MR		 857 {}
858};
859
e2aec171 860static struct hda_verb stac92hd73xx_core_init[] = {
e1f0d669
MR		 861 /* set master volume and direct control */
862 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 863 {}
864};
865
d0513fc6 866static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 867 /* power state controls amps */
868 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 869 {}
d0513fc6
MR		 870};
871
e035b841 872static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 873 /* set master volume and direct control */
874 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 875 {}
541eee87
MR		 876};
877
ca8d33fc
MR		 878static struct hda_verb stac92hd71bxx_unmute_core_init[] = {
879 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
880 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 881 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
882 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 883 {}
884};
885
8e21c34c
TD		 886static struct hda_verb stac925x_core_init[] = {
887 /* set dac0mux for dac converter */
888 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 889 /* mute the master volume */
890 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 891 {}
892};
893
c7d4b2fa 894static struct hda_verb stac922x_core_init[] = {
2f2f4251 895 /* set master volume and direct control */
c7d4b2fa 896 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 897 {}
898};
899
93ed1503 900static struct hda_verb d965_core_init[] = {
19039bd0 901 /* set master volume and direct control */
93ed1503 902 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 903 /* unmute node 0x1b */
904 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
905 /* select node 0x03 as DAC */
906 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
907 {}
908};
909
3cc08dc6
MP		 910static struct hda_verb stac927x_core_init[] = {
911 /* set master volume and direct control */
912 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 913 /* enable analog pc beep path */
914 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 915 {}
916};
917
f3302a59
MP		 918static struct hda_verb stac9205_core_init[] = {
919 /* set master volume and direct control */
920 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 921 /* enable analog pc beep path */
922 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 923 {}
924};
925
b22b4821
MR		 926#define STAC_MONO_MUX \
927 { \
928 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
929 .name = "Mono Mux", \
930 .count = 1, \
931 .info = stac92xx_mono_mux_enum_info, \
932 .get = stac92xx_mono_mux_enum_get, \
933 .put = stac92xx_mono_mux_enum_put, \
934 }
935
e1f0d669 936#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 937 { \
938 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
939 .name = "Analog Loopback", \
e1f0d669 940 .count = cnt, \
5f10c4a9
ML		 941 .info = stac92xx_aloopback_info, \
942 .get = stac92xx_aloopback_get, \
943 .put = stac92xx_aloopback_put, \
944 .private_value = verb_read | (verb_write << 16), \
945 }
946
2fc99890
NL		 947#define DC_BIAS(xname, idx, nid) \
948 { \
949 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
950 .name = xname, \
951 .index = idx, \
952 .info = stac92xx_dc_bias_info, \
953 .get = stac92xx_dc_bias_get, \
954 .put = stac92xx_dc_bias_put, \
955 .private_value = nid, \
956 }
957
c8b6bf9b 958static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 959 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
960 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M		 961 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
962 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 963 { } /* end */
964};
965
d78d7a90
TI		 966static struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
967 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
968 {}
969};
970
971static struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 972 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI		 973 {}
974};
e1f0d669 975
d78d7a90
TI		 976static struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
977 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
978 {}
979};
980
d0513fc6 981
d78d7a90
TI		 982static struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
983 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
984};
541eee87 985
8e21c34c 986static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI		 987 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
988 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
2f2f4251
M		 989 { } /* end */
990};
991
d78d7a90
TI		 992static struct snd_kcontrol_new stac9205_loopback[] = {
993 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
994 {}
995};
996
d78d7a90
TI		 997static struct snd_kcontrol_new stac927x_loopback[] = {
998 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
999 {}
1000};
1001
1697055e
TI		 1002static struct snd_kcontrol_new stac_dmux_mixer = {
1003 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1004 .name = "Digital Input Source",
1005 /* count set later */
1006 .info = stac92xx_dmux_enum_info,
1007 .get = stac92xx_dmux_enum_get,
1008 .put = stac92xx_dmux_enum_put,
1009};
1010
d9737751
MR		 1011static struct snd_kcontrol_new stac_smux_mixer = {
1012 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1013 .name = "IEC958 Playback Source",
d9737751
MR		 1014 /* count set later */
1015 .info = stac92xx_smux_enum_info,
1016 .get = stac92xx_smux_enum_get,
1017 .put = stac92xx_smux_enum_put,
1018};
1019
2134ea4f
TI		 1020static const char *slave_vols[] = {
1021 "Front Playback Volume",
1022 "Surround Playback Volume",
1023 "Center Playback Volume",
1024 "LFE Playback Volume",
1025 "Side Playback Volume",
1026 "Headphone Playback Volume",
2134ea4f 1027 "Speaker Playback Volume",
2134ea4f
TI		 1028 NULL
1029};
1030
1031static const char *slave_sws[] = {
1032 "Front Playback Switch",
1033 "Surround Playback Switch",
1034 "Center Playback Switch",
1035 "LFE Playback Switch",
1036 "Side Playback Switch",
1037 "Headphone Playback Switch",
2134ea4f 1038 "Speaker Playback Switch",
edb54a55 1039 "IEC958 Playback Switch",
2134ea4f
TI		 1040 NULL
1041};
1042
603c4019 1043static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1044static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1045
2f2f4251
M		 1046static int stac92xx_build_controls(struct hda_codec *codec)
1047{
1048 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1049 struct auto_pin_cfg *cfg = &spec->autocfg;
1050 hda_nid_t nid;
2f2f4251 1051 int err;
c7d4b2fa 1052 int i;
2f2f4251 1053
6479c631
TI		 1054 if (spec->mixer) {
1055 err = snd_hda_add_new_ctls(codec, spec->mixer);
1056 if (err < 0)
1057 return err;
1058 }
c7d4b2fa
M		 1059
1060 for (i = 0; i < spec->num_mixers; i++) {
1061 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1062 if (err < 0)
1063 return err;
1064 }
5207e10e
TI		 1065 if (!spec->auto_mic && spec->num_dmuxes > 0 &&
1066 snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
1697055e 1067 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1068 err = snd_hda_ctl_add(codec,
1697055e
TI		 1069 snd_ctl_new1(&stac_dmux_mixer, codec));
1070 if (err < 0)
1071 return err;
1072 }
d9737751 1073 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1074 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1075 struct hda_input_mux *smux = &spec->private_smux;
1076 /* check for mute support on SPDIF out */
1077 if (wcaps & AC_WCAP_OUT_AMP) {
1078 smux->items[smux->num_items].label = "Off";
1079 smux->items[smux->num_items].index = 0;
1080 smux->num_items++;
1081 spec->spdif_mute = 1;
1082 }
d9737751 1083 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1084 err = snd_hda_ctl_add(codec,
d9737751
MR		 1085 snd_ctl_new1(&stac_smux_mixer, codec));
1086 if (err < 0)
1087 return err;
1088 }
c7d4b2fa 1089
dabbed6f
M		 1090 if (spec->multiout.dig_out_nid) {
1091 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1092 if (err < 0)
1093 return err;
9a08160b
TI		 1094 err = snd_hda_create_spdif_share_sw(codec,
1095 &spec->multiout);
1096 if (err < 0)
1097 return err;
1098 spec->multiout.share_spdif = 1;
dabbed6f 1099 }
da74ae3e 1100 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1101 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1102 if (err < 0)
1103 return err;
1104 }
2134ea4f
TI		 1105
1106 /* if we have no master control, let's create it */
1107 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1108 unsigned int vmaster_tlv[4];
2134ea4f 1109 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1110 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI		 1111 /* correct volume offset */
1112 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
2134ea4f 1113 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1114 vmaster_tlv, slave_vols);
2134ea4f
TI		 1115 if (err < 0)
1116 return err;
1117 }
1118 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1119 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1120 NULL, slave_sws);
1121 if (err < 0)
1122 return err;
1123 }
1124
d78d7a90
TI		 1125 if (spec->aloopback_ctl &&
1126 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1127 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1128 if (err < 0)
1129 return err;
1130 }
1131
603c4019 1132 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1133
1134 /* create jack input elements */
1135 if (spec->hp_detect) {
1136 for (i = 0; i < cfg->hp_outs; i++) {
1137 int type = SND_JACK_HEADPHONE;
1138 nid = cfg->hp_pins[i];
1139 /* jack detection */
1140 if (cfg->hp_outs == i)
1141 type |= SND_JACK_LINEOUT;
1142 err = stac92xx_add_jack(codec, nid, type);
1143 if (err < 0)
1144 return err;
1145 }
1146 }
1147 for (i = 0; i < cfg->line_outs; i++) {
1148 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1149 SND_JACK_LINEOUT);
1150 if (err < 0)
1151 return err;
1152 }
1153 for (i = 0; i < AUTO_PIN_LAST; i++) {
1154 nid = cfg->input_pins[i];
1155 if (nid) {
1156 err = stac92xx_add_jack(codec, nid,
1157 SND_JACK_MICROPHONE);
1158 if (err < 0)
1159 return err;
1160 }
1161 }
1162
dabbed6f 1163 return 0;
2f2f4251
M		 1164}
1165
403d1944 1166static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1167 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1168 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1169};
1170
58eec423
MCC		 1171static unsigned int gateway9200_m4_pin_configs[8] = {
1172 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1173 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1174};
1175static unsigned int gateway9200_m4_2_pin_configs[8] = {
1176 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1177 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1178};
1179
1180/*
dfe495d0
TI		 1181 STAC 9200 pin configs for
1182 102801A8
1183 102801DE
1184 102801E8
1185*/
1186static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1187 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1188 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1189};
1190
1191/*
1192 STAC 9200 pin configs for
1193 102801C0
1194 102801C1
1195*/
1196static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1197 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1198 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1199};
1200
1201/*
1202 STAC 9200 pin configs for
1203 102801C4 (Dell Dimension E310)
1204 102801C5
1205 102801C7
1206 102801D9
1207 102801DA
1208 102801E3
1209*/
1210static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1211 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1212 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1213};
1214
1215
1216/*
1217 STAC 9200-32 pin configs for
1218 102801B5 (Dell Inspiron 630m)
1219 102801D8 (Dell Inspiron 640m)
1220*/
1221static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1222 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1223 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1224};
1225
1226/*
1227 STAC 9200-32 pin configs for
1228 102801C2 (Dell Latitude D620)
1229 102801C8
1230 102801CC (Dell Latitude D820)
1231 102801D4
1232 102801D6
1233*/
1234static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1235 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1236 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1237};
1238
1239/*
1240 STAC 9200-32 pin configs for
1241 102801CE (Dell XPS M1710)
1242 102801CF (Dell Precision M90)
1243*/
1244static unsigned int dell9200_m23_pin_configs[8] = {
1245 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1246 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1247};
1248
1249/*
1250 STAC 9200-32 pin configs for
1251 102801C9
1252 102801CA
1253 102801CB (Dell Latitude 120L)
1254 102801D3
1255*/
1256static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1257 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1258 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1259};
1260
1261/*
1262 STAC 9200-32 pin configs for
1263 102801BD (Dell Inspiron E1505n)
1264 102801EE
1265 102801EF
1266*/
1267static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1268 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1269 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1270};
1271
1272/*
1273 STAC 9200-32 pin configs for
1274 102801F5 (Dell Inspiron 1501)
1275 102801F6
1276*/
1277static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1278 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1279 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1280};
1281
1282/*
1283 STAC 9200-32
1284 102801CD (Dell Inspiron E1705/9400)
1285*/
1286static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1287 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1288 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1289};
1290
bf277785
TD		 1291static unsigned int oqo9200_pin_configs[8] = {
1292 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1293 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1294};
1295
dfe495d0 1296
f5fcc13c
TI		 1297static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1298 [STAC_REF] = ref9200_pin_configs,
bf277785 1299 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1300 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1301 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1302 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1303 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1304 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1305 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1306 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1307 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1308 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1309 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1310 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1311 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1312 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1313};
1314
f5fcc13c 1315static const char *stac9200_models[STAC_9200_MODELS] = {
1607b8ea 1316 [STAC_AUTO] = "auto",
f5fcc13c 1317 [STAC_REF] = "ref",
bf277785 1318 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1319 [STAC_9200_DELL_D21] = "dell-d21",
1320 [STAC_9200_DELL_D22] = "dell-d22",
1321 [STAC_9200_DELL_D23] = "dell-d23",
1322 [STAC_9200_DELL_M21] = "dell-m21",
1323 [STAC_9200_DELL_M22] = "dell-m22",
1324 [STAC_9200_DELL_M23] = "dell-m23",
1325 [STAC_9200_DELL_M24] = "dell-m24",
1326 [STAC_9200_DELL_M25] = "dell-m25",
1327 [STAC_9200_DELL_M26] = "dell-m26",
1328 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1329 [STAC_9200_M4] = "gateway-m4",
1330 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1331 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1332};
1333
1334static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1335 /* SigmaTel reference board */
1336 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1337 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1338 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1339 "DFI LanParty", STAC_REF),
e7377071 1340 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1341 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1342 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1343 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1344 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1345 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1346 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1347 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1348 "unknown Dell", STAC_9200_DELL_D22),
1349 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1350 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1351 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1352 "Dell Latitude D620", STAC_9200_DELL_M22),
1353 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1354 "unknown Dell", STAC_9200_DELL_D23),
1355 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1356 "unknown Dell", STAC_9200_DELL_D23),
1357 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1358 "unknown Dell", STAC_9200_DELL_M22),
1359 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1360 "unknown Dell", STAC_9200_DELL_M24),
1361 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1362 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1363 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1364 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1365 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1366 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1367 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1368 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1369 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1370 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1371 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1372 "Dell Precision M90", STAC_9200_DELL_M23),
1373 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1374 "unknown Dell", STAC_9200_DELL_M22),
1375 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1376 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1377 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1378 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1379 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1380 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1381 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1382 "unknown Dell", STAC_9200_DELL_D23),
1383 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1384 "unknown Dell", STAC_9200_DELL_D23),
1385 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1386 "unknown Dell", STAC_9200_DELL_D21),
1387 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1388 "unknown Dell", STAC_9200_DELL_D23),
1389 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1390 "unknown Dell", STAC_9200_DELL_D21),
1391 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1392 "unknown Dell", STAC_9200_DELL_M25),
1393 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1394 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1395 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1396 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1397 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1398 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1399 /* Panasonic */
117f257d 1400 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1401 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1402 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1403 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1404 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1405 /* OQO Mobile */
1406 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1407 {} /* terminator */
1408};
1409
8e21c34c
TD		 1410static unsigned int ref925x_pin_configs[8] = {
1411 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1412 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1413};
1414
9cb36c2a
MCC		 1415static unsigned int stac925xM1_pin_configs[8] = {
1416 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1417 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1418};
1419
9cb36c2a
MCC		 1420static unsigned int stac925xM1_2_pin_configs[8] = {
1421 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1422 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1423};
58eec423 1424
9cb36c2a
MCC		 1425static unsigned int stac925xM2_pin_configs[8] = {
1426 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1427 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1428};
1429
8e21c34c 1430static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1431 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1432 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1433};
1434
9cb36c2a
MCC		 1435static unsigned int stac925xM3_pin_configs[8] = {
1436 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1437 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1438};
58eec423 1439
9cb36c2a
MCC		 1440static unsigned int stac925xM5_pin_configs[8] = {
1441 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1442 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1443};
1444
9cb36c2a
MCC		 1445static unsigned int stac925xM6_pin_configs[8] = {
1446 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1447 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1448};
1449
1450static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1451 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1452 [STAC_M1] = stac925xM1_pin_configs,
1453 [STAC_M1_2] = stac925xM1_2_pin_configs,
1454 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1455 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1456 [STAC_M3] = stac925xM3_pin_configs,
1457 [STAC_M5] = stac925xM5_pin_configs,
1458 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1459};
1460
1461static const char *stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1462 [STAC_925x_AUTO] = "auto",
8e21c34c 1463 [STAC_REF] = "ref",
9cb36c2a
MCC		 1464 [STAC_M1] = "m1",
1465 [STAC_M1_2] = "m1-2",
1466 [STAC_M2] = "m2",
8e21c34c 1467 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1468 [STAC_M3] = "m3",
1469 [STAC_M5] = "m5",
1470 [STAC_M6] = "m6",
8e21c34c
TD		 1471};
1472
9cb36c2a 1473static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1474 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1475 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1476 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1477 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1478 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1479 /* Not sure about the brand name for those */
1480 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1481 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1482 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1483 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1484 {} /* terminator */
8e21c34c
TD		 1485};
1486
1487static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1488 /* SigmaTel reference board */
1489 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1491 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1492
1493 /* Default table for unknown ID */
1494 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1495
8e21c34c
TD		 1496 {} /* terminator */
1497};
1498
a7662640 1499static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1500 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1501 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1502 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1503 0x01452050,
1504};
1505
1506static unsigned int dell_m6_pin_configs[13] = {
1507 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1508 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1509 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1510 0x4f0000f0,
e1f0d669
MR		 1511};
1512
842ae638
TI		 1513static unsigned int alienware_m17x_pin_configs[13] = {
1514 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020,
1515 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0,
1516 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1517 0x904601b0,
1518};
1519
e1f0d669 1520static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1521 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1522 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1523 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1524 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1525 [STAC_DELL_EQ] = dell_m6_pin_configs,
842ae638 1526 [STAC_ALIENWARE_M17X] = alienware_m17x_pin_configs,
e1f0d669
MR		 1527};
1528
1529static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1530 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1531 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1532 [STAC_92HD73XX_REF] = "ref",
ae709440 1533 [STAC_92HD73XX_INTEL] = "intel",
661cd8fb
TI		 1534 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1535 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1536 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1537 [STAC_DELL_EQ] = "dell-eq",
842ae638 1538 [STAC_ALIENWARE_M17X] = "alienware",
e1f0d669
MR		 1539};
1540
1541static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1542 /* SigmaTel reference board */
1543 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1544 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1546 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF		 1547 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1548 "Intel DG45ID", STAC_92HD73XX_INTEL),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1550 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1552 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1554 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1556 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1558 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1560 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1562 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1564 "unknown Dell", STAC_DELL_M6_DMIC),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1566 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1567 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1568 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1569 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1570 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1571 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1572 "Dell Studio 1555", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1573 {} /* terminator */
1574};
1575
842ae638
TI		 1576static struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
1577 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1578 "Alienware M17x", STAC_ALIENWARE_M17X),
1579 {} /* terminator */
1580};
1581
8bb0ac55 1582static unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR		 1583 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1584 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR		 1585 0x01451160, 0x98560170,
1586};
1587
8bb0ac55
MR		 1588static unsigned int dell_s14_pin_configs[10] = {
1589 0x02214030, 0x02211010, 0x02a19020, 0x01014050,
1590 0x40f000f0, 0x01819040, 0x40f000f0, 0x90a60160,
1591 0x40f000f0, 0x40f000f0,
1592};
1593
d0513fc6
MR		 1594static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1595 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1596 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1597 [STAC_DELL_S14] = dell_s14_pin_configs,
d0513fc6
MR		 1598};
1599
1600static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1601 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1602 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1603 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1604 [STAC_DELL_S14] = "dell-s14",
d0513fc6
MR		 1605};
1606
1607static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1608 /* SigmaTel reference board */
1609 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1610 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 1611 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1612 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 1613 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1614 "unknown Dell", STAC_DELL_S14),
574f3c4f 1615 {} /* terminator */
d0513fc6
MR		 1616};
1617
616f89e7 1618static unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1619 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1620 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK		 1621 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1622 0x00000000
e035b841
MR		 1623};
1624
616f89e7 1625static unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1626 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1627 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1628 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1629 0x00000000
a7662640
MR		 1630};
1631
616f89e7 1632static unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR		 1633 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1634 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK		 1635 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1636 0x00000000
a7662640
MR		 1637};
1638
616f89e7 1639static unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR		 1640 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1641 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1642 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1643 0x00000000
3a7abfd2
MR		 1644};
1645
e035b841
MR		 1646static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1647 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1648 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1649 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1650 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1651 [STAC_HP_M4] = NULL,
1b0652eb 1652 [STAC_HP_DV5] = NULL,
ae6241fb 1653 [STAC_HP_HDX] = NULL,
514bf54c 1654 [STAC_HP_DV4_1222NR] = NULL,
e035b841
MR		 1655};
1656
1657static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1658 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1659 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1660 [STAC_DELL_M4_1] = "dell-m4-1",
1661 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1662 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1663 [STAC_HP_M4] = "hp-m4",
1b0652eb 1664 [STAC_HP_DV5] = "hp-dv5",
ae6241fb 1665 [STAC_HP_HDX] = "hp-hdx",
514bf54c 1666 [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
e035b841
MR		 1667};
1668
1669static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1670 /* SigmaTel reference board */
1671 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1672 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 1673 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1674 "DFI LanParty", STAC_92HD71BXX_REF),
514bf54c
JG		 1675 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
1676 "HP dv4-1222nr", STAC_HP_DV4_1222NR),
58d8395b
TI		 1677 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
1678 "HP", STAC_HP_DV5),
2ae466f8
TI		 1679 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
1680 "HP dv4-7", STAC_HP_DV5),
1681 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
1682 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 1683 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
1684 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 1685 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 1686 "HP mini 1000", STAC_HP_M4),
ae6241fb 1687 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 1688 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 1689 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
1690 "HP dv6", STAC_HP_DV5),
1972d025
TI		 1691 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
1692 "HP", STAC_HP_DV5),
a7662640
MR		 1693 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1694 "unknown Dell", STAC_DELL_M4_1),
1695 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1696 "unknown Dell", STAC_DELL_M4_1),
1697 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1698 "unknown Dell", STAC_DELL_M4_1),
1699 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1700 "unknown Dell", STAC_DELL_M4_1),
1701 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1702 "unknown Dell", STAC_DELL_M4_1),
1703 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1704 "unknown Dell", STAC_DELL_M4_1),
1705 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1706 "unknown Dell", STAC_DELL_M4_1),
1707 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1708 "unknown Dell", STAC_DELL_M4_2),
1709 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1710 "unknown Dell", STAC_DELL_M4_2),
1711 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1712 "unknown Dell", STAC_DELL_M4_2),
1713 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1714 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1715 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1716 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1717 {} /* terminator */
1718};
1719
403d1944
MP		 1720static unsigned int ref922x_pin_configs[10] = {
1721 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1722 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1723 0x40000100, 0x40000100,
1724};
1725
dfe495d0
TI		 1726/*
1727 STAC 922X pin configs for
1728 102801A7
1729 102801AB
1730 102801A9
1731 102801D1
1732 102801D2
1733*/
1734static unsigned int dell_922x_d81_pin_configs[10] = {
1735 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1736 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1737 0x01813122, 0x400001f2,
1738};
1739
1740/*
1741 STAC 922X pin configs for
1742 102801AC
1743 102801D0
1744*/
1745static unsigned int dell_922x_d82_pin_configs[10] = {
1746 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1747 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1748 0x01813122, 0x400001f1,
1749};
1750
1751/*
1752 STAC 922X pin configs for
1753 102801BF
1754*/
1755static unsigned int dell_922x_m81_pin_configs[10] = {
1756 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1757 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1758 0x40C003f1, 0x405003f0,
1759};
1760
1761/*
1762 STAC 9221 A1 pin configs for
1763 102801D7 (Dell XPS M1210)
1764*/
1765static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1766 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1767 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1768 0x508003f3, 0x405003f4,
1769};
1770
403d1944 1771static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1772 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1773 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1774 0x02a19120, 0x40000100,
1775};
1776
1777static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1778 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1779 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1780 0x02a19320, 0x40000100,
1781};
1782
5d5d3bc3
IZ		 1783static unsigned int intel_mac_v1_pin_configs[10] = {
1784 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1785 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1786 0x400000fc, 0x400000fb,
1787};
1788
1789static unsigned int intel_mac_v2_pin_configs[10] = {
1790 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1791 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1792 0x400000fc, 0x400000fb,
6f0778d8
NB		 1793};
1794
5d5d3bc3
IZ		 1795static unsigned int intel_mac_v3_pin_configs[10] = {
1796 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1797 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1798 0x400000fc, 0x400000fb,
1799};
1800
5d5d3bc3
IZ		 1801static unsigned int intel_mac_v4_pin_configs[10] = {
1802 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1803 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1804 0x400000fc, 0x400000fb,
1805};
1806
5d5d3bc3
IZ		 1807static unsigned int intel_mac_v5_pin_configs[10] = {
1808 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1809 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1810 0x400000fc, 0x400000fb,
0dae0f83
TI		 1811};
1812
8c650087
MCC		 1813static unsigned int ecs202_pin_configs[10] = {
1814 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1815 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1816 0x9037012e, 0x40e000f2,
1817};
76c08828 1818
19039bd0 1819static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1820 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1821 [STAC_D945GTP3] = d945gtp3_pin_configs,
1822 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1823 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1824 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1825 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1826 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1827 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1828 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1829 /* for backward compatibility */
5d5d3bc3
IZ		 1830 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1831 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1832 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1833 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1834 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1835 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1836 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1837 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1838 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1839 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1840 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1841};
1842
f5fcc13c 1843static const char *stac922x_models[STAC_922X_MODELS] = {
1607b8ea 1844 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI		 1845 [STAC_D945_REF] = "ref",
1846 [STAC_D945GTP5] = "5stack",
1847 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1848 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1849 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1850 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1851 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1852 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1853 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1854 /* for backward compatibility */
f5fcc13c 1855 [STAC_MACMINI] = "macmini",
3fc24d85 1856 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1857 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1858 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1859 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1860 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1861 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1862 [STAC_922X_DELL_D81] = "dell-d81",
1863 [STAC_922X_DELL_D82] = "dell-d82",
1864 [STAC_922X_DELL_M81] = "dell-m81",
1865 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1866};
1867
1868static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1869 /* SigmaTel reference board */
1870 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1871 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 1872 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1873 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 1874 /* Intel 945G based systems */
1875 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1876 "Intel D945G", STAC_D945GTP3),
1877 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1878 "Intel D945G", STAC_D945GTP3),
1879 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1880 "Intel D945G", STAC_D945GTP3),
1881 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1882 "Intel D945G", STAC_D945GTP3),
1883 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1884 "Intel D945G", STAC_D945GTP3),
1885 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1886 "Intel D945G", STAC_D945GTP3),
1887 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1888 "Intel D945G", STAC_D945GTP3),
1889 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1890 "Intel D945G", STAC_D945GTP3),
1891 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1892 "Intel D945G", STAC_D945GTP3),
1893 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1894 "Intel D945G", STAC_D945GTP3),
1895 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1896 "Intel D945G", STAC_D945GTP3),
1897 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1898 "Intel D945G", STAC_D945GTP3),
1899 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1900 "Intel D945G", STAC_D945GTP3),
1901 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1902 "Intel D945G", STAC_D945GTP3),
1903 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1904 "Intel D945G", STAC_D945GTP3),
1905 /* Intel D945G 5-stack systems */
1906 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1907 "Intel D945G", STAC_D945GTP5),
1908 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1909 "Intel D945G", STAC_D945GTP5),
1910 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1911 "Intel D945G", STAC_D945GTP5),
1912 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1913 "Intel D945G", STAC_D945GTP5),
1914 /* Intel 945P based systems */
1915 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1916 "Intel D945P", STAC_D945GTP3),
1917 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1918 "Intel D945P", STAC_D945GTP3),
1919 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1920 "Intel D945P", STAC_D945GTP3),
1921 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1922 "Intel D945P", STAC_D945GTP3),
1923 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1924 "Intel D945P", STAC_D945GTP3),
1925 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1926 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 1927 /* other intel */
1928 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
1929 "Intel D945", STAC_D945_REF),
f5fcc13c 1930 /* other systems */
536319af 1931 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1932 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1933 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1934 /* Dell systems */
1935 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1936 "unknown Dell", STAC_922X_DELL_D81),
1937 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1938 "unknown Dell", STAC_922X_DELL_D81),
1939 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1940 "unknown Dell", STAC_922X_DELL_D81),
1941 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1942 "unknown Dell", STAC_922X_DELL_D82),
1943 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1944 "unknown Dell", STAC_922X_DELL_M81),
1945 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1946 "unknown Dell", STAC_922X_DELL_D82),
1947 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1948 "unknown Dell", STAC_922X_DELL_D81),
1949 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1950 "unknown Dell", STAC_922X_DELL_D81),
1951 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1952 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 1953 /* ECS/PC Chips boards */
dea0a509 1954 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 1955 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 1956 {} /* terminator */
1957};
1958
3cc08dc6 1959static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1960 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1961 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1962 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1963 0x01c42190, 0x40000100,
3cc08dc6
MP		 1964};
1965
93ed1503 1966static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1967 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1968 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1969 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1970 0x40000100, 0x40000100
1971};
1972
93ed1503
TD		 1973static unsigned int d965_5st_pin_configs[14] = {
1974 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1975 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1976 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1977 0x40000100, 0x40000100
1978};
1979
679d92ed
TI		 1980static unsigned int d965_5st_no_fp_pin_configs[14] = {
1981 0x40000100, 0x40000100, 0x0181304e, 0x01014010,
1982 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1983 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1984 0x40000100, 0x40000100
1985};
1986
4ff076e5
TD		 1987static unsigned int dell_3st_pin_configs[14] = {
1988 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1989 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1990 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1991 0x40c003fc, 0x40000100
1992};
1993
93ed1503 1994static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 1995 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 1996 [STAC_D965_REF] = ref927x_pin_configs,
1997 [STAC_D965_3ST] = d965_3st_pin_configs,
1998 [STAC_D965_5ST] = d965_5st_pin_configs,
679d92ed 1999 [STAC_D965_5ST_NO_FP] = d965_5st_no_fp_pin_configs,
8e9068b1
MR		 2000 [STAC_DELL_3ST] = dell_3st_pin_configs,
2001 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2002};
2003
f5fcc13c 2004static const char *stac927x_models[STAC_927X_MODELS] = {
1607b8ea 2005 [STAC_927X_AUTO] = "auto",
e28d8322 2006 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2007 [STAC_D965_REF] = "ref",
2008 [STAC_D965_3ST] = "3stack",
2009 [STAC_D965_5ST] = "5stack",
679d92ed 2010 [STAC_D965_5ST_NO_FP] = "5stack-no-fp",
8e9068b1
MR		 2011 [STAC_DELL_3ST] = "dell-3stack",
2012 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2013};
2014
2015static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2016 /* SigmaTel reference board */
2017 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2018 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 2019 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2020 "DFI LanParty", STAC_D965_REF),
81d3dbde 2021 /* Intel 946 based systems */
f5fcc13c
TI		 2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2023 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2024 /* 965 based 3 stack systems */
dea0a509
TI		 2025 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2026 "Intel D965", STAC_D965_3ST),
2027 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2028 "Intel D965", STAC_D965_3ST),
4ff076e5 2029 /* Dell 3 stack systems */
8e9068b1 2030 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2031 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2032 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2033 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2034 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2035 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2037 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
84d3dc20 2038 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 2039 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2041 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2042 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2043 /* 965 based 5 stack systems */
dea0a509
TI		 2044 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2045 "Intel D965", STAC_D965_5ST),
2046 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2047 "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2048 {} /* terminator */
2049};
2050
f3302a59
MP		 2051static unsigned int ref9205_pin_configs[12] = {
2052 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2053 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2054 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2055};
2056
dfe495d0
TI		 2057/*
2058 STAC 9205 pin configs for
2059 102801F1
2060 102801F2
2061 102801FC
2062 102801FD
2063 10280204
2064 1028021F
3fa2ef74 2065 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2066*/
2067static unsigned int dell_9205_m42_pin_configs[12] = {
2068 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2069 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2070 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2071};
2072
2073/*
2074 STAC 9205 pin configs for
2075 102801F9
2076 102801FA
2077 102801FE
2078 102801FF (Dell Precision M4300)
2079 10280206
2080 10280200
2081 10280201
2082*/
2083static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2084 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2085 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2086 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2087};
2088
dfe495d0 2089static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2090 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2091 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2092 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2093};
2094
f5fcc13c 2095static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2096 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2097 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2098 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2099 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2100 [STAC_9205_EAPD] = NULL,
f3302a59
MP		 2101};
2102
f5fcc13c 2103static const char *stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2104 [STAC_9205_AUTO] = "auto",
f5fcc13c 2105 [STAC_9205_REF] = "ref",
dfe495d0 2106 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2107 [STAC_9205_DELL_M43] = "dell-m43",
2108 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2109 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI		 2110};
2111
2112static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2113 /* SigmaTel reference board */
2114 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2115 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 2116 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
2117 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 2118 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2119 "DFI LanParty", STAC_9205_REF),
d9a4268e 2120 /* Dell */
dfe495d0
TI		 2121 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2122 "unknown Dell", STAC_9205_DELL_M42),
2123 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2124 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2125 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2126 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2127 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2128 "Dell Precision", STAC_9205_DELL_M43),
2129 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2130 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2131 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2132 "unknown Dell", STAC_9205_DELL_M42),
2133 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2134 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2135 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2136 "Dell Precision", STAC_9205_DELL_M43),
2137 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2138 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2139 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2140 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2141 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2142 "Dell Precision", STAC_9205_DELL_M43),
2143 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2144 "Dell Precision", STAC_9205_DELL_M43),
2145 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2146 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2147 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2148 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2149 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2150 "Dell Vostro 1500", STAC_9205_DELL_M42),
d9a4268e 2151 /* Gateway */
42b95f0c 2152 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
d9a4268e 2153 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP		 2154 {} /* terminator */
2155};
2156
330ee995
TI		 2157static void stac92xx_set_config_regs(struct hda_codec *codec,
2158 unsigned int *pincfgs)
11b44bbd
RF		 2159{
2160 int i;
2161 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2162
330ee995
TI		 2163 if (!pincfgs)
2164 return;
11b44bbd 2165
87d48363 2166 for (i = 0; i < spec->num_pins; i++)
330ee995
TI		 2167 if (spec->pin_nids[i] && pincfgs[i])
2168 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2169 pincfgs[i]);
af9f341a
TI		 2170}
2171
dabbed6f 2172/*
c7d4b2fa 2173 * Analog playback callbacks
dabbed6f 2174 */
c7d4b2fa
M		 2175static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2176 struct hda_codec *codec,
c8b6bf9b 2177 struct snd_pcm_substream *substream)
2f2f4251 2178{
dabbed6f 2179 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2180 if (spec->stream_delay)
2181 msleep(spec->stream_delay);
9a08160b
TI		 2182 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2183 hinfo);
2f2f4251
M		 2184}
2185
2f2f4251
M		 2186static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2187 struct hda_codec *codec,
2188 unsigned int stream_tag,
2189 unsigned int format,
c8b6bf9b 2190 struct snd_pcm_substream *substream)
2f2f4251
M		 2191{
2192 struct sigmatel_spec *spec = codec->spec;
403d1944 2193 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2194}
2195
2196static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2197 struct hda_codec *codec,
c8b6bf9b 2198 struct snd_pcm_substream *substream)
2f2f4251
M		 2199{
2200 struct sigmatel_spec *spec = codec->spec;
2201 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2202}
2203
dabbed6f
M		 2204/*
2205 * Digital playback callbacks
2206 */
2207static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2208 struct hda_codec *codec,
c8b6bf9b 2209 struct snd_pcm_substream *substream)
dabbed6f
M		 2210{
2211 struct sigmatel_spec *spec = codec->spec;
2212 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2213}
2214
2215static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2216 struct hda_codec *codec,
c8b6bf9b 2217 struct snd_pcm_substream *substream)
dabbed6f
M		 2218{
2219 struct sigmatel_spec *spec = codec->spec;
2220 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2221}
2222
6b97eb45
TI		 2223static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2224 struct hda_codec *codec,
2225 unsigned int stream_tag,
2226 unsigned int format,
2227 struct snd_pcm_substream *substream)
2228{
2229 struct sigmatel_spec *spec = codec->spec;
2230 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2231 stream_tag, format, substream);
2232}
2233
9411e21c
TI		 2234static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2235 struct hda_codec *codec,
2236 struct snd_pcm_substream *substream)
2237{
2238 struct sigmatel_spec *spec = codec->spec;
2239 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2240}
2241
dabbed6f 2242
2f2f4251
M		 2243/*
2244 * Analog capture callbacks
2245 */
2246static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2247 struct hda_codec *codec,
2248 unsigned int stream_tag,
2249 unsigned int format,
c8b6bf9b 2250 struct snd_pcm_substream *substream)
2f2f4251
M		 2251{
2252 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2253 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2254
8daaaa97
MR		 2255 if (spec->powerdown_adcs) {
2256 msleep(40);
8c2f767b 2257 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2258 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2259 }
2260 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2261 return 0;
2262}
2263
2264static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2265 struct hda_codec *codec,
c8b6bf9b 2266 struct snd_pcm_substream *substream)
2f2f4251
M		 2267{
2268 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2269 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2270
8daaaa97
MR		 2271 snd_hda_codec_cleanup_stream(codec, nid);
2272 if (spec->powerdown_adcs)
8c2f767b 2273 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2274 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2275 return 0;
2276}
2277
dabbed6f
M		 2278static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2279 .substreams = 1,
2280 .channels_min = 2,
2281 .channels_max = 2,
2282 /* NID is set in stac92xx_build_pcms */
2283 .ops = {
2284 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2285 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI		 2286 .prepare = stac92xx_dig_playback_pcm_prepare,
2287 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M		 2288 },
2289};
2290
2291static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2292 .substreams = 1,
2293 .channels_min = 2,
2294 .channels_max = 2,
2295 /* NID is set in stac92xx_build_pcms */
2296};
2297
2f2f4251
M		 2298static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2299 .substreams = 1,
2300 .channels_min = 2,
c7d4b2fa 2301 .channels_max = 8,
2f2f4251
M		 2302 .nid = 0x02, /* NID to query formats and rates */
2303 .ops = {
2304 .open = stac92xx_playback_pcm_open,
2305 .prepare = stac92xx_playback_pcm_prepare,
2306 .cleanup = stac92xx_playback_pcm_cleanup
2307 },
2308};
2309
3cc08dc6
MP		 2310static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2311 .substreams = 1,
2312 .channels_min = 2,
2313 .channels_max = 2,
2314 .nid = 0x06, /* NID to query formats and rates */
2315 .ops = {
2316 .open = stac92xx_playback_pcm_open,
2317 .prepare = stac92xx_playback_pcm_prepare,
2318 .cleanup = stac92xx_playback_pcm_cleanup
2319 },
2320};
2321
2f2f4251 2322static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2323 .channels_min = 2,
2324 .channels_max = 2,
9e05b7a3 2325 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2326 .ops = {
2327 .prepare = stac92xx_capture_pcm_prepare,
2328 .cleanup = stac92xx_capture_pcm_cleanup
2329 },
2330};
2331
2332static int stac92xx_build_pcms(struct hda_codec *codec)
2333{
2334 struct sigmatel_spec *spec = codec->spec;
2335 struct hda_pcm *info = spec->pcm_rec;
2336
2337 codec->num_pcms = 1;
2338 codec->pcm_info = info;
2339
c7d4b2fa 2340 info->name = "STAC92xx Analog";
2f2f4251 2341 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI		 2342 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2343 spec->multiout.dac_nids[0];
2f2f4251 2344 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2345 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2346 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2347
2348 if (spec->alt_switch) {
2349 codec->num_pcms++;
2350 info++;
2351 info->name = "STAC92xx Analog Alt";
2352 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2353 }
2f2f4251 2354
dabbed6f
M		 2355 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2356 codec->num_pcms++;
2357 info++;
2358 info->name = "STAC92xx Digital";
0852d7a6 2359 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M		 2360 if (spec->multiout.dig_out_nid) {
2361 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2362 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2363 }
2364 if (spec->dig_in_nid) {
2365 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2366 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2367 }
2368 }
2369
2f2f4251
M		 2370 return 0;
2371}
2372
7c922de7
NL		 2373static unsigned int stac92xx_get_default_vref(struct hda_codec *codec,
2374 hda_nid_t nid)
c960a03b 2375{
1327a32b 2376 unsigned int pincap = snd_hda_query_pin_caps(codec, nid);
c960a03b
TI		 2377 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2378 if (pincap & AC_PINCAP_VREF_100)
2379 return AC_PINCTL_VREF_100;
2380 if (pincap & AC_PINCAP_VREF_80)
2381 return AC_PINCTL_VREF_80;
2382 if (pincap & AC_PINCAP_VREF_50)
2383 return AC_PINCTL_VREF_50;
2384 if (pincap & AC_PINCAP_VREF_GRD)
2385 return AC_PINCTL_VREF_GRD;
2386 return 0;
2387}
2388
403d1944
MP		 2389static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2390
2391{
82beb8fd
TI		 2392 snd_hda_codec_write_cache(codec, nid, 0,
2393 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2394}
2395
7c2ba97b
MR		 2396#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2397
2398static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2399 struct snd_ctl_elem_value *ucontrol)
2400{
2401 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2402 struct sigmatel_spec *spec = codec->spec;
2403
d7a89436 2404 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2405 return 0;
2406}
2407
62558ce1 2408static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid);
c6e4c666 2409
7c2ba97b
MR		 2410static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2411 struct snd_ctl_elem_value *ucontrol)
2412{
2413 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2414 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2415 int nid = kcontrol->private_value;
2416
2417 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2418
2419 /* check to be sure that the ports are upto date with
2420 * switch changes
2421 */
62558ce1 2422 stac_issue_unsol_event(codec, nid);
7c2ba97b
MR		 2423
2424 return 1;
2425}
2426
7c922de7
NL		 2427static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol,
2428 struct snd_ctl_elem_info *uinfo)
2429{
2430 int i;
2431 static char *texts[] = {
2432 "Mic In", "Line In", "Line Out"
2433 };
2434
2435 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2436 struct sigmatel_spec *spec = codec->spec;
2437 hda_nid_t nid = kcontrol->private_value;
2438
2439 if (nid == spec->mic_switch || nid == spec->line_switch)
2440 i = 3;
2441 else
2442 i = 2;
2443
2444 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2445 uinfo->value.enumerated.items = i;
2446 uinfo->count = 1;
2447 if (uinfo->value.enumerated.item >= i)
2448 uinfo->value.enumerated.item = i-1;
2449 strcpy(uinfo->value.enumerated.name,
2450 texts[uinfo->value.enumerated.item]);
2451
2452 return 0;
2453}
2454
2455static int stac92xx_dc_bias_get(struct snd_kcontrol *kcontrol,
2456 struct snd_ctl_elem_value *ucontrol)
2457{
2458 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2459 hda_nid_t nid = kcontrol->private_value;
2460 unsigned int vref = stac92xx_vref_get(codec, nid);
2461
2462 if (vref == stac92xx_get_default_vref(codec, nid))
2463 ucontrol->value.enumerated.item[0] = 0;
2464 else if (vref == AC_PINCTL_VREF_GRD)
2465 ucontrol->value.enumerated.item[0] = 1;
2466 else if (vref == AC_PINCTL_VREF_HIZ)
2467 ucontrol->value.enumerated.item[0] = 2;
2468
2469 return 0;
2470}
2471
2472static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol,
2473 struct snd_ctl_elem_value *ucontrol)
2474{
2475 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2476 unsigned int new_vref = 0;
b8621516 2477 int error;
7c922de7
NL		 2478 hda_nid_t nid = kcontrol->private_value;
2479
2480 if (ucontrol->value.enumerated.item[0] == 0)
2481 new_vref = stac92xx_get_default_vref(codec, nid);
2482 else if (ucontrol->value.enumerated.item[0] == 1)
2483 new_vref = AC_PINCTL_VREF_GRD;
2484 else if (ucontrol->value.enumerated.item[0] == 2)
2485 new_vref = AC_PINCTL_VREF_HIZ;
2486 else
2487 return 0;
2488
2489 if (new_vref != stac92xx_vref_get(codec, nid)) {
2490 error = stac92xx_vref_set(codec, nid, new_vref);
2491 return error;
2492 }
2493
2494 return 0;
2495}
2496
2497static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol,
2498 struct snd_ctl_elem_info *uinfo)
2499{
2500 static char *texts[2];
2501 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2502 struct sigmatel_spec *spec = codec->spec;
2503
2504 if (kcontrol->private_value == spec->line_switch)
2505 texts[0] = "Line In";
2506 else
2507 texts[0] = "Mic In";
2508 texts[1] = "Line Out";
2509 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2510 uinfo->value.enumerated.items = 2;
2511 uinfo->count = 1;
2512
2513 if (uinfo->value.enumerated.item >= 2)
2514 uinfo->value.enumerated.item = 1;
2515 strcpy(uinfo->value.enumerated.name,
2516 texts[uinfo->value.enumerated.item]);
2517
2518 return 0;
2519}
403d1944
MP		 2520
2521static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2522{
2523 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2524 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2525 hda_nid_t nid = kcontrol->private_value;
2526 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
403d1944 2527
7c922de7 2528 ucontrol->value.enumerated.item[0] = spec->io_switch[io_idx];
403d1944
MP		 2529 return 0;
2530}
2531
2532static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2533{
2534 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2535 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2536 hda_nid_t nid = kcontrol->private_value;
2537 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
2538 unsigned short val = !!ucontrol->value.enumerated.item[0];
403d1944
MP		 2539
2540 spec->io_switch[io_idx] = val;
2541
2542 if (val)
2543 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2544 else {
2545 unsigned int pinctl = AC_PINCTL_IN_EN;
2546 if (io_idx) /* set VREF for mic */
7c922de7 2547 pinctl |= stac92xx_get_default_vref(codec, nid);
c960a03b
TI		 2548 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2549 }
40c1d308
JZ		 2550
2551 /* check the auto-mute again: we need to mute/unmute the speaker
2552 * appropriately according to the pin direction
2553 */
2554 if (spec->hp_detect)
62558ce1 2555 stac_issue_unsol_event(codec, nid);
40c1d308 2556
403d1944
MP		 2557 return 1;
2558}
2559
0fb87bb4
ML		 2560#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2561
2562static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2563 struct snd_ctl_elem_value *ucontrol)
2564{
2565 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2566 struct sigmatel_spec *spec = codec->spec;
2567
2568 ucontrol->value.integer.value[0] = spec->clfe_swap;
2569 return 0;
2570}
2571
2572static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2573 struct snd_ctl_elem_value *ucontrol)
2574{
2575 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2576 struct sigmatel_spec *spec = codec->spec;
2577 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2578 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2579
68ea7b2f 2580 if (spec->clfe_swap == val)
0fb87bb4
ML		 2581 return 0;
2582
68ea7b2f 2583 spec->clfe_swap = val;
0fb87bb4
ML		 2584
2585 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2586 spec->clfe_swap ? 0x4 : 0x0);
2587
2588 return 1;
2589}
2590
7c2ba97b
MR		 2591#define STAC_CODEC_HP_SWITCH(xname) \
2592 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2593 .name = xname, \
2594 .index = 0, \
2595 .info = stac92xx_hp_switch_info, \
2596 .get = stac92xx_hp_switch_get, \
2597 .put = stac92xx_hp_switch_put, \
2598 }
2599
403d1944
MP		 2600#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2601 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2602 .name = xname, \
2603 .index = 0, \
2604 .info = stac92xx_io_switch_info, \
2605 .get = stac92xx_io_switch_get, \
2606 .put = stac92xx_io_switch_put, \
2607 .private_value = xpval, \
2608 }
2609
0fb87bb4
ML		 2610#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2611 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2612 .name = xname, \
2613 .index = 0, \
2614 .info = stac92xx_clfe_switch_info, \
2615 .get = stac92xx_clfe_switch_get, \
2616 .put = stac92xx_clfe_switch_put, \
2617 .private_value = xpval, \
2618 }
403d1944 2619
c7d4b2fa
M		 2620enum {
2621 STAC_CTL_WIDGET_VOL,
2622 STAC_CTL_WIDGET_MUTE,
09a99959 2623 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2624 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2625 STAC_CTL_WIDGET_IO_SWITCH,
2fc99890
NL		 2626 STAC_CTL_WIDGET_CLFE_SWITCH,
2627 STAC_CTL_WIDGET_DC_BIAS
c7d4b2fa
M		 2628};
2629
c8b6bf9b 2630static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2631 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2632 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2633 STAC_MONO_MUX,
7c2ba97b 2634 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2635 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2636 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2fc99890 2637 DC_BIAS(NULL, 0, 0),
c7d4b2fa
M		 2638};
2639
2640/* add dynamic controls */
e3c75964
TI		 2641static struct snd_kcontrol_new *
2642stac_control_new(struct sigmatel_spec *spec,
2643 struct snd_kcontrol_new *ktemp,
2644 const char *name)
c7d4b2fa 2645{
c8b6bf9b 2646 struct snd_kcontrol_new *knew;
c7d4b2fa 2647
603c4019
TI		 2648 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2649 knew = snd_array_new(&spec->kctls);
2650 if (!knew)
e3c75964 2651 return NULL;
4d4e9bb3 2652 *knew = *ktemp;
82fe0c58 2653 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI		 2654 if (!knew->name) {
2655 /* roolback */
2656 memset(knew, 0, sizeof(*knew));
2657 spec->kctls.alloced--;
2658 return NULL;
2659 }
2660 return knew;
2661}
2662
2663static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2664 struct snd_kcontrol_new *ktemp,
2665 int idx, const char *name,
2666 unsigned long val)
2667{
2668 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name);
2669 if (!knew)
c7d4b2fa 2670 return -ENOMEM;
e3c75964 2671 knew->index = idx;
c7d4b2fa 2672 knew->private_value = val;
c7d4b2fa
M		 2673 return 0;
2674}
2675
4d4e9bb3
TI		 2676static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2677 int type, int idx, const char *name,
2678 unsigned long val)
2679{
2680 return stac92xx_add_control_temp(spec,
2681 &stac92xx_control_templates[type],
2682 idx, name, val);
2683}
2684
4682eee0
MR		 2685
2686/* add dynamic controls */
4d4e9bb3
TI		 2687static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2688 const char *name, unsigned long val)
4682eee0
MR		 2689{
2690 return stac92xx_add_control_idx(spec, type, 0, name, val);
2691}
2692
e3c75964
TI		 2693static struct snd_kcontrol_new stac_input_src_temp = {
2694 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2695 .name = "Input Source",
2696 .info = stac92xx_mux_enum_info,
2697 .get = stac92xx_mux_enum_get,
2698 .put = stac92xx_mux_enum_put,
2699};
2700
7c922de7
NL		 2701static inline int stac92xx_add_jack_mode_control(struct hda_codec *codec,
2702 hda_nid_t nid, int idx)
2703{
2704 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
2705 int control = 0;
2706 struct sigmatel_spec *spec = codec->spec;
2707 char name[22];
2708
2709 if (!((get_defcfg_connect(def_conf)) & AC_JACK_PORT_FIXED)) {
2710 if (stac92xx_get_default_vref(codec, nid) == AC_PINCTL_VREF_GRD
2711 && nid == spec->line_switch)
2712 control = STAC_CTL_WIDGET_IO_SWITCH;
2713 else if (snd_hda_query_pin_caps(codec, nid)
2714 & (AC_PINCAP_VREF_GRD << AC_PINCAP_VREF_SHIFT))
2715 control = STAC_CTL_WIDGET_DC_BIAS;
2716 else if (nid == spec->mic_switch)
2717 control = STAC_CTL_WIDGET_IO_SWITCH;
2718 }
2719
2720 if (control) {
2721 strcpy(name, auto_pin_cfg_labels[idx]);
2722 return stac92xx_add_control(codec->spec, control,
2723 strcat(name, " Jack Mode"), nid);
2724 }
2725
2726 return 0;
2727}
2728
e3c75964
TI		 2729static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2730{
2731 struct snd_kcontrol_new *knew;
2732 struct hda_input_mux *imux = &spec->private_imux;
2733
3d21d3f7
TI		 2734 if (spec->auto_mic)
2735 return 0; /* no need for input source */
e3c75964
TI		 2736 if (!spec->num_adcs || imux->num_items <= 1)
2737 return 0; /* no need for input source control */
2738 knew = stac_control_new(spec, &stac_input_src_temp,
2739 stac_input_src_temp.name);
2740 if (!knew)
2741 return -ENOMEM;
2742 knew->count = spec->num_adcs;
2743 return 0;
2744}
2745
c21ca4a8
TI		 2746/* check whether the line-input can be used as line-out */
2747static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2748{
2749 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2750 struct auto_pin_cfg *cfg = &spec->autocfg;
2751 hda_nid_t nid;
2752 unsigned int pincap;
8e9068b1 2753
c21ca4a8
TI		 2754 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2755 return 0;
2756 nid = cfg->input_pins[AUTO_PIN_LINE];
1327a32b 2757 pincap = snd_hda_query_pin_caps(codec, nid);
c21ca4a8
TI		 2758 if (pincap & AC_PINCAP_OUT)
2759 return nid;
2760 return 0;
2761}
403d1944 2762
c21ca4a8
TI		 2763/* check whether the mic-input can be used as line-out */
2764static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2765{
2766 struct sigmatel_spec *spec = codec->spec;
2767 struct auto_pin_cfg *cfg = &spec->autocfg;
2768 unsigned int def_conf, pincap;
2769 unsigned int mic_pin;
2770
2771 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2772 return 0;
2773 mic_pin = AUTO_PIN_MIC;
2774 for (;;) {
2775 hda_nid_t nid = cfg->input_pins[mic_pin];
330ee995 2776 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI		 2777 /* some laptops have an internal analog microphone
2778 * which can't be used as a output */
2779 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
1327a32b 2780 pincap = snd_hda_query_pin_caps(codec, nid);
c21ca4a8
TI		 2781 if (pincap & AC_PINCAP_OUT)
2782 return nid;
403d1944 2783 }
c21ca4a8
TI		 2784 if (mic_pin == AUTO_PIN_MIC)
2785 mic_pin = AUTO_PIN_FRONT_MIC;
2786 else
2787 break;
403d1944 2788 }
403d1944
MP		 2789 return 0;
2790}
2791
7b043899
SL		 2792static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2793{
2794 int i;
2795
2796 for (i = 0; i < spec->multiout.num_dacs; i++) {
2797 if (spec->multiout.dac_nids[i] == nid)
2798 return 1;
2799 }
2800
2801 return 0;
2802}
2803
c21ca4a8
TI		 2804static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2805{
2806 int i;
2807 if (is_in_dac_nids(spec, nid))
2808 return 1;
2809 for (i = 0; i < spec->autocfg.hp_outs; i++)
2810 if (spec->hp_dacs[i] == nid)
2811 return 1;
2812 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2813 if (spec->speaker_dacs[i] == nid)
2814 return 1;
2815 return 0;
2816}
2817
2818static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2819{
2820 struct sigmatel_spec *spec = codec->spec;
2821 int j, conn_len;
2822 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2823 unsigned int wcaps, wtype;
2824
2825 conn_len = snd_hda_get_connections(codec, nid, conn,
2826 HDA_MAX_CONNECTIONS);
2827 for (j = 0; j < conn_len; j++) {
14bafe32 2828 wcaps = get_wcaps(codec, conn[j]);
a22d543a 2829 wtype = get_wcaps_type(wcaps);
c21ca4a8
TI		 2830 /* we check only analog outputs */
2831 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2832 continue;
2833 /* if this route has a free DAC, assign it */
2834 if (!check_all_dac_nids(spec, conn[j])) {
2835 if (conn_len > 1) {
2836 /* select this DAC in the pin's input mux */
2837 snd_hda_codec_write_cache(codec, nid, 0,
2838 AC_VERB_SET_CONNECT_SEL, j);
2839 }
2840 return conn[j];
2841 }
2842 }
ee58a7ca
TI		 2843 /* if all DACs are already assigned, connect to the primary DAC */
2844 if (conn_len > 1) {
2845 for (j = 0; j < conn_len; j++) {
2846 if (conn[j] == spec->multiout.dac_nids[0]) {
2847 snd_hda_codec_write_cache(codec, nid, 0,
2848 AC_VERB_SET_CONNECT_SEL, j);
2849 break;
2850 }
2851 }
2852 }
c21ca4a8
TI		 2853 return 0;
2854}
2855
2856static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2857static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2858
3cc08dc6 2859/*
7b043899
SL		 2860 * Fill in the dac_nids table from the parsed pin configuration
2861 * This function only works when every pin in line_out_pins[]
2862 * contains atleast one DAC in its connection list. Some 92xx
2863 * codecs are not connected directly to a DAC, such as the 9200
2864 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2865 */
c21ca4a8 2866static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 2867{
2868 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2869 struct auto_pin_cfg *cfg = &spec->autocfg;
2870 int i;
2871 hda_nid_t nid, dac;
7b043899 2872
c7d4b2fa
M		 2873 for (i = 0; i < cfg->line_outs; i++) {
2874 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 2875 dac = get_unassigned_dac(codec, nid);
2876 if (!dac) {
df802952
TI		 2877 if (spec->multiout.num_dacs > 0) {
2878 /* we have already working output pins,
2879 * so let's drop the broken ones again
2880 */
2881 cfg->line_outs = spec->multiout.num_dacs;
2882 break;
2883 }
7b043899
SL		 2884 /* error out, no available DAC found */
2885 snd_printk(KERN_ERR
2886 "%s: No available DAC for pin 0x%x\n",
2887 __func__, nid);
2888 return -ENODEV;
2889 }
c21ca4a8
TI		 2890 add_spec_dacs(spec, dac);
2891 }
7b043899 2892
139e071b
TI		 2893 for (i = 0; i < cfg->hp_outs; i++) {
2894 nid = cfg->hp_pins[i];
2895 dac = get_unassigned_dac(codec, nid);
2896 if (dac) {
2897 if (!spec->multiout.hp_nid)
2898 spec->multiout.hp_nid = dac;
2899 else
2900 add_spec_extra_dacs(spec, dac);
2901 }
2902 spec->hp_dacs[i] = dac;
2903 }
2904
2905 for (i = 0; i < cfg->speaker_outs; i++) {
2906 nid = cfg->speaker_pins[i];
2907 dac = get_unassigned_dac(codec, nid);
2908 if (dac)
2909 add_spec_extra_dacs(spec, dac);
2910 spec->speaker_dacs[i] = dac;
2911 }
2912
c21ca4a8
TI		 2913 /* add line-in as output */
2914 nid = check_line_out_switch(codec);
2915 if (nid) {
2916 dac = get_unassigned_dac(codec, nid);
2917 if (dac) {
2918 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2919 nid, cfg->line_outs);
2920 cfg->line_out_pins[cfg->line_outs] = nid;
2921 cfg->line_outs++;
2922 spec->line_switch = nid;
2923 add_spec_dacs(spec, dac);
2924 }
2925 }
2926 /* add mic as output */
2927 nid = check_mic_out_switch(codec);
2928 if (nid) {
2929 dac = get_unassigned_dac(codec, nid);
2930 if (dac) {
2931 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2932 nid, cfg->line_outs);
2933 cfg->line_out_pins[cfg->line_outs] = nid;
2934 cfg->line_outs++;
2935 spec->mic_switch = nid;
2936 add_spec_dacs(spec, dac);
2937 }
2938 }
c7d4b2fa 2939
c21ca4a8 2940 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 2941 spec->multiout.num_dacs,
2942 spec->multiout.dac_nids[0],
2943 spec->multiout.dac_nids[1],
2944 spec->multiout.dac_nids[2],
2945 spec->multiout.dac_nids[3],
2946 spec->multiout.dac_nids[4]);
c21ca4a8 2947
c7d4b2fa
M		 2948 return 0;
2949}
2950
eb06ed8f 2951/* create volume control/switch for the given prefx type */
668b9652
TI		 2952static int create_controls_idx(struct hda_codec *codec, const char *pfx,
2953 int idx, hda_nid_t nid, int chs)
eb06ed8f 2954{
7c7767eb 2955 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI		 2956 char name[32];
2957 int err;
2958
7c7767eb
TI		 2959 if (!spec->check_volume_offset) {
2960 unsigned int caps, step, nums, db_scale;
2961 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
2962 step = (caps & AC_AMPCAP_STEP_SIZE) >>
2963 AC_AMPCAP_STEP_SIZE_SHIFT;
2964 step = (step + 1) * 25; /* in .01dB unit */
2965 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
2966 AC_AMPCAP_NUM_STEPS_SHIFT;
2967 db_scale = nums * step;
2968 /* if dB scale is over -64dB, and finer enough,
2969 * let's reduce it to half
2970 */
2971 if (db_scale > 6400 && nums >= 0x1f)
2972 spec->volume_offset = nums / 2;
2973 spec->check_volume_offset = 1;
2974 }
2975
eb06ed8f 2976 sprintf(name, "%s Playback Volume", pfx);
668b9652 2977 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI		 2978 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
2979 spec->volume_offset));
eb06ed8f
TI		 2980 if (err < 0)
2981 return err;
2982 sprintf(name, "%s Playback Switch", pfx);
668b9652 2983 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI		 2984 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2985 if (err < 0)
2986 return err;
2987 return 0;
2988}
2989
668b9652
TI		 2990#define create_controls(codec, pfx, nid, chs) \
2991 create_controls_idx(codec, pfx, 0, nid, chs)
2992
ae0afd81
MR		 2993static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2994{
c21ca4a8 2995 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 2996 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2997 return 1;
2998 } else {
2999 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3000 spec->multiout.num_dacs++;
3001 }
3002 return 0;
3003}
3004
c21ca4a8 3005static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3006{
c21ca4a8
TI		 3007 int i;
3008 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3009 if (!spec->multiout.extra_out_nid[i]) {
3010 spec->multiout.extra_out_nid[i] = nid;
3011 return 0;
3012 }
3013 }
3014 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3015 return 1;
ae0afd81
MR		 3016}
3017
dc04d1b4
TI		 3018/* Create output controls
3019 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3020 */
3021static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3022 const hda_nid_t *pins,
3023 const hda_nid_t *dac_nids,
3024 int type)
c7d4b2fa 3025{
76624534 3026 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI		 3027 static const char *chname[4] = {
3028 "Front", "Surround", NULL /*CLFE*/, "Side"
3029 };
dc04d1b4 3030 hda_nid_t nid;
91589232
TI		 3031 int i, err;
3032 unsigned int wid_caps;
0fb87bb4 3033
dc04d1b4 3034 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
ffd0e56c
TI		 3035 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
3036 wid_caps = get_wcaps(codec, pins[i]);
3037 if (wid_caps & AC_WCAP_UNSOL_CAP)
3038 spec->hp_detect = 1;
3039 }
dc04d1b4
TI		 3040 nid = dac_nids[i];
3041 if (!nid)
3042 continue;
3043 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3044 /* Center/LFE */
7c7767eb 3045 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3046 if (err < 0)
c7d4b2fa 3047 return err;
7c7767eb 3048 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3049 if (err < 0)
c7d4b2fa 3050 return err;
0fb87bb4
ML		 3051
3052 wid_caps = get_wcaps(codec, nid);
3053
3054 if (wid_caps & AC_WCAP_LR_SWAP) {
3055 err = stac92xx_add_control(spec,
3056 STAC_CTL_WIDGET_CLFE_SWITCH,
3057 "Swap Center/LFE Playback Switch", nid);
3058
3059 if (err < 0)
3060 return err;
3061 }
3062
c7d4b2fa 3063 } else {
dc04d1b4 3064 const char *name;
668b9652 3065 int idx;
dc04d1b4
TI		 3066 switch (type) {
3067 case AUTO_PIN_HP_OUT:
668b9652
TI		 3068 name = "Headphone";
3069 idx = i;
dc04d1b4
TI		 3070 break;
3071 case AUTO_PIN_SPEAKER_OUT:
668b9652
TI		 3072 name = "Speaker";
3073 idx = i;
dc04d1b4
TI		 3074 break;
3075 default:
3076 name = chname[i];
668b9652 3077 idx = 0;
dc04d1b4 3078 break;
76624534 3079 }
668b9652 3080 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3081 if (err < 0)
c7d4b2fa
M		 3082 return err;
3083 }
3084 }
dc04d1b4
TI		 3085 return 0;
3086}
3087
6479c631
TI		 3088static int stac92xx_add_capvol_ctls(struct hda_codec *codec, unsigned long vol,
3089 unsigned long sw, int idx)
3090{
3091 int err;
3092 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx,
bf677bd8 3093 "Capture Volume", vol);
6479c631
TI		 3094 if (err < 0)
3095 return err;
3096 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_MUTE, idx,
bf677bd8 3097 "Capture Switch", sw);
6479c631
TI		 3098 if (err < 0)
3099 return err;
3100 return 0;
3101}
3102
dc04d1b4
TI		 3103/* add playback controls from the parsed DAC table */
3104static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3105 const struct auto_pin_cfg *cfg)
3106{
3107 struct sigmatel_spec *spec = codec->spec;
7c922de7 3108 hda_nid_t nid;
dc04d1b4 3109 int err;
7c922de7 3110 int idx;
dc04d1b4
TI		 3111
3112 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3113 spec->multiout.dac_nids,
3114 cfg->line_out_type);
3115 if (err < 0)
3116 return err;
c7d4b2fa 3117
a9cb5c90 3118 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3119 err = stac92xx_add_control(spec,
3120 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3121 "Headphone as Line Out Switch",
3122 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3123 if (err < 0)
3124 return err;
3125 }
3126
7c922de7
NL		 3127 for (idx = AUTO_PIN_MIC; idx <= AUTO_PIN_FRONT_LINE; idx++) {
3128 nid = cfg->input_pins[idx];
3129 if (nid) {
3130 err = stac92xx_add_jack_mode_control(codec, nid, idx);
3131 if (err < 0)
3132 return err;
3133 }
b5895dc8 3134 }
403d1944 3135
c7d4b2fa
M		 3136 return 0;
3137}
3138
eb06ed8f
TI		 3139/* add playback controls for Speaker and HP outputs */
3140static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3141 struct auto_pin_cfg *cfg)
3142{
3143 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI		 3144 int err;
3145
3146 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3147 spec->hp_dacs, AUTO_PIN_HP_OUT);
3148 if (err < 0)
3149 return err;
3150
3151 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3152 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3153 if (err < 0)
3154 return err;
eb06ed8f 3155
c7d4b2fa
M		 3156 return 0;
3157}
3158
b22b4821 3159/* labels for mono mux outputs */
d0513fc6
MR		 3160static const char *stac92xx_mono_labels[4] = {
3161 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3162};
3163
3164/* create mono mux for mono out on capable codecs */
3165static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3166{
3167 struct sigmatel_spec *spec = codec->spec;
3168 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3169 int i, num_cons;
3170 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3171
3172 num_cons = snd_hda_get_connections(codec,
3173 spec->mono_nid,
3174 con_lst,
3175 HDA_MAX_NUM_INPUTS);
16a433d8 3176 if (num_cons <= 0 || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
b22b4821
MR		 3177 return -EINVAL;
3178
3179 for (i = 0; i < num_cons; i++) {
3180 mono_mux->items[mono_mux->num_items].label =
3181 stac92xx_mono_labels[i];
3182 mono_mux->items[mono_mux->num_items].index = i;
3183 mono_mux->num_items++;
3184 }
09a99959
MR		 3185
3186 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3187 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3188}
3189
1cd2224c
MR		 3190/* create PC beep volume controls */
3191static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3192 hda_nid_t nid)
3193{
3194 struct sigmatel_spec *spec = codec->spec;
3195 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3196 int err;
3197
3198 /* check for mute support for the the amp */
3199 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3200 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3201 "PC Beep Playback Switch",
3202 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3203 if (err < 0)
3204 return err;
3205 }
3206
3207 /* check to see if there is volume support for the amp */
3208 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3209 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3210 "PC Beep Playback Volume",
3211 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3212 if (err < 0)
3213 return err;
3214 }
3215 return 0;
3216}
3217
4d4e9bb3
TI		 3218#ifdef CONFIG_SND_HDA_INPUT_BEEP
3219#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3220
3221static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3222 struct snd_ctl_elem_value *ucontrol)
3223{
3224 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3225 ucontrol->value.integer.value[0] = codec->beep->enabled;
3226 return 0;
3227}
3228
3229static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3230 struct snd_ctl_elem_value *ucontrol)
3231{
3232 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3233 int enabled = !!ucontrol->value.integer.value[0];
3234 if (codec->beep->enabled != enabled) {
3235 codec->beep->enabled = enabled;
3236 return 1;
3237 }
3238 return 0;
3239}
3240
3241static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3242 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3243 .info = stac92xx_dig_beep_switch_info,
3244 .get = stac92xx_dig_beep_switch_get,
3245 .put = stac92xx_dig_beep_switch_put,
3246};
3247
3248static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3249{
3250 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3251 0, "PC Beep Playback Switch", 0);
3252}
3253#endif
3254
4682eee0
MR		 3255static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3256{
3257 struct sigmatel_spec *spec = codec->spec;
667067d8 3258 int i, j, err = 0;
4682eee0
MR		 3259
3260 for (i = 0; i < spec->num_muxes; i++) {
667067d8
TI		 3261 hda_nid_t nid;
3262 unsigned int wcaps;
3263 unsigned long val;
3264
4682eee0
MR		 3265 nid = spec->mux_nids[i];
3266 wcaps = get_wcaps(codec, nid);
667067d8
TI		 3267 if (!(wcaps & AC_WCAP_OUT_AMP))
3268 continue;
4682eee0 3269
667067d8
TI		 3270 /* check whether already the same control was created as
3271 * normal Capture Volume.
3272 */
3273 val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
3274 for (j = 0; j < spec->num_caps; j++) {
3275 if (spec->capvols[j] == val)
3276 break;
4682eee0 3277 }
667067d8
TI		 3278 if (j < spec->num_caps)
3279 continue;
3280
3281 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, i,
3282 "Mux Capture Volume", val);
3283 if (err < 0)
3284 return err;
4682eee0
MR		 3285 }
3286 return 0;
3287};
3288
d9737751 3289static const char *stac92xx_spdif_labels[3] = {
65973632 3290 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3291};
3292
3293static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3294{
3295 struct sigmatel_spec *spec = codec->spec;
3296 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3297 const char **labels = spec->spdif_labels;
d9737751 3298 int i, num_cons;
65973632 3299 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3300
3301 num_cons = snd_hda_get_connections(codec,
3302 spec->smux_nids[0],
3303 con_lst,
3304 HDA_MAX_NUM_INPUTS);
16a433d8 3305 if (num_cons <= 0)
d9737751
MR		 3306 return -EINVAL;
3307
65973632
MR		 3308 if (!labels)
3309 labels = stac92xx_spdif_labels;
3310
d9737751 3311 for (i = 0; i < num_cons; i++) {
65973632 3312 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3313 spdif_mux->items[spdif_mux->num_items].index = i;
3314 spdif_mux->num_items++;
3315 }
3316
3317 return 0;
3318}
3319
8b65727b 3320/* labels for dmic mux inputs */
ddc2cec4 3321static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3322 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3323 "Digital Mic 3", "Digital Mic 4"
3324};
3325
3d21d3f7
TI		 3326static int get_connection_index(struct hda_codec *codec, hda_nid_t mux,
3327 hda_nid_t nid)
3328{
3329 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3330 int i, nums;
3331
3332 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3333 for (i = 0; i < nums; i++)
3334 if (conn[i] == nid)
3335 return i;
3336 return -1;
3337}
3338
667067d8 3339/* create a volume assigned to the given pin (only if supported) */
96f845de 3340/* return 1 if the volume control is created */
667067d8 3341static int create_elem_capture_vol(struct hda_codec *codec, hda_nid_t nid,
96f845de 3342 const char *label, int direction)
667067d8
TI		 3343{
3344 unsigned int caps, nums;
3345 char name[32];
96f845de 3346 int err;
667067d8 3347
96f845de
TI		 3348 if (direction == HDA_OUTPUT)
3349 caps = AC_WCAP_OUT_AMP;
3350 else
3351 caps = AC_WCAP_IN_AMP;
3352 if (!(get_wcaps(codec, nid) & caps))
667067d8 3353 return 0;
96f845de 3354 caps = query_amp_caps(codec, nid, direction);
667067d8
TI		 3355 nums = (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT;
3356 if (!nums)
3357 return 0;
3358 snprintf(name, sizeof(name), "%s Capture Volume", label);
96f845de
TI		 3359 err = stac92xx_add_control(codec->spec, STAC_CTL_WIDGET_VOL, name,
3360 HDA_COMPOSE_AMP_VAL(nid, 3, 0, direction));
3361 if (err < 0)
3362 return err;
3363 return 1;
667067d8
TI		 3364}
3365
8b65727b
MP		 3366/* create playback/capture controls for input pins on dmic capable codecs */
3367static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3368 const struct auto_pin_cfg *cfg)
3369{
3370 struct sigmatel_spec *spec = codec->spec;
5207e10e 3371 struct hda_input_mux *imux = &spec->private_imux;
8b65727b 3372 struct hda_input_mux *dimux = &spec->private_dimux;
5207e10e
TI		 3373 int err, i, active_mics;
3374 unsigned int def_conf;
8b65727b
MP		 3375
3376 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3377 dimux->items[dimux->num_items].index = 0;
3378 dimux->num_items++;
3379
5207e10e
TI		 3380 active_mics = 0;
3381 for (i = 0; i < spec->num_dmics; i++) {
667067d8
TI		 3382 /* check the validity: sometimes it's a dead vendor-spec node */
3383 if (get_wcaps_type(get_wcaps(codec, spec->dmic_nids[i]))
3384 != AC_WID_PIN)
3385 continue;
5207e10e
TI		 3386 def_conf = snd_hda_codec_get_pincfg(codec, spec->dmic_nids[i]);
3387 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE)
3388 active_mics++;
3389 }
3390
8b65727b 3391 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3392 hda_nid_t nid;
8b65727b 3393 int index;
5207e10e 3394 const char *label;
8b65727b 3395
667067d8
TI		 3396 nid = spec->dmic_nids[i];
3397 if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
3398 continue;
3399 def_conf = snd_hda_codec_get_pincfg(codec, nid);
8b65727b
MP		 3400 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3401 continue;
3402
3d21d3f7
TI		 3403 index = get_connection_index(codec, spec->dmux_nids[0], nid);
3404 if (index < 0)
3405 continue;
3406
5207e10e
TI		 3407 if (active_mics == 1)
3408 label = "Digital Mic";
3409 else
3410 label = stac92xx_dmic_labels[dimux->num_items];
3411
96f845de 3412 err = create_elem_capture_vol(codec, nid, label, HDA_INPUT);
667067d8
TI		 3413 if (err < 0)
3414 return err;
96f845de
TI		 3415 if (!err) {
3416 err = create_elem_capture_vol(codec, nid, label,
3417 HDA_OUTPUT);
3418 if (err < 0)
3419 return err;
3420 }
0678accd 3421
5207e10e 3422 dimux->items[dimux->num_items].label = label;
8b65727b
MP		 3423 dimux->items[dimux->num_items].index = index;
3424 dimux->num_items++;
5207e10e
TI		 3425 if (snd_hda_get_bool_hint(codec, "separate_dmux") != 1) {
3426 imux->items[imux->num_items].label = label;
3427 imux->items[imux->num_items].index = index;
3428 imux->num_items++;
3429 }
8b65727b
MP		 3430 }
3431
3432 return 0;
3433}
3434
3d21d3f7
TI		 3435static int check_mic_pin(struct hda_codec *codec, hda_nid_t nid,
3436 hda_nid_t *fixed, hda_nid_t *ext)
3437{
3438 unsigned int cfg;
3439
3440 if (!nid)
3441 return 0;
3442 cfg = snd_hda_codec_get_pincfg(codec, nid);
3443 switch (get_defcfg_connect(cfg)) {
3444 case AC_JACK_PORT_FIXED:
3445 if (*fixed)
3446 return 1; /* already occupied */
3447 *fixed = nid;
3448 break;
3449 case AC_JACK_PORT_COMPLEX:
3450 if (*ext)
3451 return 1; /* already occupied */
3452 *ext = nid;
3453 break;
3454 }
3455 return 0;
3456}
3457
3458static int set_mic_route(struct hda_codec *codec,
3459 struct sigmatel_mic_route *mic,
3460 hda_nid_t pin)
3461{
3462 struct sigmatel_spec *spec = codec->spec;
3463 struct auto_pin_cfg *cfg = &spec->autocfg;
3464 int i;
3465
3466 mic->pin = pin;
3467 for (i = AUTO_PIN_MIC; i <= AUTO_PIN_FRONT_MIC; i++)
3468 if (pin == cfg->input_pins[i])
3469 break;
3470 if (i <= AUTO_PIN_FRONT_MIC) {
3471 /* analog pin */
3472 mic->dmux_idx = 0;
3473 i = get_connection_index(codec, spec->mux_nids[0], pin);
3474 if (i < 0)
3475 return -1;
3476 mic->mux_idx = i;
da2a2aaa 3477 } else if (spec->dmux_nids) {
3d21d3f7
TI		 3478 /* digital pin */
3479 mic->mux_idx = 0;
3480 i = get_connection_index(codec, spec->dmux_nids[0], pin);
3481 if (i < 0)
3482 return -1;
3483 mic->dmux_idx = i;
3484 }
3485 return 0;
3486}
3487
3488/* return non-zero if the device is for automatic mic switch */
3489static int stac_check_auto_mic(struct hda_codec *codec)
3490{
3491 struct sigmatel_spec *spec = codec->spec;
3492 struct auto_pin_cfg *cfg = &spec->autocfg;
3493 hda_nid_t fixed, ext;
3494 int i;
3495
3496 for (i = AUTO_PIN_LINE; i < AUTO_PIN_LAST; i++) {
3497 if (cfg->input_pins[i])
3498 return 0; /* must be exclusively mics */
3499 }
3500 fixed = ext = 0;
3501 for (i = AUTO_PIN_MIC; i <= AUTO_PIN_FRONT_MIC; i++)
3502 if (check_mic_pin(codec, cfg->input_pins[i], &fixed, &ext))
3503 return 0;
3504 for (i = 0; i < spec->num_dmics; i++)
3505 if (check_mic_pin(codec, spec->dmic_nids[i], &fixed, &ext))
3506 return 0;
3507 if (!fixed || !ext)
3508 return 0;
3509 if (!(get_wcaps(codec, ext) & AC_WCAP_UNSOL_CAP))
3510 return 0; /* no unsol support */
3511 if (set_mic_route(codec, &spec->ext_mic, ext) ||
3512 set_mic_route(codec, &spec->int_mic, fixed))
3513 return 0; /* something is wrong */
3514 return 1;
3515}
3516
c7d4b2fa
M		 3517/* create playback/capture controls for input pins */
3518static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3519{
3520 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 3521 struct hda_input_mux *imux = &spec->private_imux;
667067d8 3522 int i, j;
c7d4b2fa
M		 3523
3524 for (i = 0; i < AUTO_PIN_LAST; i++) {
667067d8
TI		 3525 hda_nid_t nid = cfg->input_pins[i];
3526 int index, err;
314634bc 3527
667067d8 3528 if (!nid)
314634bc
TI		 3529 continue;
3530 index = -1;
3531 for (j = 0; j < spec->num_muxes; j++) {
667067d8
TI		 3532 index = get_connection_index(codec, spec->mux_nids[j],
3533 nid);
3534 if (index >= 0)
3535 break;
c7d4b2fa 3536 }
667067d8
TI		 3537 if (index < 0)
3538 continue;
3539
3540 err = create_elem_capture_vol(codec, nid,
96f845de
TI		 3541 auto_pin_cfg_labels[i],
3542 HDA_INPUT);
667067d8
TI		 3543 if (err < 0)
3544 return err;
3545
314634bc
TI		 3546 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3547 imux->items[imux->num_items].index = index;
3548 imux->num_items++;
c7d4b2fa 3549 }
5207e10e 3550 spec->num_analog_muxes = imux->num_items;
c7d4b2fa 3551
7b043899 3552 if (imux->num_items) {
62fe78e9
SR		 3553 /*
3554 * Set the current input for the muxes.
3555 * The STAC9221 has two input muxes with identical source
3556 * NID lists. Hopefully this won't get confused.
3557 */
3558 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3559 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3560 AC_VERB_SET_CONNECT_SEL,
3561 imux->items[0].index);
62fe78e9
SR		 3562 }
3563 }
3564
c7d4b2fa
M		 3565 return 0;
3566}
3567
c7d4b2fa
M		 3568static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3569{
3570 struct sigmatel_spec *spec = codec->spec;
3571 int i;
3572
3573 for (i = 0; i < spec->autocfg.line_outs; i++) {
3574 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3575 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3576 }
3577}
3578
3579static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3580{
3581 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3582 int i;
c7d4b2fa 3583
eb06ed8f
TI		 3584 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3585 hda_nid_t pin;
3586 pin = spec->autocfg.hp_pins[i];
3587 if (pin) /* connect to front */
3588 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3589 }
3590 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3591 hda_nid_t pin;
3592 pin = spec->autocfg.speaker_pins[i];
3593 if (pin) /* connect to front */
3594 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3595 }
c7d4b2fa
M		 3596}
3597
3cc08dc6 3598static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3599{
3600 struct sigmatel_spec *spec = codec->spec;
dc04d1b4 3601 int hp_swap = 0;
6479c631 3602 int i, err;
c7d4b2fa 3603
8b65727b
MP		 3604 if ((err = snd_hda_parse_pin_def_config(codec,
3605 &spec->autocfg,
3606 spec->dmic_nids)) < 0)
c7d4b2fa 3607 return err;
82bc955f 3608 if (! spec->autocfg.line_outs)
869264c4 3609 return 0; /* can't find valid pin config */
19039bd0 3610
bcecd9bd
JZ		 3611 /* If we have no real line-out pin and multiple hp-outs, HPs should
3612 * be set up as multi-channel outputs.
3613 */
3614 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3615 spec->autocfg.hp_outs > 1) {
3616 /* Copy hp_outs to line_outs, backup line_outs in
3617 * speaker_outs so that the following routines can handle
3618 * HP pins as primary outputs.
3619 */
c21ca4a8 3620 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3621 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3622 sizeof(spec->autocfg.line_out_pins));
3623 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3624 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3625 sizeof(spec->autocfg.hp_pins));
3626 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3627 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3628 spec->autocfg.hp_outs = 0;
dc04d1b4 3629 hp_swap = 1;
bcecd9bd 3630 }
09a99959 3631 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3632 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3633 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3634 u32 caps = query_amp_caps(codec,
3635 spec->autocfg.mono_out_pin, dir);
3636 hda_nid_t conn_list[1];
3637
3638 /* get the mixer node and then the mono mux if it exists */
3639 if (snd_hda_get_connections(codec,
3640 spec->autocfg.mono_out_pin, conn_list, 1) &&
3641 snd_hda_get_connections(codec, conn_list[0],
16a433d8 3642 conn_list, 1) > 0) {
09a99959
MR		 3643
3644 int wcaps = get_wcaps(codec, conn_list[0]);
a22d543a 3645 int wid_type = get_wcaps_type(wcaps);
09a99959
MR		 3646 /* LR swap check, some stac925x have a mux that
3647 * changes the DACs output path instead of the
3648 * mono-mux path.
3649 */
3650 if (wid_type == AC_WID_AUD_SEL &&
3651 !(wcaps & AC_WCAP_LR_SWAP))
3652 spec->mono_nid = conn_list[0];
3653 }
d0513fc6
MR		 3654 if (dir) {
3655 hda_nid_t nid = spec->autocfg.mono_out_pin;
3656
3657 /* most mono outs have a least a mute/unmute switch */
3658 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3659 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3660 "Mono Playback Switch",
3661 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3662 if (err < 0)
3663 return err;
d0513fc6
MR		 3664 /* check for volume support for the amp */
3665 if ((caps & AC_AMPCAP_NUM_STEPS)
3666 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3667 err = stac92xx_add_control(spec,
3668 STAC_CTL_WIDGET_VOL,
3669 "Mono Playback Volume",
3670 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3671 if (err < 0)
3672 return err;
3673 }
09a99959
MR		 3674 }
3675
3676 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3677 AC_PINCTL_OUT_EN);
3678 }
bcecd9bd 3679
c21ca4a8
TI		 3680 if (!spec->multiout.num_dacs) {
3681 err = stac92xx_auto_fill_dac_nids(codec);
3682 if (err < 0)
19039bd0 3683 return err;
c9280d68
TI		 3684 err = stac92xx_auto_create_multi_out_ctls(codec,
3685 &spec->autocfg);
3686 if (err < 0)
3687 return err;
c21ca4a8 3688 }
c7d4b2fa 3689
1cd2224c
MR		 3690 /* setup analog beep controls */
3691 if (spec->anabeep_nid > 0) {
3692 err = stac92xx_auto_create_beep_ctls(codec,
3693 spec->anabeep_nid);
3694 if (err < 0)
3695 return err;
3696 }
3697
3698 /* setup digital beep controls and input device */
3699#ifdef CONFIG_SND_HDA_INPUT_BEEP
3700 if (spec->digbeep_nid > 0) {
3701 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3702 unsigned int caps;
1cd2224c
MR		 3703
3704 err = stac92xx_auto_create_beep_ctls(codec, nid);
3705 if (err < 0)
3706 return err;
3707 err = snd_hda_attach_beep_device(codec, nid);
3708 if (err < 0)
3709 return err;
fa797966
TI		 3710 /* IDT/STAC codecs have linear beep tone parameter */
3711 codec->beep->linear_tone = 1;
4d4e9bb3
TI		 3712 /* if no beep switch is available, make its own one */
3713 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3714 if (codec->beep &&
3715 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3716 err = stac92xx_beep_switch_ctl(codec);
3717 if (err < 0)
3718 return err;
3719 }
1cd2224c
MR		 3720 }
3721#endif
3722
0fb87bb4 3723 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML		 3724 if (err < 0)
3725 return err;
3726
dc04d1b4
TI		 3727 /* All output parsing done, now restore the swapped hp pins */
3728 if (hp_swap) {
3729 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3730 sizeof(spec->autocfg.hp_pins));
3731 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3732 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3733 spec->autocfg.line_outs = 0;
3734 }
0fb87bb4 3735
3d21d3f7
TI		 3736 if (stac_check_auto_mic(codec)) {
3737 spec->auto_mic = 1;
3738 /* only one capture for auto-mic */
3739 spec->num_adcs = 1;
3740 spec->num_caps = 1;
3741 spec->num_muxes = 1;
3742 }
3743
6479c631
TI		 3744 for (i = 0; i < spec->num_caps; i++) {
3745 err = stac92xx_add_capvol_ctls(codec, spec->capvols[i],
3746 spec->capsws[i], i);
3747 if (err < 0)
3748 return err;
3749 }
3750
dc04d1b4 3751 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 3752 if (err < 0)
c7d4b2fa
M		 3753 return err;
3754
b22b4821
MR		 3755 if (spec->mono_nid > 0) {
3756 err = stac92xx_auto_create_mono_output_ctls(codec);
3757 if (err < 0)
3758 return err;
3759 }
2a9c7816 3760 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3761 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3762 &spec->autocfg)) < 0)
3763 return err;
4682eee0
MR		 3764 if (spec->num_muxes > 0) {
3765 err = stac92xx_auto_create_mux_input_ctls(codec);
3766 if (err < 0)
3767 return err;
3768 }
d9737751
MR		 3769 if (spec->num_smuxes > 0) {
3770 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3771 if (err < 0)
3772 return err;
3773 }
8b65727b 3774
e3c75964
TI		 3775 err = stac92xx_add_input_source(spec);
3776 if (err < 0)
3777 return err;
3778
c7d4b2fa 3779 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3780 if (spec->multiout.max_channels > 2)
c7d4b2fa 3781 spec->surr_switch = 1;
c7d4b2fa 3782
0852d7a6 3783 if (spec->autocfg.dig_outs)
3cc08dc6 3784 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3785 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3786 spec->dig_in_nid = dig_in;
c7d4b2fa 3787
603c4019
TI		 3788 if (spec->kctls.list)
3789 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3790
3791 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3792 if (!spec->dinput_mux)
3793 spec->dinput_mux = &spec->private_dimux;
d9737751 3794 spec->sinput_mux = &spec->private_smux;
b22b4821 3795 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 3796 return 1;
3797}
3798
82bc955f
TI		 3799/* add playback controls for HP output */
3800static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3801 struct auto_pin_cfg *cfg)
3802{
3803 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3804 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3805 unsigned int wid_caps;
3806
3807 if (! pin)
3808 return 0;
3809
3810 wid_caps = get_wcaps(codec, pin);
505cb341 3811 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3812 spec->hp_detect = 1;
82bc955f
TI		 3813
3814 return 0;
3815}
3816
160ea0dc
RF		 3817/* add playback controls for LFE output */
3818static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3819 struct auto_pin_cfg *cfg)
3820{
3821 struct sigmatel_spec *spec = codec->spec;
3822 int err;
3823 hda_nid_t lfe_pin = 0x0;
3824 int i;
3825
3826 /*
3827 * search speaker outs and line outs for a mono speaker pin
3828 * with an amp. If one is found, add LFE controls
3829 * for it.
3830 */
3831 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3832 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3833 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3834 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3835 if (wcaps == AC_WCAP_OUT_AMP)
3836 /* found a mono speaker with an amp, must be lfe */
3837 lfe_pin = pin;
3838 }
3839
3840 /* if speaker_outs is 0, then speakers may be in line_outs */
3841 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3842 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3843 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3844 unsigned int defcfg;
330ee995 3845 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 3846 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3847 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3848 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3849 if (wcaps == AC_WCAP_OUT_AMP)
3850 /* found a mono speaker with an amp,
3851 must be lfe */
3852 lfe_pin = pin;
3853 }
3854 }
3855 }
3856
3857 if (lfe_pin) {
7c7767eb 3858 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3859 if (err < 0)
3860 return err;
3861 }
3862
3863 return 0;
3864}
3865
c7d4b2fa
M		 3866static int stac9200_parse_auto_config(struct hda_codec *codec)
3867{
3868 struct sigmatel_spec *spec = codec->spec;
3869 int err;
3870
df694daa 3871 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3872 return err;
3873
3874 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3875 return err;
3876
82bc955f
TI		 3877 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3878 return err;
3879
160ea0dc
RF		 3880 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3881 return err;
3882
355a0ec4
TI		 3883 if (spec->num_muxes > 0) {
3884 err = stac92xx_auto_create_mux_input_ctls(codec);
3885 if (err < 0)
3886 return err;
3887 }
3888
e3c75964
TI		 3889 err = stac92xx_add_input_source(spec);
3890 if (err < 0)
3891 return err;
3892
0852d7a6 3893 if (spec->autocfg.dig_outs)
c7d4b2fa 3894 spec->multiout.dig_out_nid = 0x05;
82bc955f 3895 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3896 spec->dig_in_nid = 0x04;
c7d4b2fa 3897
603c4019
TI		 3898 if (spec->kctls.list)
3899 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3900
3901 spec->input_mux = &spec->private_imux;
8b65727b 3902 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3903
3904 return 1;
3905}
3906
62fe78e9
SR		 3907/*
3908 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3909 * funky external mute control using GPIO pins.
3910 */
3911
76e1ddfb 3912static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3913 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3914{
3915 unsigned int gpiostate, gpiomask, gpiodir;
3916
3917 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3918 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3919 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3920
3921 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3922 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3923 gpiomask |= mask;
62fe78e9
SR		 3924
3925 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3926 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3927 gpiodir |= dir_mask;
62fe78e9 3928
76e1ddfb 3929 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3930 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3931
3932 snd_hda_codec_write(codec, codec->afg, 0,
3933 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3934 snd_hda_codec_read(codec, codec->afg, 0,
3935 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3936
3937 msleep(1);
3938
76e1ddfb
TI		 3939 snd_hda_codec_read(codec, codec->afg, 0,
3940 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3941}
3942
8c8145b8 3943#ifdef CONFIG_SND_HDA_INPUT_JACK
95c09099
TI		 3944static void stac92xx_free_jack_priv(struct snd_jack *jack)
3945{
3946 struct sigmatel_jack *jacks = jack->private_data;
3947 jacks->nid = 0;
3948 jacks->jack = NULL;
3949}
3950#endif
3951
74aeaabc
MR		 3952static int stac92xx_add_jack(struct hda_codec *codec,
3953 hda_nid_t nid, int type)
3954{
8c8145b8 3955#ifdef CONFIG_SND_HDA_INPUT_JACK
74aeaabc
MR		 3956 struct sigmatel_spec *spec = codec->spec;
3957 struct sigmatel_jack *jack;
330ee995 3958 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
74aeaabc
MR		 3959 int connectivity = get_defcfg_connect(def_conf);
3960 char name[32];
95c09099 3961 int err;
74aeaabc
MR		 3962
3963 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3964 return 0;
3965
3966 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3967 jack = snd_array_new(&spec->jacks);
3968 if (!jack)
3969 return -ENOMEM;
3970 jack->nid = nid;
3971 jack->type = type;
3972
86de7416 3973 snprintf(name, sizeof(name), "%s at %s %s Jack",
74aeaabc
MR		 3974 snd_hda_get_jack_type(def_conf),
3975 snd_hda_get_jack_connectivity(def_conf),
3976 snd_hda_get_jack_location(def_conf));
3977
95c09099
TI		 3978 err = snd_jack_new(codec->bus->card, name, type, &jack->jack);
3979 if (err < 0) {
3980 jack->nid = 0;
3981 return err;
3982 }
3983 jack->jack->private_data = jack;
3984 jack->jack->private_free = stac92xx_free_jack_priv;
e4973e1e 3985#endif
95c09099 3986 return 0;
74aeaabc
MR		 3987}
3988
c6e4c666
TI		 3989static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3990 unsigned char type, int data)
74aeaabc
MR		 3991{
3992 struct sigmatel_event *event;
3993
3994 snd_array_init(&spec->events, sizeof(*event), 32);
3995 event = snd_array_new(&spec->events);
3996 if (!event)
3997 return -ENOMEM;
3998 event->nid = nid;
c6e4c666
TI		 3999 event->type = type;
4000 event->tag = spec->events.used;
74aeaabc
MR		 4001 event->data = data;
4002
c6e4c666 4003 return event->tag;
74aeaabc
MR		 4004}
4005
c6e4c666 4006static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
62558ce1 4007 hda_nid_t nid)
74aeaabc
MR		 4008{
4009 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4010 struct sigmatel_event *event = spec->events.list;
4011 int i;
4012
4013 for (i = 0; i < spec->events.used; i++, event++) {
62558ce1 4014 if (event->nid == nid)
c6e4c666 4015 return event;
74aeaabc 4016 }
c6e4c666 4017 return NULL;
74aeaabc
MR		 4018}
4019
c6e4c666
TI		 4020static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
4021 unsigned char tag)
314634bc 4022{
c6e4c666
TI		 4023 struct sigmatel_spec *spec = codec->spec;
4024 struct sigmatel_event *event = spec->events.list;
4025 int i;
4026
4027 for (i = 0; i < spec->events.used; i++, event++) {
4028 if (event->tag == tag)
4029 return event;
74aeaabc 4030 }
c6e4c666
TI		 4031 return NULL;
4032}
4033
62558ce1
TI		 4034/* check if given nid is a valid pin and no other events are assigned
4035 * to it. If OK, assign the event, set the unsol flag, and returns 1.
4036 * Otherwise, returns zero.
4037 */
4038static int enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
4039 unsigned int type)
c6e4c666
TI		 4040{
4041 struct sigmatel_event *event;
4042 int tag;
4043
4044 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
62558ce1
TI		 4045 return 0;
4046 event = stac_get_event(codec, nid);
4047 if (event) {
4048 if (event->type != type)
4049 return 0;
c6e4c666 4050 tag = event->tag;
62558ce1 4051 } else {
c6e4c666 4052 tag = stac_add_event(codec->spec, nid, type, 0);
62558ce1
TI		 4053 if (tag < 0)
4054 return 0;
4055 }
c6e4c666
TI		 4056 snd_hda_codec_write_cache(codec, nid, 0,
4057 AC_VERB_SET_UNSOLICITED_ENABLE,
4058 AC_USRSP_EN | tag);
62558ce1 4059 return 1;
314634bc
TI		 4060}
4061
a64135a2
MR		 4062static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
4063{
4064 int i;
4065 for (i = 0; i < cfg->hp_outs; i++)
4066 if (cfg->hp_pins[i] == nid)
4067 return 1; /* nid is a HP-Out */
4068
4069 return 0; /* nid is not a HP-Out */
4070};
4071
b76c850f
MR		 4072static void stac92xx_power_down(struct hda_codec *codec)
4073{
4074 struct sigmatel_spec *spec = codec->spec;
4075
4076 /* power down inactive DACs */
4077 hda_nid_t *dac;
4078 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4079 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4080 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 4081 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4082}
4083
f73d3585
TI		 4084static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4085 int enable);
4086
6565e4fa
TI		 4087/* override some hints from the hwdep entry */
4088static void stac_store_hints(struct hda_codec *codec)
4089{
4090 struct sigmatel_spec *spec = codec->spec;
4091 const char *p;
4092 int val;
4093
4094 val = snd_hda_get_bool_hint(codec, "hp_detect");
4095 if (val >= 0)
4096 spec->hp_detect = val;
4097 p = snd_hda_get_hint(codec, "gpio_mask");
4098 if (p) {
4099 spec->gpio_mask = simple_strtoul(p, NULL, 0);
4100 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
4101 spec->gpio_mask;
4102 }
4103 p = snd_hda_get_hint(codec, "gpio_dir");
4104 if (p)
4105 spec->gpio_dir = simple_strtoul(p, NULL, 0) & spec->gpio_mask;
4106 p = snd_hda_get_hint(codec, "gpio_data");
4107 if (p)
4108 spec->gpio_data = simple_strtoul(p, NULL, 0) & spec->gpio_mask;
4109 p = snd_hda_get_hint(codec, "eapd_mask");
4110 if (p)
4111 spec->eapd_mask = simple_strtoul(p, NULL, 0) & spec->gpio_mask;
4112 val = snd_hda_get_bool_hint(codec, "eapd_switch");
4113 if (val >= 0)
4114 spec->eapd_switch = val;
4115}
4116
c7d4b2fa
M		 4117static int stac92xx_init(struct hda_codec *codec)
4118{
4119 struct sigmatel_spec *spec = codec->spec;
82bc955f 4120 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4121 unsigned int gpio;
e4973e1e 4122 int i;
c7d4b2fa 4123
c7d4b2fa
M		 4124 snd_hda_sequence_write(codec, spec->init);
4125
8daaaa97
MR		 4126 /* power down adcs initially */
4127 if (spec->powerdown_adcs)
4128 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4129 snd_hda_codec_write(codec,
8daaaa97
MR		 4130 spec->adc_nids[i], 0,
4131 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4132
6565e4fa
TI		 4133 /* override some hints */
4134 stac_store_hints(codec);
4135
f73d3585
TI		 4136 /* set up GPIO */
4137 gpio = spec->gpio_data;
4138 /* turn on EAPD statically when spec->eapd_switch isn't set.
4139 * otherwise, unsol event will turn it on/off dynamically
4140 */
4141 if (!spec->eapd_switch)
4142 gpio |= spec->eapd_mask;
4143 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4144
82bc955f
TI		 4145 /* set up pins */
4146 if (spec->hp_detect) {
505cb341 4147 /* Enable unsolicited responses on the HP widget */
74aeaabc 4148 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4149 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4150 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4151 }
1c4bdf9b
TI		 4152 if (cfg->line_out_type == AUTO_PIN_LINE_OUT &&
4153 cfg->speaker_outs > 0) {
fefd67f3 4154 /* enable pin-detect for line-outs as well */
15cfa2b3
TI		 4155 for (i = 0; i < cfg->line_outs; i++) {
4156 hda_nid_t nid = cfg->line_out_pins[i];
fefd67f3
TI		 4157 enable_pin_detect(codec, nid, STAC_LO_EVENT);
4158 }
4159 }
4160
0a07acaf
TI		 4161 /* force to enable the first line-out; the others are set up
4162 * in unsol_event
4163 */
4164 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4165 AC_PINCTL_OUT_EN);
82bc955f 4166 /* fake event to set up pins */
5f380eb1
TI		 4167 if (cfg->hp_pins[0])
4168 stac_issue_unsol_event(codec, cfg->hp_pins[0]);
4169 else if (cfg->line_out_pins[0])
4170 stac_issue_unsol_event(codec, cfg->line_out_pins[0]);
82bc955f
TI		 4171 } else {
4172 stac92xx_auto_init_multi_out(codec);
4173 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 4174 for (i = 0; i < cfg->hp_outs; i++)
4175 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f 4176 }
3d21d3f7 4177 if (spec->auto_mic) {
15b4f296 4178 /* initialize connection to analog input */
da2a2aaa
TI		 4179 if (spec->dmux_nids)
4180 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
15b4f296 4181 AC_VERB_SET_CONNECT_SEL, 0);
3d21d3f7
TI		 4182 if (enable_pin_detect(codec, spec->ext_mic.pin, STAC_MIC_EVENT))
4183 stac_issue_unsol_event(codec, spec->ext_mic.pin);
4184 }
82bc955f 4185 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 4186 hda_nid_t nid = cfg->input_pins[i];
4187 if (nid) {
12dde4c6 4188 unsigned int pinctl, conf;
4f1e6bc3
TI		 4189 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
4190 /* for mic pins, force to initialize */
7c922de7 4191 pinctl = stac92xx_get_default_vref(codec, nid);
12dde4c6
TI		 4192 pinctl |= AC_PINCTL_IN_EN;
4193 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI		 4194 } else {
4195 pinctl = snd_hda_codec_read(codec, nid, 0,
4196 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4197 /* if PINCTL already set then skip */
5dd17cb9
TI		 4198 /* Also, if both INPUT and OUTPUT are set,
4199 * it must be a BIOS bug; need to override, too
4200 */
4201 if (!(pinctl & AC_PINCTL_IN_EN) ||
4202 (pinctl & AC_PINCTL_OUT_EN)) {
4203 pinctl &= ~AC_PINCTL_OUT_EN;
12dde4c6
TI		 4204 pinctl |= AC_PINCTL_IN_EN;
4205 stac92xx_auto_set_pinctl(codec, nid,
4206 pinctl);
4207 }
4208 }
330ee995 4209 conf = snd_hda_codec_get_pincfg(codec, nid);
12dde4c6 4210 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
62558ce1
TI		 4211 if (enable_pin_detect(codec, nid,
4212 STAC_INSERT_EVENT))
4213 stac_issue_unsol_event(codec, nid);
4f1e6bc3 4214 }
c960a03b 4215 }
82bc955f 4216 }
a64135a2
MR		 4217 for (i = 0; i < spec->num_dmics; i++)
4218 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4219 AC_PINCTL_IN_EN);
0852d7a6
TI		 4220 if (cfg->dig_out_pins[0])
4221 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI		 4222 AC_PINCTL_OUT_EN);
4223 if (cfg->dig_in_pin)
4224 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4225 AC_PINCTL_IN_EN);
a64135a2 4226 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4227 hda_nid_t nid = spec->pwr_nids[i];
4228 int pinctl, def_conf;
f73d3585 4229
eb632128
TI		 4230 /* power on when no jack detection is available */
4231 if (!spec->hp_detect) {
4232 stac_toggle_power_map(codec, nid, 1);
4233 continue;
4234 }
4235
4236 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI		 4237 continue; /* already has an unsol event */
4238
4239 pinctl = snd_hda_codec_read(codec, nid, 0,
4240 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4241 /* outputs are only ports capable of power management
4242 * any attempts on powering down a input port cause the
4243 * referenced VREF to act quirky.
4244 */
eb632128
TI		 4245 if (pinctl & AC_PINCTL_IN_EN) {
4246 stac_toggle_power_map(codec, nid, 1);
a64135a2 4247 continue;
eb632128 4248 }
330ee995 4249 def_conf = snd_hda_codec_get_pincfg(codec, nid);
f73d3585 4250 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4251 /* skip any ports that don't have jacks since presence
4252 * detection is useless */
f73d3585
TI		 4253 if (def_conf != AC_JACK_PORT_COMPLEX) {
4254 if (def_conf != AC_JACK_PORT_NONE)
4255 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4256 continue;
f73d3585 4257 }
62558ce1
TI		 4258 if (enable_pin_detect(codec, nid, STAC_PWR_EVENT))
4259 stac_issue_unsol_event(codec, nid);
a64135a2 4260 }
b76c850f
MR		 4261 if (spec->dac_list)
4262 stac92xx_power_down(codec);
c7d4b2fa
M		 4263 return 0;
4264}
4265
74aeaabc
MR		 4266static void stac92xx_free_jacks(struct hda_codec *codec)
4267{
8c8145b8 4268#ifdef CONFIG_SND_HDA_INPUT_JACK
b94d3539 4269 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4270 struct sigmatel_spec *spec = codec->spec;
b94d3539 4271 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 4272 struct sigmatel_jack *jacks = spec->jacks.list;
4273 int i;
95c09099
TI		 4274 for (i = 0; i < spec->jacks.used; i++, jacks++) {
4275 if (jacks->jack)
4276 snd_device_free(codec->bus->card, jacks->jack);
4277 }
74aeaabc
MR		 4278 }
4279 snd_array_free(&spec->jacks);
e4973e1e 4280#endif
74aeaabc
MR		 4281}
4282
603c4019
TI		 4283static void stac92xx_free_kctls(struct hda_codec *codec)
4284{
4285 struct sigmatel_spec *spec = codec->spec;
4286
4287 if (spec->kctls.list) {
4288 struct snd_kcontrol_new *kctl = spec->kctls.list;
4289 int i;
4290 for (i = 0; i < spec->kctls.used; i++)
4291 kfree(kctl[i].name);
4292 }
4293 snd_array_free(&spec->kctls);
4294}
4295
2f2f4251
M		 4296static void stac92xx_free(struct hda_codec *codec)
4297{
c7d4b2fa 4298 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4299
4300 if (! spec)
4301 return;
4302
74aeaabc
MR		 4303 stac92xx_free_jacks(codec);
4304 snd_array_free(&spec->events);
11b44bbd 4305
c7d4b2fa 4306 kfree(spec);
1cd2224c 4307 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4308}
4309
4e55096e
M		 4310static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4311 unsigned int flag)
4312{
8ce84198
TI		 4313 unsigned int old_ctl, pin_ctl;
4314
4315 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4316 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4317
f9acba43
TI		 4318 if (pin_ctl & AC_PINCTL_IN_EN) {
4319 /*
4320 * we need to check the current set-up direction of
4321 * shared input pins since they can be switched via
4322 * "xxx as Output" mixer switch
4323 */
4324 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4325 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4326 return;
4327 }
4328
8ce84198 4329 old_ctl = pin_ctl;
7b043899
SL		 4330 /* if setting pin direction bits, clear the current
4331 direction bits first */
4332 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4333 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4334
8ce84198
TI		 4335 pin_ctl |= flag;
4336 if (old_ctl != pin_ctl)
4337 snd_hda_codec_write_cache(codec, nid, 0,
4338 AC_VERB_SET_PIN_WIDGET_CONTROL,
4339 pin_ctl);
4e55096e
M		 4340}
4341
4342static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4343 unsigned int flag)
4344{
4345 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4346 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI		 4347 if (pin_ctl & flag)
4348 snd_hda_codec_write_cache(codec, nid, 0,
4349 AC_VERB_SET_PIN_WIDGET_CONTROL,
4350 pin_ctl & ~flag);
4e55096e
M		 4351}
4352
e6e3ea25 4353static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4354{
4355 if (!nid)
4356 return 0;
4357 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI		 4358 & (1 << 31))
4359 return 1;
314634bc
TI		 4360 return 0;
4361}
4362
fefd67f3
TI		 4363static void stac92xx_line_out_detect(struct hda_codec *codec,
4364 int presence)
4365{
4366 struct sigmatel_spec *spec = codec->spec;
4367 struct auto_pin_cfg *cfg = &spec->autocfg;
4368 int i;
4369
4370 for (i = 0; i < cfg->line_outs; i++) {
4371 if (presence)
4372 break;
4373 presence = get_pin_presence(codec, cfg->line_out_pins[i]);
4374 if (presence) {
4375 unsigned int pinctl;
4376 pinctl = snd_hda_codec_read(codec,
4377 cfg->line_out_pins[i], 0,
4378 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4379 if (pinctl & AC_PINCTL_IN_EN)
4380 presence = 0; /* mic- or line-input */
4381 }
4382 }
4383
4384 if (presence) {
4385 /* disable speakers */
4386 for (i = 0; i < cfg->speaker_outs; i++)
4387 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4388 AC_PINCTL_OUT_EN);
4389 if (spec->eapd_mask && spec->eapd_switch)
4390 stac_gpio_set(codec, spec->gpio_mask,
4391 spec->gpio_dir, spec->gpio_data &
4392 ~spec->eapd_mask);
4393 } else {
4394 /* enable speakers */
4395 for (i = 0; i < cfg->speaker_outs; i++)
4396 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4397 AC_PINCTL_OUT_EN);
4398 if (spec->eapd_mask && spec->eapd_switch)
4399 stac_gpio_set(codec, spec->gpio_mask,
4400 spec->gpio_dir, spec->gpio_data |
4401 spec->eapd_mask);
4402 }
4403}
4404
d7a89436
TI		 4405/* return non-zero if the hp-pin of the given array index isn't
4406 * a jack-detection target
4407 */
4408static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4409{
4410 struct auto_pin_cfg *cfg = &spec->autocfg;
4411
4412 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4413 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4414 return 1;
c21ca4a8 4415 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4416 return 1;
4417 /* ignore if the pin is set as line-out */
4418 if (cfg->hp_pins[i] == spec->hp_switch)
4419 return 1;
4420 return 0;
4421}
4422
c6e4c666 4423static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4424{
4425 struct sigmatel_spec *spec = codec->spec;
4426 struct auto_pin_cfg *cfg = &spec->autocfg;
4427 int i, presence;
4428
eb06ed8f 4429 presence = 0;
4fe5195c
MR		 4430 if (spec->gpio_mute)
4431 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4432 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4433
eb06ed8f 4434 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4435 if (presence)
4436 break;
d7a89436
TI		 4437 if (no_hp_sensing(spec, i))
4438 continue;
e6e3ea25
TI		 4439 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4440 if (presence) {
4441 unsigned int pinctl;
4442 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4443 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4444 if (pinctl & AC_PINCTL_IN_EN)
4445 presence = 0; /* mic- or line-input */
4446 }
eb06ed8f 4447 }
4e55096e
M		 4448
4449 if (presence) {
d7a89436 4450 /* disable lineouts */
7c2ba97b 4451 if (spec->hp_switch)
d7a89436
TI		 4452 stac92xx_reset_pinctl(codec, spec->hp_switch,
4453 AC_PINCTL_OUT_EN);
4e55096e
M		 4454 for (i = 0; i < cfg->line_outs; i++)
4455 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4456 AC_PINCTL_OUT_EN);
4e55096e 4457 } else {
d7a89436 4458 /* enable lineouts */
7c2ba97b 4459 if (spec->hp_switch)
d7a89436
TI		 4460 stac92xx_set_pinctl(codec, spec->hp_switch,
4461 AC_PINCTL_OUT_EN);
4e55096e
M		 4462 for (i = 0; i < cfg->line_outs; i++)
4463 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4464 AC_PINCTL_OUT_EN);
4e55096e 4465 }
fefd67f3 4466 stac92xx_line_out_detect(codec, presence);
d7a89436
TI		 4467 /* toggle hp outs */
4468 for (i = 0; i < cfg->hp_outs; i++) {
4469 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4470 if (no_hp_sensing(spec, i))
4471 continue;
4472 if (presence)
4473 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4474#if 0 /* FIXME */
4475/* Resetting the pinctl like below may lead to (a sort of) regressions
4476 * on some devices since they use the HP pin actually for line/speaker
4477 * outs although the default pin config shows a different pin (that is
4478 * wrong and useless).
4479 *
4480 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4481 * But, disabling the code below just works around it, and I'm too tired of
4482 * bug reports with such devices...
4483 */
d7a89436
TI		 4484 else
4485 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4486#endif /* FIXME */
d7a89436 4487 }
4e55096e
M		 4488}
4489
f73d3585
TI		 4490static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4491 int enable)
a64135a2
MR		 4492{
4493 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4494 unsigned int idx, val;
4495
4496 for (idx = 0; idx < spec->num_pwrs; idx++) {
4497 if (spec->pwr_nids[idx] == nid)
4498 break;
4499 }
4500 if (idx >= spec->num_pwrs)
4501 return;
d0513fc6
MR		 4502
4503 /* several codecs have two power down bits */
4504 if (spec->pwr_mapping)
4505 idx = spec->pwr_mapping[idx];
4506 else
4507 idx = 1 << idx;
a64135a2 4508
f73d3585
TI		 4509 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4510 if (enable)
a64135a2
MR		 4511 val &= ~idx;
4512 else
4513 val |= idx;
4514
4515 /* power down unused output ports */
4516 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4517}
4518
f73d3585
TI		 4519static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4520{
e6e3ea25 4521 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4522}
a64135a2 4523
74aeaabc
MR		 4524static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4525{
4526 struct sigmatel_spec *spec = codec->spec;
4527 struct sigmatel_jack *jacks = spec->jacks.list;
4528
4529 if (jacks) {
4530 int i;
4531 for (i = 0; i < spec->jacks.used; i++) {
4532 if (jacks->nid == nid) {
4533 unsigned int pin_ctl =
4534 snd_hda_codec_read(codec, nid,
4535 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4536 0x00);
4537 int type = jacks->type;
4538 if (type == (SND_JACK_LINEOUT
4539 | SND_JACK_HEADPHONE))
4540 type = (pin_ctl & AC_PINCTL_HP_EN)
4541 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4542 snd_jack_report(jacks->jack,
e6e3ea25 4543 get_pin_presence(codec, nid)
74aeaabc
MR		 4544 ? type : 0);
4545 }
4546 jacks++;
4547 }
4548 }
4549}
a64135a2 4550
3d21d3f7
TI		 4551static void stac92xx_mic_detect(struct hda_codec *codec)
4552{
4553 struct sigmatel_spec *spec = codec->spec;
4554 struct sigmatel_mic_route *mic;
4555
4556 if (get_pin_presence(codec, spec->ext_mic.pin))
4557 mic = &spec->ext_mic;
4558 else
4559 mic = &spec->int_mic;
4560 if (mic->dmux_idx)
4561 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
4562 AC_VERB_SET_CONNECT_SEL,
4563 mic->dmux_idx);
4564 else
4565 snd_hda_codec_write_cache(codec, spec->mux_nids[0], 0,
4566 AC_VERB_SET_CONNECT_SEL,
4567 mic->mux_idx);
4568}
4569
62558ce1 4570static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid)
c6e4c666 4571{
62558ce1 4572 struct sigmatel_event *event = stac_get_event(codec, nid);
c6e4c666
TI		 4573 if (!event)
4574 return;
4575 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4576}
4577
314634bc
TI		 4578static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4579{
a64135a2 4580 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4581 struct sigmatel_event *event;
4582 int tag, data;
a64135a2 4583
c6e4c666
TI		 4584 tag = (res >> 26) & 0x7f;
4585 event = stac_get_event_from_tag(codec, tag);
4586 if (!event)
4587 return;
4588
4589 switch (event->type) {
314634bc 4590 case STAC_HP_EVENT:
fefd67f3 4591 case STAC_LO_EVENT:
16ffe32c 4592 stac92xx_hp_detect(codec);
fefd67f3 4593 break;
3d21d3f7
TI		 4594 case STAC_MIC_EVENT:
4595 stac92xx_mic_detect(codec);
4596 break;
4597 }
4598
4599 switch (event->type) {
4600 case STAC_HP_EVENT:
fefd67f3 4601 case STAC_LO_EVENT:
3d21d3f7 4602 case STAC_MIC_EVENT:
74aeaabc 4603 case STAC_INSERT_EVENT:
a64135a2 4604 case STAC_PWR_EVENT:
c6e4c666
TI		 4605 if (spec->num_pwrs > 0)
4606 stac92xx_pin_sense(codec, event->nid);
4607 stac92xx_report_jack(codec, event->nid);
fd60cc89
MR		 4608
4609 switch (codec->subsystem_id) {
4610 case 0x103c308f:
4611 if (event->nid == 0xb) {
4612 int pin = AC_PINCTL_IN_EN;
4613
4614 if (get_pin_presence(codec, 0xa)
4615 && get_pin_presence(codec, 0xb))
4616 pin |= AC_PINCTL_VREF_80;
4617 if (!get_pin_presence(codec, 0xb))
4618 pin |= AC_PINCTL_VREF_80;
4619
4620 /* toggle VREF state based on mic + hp pin
4621 * status
4622 */
4623 stac92xx_auto_set_pinctl(codec, 0x0a, pin);
4624 }
4625 }
72474be6 4626 break;
c6e4c666
TI		 4627 case STAC_VREF_EVENT:
4628 data = snd_hda_codec_read(codec, codec->afg, 0,
4629 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4630 /* toggle VREF state based on GPIOx status */
4631 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4632 !!(data & (1 << event->data)));
72474be6 4633 break;
314634bc
TI		 4634 }
4635}
4636
2d34e1b3
TI		 4637#ifdef CONFIG_PROC_FS
4638static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4639 struct hda_codec *codec, hda_nid_t nid)
4640{
4641 if (nid == codec->afg)
4642 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4643 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4644}
4645
4646static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4647 struct hda_codec *codec,
4648 unsigned int verb)
4649{
4650 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4651 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4652}
4653
4654/* stac92hd71bxx, stac92hd73xx */
4655static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4656 struct hda_codec *codec, hda_nid_t nid)
4657{
4658 stac92hd_proc_hook(buffer, codec, nid);
4659 if (nid == codec->afg)
4660 analog_loop_proc_hook(buffer, codec, 0xfa0);
4661}
4662
4663static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4664 struct hda_codec *codec, hda_nid_t nid)
4665{
4666 if (nid == codec->afg)
4667 analog_loop_proc_hook(buffer, codec, 0xfe0);
4668}
4669
4670static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4671 struct hda_codec *codec, hda_nid_t nid)
4672{
4673 if (nid == codec->afg)
4674 analog_loop_proc_hook(buffer, codec, 0xfeb);
4675}
4676#else
4677#define stac92hd_proc_hook NULL
4678#define stac92hd7x_proc_hook NULL
4679#define stac9205_proc_hook NULL
4680#define stac927x_proc_hook NULL
4681#endif
4682
cb53c626 4683#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4684static int stac92xx_resume(struct hda_codec *codec)
4685{
dc81bed1
TI		 4686 struct sigmatel_spec *spec = codec->spec;
4687
2c885878 4688 stac92xx_init(codec);
82beb8fd
TI		 4689 snd_hda_codec_resume_amp(codec);
4690 snd_hda_codec_resume_cache(codec);
2c885878 4691 /* fake event to set up pins again to override cached values */
5f380eb1
TI		 4692 if (spec->hp_detect) {
4693 if (spec->autocfg.hp_pins[0])
4694 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0]);
4695 else if (spec->autocfg.line_out_pins[0])
4696 stac_issue_unsol_event(codec,
4697 spec->autocfg.line_out_pins[0]);
4698 }
ff6fdc37
M		 4699 return 0;
4700}
c6798d2b 4701
ae6241fb 4702/*
514bf54c 4703 * using power check for controlling mute led of HP notebooks
ae6241fb
CP		 4704 * check for mute state only on Speakers (nid = 0x10)
4705 *
4706 * For this feature CONFIG_SND_HDA_POWER_SAVE is needed, otherwise
4707 * the LED is NOT working properly !
514bf54c
JG		 4708 *
4709 * Changed name to reflect that it now works for any designated
4710 * model, not just HP HDX.
ae6241fb
CP		 4711 */
4712
4713#ifdef CONFIG_SND_HDA_POWER_SAVE
514bf54c 4714static int stac92xx_hp_check_power_status(struct hda_codec *codec,
6fce61ae 4715 hda_nid_t nid)
ae6241fb
CP		 4716{
4717 struct sigmatel_spec *spec = codec->spec;
6fce61ae
TI		 4718
4719 if (nid == 0x10) {
4720 if (snd_hda_codec_amp_read(codec, nid, 0, HDA_OUTPUT, 0) &
ae6241fb 4721 HDA_AMP_MUTE)
86d190e7 4722 spec->gpio_data &= ~spec->gpio_led; /* orange */
ba84bfcd
TI		 4723 else
4724 spec->gpio_data |= spec->gpio_led; /* white */
6fce61ae
TI		 4725
4726 stac_gpio_set(codec, spec->gpio_mask,
4727 spec->gpio_dir,
ae6241fb
CP		 4728 spec->gpio_data);
4729 }
4730
4731 return 0;
4732}
4733#endif
4734
c6798d2b
MR		 4735static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4736{
4737 struct sigmatel_spec *spec = codec->spec;
05ff7e11
TI		 4738 int i;
4739 hda_nid_t nid;
4740
4741 /* reset each pin before powering down DAC/ADC to avoid click noise */
4742 nid = codec->start_nid;
4743 for (i = 0; i < codec->num_nodes; i++, nid++) {
4744 unsigned int wcaps = get_wcaps(codec, nid);
a22d543a 4745 unsigned int wid_type = get_wcaps_type(wcaps);
05ff7e11
TI		 4746 if (wid_type == AC_WID_PIN)
4747 snd_hda_codec_read(codec, nid, 0,
4748 AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
4749 }
4750
c6798d2b
MR		 4751 if (spec->eapd_mask)
4752 stac_gpio_set(codec, spec->gpio_mask,
4753 spec->gpio_dir, spec->gpio_data &
4754 ~spec->eapd_mask);
4755 return 0;
4756}
ff6fdc37
M		 4757#endif
4758
2f2f4251
M		 4759static struct hda_codec_ops stac92xx_patch_ops = {
4760 .build_controls = stac92xx_build_controls,
4761 .build_pcms = stac92xx_build_pcms,
4762 .init = stac92xx_init,
4763 .free = stac92xx_free,
4e55096e 4764 .unsol_event = stac92xx_unsol_event,
cb53c626 4765#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4766 .suspend = stac92xx_suspend,
ff6fdc37
M		 4767 .resume = stac92xx_resume,
4768#endif
2f2f4251
M		 4769};
4770
4771static int patch_stac9200(struct hda_codec *codec)
4772{
4773 struct sigmatel_spec *spec;
c7d4b2fa 4774 int err;
2f2f4251 4775
e560d8d8 4776 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4777 if (spec == NULL)
4778 return -ENOMEM;
4779
4780 codec->spec = spec;
a4eed138 4781 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4782 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4783 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4784 stac9200_models,
4785 stac9200_cfg_tbl);
330ee995 4786 if (spec->board_config < 0)
9a11f1aa
TI		 4787 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
4788 codec->chip_name);
330ee995
TI		 4789 else
4790 stac92xx_set_config_regs(codec,
af9f341a 4791 stac9200_brd_tbl[spec->board_config]);
2f2f4251
M		 4792
4793 spec->multiout.max_channels = 2;
4794 spec->multiout.num_dacs = 1;
4795 spec->multiout.dac_nids = stac9200_dac_nids;
4796 spec->adc_nids = stac9200_adc_nids;
4797 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4798 spec->num_muxes = 1;
8b65727b 4799 spec->num_dmics = 0;
9e05b7a3 4800 spec->num_adcs = 1;
a64135a2 4801 spec->num_pwrs = 0;
c7d4b2fa 4802
58eec423
MCC		 4803 if (spec->board_config == STAC_9200_M4 ||
4804 spec->board_config == STAC_9200_M4_2 ||
bf277785 4805 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4806 spec->init = stac9200_eapd_init;
4807 else
4808 spec->init = stac9200_core_init;
2f2f4251 4809 spec->mixer = stac9200_mixer;
c7d4b2fa 4810
117f257d
TI		 4811 if (spec->board_config == STAC_9200_PANASONIC) {
4812 spec->gpio_mask = spec->gpio_dir = 0x09;
4813 spec->gpio_data = 0x00;
4814 }
4815
c7d4b2fa
M		 4816 err = stac9200_parse_auto_config(codec);
4817 if (err < 0) {
4818 stac92xx_free(codec);
4819 return err;
4820 }
2f2f4251 4821
2acc9dcb
TI		 4822 /* CF-74 has no headphone detection, and the driver should *NOT*
4823 * do detection and HP/speaker toggle because the hardware does it.
4824 */
4825 if (spec->board_config == STAC_9200_PANASONIC)
4826 spec->hp_detect = 0;
4827
2f2f4251
M		 4828 codec->patch_ops = stac92xx_patch_ops;
4829
4830 return 0;
4831}
4832
8e21c34c
TD		 4833static int patch_stac925x(struct hda_codec *codec)
4834{
4835 struct sigmatel_spec *spec;
4836 int err;
4837
4838 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4839 if (spec == NULL)
4840 return -ENOMEM;
4841
4842 codec->spec = spec;
a4eed138 4843 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4844 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 4845
4846 /* Check first for codec ID */
4847 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4848 STAC_925x_MODELS,
4849 stac925x_models,
4850 stac925x_codec_id_cfg_tbl);
4851
4852 /* Now checks for PCI ID, if codec ID is not found */
4853 if (spec->board_config < 0)
4854 spec->board_config = snd_hda_check_board_config(codec,
4855 STAC_925x_MODELS,
8e21c34c
TD		 4856 stac925x_models,
4857 stac925x_cfg_tbl);
9e507abd 4858 again:
330ee995 4859 if (spec->board_config < 0)
9a11f1aa
TI		 4860 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
4861 codec->chip_name);
330ee995
TI		 4862 else
4863 stac92xx_set_config_regs(codec,
af9f341a 4864 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD		 4865
4866 spec->multiout.max_channels = 2;
4867 spec->multiout.num_dacs = 1;
4868 spec->multiout.dac_nids = stac925x_dac_nids;
4869 spec->adc_nids = stac925x_adc_nids;
4870 spec->mux_nids = stac925x_mux_nids;
4871 spec->num_muxes = 1;
9e05b7a3 4872 spec->num_adcs = 1;
a64135a2 4873 spec->num_pwrs = 0;
2c11f955
TD		 4874 switch (codec->vendor_id) {
4875 case 0x83847632: /* STAC9202 */
4876 case 0x83847633: /* STAC9202D */
4877 case 0x83847636: /* STAC9251 */
4878 case 0x83847637: /* STAC9251D */
f6e9852a 4879 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4880 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4881 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4882 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4883 break;
4884 default:
4885 spec->num_dmics = 0;
4886 break;
4887 }
8e21c34c
TD		 4888
4889 spec->init = stac925x_core_init;
4890 spec->mixer = stac925x_mixer;
6479c631
TI		 4891 spec->num_caps = 1;
4892 spec->capvols = stac925x_capvols;
4893 spec->capsws = stac925x_capsws;
8e21c34c
TD		 4894
4895 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4896 if (!err) {
4897 if (spec->board_config < 0) {
4898 printk(KERN_WARNING "hda_codec: No auto-config is "
4899 "available, default to model=ref\n");
4900 spec->board_config = STAC_925x_REF;
4901 goto again;
4902 }
4903 err = -EINVAL;
4904 }
8e21c34c
TD		 4905 if (err < 0) {
4906 stac92xx_free(codec);
4907 return err;
4908 }
4909
4910 codec->patch_ops = stac92xx_patch_ops;
4911
4912 return 0;
4913}
4914
e1f0d669
MR		 4915static int patch_stac92hd73xx(struct hda_codec *codec)
4916{
4917 struct sigmatel_spec *spec;
4918 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4919 int err = 0;
c21ca4a8 4920 int num_dacs;
e1f0d669
MR		 4921
4922 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4923 if (spec == NULL)
4924 return -ENOMEM;
4925
4926 codec->spec = spec;
e99d32b3 4927 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4928 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4929 spec->pin_nids = stac92hd73xx_pin_nids;
4930 spec->board_config = snd_hda_check_board_config(codec,
4931 STAC_92HD73XX_MODELS,
4932 stac92hd73xx_models,
4933 stac92hd73xx_cfg_tbl);
842ae638
TI		 4934 /* check codec subsystem id if not found */
4935 if (spec->board_config < 0)
4936 spec->board_config =
4937 snd_hda_check_board_codec_sid_config(codec,
4938 STAC_92HD73XX_MODELS, stac92hd73xx_models,
4939 stac92hd73xx_codec_id_cfg_tbl);
e1f0d669 4940again:
330ee995 4941 if (spec->board_config < 0)
9a11f1aa
TI		 4942 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
4943 codec->chip_name);
330ee995
TI		 4944 else
4945 stac92xx_set_config_regs(codec,
af9f341a 4946 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 4947
c21ca4a8 4948 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 4949 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4950
c21ca4a8 4951 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 4952 printk(KERN_WARNING "hda_codec: Could not determine "
4953 "number of channels defaulting to DAC count\n");
c21ca4a8 4954 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4955 }
e2aec171 4956 spec->init = stac92hd73xx_core_init;
c21ca4a8 4957 switch (num_dacs) {
e1f0d669 4958 case 0x3: /* 6 Channel */
d78d7a90 4959 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR		 4960 break;
4961 case 0x4: /* 8 Channel */
d78d7a90 4962 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR		 4963 break;
4964 case 0x5: /* 10 Channel */
d78d7a90
TI		 4965 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
4966 break;
c21ca4a8
TI		 4967 }
4968 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4969
e1f0d669
MR		 4970 spec->aloopback_mask = 0x01;
4971 spec->aloopback_shift = 8;
4972
1cd2224c 4973 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4974 spec->mux_nids = stac92hd73xx_mux_nids;
4975 spec->adc_nids = stac92hd73xx_adc_nids;
4976 spec->dmic_nids = stac92hd73xx_dmic_nids;
4977 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4978 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR		 4979
4980 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4981 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4982 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816 4983
6479c631
TI		 4984 spec->num_caps = STAC92HD73XX_NUM_CAPS;
4985 spec->capvols = stac92hd73xx_capvols;
4986 spec->capsws = stac92hd73xx_capsws;
4987
a7662640 4988 switch (spec->board_config) {
6b3ab21e 4989 case STAC_DELL_EQ:
d654a660 4990 spec->init = dell_eq_core_init;
6b3ab21e 4991 /* fallthru */
661cd8fb
TI		 4992 case STAC_DELL_M6_AMIC:
4993 case STAC_DELL_M6_DMIC:
4994 case STAC_DELL_M6_BOTH:
2a9c7816 4995 spec->num_smuxes = 0;
c0cea0d0 4996 spec->eapd_switch = 0;
6b3ab21e 4997
661cd8fb
TI		 4998 switch (spec->board_config) {
4999 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 5000 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640
MR		 5001 spec->num_dmics = 0;
5002 break;
661cd8fb 5003 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 5004 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5005 spec->num_dmics = 1;
5006 break;
661cd8fb 5007 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI		 5008 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
5009 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5010 spec->num_dmics = 1;
5011 break;
5012 }
5013 break;
842ae638
TI		 5014 case STAC_ALIENWARE_M17X:
5015 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
5016 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
5017 spec->eapd_switch = 0;
5018 break;
a7662640
MR		 5019 default:
5020 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 5021 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 5022 spec->eapd_switch = 1;
5207e10e 5023 break;
a7662640 5024 }
af6ee302 5025 if (spec->board_config != STAC_92HD73XX_REF) {
b2c4f4d7
MR		 5026 /* GPIO0 High = Enable EAPD */
5027 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
5028 spec->gpio_data = 0x01;
5029 }
a7662640 5030
a64135a2
MR		 5031 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
5032 spec->pwr_nids = stac92hd73xx_pwr_nids;
5033
d9737751 5034 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 5035
5036 if (!err) {
5037 if (spec->board_config < 0) {
5038 printk(KERN_WARNING "hda_codec: No auto-config is "
5039 "available, default to model=ref\n");
5040 spec->board_config = STAC_92HD73XX_REF;
5041 goto again;
5042 }
5043 err = -EINVAL;
5044 }
5045
5046 if (err < 0) {
5047 stac92xx_free(codec);
5048 return err;
5049 }
5050
9e43f0de
TI		 5051 if (spec->board_config == STAC_92HD73XX_NO_JD)
5052 spec->hp_detect = 0;
5053
e1f0d669
MR		 5054 codec->patch_ops = stac92xx_patch_ops;
5055
2d34e1b3
TI		 5056 codec->proc_widget_hook = stac92hd7x_proc_hook;
5057
e1f0d669
MR		 5058 return 0;
5059}
5060
d0513fc6
MR		 5061static int patch_stac92hd83xxx(struct hda_codec *codec)
5062{
5063 struct sigmatel_spec *spec;
65557f35 5064 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 5065 int err;
65557f35 5066 int num_dacs;
8bb0ac55 5067 hda_nid_t nid;
d0513fc6
MR		 5068
5069 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5070 if (spec == NULL)
5071 return -ENOMEM;
5072
5073 codec->spec = spec;
0ffa9807 5074 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6 5075 spec->digbeep_nid = 0x21;
667067d8
TI		 5076 spec->mux_nids = stac92hd83xxx_mux_nids;
5077 spec->num_muxes = ARRAY_SIZE(stac92hd83xxx_mux_nids);
d0513fc6 5078 spec->adc_nids = stac92hd83xxx_adc_nids;
7570ef18 5079 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
d0513fc6
MR		 5080 spec->pwr_nids = stac92hd83xxx_pwr_nids;
5081 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
5082 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 5083 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6
MR		 5084
5085 spec->init = stac92hd83xxx_core_init;
d0513fc6 5086 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
d0513fc6 5087 spec->pin_nids = stac92hd83xxx_pin_nids;
6479c631
TI		 5088 spec->num_caps = STAC92HD83XXX_NUM_CAPS;
5089 spec->capvols = stac92hd83xxx_capvols;
5090 spec->capsws = stac92hd83xxx_capsws;
5091
d0513fc6
MR		 5092 spec->board_config = snd_hda_check_board_config(codec,
5093 STAC_92HD83XXX_MODELS,
5094 stac92hd83xxx_models,
5095 stac92hd83xxx_cfg_tbl);
5096again:
330ee995 5097 if (spec->board_config < 0)
9a11f1aa
TI		 5098 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5099 codec->chip_name);
330ee995
TI		 5100 else
5101 stac92xx_set_config_regs(codec,
af9f341a 5102 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 5103
32ed3f46
MR		 5104 switch (codec->vendor_id) {
5105 case 0x111d7604:
5106 case 0x111d7605:
ff2e7337 5107 case 0x111d76d5:
32ed3f46
MR		 5108 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
5109 break;
5110 spec->num_pwrs = 0;
5111 break;
5112 }
5113
d0513fc6
MR		 5114 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
5115 if (!err) {
5116 if (spec->board_config < 0) {
5117 printk(KERN_WARNING "hda_codec: No auto-config is "
5118 "available, default to model=ref\n");
5119 spec->board_config = STAC_92HD83XXX_REF;
5120 goto again;
5121 }
5122 err = -EINVAL;
5123 }
5124
5125 if (err < 0) {
5126 stac92xx_free(codec);
5127 return err;
5128 }
5129
8bb0ac55
MR		 5130 switch (spec->board_config) {
5131 case STAC_DELL_S14:
5132 nid = 0xf;
5133 break;
5134 default:
5135 nid = 0xe;
5136 break;
5137 }
5138
5139 num_dacs = snd_hda_get_connections(codec, nid,
5140 conn, STAC92HD83_DAC_COUNT + 1) - 1;
16a433d8
JK		 5141 if (num_dacs < 0)
5142 num_dacs = STAC92HD83_DAC_COUNT;
8bb0ac55
MR		 5143
5144 /* set port X to select the last DAC
5145 */
5146 snd_hda_codec_write_cache(codec, nid, 0,
5147 AC_VERB_SET_CONNECT_SEL, num_dacs);
5148
d0513fc6
MR		 5149 codec->patch_ops = stac92xx_patch_ops;
5150
2d34e1b3
TI		 5151 codec->proc_widget_hook = stac92hd_proc_hook;
5152
d0513fc6
MR		 5153 return 0;
5154}
5155
330ee995
TI		 5156/* get the pin connection (fixed, none, etc) */
5157static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
5158{
5159 struct sigmatel_spec *spec = codec->spec;
5160 unsigned int cfg;
5161
5162 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
5163 return get_defcfg_connect(cfg);
5164}
5165
6df703ae
HRK		 5166static int stac92hd71bxx_connected_ports(struct hda_codec *codec,
5167 hda_nid_t *nids, int num_nids)
5168{
5169 struct sigmatel_spec *spec = codec->spec;
5170 int idx, num;
5171 unsigned int def_conf;
5172
5173 for (num = 0; num < num_nids; num++) {
5174 for (idx = 0; idx < spec->num_pins; idx++)
5175 if (spec->pin_nids[idx] == nids[num])
5176 break;
5177 if (idx >= spec->num_pins)
5178 break;
330ee995 5179 def_conf = stac_get_defcfg_connect(codec, idx);
6df703ae
HRK		 5180 if (def_conf == AC_JACK_PORT_NONE)
5181 break;
5182 }
5183 return num;
5184}
5185
5186static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
5187 hda_nid_t dig0pin)
5188{
5189 struct sigmatel_spec *spec = codec->spec;
5190 int idx;
5191
5192 for (idx = 0; idx < spec->num_pins; idx++)
5193 if (spec->pin_nids[idx] == dig0pin)
5194 break;
5195 if ((idx + 2) >= spec->num_pins)
5196 return 0;
5197
5198 /* dig1pin case */
330ee995 5199 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5200 return 2;
5201
5202 /* dig0pin + dig2pin case */
330ee995 5203 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 5204 return 2;
330ee995 5205 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5206 return 1;
5207 else
5208 return 0;
5209}
5210
e035b841
MR		 5211static int patch_stac92hd71bxx(struct hda_codec *codec)
5212{
5213 struct sigmatel_spec *spec;
ca8d33fc 5214 struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
e035b841
MR		 5215 int err = 0;
5216
5217 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5218 if (spec == NULL)
5219 return -ENOMEM;
5220
5221 codec->spec = spec;
8daaaa97 5222 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK		 5223 spec->num_pins = STAC92HD71BXX_NUM_PINS;
5224 switch (codec->vendor_id) {
5225 case 0x111d76b6:
5226 case 0x111d76b7:
5227 spec->pin_nids = stac92hd71bxx_pin_nids_4port;
5228 break;
5229 case 0x111d7603:
5230 case 0x111d7608:
5231 /* On 92HD75Bx 0x27 isn't a pin nid */
5232 spec->num_pins--;
5233 /* fallthrough */
5234 default:
5235 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5236 }
aafc4412 5237 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 5238 spec->board_config = snd_hda_check_board_config(codec,
5239 STAC_92HD71BXX_MODELS,
5240 stac92hd71bxx_models,
5241 stac92hd71bxx_cfg_tbl);
5242again:
330ee995 5243 if (spec->board_config < 0)
9a11f1aa
TI		 5244 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5245 codec->chip_name);
330ee995
TI		 5246 else
5247 stac92xx_set_config_regs(codec,
af9f341a 5248 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5249
fc64b26c 5250 if (spec->board_config != STAC_92HD71BXX_REF) {
41c3b648
TI		 5251 /* GPIO0 = EAPD */
5252 spec->gpio_mask = 0x01;
5253 spec->gpio_dir = 0x01;
5254 spec->gpio_data = 0x01;
5255 }
5256
6df703ae
HRK		 5257 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5258 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5259
6479c631
TI		 5260 spec->num_caps = STAC92HD71BXX_NUM_CAPS;
5261 spec->capvols = stac92hd71bxx_capvols;
5262 spec->capsws = stac92hd71bxx_capsws;
5263
541eee87
MR		 5264 switch (codec->vendor_id) {
5265 case 0x111d76b6: /* 4 Port without Analog Mixer */
5266 case 0x111d76b7:
23c7b521
HRK		 5267 unmute_init++;
5268 /* fallthru */
541eee87
MR		 5269 case 0x111d76b4: /* 6 Port without Analog Mixer */
5270 case 0x111d76b5:
541eee87 5271 spec->init = stac92hd71bxx_core_init;
0ffa9807 5272 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
6df703ae
HRK		 5273 spec->num_dmics = stac92hd71bxx_connected_ports(codec,
5274 stac92hd71bxx_dmic_nids,
5275 STAC92HD71BXX_NUM_DMICS);
541eee87 5276 break;
aafc4412 5277 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 5278 switch (spec->board_config) {
5279 case STAC_HP_M4:
72474be6 5280 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 5281 err = stac_add_event(spec, codec->afg,
5282 STAC_VREF_EVENT, 0x02);
5283 if (err < 0)
5284 return err;
c5d08bb5 5285 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 5286 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
5287 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 5288 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 5289 AC_USRSP_EN | err);
72474be6
MR		 5290 spec->gpio_mask |= 0x02;
5291 break;
5292 }
8daaaa97 5293 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5294 (codec->revision_id & 0xf) == 1)
8daaaa97 5295 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5296
aafc4412
MR		 5297 /* no output amps */
5298 spec->num_pwrs = 0;
aafc4412 5299 /* disable VSW */
26a27980 5300 spec->init = stac92hd71bxx_core_init;
ca8d33fc 5301 unmute_init++;
330ee995
TI		 5302 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
5303 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
6df703ae
HRK		 5304 stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS - 1] = 0;
5305 spec->num_dmics = stac92hd71bxx_connected_ports(codec,
5306 stac92hd71bxx_dmic_nids,
5307 STAC92HD71BXX_NUM_DMICS - 1);
aafc4412
MR		 5308 break;
5309 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5310 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5311 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5312
aafc4412
MR		 5313 /* no output amps */
5314 spec->num_pwrs = 0;
5315 /* fallthru */
541eee87 5316 default:
26a27980 5317 spec->init = stac92hd71bxx_core_init;
0ffa9807 5318 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
6df703ae
HRK		 5319 spec->num_dmics = stac92hd71bxx_connected_ports(codec,
5320 stac92hd71bxx_dmic_nids,
5321 STAC92HD71BXX_NUM_DMICS);
5207e10e 5322 break;
541eee87
MR		 5323 }
5324
ca8d33fc
MR		 5325 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5326 snd_hda_sequence_write_cache(codec, unmute_init);
5327
b20f3b83
TI		 5328 /* Some HP machines seem to have unstable codec communications
5329 * especially with ATI fglrx driver. For recovering from the
5330 * CORB/RIRB stall, allow the BUS reset and keep always sync
5331 */
5332 if (spec->board_config == STAC_HP_DV5) {
5333 codec->bus->sync_write = 1;
5334 codec->bus->allow_bus_reset = 1;
5335 }
5336
d78d7a90 5337 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 5338 spec->aloopback_mask = 0x50;
541eee87
MR		 5339 spec->aloopback_shift = 0;
5340
8daaaa97 5341 spec->powerdown_adcs = 1;
1cd2224c 5342 spec->digbeep_nid = 0x26;
e035b841
MR		 5343 spec->mux_nids = stac92hd71bxx_mux_nids;
5344 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5345 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5346 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 5347
5348 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5349 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
5207e10e 5350 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
6df703ae 5351 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5352
6a14f585
MR		 5353 switch (spec->board_config) {
5354 case STAC_HP_M4:
6a14f585 5355 /* enable internal microphone */
330ee995 5356 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR		 5357 stac92xx_auto_set_pinctl(codec, 0x0e,
5358 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 5359 /* fallthru */
5360 case STAC_DELL_M4_2:
5361 spec->num_dmics = 0;
5362 spec->num_smuxes = 0;
5363 spec->num_dmuxes = 0;
5364 break;
5365 case STAC_DELL_M4_1:
5366 case STAC_DELL_M4_3:
5367 spec->num_dmics = 1;
5368 spec->num_smuxes = 0;
ea18aa46 5369 spec->num_dmuxes = 1;
6a14f585 5370 break;
514bf54c
JG		 5371 case STAC_HP_DV4_1222NR:
5372 spec->num_dmics = 1;
5373 /* I don't know if it needs 1 or 2 smuxes - will wait for
5374 * bug reports to fix if needed
5375 */
5376 spec->num_smuxes = 1;
5377 spec->num_dmuxes = 1;
86d190e7 5378 spec->gpio_led = 0x01;
514bf54c 5379 /* fallthrough */
e2ea57a8 5380 case STAC_HP_DV5:
330ee995 5381 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8 5382 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
6e34c033
TI		 5383 /* HP dv6 gives the headphone pin as a line-out. Thus we
5384 * need to set hp_detect flag here to force to enable HP
5385 * detection.
5386 */
5387 spec->hp_detect = 1;
e2ea57a8 5388 break;
ae6241fb
CP		 5389 case STAC_HP_HDX:
5390 spec->num_dmics = 1;
5391 spec->num_dmuxes = 1;
5392 spec->num_smuxes = 1;
443e26d0 5393 /* orange/white mute led on GPIO3, orange=0, white=1 */
86d190e7
TI		 5394 spec->gpio_led = 0x08;
5395 break;
5396 }
443e26d0 5397
86d190e7
TI		 5398#ifdef CONFIG_SND_HDA_POWER_SAVE
5399 if (spec->gpio_led) {
5400 spec->gpio_mask |= spec->gpio_led;
5401 spec->gpio_dir |= spec->gpio_led;
5402 spec->gpio_data |= spec->gpio_led;
443e26d0 5403 /* register check_power_status callback. */
6fce61ae 5404 codec->patch_ops.check_power_status =
86d190e7
TI		 5405 stac92xx_hp_check_power_status;
5406 }
443e26d0 5407#endif
6a14f585 5408
c21ca4a8 5409 spec->multiout.dac_nids = spec->dac_nids;
e035b841 5410
29d4ab4d 5411 err = stac92xx_parse_auto_config(codec, 0x21, 0);
e035b841
MR		 5412 if (!err) {
5413 if (spec->board_config < 0) {
5414 printk(KERN_WARNING "hda_codec: No auto-config is "
5415 "available, default to model=ref\n");
5416 spec->board_config = STAC_92HD71BXX_REF;
5417 goto again;
5418 }
5419 err = -EINVAL;
5420 }
5421
5422 if (err < 0) {
5423 stac92xx_free(codec);
5424 return err;
5425 }
5426
2d34e1b3
TI		 5427 codec->proc_widget_hook = stac92hd7x_proc_hook;
5428
e035b841 5429 return 0;
86d190e7 5430}
e035b841 5431
2f2f4251
M		 5432static int patch_stac922x(struct hda_codec *codec)
5433{
5434 struct sigmatel_spec *spec;
c7d4b2fa 5435 int err;
2f2f4251 5436
e560d8d8 5437 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5438 if (spec == NULL)
5439 return -ENOMEM;
5440
5441 codec->spec = spec;
a4eed138 5442 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5443 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 5444 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5445 stac922x_models,
5446 stac922x_cfg_tbl);
536319af 5447 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 5448 spec->gpio_mask = spec->gpio_dir = 0x03;
5449 spec->gpio_data = 0x03;
3fc24d85
TI		 5450 /* Intel Macs have all same PCI SSID, so we need to check
5451 * codec SSID to distinguish the exact models
5452 */
6f0778d8 5453 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5454 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 5455
5456 case 0x106b0800:
5457 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5458 break;
5d5d3bc3
IZ		 5459 case 0x106b0600:
5460 case 0x106b0700:
5461 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5462 break;
5d5d3bc3
IZ		 5463 case 0x106b0e00:
5464 case 0x106b0f00:
5465 case 0x106b1600:
5466 case 0x106b1700:
5467 case 0x106b0200:
5468 case 0x106b1e00:
5469 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5470 break;
5d5d3bc3
IZ		 5471 case 0x106b1a00:
5472 case 0x00000100:
5473 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5474 break;
5d5d3bc3
IZ		 5475 case 0x106b0a00:
5476 case 0x106b2200:
5477 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5478 break;
536319af
NB		 5479 default:
5480 spec->board_config = STAC_INTEL_MAC_V3;
5481 break;
3fc24d85
TI		 5482 }
5483 }
5484
9e507abd 5485 again:
330ee995 5486 if (spec->board_config < 0)
9a11f1aa
TI		 5487 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5488 codec->chip_name);
330ee995
TI		 5489 else
5490 stac92xx_set_config_regs(codec,
af9f341a 5491 stac922x_brd_tbl[spec->board_config]);
2f2f4251 5492
c7d4b2fa
M		 5493 spec->adc_nids = stac922x_adc_nids;
5494 spec->mux_nids = stac922x_mux_nids;
2549413e 5495 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5496 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5497 spec->num_dmics = 0;
a64135a2 5498 spec->num_pwrs = 0;
c7d4b2fa
M		 5499
5500 spec->init = stac922x_core_init;
6479c631
TI		 5501
5502 spec->num_caps = STAC922X_NUM_CAPS;
5503 spec->capvols = stac922x_capvols;
5504 spec->capsws = stac922x_capsws;
c7d4b2fa
M		 5505
5506 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5507
3cc08dc6 5508 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 5509 if (!err) {
5510 if (spec->board_config < 0) {
5511 printk(KERN_WARNING "hda_codec: No auto-config is "
5512 "available, default to model=ref\n");
5513 spec->board_config = STAC_D945_REF;
5514 goto again;
5515 }
5516 err = -EINVAL;
5517 }
3cc08dc6
MP		 5518 if (err < 0) {
5519 stac92xx_free(codec);
5520 return err;
5521 }
5522
5523 codec->patch_ops = stac92xx_patch_ops;
5524
807a4636
TI		 5525 /* Fix Mux capture level; max to 2 */
5526 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5527 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5528 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5529 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5530 (0 << AC_AMPCAP_MUTE_SHIFT));
5531
3cc08dc6
MP		 5532 return 0;
5533}
5534
5535static int patch_stac927x(struct hda_codec *codec)
5536{
5537 struct sigmatel_spec *spec;
5538 int err;
5539
5540 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5541 if (spec == NULL)
5542 return -ENOMEM;
5543
5544 codec->spec = spec;
45c1d85b 5545 codec->slave_dig_outs = stac927x_slave_dig_outs;
a4eed138 5546 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5547 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 5548 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5549 stac927x_models,
5550 stac927x_cfg_tbl);
9e507abd 5551 again:
330ee995 5552 if (spec->board_config < 0)
9a11f1aa
TI		 5553 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5554 codec->chip_name);
330ee995
TI		 5555 else
5556 stac92xx_set_config_regs(codec,
af9f341a 5557 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 5558
1cd2224c 5559 spec->digbeep_nid = 0x23;
8e9068b1
MR		 5560 spec->adc_nids = stac927x_adc_nids;
5561 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5562 spec->mux_nids = stac927x_mux_nids;
5563 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 5564 spec->smux_nids = stac927x_smux_nids;
5565 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5566 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5567 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 5568 spec->multiout.dac_nids = spec->dac_nids;
5569
af6ee302
TI		 5570 if (spec->board_config != STAC_D965_REF) {
5571 /* GPIO0 High = Enable EAPD */
5572 spec->eapd_mask = spec->gpio_mask = 0x01;
5573 spec->gpio_dir = spec->gpio_data = 0x01;
5574 }
5575
81d3dbde 5576 switch (spec->board_config) {
93ed1503 5577 case STAC_D965_3ST:
93ed1503 5578 case STAC_D965_5ST:
8e9068b1 5579 /* GPIO0 High = Enable EAPD */
8e9068b1 5580 spec->num_dmics = 0;
93ed1503 5581 spec->init = d965_core_init;
81d3dbde 5582 break;
8e9068b1 5583 case STAC_DELL_BIOS:
780c8be4
MR		 5584 switch (codec->subsystem_id) {
5585 case 0x10280209:
5586 case 0x1028022e:
5587 /* correct the device field to SPDIF out */
330ee995 5588 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4 5589 break;
86d190e7 5590 }
03d7ca17 5591 /* configure the analog microphone on some laptops */
330ee995 5592 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 5593 /* correct the front output jack as a hp out */
330ee995 5594 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 5595 /* correct the front input jack as a mic */
330ee995 5596 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 5597 /* fallthru */
8e9068b1 5598 case STAC_DELL_3ST:
af6ee302
TI		 5599 if (codec->subsystem_id != 0x1028022f) {
5600 /* GPIO2 High = Enable EAPD */
5601 spec->eapd_mask = spec->gpio_mask = 0x04;
5602 spec->gpio_dir = spec->gpio_data = 0x04;
5603 }
7f16859a
MR		 5604 spec->dmic_nids = stac927x_dmic_nids;
5605 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5606
8e9068b1 5607 spec->init = d965_core_init;
8e9068b1 5608 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5609 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 5610 break;
5611 default:
8e9068b1 5612 spec->num_dmics = 0;
8e9068b1 5613 spec->init = stac927x_core_init;
af6ee302 5614 break;
7f16859a
MR		 5615 }
5616
6479c631
TI		 5617 spec->num_caps = STAC927X_NUM_CAPS;
5618 spec->capvols = stac927x_capvols;
5619 spec->capsws = stac927x_capsws;
5620
a64135a2 5621 spec->num_pwrs = 0;
d78d7a90 5622 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR		 5623 spec->aloopback_mask = 0x40;
5624 spec->aloopback_shift = 0;
c0cea0d0 5625 spec->eapd_switch = 1;
8e9068b1 5626
3cc08dc6 5627 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5628 if (!err) {
5629 if (spec->board_config < 0) {
5630 printk(KERN_WARNING "hda_codec: No auto-config is "
5631 "available, default to model=ref\n");
5632 spec->board_config = STAC_D965_REF;
5633 goto again;
5634 }
5635 err = -EINVAL;
5636 }
c7d4b2fa
M		 5637 if (err < 0) {
5638 stac92xx_free(codec);
5639 return err;
5640 }
2f2f4251
M		 5641
5642 codec->patch_ops = stac92xx_patch_ops;
5643
2d34e1b3
TI		 5644 codec->proc_widget_hook = stac927x_proc_hook;
5645
52987656
TI		 5646 /*
5647 * !!FIXME!!
5648 * The STAC927x seem to require fairly long delays for certain
5649 * command sequences. With too short delays (even if the answer
5650 * is set to RIRB properly), it results in the silence output
5651 * on some hardwares like Dell.
5652 *
5653 * The below flag enables the longer delay (see get_response
5654 * in hda_intel.c).
5655 */
5656 codec->bus->needs_damn_long_delay = 1;
5657
e28d8322
TI		 5658 /* no jack detecion for ref-no-jd model */
5659 if (spec->board_config == STAC_D965_REF_NO_JD)
5660 spec->hp_detect = 0;
5661
2f2f4251
M		 5662 return 0;
5663}
5664
f3302a59
MP		 5665static int patch_stac9205(struct hda_codec *codec)
5666{
5667 struct sigmatel_spec *spec;
8259980e 5668 int err;
f3302a59
MP		 5669
5670 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5671 if (spec == NULL)
5672 return -ENOMEM;
5673
5674 codec->spec = spec;
a4eed138 5675 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5676 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 5677 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5678 stac9205_models,
5679 stac9205_cfg_tbl);
9e507abd 5680 again:
330ee995 5681 if (spec->board_config < 0)
9a11f1aa
TI		 5682 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5683 codec->chip_name);
330ee995
TI		 5684 else
5685 stac92xx_set_config_regs(codec,
af9f341a 5686 stac9205_brd_tbl[spec->board_config]);
f3302a59 5687
1cd2224c 5688 spec->digbeep_nid = 0x23;
f3302a59 5689 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5690 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5691 spec->mux_nids = stac9205_mux_nids;
2549413e 5692 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 5693 spec->smux_nids = stac9205_smux_nids;
5694 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5695 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5696 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5697 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5698 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5699 spec->num_pwrs = 0;
f3302a59
MP		 5700
5701 spec->init = stac9205_core_init;
d78d7a90 5702 spec->aloopback_ctl = stac9205_loopback;
f3302a59 5703
6479c631
TI		 5704 spec->num_caps = STAC9205_NUM_CAPS;
5705 spec->capvols = stac9205_capvols;
5706 spec->capsws = stac9205_capsws;
5707
e1f0d669
MR		 5708 spec->aloopback_mask = 0x40;
5709 spec->aloopback_shift = 0;
d9a4268e
TI		 5710 /* Turn on/off EAPD per HP plugging */
5711 if (spec->board_config != STAC_9205_EAPD)
5712 spec->eapd_switch = 1;
f3302a59 5713 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5714
ae0a8ed8 5715 switch (spec->board_config){
ae0a8ed8 5716 case STAC_9205_DELL_M43:
87d48363 5717 /* Enable SPDIF in/out */
330ee995
TI		 5718 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
5719 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 5720
4fe5195c 5721 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 5722 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5723 if (err < 0)
5724 return err;
c5d08bb5 5725 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 5726 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5727 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 5728 AC_VERB_SET_UNSOLICITED_ENABLE,
5729 AC_USRSP_EN | err);
4fe5195c
MR		 5730
5731 spec->gpio_dir = 0x0b;
0fc9dec4 5732 spec->eapd_mask = 0x01;
4fe5195c
MR		 5733 spec->gpio_mask = 0x1b;
5734 spec->gpio_mute = 0x10;
e2e7d624 5735 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5736 * GPIO3 Low = DRM
87d48363 5737 */
4fe5195c 5738 spec->gpio_data = 0x01;
ae0a8ed8 5739 break;
b2c4f4d7
MR		 5740 case STAC_9205_REF:
5741 /* SPDIF-In enabled */
5742 break;
ae0a8ed8
TD		 5743 default:
5744 /* GPIO0 High = EAPD */
0fc9dec4 5745 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5746 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5747 break;
5748 }
33382403 5749
f3302a59 5750 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5751 if (!err) {
5752 if (spec->board_config < 0) {
5753 printk(KERN_WARNING "hda_codec: No auto-config is "
5754 "available, default to model=ref\n");
5755 spec->board_config = STAC_9205_REF;
5756 goto again;
5757 }
5758 err = -EINVAL;
5759 }
f3302a59
MP		 5760 if (err < 0) {
5761 stac92xx_free(codec);
5762 return err;
5763 }
5764
5765 codec->patch_ops = stac92xx_patch_ops;
5766
2d34e1b3
TI		 5767 codec->proc_widget_hook = stac9205_proc_hook;
5768
f3302a59
MP		 5769 return 0;
5770}
5771
db064e50 5772/*
6d859065 5773 * STAC9872 hack
db064e50
TI		 5774 */
5775
1e137f92 5776static struct hda_verb stac9872_core_init[] = {
1624cb9a 5777 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5778 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5779 {}
5780};
5781
caa10b6e
TI		 5782static hda_nid_t stac9872_pin_nids[] = {
5783 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
5784 0x11, 0x13, 0x14,
5785};
5786
5787static hda_nid_t stac9872_adc_nids[] = {
5788 0x8 /*,0x6*/
5789};
5790
5791static hda_nid_t stac9872_mux_nids[] = {
5792 0x15
5793};
5794
6479c631
TI		 5795static unsigned long stac9872_capvols[] = {
5796 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT),
5797};
5798#define stac9872_capsws stac9872_capvols
5799
307282c8
TI		 5800static unsigned int stac9872_vaio_pin_configs[9] = {
5801 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
5802 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
5803 0x90a7013e
5804};
5805
5806static const char *stac9872_models[STAC_9872_MODELS] = {
5807 [STAC_9872_AUTO] = "auto",
5808 [STAC_9872_VAIO] = "vaio",
5809};
5810
5811static unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
5812 [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
5813};
5814
5815static struct snd_pci_quirk stac9872_cfg_tbl[] = {
b04add95
TI		 5816 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
5817 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 5818 {} /* terminator */
5819};
5820
6d859065 5821static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5822{
5823 struct sigmatel_spec *spec;
1e137f92 5824 int err;
db064e50 5825
db064e50
TI		 5826 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5827 if (spec == NULL)
5828 return -ENOMEM;
db064e50 5829 codec->spec = spec;
b04add95
TI		 5830 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
5831 spec->pin_nids = stac9872_pin_nids;
caa10b6e
TI		 5832
5833 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5834 stac9872_models,
5835 stac9872_cfg_tbl);
307282c8 5836 if (spec->board_config < 0)
9a11f1aa
TI		 5837 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5838 codec->chip_name);
307282c8
TI		 5839 else
5840 stac92xx_set_config_regs(codec,
5841 stac9872_brd_tbl[spec->board_config]);
db064e50 5842
1e137f92
TI		 5843 spec->multiout.dac_nids = spec->dac_nids;
5844 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
5845 spec->adc_nids = stac9872_adc_nids;
5846 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
5847 spec->mux_nids = stac9872_mux_nids;
1e137f92 5848 spec->init = stac9872_core_init;
6479c631
TI		 5849 spec->num_caps = 1;
5850 spec->capvols = stac9872_capvols;
5851 spec->capsws = stac9872_capsws;
1e137f92
TI		 5852
5853 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
5854 if (err < 0) {
5855 stac92xx_free(codec);
5856 return -EINVAL;
5857 }
5858 spec->input_mux = &spec->private_imux;
5859 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI		 5860 return 0;
5861}
5862
5863
2f2f4251
M		 5864/*
5865 * patch entries
5866 */
1289e9e8 5867static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 5868 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5869 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5870 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5871 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5872 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5873 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5874 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5875 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5876 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5877 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5878 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5879 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5880 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5881 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5882 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5883 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5884 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5885 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5886 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5887 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5888 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5889 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5890 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5891 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5892 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5893 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5894 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5895 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5896 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5897 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5898 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5899 /* The following does not take into account .id=0x83847661 when subsys =
5900 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5901 * currently not fully supported.
5902 */
5903 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5904 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5905 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 5906 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP		 5907 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5908 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5909 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5910 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5911 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5912 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5913 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5914 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5915 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5916 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5917 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 5918 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
aafc4412 5919 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5920 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5921 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5922 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5923 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5924 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5925 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5926 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5927 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5928 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5929 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5930 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5931 {} /* terminator */
5932};
1289e9e8
TI		 5933
5934MODULE_ALIAS("snd-hda-codec-id:8384*");
5935MODULE_ALIAS("snd-hda-codec-id:111d*");
5936
5937MODULE_LICENSE("GPL");
5938MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5939
5940static struct hda_codec_preset_list sigmatel_list = {
5941 .preset = snd_hda_preset_sigmatel,
5942 .owner = THIS_MODULE,
5943};
5944
5945static int __init patch_sigmatel_init(void)
5946{
5947 return snd_hda_add_codec_preset(&sigmatel_list);
5948}
5949
5950static void __exit patch_sigmatel_exit(void)
5951{
5952 snd_hda_delete_codec_preset(&sigmatel_list);
5953}
5954
5955module_init(patch_sigmatel_init)
5956module_exit(patch_sigmatel_exit)
Clone of davem's net-next-2.6 tree