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ALSA: hda - Add forgotten module alias for Nvidia MCP67 HDMI
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
TI		 38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
1194b5b7 58 STAC_9200_GATEWAY,
117f257d 59 STAC_9200_PANASONIC,
f5fcc13c
TI		 60 STAC_9200_MODELS
61};
62
63enum {
64 STAC_9205_REF,
dfe495d0 65 STAC_9205_DELL_M42,
ae0a8ed8
TD		 66 STAC_9205_DELL_M43,
67 STAC_9205_DELL_M44,
f5fcc13c
TI		 68 STAC_9205_MODELS
69};
70
e1f0d669
MR		 71enum {
72 STAC_92HD73XX_REF,
661cd8fb
TI		 73 STAC_DELL_M6_AMIC,
74 STAC_DELL_M6_DMIC,
75 STAC_DELL_M6_BOTH,
6b3ab21e 76 STAC_DELL_EQ,
e1f0d669
MR		 77 STAC_92HD73XX_MODELS
78};
79
d0513fc6
MR		 80enum {
81 STAC_92HD83XXX_REF,
82 STAC_92HD83XXX_MODELS
83};
84
e035b841
MR		 85enum {
86 STAC_92HD71BXX_REF,
a7662640
MR		 87 STAC_DELL_M4_1,
88 STAC_DELL_M4_2,
3a7abfd2 89 STAC_DELL_M4_3,
6a14f585 90 STAC_HP_M4,
e035b841
MR		 91 STAC_92HD71BXX_MODELS
92};
93
8e21c34c
TD		 94enum {
95 STAC_925x_REF,
96 STAC_M2_2,
97 STAC_MA6,
2c11f955 98 STAC_PA6,
8e21c34c
TD		 99 STAC_925x_MODELS
100};
101
f5fcc13c
TI		 102enum {
103 STAC_D945_REF,
104 STAC_D945GTP3,
105 STAC_D945GTP5,
5d5d3bc3
IZ		 106 STAC_INTEL_MAC_V1,
107 STAC_INTEL_MAC_V2,
108 STAC_INTEL_MAC_V3,
109 STAC_INTEL_MAC_V4,
110 STAC_INTEL_MAC_V5,
536319af
NB		 111 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
112 * is given, one of the above models will be
113 * chosen according to the subsystem id. */
dfe495d0 114 /* for backward compatibility */
f5fcc13c 115 STAC_MACMINI,
3fc24d85 116 STAC_MACBOOK,
6f0778d8
NB		 117 STAC_MACBOOK_PRO_V1,
118 STAC_MACBOOK_PRO_V2,
f16928fb 119 STAC_IMAC_INTEL,
0dae0f83 120 STAC_IMAC_INTEL_20,
8c650087 121 STAC_ECS_202,
dfe495d0
TI		 122 STAC_922X_DELL_D81,
123 STAC_922X_DELL_D82,
124 STAC_922X_DELL_M81,
125 STAC_922X_DELL_M82,
f5fcc13c
TI		 126 STAC_922X_MODELS
127};
128
129enum {
130 STAC_D965_REF,
131 STAC_D965_3ST,
132 STAC_D965_5ST,
4ff076e5 133 STAC_DELL_3ST,
8e9068b1 134 STAC_DELL_BIOS,
f5fcc13c
TI		 135 STAC_927X_MODELS
136};
403d1944 137
74aeaabc
MR		 138struct sigmatel_event {
139 hda_nid_t nid;
c6e4c666
TI		 140 unsigned char type;
141 unsigned char tag;
74aeaabc
MR		 142 int data;
143};
144
145struct sigmatel_jack {
146 hda_nid_t nid;
147 int type;
148 struct snd_jack *jack;
149};
150
2f2f4251 151struct sigmatel_spec {
c8b6bf9b 152 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 153 unsigned int num_mixers;
154
403d1944 155 int board_config;
c0cea0d0 156 unsigned int eapd_switch: 1;
c7d4b2fa 157 unsigned int surr_switch: 1;
403d1944
MP		 158 unsigned int line_switch: 1;
159 unsigned int mic_switch: 1;
3cc08dc6 160 unsigned int alt_switch: 1;
82bc955f 161 unsigned int hp_detect: 1;
00ef50c2 162 unsigned int spdif_mute: 1;
c7d4b2fa 163
4fe5195c 164 /* gpio lines */
0fc9dec4 165 unsigned int eapd_mask;
4fe5195c
MR		 166 unsigned int gpio_mask;
167 unsigned int gpio_dir;
168 unsigned int gpio_data;
169 unsigned int gpio_mute;
170
8daaaa97
MR		 171 /* stream */
172 unsigned int stream_delay;
173
4fe5195c 174 /* analog loopback */
e1f0d669
MR		 175 unsigned char aloopback_mask;
176 unsigned char aloopback_shift;
8259980e 177
a64135a2
MR		 178 /* power management */
179 unsigned int num_pwrs;
d0513fc6 180 unsigned int *pwr_mapping;
a64135a2 181 hda_nid_t *pwr_nids;
b76c850f 182 hda_nid_t *dac_list;
a64135a2 183
74aeaabc
MR		 184 /* jack detection */
185 struct snd_array jacks;
186
187 /* events */
188 struct snd_array events;
189
2f2f4251 190 /* playback */
b22b4821 191 struct hda_input_mux *mono_mux;
89385035 192 struct hda_input_mux *amp_mux;
b22b4821 193 unsigned int cur_mmux;
2f2f4251 194 struct hda_multi_out multiout;
3cc08dc6 195 hda_nid_t dac_nids[5];
2f2f4251
M		 196
197 /* capture */
198 hda_nid_t *adc_nids;
2f2f4251 199 unsigned int num_adcs;
dabbed6f
M		 200 hda_nid_t *mux_nids;
201 unsigned int num_muxes;
8b65727b
MP		 202 hda_nid_t *dmic_nids;
203 unsigned int num_dmics;
e1f0d669 204 hda_nid_t *dmux_nids;
1697055e 205 unsigned int num_dmuxes;
d9737751
MR		 206 hda_nid_t *smux_nids;
207 unsigned int num_smuxes;
65973632 208 const char **spdif_labels;
d9737751 209
dabbed6f 210 hda_nid_t dig_in_nid;
b22b4821 211 hda_nid_t mono_nid;
1cd2224c
MR		 212 hda_nid_t anabeep_nid;
213 hda_nid_t digbeep_nid;
2f2f4251 214
2f2f4251
M		 215 /* pin widgets */
216 hda_nid_t *pin_nids;
217 unsigned int num_pins;
2f2f4251 218 unsigned int *pin_configs;
2f2f4251
M		 219
220 /* codec specific stuff */
221 struct hda_verb *init;
c8b6bf9b 222 struct snd_kcontrol_new *mixer;
2f2f4251
M		 223
224 /* capture source */
8b65727b 225 struct hda_input_mux *dinput_mux;
e1f0d669 226 unsigned int cur_dmux[2];
c7d4b2fa 227 struct hda_input_mux *input_mux;
3cc08dc6 228 unsigned int cur_mux[3];
d9737751
MR		 229 struct hda_input_mux *sinput_mux;
230 unsigned int cur_smux[2];
2a9c7816
MR		 231 unsigned int cur_amux;
232 hda_nid_t *amp_nids;
233 unsigned int num_amps;
8daaaa97 234 unsigned int powerdown_adcs;
2f2f4251 235
403d1944
MP		 236 /* i/o switches */
237 unsigned int io_switch[2];
0fb87bb4 238 unsigned int clfe_swap;
d7a89436 239 unsigned int hp_switch; /* NID of HP as line-out */
5f10c4a9 240 unsigned int aloopback;
2f2f4251 241
c7d4b2fa
M		 242 struct hda_pcm pcm_rec[2]; /* PCM information */
243
244 /* dynamic controls and input_mux */
245 struct auto_pin_cfg autocfg;
603c4019 246 struct snd_array kctls;
8b65727b 247 struct hda_input_mux private_dimux;
c7d4b2fa 248 struct hda_input_mux private_imux;
d9737751 249 struct hda_input_mux private_smux;
89385035 250 struct hda_input_mux private_amp_mux;
b22b4821 251 struct hda_input_mux private_mono_mux;
2f2f4251
M		 252};
253
254static hda_nid_t stac9200_adc_nids[1] = {
255 0x03,
256};
257
258static hda_nid_t stac9200_mux_nids[1] = {
259 0x0c,
260};
261
262static hda_nid_t stac9200_dac_nids[1] = {
263 0x02,
264};
265
a64135a2
MR		 266static hda_nid_t stac92hd73xx_pwr_nids[8] = {
267 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
268 0x0f, 0x10, 0x11
269};
270
0ffa9807
MR		 271static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
272 0x26, 0,
273};
274
e1f0d669
MR		 275static hda_nid_t stac92hd73xx_adc_nids[2] = {
276 0x1a, 0x1b
277};
278
2a9c7816
MR		 279#define DELL_M6_AMP 2
280static hda_nid_t stac92hd73xx_amp_nids[3] = {
281 0x0b, 0x0c, 0x0e
89385035
MR		 282};
283
e1f0d669
MR		 284#define STAC92HD73XX_NUM_DMICS 2
285static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
286 0x13, 0x14, 0
287};
288
289#define STAC92HD73_DAC_COUNT 5
290static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
291 0x15, 0x16, 0x17, 0x18, 0x19,
292};
293
294static hda_nid_t stac92hd73xx_mux_nids[4] = {
295 0x28, 0x29, 0x2a, 0x2b,
296};
297
298static hda_nid_t stac92hd73xx_dmux_nids[2] = {
299 0x20, 0x21,
300};
301
d9737751
MR		 302static hda_nid_t stac92hd73xx_smux_nids[2] = {
303 0x22, 0x23,
304};
305
d0513fc6
MR		 306#define STAC92HD83XXX_NUM_DMICS 2
307static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
308 0x11, 0x12, 0
309};
310
311#define STAC92HD81_DAC_COUNT 2
312#define STAC92HD83_DAC_COUNT 3
313static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
314 0x13, 0x14, 0x22,
315};
316
317static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
318 0x17, 0x18,
319};
320
321static hda_nid_t stac92hd83xxx_adc_nids[2] = {
322 0x15, 0x16,
323};
324
325static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
326 0xa, 0xb, 0xd, 0xe,
327};
328
0ffa9807
MR		 329static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
330 0x1e, 0,
331};
332
d0513fc6
MR		 333static unsigned int stac92hd83xxx_pwr_mapping[4] = {
334 0x03, 0x0c, 0x10, 0x40,
335};
336
a64135a2
MR		 337static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
338 0x0a, 0x0d, 0x0f
339};
340
e035b841
MR		 341static hda_nid_t stac92hd71bxx_adc_nids[2] = {
342 0x12, 0x13,
343};
344
345static hda_nid_t stac92hd71bxx_mux_nids[2] = {
346 0x1a, 0x1b
347};
348
4b33c767
MR		 349static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
350 0x1c, 0x1d,
e1f0d669
MR		 351};
352
d9737751
MR		 353static hda_nid_t stac92hd71bxx_smux_nids[2] = {
354 0x24, 0x25,
355};
356
aea7bb0a 357static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 358 0x10, /*0x11, */
359};
360
361#define STAC92HD71BXX_NUM_DMICS 2
362static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
363 0x18, 0x19, 0
364};
365
0ffa9807
MR		 366static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
367 0x22, 0
368};
369
8e21c34c
TD		 370static hda_nid_t stac925x_adc_nids[1] = {
371 0x03,
372};
373
374static hda_nid_t stac925x_mux_nids[1] = {
375 0x0f,
376};
377
378static hda_nid_t stac925x_dac_nids[1] = {
379 0x02,
380};
381
f6e9852a
TI		 382#define STAC925X_NUM_DMICS 1
383static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
384 0x15, 0
2c11f955
TD		 385};
386
1697055e
TI		 387static hda_nid_t stac925x_dmux_nids[1] = {
388 0x14,
389};
390
2f2f4251
M		 391static hda_nid_t stac922x_adc_nids[2] = {
392 0x06, 0x07,
393};
394
395static hda_nid_t stac922x_mux_nids[2] = {
396 0x12, 0x13,
397};
398
3cc08dc6
MP		 399static hda_nid_t stac927x_adc_nids[3] = {
400 0x07, 0x08, 0x09
401};
402
403static hda_nid_t stac927x_mux_nids[3] = {
404 0x15, 0x16, 0x17
405};
406
d9737751
MR		 407static hda_nid_t stac927x_smux_nids[1] = {
408 0x21,
409};
410
b76c850f
MR		 411static hda_nid_t stac927x_dac_nids[6] = {
412 0x02, 0x03, 0x04, 0x05, 0x06, 0
413};
414
e1f0d669
MR		 415static hda_nid_t stac927x_dmux_nids[1] = {
416 0x1b,
417};
418
7f16859a
MR		 419#define STAC927X_NUM_DMICS 2
420static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
421 0x13, 0x14, 0
422};
423
65973632
MR		 424static const char *stac927x_spdif_labels[5] = {
425 "Digital Playback", "ADAT", "Analog Mux 1",
426 "Analog Mux 2", "Analog Mux 3"
427};
428
f3302a59
MP		 429static hda_nid_t stac9205_adc_nids[2] = {
430 0x12, 0x13
431};
432
433static hda_nid_t stac9205_mux_nids[2] = {
434 0x19, 0x1a
435};
436
e1f0d669 437static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 438 0x1d,
e1f0d669
MR		 439};
440
d9737751
MR		 441static hda_nid_t stac9205_smux_nids[1] = {
442 0x21,
443};
444
f6e9852a
TI		 445#define STAC9205_NUM_DMICS 2
446static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
447 0x17, 0x18, 0
8b65727b
MP		 448};
449
c7d4b2fa 450static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 451 0x08, 0x09, 0x0d, 0x0e,
452 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 453};
454
8e21c34c
TD		 455static hda_nid_t stac925x_pin_nids[8] = {
456 0x07, 0x08, 0x0a, 0x0b,
457 0x0c, 0x0d, 0x10, 0x11,
458};
459
2f2f4251
M		 460static hda_nid_t stac922x_pin_nids[10] = {
461 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
462 0x0f, 0x10, 0x11, 0x15, 0x1b,
463};
464
a7662640 465static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 466 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
467 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 468 0x14, 0x22, 0x23
e1f0d669
MR		 469};
470
d0513fc6
MR		 471static hda_nid_t stac92hd83xxx_pin_nids[14] = {
472 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
473 0x0f, 0x10, 0x11, 0x12, 0x13,
474 0x1d, 0x1e, 0x1f, 0x20
475};
0ffa9807 476static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 477 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
478 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 479 0x1f,
e035b841
MR		 480};
481
3cc08dc6
MP		 482static hda_nid_t stac927x_pin_nids[14] = {
483 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
484 0x0f, 0x10, 0x11, 0x12, 0x13,
485 0x14, 0x21, 0x22, 0x23,
486};
487
f3302a59
MP		 488static hda_nid_t stac9205_pin_nids[12] = {
489 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
490 0x0f, 0x14, 0x16, 0x17, 0x18,
491 0x21, 0x22,
f3302a59
MP		 492};
493
89385035
MR		 494#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
495
496static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
497 struct snd_ctl_elem_value *ucontrol)
498{
499 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
500 struct sigmatel_spec *spec = codec->spec;
501 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
502
503 kcontrol->private_value ^= get_amp_nid(kcontrol);
504 kcontrol->private_value |= nid;
505
506 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
507}
508
509static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
510 struct snd_ctl_elem_value *ucontrol)
511{
512 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
513 struct sigmatel_spec *spec = codec->spec;
514 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
515
516 kcontrol->private_value ^= get_amp_nid(kcontrol);
517 kcontrol->private_value |= nid;
518
519 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
520}
521
8b65727b
MP		 522static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
523 struct snd_ctl_elem_info *uinfo)
524{
525 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
526 struct sigmatel_spec *spec = codec->spec;
527 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
528}
529
530static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
531 struct snd_ctl_elem_value *ucontrol)
532{
533 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
534 struct sigmatel_spec *spec = codec->spec;
e1f0d669 535 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 536
e1f0d669 537 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 538 return 0;
539}
540
541static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
542 struct snd_ctl_elem_value *ucontrol)
543{
544 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
545 struct sigmatel_spec *spec = codec->spec;
e1f0d669 546 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 547
548 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 549 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 550}
551
d9737751
MR		 552static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
553 struct snd_ctl_elem_info *uinfo)
554{
555 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
556 struct sigmatel_spec *spec = codec->spec;
557 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
558}
559
560static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
561 struct snd_ctl_elem_value *ucontrol)
562{
563 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
564 struct sigmatel_spec *spec = codec->spec;
565 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
566
567 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
568 return 0;
569}
570
571static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
572 struct snd_ctl_elem_value *ucontrol)
573{
574 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
575 struct sigmatel_spec *spec = codec->spec;
00ef50c2 576 struct hda_input_mux *smux = &spec->private_smux;
d9737751 577 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 578 int err, val;
579 hda_nid_t nid;
d9737751 580
00ef50c2 581 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 582 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 583 if (err < 0)
584 return err;
585
586 if (spec->spdif_mute) {
587 if (smux_idx == 0)
588 nid = spec->multiout.dig_out_nid;
589 else
590 nid = codec->slave_dig_outs[smux_idx - 1];
591 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 592 val = HDA_AMP_MUTE;
00ef50c2 593 else
c9b46f91 594 val = 0;
00ef50c2 595 /* un/mute SPDIF out */
c9b46f91
TI		 596 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
597 HDA_AMP_MUTE, val);
00ef50c2
MR		 598 }
599 return 0;
d9737751
MR		 600}
601
c8b6bf9b 602static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 603{
604 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
605 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 606 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 607}
608
c8b6bf9b 609static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 610{
611 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
612 struct sigmatel_spec *spec = codec->spec;
613 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
614
615 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
616 return 0;
617}
618
c8b6bf9b 619static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 620{
621 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
622 struct sigmatel_spec *spec = codec->spec;
623 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
624
c7d4b2fa 625 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 626 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
627}
628
b22b4821
MR		 629static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
630 struct snd_ctl_elem_info *uinfo)
631{
632 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
633 struct sigmatel_spec *spec = codec->spec;
634 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
635}
636
637static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
638 struct snd_ctl_elem_value *ucontrol)
639{
640 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
641 struct sigmatel_spec *spec = codec->spec;
642
643 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
644 return 0;
645}
646
647static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
648 struct snd_ctl_elem_value *ucontrol)
649{
650 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
651 struct sigmatel_spec *spec = codec->spec;
652
653 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
654 spec->mono_nid, &spec->cur_mmux);
655}
656
89385035
MR		 657static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
658 struct snd_ctl_elem_info *uinfo)
659{
660 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
661 struct sigmatel_spec *spec = codec->spec;
662 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
663}
664
665static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
666 struct snd_ctl_elem_value *ucontrol)
667{
668 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
669 struct sigmatel_spec *spec = codec->spec;
670
671 ucontrol->value.enumerated.item[0] = spec->cur_amux;
672 return 0;
673}
674
675static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
676 struct snd_ctl_elem_value *ucontrol)
677{
678 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
679 struct sigmatel_spec *spec = codec->spec;
680 struct snd_kcontrol *ctl =
681 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
682 if (!ctl)
683 return -EINVAL;
684
685 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
686 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
687
688 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
689 0, &spec->cur_amux);
690}
691
5f10c4a9
ML		 692#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
693
694static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
695 struct snd_ctl_elem_value *ucontrol)
696{
697 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 698 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 699 struct sigmatel_spec *spec = codec->spec;
700
e1f0d669
MR		 701 ucontrol->value.integer.value[0] = !!(spec->aloopback &
702 (spec->aloopback_mask << idx));
5f10c4a9
ML		 703 return 0;
704}
705
706static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
707 struct snd_ctl_elem_value *ucontrol)
708{
709 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
710 struct sigmatel_spec *spec = codec->spec;
e1f0d669 711 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 712 unsigned int dac_mode;
e1f0d669 713 unsigned int val, idx_val;
5f10c4a9 714
e1f0d669
MR		 715 idx_val = spec->aloopback_mask << idx;
716 if (ucontrol->value.integer.value[0])
717 val = spec->aloopback | idx_val;
718 else
719 val = spec->aloopback & ~idx_val;
68ea7b2f 720 if (spec->aloopback == val)
5f10c4a9
ML		 721 return 0;
722
68ea7b2f 723 spec->aloopback = val;
5f10c4a9 724
e1f0d669
MR		 725 /* Only return the bits defined by the shift value of the
726 * first two bytes of the mask
727 */
5f10c4a9 728 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 729 kcontrol->private_value & 0xFFFF, 0x0);
730 dac_mode >>= spec->aloopback_shift;
5f10c4a9 731
e1f0d669 732 if (spec->aloopback & idx_val) {
5f10c4a9 733 snd_hda_power_up(codec);
e1f0d669 734 dac_mode |= idx_val;
5f10c4a9
ML		 735 } else {
736 snd_hda_power_down(codec);
e1f0d669 737 dac_mode &= ~idx_val;
5f10c4a9
ML		 738 }
739
740 snd_hda_codec_write_cache(codec, codec->afg, 0,
741 kcontrol->private_value >> 16, dac_mode);
742
743 return 1;
744}
745
c7d4b2fa 746static struct hda_verb stac9200_core_init[] = {
2f2f4251 747 /* set dac0mux for dac converter */
c7d4b2fa 748 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 749 {}
750};
751
1194b5b7
TI		 752static struct hda_verb stac9200_eapd_init[] = {
753 /* set dac0mux for dac converter */
754 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
755 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
756 {}
757};
758
e1f0d669
MR		 759static struct hda_verb stac92hd73xx_6ch_core_init[] = {
760 /* set master volume and direct control */
761 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
762 /* setup audio connections */
763 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
764 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
765 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
766 /* setup adcs to point to mixer */
767 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
768 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 769 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
770 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
771 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
772 /* setup import muxs */
773 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
774 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
775 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
776 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
777 {}
778};
779
d654a660
MR		 780static struct hda_verb dell_eq_core_init[] = {
781 /* set master volume to max value without distortion
782 * and direct control */
783 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
784 /* setup audio connections */
785 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 786 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
787 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 788 /* setup adcs to point to mixer */
789 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
790 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
791 /* setup import muxs */
792 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
793 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
794 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
795 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
796 {}
797};
798
52fe0f9d 799static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 800 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d 801 /* setup audio connections */
7747ecce
MR		 802 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
803 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 804 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
805 /* setup adcs to point to mixer */
806 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
807 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
808 /* setup import muxs */
809 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
810 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
811 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
812 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
813 {}
814};
815
e1f0d669
MR		 816static struct hda_verb stac92hd73xx_8ch_core_init[] = {
817 /* set master volume and direct control */
818 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
819 /* setup audio connections */
820 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
821 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
822 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
823 /* connect hp ports to dac3 */
824 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
825 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
826 /* setup adcs to point to mixer */
827 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
828 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 829 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
830 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
831 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
832 /* setup import muxs */
833 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
834 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
835 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
836 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
837 {}
838};
839
840static struct hda_verb stac92hd73xx_10ch_core_init[] = {
841 /* set master volume and direct control */
842 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
843 /* setup audio connections */
844 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
845 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
846 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
847 /* dac3 is connected to import3 mux */
848 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
849 /* connect hp ports to dac4 */
850 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
851 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
852 /* setup adcs to point to mixer */
853 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
854 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 855 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
856 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
857 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
858 /* setup import muxs */
859 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
860 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
861 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
862 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
863 {}
864};
865
d0513fc6
MR		 866static struct hda_verb stac92hd83xxx_core_init[] = {
867 /* start of config #1 */
868 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
869
870 /* start of config #2 */
871 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
872 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
873 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
874
875 /* power state controls amps */
876 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
877};
878
e035b841 879static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 880 /* set master volume and direct control */
881 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
882 /* connect headphone jack to dac1 */
883 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
541eee87
MR		 884 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
885 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
886 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
887 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 888};
889
4b33c767 890#define HD_DISABLE_PORTF 2
541eee87 891static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 892 /* start of config #1 */
893
894 /* connect port 0f to audio mixer */
895 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 896 /* unmute right and left channels for node 0x0f */
897 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
898 /* start of config #2 */
899
e035b841
MR		 900 /* set master volume and direct control */
901 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
902 /* connect headphone jack to dac1 */
903 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 904 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 905 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
906 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 907 {}
908};
909
8e21c34c
TD		 910static struct hda_verb stac925x_core_init[] = {
911 /* set dac0mux for dac converter */
912 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
913 {}
914};
915
c7d4b2fa 916static struct hda_verb stac922x_core_init[] = {
2f2f4251 917 /* set master volume and direct control */
c7d4b2fa 918 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 919 {}
920};
921
93ed1503 922static struct hda_verb d965_core_init[] = {
19039bd0 923 /* set master volume and direct control */
93ed1503 924 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 925 /* unmute node 0x1b */
926 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
927 /* select node 0x03 as DAC */
928 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
929 {}
930};
931
3cc08dc6
MP		 932static struct hda_verb stac927x_core_init[] = {
933 /* set master volume and direct control */
934 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 935 /* enable analog pc beep path */
936 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 937 {}
938};
939
f3302a59
MP		 940static struct hda_verb stac9205_core_init[] = {
941 /* set master volume and direct control */
942 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 943 /* enable analog pc beep path */
944 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 945 {}
946};
947
b22b4821
MR		 948#define STAC_MONO_MUX \
949 { \
950 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
951 .name = "Mono Mux", \
952 .count = 1, \
953 .info = stac92xx_mono_mux_enum_info, \
954 .get = stac92xx_mono_mux_enum_get, \
955 .put = stac92xx_mono_mux_enum_put, \
956 }
957
89385035
MR		 958#define STAC_AMP_MUX \
959 { \
960 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
961 .name = "Amp Selector Capture Switch", \
962 .count = 1, \
963 .info = stac92xx_amp_mux_enum_info, \
964 .get = stac92xx_amp_mux_enum_get, \
965 .put = stac92xx_amp_mux_enum_put, \
966 }
967
968#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
969 { \
970 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
971 .name = xname, \
972 .index = 0, \
973 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
974 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
975 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
976 .info = stac92xx_amp_volume_info, \
977 .get = stac92xx_amp_volume_get, \
978 .put = stac92xx_amp_volume_put, \
979 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
980 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
981 }
982
9e05b7a3 983#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 984 { \
985 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
986 .name = "Input Source", \
9e05b7a3 987 .count = cnt, \
ca7c5a8b
ML		 988 .info = stac92xx_mux_enum_info, \
989 .get = stac92xx_mux_enum_get, \
990 .put = stac92xx_mux_enum_put, \
991 }
992
e1f0d669 993#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 994 { \
995 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
996 .name = "Analog Loopback", \
e1f0d669 997 .count = cnt, \
5f10c4a9
ML		 998 .info = stac92xx_aloopback_info, \
999 .get = stac92xx_aloopback_get, \
1000 .put = stac92xx_aloopback_put, \
1001 .private_value = verb_read | (verb_write << 16), \
1002 }
1003
c8b6bf9b 1004static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 1005 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
1006 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 1007 STAC_INPUT_SOURCE(1),
2f2f4251
M		 1008 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1009 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 1010 { } /* end */
1011};
1012
2a9c7816 1013#define DELL_M6_MIXER 6
e1f0d669 1014static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 1015 /* start of config #1 */
e1f0d669
MR		 1016 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1017 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1018
e1f0d669
MR		 1019 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1020 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1021
2a9c7816
MR		 1022 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1023 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1024
1025 /* start of config #2 */
1026 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1027 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1028
e1f0d669
MR		 1029 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1030 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1031
2a9c7816
MR		 1032 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1033
1034 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1035 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1036
1037 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1038 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1039
e1f0d669
MR		 1040 { } /* end */
1041};
1042
1043static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1044 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1045
e1f0d669
MR		 1046 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1047 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1048
1049 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1050 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1051
1052 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1053 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1054
1055 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1056 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1057
1058 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1059 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1060
1061 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1062 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1063
1064 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1065 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1066 { } /* end */
1067};
1068
1069static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1070 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1071
e1f0d669
MR		 1072 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1073 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1074
1075 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1076 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1077
1078 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1079 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1080
1081 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1082 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1083
1084 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1085 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1086
1087 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1088 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1089
1090 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1091 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1092 { } /* end */
1093};
1094
d0513fc6
MR		 1095
1096static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1097 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1098 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1099
1100 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1101 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1102
1103 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1104 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1105
1106 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1107 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1108
1109 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1110 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1111
1112 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1113 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1114
1115 /*
1116 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1117 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1118 */
1119 { } /* end */
1120};
1121
541eee87 1122static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1123 STAC_INPUT_SOURCE(2),
4b33c767 1124 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1125
9b35947f
MR		 1126 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1127 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1128
1129 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1130 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1131 /* analog pc-beep replaced with digital beep support */
1132 /*
f7c5dda2
MR		 1133 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1134 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1135 */
f7c5dda2 1136
687cb98e
MR		 1137 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1138 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1139
687cb98e
MR		 1140 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1141 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1142
1143 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1144 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1145
1146 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1147 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1148 { } /* end */
1149};
1150
541eee87 1151static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1152 STAC_INPUT_SOURCE(2),
1153 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1154
541eee87
MR		 1155 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1156 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1157
1158 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1159 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1160 { } /* end */
1161};
1162
8e21c34c 1163static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1164 STAC_INPUT_SOURCE(1),
8e21c34c 1165 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1166 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1167 { } /* end */
1168};
1169
9e05b7a3 1170static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1171 STAC_INPUT_SOURCE(2),
e1f0d669 1172 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1173
1174 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1175 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1176
1177 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1178 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1179 { } /* end */
1180};
1181
19039bd0 1182/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1183static struct snd_kcontrol_new stac922x_mixer[] = {
1184 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1185 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1186 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1187
1188 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1189 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1190 { } /* end */
1191};
1192
9e05b7a3 1193
d1d985f0 1194static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1195 STAC_INPUT_SOURCE(3),
e1f0d669 1196 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1197
9e05b7a3
ML		 1198 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1199 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1200
1201 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1202 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1203
1204 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1205 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1206 { } /* end */
1207};
1208
1697055e
TI		 1209static struct snd_kcontrol_new stac_dmux_mixer = {
1210 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1211 .name = "Digital Input Source",
1212 /* count set later */
1213 .info = stac92xx_dmux_enum_info,
1214 .get = stac92xx_dmux_enum_get,
1215 .put = stac92xx_dmux_enum_put,
1216};
1217
d9737751
MR		 1218static struct snd_kcontrol_new stac_smux_mixer = {
1219 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1220 .name = "IEC958 Playback Source",
d9737751
MR		 1221 /* count set later */
1222 .info = stac92xx_smux_enum_info,
1223 .get = stac92xx_smux_enum_get,
1224 .put = stac92xx_smux_enum_put,
1225};
1226
2134ea4f
TI		 1227static const char *slave_vols[] = {
1228 "Front Playback Volume",
1229 "Surround Playback Volume",
1230 "Center Playback Volume",
1231 "LFE Playback Volume",
1232 "Side Playback Volume",
1233 "Headphone Playback Volume",
1234 "Headphone Playback Volume",
1235 "Speaker Playback Volume",
1236 "External Speaker Playback Volume",
1237 "Speaker2 Playback Volume",
1238 NULL
1239};
1240
1241static const char *slave_sws[] = {
1242 "Front Playback Switch",
1243 "Surround Playback Switch",
1244 "Center Playback Switch",
1245 "LFE Playback Switch",
1246 "Side Playback Switch",
1247 "Headphone Playback Switch",
1248 "Headphone Playback Switch",
1249 "Speaker Playback Switch",
1250 "External Speaker Playback Switch",
1251 "Speaker2 Playback Switch",
edb54a55 1252 "IEC958 Playback Switch",
2134ea4f
TI		 1253 NULL
1254};
1255
603c4019 1256static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1257static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1258
2f2f4251
M		 1259static int stac92xx_build_controls(struct hda_codec *codec)
1260{
1261 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1262 struct auto_pin_cfg *cfg = &spec->autocfg;
1263 hda_nid_t nid;
2f2f4251 1264 int err;
c7d4b2fa 1265 int i;
2f2f4251
M		 1266
1267 err = snd_hda_add_new_ctls(codec, spec->mixer);
1268 if (err < 0)
1269 return err;
c7d4b2fa
M		 1270
1271 for (i = 0; i < spec->num_mixers; i++) {
1272 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1273 if (err < 0)
1274 return err;
1275 }
1697055e
TI		 1276 if (spec->num_dmuxes > 0) {
1277 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1278 err = snd_hda_ctl_add(codec,
1697055e
TI		 1279 snd_ctl_new1(&stac_dmux_mixer, codec));
1280 if (err < 0)
1281 return err;
1282 }
d9737751 1283 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1284 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1285 struct hda_input_mux *smux = &spec->private_smux;
1286 /* check for mute support on SPDIF out */
1287 if (wcaps & AC_WCAP_OUT_AMP) {
1288 smux->items[smux->num_items].label = "Off";
1289 smux->items[smux->num_items].index = 0;
1290 smux->num_items++;
1291 spec->spdif_mute = 1;
1292 }
d9737751
MR		 1293 stac_smux_mixer.count = spec->num_smuxes;
1294 err = snd_ctl_add(codec->bus->card,
1295 snd_ctl_new1(&stac_smux_mixer, codec));
1296 if (err < 0)
1297 return err;
1298 }
c7d4b2fa 1299
dabbed6f
M		 1300 if (spec->multiout.dig_out_nid) {
1301 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1302 if (err < 0)
1303 return err;
9a08160b
TI		 1304 err = snd_hda_create_spdif_share_sw(codec,
1305 &spec->multiout);
1306 if (err < 0)
1307 return err;
1308 spec->multiout.share_spdif = 1;
dabbed6f 1309 }
da74ae3e 1310 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1311 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1312 if (err < 0)
1313 return err;
1314 }
2134ea4f
TI		 1315
1316 /* if we have no master control, let's create it */
1317 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1318 unsigned int vmaster_tlv[4];
2134ea4f 1319 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1320 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1321 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1322 vmaster_tlv, slave_vols);
2134ea4f
TI		 1323 if (err < 0)
1324 return err;
1325 }
1326 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1327 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1328 NULL, slave_sws);
1329 if (err < 0)
1330 return err;
1331 }
1332
603c4019 1333 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1334
1335 /* create jack input elements */
1336 if (spec->hp_detect) {
1337 for (i = 0; i < cfg->hp_outs; i++) {
1338 int type = SND_JACK_HEADPHONE;
1339 nid = cfg->hp_pins[i];
1340 /* jack detection */
1341 if (cfg->hp_outs == i)
1342 type |= SND_JACK_LINEOUT;
1343 err = stac92xx_add_jack(codec, nid, type);
1344 if (err < 0)
1345 return err;
1346 }
1347 }
1348 for (i = 0; i < cfg->line_outs; i++) {
1349 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1350 SND_JACK_LINEOUT);
1351 if (err < 0)
1352 return err;
1353 }
1354 for (i = 0; i < AUTO_PIN_LAST; i++) {
1355 nid = cfg->input_pins[i];
1356 if (nid) {
1357 err = stac92xx_add_jack(codec, nid,
1358 SND_JACK_MICROPHONE);
1359 if (err < 0)
1360 return err;
1361 }
1362 }
1363
dabbed6f 1364 return 0;
2f2f4251
M		 1365}
1366
403d1944 1367static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1368 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1369 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1370};
1371
dfe495d0
TI		 1372/*
1373 STAC 9200 pin configs for
1374 102801A8
1375 102801DE
1376 102801E8
1377*/
1378static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1379 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1380 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1381};
1382
1383/*
1384 STAC 9200 pin configs for
1385 102801C0
1386 102801C1
1387*/
1388static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1389 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1390 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1391};
1392
1393/*
1394 STAC 9200 pin configs for
1395 102801C4 (Dell Dimension E310)
1396 102801C5
1397 102801C7
1398 102801D9
1399 102801DA
1400 102801E3
1401*/
1402static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1403 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1404 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1405};
1406
1407
1408/*
1409 STAC 9200-32 pin configs for
1410 102801B5 (Dell Inspiron 630m)
1411 102801D8 (Dell Inspiron 640m)
1412*/
1413static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1414 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1415 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1416};
1417
1418/*
1419 STAC 9200-32 pin configs for
1420 102801C2 (Dell Latitude D620)
1421 102801C8
1422 102801CC (Dell Latitude D820)
1423 102801D4
1424 102801D6
1425*/
1426static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1427 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1428 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1429};
1430
1431/*
1432 STAC 9200-32 pin configs for
1433 102801CE (Dell XPS M1710)
1434 102801CF (Dell Precision M90)
1435*/
1436static unsigned int dell9200_m23_pin_configs[8] = {
1437 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1438 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1439};
1440
1441/*
1442 STAC 9200-32 pin configs for
1443 102801C9
1444 102801CA
1445 102801CB (Dell Latitude 120L)
1446 102801D3
1447*/
1448static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1449 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1450 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1451};
1452
1453/*
1454 STAC 9200-32 pin configs for
1455 102801BD (Dell Inspiron E1505n)
1456 102801EE
1457 102801EF
1458*/
1459static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1460 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1461 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1462};
1463
1464/*
1465 STAC 9200-32 pin configs for
1466 102801F5 (Dell Inspiron 1501)
1467 102801F6
1468*/
1469static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1470 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1471 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1472};
1473
1474/*
1475 STAC 9200-32
1476 102801CD (Dell Inspiron E1705/9400)
1477*/
1478static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1479 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1480 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1481};
1482
bf277785
TD		 1483static unsigned int oqo9200_pin_configs[8] = {
1484 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1485 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1486};
1487
dfe495d0 1488
f5fcc13c
TI		 1489static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1490 [STAC_REF] = ref9200_pin_configs,
bf277785 1491 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1492 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1493 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1494 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1495 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1496 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1497 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1498 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1499 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1500 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1501 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1502 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1503};
1504
f5fcc13c
TI		 1505static const char *stac9200_models[STAC_9200_MODELS] = {
1506 [STAC_REF] = "ref",
bf277785 1507 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1508 [STAC_9200_DELL_D21] = "dell-d21",
1509 [STAC_9200_DELL_D22] = "dell-d22",
1510 [STAC_9200_DELL_D23] = "dell-d23",
1511 [STAC_9200_DELL_M21] = "dell-m21",
1512 [STAC_9200_DELL_M22] = "dell-m22",
1513 [STAC_9200_DELL_M23] = "dell-m23",
1514 [STAC_9200_DELL_M24] = "dell-m24",
1515 [STAC_9200_DELL_M25] = "dell-m25",
1516 [STAC_9200_DELL_M26] = "dell-m26",
1517 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1518 [STAC_9200_GATEWAY] = "gateway",
117f257d 1519 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1520};
1521
1522static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1523 /* SigmaTel reference board */
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1525 "DFI LanParty", STAC_REF),
e7377071 1526 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1528 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1530 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1532 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1534 "unknown Dell", STAC_9200_DELL_D22),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1536 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1538 "Dell Latitude D620", STAC_9200_DELL_M22),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1540 "unknown Dell", STAC_9200_DELL_D23),
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1542 "unknown Dell", STAC_9200_DELL_D23),
1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1544 "unknown Dell", STAC_9200_DELL_M22),
1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1546 "unknown Dell", STAC_9200_DELL_M24),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1548 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1550 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1552 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1554 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1556 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1558 "Dell Precision M90", STAC_9200_DELL_M23),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1560 "unknown Dell", STAC_9200_DELL_M22),
1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1562 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1564 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1566 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1567 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1568 "unknown Dell", STAC_9200_DELL_D23),
1569 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1570 "unknown Dell", STAC_9200_DELL_D23),
1571 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1572 "unknown Dell", STAC_9200_DELL_D21),
1573 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1574 "unknown Dell", STAC_9200_DELL_D23),
1575 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1576 "unknown Dell", STAC_9200_DELL_D21),
1577 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1578 "unknown Dell", STAC_9200_DELL_M25),
1579 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1580 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1581 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1582 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1583 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1584 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1585 /* Panasonic */
117f257d 1586 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1587 /* Gateway machines needs EAPD to be set on resume */
1588 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1589 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1590 STAC_9200_GATEWAY),
1591 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1592 STAC_9200_GATEWAY),
bf277785
TD		 1593 /* OQO Mobile */
1594 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1595 {} /* terminator */
1596};
1597
8e21c34c
TD		 1598static unsigned int ref925x_pin_configs[8] = {
1599 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1600 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1601};
1602
1603static unsigned int stac925x_MA6_pin_configs[8] = {
1604 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1605 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1606};
1607
2c11f955
TD		 1608static unsigned int stac925x_PA6_pin_configs[8] = {
1609 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1610 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1611};
1612
8e21c34c 1613static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1614 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1615 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1616};
1617
1618static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1619 [STAC_REF] = ref925x_pin_configs,
1620 [STAC_M2_2] = stac925xM2_2_pin_configs,
1621 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1622 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1623};
1624
1625static const char *stac925x_models[STAC_925x_MODELS] = {
1626 [STAC_REF] = "ref",
1627 [STAC_M2_2] = "m2-2",
1628 [STAC_MA6] = "m6",
2c11f955 1629 [STAC_PA6] = "pa6",
8e21c34c
TD		 1630};
1631
1632static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1633 /* SigmaTel reference board */
1634 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1635 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1636 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1637 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1638 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1639 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1640 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1641 {} /* terminator */
1642};
1643
a7662640 1644static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1645 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1646 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1647 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1648 0x01452050,
1649};
1650
1651static unsigned int dell_m6_pin_configs[13] = {
1652 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1653 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1654 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1655 0x4f0000f0,
e1f0d669
MR		 1656};
1657
1658static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1659 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1660 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1661 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1662 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1663 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1664};
1665
1666static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1667 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI		 1668 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1669 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1670 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1671 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1672};
1673
1674static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1675 /* SigmaTel reference board */
1676 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1677 "DFI LanParty", STAC_92HD73XX_REF),
1678 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1679 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1680 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1681 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1682 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1683 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1684 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1685 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1686 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1687 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1688 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1689 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1690 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1691 "unknown Dell", STAC_DELL_M6_DMIC),
1692 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1693 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1694 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1695 "Dell Studio 1537", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1696 {} /* terminator */
1697};
1698
d0513fc6
MR		 1699static unsigned int ref92hd83xxx_pin_configs[14] = {
1700 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1701 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1702 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1703 0x01451160, 0x98560170,
1704};
1705
1706static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1707 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1708};
1709
1710static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1711 [STAC_92HD83XXX_REF] = "ref",
1712};
1713
1714static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1715 /* SigmaTel reference board */
1716 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1717 "DFI LanParty", STAC_92HD71BXX_REF),
1718};
1719
0ffa9807 1720static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1721 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1722 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1723 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1724};
1725
0ffa9807 1726static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1727 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1728 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1729 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1730};
1731
0ffa9807 1732static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1733 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1734 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1735 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1736};
1737
3a7abfd2
MR		 1738static unsigned int dell_m4_3_pin_configs[11] = {
1739 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1740 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1741 0x40f000f0, 0x044413b0, 0x044413b0,
1742};
1743
e035b841
MR		 1744static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1745 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1746 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1747 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1748 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1749 [STAC_HP_M4] = NULL,
e035b841
MR		 1750};
1751
1752static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1753 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1754 [STAC_DELL_M4_1] = "dell-m4-1",
1755 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1756 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1757 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1758};
1759
1760static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1761 /* SigmaTel reference board */
1762 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1763 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1764 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1765 "HP dv5", STAC_HP_M4),
1766 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1767 "HP dv7", STAC_HP_M4),
9a9e2359
MR		 1768 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1769 "unknown HP", STAC_HP_M4),
a7662640
MR		 1770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1771 "unknown Dell", STAC_DELL_M4_1),
1772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1773 "unknown Dell", STAC_DELL_M4_1),
1774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1775 "unknown Dell", STAC_DELL_M4_1),
1776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1777 "unknown Dell", STAC_DELL_M4_1),
1778 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1779 "unknown Dell", STAC_DELL_M4_1),
1780 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1781 "unknown Dell", STAC_DELL_M4_1),
1782 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1783 "unknown Dell", STAC_DELL_M4_1),
1784 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1785 "unknown Dell", STAC_DELL_M4_2),
1786 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1787 "unknown Dell", STAC_DELL_M4_2),
1788 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1789 "unknown Dell", STAC_DELL_M4_2),
1790 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1791 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1792 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1793 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1794 {} /* terminator */
1795};
1796
403d1944
MP		 1797static unsigned int ref922x_pin_configs[10] = {
1798 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1799 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1800 0x40000100, 0x40000100,
1801};
1802
dfe495d0
TI		 1803/*
1804 STAC 922X pin configs for
1805 102801A7
1806 102801AB
1807 102801A9
1808 102801D1
1809 102801D2
1810*/
1811static unsigned int dell_922x_d81_pin_configs[10] = {
1812 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1813 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1814 0x01813122, 0x400001f2,
1815};
1816
1817/*
1818 STAC 922X pin configs for
1819 102801AC
1820 102801D0
1821*/
1822static unsigned int dell_922x_d82_pin_configs[10] = {
1823 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1824 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1825 0x01813122, 0x400001f1,
1826};
1827
1828/*
1829 STAC 922X pin configs for
1830 102801BF
1831*/
1832static unsigned int dell_922x_m81_pin_configs[10] = {
1833 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1834 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1835 0x40C003f1, 0x405003f0,
1836};
1837
1838/*
1839 STAC 9221 A1 pin configs for
1840 102801D7 (Dell XPS M1210)
1841*/
1842static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1843 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1844 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1845 0x508003f3, 0x405003f4,
1846};
1847
403d1944 1848static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1849 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1850 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1851 0x02a19120, 0x40000100,
1852};
1853
1854static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1855 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1856 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1857 0x02a19320, 0x40000100,
1858};
1859
5d5d3bc3
IZ		 1860static unsigned int intel_mac_v1_pin_configs[10] = {
1861 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1862 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1863 0x400000fc, 0x400000fb,
1864};
1865
1866static unsigned int intel_mac_v2_pin_configs[10] = {
1867 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1868 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1869 0x400000fc, 0x400000fb,
6f0778d8
NB		 1870};
1871
5d5d3bc3
IZ		 1872static unsigned int intel_mac_v3_pin_configs[10] = {
1873 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1874 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1875 0x400000fc, 0x400000fb,
1876};
1877
5d5d3bc3
IZ		 1878static unsigned int intel_mac_v4_pin_configs[10] = {
1879 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1880 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1881 0x400000fc, 0x400000fb,
1882};
1883
5d5d3bc3
IZ		 1884static unsigned int intel_mac_v5_pin_configs[10] = {
1885 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1886 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1887 0x400000fc, 0x400000fb,
0dae0f83
TI		 1888};
1889
8c650087
MCC		 1890static unsigned int ecs202_pin_configs[10] = {
1891 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1892 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1893 0x9037012e, 0x40e000f2,
1894};
76c08828 1895
19039bd0 1896static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1897 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1898 [STAC_D945GTP3] = d945gtp3_pin_configs,
1899 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1900 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1901 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1902 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1903 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1904 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1905 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1906 /* for backward compatibility */
5d5d3bc3
IZ		 1907 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1908 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1909 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1910 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1911 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1912 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1913 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1914 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1915 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1916 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1917 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1918};
1919
f5fcc13c
TI		 1920static const char *stac922x_models[STAC_922X_MODELS] = {
1921 [STAC_D945_REF] = "ref",
1922 [STAC_D945GTP5] = "5stack",
1923 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1924 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1925 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1926 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1927 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1928 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1929 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1930 /* for backward compatibility */
f5fcc13c 1931 [STAC_MACMINI] = "macmini",
3fc24d85 1932 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1933 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1934 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1935 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1936 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1937 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1938 [STAC_922X_DELL_D81] = "dell-d81",
1939 [STAC_922X_DELL_D82] = "dell-d82",
1940 [STAC_922X_DELL_M81] = "dell-m81",
1941 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1942};
1943
1944static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1945 /* SigmaTel reference board */
1946 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1947 "DFI LanParty", STAC_D945_REF),
1948 /* Intel 945G based systems */
1949 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1950 "Intel D945G", STAC_D945GTP3),
1951 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1952 "Intel D945G", STAC_D945GTP3),
1953 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1954 "Intel D945G", STAC_D945GTP3),
1955 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1956 "Intel D945G", STAC_D945GTP3),
1957 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1958 "Intel D945G", STAC_D945GTP3),
1959 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1960 "Intel D945G", STAC_D945GTP3),
1961 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1962 "Intel D945G", STAC_D945GTP3),
1963 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1964 "Intel D945G", STAC_D945GTP3),
1965 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1966 "Intel D945G", STAC_D945GTP3),
1967 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1968 "Intel D945G", STAC_D945GTP3),
1969 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1970 "Intel D945G", STAC_D945GTP3),
1971 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1972 "Intel D945G", STAC_D945GTP3),
1973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1974 "Intel D945G", STAC_D945GTP3),
1975 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1976 "Intel D945G", STAC_D945GTP3),
1977 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1978 "Intel D945G", STAC_D945GTP3),
1979 /* Intel D945G 5-stack systems */
1980 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1981 "Intel D945G", STAC_D945GTP5),
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1983 "Intel D945G", STAC_D945GTP5),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1985 "Intel D945G", STAC_D945GTP5),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1987 "Intel D945G", STAC_D945GTP5),
1988 /* Intel 945P based systems */
1989 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1990 "Intel D945P", STAC_D945GTP3),
1991 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1992 "Intel D945P", STAC_D945GTP3),
1993 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1994 "Intel D945P", STAC_D945GTP3),
1995 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1996 "Intel D945P", STAC_D945GTP3),
1997 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1998 "Intel D945P", STAC_D945GTP3),
1999 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2000 "Intel D945P", STAC_D945GTP5),
2001 /* other systems */
536319af 2002 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2003 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2004 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2005 /* Dell systems */
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2007 "unknown Dell", STAC_922X_DELL_D81),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2009 "unknown Dell", STAC_922X_DELL_D81),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2011 "unknown Dell", STAC_922X_DELL_D81),
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2013 "unknown Dell", STAC_922X_DELL_D82),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2015 "unknown Dell", STAC_922X_DELL_M81),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2017 "unknown Dell", STAC_922X_DELL_D82),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2019 "unknown Dell", STAC_922X_DELL_D81),
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2021 "unknown Dell", STAC_922X_DELL_D81),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2023 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 2024 /* ECS/PC Chips boards */
2025 SND_PCI_QUIRK(0x1019, 0x2144,
2026 "ECS/PC chips", STAC_ECS_202),
2027 SND_PCI_QUIRK(0x1019, 0x2608,
2028 "ECS/PC chips", STAC_ECS_202),
2029 SND_PCI_QUIRK(0x1019, 0x2633,
2030 "ECS/PC chips P17G/1333", STAC_ECS_202),
2031 SND_PCI_QUIRK(0x1019, 0x2811,
2032 "ECS/PC chips", STAC_ECS_202),
2033 SND_PCI_QUIRK(0x1019, 0x2812,
2034 "ECS/PC chips", STAC_ECS_202),
2035 SND_PCI_QUIRK(0x1019, 0x2813,
2036 "ECS/PC chips", STAC_ECS_202),
2037 SND_PCI_QUIRK(0x1019, 0x2814,
2038 "ECS/PC chips", STAC_ECS_202),
2039 SND_PCI_QUIRK(0x1019, 0x2815,
2040 "ECS/PC chips", STAC_ECS_202),
2041 SND_PCI_QUIRK(0x1019, 0x2816,
2042 "ECS/PC chips", STAC_ECS_202),
2043 SND_PCI_QUIRK(0x1019, 0x2817,
2044 "ECS/PC chips", STAC_ECS_202),
2045 SND_PCI_QUIRK(0x1019, 0x2818,
2046 "ECS/PC chips", STAC_ECS_202),
2047 SND_PCI_QUIRK(0x1019, 0x2819,
2048 "ECS/PC chips", STAC_ECS_202),
2049 SND_PCI_QUIRK(0x1019, 0x2820,
2050 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2051 {} /* terminator */
2052};
2053
3cc08dc6 2054static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2055 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2056 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2057 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2058 0x01c42190, 0x40000100,
3cc08dc6
MP		 2059};
2060
93ed1503 2061static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2062 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2063 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2064 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2065 0x40000100, 0x40000100
2066};
2067
93ed1503
TD		 2068static unsigned int d965_5st_pin_configs[14] = {
2069 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2070 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2071 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2072 0x40000100, 0x40000100
2073};
2074
4ff076e5
TD		 2075static unsigned int dell_3st_pin_configs[14] = {
2076 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2077 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2078 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2079 0x40c003fc, 0x40000100
2080};
2081
93ed1503 2082static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 2083 [STAC_D965_REF] = ref927x_pin_configs,
2084 [STAC_D965_3ST] = d965_3st_pin_configs,
2085 [STAC_D965_5ST] = d965_5st_pin_configs,
2086 [STAC_DELL_3ST] = dell_3st_pin_configs,
2087 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2088};
2089
f5fcc13c 2090static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 2091 [STAC_D965_REF] = "ref",
2092 [STAC_D965_3ST] = "3stack",
2093 [STAC_D965_5ST] = "5stack",
2094 [STAC_DELL_3ST] = "dell-3stack",
2095 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2096};
2097
2098static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2099 /* SigmaTel reference board */
2100 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2101 "DFI LanParty", STAC_D965_REF),
81d3dbde 2102 /* Intel 946 based systems */
f5fcc13c
TI		 2103 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2104 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2105 /* 965 based 3 stack systems */
f5fcc13c
TI		 2106 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2107 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2108 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2109 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2110 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2111 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2112 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2113 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2114 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2115 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2116 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2117 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2118 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2119 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2120 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2121 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2122 /* Dell 3 stack systems */
8e9068b1 2123 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2124 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2125 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2126 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2127 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2128 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2129 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2130 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2131 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2132 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2133 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2134 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2135 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2136 /* 965 based 5 stack systems */
f5fcc13c
TI		 2137 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2138 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2139 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2140 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2141 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2142 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2143 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2144 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2145 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2146 {} /* terminator */
2147};
2148
f3302a59
MP		 2149static unsigned int ref9205_pin_configs[12] = {
2150 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2151 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2152 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2153};
2154
dfe495d0
TI		 2155/*
2156 STAC 9205 pin configs for
2157 102801F1
2158 102801F2
2159 102801FC
2160 102801FD
2161 10280204
2162 1028021F
3fa2ef74 2163 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2164*/
2165static unsigned int dell_9205_m42_pin_configs[12] = {
2166 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2167 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2168 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2169};
2170
2171/*
2172 STAC 9205 pin configs for
2173 102801F9
2174 102801FA
2175 102801FE
2176 102801FF (Dell Precision M4300)
2177 10280206
2178 10280200
2179 10280201
2180*/
2181static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2182 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2183 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2184 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2185};
2186
dfe495d0 2187static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2188 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2189 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2190 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2191};
2192
f5fcc13c 2193static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2194 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2195 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2196 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2197 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2198};
2199
f5fcc13c
TI		 2200static const char *stac9205_models[STAC_9205_MODELS] = {
2201 [STAC_9205_REF] = "ref",
dfe495d0 2202 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2203 [STAC_9205_DELL_M43] = "dell-m43",
2204 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2205};
2206
2207static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2208 /* SigmaTel reference board */
2209 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2210 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2211 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2212 "unknown Dell", STAC_9205_DELL_M42),
2213 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2214 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2215 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2216 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2217 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2218 "Dell Precision", STAC_9205_DELL_M43),
2219 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2220 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2221 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2222 "unknown Dell", STAC_9205_DELL_M42),
2223 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2224 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2225 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2226 "Dell Precision", STAC_9205_DELL_M43),
2227 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2228 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2229 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2230 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2231 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2232 "Dell Precision", STAC_9205_DELL_M43),
2233 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2234 "Dell Precision", STAC_9205_DELL_M43),
2235 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2236 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2237 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2238 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2239 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2240 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2241 {} /* terminator */
2242};
2243
11b44bbd
RF		 2244static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2245{
2246 int i;
2247 struct sigmatel_spec *spec = codec->spec;
2248
af9f341a
TI		 2249 kfree(spec->pin_configs);
2250 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2251 GFP_KERNEL);
2252 if (!spec->pin_configs)
2253 return -ENOMEM;
11b44bbd
RF		 2254
2255 for (i = 0; i < spec->num_pins; i++) {
2256 hda_nid_t nid = spec->pin_nids[i];
2257 unsigned int pin_cfg;
2258
2259 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2260 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2261 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2262 nid, pin_cfg);
af9f341a 2263 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF		 2264 }
2265
2266 return 0;
2267}
2268
87d48363
MR		 2269static void stac92xx_set_config_reg(struct hda_codec *codec,
2270 hda_nid_t pin_nid, unsigned int pin_config)
2271{
2272 int i;
2273 snd_hda_codec_write(codec, pin_nid, 0,
2274 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2275 pin_config & 0x000000ff);
2276 snd_hda_codec_write(codec, pin_nid, 0,
2277 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2278 (pin_config & 0x0000ff00) >> 8);
2279 snd_hda_codec_write(codec, pin_nid, 0,
2280 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2281 (pin_config & 0x00ff0000) >> 16);
2282 snd_hda_codec_write(codec, pin_nid, 0,
2283 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2284 pin_config >> 24);
2285 i = snd_hda_codec_read(codec, pin_nid, 0,
2286 AC_VERB_GET_CONFIG_DEFAULT,
2287 0x00);
2288 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2289 pin_nid, i);
2290}
2291
2f2f4251
M		 2292static void stac92xx_set_config_regs(struct hda_codec *codec)
2293{
2294 int i;
2295 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2296
87d48363
MR		 2297 if (!spec->pin_configs)
2298 return;
11b44bbd 2299
87d48363
MR		 2300 for (i = 0; i < spec->num_pins; i++)
2301 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2302 spec->pin_configs[i]);
2f2f4251 2303}
2f2f4251 2304
af9f341a
TI		 2305static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2306{
2307 struct sigmatel_spec *spec = codec->spec;
2308
2309 if (!pins)
2310 return stac92xx_save_bios_config_regs(codec);
2311
2312 kfree(spec->pin_configs);
2313 spec->pin_configs = kmemdup(pins,
2314 spec->num_pins * sizeof(*pins),
2315 GFP_KERNEL);
2316 if (!spec->pin_configs)
2317 return -ENOMEM;
2318
2319 stac92xx_set_config_regs(codec);
2320 return 0;
2321}
2322
2323static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2324 unsigned int cfg)
2325{
2326 struct sigmatel_spec *spec = codec->spec;
2327 int i;
2328
2329 for (i = 0; i < spec->num_pins; i++) {
2330 if (spec->pin_nids[i] == nid) {
2331 spec->pin_configs[i] = cfg;
2332 stac92xx_set_config_reg(codec, nid, cfg);
2333 break;
2334 }
2335 }
2336}
2337
dabbed6f 2338/*
c7d4b2fa 2339 * Analog playback callbacks
dabbed6f 2340 */
c7d4b2fa
M		 2341static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2342 struct hda_codec *codec,
c8b6bf9b 2343 struct snd_pcm_substream *substream)
2f2f4251 2344{
dabbed6f 2345 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2346 if (spec->stream_delay)
2347 msleep(spec->stream_delay);
9a08160b
TI		 2348 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2349 hinfo);
2f2f4251
M		 2350}
2351
2f2f4251
M		 2352static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2353 struct hda_codec *codec,
2354 unsigned int stream_tag,
2355 unsigned int format,
c8b6bf9b 2356 struct snd_pcm_substream *substream)
2f2f4251
M		 2357{
2358 struct sigmatel_spec *spec = codec->spec;
403d1944 2359 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2360}
2361
2362static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2363 struct hda_codec *codec,
c8b6bf9b 2364 struct snd_pcm_substream *substream)
2f2f4251
M		 2365{
2366 struct sigmatel_spec *spec = codec->spec;
2367 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2368}
2369
dabbed6f
M		 2370/*
2371 * Digital playback callbacks
2372 */
2373static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2374 struct hda_codec *codec,
c8b6bf9b 2375 struct snd_pcm_substream *substream)
dabbed6f
M		 2376{
2377 struct sigmatel_spec *spec = codec->spec;
2378 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2379}
2380
2381static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2382 struct hda_codec *codec,
c8b6bf9b 2383 struct snd_pcm_substream *substream)
dabbed6f
M		 2384{
2385 struct sigmatel_spec *spec = codec->spec;
2386 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2387}
2388
6b97eb45
TI		 2389static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2390 struct hda_codec *codec,
2391 unsigned int stream_tag,
2392 unsigned int format,
2393 struct snd_pcm_substream *substream)
2394{
2395 struct sigmatel_spec *spec = codec->spec;
2396 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2397 stream_tag, format, substream);
2398}
2399
dabbed6f 2400
2f2f4251
M		 2401/*
2402 * Analog capture callbacks
2403 */
2404static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2405 struct hda_codec *codec,
2406 unsigned int stream_tag,
2407 unsigned int format,
c8b6bf9b 2408 struct snd_pcm_substream *substream)
2f2f4251
M		 2409{
2410 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2411 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2412
8daaaa97
MR		 2413 if (spec->powerdown_adcs) {
2414 msleep(40);
8c2f767b 2415 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2416 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2417 }
2418 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2419 return 0;
2420}
2421
2422static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2423 struct hda_codec *codec,
c8b6bf9b 2424 struct snd_pcm_substream *substream)
2f2f4251
M		 2425{
2426 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2427 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2428
8daaaa97
MR		 2429 snd_hda_codec_cleanup_stream(codec, nid);
2430 if (spec->powerdown_adcs)
8c2f767b 2431 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2432 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2433 return 0;
2434}
2435
dabbed6f
M		 2436static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2437 .substreams = 1,
2438 .channels_min = 2,
2439 .channels_max = 2,
2440 /* NID is set in stac92xx_build_pcms */
2441 .ops = {
2442 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2443 .close = stac92xx_dig_playback_pcm_close,
2444 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2445 },
2446};
2447
2448static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2449 .substreams = 1,
2450 .channels_min = 2,
2451 .channels_max = 2,
2452 /* NID is set in stac92xx_build_pcms */
2453};
2454
2f2f4251
M		 2455static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2456 .substreams = 1,
2457 .channels_min = 2,
c7d4b2fa 2458 .channels_max = 8,
2f2f4251
M		 2459 .nid = 0x02, /* NID to query formats and rates */
2460 .ops = {
2461 .open = stac92xx_playback_pcm_open,
2462 .prepare = stac92xx_playback_pcm_prepare,
2463 .cleanup = stac92xx_playback_pcm_cleanup
2464 },
2465};
2466
3cc08dc6
MP		 2467static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2468 .substreams = 1,
2469 .channels_min = 2,
2470 .channels_max = 2,
2471 .nid = 0x06, /* NID to query formats and rates */
2472 .ops = {
2473 .open = stac92xx_playback_pcm_open,
2474 .prepare = stac92xx_playback_pcm_prepare,
2475 .cleanup = stac92xx_playback_pcm_cleanup
2476 },
2477};
2478
2f2f4251 2479static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2480 .channels_min = 2,
2481 .channels_max = 2,
9e05b7a3 2482 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2483 .ops = {
2484 .prepare = stac92xx_capture_pcm_prepare,
2485 .cleanup = stac92xx_capture_pcm_cleanup
2486 },
2487};
2488
2489static int stac92xx_build_pcms(struct hda_codec *codec)
2490{
2491 struct sigmatel_spec *spec = codec->spec;
2492 struct hda_pcm *info = spec->pcm_rec;
2493
2494 codec->num_pcms = 1;
2495 codec->pcm_info = info;
2496
c7d4b2fa 2497 info->name = "STAC92xx Analog";
2f2f4251 2498 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2499 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2500 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2501 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2502
2503 if (spec->alt_switch) {
2504 codec->num_pcms++;
2505 info++;
2506 info->name = "STAC92xx Analog Alt";
2507 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2508 }
2f2f4251 2509
dabbed6f
M		 2510 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2511 codec->num_pcms++;
2512 info++;
2513 info->name = "STAC92xx Digital";
7ba72ba1 2514 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2515 if (spec->multiout.dig_out_nid) {
2516 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2517 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2518 }
2519 if (spec->dig_in_nid) {
2520 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2521 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2522 }
2523 }
2524
2f2f4251
M		 2525 return 0;
2526}
2527
c960a03b
TI		 2528static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2529{
2530 unsigned int pincap = snd_hda_param_read(codec, nid,
2531 AC_PAR_PIN_CAP);
2532 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2533 if (pincap & AC_PINCAP_VREF_100)
2534 return AC_PINCTL_VREF_100;
2535 if (pincap & AC_PINCAP_VREF_80)
2536 return AC_PINCTL_VREF_80;
2537 if (pincap & AC_PINCAP_VREF_50)
2538 return AC_PINCTL_VREF_50;
2539 if (pincap & AC_PINCAP_VREF_GRD)
2540 return AC_PINCTL_VREF_GRD;
2541 return 0;
2542}
2543
403d1944
MP		 2544static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2545
2546{
82beb8fd
TI		 2547 snd_hda_codec_write_cache(codec, nid, 0,
2548 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2549}
2550
7c2ba97b
MR		 2551#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2552
2553static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2554 struct snd_ctl_elem_value *ucontrol)
2555{
2556 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2557 struct sigmatel_spec *spec = codec->spec;
2558
d7a89436 2559 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2560 return 0;
2561}
2562
c6e4c666
TI		 2563static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2564 unsigned char type);
2565
7c2ba97b
MR		 2566static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2567 struct snd_ctl_elem_value *ucontrol)
2568{
2569 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2570 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2571 int nid = kcontrol->private_value;
2572
2573 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2574
2575 /* check to be sure that the ports are upto date with
2576 * switch changes
2577 */
c6e4c666 2578 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR		 2579
2580 return 1;
2581}
2582
a5ce8890 2583#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2584
2585static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2586{
2587 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2588 struct sigmatel_spec *spec = codec->spec;
2589 int io_idx = kcontrol-> private_value & 0xff;
2590
2591 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2592 return 0;
2593}
2594
2595static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2596{
2597 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2598 struct sigmatel_spec *spec = codec->spec;
2599 hda_nid_t nid = kcontrol->private_value >> 8;
2600 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2601 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2602
2603 spec->io_switch[io_idx] = val;
2604
2605 if (val)
2606 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2607 else {
2608 unsigned int pinctl = AC_PINCTL_IN_EN;
2609 if (io_idx) /* set VREF for mic */
2610 pinctl |= stac92xx_get_vref(codec, nid);
2611 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2612 }
40c1d308
JZ		 2613
2614 /* check the auto-mute again: we need to mute/unmute the speaker
2615 * appropriately according to the pin direction
2616 */
2617 if (spec->hp_detect)
c6e4c666 2618 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2619
403d1944
MP		 2620 return 1;
2621}
2622
0fb87bb4
ML		 2623#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2624
2625static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2626 struct snd_ctl_elem_value *ucontrol)
2627{
2628 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2629 struct sigmatel_spec *spec = codec->spec;
2630
2631 ucontrol->value.integer.value[0] = spec->clfe_swap;
2632 return 0;
2633}
2634
2635static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2636 struct snd_ctl_elem_value *ucontrol)
2637{
2638 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2639 struct sigmatel_spec *spec = codec->spec;
2640 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2641 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2642
68ea7b2f 2643 if (spec->clfe_swap == val)
0fb87bb4
ML		 2644 return 0;
2645
68ea7b2f 2646 spec->clfe_swap = val;
0fb87bb4
ML		 2647
2648 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2649 spec->clfe_swap ? 0x4 : 0x0);
2650
2651 return 1;
2652}
2653
7c2ba97b
MR		 2654#define STAC_CODEC_HP_SWITCH(xname) \
2655 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2656 .name = xname, \
2657 .index = 0, \
2658 .info = stac92xx_hp_switch_info, \
2659 .get = stac92xx_hp_switch_get, \
2660 .put = stac92xx_hp_switch_put, \
2661 }
2662
403d1944
MP		 2663#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2664 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2665 .name = xname, \
2666 .index = 0, \
2667 .info = stac92xx_io_switch_info, \
2668 .get = stac92xx_io_switch_get, \
2669 .put = stac92xx_io_switch_put, \
2670 .private_value = xpval, \
2671 }
2672
0fb87bb4
ML		 2673#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2674 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2675 .name = xname, \
2676 .index = 0, \
2677 .info = stac92xx_clfe_switch_info, \
2678 .get = stac92xx_clfe_switch_get, \
2679 .put = stac92xx_clfe_switch_put, \
2680 .private_value = xpval, \
2681 }
403d1944 2682
c7d4b2fa
M		 2683enum {
2684 STAC_CTL_WIDGET_VOL,
2685 STAC_CTL_WIDGET_MUTE,
09a99959 2686 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2687 STAC_CTL_WIDGET_AMP_MUX,
2688 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2689 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2690 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2691 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2692};
2693
c8b6bf9b 2694static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2695 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2696 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2697 STAC_MONO_MUX,
89385035
MR		 2698 STAC_AMP_MUX,
2699 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2700 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2701 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2702 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2703};
2704
2705/* add dynamic controls */
4d4e9bb3
TI		 2706static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2707 struct snd_kcontrol_new *ktemp,
2708 int idx, const char *name,
2709 unsigned long val)
c7d4b2fa 2710{
c8b6bf9b 2711 struct snd_kcontrol_new *knew;
c7d4b2fa 2712
603c4019
TI		 2713 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2714 knew = snd_array_new(&spec->kctls);
2715 if (!knew)
2716 return -ENOMEM;
4d4e9bb3 2717 *knew = *ktemp;
4682eee0 2718 knew->index = idx;
82fe0c58 2719 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2720 if (!knew->name)
c7d4b2fa
M		 2721 return -ENOMEM;
2722 knew->private_value = val;
c7d4b2fa
M		 2723 return 0;
2724}
2725
4d4e9bb3
TI		 2726static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2727 int type, int idx, const char *name,
2728 unsigned long val)
2729{
2730 return stac92xx_add_control_temp(spec,
2731 &stac92xx_control_templates[type],
2732 idx, name, val);
2733}
2734
4682eee0
MR		 2735
2736/* add dynamic controls */
4d4e9bb3
TI		 2737static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2738 const char *name, unsigned long val)
4682eee0
MR		 2739{
2740 return stac92xx_add_control_idx(spec, type, 0, name, val);
2741}
2742
403d1944
MP		 2743/* flag inputs as additional dynamic lineouts */
2744static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2745{
2746 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2747 unsigned int wcaps, wtype;
2748 int i, num_dacs = 0;
2749
2750 /* use the wcaps cache to count all DACs available for line-outs */
2751 for (i = 0; i < codec->num_nodes; i++) {
2752 wcaps = codec->wcaps[i];
2753 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2754
7b043899
SL		 2755 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2756 num_dacs++;
2757 }
403d1944 2758
7b043899
SL		 2759 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2760
403d1944
MP		 2761 switch (cfg->line_outs) {
2762 case 3:
2763 /* add line-in as side */
7b043899 2764 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2765 cfg->line_out_pins[cfg->line_outs] =
2766 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2767 spec->line_switch = 1;
2768 cfg->line_outs++;
2769 }
2770 break;
2771 case 2:
2772 /* add line-in as clfe and mic as side */
7b043899 2773 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2774 cfg->line_out_pins[cfg->line_outs] =
2775 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2776 spec->line_switch = 1;
2777 cfg->line_outs++;
2778 }
7b043899 2779 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2780 cfg->line_out_pins[cfg->line_outs] =
2781 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2782 spec->mic_switch = 1;
2783 cfg->line_outs++;
2784 }
2785 break;
2786 case 1:
2787 /* add line-in as surr and mic as clfe */
7b043899 2788 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2789 cfg->line_out_pins[cfg->line_outs] =
2790 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2791 spec->line_switch = 1;
2792 cfg->line_outs++;
2793 }
7b043899 2794 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2795 cfg->line_out_pins[cfg->line_outs] =
2796 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2797 spec->mic_switch = 1;
2798 cfg->line_outs++;
2799 }
2800 break;
2801 }
2802
2803 return 0;
2804}
2805
7b043899
SL		 2806
2807static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2808{
2809 int i;
2810
2811 for (i = 0; i < spec->multiout.num_dacs; i++) {
2812 if (spec->multiout.dac_nids[i] == nid)
2813 return 1;
2814 }
2815
2816 return 0;
2817}
2818
3cc08dc6 2819/*
7b043899
SL		 2820 * Fill in the dac_nids table from the parsed pin configuration
2821 * This function only works when every pin in line_out_pins[]
2822 * contains atleast one DAC in its connection list. Some 92xx
2823 * codecs are not connected directly to a DAC, such as the 9200
2824 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2825 */
19039bd0 2826static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2827 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2828{
2829 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2830 int i, j, conn_len = 0;
2831 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2832 unsigned int wcaps, wtype;
2833
c7d4b2fa
M		 2834 for (i = 0; i < cfg->line_outs; i++) {
2835 nid = cfg->line_out_pins[i];
7b043899
SL		 2836 conn_len = snd_hda_get_connections(codec, nid, conn,
2837 HDA_MAX_CONNECTIONS);
2838 for (j = 0; j < conn_len; j++) {
2839 wcaps = snd_hda_param_read(codec, conn[j],
2840 AC_PAR_AUDIO_WIDGET_CAP);
2841 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2842 if (wtype != AC_WID_AUD_OUT ||
2843 (wcaps & AC_WCAP_DIGITAL))
2844 continue;
2845 /* conn[j] is a DAC routed to this line-out */
2846 if (!is_in_dac_nids(spec, conn[j]))
2847 break;
2848 }
2849
2850 if (j == conn_len) {
df802952
TI		 2851 if (spec->multiout.num_dacs > 0) {
2852 /* we have already working output pins,
2853 * so let's drop the broken ones again
2854 */
2855 cfg->line_outs = spec->multiout.num_dacs;
2856 break;
2857 }
7b043899
SL		 2858 /* error out, no available DAC found */
2859 snd_printk(KERN_ERR
2860 "%s: No available DAC for pin 0x%x\n",
2861 __func__, nid);
2862 return -ENODEV;
2863 }
2864
2865 spec->multiout.dac_nids[i] = conn[j];
2866 spec->multiout.num_dacs++;
2867 if (conn_len > 1) {
2868 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2869 snd_hda_codec_write_cache(codec, nid, 0,
2870 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2871
7b043899
SL		 2872 }
2873 }
c7d4b2fa 2874
7b043899
SL		 2875 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2876 spec->multiout.num_dacs,
2877 spec->multiout.dac_nids[0],
2878 spec->multiout.dac_nids[1],
2879 spec->multiout.dac_nids[2],
2880 spec->multiout.dac_nids[3],
2881 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2882 return 0;
2883}
2884
eb06ed8f
TI		 2885/* create volume control/switch for the given prefx type */
2886static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2887{
2888 char name[32];
2889 int err;
2890
2891 sprintf(name, "%s Playback Volume", pfx);
2892 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2893 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2894 if (err < 0)
2895 return err;
2896 sprintf(name, "%s Playback Switch", pfx);
2897 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2898 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2899 if (err < 0)
2900 return err;
2901 return 0;
2902}
2903
ae0afd81
MR		 2904static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2905{
2906 if (!spec->multiout.hp_nid)
2907 spec->multiout.hp_nid = nid;
2908 else if (spec->multiout.num_dacs > 4) {
2909 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2910 return 1;
2911 } else {
2912 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2913 spec->multiout.num_dacs++;
2914 }
2915 return 0;
2916}
2917
2918static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2919{
2920 if (is_in_dac_nids(spec, nid))
2921 return 1;
2922 if (spec->multiout.hp_nid == nid)
2923 return 1;
2924 return 0;
2925}
2926
c7d4b2fa 2927/* add playback controls from the parsed DAC table */
0fb87bb4 2928static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2929 const struct auto_pin_cfg *cfg)
c7d4b2fa 2930{
19039bd0
TI		 2931 static const char *chname[4] = {
2932 "Front", "Surround", NULL /*CLFE*/, "Side"
2933 };
d21995e3 2934 hda_nid_t nid = 0;
c7d4b2fa
M		 2935 int i, err;
2936
0fb87bb4 2937 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2938 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2939
2940
40ac8c4f 2941 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2942 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2943 continue;
2944
2945 nid = spec->multiout.dac_nids[i];
2946
2947 if (i == 2) {
2948 /* Center/LFE */
eb06ed8f
TI		 2949 err = create_controls(spec, "Center", nid, 1);
2950 if (err < 0)
c7d4b2fa 2951 return err;
eb06ed8f
TI		 2952 err = create_controls(spec, "LFE", nid, 2);
2953 if (err < 0)
c7d4b2fa 2954 return err;
0fb87bb4
ML		 2955
2956 wid_caps = get_wcaps(codec, nid);
2957
2958 if (wid_caps & AC_WCAP_LR_SWAP) {
2959 err = stac92xx_add_control(spec,
2960 STAC_CTL_WIDGET_CLFE_SWITCH,
2961 "Swap Center/LFE Playback Switch", nid);
2962
2963 if (err < 0)
2964 return err;
2965 }
2966
c7d4b2fa 2967 } else {
eb06ed8f
TI		 2968 err = create_controls(spec, chname[i], nid, 3);
2969 if (err < 0)
c7d4b2fa
M		 2970 return err;
2971 }
2972 }
2973
fedb7569
MR		 2974 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
2975 cfg->hp_outs && !spec->multiout.hp_nid)
2976 spec->multiout.hp_nid = nid;
2977
a9cb5c90 2978 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 2979 err = stac92xx_add_control(spec,
2980 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 2981 "Headphone as Line Out Switch",
2982 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 2983 if (err < 0)
2984 return err;
2985 }
2986
b5895dc8
MR		 2987 if (spec->line_switch) {
2988 nid = cfg->input_pins[AUTO_PIN_LINE];
2989 pincap = snd_hda_param_read(codec, nid,
2990 AC_PAR_PIN_CAP);
2991 if (pincap & AC_PINCAP_OUT) {
2992 err = stac92xx_add_control(spec,
2993 STAC_CTL_WIDGET_IO_SWITCH,
2994 "Line In as Output Switch", nid << 8);
2995 if (err < 0)
2996 return err;
2997 }
2998 }
403d1944 2999
b5895dc8 3000 if (spec->mic_switch) {
cace16f1 3001 unsigned int def_conf;
ae0afd81
MR		 3002 unsigned int mic_pin = AUTO_PIN_MIC;
3003again:
3004 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 3005 def_conf = snd_hda_codec_read(codec, nid, 0,
3006 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 3007 /* some laptops have an internal analog microphone
3008 * which can't be used as a output */
3009 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
3010 pincap = snd_hda_param_read(codec, nid,
3011 AC_PAR_PIN_CAP);
3012 if (pincap & AC_PINCAP_OUT) {
3013 err = stac92xx_add_control(spec,
3014 STAC_CTL_WIDGET_IO_SWITCH,
3015 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 3016 nid = snd_hda_codec_read(codec, nid, 0,
3017 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3018 if (!check_in_dac_nids(spec, nid))
3019 add_spec_dacs(spec, nid);
cace16f1
MR		 3020 if (err < 0)
3021 return err;
3022 }
ae0afd81
MR		 3023 } else if (mic_pin == AUTO_PIN_MIC) {
3024 mic_pin = AUTO_PIN_FRONT_MIC;
3025 goto again;
b5895dc8
MR		 3026 }
3027 }
403d1944 3028
c7d4b2fa
M		 3029 return 0;
3030}
3031
eb06ed8f
TI		 3032/* add playback controls for Speaker and HP outputs */
3033static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3034 struct auto_pin_cfg *cfg)
3035{
3036 struct sigmatel_spec *spec = codec->spec;
3037 hda_nid_t nid;
3038 int i, old_num_dacs, err;
3039
3040 old_num_dacs = spec->multiout.num_dacs;
3041 for (i = 0; i < cfg->hp_outs; i++) {
3042 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3043 if (wid_caps & AC_WCAP_UNSOL_CAP)
3044 spec->hp_detect = 1;
3045 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
3046 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3047 if (check_in_dac_nids(spec, nid))
3048 nid = 0;
3049 if (! nid)
c7d4b2fa 3050 continue;
eb06ed8f
TI		 3051 add_spec_dacs(spec, nid);
3052 }
3053 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 3054 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 3055 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3056 if (check_in_dac_nids(spec, nid))
3057 nid = 0;
eb06ed8f
TI		 3058 if (! nid)
3059 continue;
3060 add_spec_dacs(spec, nid);
c7d4b2fa 3061 }
1b290a51
MR		 3062 for (i = 0; i < cfg->line_outs; i++) {
3063 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
3064 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3065 if (check_in_dac_nids(spec, nid))
3066 nid = 0;
3067 if (! nid)
3068 continue;
3069 add_spec_dacs(spec, nid);
3070 }
eb06ed8f
TI		 3071 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
3072 static const char *pfxs[] = {
3073 "Speaker", "External Speaker", "Speaker2",
3074 };
3075 err = create_controls(spec, pfxs[i - old_num_dacs],
3076 spec->multiout.dac_nids[i], 3);
3077 if (err < 0)
3078 return err;
3079 }
3080 if (spec->multiout.hp_nid) {
2626a263
TI		 3081 err = create_controls(spec, "Headphone",
3082 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 3083 if (err < 0)
3084 return err;
3085 }
c7d4b2fa
M		 3086
3087 return 0;
3088}
3089
b22b4821 3090/* labels for mono mux outputs */
d0513fc6
MR		 3091static const char *stac92xx_mono_labels[4] = {
3092 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3093};
3094
3095/* create mono mux for mono out on capable codecs */
3096static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3097{
3098 struct sigmatel_spec *spec = codec->spec;
3099 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3100 int i, num_cons;
3101 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3102
3103 num_cons = snd_hda_get_connections(codec,
3104 spec->mono_nid,
3105 con_lst,
3106 HDA_MAX_NUM_INPUTS);
3107 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3108 return -EINVAL;
3109
3110 for (i = 0; i < num_cons; i++) {
3111 mono_mux->items[mono_mux->num_items].label =
3112 stac92xx_mono_labels[i];
3113 mono_mux->items[mono_mux->num_items].index = i;
3114 mono_mux->num_items++;
3115 }
09a99959
MR		 3116
3117 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3118 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3119}
3120
89385035
MR		 3121/* labels for amp mux outputs */
3122static const char *stac92xx_amp_labels[3] = {
4b33c767 3123 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3124};
3125
3126/* create amp out controls mux on capable codecs */
3127static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3128{
3129 struct sigmatel_spec *spec = codec->spec;
3130 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3131 int i, err;
3132
2a9c7816 3133 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3134 amp_mux->items[amp_mux->num_items].label =
3135 stac92xx_amp_labels[i];
3136 amp_mux->items[amp_mux->num_items].index = i;
3137 amp_mux->num_items++;
3138 }
3139
2a9c7816
MR		 3140 if (spec->num_amps > 1) {
3141 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3142 "Amp Selector Capture Switch", 0);
3143 if (err < 0)
3144 return err;
3145 }
89385035
MR		 3146 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3147 "Amp Capture Volume",
3148 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3149}
3150
3151
1cd2224c
MR		 3152/* create PC beep volume controls */
3153static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3154 hda_nid_t nid)
3155{
3156 struct sigmatel_spec *spec = codec->spec;
3157 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3158 int err;
3159
3160 /* check for mute support for the the amp */
3161 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3162 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3163 "PC Beep Playback Switch",
3164 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3165 if (err < 0)
3166 return err;
3167 }
3168
3169 /* check to see if there is volume support for the amp */
3170 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3171 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3172 "PC Beep Playback Volume",
3173 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3174 if (err < 0)
3175 return err;
3176 }
3177 return 0;
3178}
3179
4d4e9bb3
TI		 3180#ifdef CONFIG_SND_HDA_INPUT_BEEP
3181#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3182
3183static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3184 struct snd_ctl_elem_value *ucontrol)
3185{
3186 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3187 ucontrol->value.integer.value[0] = codec->beep->enabled;
3188 return 0;
3189}
3190
3191static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3192 struct snd_ctl_elem_value *ucontrol)
3193{
3194 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3195 int enabled = !!ucontrol->value.integer.value[0];
3196 if (codec->beep->enabled != enabled) {
3197 codec->beep->enabled = enabled;
3198 return 1;
3199 }
3200 return 0;
3201}
3202
3203static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3204 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3205 .info = stac92xx_dig_beep_switch_info,
3206 .get = stac92xx_dig_beep_switch_get,
3207 .put = stac92xx_dig_beep_switch_put,
3208};
3209
3210static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3211{
3212 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3213 0, "PC Beep Playback Switch", 0);
3214}
3215#endif
3216
4682eee0
MR		 3217static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3218{
3219 struct sigmatel_spec *spec = codec->spec;
3220 int wcaps, nid, i, err = 0;
3221
3222 for (i = 0; i < spec->num_muxes; i++) {
3223 nid = spec->mux_nids[i];
3224 wcaps = get_wcaps(codec, nid);
3225
3226 if (wcaps & AC_WCAP_OUT_AMP) {
3227 err = stac92xx_add_control_idx(spec,
3228 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3229 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3230 if (err < 0)
3231 return err;
3232 }
3233 }
3234 return 0;
3235};
3236
d9737751 3237static const char *stac92xx_spdif_labels[3] = {
65973632 3238 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3239};
3240
3241static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3242{
3243 struct sigmatel_spec *spec = codec->spec;
3244 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3245 const char **labels = spec->spdif_labels;
d9737751 3246 int i, num_cons;
65973632 3247 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3248
3249 num_cons = snd_hda_get_connections(codec,
3250 spec->smux_nids[0],
3251 con_lst,
3252 HDA_MAX_NUM_INPUTS);
65973632 3253 if (!num_cons)
d9737751
MR		 3254 return -EINVAL;
3255
65973632
MR		 3256 if (!labels)
3257 labels = stac92xx_spdif_labels;
3258
d9737751 3259 for (i = 0; i < num_cons; i++) {
65973632 3260 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3261 spdif_mux->items[spdif_mux->num_items].index = i;
3262 spdif_mux->num_items++;
3263 }
3264
3265 return 0;
3266}
3267
8b65727b 3268/* labels for dmic mux inputs */
ddc2cec4 3269static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3270 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3271 "Digital Mic 3", "Digital Mic 4"
3272};
3273
3274/* create playback/capture controls for input pins on dmic capable codecs */
3275static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3276 const struct auto_pin_cfg *cfg)
3277{
3278 struct sigmatel_spec *spec = codec->spec;
3279 struct hda_input_mux *dimux = &spec->private_dimux;
3280 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3281 int err, i, j;
3282 char name[32];
8b65727b
MP		 3283
3284 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3285 dimux->items[dimux->num_items].index = 0;
3286 dimux->num_items++;
3287
3288 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3289 hda_nid_t nid;
8b65727b
MP		 3290 int index;
3291 int num_cons;
0678accd 3292 unsigned int wcaps;
8b65727b
MP		 3293 unsigned int def_conf;
3294
3295 def_conf = snd_hda_codec_read(codec,
3296 spec->dmic_nids[i],
3297 0,
3298 AC_VERB_GET_CONFIG_DEFAULT,
3299 0);
3300 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3301 continue;
3302
0678accd 3303 nid = spec->dmic_nids[i];
8b65727b 3304 num_cons = snd_hda_get_connections(codec,
e1f0d669 3305 spec->dmux_nids[0],
8b65727b
MP		 3306 con_lst,
3307 HDA_MAX_NUM_INPUTS);
3308 for (j = 0; j < num_cons; j++)
0678accd 3309 if (con_lst[j] == nid) {
8b65727b
MP		 3310 index = j;
3311 goto found;
3312 }
3313 continue;
3314found:
d0513fc6
MR		 3315 wcaps = get_wcaps(codec, nid) &
3316 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3317
d0513fc6 3318 if (wcaps) {
0678accd
MR		 3319 sprintf(name, "%s Capture Volume",
3320 stac92xx_dmic_labels[dimux->num_items]);
3321
3322 err = stac92xx_add_control(spec,
3323 STAC_CTL_WIDGET_VOL,
3324 name,
d0513fc6
MR		 3325 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3326 (wcaps & AC_WCAP_OUT_AMP) ?
3327 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3328 if (err < 0)
3329 return err;
3330 }
3331
8b65727b
MP		 3332 dimux->items[dimux->num_items].label =
3333 stac92xx_dmic_labels[dimux->num_items];
3334 dimux->items[dimux->num_items].index = index;
3335 dimux->num_items++;
3336 }
3337
3338 return 0;
3339}
3340
c7d4b2fa
M		 3341/* create playback/capture controls for input pins */
3342static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3343{
3344 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3345 struct hda_input_mux *imux = &spec->private_imux;
3346 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3347 int i, j, k;
3348
3349 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3350 int index;
3351
3352 if (!cfg->input_pins[i])
3353 continue;
3354 index = -1;
3355 for (j = 0; j < spec->num_muxes; j++) {
3356 int num_cons;
3357 num_cons = snd_hda_get_connections(codec,
3358 spec->mux_nids[j],
3359 con_lst,
3360 HDA_MAX_NUM_INPUTS);
3361 for (k = 0; k < num_cons; k++)
3362 if (con_lst[k] == cfg->input_pins[i]) {
3363 index = k;
3364 goto found;
3365 }
c7d4b2fa 3366 }
314634bc
TI		 3367 continue;
3368 found:
3369 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3370 imux->items[imux->num_items].index = index;
3371 imux->num_items++;
c7d4b2fa
M		 3372 }
3373
7b043899 3374 if (imux->num_items) {
62fe78e9
SR		 3375 /*
3376 * Set the current input for the muxes.
3377 * The STAC9221 has two input muxes with identical source
3378 * NID lists. Hopefully this won't get confused.
3379 */
3380 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3381 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3382 AC_VERB_SET_CONNECT_SEL,
3383 imux->items[0].index);
62fe78e9
SR		 3384 }
3385 }
3386
c7d4b2fa
M		 3387 return 0;
3388}
3389
c7d4b2fa
M		 3390static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3391{
3392 struct sigmatel_spec *spec = codec->spec;
3393 int i;
3394
3395 for (i = 0; i < spec->autocfg.line_outs; i++) {
3396 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3397 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3398 }
3399}
3400
3401static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3402{
3403 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3404 int i;
c7d4b2fa 3405
eb06ed8f
TI		 3406 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3407 hda_nid_t pin;
3408 pin = spec->autocfg.hp_pins[i];
3409 if (pin) /* connect to front */
3410 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3411 }
3412 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3413 hda_nid_t pin;
3414 pin = spec->autocfg.speaker_pins[i];
3415 if (pin) /* connect to front */
3416 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3417 }
c7d4b2fa
M		 3418}
3419
3cc08dc6 3420static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3421{
3422 struct sigmatel_spec *spec = codec->spec;
3423 int err;
bcecd9bd 3424 int hp_speaker_swap = 0;
c7d4b2fa 3425
8b65727b
MP		 3426 if ((err = snd_hda_parse_pin_def_config(codec,
3427 &spec->autocfg,
3428 spec->dmic_nids)) < 0)
c7d4b2fa 3429 return err;
82bc955f 3430 if (! spec->autocfg.line_outs)
869264c4 3431 return 0; /* can't find valid pin config */
19039bd0 3432
bcecd9bd
JZ		 3433 /* If we have no real line-out pin and multiple hp-outs, HPs should
3434 * be set up as multi-channel outputs.
3435 */
3436 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3437 spec->autocfg.hp_outs > 1) {
3438 /* Copy hp_outs to line_outs, backup line_outs in
3439 * speaker_outs so that the following routines can handle
3440 * HP pins as primary outputs.
3441 */
3442 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3443 sizeof(spec->autocfg.line_out_pins));
3444 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3445 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3446 sizeof(spec->autocfg.hp_pins));
3447 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3448 hp_speaker_swap = 1;
3449 }
09a99959 3450 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3451 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3452 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3453 u32 caps = query_amp_caps(codec,
3454 spec->autocfg.mono_out_pin, dir);
3455 hda_nid_t conn_list[1];
3456
3457 /* get the mixer node and then the mono mux if it exists */
3458 if (snd_hda_get_connections(codec,
3459 spec->autocfg.mono_out_pin, conn_list, 1) &&
3460 snd_hda_get_connections(codec, conn_list[0],
3461 conn_list, 1)) {
3462
3463 int wcaps = get_wcaps(codec, conn_list[0]);
3464 int wid_type = (wcaps & AC_WCAP_TYPE)
3465 >> AC_WCAP_TYPE_SHIFT;
3466 /* LR swap check, some stac925x have a mux that
3467 * changes the DACs output path instead of the
3468 * mono-mux path.
3469 */
3470 if (wid_type == AC_WID_AUD_SEL &&
3471 !(wcaps & AC_WCAP_LR_SWAP))
3472 spec->mono_nid = conn_list[0];
3473 }
d0513fc6
MR		 3474 if (dir) {
3475 hda_nid_t nid = spec->autocfg.mono_out_pin;
3476
3477 /* most mono outs have a least a mute/unmute switch */
3478 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3479 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3480 "Mono Playback Switch",
3481 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3482 if (err < 0)
3483 return err;
d0513fc6
MR		 3484 /* check for volume support for the amp */
3485 if ((caps & AC_AMPCAP_NUM_STEPS)
3486 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3487 err = stac92xx_add_control(spec,
3488 STAC_CTL_WIDGET_VOL,
3489 "Mono Playback Volume",
3490 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3491 if (err < 0)
3492 return err;
3493 }
09a99959
MR		 3494 }
3495
3496 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3497 AC_PINCTL_OUT_EN);
3498 }
bcecd9bd 3499
403d1944
MP		 3500 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3501 return err;
19039bd0
TI		 3502 if (spec->multiout.num_dacs == 0)
3503 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3504 return err;
c7d4b2fa 3505
0fb87bb4
ML		 3506 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3507
3508 if (err < 0)
3509 return err;
3510
1cd2224c
MR		 3511 /* setup analog beep controls */
3512 if (spec->anabeep_nid > 0) {
3513 err = stac92xx_auto_create_beep_ctls(codec,
3514 spec->anabeep_nid);
3515 if (err < 0)
3516 return err;
3517 }
3518
3519 /* setup digital beep controls and input device */
3520#ifdef CONFIG_SND_HDA_INPUT_BEEP
3521 if (spec->digbeep_nid > 0) {
3522 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3523 unsigned int caps;
1cd2224c
MR		 3524
3525 err = stac92xx_auto_create_beep_ctls(codec, nid);
3526 if (err < 0)
3527 return err;
3528 err = snd_hda_attach_beep_device(codec, nid);
3529 if (err < 0)
3530 return err;
4d4e9bb3
TI		 3531 /* if no beep switch is available, make its own one */
3532 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3533 if (codec->beep &&
3534 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3535 err = stac92xx_beep_switch_ctl(codec);
3536 if (err < 0)
3537 return err;
3538 }
1cd2224c
MR		 3539 }
3540#endif
3541
bcecd9bd
JZ		 3542 if (hp_speaker_swap == 1) {
3543 /* Restore the hp_outs and line_outs */
3544 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3545 sizeof(spec->autocfg.line_out_pins));
3546 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3547 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3548 sizeof(spec->autocfg.speaker_pins));
3549 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3550 memset(spec->autocfg.speaker_pins, 0,
3551 sizeof(spec->autocfg.speaker_pins));
3552 spec->autocfg.speaker_outs = 0;
3553 }
3554
0fb87bb4
ML		 3555 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3556
3557 if (err < 0)
3558 return err;
3559
3560 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3561
3562 if (err < 0)
c7d4b2fa
M		 3563 return err;
3564
b22b4821
MR		 3565 if (spec->mono_nid > 0) {
3566 err = stac92xx_auto_create_mono_output_ctls(codec);
3567 if (err < 0)
3568 return err;
3569 }
2a9c7816 3570 if (spec->num_amps > 0) {
89385035
MR		 3571 err = stac92xx_auto_create_amp_output_ctls(codec);
3572 if (err < 0)
3573 return err;
3574 }
2a9c7816 3575 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3576 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3577 &spec->autocfg)) < 0)
3578 return err;
4682eee0
MR		 3579 if (spec->num_muxes > 0) {
3580 err = stac92xx_auto_create_mux_input_ctls(codec);
3581 if (err < 0)
3582 return err;
3583 }
d9737751
MR		 3584 if (spec->num_smuxes > 0) {
3585 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3586 if (err < 0)
3587 return err;
3588 }
8b65727b 3589
c7d4b2fa 3590 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3591 if (spec->multiout.max_channels > 2)
c7d4b2fa 3592 spec->surr_switch = 1;
c7d4b2fa 3593
82bc955f 3594 if (spec->autocfg.dig_out_pin)
3cc08dc6 3595 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3596 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3597 spec->dig_in_nid = dig_in;
c7d4b2fa 3598
603c4019
TI		 3599 if (spec->kctls.list)
3600 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3601
3602 spec->input_mux = &spec->private_imux;
2a9c7816 3603 spec->dinput_mux = &spec->private_dimux;
d9737751 3604 spec->sinput_mux = &spec->private_smux;
b22b4821 3605 spec->mono_mux = &spec->private_mono_mux;
89385035 3606 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3607 return 1;
3608}
3609
82bc955f
TI		 3610/* add playback controls for HP output */
3611static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3612 struct auto_pin_cfg *cfg)
3613{
3614 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3615 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3616 unsigned int wid_caps;
3617
3618 if (! pin)
3619 return 0;
3620
3621 wid_caps = get_wcaps(codec, pin);
505cb341 3622 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3623 spec->hp_detect = 1;
82bc955f
TI		 3624
3625 return 0;
3626}
3627
160ea0dc
RF		 3628/* add playback controls for LFE output */
3629static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3630 struct auto_pin_cfg *cfg)
3631{
3632 struct sigmatel_spec *spec = codec->spec;
3633 int err;
3634 hda_nid_t lfe_pin = 0x0;
3635 int i;
3636
3637 /*
3638 * search speaker outs and line outs for a mono speaker pin
3639 * with an amp. If one is found, add LFE controls
3640 * for it.
3641 */
3642 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3643 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3644 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3645 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3646 if (wcaps == AC_WCAP_OUT_AMP)
3647 /* found a mono speaker with an amp, must be lfe */
3648 lfe_pin = pin;
3649 }
3650
3651 /* if speaker_outs is 0, then speakers may be in line_outs */
3652 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3653 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3654 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3655 unsigned int defcfg;
8b551785 3656 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3657 AC_VERB_GET_CONFIG_DEFAULT,
3658 0x00);
8b551785 3659 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3660 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3661 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3662 if (wcaps == AC_WCAP_OUT_AMP)
3663 /* found a mono speaker with an amp,
3664 must be lfe */
3665 lfe_pin = pin;
3666 }
3667 }
3668 }
3669
3670 if (lfe_pin) {
eb06ed8f 3671 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3672 if (err < 0)
3673 return err;
3674 }
3675
3676 return 0;
3677}
3678
c7d4b2fa
M		 3679static int stac9200_parse_auto_config(struct hda_codec *codec)
3680{
3681 struct sigmatel_spec *spec = codec->spec;
3682 int err;
3683
df694daa 3684 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3685 return err;
3686
3687 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3688 return err;
3689
82bc955f
TI		 3690 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3691 return err;
3692
160ea0dc
RF		 3693 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3694 return err;
3695
355a0ec4
TI		 3696 if (spec->num_muxes > 0) {
3697 err = stac92xx_auto_create_mux_input_ctls(codec);
3698 if (err < 0)
3699 return err;
3700 }
3701
82bc955f 3702 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3703 spec->multiout.dig_out_nid = 0x05;
82bc955f 3704 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3705 spec->dig_in_nid = 0x04;
c7d4b2fa 3706
603c4019
TI		 3707 if (spec->kctls.list)
3708 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3709
3710 spec->input_mux = &spec->private_imux;
8b65727b 3711 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3712
3713 return 1;
3714}
3715
62fe78e9
SR		 3716/*
3717 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3718 * funky external mute control using GPIO pins.
3719 */
3720
76e1ddfb 3721static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3722 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3723{
3724 unsigned int gpiostate, gpiomask, gpiodir;
3725
3726 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3727 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3728 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3729
3730 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3731 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3732 gpiomask |= mask;
62fe78e9
SR		 3733
3734 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3735 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3736 gpiodir |= dir_mask;
62fe78e9 3737
76e1ddfb 3738 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3739 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3740
3741 snd_hda_codec_write(codec, codec->afg, 0,
3742 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3743 snd_hda_codec_read(codec, codec->afg, 0,
3744 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3745
3746 msleep(1);
3747
76e1ddfb
TI		 3748 snd_hda_codec_read(codec, codec->afg, 0,
3749 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3750}
3751
74aeaabc
MR		 3752static int stac92xx_add_jack(struct hda_codec *codec,
3753 hda_nid_t nid, int type)
3754{
e4973e1e 3755#ifdef CONFIG_SND_JACK
74aeaabc
MR		 3756 struct sigmatel_spec *spec = codec->spec;
3757 struct sigmatel_jack *jack;
3758 int def_conf = snd_hda_codec_read(codec, nid,
3759 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3760 int connectivity = get_defcfg_connect(def_conf);
3761 char name[32];
3762
3763 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3764 return 0;
3765
3766 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3767 jack = snd_array_new(&spec->jacks);
3768 if (!jack)
3769 return -ENOMEM;
3770 jack->nid = nid;
3771 jack->type = type;
3772
3773 sprintf(name, "%s at %s %s Jack",
3774 snd_hda_get_jack_type(def_conf),
3775 snd_hda_get_jack_connectivity(def_conf),
3776 snd_hda_get_jack_location(def_conf));
3777
3778 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI		 3779#else
3780 return 0;
3781#endif
74aeaabc
MR		 3782}
3783
c6e4c666
TI		 3784static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3785 unsigned char type, int data)
74aeaabc
MR		 3786{
3787 struct sigmatel_event *event;
3788
3789 snd_array_init(&spec->events, sizeof(*event), 32);
3790 event = snd_array_new(&spec->events);
3791 if (!event)
3792 return -ENOMEM;
3793 event->nid = nid;
c6e4c666
TI		 3794 event->type = type;
3795 event->tag = spec->events.used;
74aeaabc
MR		 3796 event->data = data;
3797
c6e4c666 3798 return event->tag;
74aeaabc
MR		 3799}
3800
c6e4c666
TI		 3801static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3802 hda_nid_t nid, unsigned char type)
74aeaabc
MR		 3803{
3804 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 3805 struct sigmatel_event *event = spec->events.list;
3806 int i;
3807
3808 for (i = 0; i < spec->events.used; i++, event++) {
3809 if (event->nid == nid && event->type == type)
3810 return event;
74aeaabc 3811 }
c6e4c666 3812 return NULL;
74aeaabc
MR		 3813}
3814
c6e4c666
TI		 3815static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3816 unsigned char tag)
314634bc 3817{
c6e4c666
TI		 3818 struct sigmatel_spec *spec = codec->spec;
3819 struct sigmatel_event *event = spec->events.list;
3820 int i;
3821
3822 for (i = 0; i < spec->events.used; i++, event++) {
3823 if (event->tag == tag)
3824 return event;
74aeaabc 3825 }
c6e4c666
TI		 3826 return NULL;
3827}
3828
3829static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3830 unsigned int type)
3831{
3832 struct sigmatel_event *event;
3833 int tag;
3834
3835 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3836 return;
3837 event = stac_get_event(codec, nid, type);
3838 if (event)
3839 tag = event->tag;
3840 else
3841 tag = stac_add_event(codec->spec, nid, type, 0);
3842 if (tag < 0)
3843 return;
3844 snd_hda_codec_write_cache(codec, nid, 0,
3845 AC_VERB_SET_UNSOLICITED_ENABLE,
3846 AC_USRSP_EN | tag);
314634bc
TI		 3847}
3848
a64135a2
MR		 3849static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3850{
3851 int i;
3852 for (i = 0; i < cfg->hp_outs; i++)
3853 if (cfg->hp_pins[i] == nid)
3854 return 1; /* nid is a HP-Out */
3855
3856 return 0; /* nid is not a HP-Out */
3857};
3858
b76c850f
MR		 3859static void stac92xx_power_down(struct hda_codec *codec)
3860{
3861 struct sigmatel_spec *spec = codec->spec;
3862
3863 /* power down inactive DACs */
3864 hda_nid_t *dac;
3865 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3866 if (!is_in_dac_nids(spec, *dac) &&
3867 spec->multiout.hp_nid != *dac)
8c2f767b 3868 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 3869 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3870}
3871
f73d3585
TI		 3872static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3873 int enable);
3874
c7d4b2fa
M		 3875static int stac92xx_init(struct hda_codec *codec)
3876{
3877 struct sigmatel_spec *spec = codec->spec;
82bc955f 3878 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3879 unsigned int gpio;
e4973e1e 3880 int i;
c7d4b2fa 3881
c7d4b2fa
M		 3882 snd_hda_sequence_write(codec, spec->init);
3883
8daaaa97
MR		 3884 /* power down adcs initially */
3885 if (spec->powerdown_adcs)
3886 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 3887 snd_hda_codec_write(codec,
8daaaa97
MR		 3888 spec->adc_nids[i], 0,
3889 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI		 3890
3891 /* set up GPIO */
3892 gpio = spec->gpio_data;
3893 /* turn on EAPD statically when spec->eapd_switch isn't set.
3894 * otherwise, unsol event will turn it on/off dynamically
3895 */
3896 if (!spec->eapd_switch)
3897 gpio |= spec->eapd_mask;
3898 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3899
82bc955f
TI		 3900 /* set up pins */
3901 if (spec->hp_detect) {
505cb341 3902 /* Enable unsolicited responses on the HP widget */
74aeaabc 3903 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 3904 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 3905 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 3906 }
0a07acaf
TI		 3907 /* force to enable the first line-out; the others are set up
3908 * in unsol_event
3909 */
3910 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3911 AC_PINCTL_OUT_EN);
82bc955f 3912 /* fake event to set up pins */
c6e4c666
TI		 3913 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
3914 STAC_HP_EVENT);
82bc955f
TI		 3915 } else {
3916 stac92xx_auto_init_multi_out(codec);
3917 stac92xx_auto_init_hp_out(codec);
3918 }
3919 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3920 hda_nid_t nid = cfg->input_pins[i];
3921 if (nid) {
4f1e6bc3
TI		 3922 unsigned int pinctl;
3923 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3924 /* for mic pins, force to initialize */
3925 pinctl = stac92xx_get_vref(codec, nid);
3926 } else {
3927 pinctl = snd_hda_codec_read(codec, nid, 0,
3928 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3929 /* if PINCTL already set then skip */
3930 if (pinctl & AC_PINCTL_IN_EN)
3931 continue;
3932 }
3933 pinctl |= AC_PINCTL_IN_EN;
c960a03b 3934 stac92xx_auto_set_pinctl(codec, nid, pinctl);
c6e4c666 3935 enable_pin_detect(codec, nid, STAC_INSERT_EVENT);
c960a03b 3936 }
82bc955f 3937 }
a64135a2
MR		 3938 for (i = 0; i < spec->num_dmics; i++)
3939 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3940 AC_PINCTL_IN_EN);
f73d3585
TI		 3941 if (cfg->dig_out_pin)
3942 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3943 AC_PINCTL_OUT_EN);
3944 if (cfg->dig_in_pin)
3945 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3946 AC_PINCTL_IN_EN);
a64135a2 3947 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 3948 hda_nid_t nid = spec->pwr_nids[i];
3949 int pinctl, def_conf;
f73d3585
TI		 3950
3951 if (is_nid_hp_pin(cfg, nid) && spec->hp_detect)
3952 continue; /* already has an unsol event */
3953
3954 pinctl = snd_hda_codec_read(codec, nid, 0,
3955 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 3956 /* outputs are only ports capable of power management
3957 * any attempts on powering down a input port cause the
3958 * referenced VREF to act quirky.
3959 */
3960 if (pinctl & AC_PINCTL_IN_EN)
3961 continue;
f73d3585
TI		 3962 def_conf = snd_hda_codec_read(codec, nid, 0,
3963 AC_VERB_GET_CONFIG_DEFAULT, 0);
3964 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 3965 /* skip any ports that don't have jacks since presence
3966 * detection is useless */
f73d3585
TI		 3967 if (def_conf != AC_JACK_PORT_COMPLEX) {
3968 if (def_conf != AC_JACK_PORT_NONE)
3969 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 3970 continue;
f73d3585 3971 }
c6e4c666
TI		 3972 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
3973 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
a64135a2 3974 }
b76c850f
MR		 3975 if (spec->dac_list)
3976 stac92xx_power_down(codec);
c7d4b2fa
M		 3977 return 0;
3978}
3979
74aeaabc
MR		 3980static void stac92xx_free_jacks(struct hda_codec *codec)
3981{
e4973e1e 3982#ifdef CONFIG_SND_JACK
b94d3539 3983 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 3984 struct sigmatel_spec *spec = codec->spec;
b94d3539 3985 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 3986 struct sigmatel_jack *jacks = spec->jacks.list;
3987 int i;
3988 for (i = 0; i < spec->jacks.used; i++)
3989 snd_device_free(codec->bus->card, &jacks[i].jack);
3990 }
3991 snd_array_free(&spec->jacks);
e4973e1e 3992#endif
74aeaabc
MR		 3993}
3994
603c4019
TI		 3995static void stac92xx_free_kctls(struct hda_codec *codec)
3996{
3997 struct sigmatel_spec *spec = codec->spec;
3998
3999 if (spec->kctls.list) {
4000 struct snd_kcontrol_new *kctl = spec->kctls.list;
4001 int i;
4002 for (i = 0; i < spec->kctls.used; i++)
4003 kfree(kctl[i].name);
4004 }
4005 snd_array_free(&spec->kctls);
4006}
4007
2f2f4251
M		 4008static void stac92xx_free(struct hda_codec *codec)
4009{
c7d4b2fa 4010 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4011
4012 if (! spec)
4013 return;
4014
af9f341a 4015 kfree(spec->pin_configs);
74aeaabc
MR		 4016 stac92xx_free_jacks(codec);
4017 snd_array_free(&spec->events);
11b44bbd 4018
c7d4b2fa 4019 kfree(spec);
1cd2224c 4020 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4021}
4022
4e55096e
M		 4023static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4024 unsigned int flag)
4025{
4026 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4027 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4028
f9acba43
TI		 4029 if (pin_ctl & AC_PINCTL_IN_EN) {
4030 /*
4031 * we need to check the current set-up direction of
4032 * shared input pins since they can be switched via
4033 * "xxx as Output" mixer switch
4034 */
4035 struct sigmatel_spec *spec = codec->spec;
4036 struct auto_pin_cfg *cfg = &spec->autocfg;
4037 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
4038 spec->line_switch) ||
4039 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
4040 spec->mic_switch))
4041 return;
4042 }
4043
7b043899
SL		 4044 /* if setting pin direction bits, clear the current
4045 direction bits first */
4046 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4047 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4048
82beb8fd 4049 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4050 AC_VERB_SET_PIN_WIDGET_CONTROL,
4051 pin_ctl | flag);
4052}
4053
4054static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4055 unsigned int flag)
4056{
4057 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4058 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 4059 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4060 AC_VERB_SET_PIN_WIDGET_CONTROL,
4061 pin_ctl & ~flag);
4062}
4063
40c1d308 4064static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4065{
4066 if (!nid)
4067 return 0;
4068 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 4069 & (1 << 31)) {
4070 unsigned int pinctl;
4071 pinctl = snd_hda_codec_read(codec, nid, 0,
4072 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4073 if (pinctl & AC_PINCTL_IN_EN)
4074 return 0; /* mic- or line-input */
4075 else
4076 return 1; /* HP-output */
4077 }
314634bc
TI		 4078 return 0;
4079}
4080
d7a89436
TI		 4081/* return non-zero if the hp-pin of the given array index isn't
4082 * a jack-detection target
4083 */
4084static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4085{
4086 struct auto_pin_cfg *cfg = &spec->autocfg;
4087
4088 /* ignore sensing of shared line and mic jacks */
4089 if (spec->line_switch &&
4090 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_LINE])
4091 return 1;
4092 if (spec->mic_switch &&
4093 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_MIC])
4094 return 1;
4095 /* ignore if the pin is set as line-out */
4096 if (cfg->hp_pins[i] == spec->hp_switch)
4097 return 1;
4098 return 0;
4099}
4100
c6e4c666 4101static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4102{
4103 struct sigmatel_spec *spec = codec->spec;
4104 struct auto_pin_cfg *cfg = &spec->autocfg;
4105 int i, presence;
4106
eb06ed8f 4107 presence = 0;
4fe5195c
MR		 4108 if (spec->gpio_mute)
4109 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4110 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4111
eb06ed8f 4112 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4113 if (presence)
4114 break;
d7a89436
TI		 4115 if (no_hp_sensing(spec, i))
4116 continue;
4fe5195c 4117 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 4118 }
4e55096e
M		 4119
4120 if (presence) {
d7a89436 4121 /* disable lineouts */
7c2ba97b 4122 if (spec->hp_switch)
d7a89436
TI		 4123 stac92xx_reset_pinctl(codec, spec->hp_switch,
4124 AC_PINCTL_OUT_EN);
4e55096e
M		 4125 for (i = 0; i < cfg->line_outs; i++)
4126 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4127 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4128 for (i = 0; i < cfg->speaker_outs; i++)
4129 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4130 AC_PINCTL_OUT_EN);
c0cea0d0 4131 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4132 stac_gpio_set(codec, spec->gpio_mask,
4133 spec->gpio_dir, spec->gpio_data &
4134 ~spec->eapd_mask);
4e55096e 4135 } else {
d7a89436 4136 /* enable lineouts */
7c2ba97b 4137 if (spec->hp_switch)
d7a89436
TI		 4138 stac92xx_set_pinctl(codec, spec->hp_switch,
4139 AC_PINCTL_OUT_EN);
4e55096e
M		 4140 for (i = 0; i < cfg->line_outs; i++)
4141 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4142 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4143 for (i = 0; i < cfg->speaker_outs; i++)
4144 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4145 AC_PINCTL_OUT_EN);
c0cea0d0 4146 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4147 stac_gpio_set(codec, spec->gpio_mask,
4148 spec->gpio_dir, spec->gpio_data |
4149 spec->eapd_mask);
4e55096e 4150 }
d7a89436
TI		 4151 /* toggle hp outs */
4152 for (i = 0; i < cfg->hp_outs; i++) {
4153 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4154 if (no_hp_sensing(spec, i))
4155 continue;
4156 if (presence)
4157 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
4158 else
4159 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
4160 }
4e55096e
M		 4161}
4162
f73d3585
TI		 4163static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4164 int enable)
a64135a2
MR		 4165{
4166 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4167 unsigned int idx, val;
4168
4169 for (idx = 0; idx < spec->num_pwrs; idx++) {
4170 if (spec->pwr_nids[idx] == nid)
4171 break;
4172 }
4173 if (idx >= spec->num_pwrs)
4174 return;
d0513fc6
MR		 4175
4176 /* several codecs have two power down bits */
4177 if (spec->pwr_mapping)
4178 idx = spec->pwr_mapping[idx];
4179 else
4180 idx = 1 << idx;
a64135a2 4181
f73d3585
TI		 4182 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4183 if (enable)
a64135a2
MR		 4184 val &= ~idx;
4185 else
4186 val |= idx;
4187
4188 /* power down unused output ports */
4189 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4190}
4191
f73d3585
TI		 4192static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4193{
4194 stac_toggle_power_map(codec, nid, get_hp_pin_presence(codec, nid));
4195}
a64135a2 4196
74aeaabc
MR		 4197static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4198{
4199 struct sigmatel_spec *spec = codec->spec;
4200 struct sigmatel_jack *jacks = spec->jacks.list;
4201
4202 if (jacks) {
4203 int i;
4204 for (i = 0; i < spec->jacks.used; i++) {
4205 if (jacks->nid == nid) {
4206 unsigned int pin_ctl =
4207 snd_hda_codec_read(codec, nid,
4208 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4209 0x00);
4210 int type = jacks->type;
4211 if (type == (SND_JACK_LINEOUT
4212 | SND_JACK_HEADPHONE))
4213 type = (pin_ctl & AC_PINCTL_HP_EN)
4214 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4215 snd_jack_report(jacks->jack,
4216 get_hp_pin_presence(codec, nid)
4217 ? type : 0);
4218 }
4219 jacks++;
4220 }
4221 }
4222}
a64135a2 4223
c6e4c666
TI		 4224static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4225 unsigned char type)
4226{
4227 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4228 if (!event)
4229 return;
4230 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4231}
4232
314634bc
TI		 4233static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4234{
a64135a2 4235 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4236 struct sigmatel_event *event;
4237 int tag, data;
a64135a2 4238
c6e4c666
TI		 4239 tag = (res >> 26) & 0x7f;
4240 event = stac_get_event_from_tag(codec, tag);
4241 if (!event)
4242 return;
4243
4244 switch (event->type) {
314634bc 4245 case STAC_HP_EVENT:
c6e4c666 4246 stac92xx_hp_detect(codec);
a64135a2 4247 /* fallthru */
74aeaabc 4248 case STAC_INSERT_EVENT:
a64135a2 4249 case STAC_PWR_EVENT:
c6e4c666
TI		 4250 if (spec->num_pwrs > 0)
4251 stac92xx_pin_sense(codec, event->nid);
4252 stac92xx_report_jack(codec, event->nid);
72474be6 4253 break;
c6e4c666
TI		 4254 case STAC_VREF_EVENT:
4255 data = snd_hda_codec_read(codec, codec->afg, 0,
4256 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4257 /* toggle VREF state based on GPIOx status */
4258 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4259 !!(data & (1 << event->data)));
72474be6 4260 break;
314634bc
TI		 4261 }
4262}
4263
2d34e1b3
TI		 4264#ifdef CONFIG_PROC_FS
4265static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4266 struct hda_codec *codec, hda_nid_t nid)
4267{
4268 if (nid == codec->afg)
4269 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4270 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4271}
4272
4273static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4274 struct hda_codec *codec,
4275 unsigned int verb)
4276{
4277 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4278 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4279}
4280
4281/* stac92hd71bxx, stac92hd73xx */
4282static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4283 struct hda_codec *codec, hda_nid_t nid)
4284{
4285 stac92hd_proc_hook(buffer, codec, nid);
4286 if (nid == codec->afg)
4287 analog_loop_proc_hook(buffer, codec, 0xfa0);
4288}
4289
4290static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4291 struct hda_codec *codec, hda_nid_t nid)
4292{
4293 if (nid == codec->afg)
4294 analog_loop_proc_hook(buffer, codec, 0xfe0);
4295}
4296
4297static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4298 struct hda_codec *codec, hda_nid_t nid)
4299{
4300 if (nid == codec->afg)
4301 analog_loop_proc_hook(buffer, codec, 0xfeb);
4302}
4303#else
4304#define stac92hd_proc_hook NULL
4305#define stac92hd7x_proc_hook NULL
4306#define stac9205_proc_hook NULL
4307#define stac927x_proc_hook NULL
4308#endif
4309
cb53c626 4310#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4311static int stac92xx_resume(struct hda_codec *codec)
4312{
dc81bed1
TI		 4313 struct sigmatel_spec *spec = codec->spec;
4314
11b44bbd 4315 stac92xx_set_config_regs(codec);
2c885878 4316 stac92xx_init(codec);
82beb8fd
TI		 4317 snd_hda_codec_resume_amp(codec);
4318 snd_hda_codec_resume_cache(codec);
2c885878 4319 /* fake event to set up pins again to override cached values */
dc81bed1 4320 if (spec->hp_detect)
c6e4c666
TI		 4321 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4322 STAC_HP_EVENT);
ff6fdc37
M		 4323 return 0;
4324}
c6798d2b
MR		 4325
4326static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4327{
4328 struct sigmatel_spec *spec = codec->spec;
4329 if (spec->eapd_mask)
4330 stac_gpio_set(codec, spec->gpio_mask,
4331 spec->gpio_dir, spec->gpio_data &
4332 ~spec->eapd_mask);
4333 return 0;
4334}
ff6fdc37
M		 4335#endif
4336
2f2f4251
M		 4337static struct hda_codec_ops stac92xx_patch_ops = {
4338 .build_controls = stac92xx_build_controls,
4339 .build_pcms = stac92xx_build_pcms,
4340 .init = stac92xx_init,
4341 .free = stac92xx_free,
4e55096e 4342 .unsol_event = stac92xx_unsol_event,
cb53c626 4343#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4344 .suspend = stac92xx_suspend,
ff6fdc37
M		 4345 .resume = stac92xx_resume,
4346#endif
2f2f4251
M		 4347};
4348
4349static int patch_stac9200(struct hda_codec *codec)
4350{
4351 struct sigmatel_spec *spec;
c7d4b2fa 4352 int err;
2f2f4251 4353
e560d8d8 4354 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4355 if (spec == NULL)
4356 return -ENOMEM;
4357
4358 codec->spec = spec;
a4eed138 4359 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4360 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4361 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4362 stac9200_models,
4363 stac9200_cfg_tbl);
11b44bbd
RF		 4364 if (spec->board_config < 0) {
4365 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4366 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4367 } else
4368 err = stac_save_pin_cfgs(codec,
4369 stac9200_brd_tbl[spec->board_config]);
4370 if (err < 0) {
4371 stac92xx_free(codec);
4372 return err;
403d1944 4373 }
2f2f4251
M		 4374
4375 spec->multiout.max_channels = 2;
4376 spec->multiout.num_dacs = 1;
4377 spec->multiout.dac_nids = stac9200_dac_nids;
4378 spec->adc_nids = stac9200_adc_nids;
4379 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4380 spec->num_muxes = 1;
8b65727b 4381 spec->num_dmics = 0;
9e05b7a3 4382 spec->num_adcs = 1;
a64135a2 4383 spec->num_pwrs = 0;
c7d4b2fa 4384
bf277785
TD		 4385 if (spec->board_config == STAC_9200_GATEWAY ||
4386 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4387 spec->init = stac9200_eapd_init;
4388 else
4389 spec->init = stac9200_core_init;
2f2f4251 4390 spec->mixer = stac9200_mixer;
c7d4b2fa 4391
117f257d
TI		 4392 if (spec->board_config == STAC_9200_PANASONIC) {
4393 spec->gpio_mask = spec->gpio_dir = 0x09;
4394 spec->gpio_data = 0x00;
4395 }
4396
c7d4b2fa
M		 4397 err = stac9200_parse_auto_config(codec);
4398 if (err < 0) {
4399 stac92xx_free(codec);
4400 return err;
4401 }
2f2f4251
M		 4402
4403 codec->patch_ops = stac92xx_patch_ops;
4404
4405 return 0;
4406}
4407
8e21c34c
TD		 4408static int patch_stac925x(struct hda_codec *codec)
4409{
4410 struct sigmatel_spec *spec;
4411 int err;
4412
4413 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4414 if (spec == NULL)
4415 return -ENOMEM;
4416
4417 codec->spec = spec;
a4eed138 4418 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 4419 spec->pin_nids = stac925x_pin_nids;
4420 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
4421 stac925x_models,
4422 stac925x_cfg_tbl);
9e507abd 4423 again:
8e21c34c 4424 if (spec->board_config < 0) {
2c11f955
TD		 4425 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
4426 "using BIOS defaults\n");
8e21c34c 4427 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4428 } else
4429 err = stac_save_pin_cfgs(codec,
4430 stac925x_brd_tbl[spec->board_config]);
4431 if (err < 0) {
4432 stac92xx_free(codec);
4433 return err;
8e21c34c
TD		 4434 }
4435
4436 spec->multiout.max_channels = 2;
4437 spec->multiout.num_dacs = 1;
4438 spec->multiout.dac_nids = stac925x_dac_nids;
4439 spec->adc_nids = stac925x_adc_nids;
4440 spec->mux_nids = stac925x_mux_nids;
4441 spec->num_muxes = 1;
9e05b7a3 4442 spec->num_adcs = 1;
a64135a2 4443 spec->num_pwrs = 0;
2c11f955
TD		 4444 switch (codec->vendor_id) {
4445 case 0x83847632: /* STAC9202 */
4446 case 0x83847633: /* STAC9202D */
4447 case 0x83847636: /* STAC9251 */
4448 case 0x83847637: /* STAC9251D */
f6e9852a 4449 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4450 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4451 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4452 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4453 break;
4454 default:
4455 spec->num_dmics = 0;
4456 break;
4457 }
8e21c34c
TD		 4458
4459 spec->init = stac925x_core_init;
4460 spec->mixer = stac925x_mixer;
4461
4462 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4463 if (!err) {
4464 if (spec->board_config < 0) {
4465 printk(KERN_WARNING "hda_codec: No auto-config is "
4466 "available, default to model=ref\n");
4467 spec->board_config = STAC_925x_REF;
4468 goto again;
4469 }
4470 err = -EINVAL;
4471 }
8e21c34c
TD		 4472 if (err < 0) {
4473 stac92xx_free(codec);
4474 return err;
4475 }
4476
4477 codec->patch_ops = stac92xx_patch_ops;
4478
4479 return 0;
4480}
4481
e1f0d669
MR		 4482static struct hda_input_mux stac92hd73xx_dmux = {
4483 .num_items = 4,
4484 .items = {
4485 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4486 { "Digital Mic 1", 0x09 },
4487 { "Digital Mic 2", 0x0a },
2a9c7816 4488 { "CD", 0x08 },
e1f0d669
MR		 4489 }
4490};
4491
4492static int patch_stac92hd73xx(struct hda_codec *codec)
4493{
4494 struct sigmatel_spec *spec;
4495 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4496 int err = 0;
4497
4498 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4499 if (spec == NULL)
4500 return -ENOMEM;
4501
4502 codec->spec = spec;
e99d32b3 4503 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4504 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4505 spec->pin_nids = stac92hd73xx_pin_nids;
4506 spec->board_config = snd_hda_check_board_config(codec,
4507 STAC_92HD73XX_MODELS,
4508 stac92hd73xx_models,
4509 stac92hd73xx_cfg_tbl);
4510again:
4511 if (spec->board_config < 0) {
4512 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4513 " STAC92HD73XX, using BIOS defaults\n");
4514 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4515 } else
4516 err = stac_save_pin_cfgs(codec,
4517 stac92hd73xx_brd_tbl[spec->board_config]);
4518 if (err < 0) {
4519 stac92xx_free(codec);
4520 return err;
e1f0d669
MR		 4521 }
4522
4523 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4524 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4525
4526 if (spec->multiout.num_dacs < 0) {
4527 printk(KERN_WARNING "hda_codec: Could not determine "
4528 "number of channels defaulting to DAC count\n");
4529 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4530 }
4531
4532 switch (spec->multiout.num_dacs) {
4533 case 0x3: /* 6 Channel */
4534 spec->mixer = stac92hd73xx_6ch_mixer;
4535 spec->init = stac92hd73xx_6ch_core_init;
4536 break;
4537 case 0x4: /* 8 Channel */
e1f0d669
MR		 4538 spec->mixer = stac92hd73xx_8ch_mixer;
4539 spec->init = stac92hd73xx_8ch_core_init;
4540 break;
4541 case 0x5: /* 10 Channel */
e1f0d669
MR		 4542 spec->mixer = stac92hd73xx_10ch_mixer;
4543 spec->init = stac92hd73xx_10ch_core_init;
4544 };
4545
4546 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4547 spec->aloopback_mask = 0x01;
4548 spec->aloopback_shift = 8;
4549
1cd2224c 4550 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4551 spec->mux_nids = stac92hd73xx_mux_nids;
4552 spec->adc_nids = stac92hd73xx_adc_nids;
4553 spec->dmic_nids = stac92hd73xx_dmic_nids;
4554 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4555 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4556 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4557 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4558
4559 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4560 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4561 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4562 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4563 sizeof(stac92hd73xx_dmux));
4564
a7662640 4565 switch (spec->board_config) {
6b3ab21e 4566 case STAC_DELL_EQ:
d654a660 4567 spec->init = dell_eq_core_init;
6b3ab21e 4568 /* fallthru */
661cd8fb
TI		 4569 case STAC_DELL_M6_AMIC:
4570 case STAC_DELL_M6_DMIC:
4571 case STAC_DELL_M6_BOTH:
2a9c7816 4572 spec->num_smuxes = 0;
2a9c7816
MR		 4573 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4574 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4575 spec->eapd_switch = 0;
2a9c7816 4576 spec->num_amps = 1;
6b3ab21e
MR		 4577
4578 if (!spec->init)
4579 spec->init = dell_m6_core_init;
661cd8fb
TI		 4580 switch (spec->board_config) {
4581 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR		 4582 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4583 spec->num_dmics = 0;
2a9c7816 4584 spec->private_dimux.num_items = 1;
a7662640 4585 break;
661cd8fb 4586 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR		 4587 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4588 spec->num_dmics = 1;
2a9c7816 4589 spec->private_dimux.num_items = 2;
a7662640 4590 break;
661cd8fb 4591 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR		 4592 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4593 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4594 spec->num_dmics = 1;
2a9c7816 4595 spec->private_dimux.num_items = 2;
a7662640
MR		 4596 break;
4597 }
4598 break;
4599 default:
4600 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4601 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4602 spec->eapd_switch = 1;
a7662640 4603 }
b2c4f4d7
MR		 4604 if (spec->board_config > STAC_92HD73XX_REF) {
4605 /* GPIO0 High = Enable EAPD */
4606 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4607 spec->gpio_data = 0x01;
4608 }
2a9c7816 4609 spec->dinput_mux = &spec->private_dimux;
a7662640 4610
a64135a2
MR		 4611 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4612 spec->pwr_nids = stac92hd73xx_pwr_nids;
4613
d9737751 4614 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4615
4616 if (!err) {
4617 if (spec->board_config < 0) {
4618 printk(KERN_WARNING "hda_codec: No auto-config is "
4619 "available, default to model=ref\n");
4620 spec->board_config = STAC_92HD73XX_REF;
4621 goto again;
4622 }
4623 err = -EINVAL;
4624 }
4625
4626 if (err < 0) {
4627 stac92xx_free(codec);
4628 return err;
4629 }
4630
4631 codec->patch_ops = stac92xx_patch_ops;
4632
2d34e1b3
TI		 4633 codec->proc_widget_hook = stac92hd7x_proc_hook;
4634
e1f0d669
MR		 4635 return 0;
4636}
4637
d0513fc6
MR		 4638static struct hda_input_mux stac92hd83xxx_dmux = {
4639 .num_items = 3,
4640 .items = {
4641 { "Analog Inputs", 0x03 },
4642 { "Digital Mic 1", 0x04 },
4643 { "Digital Mic 2", 0x05 },
4644 }
4645};
4646
4647static int patch_stac92hd83xxx(struct hda_codec *codec)
4648{
4649 struct sigmatel_spec *spec;
4650 int err;
4651
4652 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4653 if (spec == NULL)
4654 return -ENOMEM;
4655
4656 codec->spec = spec;
0ffa9807 4657 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4658 spec->mono_nid = 0x19;
4659 spec->digbeep_nid = 0x21;
4660 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4661 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4662 spec->adc_nids = stac92hd83xxx_adc_nids;
4663 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4664 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4665 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4666 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4667
4668 spec->init = stac92hd83xxx_core_init;
4669 switch (codec->vendor_id) {
4670 case 0x111d7605:
4671 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4672 break;
4673 default:
4674 spec->num_pwrs--;
4675 spec->init++; /* switch to config #2 */
4676 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4677 }
4678
4679 spec->mixer = stac92hd83xxx_mixer;
4680 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4681 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4682 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4683 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4684 spec->dinput_mux = &stac92hd83xxx_dmux;
4685 spec->pin_nids = stac92hd83xxx_pin_nids;
4686 spec->board_config = snd_hda_check_board_config(codec,
4687 STAC_92HD83XXX_MODELS,
4688 stac92hd83xxx_models,
4689 stac92hd83xxx_cfg_tbl);
4690again:
4691 if (spec->board_config < 0) {
4692 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4693 " STAC92HD83XXX, using BIOS defaults\n");
4694 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4695 } else
4696 err = stac_save_pin_cfgs(codec,
4697 stac92hd83xxx_brd_tbl[spec->board_config]);
4698 if (err < 0) {
4699 stac92xx_free(codec);
4700 return err;
d0513fc6
MR		 4701 }
4702
4703 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4704 if (!err) {
4705 if (spec->board_config < 0) {
4706 printk(KERN_WARNING "hda_codec: No auto-config is "
4707 "available, default to model=ref\n");
4708 spec->board_config = STAC_92HD83XXX_REF;
4709 goto again;
4710 }
4711 err = -EINVAL;
4712 }
4713
4714 if (err < 0) {
4715 stac92xx_free(codec);
4716 return err;
4717 }
4718
4719 codec->patch_ops = stac92xx_patch_ops;
4720
2d34e1b3
TI		 4721 codec->proc_widget_hook = stac92hd_proc_hook;
4722
d0513fc6
MR		 4723 return 0;
4724}
4725
4b33c767
MR		 4726static struct hda_input_mux stac92hd71bxx_dmux = {
4727 .num_items = 4,
4728 .items = {
4729 { "Analog Inputs", 0x00 },
4730 { "Mixer", 0x01 },
4731 { "Digital Mic 1", 0x02 },
4732 { "Digital Mic 2", 0x03 },
4733 }
4734};
4735
e035b841
MR		 4736static int patch_stac92hd71bxx(struct hda_codec *codec)
4737{
4738 struct sigmatel_spec *spec;
4739 int err = 0;
4740
4741 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4742 if (spec == NULL)
4743 return -ENOMEM;
4744
4745 codec->spec = spec;
8daaaa97 4746 codec->patch_ops = stac92xx_patch_ops;
e035b841 4747 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4748 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4749 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4750 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4751 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4752 spec->board_config = snd_hda_check_board_config(codec,
4753 STAC_92HD71BXX_MODELS,
4754 stac92hd71bxx_models,
4755 stac92hd71bxx_cfg_tbl);
4756again:
4757 if (spec->board_config < 0) {
4758 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4759 " STAC92HD71BXX, using BIOS defaults\n");
4760 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4761 } else
4762 err = stac_save_pin_cfgs(codec,
4763 stac92hd71bxx_brd_tbl[spec->board_config]);
4764 if (err < 0) {
4765 stac92xx_free(codec);
4766 return err;
e035b841
MR		 4767 }
4768
41c3b648
TI		 4769 if (spec->board_config > STAC_92HD71BXX_REF) {
4770 /* GPIO0 = EAPD */
4771 spec->gpio_mask = 0x01;
4772 spec->gpio_dir = 0x01;
4773 spec->gpio_data = 0x01;
4774 }
4775
541eee87
MR		 4776 switch (codec->vendor_id) {
4777 case 0x111d76b6: /* 4 Port without Analog Mixer */
4778 case 0x111d76b7:
4779 case 0x111d76b4: /* 6 Port without Analog Mixer */
4780 case 0x111d76b5:
4781 spec->mixer = stac92hd71bxx_mixer;
4782 spec->init = stac92hd71bxx_core_init;
0ffa9807 4783 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4784 break;
aafc4412 4785 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4786 switch (spec->board_config) {
4787 case STAC_HP_M4:
72474be6 4788 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 4789 err = stac_add_event(spec, codec->afg,
4790 STAC_VREF_EVENT, 0x02);
4791 if (err < 0)
4792 return err;
c5d08bb5 4793 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4794 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4795 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4796 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4797 AC_USRSP_EN | err);
72474be6
MR		 4798 spec->gpio_mask |= 0x02;
4799 break;
4800 }
8daaaa97 4801 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4802 (codec->revision_id & 0xf) == 1)
8daaaa97 4803 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4804
aafc4412
MR		 4805 /* no output amps */
4806 spec->num_pwrs = 0;
4807 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4808 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4809
4810 /* disable VSW */
4811 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4812 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR		 4813 break;
4814 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4815 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4816 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4817
aafc4412
MR		 4818 /* no output amps */
4819 spec->num_pwrs = 0;
4820 /* fallthru */
541eee87 4821 default:
4b33c767 4822 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4823 spec->mixer = stac92hd71bxx_analog_mixer;
4824 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4825 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4826 }
4827
4b33c767 4828 spec->aloopback_mask = 0x50;
541eee87
MR		 4829 spec->aloopback_shift = 0;
4830
8daaaa97 4831 spec->powerdown_adcs = 1;
1cd2224c 4832 spec->digbeep_nid = 0x26;
e035b841
MR		 4833 spec->mux_nids = stac92hd71bxx_mux_nids;
4834 spec->adc_nids = stac92hd71bxx_adc_nids;
4835 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4836 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4837 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4838 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4839
4840 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4841 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4842
6a14f585
MR		 4843 switch (spec->board_config) {
4844 case STAC_HP_M4:
6a14f585 4845 /* enable internal microphone */
af9f341a 4846 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR		 4847 stac92xx_auto_set_pinctl(codec, 0x0e,
4848 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4849 /* fallthru */
4850 case STAC_DELL_M4_2:
4851 spec->num_dmics = 0;
4852 spec->num_smuxes = 0;
4853 spec->num_dmuxes = 0;
4854 break;
4855 case STAC_DELL_M4_1:
4856 case STAC_DELL_M4_3:
4857 spec->num_dmics = 1;
4858 spec->num_smuxes = 0;
4859 spec->num_dmuxes = 0;
6a14f585
MR		 4860 break;
4861 default:
4862 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4863 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4864 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4865 };
4866
aea7bb0a 4867 spec->multiout.num_dacs = 1;
e035b841
MR		 4868 spec->multiout.hp_nid = 0x11;
4869 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4b33c767
MR		 4870 if (spec->dinput_mux)
4871 spec->private_dimux.num_items +=
4872 spec->num_dmics -
4873 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4874
4875 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4876 if (!err) {
4877 if (spec->board_config < 0) {
4878 printk(KERN_WARNING "hda_codec: No auto-config is "
4879 "available, default to model=ref\n");
4880 spec->board_config = STAC_92HD71BXX_REF;
4881 goto again;
4882 }
4883 err = -EINVAL;
4884 }
4885
4886 if (err < 0) {
4887 stac92xx_free(codec);
4888 return err;
4889 }
4890
2d34e1b3
TI		 4891 codec->proc_widget_hook = stac92hd7x_proc_hook;
4892
e035b841
MR		 4893 return 0;
4894};
4895
2f2f4251
M		 4896static int patch_stac922x(struct hda_codec *codec)
4897{
4898 struct sigmatel_spec *spec;
c7d4b2fa 4899 int err;
2f2f4251 4900
e560d8d8 4901 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4902 if (spec == NULL)
4903 return -ENOMEM;
4904
4905 codec->spec = spec;
a4eed138 4906 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4907 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4908 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4909 stac922x_models,
4910 stac922x_cfg_tbl);
536319af 4911 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4912 spec->gpio_mask = spec->gpio_dir = 0x03;
4913 spec->gpio_data = 0x03;
3fc24d85
TI		 4914 /* Intel Macs have all same PCI SSID, so we need to check
4915 * codec SSID to distinguish the exact models
4916 */
6f0778d8 4917 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4918 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4919
4920 case 0x106b0800:
4921 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4922 break;
5d5d3bc3
IZ		 4923 case 0x106b0600:
4924 case 0x106b0700:
4925 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4926 break;
5d5d3bc3
IZ		 4927 case 0x106b0e00:
4928 case 0x106b0f00:
4929 case 0x106b1600:
4930 case 0x106b1700:
4931 case 0x106b0200:
4932 case 0x106b1e00:
4933 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4934 break;
5d5d3bc3
IZ		 4935 case 0x106b1a00:
4936 case 0x00000100:
4937 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4938 break;
5d5d3bc3
IZ		 4939 case 0x106b0a00:
4940 case 0x106b2200:
4941 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4942 break;
536319af
NB		 4943 default:
4944 spec->board_config = STAC_INTEL_MAC_V3;
4945 break;
3fc24d85
TI		 4946 }
4947 }
4948
9e507abd 4949 again:
11b44bbd
RF		 4950 if (spec->board_config < 0) {
4951 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4952 "using BIOS defaults\n");
4953 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4954 } else
4955 err = stac_save_pin_cfgs(codec,
4956 stac922x_brd_tbl[spec->board_config]);
4957 if (err < 0) {
4958 stac92xx_free(codec);
4959 return err;
403d1944 4960 }
2f2f4251 4961
c7d4b2fa
M		 4962 spec->adc_nids = stac922x_adc_nids;
4963 spec->mux_nids = stac922x_mux_nids;
2549413e 4964 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4965 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4966 spec->num_dmics = 0;
a64135a2 4967 spec->num_pwrs = 0;
c7d4b2fa
M		 4968
4969 spec->init = stac922x_core_init;
2f2f4251 4970 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4971
4972 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4973
3cc08dc6 4974 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4975 if (!err) {
4976 if (spec->board_config < 0) {
4977 printk(KERN_WARNING "hda_codec: No auto-config is "
4978 "available, default to model=ref\n");
4979 spec->board_config = STAC_D945_REF;
4980 goto again;
4981 }
4982 err = -EINVAL;
4983 }
3cc08dc6
MP		 4984 if (err < 0) {
4985 stac92xx_free(codec);
4986 return err;
4987 }
4988
4989 codec->patch_ops = stac92xx_patch_ops;
4990
807a4636
TI		 4991 /* Fix Mux capture level; max to 2 */
4992 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4993 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4994 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4995 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4996 (0 << AC_AMPCAP_MUTE_SHIFT));
4997
3cc08dc6
MP		 4998 return 0;
4999}
5000
5001static int patch_stac927x(struct hda_codec *codec)
5002{
5003 struct sigmatel_spec *spec;
5004 int err;
5005
5006 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5007 if (spec == NULL)
5008 return -ENOMEM;
5009
5010 codec->spec = spec;
a4eed138 5011 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5012 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 5013 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5014 stac927x_models,
5015 stac927x_cfg_tbl);
9e507abd 5016 again:
8e9068b1
MR		 5017 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5018 if (spec->board_config < 0)
5019 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5020 "STAC927x, using BIOS defaults\n");
11b44bbd 5021 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5022 } else
5023 err = stac_save_pin_cfgs(codec,
5024 stac927x_brd_tbl[spec->board_config]);
5025 if (err < 0) {
5026 stac92xx_free(codec);
5027 return err;
3cc08dc6
MP		 5028 }
5029
1cd2224c 5030 spec->digbeep_nid = 0x23;
8e9068b1
MR		 5031 spec->adc_nids = stac927x_adc_nids;
5032 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5033 spec->mux_nids = stac927x_mux_nids;
5034 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 5035 spec->smux_nids = stac927x_smux_nids;
5036 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5037 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5038 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 5039 spec->multiout.dac_nids = spec->dac_nids;
5040
81d3dbde 5041 switch (spec->board_config) {
93ed1503 5042 case STAC_D965_3ST:
93ed1503 5043 case STAC_D965_5ST:
8e9068b1 5044 /* GPIO0 High = Enable EAPD */
0fc9dec4 5045 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5046 spec->gpio_data = 0x01;
8e9068b1
MR		 5047 spec->num_dmics = 0;
5048
93ed1503 5049 spec->init = d965_core_init;
9e05b7a3 5050 spec->mixer = stac927x_mixer;
81d3dbde 5051 break;
8e9068b1 5052 case STAC_DELL_BIOS:
780c8be4
MR		 5053 switch (codec->subsystem_id) {
5054 case 0x10280209:
5055 case 0x1028022e:
5056 /* correct the device field to SPDIF out */
af9f341a 5057 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR		 5058 break;
5059 };
03d7ca17 5060 /* configure the analog microphone on some laptops */
af9f341a 5061 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5062 /* correct the front output jack as a hp out */
af9f341a 5063 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5064 /* correct the front input jack as a mic */
af9f341a 5065 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5066 /* fallthru */
8e9068b1
MR		 5067 case STAC_DELL_3ST:
5068 /* GPIO2 High = Enable EAPD */
0fc9dec4 5069 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5070 spec->gpio_data = 0x04;
7f16859a
MR		 5071 spec->dmic_nids = stac927x_dmic_nids;
5072 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5073
8e9068b1
MR		 5074 spec->init = d965_core_init;
5075 spec->mixer = stac927x_mixer;
5076 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5077 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 5078 break;
5079 default:
b2c4f4d7
MR		 5080 if (spec->board_config > STAC_D965_REF) {
5081 /* GPIO0 High = Enable EAPD */
5082 spec->eapd_mask = spec->gpio_mask = 0x01;
5083 spec->gpio_dir = spec->gpio_data = 0x01;
5084 }
8e9068b1
MR		 5085 spec->num_dmics = 0;
5086
5087 spec->init = stac927x_core_init;
5088 spec->mixer = stac927x_mixer;
7f16859a
MR		 5089 }
5090
a64135a2 5091 spec->num_pwrs = 0;
e1f0d669
MR		 5092 spec->aloopback_mask = 0x40;
5093 spec->aloopback_shift = 0;
c0cea0d0 5094 spec->eapd_switch = 1;
8e9068b1 5095
3cc08dc6 5096 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5097 if (!err) {
5098 if (spec->board_config < 0) {
5099 printk(KERN_WARNING "hda_codec: No auto-config is "
5100 "available, default to model=ref\n");
5101 spec->board_config = STAC_D965_REF;
5102 goto again;
5103 }
5104 err = -EINVAL;
5105 }
c7d4b2fa
M		 5106 if (err < 0) {
5107 stac92xx_free(codec);
5108 return err;
5109 }
2f2f4251
M		 5110
5111 codec->patch_ops = stac92xx_patch_ops;
5112
2d34e1b3
TI		 5113 codec->proc_widget_hook = stac927x_proc_hook;
5114
52987656
TI		 5115 /*
5116 * !!FIXME!!
5117 * The STAC927x seem to require fairly long delays for certain
5118 * command sequences. With too short delays (even if the answer
5119 * is set to RIRB properly), it results in the silence output
5120 * on some hardwares like Dell.
5121 *
5122 * The below flag enables the longer delay (see get_response
5123 * in hda_intel.c).
5124 */
5125 codec->bus->needs_damn_long_delay = 1;
5126
2f2f4251
M		 5127 return 0;
5128}
5129
f3302a59
MP		 5130static int patch_stac9205(struct hda_codec *codec)
5131{
5132 struct sigmatel_spec *spec;
8259980e 5133 int err;
f3302a59
MP		 5134
5135 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5136 if (spec == NULL)
5137 return -ENOMEM;
5138
5139 codec->spec = spec;
a4eed138 5140 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5141 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 5142 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5143 stac9205_models,
5144 stac9205_cfg_tbl);
9e507abd 5145 again:
11b44bbd
RF		 5146 if (spec->board_config < 0) {
5147 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5148 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5149 } else
5150 err = stac_save_pin_cfgs(codec,
5151 stac9205_brd_tbl[spec->board_config]);
5152 if (err < 0) {
5153 stac92xx_free(codec);
5154 return err;
f3302a59
MP		 5155 }
5156
1cd2224c 5157 spec->digbeep_nid = 0x23;
f3302a59 5158 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5159 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5160 spec->mux_nids = stac9205_mux_nids;
2549413e 5161 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 5162 spec->smux_nids = stac9205_smux_nids;
5163 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5164 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5165 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5166 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5167 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5168 spec->num_pwrs = 0;
f3302a59
MP		 5169
5170 spec->init = stac9205_core_init;
5171 spec->mixer = stac9205_mixer;
5172
e1f0d669
MR		 5173 spec->aloopback_mask = 0x40;
5174 spec->aloopback_shift = 0;
c0cea0d0 5175 spec->eapd_switch = 1;
f3302a59 5176 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5177
ae0a8ed8 5178 switch (spec->board_config){
ae0a8ed8 5179 case STAC_9205_DELL_M43:
87d48363 5180 /* Enable SPDIF in/out */
af9f341a
TI		 5181 stac_change_pin_config(codec, 0x1f, 0x01441030);
5182 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5183
4fe5195c 5184 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 5185 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5186 if (err < 0)
5187 return err;
c5d08bb5 5188 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 5189 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5190 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 5191 AC_VERB_SET_UNSOLICITED_ENABLE,
5192 AC_USRSP_EN | err);
4fe5195c
MR		 5193
5194 spec->gpio_dir = 0x0b;
0fc9dec4 5195 spec->eapd_mask = 0x01;
4fe5195c
MR		 5196 spec->gpio_mask = 0x1b;
5197 spec->gpio_mute = 0x10;
e2e7d624 5198 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5199 * GPIO3 Low = DRM
87d48363 5200 */
4fe5195c 5201 spec->gpio_data = 0x01;
ae0a8ed8 5202 break;
b2c4f4d7
MR		 5203 case STAC_9205_REF:
5204 /* SPDIF-In enabled */
5205 break;
ae0a8ed8
TD		 5206 default:
5207 /* GPIO0 High = EAPD */
0fc9dec4 5208 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5209 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5210 break;
5211 }
33382403 5212
f3302a59 5213 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5214 if (!err) {
5215 if (spec->board_config < 0) {
5216 printk(KERN_WARNING "hda_codec: No auto-config is "
5217 "available, default to model=ref\n");
5218 spec->board_config = STAC_9205_REF;
5219 goto again;
5220 }
5221 err = -EINVAL;
5222 }
f3302a59
MP		 5223 if (err < 0) {
5224 stac92xx_free(codec);
5225 return err;
5226 }
5227
5228 codec->patch_ops = stac92xx_patch_ops;
5229
2d34e1b3
TI		 5230 codec->proc_widget_hook = stac9205_proc_hook;
5231
f3302a59
MP		 5232 return 0;
5233}
5234
db064e50 5235/*
6d859065 5236 * STAC9872 hack
db064e50
TI		 5237 */
5238
99ccc560 5239/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 5240static hda_nid_t vaio_dacs[] = { 0x2 };
5241#define VAIO_HP_DAC 0x5
5242static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5243static hda_nid_t vaio_mux_nids[] = { 0x15 };
5244
5245static struct hda_input_mux vaio_mux = {
a3a2f429 5246 .num_items = 3,
db064e50 5247 .items = {
d773781c 5248 /* { "HP", 0x0 }, */
1624cb9a
TI		 5249 { "Mic Jack", 0x1 },
5250 { "Internal Mic", 0x2 },
db064e50
TI		 5251 { "PCM", 0x3 },
5252 }
5253};
5254
5255static struct hda_verb vaio_init[] = {
5256 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5257 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 5258 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5259 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5260 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5261 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5262 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 5263 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5264 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5265 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5266 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5267 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5268 {}
5269};
5270
6d859065
GM		 5271static struct hda_verb vaio_ar_init[] = {
5272 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5273 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5274 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5275 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5276/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5277 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5278 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5279 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5280 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5281/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5282 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5283 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5284 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5285 {}
5286};
5287
db064e50 5288static struct snd_kcontrol_new vaio_mixer[] = {
127e82e3
TI		 5289 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5290 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5291 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5292 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
db064e50
TI		 5293 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5294 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5295 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5296 {
5297 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5298 .name = "Capture Source",
5299 .count = 1,
5300 .info = stac92xx_mux_enum_info,
5301 .get = stac92xx_mux_enum_get,
5302 .put = stac92xx_mux_enum_put,
5303 },
5304 {}
5305};
5306
6d859065 5307static struct snd_kcontrol_new vaio_ar_mixer[] = {
127e82e3
TI		 5308 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5309 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5310 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5311 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
6d859065
GM		 5312 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5313 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5314 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5315 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5316 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5317 {
5318 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5319 .name = "Capture Source",
5320 .count = 1,
5321 .info = stac92xx_mux_enum_info,
5322 .get = stac92xx_mux_enum_get,
5323 .put = stac92xx_mux_enum_put,
5324 },
5325 {}
5326};
5327
5328static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5329 .build_controls = stac92xx_build_controls,
5330 .build_pcms = stac92xx_build_pcms,
5331 .init = stac92xx_init,
5332 .free = stac92xx_free,
cb53c626 5333#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5334 .resume = stac92xx_resume,
5335#endif
5336};
5337
72e7b0dd
TI		 5338static int stac9872_vaio_init(struct hda_codec *codec)
5339{
5340 int err;
5341
5342 err = stac92xx_init(codec);
5343 if (err < 0)
5344 return err;
5345 if (codec->patch_ops.unsol_event)
5346 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5347 return 0;
5348}
5349
5350static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5351{
40c1d308 5352 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5353 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5354 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5355 } else {
5356 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5357 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5358 }
5359}
5360
5361static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5362{
5363 switch (res >> 26) {
5364 case STAC_HP_EVENT:
5365 stac9872_vaio_hp_detect(codec, res);
5366 break;
5367 }
5368}
5369
5370static struct hda_codec_ops stac9872_vaio_patch_ops = {
5371 .build_controls = stac92xx_build_controls,
5372 .build_pcms = stac92xx_build_pcms,
5373 .init = stac9872_vaio_init,
5374 .free = stac92xx_free,
5375 .unsol_event = stac9872_vaio_unsol_event,
5376#ifdef CONFIG_PM
5377 .resume = stac92xx_resume,
5378#endif
5379};
5380
6d859065
GM		 5381enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5382 CXD9872RD_VAIO,
5383 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5384 STAC9872AK_VAIO,
5385 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5386 STAC9872K_VAIO,
5387 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5388 CXD9872AKD_VAIO,
5389 STAC_9872_MODELS,
5390};
5391
5392static const char *stac9872_models[STAC_9872_MODELS] = {
5393 [CXD9872RD_VAIO] = "vaio",
5394 [CXD9872AKD_VAIO] = "vaio-ar",
5395};
5396
5397static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5398 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5399 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5400 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5401 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5402 {}
5403};
5404
6d859065 5405static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5406{
5407 struct sigmatel_spec *spec;
5408 int board_config;
5409
f5fcc13c
TI		 5410 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5411 stac9872_models,
5412 stac9872_cfg_tbl);
db064e50
TI		 5413 if (board_config < 0)
5414 /* unknown config, let generic-parser do its job... */
5415 return snd_hda_parse_generic_codec(codec);
5416
5417 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5418 if (spec == NULL)
5419 return -ENOMEM;
5420
5421 codec->spec = spec;
5422 switch (board_config) {
6d859065
GM		 5423 case CXD9872RD_VAIO:
5424 case STAC9872AK_VAIO:
5425 case STAC9872K_VAIO:
db064e50
TI		 5426 spec->mixer = vaio_mixer;
5427 spec->init = vaio_init;
5428 spec->multiout.max_channels = 2;
5429 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5430 spec->multiout.dac_nids = vaio_dacs;
5431 spec->multiout.hp_nid = VAIO_HP_DAC;
5432 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5433 spec->adc_nids = vaio_adcs;
a64135a2 5434 spec->num_pwrs = 0;
db064e50
TI		 5435 spec->input_mux = &vaio_mux;
5436 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5437 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5438 break;
6d859065
GM		 5439
5440 case CXD9872AKD_VAIO:
5441 spec->mixer = vaio_ar_mixer;
5442 spec->init = vaio_ar_init;
5443 spec->multiout.max_channels = 2;
5444 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5445 spec->multiout.dac_nids = vaio_dacs;
5446 spec->multiout.hp_nid = VAIO_HP_DAC;
5447 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5448 spec->num_pwrs = 0;
6d859065
GM		 5449 spec->adc_nids = vaio_adcs;
5450 spec->input_mux = &vaio_mux;
5451 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5452 codec->patch_ops = stac9872_patch_ops;
6d859065 5453 break;
db064e50
TI		 5454 }
5455
db064e50
TI		 5456 return 0;
5457}
5458
5459
2f2f4251
M		 5460/*
5461 * patch entries
5462 */
1289e9e8 5463static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 5464 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5465 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5466 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5467 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5468 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5469 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5470 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5471 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5472 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5473 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5474 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5475 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5476 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5477 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5478 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5479 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5480 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5481 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5482 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5483 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5484 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5485 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5486 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5487 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5488 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5489 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5490 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5491 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5492 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5493 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5494 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5495 /* The following does not take into account .id=0x83847661 when subsys =
5496 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5497 * currently not fully supported.
5498 */
5499 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5500 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5501 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5502 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5503 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5504 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5505 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5506 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5507 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5508 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5509 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5510 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5511 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5512 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5513 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5514 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5515 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5516 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5517 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5518 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5519 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5520 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5521 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5522 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5523 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5524 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5525 {} /* terminator */
5526};
1289e9e8
TI		 5527
5528MODULE_ALIAS("snd-hda-codec-id:8384*");
5529MODULE_ALIAS("snd-hda-codec-id:111d*");
5530
5531MODULE_LICENSE("GPL");
5532MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5533
5534static struct hda_codec_preset_list sigmatel_list = {
5535 .preset = snd_hda_preset_sigmatel,
5536 .owner = THIS_MODULE,
5537};
5538
5539static int __init patch_sigmatel_init(void)
5540{
5541 return snd_hda_add_codec_preset(&sigmatel_list);
5542}
5543
5544static void __exit patch_sigmatel_exit(void)
5545{
5546 snd_hda_delete_codec_preset(&sigmatel_list);
5547}
5548
5549module_init(patch_sigmatel_init)
5550module_exit(patch_sigmatel_exit)
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