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ALSA: hda: Add STAC_DELL_M4_3 quirk
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
4e55096e 38#define NUM_CONTROL_ALLOC 32
c39555d6
MR		 39
40#define STAC_VREF_EVENT 0x00
41#define STAC_INSERT_EVENT 0x10
a64135a2
MR		 42#define STAC_PWR_EVENT 0x20
43#define STAC_HP_EVENT 0x30
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
1194b5b7 58 STAC_9200_GATEWAY,
117f257d 59 STAC_9200_PANASONIC,
f5fcc13c
TI		 60 STAC_9200_MODELS
61};
62
63enum {
64 STAC_9205_REF,
dfe495d0 65 STAC_9205_DELL_M42,
ae0a8ed8
TD		 66 STAC_9205_DELL_M43,
67 STAC_9205_DELL_M44,
f5fcc13c
TI		 68 STAC_9205_MODELS
69};
70
e1f0d669
MR		 71enum {
72 STAC_92HD73XX_REF,
a7662640 73 STAC_DELL_M6,
6b3ab21e 74 STAC_DELL_EQ,
e1f0d669
MR		 75 STAC_92HD73XX_MODELS
76};
77
d0513fc6
MR		 78enum {
79 STAC_92HD83XXX_REF,
80 STAC_92HD83XXX_MODELS
81};
82
e035b841
MR		 83enum {
84 STAC_92HD71BXX_REF,
a7662640
MR		 85 STAC_DELL_M4_1,
86 STAC_DELL_M4_2,
3a7abfd2 87 STAC_DELL_M4_3,
6a14f585 88 STAC_HP_M4,
e035b841
MR		 89 STAC_92HD71BXX_MODELS
90};
91
8e21c34c
TD		 92enum {
93 STAC_925x_REF,
94 STAC_M2_2,
95 STAC_MA6,
2c11f955 96 STAC_PA6,
8e21c34c
TD		 97 STAC_925x_MODELS
98};
99
f5fcc13c
TI		 100enum {
101 STAC_D945_REF,
102 STAC_D945GTP3,
103 STAC_D945GTP5,
5d5d3bc3
IZ		 104 STAC_INTEL_MAC_V1,
105 STAC_INTEL_MAC_V2,
106 STAC_INTEL_MAC_V3,
107 STAC_INTEL_MAC_V4,
108 STAC_INTEL_MAC_V5,
536319af
NB		 109 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
110 * is given, one of the above models will be
111 * chosen according to the subsystem id. */
dfe495d0 112 /* for backward compatibility */
f5fcc13c 113 STAC_MACMINI,
3fc24d85 114 STAC_MACBOOK,
6f0778d8
NB		 115 STAC_MACBOOK_PRO_V1,
116 STAC_MACBOOK_PRO_V2,
f16928fb 117 STAC_IMAC_INTEL,
0dae0f83 118 STAC_IMAC_INTEL_20,
8c650087 119 STAC_ECS_202,
dfe495d0
TI		 120 STAC_922X_DELL_D81,
121 STAC_922X_DELL_D82,
122 STAC_922X_DELL_M81,
123 STAC_922X_DELL_M82,
f5fcc13c
TI		 124 STAC_922X_MODELS
125};
126
127enum {
128 STAC_D965_REF,
129 STAC_D965_3ST,
130 STAC_D965_5ST,
4ff076e5 131 STAC_DELL_3ST,
8e9068b1 132 STAC_DELL_BIOS,
f5fcc13c
TI		 133 STAC_927X_MODELS
134};
403d1944 135
2f2f4251 136struct sigmatel_spec {
c8b6bf9b 137 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 138 unsigned int num_mixers;
139
403d1944 140 int board_config;
0253fdcd 141 unsigned int eapd_switch: 1;
c7d4b2fa 142 unsigned int surr_switch: 1;
403d1944
MP		 143 unsigned int line_switch: 1;
144 unsigned int mic_switch: 1;
3cc08dc6 145 unsigned int alt_switch: 1;
82bc955f 146 unsigned int hp_detect: 1;
00ef50c2 147 unsigned int spdif_mute: 1;
c7d4b2fa 148
4fe5195c 149 /* gpio lines */
0fc9dec4 150 unsigned int eapd_mask;
4fe5195c
MR		 151 unsigned int gpio_mask;
152 unsigned int gpio_dir;
153 unsigned int gpio_data;
154 unsigned int gpio_mute;
155
8daaaa97
MR		 156 /* stream */
157 unsigned int stream_delay;
158
4fe5195c 159 /* analog loopback */
e1f0d669
MR		 160 unsigned char aloopback_mask;
161 unsigned char aloopback_shift;
8259980e 162
a64135a2
MR		 163 /* power management */
164 unsigned int num_pwrs;
d0513fc6 165 unsigned int *pwr_mapping;
a64135a2 166 hda_nid_t *pwr_nids;
b76c850f 167 hda_nid_t *dac_list;
a64135a2 168
2f2f4251 169 /* playback */
b22b4821 170 struct hda_input_mux *mono_mux;
89385035 171 struct hda_input_mux *amp_mux;
b22b4821 172 unsigned int cur_mmux;
2f2f4251 173 struct hda_multi_out multiout;
3cc08dc6 174 hda_nid_t dac_nids[5];
2f2f4251
M		 175
176 /* capture */
177 hda_nid_t *adc_nids;
2f2f4251 178 unsigned int num_adcs;
dabbed6f
M		 179 hda_nid_t *mux_nids;
180 unsigned int num_muxes;
8b65727b
MP		 181 hda_nid_t *dmic_nids;
182 unsigned int num_dmics;
e1f0d669 183 hda_nid_t *dmux_nids;
1697055e 184 unsigned int num_dmuxes;
d9737751
MR		 185 hda_nid_t *smux_nids;
186 unsigned int num_smuxes;
65973632 187 const char **spdif_labels;
d9737751 188
dabbed6f 189 hda_nid_t dig_in_nid;
b22b4821 190 hda_nid_t mono_nid;
1cd2224c
MR		 191 hda_nid_t anabeep_nid;
192 hda_nid_t digbeep_nid;
2f2f4251 193
2f2f4251
M		 194 /* pin widgets */
195 hda_nid_t *pin_nids;
196 unsigned int num_pins;
2f2f4251 197 unsigned int *pin_configs;
11b44bbd 198 unsigned int *bios_pin_configs;
2f2f4251
M		 199
200 /* codec specific stuff */
201 struct hda_verb *init;
c8b6bf9b 202 struct snd_kcontrol_new *mixer;
2f2f4251
M		 203
204 /* capture source */
8b65727b 205 struct hda_input_mux *dinput_mux;
e1f0d669 206 unsigned int cur_dmux[2];
c7d4b2fa 207 struct hda_input_mux *input_mux;
3cc08dc6 208 unsigned int cur_mux[3];
d9737751
MR		 209 struct hda_input_mux *sinput_mux;
210 unsigned int cur_smux[2];
2a9c7816
MR		 211 unsigned int cur_amux;
212 hda_nid_t *amp_nids;
213 unsigned int num_amps;
8daaaa97 214 unsigned int powerdown_adcs;
2f2f4251 215
403d1944
MP		 216 /* i/o switches */
217 unsigned int io_switch[2];
0fb87bb4 218 unsigned int clfe_swap;
d7a89436 219 unsigned int hp_switch; /* NID of HP as line-out */
5f10c4a9 220 unsigned int aloopback;
2f2f4251 221
c7d4b2fa
M		 222 struct hda_pcm pcm_rec[2]; /* PCM information */
223
224 /* dynamic controls and input_mux */
225 struct auto_pin_cfg autocfg;
226 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 227 struct snd_kcontrol_new *kctl_alloc;
8b65727b 228 struct hda_input_mux private_dimux;
c7d4b2fa 229 struct hda_input_mux private_imux;
d9737751 230 struct hda_input_mux private_smux;
89385035 231 struct hda_input_mux private_amp_mux;
b22b4821 232 struct hda_input_mux private_mono_mux;
2f2f4251
M		 233};
234
235static hda_nid_t stac9200_adc_nids[1] = {
236 0x03,
237};
238
239static hda_nid_t stac9200_mux_nids[1] = {
240 0x0c,
241};
242
243static hda_nid_t stac9200_dac_nids[1] = {
244 0x02,
245};
246
a64135a2
MR		 247static hda_nid_t stac92hd73xx_pwr_nids[8] = {
248 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
249 0x0f, 0x10, 0x11
250};
251
0ffa9807
MR		 252static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
253 0x26, 0,
254};
255
e1f0d669
MR		 256static hda_nid_t stac92hd73xx_adc_nids[2] = {
257 0x1a, 0x1b
258};
259
2a9c7816
MR		 260#define DELL_M6_AMP 2
261static hda_nid_t stac92hd73xx_amp_nids[3] = {
262 0x0b, 0x0c, 0x0e
89385035
MR		 263};
264
e1f0d669
MR		 265#define STAC92HD73XX_NUM_DMICS 2
266static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
267 0x13, 0x14, 0
268};
269
270#define STAC92HD73_DAC_COUNT 5
271static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
272 0x15, 0x16, 0x17, 0x18, 0x19,
273};
274
275static hda_nid_t stac92hd73xx_mux_nids[4] = {
276 0x28, 0x29, 0x2a, 0x2b,
277};
278
279static hda_nid_t stac92hd73xx_dmux_nids[2] = {
280 0x20, 0x21,
281};
282
d9737751
MR		 283static hda_nid_t stac92hd73xx_smux_nids[2] = {
284 0x22, 0x23,
285};
286
d0513fc6
MR		 287#define STAC92HD83XXX_NUM_DMICS 2
288static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
289 0x11, 0x12, 0
290};
291
292#define STAC92HD81_DAC_COUNT 2
293#define STAC92HD83_DAC_COUNT 3
294static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
295 0x13, 0x14, 0x22,
296};
297
298static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
299 0x17, 0x18,
300};
301
302static hda_nid_t stac92hd83xxx_adc_nids[2] = {
303 0x15, 0x16,
304};
305
306static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
307 0xa, 0xb, 0xd, 0xe,
308};
309
0ffa9807
MR		 310static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
311 0x1e, 0,
312};
313
d0513fc6
MR		 314static unsigned int stac92hd83xxx_pwr_mapping[4] = {
315 0x03, 0x0c, 0x10, 0x40,
316};
317
a64135a2
MR		 318static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
319 0x0a, 0x0d, 0x0f
320};
321
e035b841
MR		 322static hda_nid_t stac92hd71bxx_adc_nids[2] = {
323 0x12, 0x13,
324};
325
326static hda_nid_t stac92hd71bxx_mux_nids[2] = {
327 0x1a, 0x1b
328};
329
4b33c767
MR		 330static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
331 0x1c, 0x1d,
e1f0d669
MR		 332};
333
d9737751
MR		 334static hda_nid_t stac92hd71bxx_smux_nids[2] = {
335 0x24, 0x25,
336};
337
aea7bb0a 338static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 339 0x10, /*0x11, */
340};
341
342#define STAC92HD71BXX_NUM_DMICS 2
343static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
344 0x18, 0x19, 0
345};
346
0ffa9807
MR		 347static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
348 0x22, 0
349};
350
8e21c34c
TD		 351static hda_nid_t stac925x_adc_nids[1] = {
352 0x03,
353};
354
355static hda_nid_t stac925x_mux_nids[1] = {
356 0x0f,
357};
358
359static hda_nid_t stac925x_dac_nids[1] = {
360 0x02,
361};
362
f6e9852a
TI		 363#define STAC925X_NUM_DMICS 1
364static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
365 0x15, 0
2c11f955
TD		 366};
367
1697055e
TI		 368static hda_nid_t stac925x_dmux_nids[1] = {
369 0x14,
370};
371
2f2f4251
M		 372static hda_nid_t stac922x_adc_nids[2] = {
373 0x06, 0x07,
374};
375
376static hda_nid_t stac922x_mux_nids[2] = {
377 0x12, 0x13,
378};
379
3cc08dc6
MP		 380static hda_nid_t stac927x_adc_nids[3] = {
381 0x07, 0x08, 0x09
382};
383
384static hda_nid_t stac927x_mux_nids[3] = {
385 0x15, 0x16, 0x17
386};
387
d9737751
MR		 388static hda_nid_t stac927x_smux_nids[1] = {
389 0x21,
390};
391
b76c850f
MR		 392static hda_nid_t stac927x_dac_nids[6] = {
393 0x02, 0x03, 0x04, 0x05, 0x06, 0
394};
395
e1f0d669
MR		 396static hda_nid_t stac927x_dmux_nids[1] = {
397 0x1b,
398};
399
7f16859a
MR		 400#define STAC927X_NUM_DMICS 2
401static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
402 0x13, 0x14, 0
403};
404
65973632
MR		 405static const char *stac927x_spdif_labels[5] = {
406 "Digital Playback", "ADAT", "Analog Mux 1",
407 "Analog Mux 2", "Analog Mux 3"
408};
409
f3302a59
MP		 410static hda_nid_t stac9205_adc_nids[2] = {
411 0x12, 0x13
412};
413
414static hda_nid_t stac9205_mux_nids[2] = {
415 0x19, 0x1a
416};
417
e1f0d669 418static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 419 0x1d,
e1f0d669
MR		 420};
421
d9737751
MR		 422static hda_nid_t stac9205_smux_nids[1] = {
423 0x21,
424};
425
f6e9852a
TI		 426#define STAC9205_NUM_DMICS 2
427static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
428 0x17, 0x18, 0
8b65727b
MP		 429};
430
c7d4b2fa 431static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 432 0x08, 0x09, 0x0d, 0x0e,
433 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 434};
435
8e21c34c
TD		 436static hda_nid_t stac925x_pin_nids[8] = {
437 0x07, 0x08, 0x0a, 0x0b,
438 0x0c, 0x0d, 0x10, 0x11,
439};
440
2f2f4251
M		 441static hda_nid_t stac922x_pin_nids[10] = {
442 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
443 0x0f, 0x10, 0x11, 0x15, 0x1b,
444};
445
a7662640 446static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 447 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
448 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 449 0x14, 0x22, 0x23
e1f0d669
MR		 450};
451
d0513fc6
MR		 452static hda_nid_t stac92hd83xxx_pin_nids[14] = {
453 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
454 0x0f, 0x10, 0x11, 0x12, 0x13,
455 0x1d, 0x1e, 0x1f, 0x20
456};
0ffa9807 457static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 458 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
459 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 460 0x1f,
e035b841
MR		 461};
462
3cc08dc6
MP		 463static hda_nid_t stac927x_pin_nids[14] = {
464 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
465 0x0f, 0x10, 0x11, 0x12, 0x13,
466 0x14, 0x21, 0x22, 0x23,
467};
468
f3302a59
MP		 469static hda_nid_t stac9205_pin_nids[12] = {
470 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
471 0x0f, 0x14, 0x16, 0x17, 0x18,
472 0x21, 0x22,
f3302a59
MP		 473};
474
89385035
MR		 475#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
476
477static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
478 struct snd_ctl_elem_value *ucontrol)
479{
480 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
481 struct sigmatel_spec *spec = codec->spec;
482 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
483
484 kcontrol->private_value ^= get_amp_nid(kcontrol);
485 kcontrol->private_value |= nid;
486
487 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
488}
489
490static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
491 struct snd_ctl_elem_value *ucontrol)
492{
493 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
494 struct sigmatel_spec *spec = codec->spec;
495 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
496
497 kcontrol->private_value ^= get_amp_nid(kcontrol);
498 kcontrol->private_value |= nid;
499
500 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
501}
502
8b65727b
MP		 503static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
504 struct snd_ctl_elem_info *uinfo)
505{
506 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
507 struct sigmatel_spec *spec = codec->spec;
508 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
509}
510
511static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
512 struct snd_ctl_elem_value *ucontrol)
513{
514 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
515 struct sigmatel_spec *spec = codec->spec;
e1f0d669 516 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 517
e1f0d669 518 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 519 return 0;
520}
521
522static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
523 struct snd_ctl_elem_value *ucontrol)
524{
525 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
526 struct sigmatel_spec *spec = codec->spec;
e1f0d669 527 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 528
529 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 530 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 531}
532
d9737751
MR		 533static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
534 struct snd_ctl_elem_info *uinfo)
535{
536 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
537 struct sigmatel_spec *spec = codec->spec;
538 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
539}
540
541static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
542 struct snd_ctl_elem_value *ucontrol)
543{
544 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
545 struct sigmatel_spec *spec = codec->spec;
546 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
547
548 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
549 return 0;
550}
551
552static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
553 struct snd_ctl_elem_value *ucontrol)
554{
555 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
556 struct sigmatel_spec *spec = codec->spec;
00ef50c2 557 struct hda_input_mux *smux = &spec->private_smux;
d9737751 558 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 559 int err, val;
560 hda_nid_t nid;
d9737751 561
00ef50c2 562 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 563 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 564 if (err < 0)
565 return err;
566
567 if (spec->spdif_mute) {
568 if (smux_idx == 0)
569 nid = spec->multiout.dig_out_nid;
570 else
571 nid = codec->slave_dig_outs[smux_idx - 1];
572 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
573 val = AMP_OUT_MUTE;
00ef50c2 574 else
c1e99bd9 575 val = AMP_OUT_UNMUTE;
00ef50c2
MR		 576 /* un/mute SPDIF out */
577 snd_hda_codec_write_cache(codec, nid, 0,
578 AC_VERB_SET_AMP_GAIN_MUTE, val);
579 }
580 return 0;
d9737751
MR		 581}
582
c8b6bf9b 583static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 584{
585 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
586 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 587 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 588}
589
c8b6bf9b 590static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 591{
592 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
593 struct sigmatel_spec *spec = codec->spec;
594 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
595
596 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
597 return 0;
598}
599
c8b6bf9b 600static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 601{
602 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
603 struct sigmatel_spec *spec = codec->spec;
604 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
605
c7d4b2fa 606 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 607 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
608}
609
b22b4821
MR		 610static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
611 struct snd_ctl_elem_info *uinfo)
612{
613 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
614 struct sigmatel_spec *spec = codec->spec;
615 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
616}
617
618static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
619 struct snd_ctl_elem_value *ucontrol)
620{
621 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
622 struct sigmatel_spec *spec = codec->spec;
623
624 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
625 return 0;
626}
627
628static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
629 struct snd_ctl_elem_value *ucontrol)
630{
631 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
632 struct sigmatel_spec *spec = codec->spec;
633
634 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
635 spec->mono_nid, &spec->cur_mmux);
636}
637
89385035
MR		 638static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
639 struct snd_ctl_elem_info *uinfo)
640{
641 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
642 struct sigmatel_spec *spec = codec->spec;
643 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
644}
645
646static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
647 struct snd_ctl_elem_value *ucontrol)
648{
649 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
650 struct sigmatel_spec *spec = codec->spec;
651
652 ucontrol->value.enumerated.item[0] = spec->cur_amux;
653 return 0;
654}
655
656static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
657 struct snd_ctl_elem_value *ucontrol)
658{
659 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
660 struct sigmatel_spec *spec = codec->spec;
661 struct snd_kcontrol *ctl =
662 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
663 if (!ctl)
664 return -EINVAL;
665
666 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
667 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
668
669 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
670 0, &spec->cur_amux);
671}
672
5f10c4a9
ML		 673#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
674
675static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
676 struct snd_ctl_elem_value *ucontrol)
677{
678 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 679 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 680 struct sigmatel_spec *spec = codec->spec;
681
e1f0d669
MR		 682 ucontrol->value.integer.value[0] = !!(spec->aloopback &
683 (spec->aloopback_mask << idx));
5f10c4a9
ML		 684 return 0;
685}
686
687static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
688 struct snd_ctl_elem_value *ucontrol)
689{
690 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
691 struct sigmatel_spec *spec = codec->spec;
e1f0d669 692 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 693 unsigned int dac_mode;
e1f0d669 694 unsigned int val, idx_val;
5f10c4a9 695
e1f0d669
MR		 696 idx_val = spec->aloopback_mask << idx;
697 if (ucontrol->value.integer.value[0])
698 val = spec->aloopback | idx_val;
699 else
700 val = spec->aloopback & ~idx_val;
68ea7b2f 701 if (spec->aloopback == val)
5f10c4a9
ML		 702 return 0;
703
68ea7b2f 704 spec->aloopback = val;
5f10c4a9 705
e1f0d669
MR		 706 /* Only return the bits defined by the shift value of the
707 * first two bytes of the mask
708 */
5f10c4a9 709 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 710 kcontrol->private_value & 0xFFFF, 0x0);
711 dac_mode >>= spec->aloopback_shift;
5f10c4a9 712
e1f0d669 713 if (spec->aloopback & idx_val) {
5f10c4a9 714 snd_hda_power_up(codec);
e1f0d669 715 dac_mode |= idx_val;
5f10c4a9
ML		 716 } else {
717 snd_hda_power_down(codec);
e1f0d669 718 dac_mode &= ~idx_val;
5f10c4a9
ML		 719 }
720
721 snd_hda_codec_write_cache(codec, codec->afg, 0,
722 kcontrol->private_value >> 16, dac_mode);
723
724 return 1;
725}
726
c7d4b2fa 727static struct hda_verb stac9200_core_init[] = {
2f2f4251 728 /* set dac0mux for dac converter */
c7d4b2fa 729 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 730 {}
731};
732
1194b5b7
TI		 733static struct hda_verb stac9200_eapd_init[] = {
734 /* set dac0mux for dac converter */
735 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
736 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
737 {}
738};
739
e1f0d669
MR		 740static struct hda_verb stac92hd73xx_6ch_core_init[] = {
741 /* set master volume and direct control */
742 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
743 /* setup audio connections */
744 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
745 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
746 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
747 /* setup adcs to point to mixer */
748 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
749 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 750 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
751 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
752 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
753 /* setup import muxs */
754 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
755 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
756 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
757 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
758 {}
759};
760
d654a660
MR		 761static struct hda_verb dell_eq_core_init[] = {
762 /* set master volume to max value without distortion
763 * and direct control */
764 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
765 /* setup audio connections */
766 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 767 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
768 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 769 /* setup adcs to point to mixer */
770 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
771 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
772 /* setup import muxs */
773 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
774 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
775 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
776 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
777 {}
778};
779
52fe0f9d 780static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 781 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d 782 /* setup audio connections */
7747ecce
MR		 783 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
784 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 785 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
786 /* setup adcs to point to mixer */
787 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
788 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
789 /* setup import muxs */
790 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
791 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
792 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
793 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
794 {}
795};
796
e1f0d669
MR		 797static struct hda_verb stac92hd73xx_8ch_core_init[] = {
798 /* set master volume and direct control */
799 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
800 /* setup audio connections */
801 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
802 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
803 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
804 /* connect hp ports to dac3 */
805 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
806 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
807 /* setup adcs to point to mixer */
808 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
809 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 810 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
811 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
812 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
813 /* setup import muxs */
814 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
815 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
816 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
817 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
818 {}
819};
820
821static struct hda_verb stac92hd73xx_10ch_core_init[] = {
822 /* set master volume and direct control */
823 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
824 /* setup audio connections */
825 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
826 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
827 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
828 /* dac3 is connected to import3 mux */
829 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
830 /* connect hp ports to dac4 */
831 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
832 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
833 /* setup adcs to point to mixer */
834 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
835 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 836 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
837 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
838 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
839 /* setup import muxs */
840 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
841 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
842 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
843 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
844 {}
845};
846
d0513fc6
MR		 847static struct hda_verb stac92hd83xxx_core_init[] = {
848 /* start of config #1 */
849 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
850
851 /* start of config #2 */
852 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
853 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
854 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
855
856 /* power state controls amps */
857 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
858};
859
e035b841 860static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 861 /* set master volume and direct control */
862 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
863 /* connect headphone jack to dac1 */
864 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
541eee87
MR		 865 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
866 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
867 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
868 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 869};
870
4b33c767 871#define HD_DISABLE_PORTF 2
541eee87 872static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 873 /* start of config #1 */
874
875 /* connect port 0f to audio mixer */
876 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 877 /* unmute right and left channels for node 0x0f */
878 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
879 /* start of config #2 */
880
e035b841
MR		 881 /* set master volume and direct control */
882 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
883 /* connect headphone jack to dac1 */
884 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 885 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 886 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
887 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 888 {}
889};
890
8e21c34c
TD		 891static struct hda_verb stac925x_core_init[] = {
892 /* set dac0mux for dac converter */
893 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
894 {}
895};
896
c7d4b2fa 897static struct hda_verb stac922x_core_init[] = {
2f2f4251 898 /* set master volume and direct control */
c7d4b2fa 899 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 900 {}
901};
902
93ed1503 903static struct hda_verb d965_core_init[] = {
19039bd0 904 /* set master volume and direct control */
93ed1503 905 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 906 /* unmute node 0x1b */
907 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
908 /* select node 0x03 as DAC */
909 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
910 {}
911};
912
3cc08dc6
MP		 913static struct hda_verb stac927x_core_init[] = {
914 /* set master volume and direct control */
915 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 916 /* enable analog pc beep path */
917 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 918 {}
919};
920
f3302a59
MP		 921static struct hda_verb stac9205_core_init[] = {
922 /* set master volume and direct control */
923 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 924 /* enable analog pc beep path */
925 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 926 {}
927};
928
b22b4821
MR		 929#define STAC_MONO_MUX \
930 { \
931 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
932 .name = "Mono Mux", \
933 .count = 1, \
934 .info = stac92xx_mono_mux_enum_info, \
935 .get = stac92xx_mono_mux_enum_get, \
936 .put = stac92xx_mono_mux_enum_put, \
937 }
938
89385035
MR		 939#define STAC_AMP_MUX \
940 { \
941 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
942 .name = "Amp Selector Capture Switch", \
943 .count = 1, \
944 .info = stac92xx_amp_mux_enum_info, \
945 .get = stac92xx_amp_mux_enum_get, \
946 .put = stac92xx_amp_mux_enum_put, \
947 }
948
949#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
950 { \
951 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
952 .name = xname, \
953 .index = 0, \
954 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
955 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
956 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
957 .info = stac92xx_amp_volume_info, \
958 .get = stac92xx_amp_volume_get, \
959 .put = stac92xx_amp_volume_put, \
960 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
961 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
962 }
963
9e05b7a3 964#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 965 { \
966 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
967 .name = "Input Source", \
9e05b7a3 968 .count = cnt, \
ca7c5a8b
ML		 969 .info = stac92xx_mux_enum_info, \
970 .get = stac92xx_mux_enum_get, \
971 .put = stac92xx_mux_enum_put, \
972 }
973
e1f0d669 974#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 975 { \
976 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
977 .name = "Analog Loopback", \
e1f0d669 978 .count = cnt, \
5f10c4a9
ML		 979 .info = stac92xx_aloopback_info, \
980 .get = stac92xx_aloopback_get, \
981 .put = stac92xx_aloopback_put, \
982 .private_value = verb_read | (verb_write << 16), \
983 }
984
c8b6bf9b 985static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 986 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
987 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 988 STAC_INPUT_SOURCE(1),
2f2f4251
M		 989 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
990 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 991 { } /* end */
992};
993
2a9c7816 994#define DELL_M6_MIXER 6
e1f0d669 995static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 996 /* start of config #1 */
e1f0d669
MR		 997 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
998 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
999
e1f0d669
MR		 1000 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1001 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1002
2a9c7816
MR		 1003 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1004 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1005
1006 /* start of config #2 */
1007 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1008 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1009
e1f0d669
MR		 1010 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1011 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1012
2a9c7816
MR		 1013 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1014
1015 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1016 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1017
1018 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1019 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1020
e1f0d669
MR		 1021 { } /* end */
1022};
1023
1024static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1025 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1026
e1f0d669
MR		 1027 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1028 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1029
1030 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1031 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1032
1033 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1034 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1035
1036 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1037 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1038
1039 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1040 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1041
1042 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1043 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1044
1045 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1046 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1047 { } /* end */
1048};
1049
1050static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1051 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1052
e1f0d669
MR		 1053 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1054 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1055
1056 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1057 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1058
1059 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1060 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1061
1062 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1063 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1064
1065 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1066 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1067
1068 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1069 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1070
1071 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1072 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1073 { } /* end */
1074};
1075
d0513fc6
MR		 1076
1077static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1078 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1079 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1080
1081 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1082 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1083
1084 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1085 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1086
1087 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1088 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1089
1090 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1091 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1092
1093 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1094 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1095
1096 /*
1097 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1098 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1099 */
1100 { } /* end */
1101};
1102
541eee87 1103static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1104 STAC_INPUT_SOURCE(2),
4b33c767 1105 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1106
9b35947f
MR		 1107 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1108 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1109
1110 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1111 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1112 /* analog pc-beep replaced with digital beep support */
1113 /*
f7c5dda2
MR		 1114 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1115 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1116 */
f7c5dda2 1117
687cb98e
MR		 1118 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1119 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1120
687cb98e
MR		 1121 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1122 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1123
1124 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1125 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1126
1127 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1128 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1129 { } /* end */
1130};
1131
541eee87 1132static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1133 STAC_INPUT_SOURCE(2),
1134 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1135
541eee87
MR		 1136 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1137 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1138
1139 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1140 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1141 { } /* end */
1142};
1143
8e21c34c 1144static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1145 STAC_INPUT_SOURCE(1),
8e21c34c 1146 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1147 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1148 { } /* end */
1149};
1150
9e05b7a3 1151static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1152 STAC_INPUT_SOURCE(2),
e1f0d669 1153 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1154
1155 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1156 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1157
1158 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1159 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1160 { } /* end */
1161};
1162
19039bd0 1163/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1164static struct snd_kcontrol_new stac922x_mixer[] = {
1165 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1166 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1167 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1168
1169 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1170 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1171 { } /* end */
1172};
1173
9e05b7a3 1174
d1d985f0 1175static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1176 STAC_INPUT_SOURCE(3),
e1f0d669 1177 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1178
9e05b7a3
ML		 1179 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1180 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1181
1182 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1183 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1184
1185 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1186 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1187 { } /* end */
1188};
1189
1697055e
TI		 1190static struct snd_kcontrol_new stac_dmux_mixer = {
1191 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1192 .name = "Digital Input Source",
1193 /* count set later */
1194 .info = stac92xx_dmux_enum_info,
1195 .get = stac92xx_dmux_enum_get,
1196 .put = stac92xx_dmux_enum_put,
1197};
1198
d9737751
MR		 1199static struct snd_kcontrol_new stac_smux_mixer = {
1200 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1201 .name = "IEC958 Playback Source",
d9737751
MR		 1202 /* count set later */
1203 .info = stac92xx_smux_enum_info,
1204 .get = stac92xx_smux_enum_get,
1205 .put = stac92xx_smux_enum_put,
1206};
1207
2134ea4f
TI		 1208static const char *slave_vols[] = {
1209 "Front Playback Volume",
1210 "Surround Playback Volume",
1211 "Center Playback Volume",
1212 "LFE Playback Volume",
1213 "Side Playback Volume",
1214 "Headphone Playback Volume",
1215 "Headphone Playback Volume",
1216 "Speaker Playback Volume",
1217 "External Speaker Playback Volume",
1218 "Speaker2 Playback Volume",
1219 NULL
1220};
1221
1222static const char *slave_sws[] = {
1223 "Front Playback Switch",
1224 "Surround Playback Switch",
1225 "Center Playback Switch",
1226 "LFE Playback Switch",
1227 "Side Playback Switch",
1228 "Headphone Playback Switch",
1229 "Headphone Playback Switch",
1230 "Speaker Playback Switch",
1231 "External Speaker Playback Switch",
1232 "Speaker2 Playback Switch",
edb54a55 1233 "IEC958 Playback Switch",
2134ea4f
TI		 1234 NULL
1235};
1236
2f2f4251
M		 1237static int stac92xx_build_controls(struct hda_codec *codec)
1238{
1239 struct sigmatel_spec *spec = codec->spec;
1240 int err;
c7d4b2fa 1241 int i;
2f2f4251
M		 1242
1243 err = snd_hda_add_new_ctls(codec, spec->mixer);
1244 if (err < 0)
1245 return err;
c7d4b2fa
M		 1246
1247 for (i = 0; i < spec->num_mixers; i++) {
1248 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1249 if (err < 0)
1250 return err;
1251 }
1697055e
TI		 1252 if (spec->num_dmuxes > 0) {
1253 stac_dmux_mixer.count = spec->num_dmuxes;
1254 err = snd_ctl_add(codec->bus->card,
1255 snd_ctl_new1(&stac_dmux_mixer, codec));
1256 if (err < 0)
1257 return err;
1258 }
d9737751 1259 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1260 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1261 struct hda_input_mux *smux = &spec->private_smux;
1262 /* check for mute support on SPDIF out */
1263 if (wcaps & AC_WCAP_OUT_AMP) {
1264 smux->items[smux->num_items].label = "Off";
1265 smux->items[smux->num_items].index = 0;
1266 smux->num_items++;
1267 spec->spdif_mute = 1;
1268 }
d9737751
MR		 1269 stac_smux_mixer.count = spec->num_smuxes;
1270 err = snd_ctl_add(codec->bus->card,
1271 snd_ctl_new1(&stac_smux_mixer, codec));
1272 if (err < 0)
1273 return err;
1274 }
c7d4b2fa 1275
dabbed6f
M		 1276 if (spec->multiout.dig_out_nid) {
1277 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1278 if (err < 0)
1279 return err;
9a08160b
TI		 1280 err = snd_hda_create_spdif_share_sw(codec,
1281 &spec->multiout);
1282 if (err < 0)
1283 return err;
1284 spec->multiout.share_spdif = 1;
dabbed6f 1285 }
da74ae3e 1286 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1287 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1288 if (err < 0)
1289 return err;
1290 }
2134ea4f
TI		 1291
1292 /* if we have no master control, let's create it */
1293 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1294 unsigned int vmaster_tlv[4];
2134ea4f 1295 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1296 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1297 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1298 vmaster_tlv, slave_vols);
2134ea4f
TI		 1299 if (err < 0)
1300 return err;
1301 }
1302 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1303 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1304 NULL, slave_sws);
1305 if (err < 0)
1306 return err;
1307 }
1308
dabbed6f 1309 return 0;
2f2f4251
M		 1310}
1311
403d1944 1312static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1313 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1314 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1315};
1316
dfe495d0
TI		 1317/*
1318 STAC 9200 pin configs for
1319 102801A8
1320 102801DE
1321 102801E8
1322*/
1323static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1324 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1325 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1326};
1327
1328/*
1329 STAC 9200 pin configs for
1330 102801C0
1331 102801C1
1332*/
1333static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1334 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1335 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1336};
1337
1338/*
1339 STAC 9200 pin configs for
1340 102801C4 (Dell Dimension E310)
1341 102801C5
1342 102801C7
1343 102801D9
1344 102801DA
1345 102801E3
1346*/
1347static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1348 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1349 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1350};
1351
1352
1353/*
1354 STAC 9200-32 pin configs for
1355 102801B5 (Dell Inspiron 630m)
1356 102801D8 (Dell Inspiron 640m)
1357*/
1358static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1359 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1360 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1361};
1362
1363/*
1364 STAC 9200-32 pin configs for
1365 102801C2 (Dell Latitude D620)
1366 102801C8
1367 102801CC (Dell Latitude D820)
1368 102801D4
1369 102801D6
1370*/
1371static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1372 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1373 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1374};
1375
1376/*
1377 STAC 9200-32 pin configs for
1378 102801CE (Dell XPS M1710)
1379 102801CF (Dell Precision M90)
1380*/
1381static unsigned int dell9200_m23_pin_configs[8] = {
1382 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1383 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1384};
1385
1386/*
1387 STAC 9200-32 pin configs for
1388 102801C9
1389 102801CA
1390 102801CB (Dell Latitude 120L)
1391 102801D3
1392*/
1393static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1394 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1395 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1396};
1397
1398/*
1399 STAC 9200-32 pin configs for
1400 102801BD (Dell Inspiron E1505n)
1401 102801EE
1402 102801EF
1403*/
1404static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1405 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1406 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1407};
1408
1409/*
1410 STAC 9200-32 pin configs for
1411 102801F5 (Dell Inspiron 1501)
1412 102801F6
1413*/
1414static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1415 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1416 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1417};
1418
1419/*
1420 STAC 9200-32
1421 102801CD (Dell Inspiron E1705/9400)
1422*/
1423static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1424 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1425 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1426};
1427
bf277785
TD		 1428static unsigned int oqo9200_pin_configs[8] = {
1429 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1430 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1431};
1432
dfe495d0 1433
f5fcc13c
TI		 1434static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1435 [STAC_REF] = ref9200_pin_configs,
bf277785 1436 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1437 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1438 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1439 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1440 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1441 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1442 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1443 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1444 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1445 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1446 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1447 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1448};
1449
f5fcc13c
TI		 1450static const char *stac9200_models[STAC_9200_MODELS] = {
1451 [STAC_REF] = "ref",
bf277785 1452 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1453 [STAC_9200_DELL_D21] = "dell-d21",
1454 [STAC_9200_DELL_D22] = "dell-d22",
1455 [STAC_9200_DELL_D23] = "dell-d23",
1456 [STAC_9200_DELL_M21] = "dell-m21",
1457 [STAC_9200_DELL_M22] = "dell-m22",
1458 [STAC_9200_DELL_M23] = "dell-m23",
1459 [STAC_9200_DELL_M24] = "dell-m24",
1460 [STAC_9200_DELL_M25] = "dell-m25",
1461 [STAC_9200_DELL_M26] = "dell-m26",
1462 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1463 [STAC_9200_GATEWAY] = "gateway",
117f257d 1464 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1465};
1466
1467static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1468 /* SigmaTel reference board */
1469 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1470 "DFI LanParty", STAC_REF),
e7377071 1471 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1472 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1473 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1475 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1477 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1479 "unknown Dell", STAC_9200_DELL_D22),
1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1481 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1483 "Dell Latitude D620", STAC_9200_DELL_M22),
1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1485 "unknown Dell", STAC_9200_DELL_D23),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1487 "unknown Dell", STAC_9200_DELL_D23),
1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1489 "unknown Dell", STAC_9200_DELL_M22),
1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1491 "unknown Dell", STAC_9200_DELL_M24),
1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1493 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1495 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1497 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1499 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1501 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1503 "Dell Precision M90", STAC_9200_DELL_M23),
1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1505 "unknown Dell", STAC_9200_DELL_M22),
1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1507 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1509 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1511 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1513 "unknown Dell", STAC_9200_DELL_D23),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1515 "unknown Dell", STAC_9200_DELL_D23),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1517 "unknown Dell", STAC_9200_DELL_D21),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1519 "unknown Dell", STAC_9200_DELL_D23),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1521 "unknown Dell", STAC_9200_DELL_D21),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1523 "unknown Dell", STAC_9200_DELL_M25),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1525 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1527 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1529 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1530 /* Panasonic */
117f257d 1531 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1532 /* Gateway machines needs EAPD to be set on resume */
1533 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1534 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1535 STAC_9200_GATEWAY),
1536 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1537 STAC_9200_GATEWAY),
bf277785
TD		 1538 /* OQO Mobile */
1539 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1540 {} /* terminator */
1541};
1542
8e21c34c
TD		 1543static unsigned int ref925x_pin_configs[8] = {
1544 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1545 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1546};
1547
1548static unsigned int stac925x_MA6_pin_configs[8] = {
1549 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1550 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1551};
1552
2c11f955
TD		 1553static unsigned int stac925x_PA6_pin_configs[8] = {
1554 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1555 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1556};
1557
8e21c34c 1558static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1559 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1560 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1561};
1562
1563static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1564 [STAC_REF] = ref925x_pin_configs,
1565 [STAC_M2_2] = stac925xM2_2_pin_configs,
1566 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1567 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1568};
1569
1570static const char *stac925x_models[STAC_925x_MODELS] = {
1571 [STAC_REF] = "ref",
1572 [STAC_M2_2] = "m2-2",
1573 [STAC_MA6] = "m6",
2c11f955 1574 [STAC_PA6] = "pa6",
8e21c34c
TD		 1575};
1576
1577static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1578 /* SigmaTel reference board */
1579 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1580 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1581 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1582 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1583 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1584 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1585 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1586 {} /* terminator */
1587};
1588
a7662640 1589static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1590 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1591 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1592 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1593 0x01452050,
1594};
1595
1596static unsigned int dell_m6_pin_configs[13] = {
1597 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1598 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1599 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1600 0x4f0000f0,
e1f0d669
MR		 1601};
1602
1603static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1604 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1605 [STAC_DELL_M6] = dell_m6_pin_configs,
6b3ab21e 1606 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1607};
1608
1609static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1610 [STAC_92HD73XX_REF] = "ref",
a7662640 1611 [STAC_DELL_M6] = "dell-m6",
6b3ab21e 1612 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1613};
1614
1615static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1616 /* SigmaTel reference board */
1617 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1618 "DFI LanParty", STAC_92HD73XX_REF),
1619 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1620 "unknown Dell", STAC_DELL_M6),
1621 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1622 "unknown Dell", STAC_DELL_M6),
1623 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1624 "unknown Dell", STAC_DELL_M6),
1625 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1626 "unknown Dell", STAC_DELL_M6),
1627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1628 "unknown Dell", STAC_DELL_M6),
1629 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1630 "unknown Dell", STAC_DELL_M6),
1631 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1632 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1633 {} /* terminator */
1634};
1635
d0513fc6
MR		 1636static unsigned int ref92hd83xxx_pin_configs[14] = {
1637 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1638 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1639 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1640 0x01451160, 0x98560170,
1641};
1642
1643static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1644 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1645};
1646
1647static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1648 [STAC_92HD83XXX_REF] = "ref",
1649};
1650
1651static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1652 /* SigmaTel reference board */
1653 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1654 "DFI LanParty", STAC_92HD71BXX_REF),
1655};
1656
0ffa9807 1657static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1658 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1659 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1660 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1661};
1662
0ffa9807 1663static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1664 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1665 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1666 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1667};
1668
0ffa9807 1669static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1670 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1671 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1672 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1673};
1674
3a7abfd2
MR		 1675static unsigned int dell_m4_3_pin_configs[11] = {
1676 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1677 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1678 0x40f000f0, 0x044413b0, 0x044413b0,
1679};
1680
e035b841
MR		 1681static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1682 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1683 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1684 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1685 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1686 [STAC_HP_M4] = NULL,
e035b841
MR		 1687};
1688
1689static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1690 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1691 [STAC_DELL_M4_1] = "dell-m4-1",
1692 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1693 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1694 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1695};
1696
1697static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1698 /* SigmaTel reference board */
1699 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1700 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1701 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1702 "HP dv5", STAC_HP_M4),
1703 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1704 "HP dv7", STAC_HP_M4),
9a9e2359
MR		 1705 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1706 "unknown HP", STAC_HP_M4),
a7662640
MR		 1707 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1708 "unknown Dell", STAC_DELL_M4_1),
1709 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1710 "unknown Dell", STAC_DELL_M4_1),
1711 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1712 "unknown Dell", STAC_DELL_M4_1),
1713 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1714 "unknown Dell", STAC_DELL_M4_1),
1715 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1716 "unknown Dell", STAC_DELL_M4_1),
1717 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1718 "unknown Dell", STAC_DELL_M4_1),
1719 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1720 "unknown Dell", STAC_DELL_M4_1),
1721 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1722 "unknown Dell", STAC_DELL_M4_2),
1723 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1724 "unknown Dell", STAC_DELL_M4_2),
1725 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1726 "unknown Dell", STAC_DELL_M4_2),
1727 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1728 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1729 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1730 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1731 {} /* terminator */
1732};
1733
403d1944
MP		 1734static unsigned int ref922x_pin_configs[10] = {
1735 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1736 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1737 0x40000100, 0x40000100,
1738};
1739
dfe495d0
TI		 1740/*
1741 STAC 922X pin configs for
1742 102801A7
1743 102801AB
1744 102801A9
1745 102801D1
1746 102801D2
1747*/
1748static unsigned int dell_922x_d81_pin_configs[10] = {
1749 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1750 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1751 0x01813122, 0x400001f2,
1752};
1753
1754/*
1755 STAC 922X pin configs for
1756 102801AC
1757 102801D0
1758*/
1759static unsigned int dell_922x_d82_pin_configs[10] = {
1760 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1761 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1762 0x01813122, 0x400001f1,
1763};
1764
1765/*
1766 STAC 922X pin configs for
1767 102801BF
1768*/
1769static unsigned int dell_922x_m81_pin_configs[10] = {
1770 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1771 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1772 0x40C003f1, 0x405003f0,
1773};
1774
1775/*
1776 STAC 9221 A1 pin configs for
1777 102801D7 (Dell XPS M1210)
1778*/
1779static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1780 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1781 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1782 0x508003f3, 0x405003f4,
1783};
1784
403d1944 1785static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1786 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1787 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1788 0x02a19120, 0x40000100,
1789};
1790
1791static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1792 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1793 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1794 0x02a19320, 0x40000100,
1795};
1796
5d5d3bc3
IZ		 1797static unsigned int intel_mac_v1_pin_configs[10] = {
1798 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1799 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1800 0x400000fc, 0x400000fb,
1801};
1802
1803static unsigned int intel_mac_v2_pin_configs[10] = {
1804 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1805 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1806 0x400000fc, 0x400000fb,
6f0778d8
NB		 1807};
1808
5d5d3bc3
IZ		 1809static unsigned int intel_mac_v3_pin_configs[10] = {
1810 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1811 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1812 0x400000fc, 0x400000fb,
1813};
1814
5d5d3bc3
IZ		 1815static unsigned int intel_mac_v4_pin_configs[10] = {
1816 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1817 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1818 0x400000fc, 0x400000fb,
1819};
1820
5d5d3bc3
IZ		 1821static unsigned int intel_mac_v5_pin_configs[10] = {
1822 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1823 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1824 0x400000fc, 0x400000fb,
0dae0f83
TI		 1825};
1826
8c650087
MCC		 1827static unsigned int ecs202_pin_configs[10] = {
1828 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1829 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1830 0x9037012e, 0x40e000f2,
1831};
76c08828 1832
19039bd0 1833static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1834 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1835 [STAC_D945GTP3] = d945gtp3_pin_configs,
1836 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1837 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1838 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1839 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1840 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1841 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1842 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1843 /* for backward compatibility */
5d5d3bc3
IZ		 1844 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1845 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1846 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1847 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1848 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1849 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1850 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1851 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1852 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1853 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1854 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1855};
1856
f5fcc13c
TI		 1857static const char *stac922x_models[STAC_922X_MODELS] = {
1858 [STAC_D945_REF] = "ref",
1859 [STAC_D945GTP5] = "5stack",
1860 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1861 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1862 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1863 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1864 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1865 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1866 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1867 /* for backward compatibility */
f5fcc13c 1868 [STAC_MACMINI] = "macmini",
3fc24d85 1869 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1870 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1871 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1872 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1873 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1874 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1875 [STAC_922X_DELL_D81] = "dell-d81",
1876 [STAC_922X_DELL_D82] = "dell-d82",
1877 [STAC_922X_DELL_M81] = "dell-m81",
1878 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1879};
1880
1881static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1882 /* SigmaTel reference board */
1883 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1884 "DFI LanParty", STAC_D945_REF),
1885 /* Intel 945G based systems */
1886 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1887 "Intel D945G", STAC_D945GTP3),
1888 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1889 "Intel D945G", STAC_D945GTP3),
1890 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1891 "Intel D945G", STAC_D945GTP3),
1892 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1893 "Intel D945G", STAC_D945GTP3),
1894 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1895 "Intel D945G", STAC_D945GTP3),
1896 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1897 "Intel D945G", STAC_D945GTP3),
1898 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1899 "Intel D945G", STAC_D945GTP3),
1900 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1901 "Intel D945G", STAC_D945GTP3),
1902 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1903 "Intel D945G", STAC_D945GTP3),
1904 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1905 "Intel D945G", STAC_D945GTP3),
1906 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1907 "Intel D945G", STAC_D945GTP3),
1908 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1909 "Intel D945G", STAC_D945GTP3),
1910 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1911 "Intel D945G", STAC_D945GTP3),
1912 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1913 "Intel D945G", STAC_D945GTP3),
1914 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1915 "Intel D945G", STAC_D945GTP3),
1916 /* Intel D945G 5-stack systems */
1917 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1918 "Intel D945G", STAC_D945GTP5),
1919 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1920 "Intel D945G", STAC_D945GTP5),
1921 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1922 "Intel D945G", STAC_D945GTP5),
1923 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1924 "Intel D945G", STAC_D945GTP5),
1925 /* Intel 945P based systems */
1926 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1927 "Intel D945P", STAC_D945GTP3),
1928 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1929 "Intel D945P", STAC_D945GTP3),
1930 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1931 "Intel D945P", STAC_D945GTP3),
1932 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1933 "Intel D945P", STAC_D945GTP3),
1934 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1935 "Intel D945P", STAC_D945GTP3),
1936 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1937 "Intel D945P", STAC_D945GTP5),
1938 /* other systems */
536319af 1939 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1940 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1941 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1942 /* Dell systems */
1943 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1944 "unknown Dell", STAC_922X_DELL_D81),
1945 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1946 "unknown Dell", STAC_922X_DELL_D81),
1947 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1948 "unknown Dell", STAC_922X_DELL_D81),
1949 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1950 "unknown Dell", STAC_922X_DELL_D82),
1951 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1952 "unknown Dell", STAC_922X_DELL_M81),
1953 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1954 "unknown Dell", STAC_922X_DELL_D82),
1955 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1956 "unknown Dell", STAC_922X_DELL_D81),
1957 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1958 "unknown Dell", STAC_922X_DELL_D81),
1959 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1960 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1961 /* ECS/PC Chips boards */
1962 SND_PCI_QUIRK(0x1019, 0x2144,
1963 "ECS/PC chips", STAC_ECS_202),
1964 SND_PCI_QUIRK(0x1019, 0x2608,
1965 "ECS/PC chips", STAC_ECS_202),
1966 SND_PCI_QUIRK(0x1019, 0x2633,
1967 "ECS/PC chips P17G/1333", STAC_ECS_202),
1968 SND_PCI_QUIRK(0x1019, 0x2811,
1969 "ECS/PC chips", STAC_ECS_202),
1970 SND_PCI_QUIRK(0x1019, 0x2812,
1971 "ECS/PC chips", STAC_ECS_202),
1972 SND_PCI_QUIRK(0x1019, 0x2813,
1973 "ECS/PC chips", STAC_ECS_202),
1974 SND_PCI_QUIRK(0x1019, 0x2814,
1975 "ECS/PC chips", STAC_ECS_202),
1976 SND_PCI_QUIRK(0x1019, 0x2815,
1977 "ECS/PC chips", STAC_ECS_202),
1978 SND_PCI_QUIRK(0x1019, 0x2816,
1979 "ECS/PC chips", STAC_ECS_202),
1980 SND_PCI_QUIRK(0x1019, 0x2817,
1981 "ECS/PC chips", STAC_ECS_202),
1982 SND_PCI_QUIRK(0x1019, 0x2818,
1983 "ECS/PC chips", STAC_ECS_202),
1984 SND_PCI_QUIRK(0x1019, 0x2819,
1985 "ECS/PC chips", STAC_ECS_202),
1986 SND_PCI_QUIRK(0x1019, 0x2820,
1987 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 1988 {} /* terminator */
1989};
1990
3cc08dc6 1991static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1992 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1993 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1994 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1995 0x01c42190, 0x40000100,
3cc08dc6
MP		 1996};
1997
93ed1503 1998static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1999 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2000 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2001 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2002 0x40000100, 0x40000100
2003};
2004
93ed1503
TD		 2005static unsigned int d965_5st_pin_configs[14] = {
2006 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2007 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2008 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2009 0x40000100, 0x40000100
2010};
2011
4ff076e5
TD		 2012static unsigned int dell_3st_pin_configs[14] = {
2013 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2014 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2015 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2016 0x40c003fc, 0x40000100
2017};
2018
93ed1503 2019static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 2020 [STAC_D965_REF] = ref927x_pin_configs,
2021 [STAC_D965_3ST] = d965_3st_pin_configs,
2022 [STAC_D965_5ST] = d965_5st_pin_configs,
2023 [STAC_DELL_3ST] = dell_3st_pin_configs,
2024 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2025};
2026
f5fcc13c 2027static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 2028 [STAC_D965_REF] = "ref",
2029 [STAC_D965_3ST] = "3stack",
2030 [STAC_D965_5ST] = "5stack",
2031 [STAC_DELL_3ST] = "dell-3stack",
2032 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2033};
2034
2035static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2036 /* SigmaTel reference board */
2037 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2038 "DFI LanParty", STAC_D965_REF),
81d3dbde 2039 /* Intel 946 based systems */
f5fcc13c
TI		 2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2041 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2042 /* 965 based 3 stack systems */
f5fcc13c
TI		 2043 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2044 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2045 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2046 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2048 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2050 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2052 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2058 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2059 /* Dell 3 stack systems */
8e9068b1 2060 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2061 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2062 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2064 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2065 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2066 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2067 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2068 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2069 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2070 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2071 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2072 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2073 /* 965 based 5 stack systems */
f5fcc13c
TI		 2074 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2075 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2076 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2077 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2078 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2079 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2080 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2081 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2082 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2083 {} /* terminator */
2084};
2085
f3302a59
MP		 2086static unsigned int ref9205_pin_configs[12] = {
2087 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2088 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2089 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2090};
2091
dfe495d0
TI		 2092/*
2093 STAC 9205 pin configs for
2094 102801F1
2095 102801F2
2096 102801FC
2097 102801FD
2098 10280204
2099 1028021F
3fa2ef74 2100 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2101*/
2102static unsigned int dell_9205_m42_pin_configs[12] = {
2103 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2104 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2105 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2106};
2107
2108/*
2109 STAC 9205 pin configs for
2110 102801F9
2111 102801FA
2112 102801FE
2113 102801FF (Dell Precision M4300)
2114 10280206
2115 10280200
2116 10280201
2117*/
2118static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2119 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2120 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2121 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2122};
2123
dfe495d0 2124static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2125 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2126 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2127 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2128};
2129
f5fcc13c 2130static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2131 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2132 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2133 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2134 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2135};
2136
f5fcc13c
TI		 2137static const char *stac9205_models[STAC_9205_MODELS] = {
2138 [STAC_9205_REF] = "ref",
dfe495d0 2139 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2140 [STAC_9205_DELL_M43] = "dell-m43",
2141 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2142};
2143
2144static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2145 /* SigmaTel reference board */
2146 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2147 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2148 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2149 "unknown Dell", STAC_9205_DELL_M42),
2150 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2151 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2152 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2153 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2154 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2155 "Dell Precision", STAC_9205_DELL_M43),
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2157 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2158 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2159 "unknown Dell", STAC_9205_DELL_M42),
2160 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2161 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2162 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2163 "Dell Precision", STAC_9205_DELL_M43),
2164 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2165 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2167 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2169 "Dell Precision", STAC_9205_DELL_M43),
2170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2171 "Dell Precision", STAC_9205_DELL_M43),
2172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2173 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2175 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2177 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2178 {} /* terminator */
2179};
2180
11b44bbd
RF		 2181static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2182{
2183 int i;
2184 struct sigmatel_spec *spec = codec->spec;
2185
2186 if (! spec->bios_pin_configs) {
2187 spec->bios_pin_configs = kcalloc(spec->num_pins,
2188 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
2189 if (! spec->bios_pin_configs)
2190 return -ENOMEM;
2191 }
2192
2193 for (i = 0; i < spec->num_pins; i++) {
2194 hda_nid_t nid = spec->pin_nids[i];
2195 unsigned int pin_cfg;
2196
2197 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2198 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2199 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2200 nid, pin_cfg);
2201 spec->bios_pin_configs[i] = pin_cfg;
2202 }
2203
2204 return 0;
2205}
2206
87d48363
MR		 2207static void stac92xx_set_config_reg(struct hda_codec *codec,
2208 hda_nid_t pin_nid, unsigned int pin_config)
2209{
2210 int i;
2211 snd_hda_codec_write(codec, pin_nid, 0,
2212 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2213 pin_config & 0x000000ff);
2214 snd_hda_codec_write(codec, pin_nid, 0,
2215 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2216 (pin_config & 0x0000ff00) >> 8);
2217 snd_hda_codec_write(codec, pin_nid, 0,
2218 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2219 (pin_config & 0x00ff0000) >> 16);
2220 snd_hda_codec_write(codec, pin_nid, 0,
2221 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2222 pin_config >> 24);
2223 i = snd_hda_codec_read(codec, pin_nid, 0,
2224 AC_VERB_GET_CONFIG_DEFAULT,
2225 0x00);
2226 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2227 pin_nid, i);
2228}
2229
2f2f4251
M		 2230static void stac92xx_set_config_regs(struct hda_codec *codec)
2231{
2232 int i;
2233 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2234
87d48363
MR		 2235 if (!spec->pin_configs)
2236 return;
11b44bbd 2237
87d48363
MR		 2238 for (i = 0; i < spec->num_pins; i++)
2239 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2240 spec->pin_configs[i]);
2f2f4251 2241}
2f2f4251 2242
dabbed6f 2243/*
c7d4b2fa 2244 * Analog playback callbacks
dabbed6f 2245 */
c7d4b2fa
M		 2246static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2247 struct hda_codec *codec,
c8b6bf9b 2248 struct snd_pcm_substream *substream)
2f2f4251 2249{
dabbed6f 2250 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2251 if (spec->stream_delay)
2252 msleep(spec->stream_delay);
9a08160b
TI		 2253 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2254 hinfo);
2f2f4251
M		 2255}
2256
2f2f4251
M		 2257static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2258 struct hda_codec *codec,
2259 unsigned int stream_tag,
2260 unsigned int format,
c8b6bf9b 2261 struct snd_pcm_substream *substream)
2f2f4251
M		 2262{
2263 struct sigmatel_spec *spec = codec->spec;
403d1944 2264 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2265}
2266
2267static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2268 struct hda_codec *codec,
c8b6bf9b 2269 struct snd_pcm_substream *substream)
2f2f4251
M		 2270{
2271 struct sigmatel_spec *spec = codec->spec;
2272 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2273}
2274
dabbed6f
M		 2275/*
2276 * Digital playback callbacks
2277 */
2278static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2279 struct hda_codec *codec,
c8b6bf9b 2280 struct snd_pcm_substream *substream)
dabbed6f
M		 2281{
2282 struct sigmatel_spec *spec = codec->spec;
2283 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2284}
2285
2286static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2287 struct hda_codec *codec,
c8b6bf9b 2288 struct snd_pcm_substream *substream)
dabbed6f
M		 2289{
2290 struct sigmatel_spec *spec = codec->spec;
2291 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2292}
2293
6b97eb45
TI		 2294static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2295 struct hda_codec *codec,
2296 unsigned int stream_tag,
2297 unsigned int format,
2298 struct snd_pcm_substream *substream)
2299{
2300 struct sigmatel_spec *spec = codec->spec;
2301 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2302 stream_tag, format, substream);
2303}
2304
dabbed6f 2305
2f2f4251
M		 2306/*
2307 * Analog capture callbacks
2308 */
2309static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2310 struct hda_codec *codec,
2311 unsigned int stream_tag,
2312 unsigned int format,
c8b6bf9b 2313 struct snd_pcm_substream *substream)
2f2f4251
M		 2314{
2315 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2316 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2317
8daaaa97
MR		 2318 if (spec->powerdown_adcs) {
2319 msleep(40);
2320 snd_hda_codec_write_cache(codec, nid, 0,
2321 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2322 }
2323 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2324 return 0;
2325}
2326
2327static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2328 struct hda_codec *codec,
c8b6bf9b 2329 struct snd_pcm_substream *substream)
2f2f4251
M		 2330{
2331 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2332 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2333
8daaaa97
MR		 2334 snd_hda_codec_cleanup_stream(codec, nid);
2335 if (spec->powerdown_adcs)
2336 snd_hda_codec_write_cache(codec, nid, 0,
2337 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2338 return 0;
2339}
2340
dabbed6f
M		 2341static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2342 .substreams = 1,
2343 .channels_min = 2,
2344 .channels_max = 2,
2345 /* NID is set in stac92xx_build_pcms */
2346 .ops = {
2347 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2348 .close = stac92xx_dig_playback_pcm_close,
2349 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2350 },
2351};
2352
2353static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2354 .substreams = 1,
2355 .channels_min = 2,
2356 .channels_max = 2,
2357 /* NID is set in stac92xx_build_pcms */
2358};
2359
2f2f4251
M		 2360static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2361 .substreams = 1,
2362 .channels_min = 2,
c7d4b2fa 2363 .channels_max = 8,
2f2f4251
M		 2364 .nid = 0x02, /* NID to query formats and rates */
2365 .ops = {
2366 .open = stac92xx_playback_pcm_open,
2367 .prepare = stac92xx_playback_pcm_prepare,
2368 .cleanup = stac92xx_playback_pcm_cleanup
2369 },
2370};
2371
3cc08dc6
MP		 2372static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2373 .substreams = 1,
2374 .channels_min = 2,
2375 .channels_max = 2,
2376 .nid = 0x06, /* NID to query formats and rates */
2377 .ops = {
2378 .open = stac92xx_playback_pcm_open,
2379 .prepare = stac92xx_playback_pcm_prepare,
2380 .cleanup = stac92xx_playback_pcm_cleanup
2381 },
2382};
2383
2f2f4251 2384static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2385 .channels_min = 2,
2386 .channels_max = 2,
9e05b7a3 2387 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2388 .ops = {
2389 .prepare = stac92xx_capture_pcm_prepare,
2390 .cleanup = stac92xx_capture_pcm_cleanup
2391 },
2392};
2393
2394static int stac92xx_build_pcms(struct hda_codec *codec)
2395{
2396 struct sigmatel_spec *spec = codec->spec;
2397 struct hda_pcm *info = spec->pcm_rec;
2398
2399 codec->num_pcms = 1;
2400 codec->pcm_info = info;
2401
c7d4b2fa 2402 info->name = "STAC92xx Analog";
2f2f4251 2403 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2404 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2405 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2406 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2407
2408 if (spec->alt_switch) {
2409 codec->num_pcms++;
2410 info++;
2411 info->name = "STAC92xx Analog Alt";
2412 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2413 }
2f2f4251 2414
dabbed6f
M		 2415 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2416 codec->num_pcms++;
2417 info++;
2418 info->name = "STAC92xx Digital";
7ba72ba1 2419 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2420 if (spec->multiout.dig_out_nid) {
2421 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2422 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2423 }
2424 if (spec->dig_in_nid) {
2425 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2426 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2427 }
2428 }
2429
2f2f4251
M		 2430 return 0;
2431}
2432
c960a03b
TI		 2433static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2434{
2435 unsigned int pincap = snd_hda_param_read(codec, nid,
2436 AC_PAR_PIN_CAP);
2437 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2438 if (pincap & AC_PINCAP_VREF_100)
2439 return AC_PINCTL_VREF_100;
2440 if (pincap & AC_PINCAP_VREF_80)
2441 return AC_PINCTL_VREF_80;
2442 if (pincap & AC_PINCAP_VREF_50)
2443 return AC_PINCTL_VREF_50;
2444 if (pincap & AC_PINCAP_VREF_GRD)
2445 return AC_PINCTL_VREF_GRD;
2446 return 0;
2447}
2448
403d1944
MP		 2449static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2450
2451{
82beb8fd
TI		 2452 snd_hda_codec_write_cache(codec, nid, 0,
2453 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2454}
2455
7c2ba97b
MR		 2456#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2457
2458static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2459 struct snd_ctl_elem_value *ucontrol)
2460{
2461 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2462 struct sigmatel_spec *spec = codec->spec;
2463
d7a89436 2464 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2465 return 0;
2466}
2467
2468static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2469 struct snd_ctl_elem_value *ucontrol)
2470{
2471 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2472 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2473 int nid = kcontrol->private_value;
2474
2475 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2476
2477 /* check to be sure that the ports are upto date with
2478 * switch changes
2479 */
2480 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2481
2482 return 1;
2483}
2484
a5ce8890 2485#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2486
2487static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2488{
2489 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2490 struct sigmatel_spec *spec = codec->spec;
2491 int io_idx = kcontrol-> private_value & 0xff;
2492
2493 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2494 return 0;
2495}
2496
2497static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2498{
2499 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2500 struct sigmatel_spec *spec = codec->spec;
2501 hda_nid_t nid = kcontrol->private_value >> 8;
2502 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2503 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2504
2505 spec->io_switch[io_idx] = val;
2506
2507 if (val)
2508 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2509 else {
2510 unsigned int pinctl = AC_PINCTL_IN_EN;
2511 if (io_idx) /* set VREF for mic */
2512 pinctl |= stac92xx_get_vref(codec, nid);
2513 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2514 }
40c1d308
JZ		 2515
2516 /* check the auto-mute again: we need to mute/unmute the speaker
2517 * appropriately according to the pin direction
2518 */
2519 if (spec->hp_detect)
2520 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2521
403d1944
MP		 2522 return 1;
2523}
2524
0fb87bb4
ML		 2525#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2526
2527static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2528 struct snd_ctl_elem_value *ucontrol)
2529{
2530 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2531 struct sigmatel_spec *spec = codec->spec;
2532
2533 ucontrol->value.integer.value[0] = spec->clfe_swap;
2534 return 0;
2535}
2536
2537static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2538 struct snd_ctl_elem_value *ucontrol)
2539{
2540 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2541 struct sigmatel_spec *spec = codec->spec;
2542 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2543 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2544
68ea7b2f 2545 if (spec->clfe_swap == val)
0fb87bb4
ML		 2546 return 0;
2547
68ea7b2f 2548 spec->clfe_swap = val;
0fb87bb4
ML		 2549
2550 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2551 spec->clfe_swap ? 0x4 : 0x0);
2552
2553 return 1;
2554}
2555
7c2ba97b
MR		 2556#define STAC_CODEC_HP_SWITCH(xname) \
2557 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2558 .name = xname, \
2559 .index = 0, \
2560 .info = stac92xx_hp_switch_info, \
2561 .get = stac92xx_hp_switch_get, \
2562 .put = stac92xx_hp_switch_put, \
2563 }
2564
403d1944
MP		 2565#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2566 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2567 .name = xname, \
2568 .index = 0, \
2569 .info = stac92xx_io_switch_info, \
2570 .get = stac92xx_io_switch_get, \
2571 .put = stac92xx_io_switch_put, \
2572 .private_value = xpval, \
2573 }
2574
0fb87bb4
ML		 2575#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2576 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2577 .name = xname, \
2578 .index = 0, \
2579 .info = stac92xx_clfe_switch_info, \
2580 .get = stac92xx_clfe_switch_get, \
2581 .put = stac92xx_clfe_switch_put, \
2582 .private_value = xpval, \
2583 }
403d1944 2584
c7d4b2fa
M		 2585enum {
2586 STAC_CTL_WIDGET_VOL,
2587 STAC_CTL_WIDGET_MUTE,
09a99959 2588 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2589 STAC_CTL_WIDGET_AMP_MUX,
2590 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2591 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2592 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2593 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2594};
2595
c8b6bf9b 2596static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2597 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2598 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2599 STAC_MONO_MUX,
89385035
MR		 2600 STAC_AMP_MUX,
2601 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2602 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2603 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2604 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2605};
2606
2607/* add dynamic controls */
4d4e9bb3
TI		 2608static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2609 struct snd_kcontrol_new *ktemp,
2610 int idx, const char *name,
2611 unsigned long val)
c7d4b2fa 2612{
c8b6bf9b 2613 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2614
2615 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2616 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2617
2618 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2619 if (! knew)
2620 return -ENOMEM;
2621 if (spec->kctl_alloc) {
2622 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2623 kfree(spec->kctl_alloc);
2624 }
2625 spec->kctl_alloc = knew;
2626 spec->num_kctl_alloc = num;
2627 }
2628
2629 knew = &spec->kctl_alloc[spec->num_kctl_used];
4d4e9bb3 2630 *knew = *ktemp;
4682eee0 2631 knew->index = idx;
82fe0c58 2632 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2633 if (!knew->name)
c7d4b2fa
M		 2634 return -ENOMEM;
2635 knew->private_value = val;
2636 spec->num_kctl_used++;
2637 return 0;
2638}
2639
4d4e9bb3
TI		 2640static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2641 int type, int idx, const char *name,
2642 unsigned long val)
2643{
2644 return stac92xx_add_control_temp(spec,
2645 &stac92xx_control_templates[type],
2646 idx, name, val);
2647}
2648
4682eee0
MR		 2649
2650/* add dynamic controls */
4d4e9bb3
TI		 2651static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2652 const char *name, unsigned long val)
4682eee0
MR		 2653{
2654 return stac92xx_add_control_idx(spec, type, 0, name, val);
2655}
2656
403d1944
MP		 2657/* flag inputs as additional dynamic lineouts */
2658static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2659{
2660 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2661 unsigned int wcaps, wtype;
2662 int i, num_dacs = 0;
2663
2664 /* use the wcaps cache to count all DACs available for line-outs */
2665 for (i = 0; i < codec->num_nodes; i++) {
2666 wcaps = codec->wcaps[i];
2667 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2668
7b043899
SL		 2669 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2670 num_dacs++;
2671 }
403d1944 2672
7b043899
SL		 2673 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2674
403d1944
MP		 2675 switch (cfg->line_outs) {
2676 case 3:
2677 /* add line-in as side */
7b043899 2678 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2679 cfg->line_out_pins[cfg->line_outs] =
2680 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2681 spec->line_switch = 1;
2682 cfg->line_outs++;
2683 }
2684 break;
2685 case 2:
2686 /* add line-in as clfe and mic as side */
7b043899 2687 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2688 cfg->line_out_pins[cfg->line_outs] =
2689 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2690 spec->line_switch = 1;
2691 cfg->line_outs++;
2692 }
7b043899 2693 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2694 cfg->line_out_pins[cfg->line_outs] =
2695 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2696 spec->mic_switch = 1;
2697 cfg->line_outs++;
2698 }
2699 break;
2700 case 1:
2701 /* add line-in as surr and mic as clfe */
7b043899 2702 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2703 cfg->line_out_pins[cfg->line_outs] =
2704 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2705 spec->line_switch = 1;
2706 cfg->line_outs++;
2707 }
7b043899 2708 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2709 cfg->line_out_pins[cfg->line_outs] =
2710 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2711 spec->mic_switch = 1;
2712 cfg->line_outs++;
2713 }
2714 break;
2715 }
2716
2717 return 0;
2718}
2719
7b043899
SL		 2720
2721static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2722{
2723 int i;
2724
2725 for (i = 0; i < spec->multiout.num_dacs; i++) {
2726 if (spec->multiout.dac_nids[i] == nid)
2727 return 1;
2728 }
2729
2730 return 0;
2731}
2732
3cc08dc6 2733/*
7b043899
SL		 2734 * Fill in the dac_nids table from the parsed pin configuration
2735 * This function only works when every pin in line_out_pins[]
2736 * contains atleast one DAC in its connection list. Some 92xx
2737 * codecs are not connected directly to a DAC, such as the 9200
2738 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2739 */
19039bd0 2740static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2741 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2742{
2743 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2744 int i, j, conn_len = 0;
2745 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2746 unsigned int wcaps, wtype;
2747
c7d4b2fa
M		 2748 for (i = 0; i < cfg->line_outs; i++) {
2749 nid = cfg->line_out_pins[i];
7b043899
SL		 2750 conn_len = snd_hda_get_connections(codec, nid, conn,
2751 HDA_MAX_CONNECTIONS);
2752 for (j = 0; j < conn_len; j++) {
2753 wcaps = snd_hda_param_read(codec, conn[j],
2754 AC_PAR_AUDIO_WIDGET_CAP);
2755 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2756 if (wtype != AC_WID_AUD_OUT ||
2757 (wcaps & AC_WCAP_DIGITAL))
2758 continue;
2759 /* conn[j] is a DAC routed to this line-out */
2760 if (!is_in_dac_nids(spec, conn[j]))
2761 break;
2762 }
2763
2764 if (j == conn_len) {
df802952
TI		 2765 if (spec->multiout.num_dacs > 0) {
2766 /* we have already working output pins,
2767 * so let's drop the broken ones again
2768 */
2769 cfg->line_outs = spec->multiout.num_dacs;
2770 break;
2771 }
7b043899
SL		 2772 /* error out, no available DAC found */
2773 snd_printk(KERN_ERR
2774 "%s: No available DAC for pin 0x%x\n",
2775 __func__, nid);
2776 return -ENODEV;
2777 }
2778
2779 spec->multiout.dac_nids[i] = conn[j];
2780 spec->multiout.num_dacs++;
2781 if (conn_len > 1) {
2782 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2783 snd_hda_codec_write_cache(codec, nid, 0,
2784 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2785
7b043899
SL		 2786 }
2787 }
c7d4b2fa 2788
7b043899
SL		 2789 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2790 spec->multiout.num_dacs,
2791 spec->multiout.dac_nids[0],
2792 spec->multiout.dac_nids[1],
2793 spec->multiout.dac_nids[2],
2794 spec->multiout.dac_nids[3],
2795 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2796 return 0;
2797}
2798
eb06ed8f
TI		 2799/* create volume control/switch for the given prefx type */
2800static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2801{
2802 char name[32];
2803 int err;
2804
2805 sprintf(name, "%s Playback Volume", pfx);
2806 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2807 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2808 if (err < 0)
2809 return err;
2810 sprintf(name, "%s Playback Switch", pfx);
2811 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2812 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2813 if (err < 0)
2814 return err;
2815 return 0;
2816}
2817
ae0afd81
MR		 2818static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2819{
2820 if (!spec->multiout.hp_nid)
2821 spec->multiout.hp_nid = nid;
2822 else if (spec->multiout.num_dacs > 4) {
2823 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2824 return 1;
2825 } else {
2826 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2827 spec->multiout.num_dacs++;
2828 }
2829 return 0;
2830}
2831
2832static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2833{
2834 if (is_in_dac_nids(spec, nid))
2835 return 1;
2836 if (spec->multiout.hp_nid == nid)
2837 return 1;
2838 return 0;
2839}
2840
c7d4b2fa 2841/* add playback controls from the parsed DAC table */
0fb87bb4 2842static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2843 const struct auto_pin_cfg *cfg)
c7d4b2fa 2844{
19039bd0
TI		 2845 static const char *chname[4] = {
2846 "Front", "Surround", NULL /*CLFE*/, "Side"
2847 };
d21995e3 2848 hda_nid_t nid = 0;
c7d4b2fa
M		 2849 int i, err;
2850
0fb87bb4 2851 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2852 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2853
2854
40ac8c4f 2855 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2856 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2857 continue;
2858
2859 nid = spec->multiout.dac_nids[i];
2860
2861 if (i == 2) {
2862 /* Center/LFE */
eb06ed8f
TI		 2863 err = create_controls(spec, "Center", nid, 1);
2864 if (err < 0)
c7d4b2fa 2865 return err;
eb06ed8f
TI		 2866 err = create_controls(spec, "LFE", nid, 2);
2867 if (err < 0)
c7d4b2fa 2868 return err;
0fb87bb4
ML		 2869
2870 wid_caps = get_wcaps(codec, nid);
2871
2872 if (wid_caps & AC_WCAP_LR_SWAP) {
2873 err = stac92xx_add_control(spec,
2874 STAC_CTL_WIDGET_CLFE_SWITCH,
2875 "Swap Center/LFE Playback Switch", nid);
2876
2877 if (err < 0)
2878 return err;
2879 }
2880
c7d4b2fa 2881 } else {
eb06ed8f
TI		 2882 err = create_controls(spec, chname[i], nid, 3);
2883 if (err < 0)
c7d4b2fa
M		 2884 return err;
2885 }
2886 }
2887
fedb7569
MR		 2888 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
2889 cfg->hp_outs && !spec->multiout.hp_nid)
2890 spec->multiout.hp_nid = nid;
2891
7c2ba97b
MR		 2892 if (cfg->hp_outs > 1) {
2893 err = stac92xx_add_control(spec,
2894 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 2895 "Headphone as Line Out Switch",
2896 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 2897 if (err < 0)
2898 return err;
2899 }
2900
b5895dc8
MR		 2901 if (spec->line_switch) {
2902 nid = cfg->input_pins[AUTO_PIN_LINE];
2903 pincap = snd_hda_param_read(codec, nid,
2904 AC_PAR_PIN_CAP);
2905 if (pincap & AC_PINCAP_OUT) {
2906 err = stac92xx_add_control(spec,
2907 STAC_CTL_WIDGET_IO_SWITCH,
2908 "Line In as Output Switch", nid << 8);
2909 if (err < 0)
2910 return err;
2911 }
2912 }
403d1944 2913
b5895dc8 2914 if (spec->mic_switch) {
cace16f1 2915 unsigned int def_conf;
ae0afd81
MR		 2916 unsigned int mic_pin = AUTO_PIN_MIC;
2917again:
2918 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2919 def_conf = snd_hda_codec_read(codec, nid, 0,
2920 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2921 /* some laptops have an internal analog microphone
2922 * which can't be used as a output */
2923 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2924 pincap = snd_hda_param_read(codec, nid,
2925 AC_PAR_PIN_CAP);
2926 if (pincap & AC_PINCAP_OUT) {
2927 err = stac92xx_add_control(spec,
2928 STAC_CTL_WIDGET_IO_SWITCH,
2929 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2930 nid = snd_hda_codec_read(codec, nid, 0,
2931 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2932 if (!check_in_dac_nids(spec, nid))
2933 add_spec_dacs(spec, nid);
cace16f1
MR		 2934 if (err < 0)
2935 return err;
2936 }
ae0afd81
MR		 2937 } else if (mic_pin == AUTO_PIN_MIC) {
2938 mic_pin = AUTO_PIN_FRONT_MIC;
2939 goto again;
b5895dc8
MR		 2940 }
2941 }
403d1944 2942
c7d4b2fa
M		 2943 return 0;
2944}
2945
eb06ed8f
TI		 2946/* add playback controls for Speaker and HP outputs */
2947static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2948 struct auto_pin_cfg *cfg)
2949{
2950 struct sigmatel_spec *spec = codec->spec;
2951 hda_nid_t nid;
2952 int i, old_num_dacs, err;
2953
2954 old_num_dacs = spec->multiout.num_dacs;
2955 for (i = 0; i < cfg->hp_outs; i++) {
2956 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2957 if (wid_caps & AC_WCAP_UNSOL_CAP)
2958 spec->hp_detect = 1;
2959 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2960 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2961 if (check_in_dac_nids(spec, nid))
2962 nid = 0;
2963 if (! nid)
c7d4b2fa 2964 continue;
eb06ed8f
TI		 2965 add_spec_dacs(spec, nid);
2966 }
2967 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2968 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2969 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2970 if (check_in_dac_nids(spec, nid))
2971 nid = 0;
eb06ed8f
TI		 2972 if (! nid)
2973 continue;
2974 add_spec_dacs(spec, nid);
c7d4b2fa 2975 }
1b290a51
MR		 2976 for (i = 0; i < cfg->line_outs; i++) {
2977 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2978 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2979 if (check_in_dac_nids(spec, nid))
2980 nid = 0;
2981 if (! nid)
2982 continue;
2983 add_spec_dacs(spec, nid);
2984 }
eb06ed8f
TI		 2985 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2986 static const char *pfxs[] = {
2987 "Speaker", "External Speaker", "Speaker2",
2988 };
2989 err = create_controls(spec, pfxs[i - old_num_dacs],
2990 spec->multiout.dac_nids[i], 3);
2991 if (err < 0)
2992 return err;
2993 }
2994 if (spec->multiout.hp_nid) {
2626a263
TI		 2995 err = create_controls(spec, "Headphone",
2996 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2997 if (err < 0)
2998 return err;
2999 }
c7d4b2fa
M		 3000
3001 return 0;
3002}
3003
b22b4821 3004/* labels for mono mux outputs */
d0513fc6
MR		 3005static const char *stac92xx_mono_labels[4] = {
3006 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3007};
3008
3009/* create mono mux for mono out on capable codecs */
3010static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3011{
3012 struct sigmatel_spec *spec = codec->spec;
3013 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3014 int i, num_cons;
3015 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3016
3017 num_cons = snd_hda_get_connections(codec,
3018 spec->mono_nid,
3019 con_lst,
3020 HDA_MAX_NUM_INPUTS);
3021 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3022 return -EINVAL;
3023
3024 for (i = 0; i < num_cons; i++) {
3025 mono_mux->items[mono_mux->num_items].label =
3026 stac92xx_mono_labels[i];
3027 mono_mux->items[mono_mux->num_items].index = i;
3028 mono_mux->num_items++;
3029 }
09a99959
MR		 3030
3031 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3032 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3033}
3034
89385035
MR		 3035/* labels for amp mux outputs */
3036static const char *stac92xx_amp_labels[3] = {
4b33c767 3037 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3038};
3039
3040/* create amp out controls mux on capable codecs */
3041static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3042{
3043 struct sigmatel_spec *spec = codec->spec;
3044 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3045 int i, err;
3046
2a9c7816 3047 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3048 amp_mux->items[amp_mux->num_items].label =
3049 stac92xx_amp_labels[i];
3050 amp_mux->items[amp_mux->num_items].index = i;
3051 amp_mux->num_items++;
3052 }
3053
2a9c7816
MR		 3054 if (spec->num_amps > 1) {
3055 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3056 "Amp Selector Capture Switch", 0);
3057 if (err < 0)
3058 return err;
3059 }
89385035
MR		 3060 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3061 "Amp Capture Volume",
3062 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3063}
3064
3065
1cd2224c
MR		 3066/* create PC beep volume controls */
3067static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3068 hda_nid_t nid)
3069{
3070 struct sigmatel_spec *spec = codec->spec;
3071 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3072 int err;
3073
3074 /* check for mute support for the the amp */
3075 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3076 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3077 "PC Beep Playback Switch",
3078 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3079 if (err < 0)
3080 return err;
3081 }
3082
3083 /* check to see if there is volume support for the amp */
3084 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3085 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3086 "PC Beep Playback Volume",
3087 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3088 if (err < 0)
3089 return err;
3090 }
3091 return 0;
3092}
3093
4d4e9bb3
TI		 3094#ifdef CONFIG_SND_HDA_INPUT_BEEP
3095#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3096
3097static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3098 struct snd_ctl_elem_value *ucontrol)
3099{
3100 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3101 ucontrol->value.integer.value[0] = codec->beep->enabled;
3102 return 0;
3103}
3104
3105static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3106 struct snd_ctl_elem_value *ucontrol)
3107{
3108 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3109 int enabled = !!ucontrol->value.integer.value[0];
3110 if (codec->beep->enabled != enabled) {
3111 codec->beep->enabled = enabled;
3112 return 1;
3113 }
3114 return 0;
3115}
3116
3117static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3118 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3119 .info = stac92xx_dig_beep_switch_info,
3120 .get = stac92xx_dig_beep_switch_get,
3121 .put = stac92xx_dig_beep_switch_put,
3122};
3123
3124static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3125{
3126 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3127 0, "PC Beep Playback Switch", 0);
3128}
3129#endif
3130
4682eee0
MR		 3131static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3132{
3133 struct sigmatel_spec *spec = codec->spec;
3134 int wcaps, nid, i, err = 0;
3135
3136 for (i = 0; i < spec->num_muxes; i++) {
3137 nid = spec->mux_nids[i];
3138 wcaps = get_wcaps(codec, nid);
3139
3140 if (wcaps & AC_WCAP_OUT_AMP) {
3141 err = stac92xx_add_control_idx(spec,
3142 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3143 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3144 if (err < 0)
3145 return err;
3146 }
3147 }
3148 return 0;
3149};
3150
d9737751 3151static const char *stac92xx_spdif_labels[3] = {
65973632 3152 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3153};
3154
3155static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3156{
3157 struct sigmatel_spec *spec = codec->spec;
3158 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3159 const char **labels = spec->spdif_labels;
d9737751 3160 int i, num_cons;
65973632 3161 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3162
3163 num_cons = snd_hda_get_connections(codec,
3164 spec->smux_nids[0],
3165 con_lst,
3166 HDA_MAX_NUM_INPUTS);
65973632 3167 if (!num_cons)
d9737751
MR		 3168 return -EINVAL;
3169
65973632
MR		 3170 if (!labels)
3171 labels = stac92xx_spdif_labels;
3172
d9737751 3173 for (i = 0; i < num_cons; i++) {
65973632 3174 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3175 spdif_mux->items[spdif_mux->num_items].index = i;
3176 spdif_mux->num_items++;
3177 }
3178
3179 return 0;
3180}
3181
8b65727b 3182/* labels for dmic mux inputs */
ddc2cec4 3183static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3184 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3185 "Digital Mic 3", "Digital Mic 4"
3186};
3187
3188/* create playback/capture controls for input pins on dmic capable codecs */
3189static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3190 const struct auto_pin_cfg *cfg)
3191{
3192 struct sigmatel_spec *spec = codec->spec;
3193 struct hda_input_mux *dimux = &spec->private_dimux;
3194 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3195 int err, i, j;
3196 char name[32];
8b65727b
MP		 3197
3198 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3199 dimux->items[dimux->num_items].index = 0;
3200 dimux->num_items++;
3201
3202 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3203 hda_nid_t nid;
8b65727b
MP		 3204 int index;
3205 int num_cons;
0678accd 3206 unsigned int wcaps;
8b65727b
MP		 3207 unsigned int def_conf;
3208
3209 def_conf = snd_hda_codec_read(codec,
3210 spec->dmic_nids[i],
3211 0,
3212 AC_VERB_GET_CONFIG_DEFAULT,
3213 0);
3214 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3215 continue;
3216
0678accd 3217 nid = spec->dmic_nids[i];
8b65727b 3218 num_cons = snd_hda_get_connections(codec,
e1f0d669 3219 spec->dmux_nids[0],
8b65727b
MP		 3220 con_lst,
3221 HDA_MAX_NUM_INPUTS);
3222 for (j = 0; j < num_cons; j++)
0678accd 3223 if (con_lst[j] == nid) {
8b65727b
MP		 3224 index = j;
3225 goto found;
3226 }
3227 continue;
3228found:
d0513fc6
MR		 3229 wcaps = get_wcaps(codec, nid) &
3230 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3231
d0513fc6 3232 if (wcaps) {
0678accd
MR		 3233 sprintf(name, "%s Capture Volume",
3234 stac92xx_dmic_labels[dimux->num_items]);
3235
3236 err = stac92xx_add_control(spec,
3237 STAC_CTL_WIDGET_VOL,
3238 name,
d0513fc6
MR		 3239 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3240 (wcaps & AC_WCAP_OUT_AMP) ?
3241 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3242 if (err < 0)
3243 return err;
3244 }
3245
8b65727b
MP		 3246 dimux->items[dimux->num_items].label =
3247 stac92xx_dmic_labels[dimux->num_items];
3248 dimux->items[dimux->num_items].index = index;
3249 dimux->num_items++;
3250 }
3251
3252 return 0;
3253}
3254
c7d4b2fa
M		 3255/* create playback/capture controls for input pins */
3256static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3257{
3258 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3259 struct hda_input_mux *imux = &spec->private_imux;
3260 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3261 int i, j, k;
3262
3263 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3264 int index;
3265
3266 if (!cfg->input_pins[i])
3267 continue;
3268 index = -1;
3269 for (j = 0; j < spec->num_muxes; j++) {
3270 int num_cons;
3271 num_cons = snd_hda_get_connections(codec,
3272 spec->mux_nids[j],
3273 con_lst,
3274 HDA_MAX_NUM_INPUTS);
3275 for (k = 0; k < num_cons; k++)
3276 if (con_lst[k] == cfg->input_pins[i]) {
3277 index = k;
3278 goto found;
3279 }
c7d4b2fa 3280 }
314634bc
TI		 3281 continue;
3282 found:
3283 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3284 imux->items[imux->num_items].index = index;
3285 imux->num_items++;
c7d4b2fa
M		 3286 }
3287
7b043899 3288 if (imux->num_items) {
62fe78e9
SR		 3289 /*
3290 * Set the current input for the muxes.
3291 * The STAC9221 has two input muxes with identical source
3292 * NID lists. Hopefully this won't get confused.
3293 */
3294 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3295 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3296 AC_VERB_SET_CONNECT_SEL,
3297 imux->items[0].index);
62fe78e9
SR		 3298 }
3299 }
3300
c7d4b2fa
M		 3301 return 0;
3302}
3303
c7d4b2fa
M		 3304static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3305{
3306 struct sigmatel_spec *spec = codec->spec;
3307 int i;
3308
3309 for (i = 0; i < spec->autocfg.line_outs; i++) {
3310 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3311 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3312 }
3313}
3314
3315static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3316{
3317 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3318 int i;
c7d4b2fa 3319
eb06ed8f
TI		 3320 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3321 hda_nid_t pin;
3322 pin = spec->autocfg.hp_pins[i];
3323 if (pin) /* connect to front */
3324 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3325 }
3326 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3327 hda_nid_t pin;
3328 pin = spec->autocfg.speaker_pins[i];
3329 if (pin) /* connect to front */
3330 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3331 }
c7d4b2fa
M		 3332}
3333
3cc08dc6 3334static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3335{
3336 struct sigmatel_spec *spec = codec->spec;
3337 int err;
bcecd9bd 3338 int hp_speaker_swap = 0;
c7d4b2fa 3339
8b65727b
MP		 3340 if ((err = snd_hda_parse_pin_def_config(codec,
3341 &spec->autocfg,
3342 spec->dmic_nids)) < 0)
c7d4b2fa 3343 return err;
82bc955f 3344 if (! spec->autocfg.line_outs)
869264c4 3345 return 0; /* can't find valid pin config */
19039bd0 3346
bcecd9bd
JZ		 3347 /* If we have no real line-out pin and multiple hp-outs, HPs should
3348 * be set up as multi-channel outputs.
3349 */
3350 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3351 spec->autocfg.hp_outs > 1) {
3352 /* Copy hp_outs to line_outs, backup line_outs in
3353 * speaker_outs so that the following routines can handle
3354 * HP pins as primary outputs.
3355 */
3356 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3357 sizeof(spec->autocfg.line_out_pins));
3358 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3359 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3360 sizeof(spec->autocfg.hp_pins));
3361 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3362 hp_speaker_swap = 1;
3363 }
09a99959 3364 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3365 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3366 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3367 u32 caps = query_amp_caps(codec,
3368 spec->autocfg.mono_out_pin, dir);
3369 hda_nid_t conn_list[1];
3370
3371 /* get the mixer node and then the mono mux if it exists */
3372 if (snd_hda_get_connections(codec,
3373 spec->autocfg.mono_out_pin, conn_list, 1) &&
3374 snd_hda_get_connections(codec, conn_list[0],
3375 conn_list, 1)) {
3376
3377 int wcaps = get_wcaps(codec, conn_list[0]);
3378 int wid_type = (wcaps & AC_WCAP_TYPE)
3379 >> AC_WCAP_TYPE_SHIFT;
3380 /* LR swap check, some stac925x have a mux that
3381 * changes the DACs output path instead of the
3382 * mono-mux path.
3383 */
3384 if (wid_type == AC_WID_AUD_SEL &&
3385 !(wcaps & AC_WCAP_LR_SWAP))
3386 spec->mono_nid = conn_list[0];
3387 }
d0513fc6
MR		 3388 if (dir) {
3389 hda_nid_t nid = spec->autocfg.mono_out_pin;
3390
3391 /* most mono outs have a least a mute/unmute switch */
3392 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3393 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3394 "Mono Playback Switch",
3395 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3396 if (err < 0)
3397 return err;
d0513fc6
MR		 3398 /* check for volume support for the amp */
3399 if ((caps & AC_AMPCAP_NUM_STEPS)
3400 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3401 err = stac92xx_add_control(spec,
3402 STAC_CTL_WIDGET_VOL,
3403 "Mono Playback Volume",
3404 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3405 if (err < 0)
3406 return err;
3407 }
09a99959
MR		 3408 }
3409
3410 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3411 AC_PINCTL_OUT_EN);
3412 }
bcecd9bd 3413
403d1944
MP		 3414 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3415 return err;
19039bd0
TI		 3416 if (spec->multiout.num_dacs == 0)
3417 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3418 return err;
c7d4b2fa 3419
0fb87bb4
ML		 3420 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3421
3422 if (err < 0)
3423 return err;
3424
1cd2224c
MR		 3425 /* setup analog beep controls */
3426 if (spec->anabeep_nid > 0) {
3427 err = stac92xx_auto_create_beep_ctls(codec,
3428 spec->anabeep_nid);
3429 if (err < 0)
3430 return err;
3431 }
3432
3433 /* setup digital beep controls and input device */
3434#ifdef CONFIG_SND_HDA_INPUT_BEEP
3435 if (spec->digbeep_nid > 0) {
3436 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3437 unsigned int caps;
1cd2224c
MR		 3438
3439 err = stac92xx_auto_create_beep_ctls(codec, nid);
3440 if (err < 0)
3441 return err;
3442 err = snd_hda_attach_beep_device(codec, nid);
3443 if (err < 0)
3444 return err;
4d4e9bb3
TI		 3445 /* if no beep switch is available, make its own one */
3446 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3447 if (codec->beep &&
3448 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3449 err = stac92xx_beep_switch_ctl(codec);
3450 if (err < 0)
3451 return err;
3452 }
1cd2224c
MR		 3453 }
3454#endif
3455
bcecd9bd
JZ		 3456 if (hp_speaker_swap == 1) {
3457 /* Restore the hp_outs and line_outs */
3458 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3459 sizeof(spec->autocfg.line_out_pins));
3460 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3461 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3462 sizeof(spec->autocfg.speaker_pins));
3463 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3464 memset(spec->autocfg.speaker_pins, 0,
3465 sizeof(spec->autocfg.speaker_pins));
3466 spec->autocfg.speaker_outs = 0;
3467 }
3468
0fb87bb4
ML		 3469 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3470
3471 if (err < 0)
3472 return err;
3473
3474 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3475
3476 if (err < 0)
c7d4b2fa
M		 3477 return err;
3478
b22b4821
MR		 3479 if (spec->mono_nid > 0) {
3480 err = stac92xx_auto_create_mono_output_ctls(codec);
3481 if (err < 0)
3482 return err;
3483 }
2a9c7816 3484 if (spec->num_amps > 0) {
89385035
MR		 3485 err = stac92xx_auto_create_amp_output_ctls(codec);
3486 if (err < 0)
3487 return err;
3488 }
2a9c7816 3489 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3490 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3491 &spec->autocfg)) < 0)
3492 return err;
4682eee0
MR		 3493 if (spec->num_muxes > 0) {
3494 err = stac92xx_auto_create_mux_input_ctls(codec);
3495 if (err < 0)
3496 return err;
3497 }
d9737751
MR		 3498 if (spec->num_smuxes > 0) {
3499 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3500 if (err < 0)
3501 return err;
3502 }
8b65727b 3503
c7d4b2fa 3504 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3505 if (spec->multiout.max_channels > 2)
c7d4b2fa 3506 spec->surr_switch = 1;
c7d4b2fa 3507
82bc955f 3508 if (spec->autocfg.dig_out_pin)
3cc08dc6 3509 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3510 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3511 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 3512
3513 if (spec->kctl_alloc)
3514 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3515
3516 spec->input_mux = &spec->private_imux;
2a9c7816 3517 spec->dinput_mux = &spec->private_dimux;
d9737751 3518 spec->sinput_mux = &spec->private_smux;
b22b4821 3519 spec->mono_mux = &spec->private_mono_mux;
89385035 3520 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3521 return 1;
3522}
3523
82bc955f
TI		 3524/* add playback controls for HP output */
3525static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3526 struct auto_pin_cfg *cfg)
3527{
3528 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3529 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3530 unsigned int wid_caps;
3531
3532 if (! pin)
3533 return 0;
3534
3535 wid_caps = get_wcaps(codec, pin);
505cb341 3536 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3537 spec->hp_detect = 1;
82bc955f
TI		 3538
3539 return 0;
3540}
3541
160ea0dc
RF		 3542/* add playback controls for LFE output */
3543static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3544 struct auto_pin_cfg *cfg)
3545{
3546 struct sigmatel_spec *spec = codec->spec;
3547 int err;
3548 hda_nid_t lfe_pin = 0x0;
3549 int i;
3550
3551 /*
3552 * search speaker outs and line outs for a mono speaker pin
3553 * with an amp. If one is found, add LFE controls
3554 * for it.
3555 */
3556 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3557 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3558 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3559 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3560 if (wcaps == AC_WCAP_OUT_AMP)
3561 /* found a mono speaker with an amp, must be lfe */
3562 lfe_pin = pin;
3563 }
3564
3565 /* if speaker_outs is 0, then speakers may be in line_outs */
3566 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3567 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3568 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3569 unsigned int defcfg;
8b551785 3570 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3571 AC_VERB_GET_CONFIG_DEFAULT,
3572 0x00);
8b551785 3573 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3574 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3575 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3576 if (wcaps == AC_WCAP_OUT_AMP)
3577 /* found a mono speaker with an amp,
3578 must be lfe */
3579 lfe_pin = pin;
3580 }
3581 }
3582 }
3583
3584 if (lfe_pin) {
eb06ed8f 3585 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3586 if (err < 0)
3587 return err;
3588 }
3589
3590 return 0;
3591}
3592
c7d4b2fa
M		 3593static int stac9200_parse_auto_config(struct hda_codec *codec)
3594{
3595 struct sigmatel_spec *spec = codec->spec;
3596 int err;
3597
df694daa 3598 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3599 return err;
3600
3601 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3602 return err;
3603
82bc955f
TI		 3604 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3605 return err;
3606
160ea0dc
RF		 3607 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3608 return err;
3609
355a0ec4
TI		 3610 if (spec->num_muxes > 0) {
3611 err = stac92xx_auto_create_mux_input_ctls(codec);
3612 if (err < 0)
3613 return err;
3614 }
3615
82bc955f 3616 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3617 spec->multiout.dig_out_nid = 0x05;
82bc955f 3618 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3619 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 3620
3621 if (spec->kctl_alloc)
3622 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3623
3624 spec->input_mux = &spec->private_imux;
8b65727b 3625 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3626
3627 return 1;
3628}
3629
62fe78e9
SR		 3630/*
3631 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3632 * funky external mute control using GPIO pins.
3633 */
3634
76e1ddfb 3635static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3636 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3637{
3638 unsigned int gpiostate, gpiomask, gpiodir;
3639
3640 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3641 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3642 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3643
3644 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3645 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3646 gpiomask |= mask;
62fe78e9
SR		 3647
3648 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3649 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3650 gpiodir |= dir_mask;
62fe78e9 3651
76e1ddfb 3652 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3653 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3654
3655 snd_hda_codec_write(codec, codec->afg, 0,
3656 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3657 snd_hda_codec_read(codec, codec->afg, 0,
3658 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3659
3660 msleep(1);
3661
76e1ddfb
TI		 3662 snd_hda_codec_read(codec, codec->afg, 0,
3663 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3664}
3665
314634bc
TI		 3666static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3667 unsigned int event)
3668{
3669 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3670 snd_hda_codec_write_cache(codec, nid, 0,
3671 AC_VERB_SET_UNSOLICITED_ENABLE,
3672 (AC_USRSP_EN | event));
314634bc
TI		 3673}
3674
a64135a2
MR		 3675static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3676{
3677 int i;
3678 for (i = 0; i < cfg->hp_outs; i++)
3679 if (cfg->hp_pins[i] == nid)
3680 return 1; /* nid is a HP-Out */
3681
3682 return 0; /* nid is not a HP-Out */
3683};
3684
b76c850f
MR		 3685static void stac92xx_power_down(struct hda_codec *codec)
3686{
3687 struct sigmatel_spec *spec = codec->spec;
3688
3689 /* power down inactive DACs */
3690 hda_nid_t *dac;
3691 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3692 if (!is_in_dac_nids(spec, *dac) &&
3693 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3694 snd_hda_codec_write_cache(codec, *dac, 0,
3695 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3696}
3697
c7d4b2fa
M		 3698static int stac92xx_init(struct hda_codec *codec)
3699{
3700 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3701 struct auto_pin_cfg *cfg = &spec->autocfg;
3702 int i;
c7d4b2fa 3703
c7d4b2fa
M		 3704 snd_hda_sequence_write(codec, spec->init);
3705
8daaaa97
MR		 3706 /* power down adcs initially */
3707 if (spec->powerdown_adcs)
3708 for (i = 0; i < spec->num_adcs; i++)
3709 snd_hda_codec_write_cache(codec,
3710 spec->adc_nids[i], 0,
3711 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
82bc955f
TI		 3712 /* set up pins */
3713 if (spec->hp_detect) {
505cb341 3714 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3715 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3716 enable_pin_detect(codec, cfg->hp_pins[i],
3717 STAC_HP_EVENT);
0a07acaf
TI		 3718 /* force to enable the first line-out; the others are set up
3719 * in unsol_event
3720 */
3721 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3722 AC_PINCTL_OUT_EN);
eb995a8c 3723 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3724 /* fake event to set up pins */
3725 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3726 } else {
3727 stac92xx_auto_init_multi_out(codec);
3728 stac92xx_auto_init_hp_out(codec);
3729 }
3730 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3731 hda_nid_t nid = cfg->input_pins[i];
3732 if (nid) {
4f1e6bc3
TI		 3733 unsigned int pinctl;
3734 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3735 /* for mic pins, force to initialize */
3736 pinctl = stac92xx_get_vref(codec, nid);
3737 } else {
3738 pinctl = snd_hda_codec_read(codec, nid, 0,
3739 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3740 /* if PINCTL already set then skip */
3741 if (pinctl & AC_PINCTL_IN_EN)
3742 continue;
3743 }
3744 pinctl |= AC_PINCTL_IN_EN;
c960a03b
TI		 3745 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3746 }
82bc955f 3747 }
a64135a2
MR		 3748 for (i = 0; i < spec->num_dmics; i++)
3749 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3750 AC_PINCTL_IN_EN);
3751 for (i = 0; i < spec->num_pwrs; i++) {
3752 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3753 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3754 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3755 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3756 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3757 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3758 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3759 /* outputs are only ports capable of power management
3760 * any attempts on powering down a input port cause the
3761 * referenced VREF to act quirky.
3762 */
3763 if (pinctl & AC_PINCTL_IN_EN)
3764 continue;
aafc4412
MR		 3765 /* skip any ports that don't have jacks since presence
3766 * detection is useless */
3767 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3768 continue;
a64135a2
MR		 3769 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3770 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3771 }
b76c850f
MR		 3772 if (spec->dac_list)
3773 stac92xx_power_down(codec);
82bc955f
TI		 3774 if (cfg->dig_out_pin)
3775 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3776 AC_PINCTL_OUT_EN);
3777 if (cfg->dig_in_pin)
3778 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3779 AC_PINCTL_IN_EN);
3780
4fe5195c
MR		 3781 stac_gpio_set(codec, spec->gpio_mask,
3782 spec->gpio_dir, spec->gpio_data);
62fe78e9 3783
c7d4b2fa
M		 3784 return 0;
3785}
3786
2f2f4251
M		 3787static void stac92xx_free(struct hda_codec *codec)
3788{
c7d4b2fa
M		 3789 struct sigmatel_spec *spec = codec->spec;
3790 int i;
3791
3792 if (! spec)
3793 return;
3794
3795 if (spec->kctl_alloc) {
3796 for (i = 0; i < spec->num_kctl_used; i++)
3797 kfree(spec->kctl_alloc[i].name);
3798 kfree(spec->kctl_alloc);
3799 }
3800
11b44bbd
RF		 3801 if (spec->bios_pin_configs)
3802 kfree(spec->bios_pin_configs);
3803
c7d4b2fa 3804 kfree(spec);
1cd2224c 3805 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3806}
3807
4e55096e
M		 3808static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3809 unsigned int flag)
3810{
3811 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3812 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3813
f9acba43
TI		 3814 if (pin_ctl & AC_PINCTL_IN_EN) {
3815 /*
3816 * we need to check the current set-up direction of
3817 * shared input pins since they can be switched via
3818 * "xxx as Output" mixer switch
3819 */
3820 struct sigmatel_spec *spec = codec->spec;
3821 struct auto_pin_cfg *cfg = &spec->autocfg;
3822 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3823 spec->line_switch) ||
3824 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3825 spec->mic_switch))
3826 return;
3827 }
3828
7b043899
SL		 3829 /* if setting pin direction bits, clear the current
3830 direction bits first */
3831 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3832 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3833
82beb8fd 3834 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3835 AC_VERB_SET_PIN_WIDGET_CONTROL,
3836 pin_ctl | flag);
3837}
3838
3839static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3840 unsigned int flag)
3841{
3842 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3843 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3844 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3845 AC_VERB_SET_PIN_WIDGET_CONTROL,
3846 pin_ctl & ~flag);
3847}
3848
40c1d308 3849static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3850{
3851 if (!nid)
3852 return 0;
3853 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3854 & (1 << 31)) {
3855 unsigned int pinctl;
3856 pinctl = snd_hda_codec_read(codec, nid, 0,
3857 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3858 if (pinctl & AC_PINCTL_IN_EN)
3859 return 0; /* mic- or line-input */
3860 else
3861 return 1; /* HP-output */
3862 }
314634bc
TI		 3863 return 0;
3864}
3865
d7a89436
TI		 3866/* return non-zero if the hp-pin of the given array index isn't
3867 * a jack-detection target
3868 */
3869static int no_hp_sensing(struct sigmatel_spec *spec, int i)
3870{
3871 struct auto_pin_cfg *cfg = &spec->autocfg;
3872
3873 /* ignore sensing of shared line and mic jacks */
3874 if (spec->line_switch &&
3875 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_LINE])
3876 return 1;
3877 if (spec->mic_switch &&
3878 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_MIC])
3879 return 1;
3880 /* ignore if the pin is set as line-out */
3881 if (cfg->hp_pins[i] == spec->hp_switch)
3882 return 1;
3883 return 0;
3884}
3885
314634bc 3886static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3887{
3888 struct sigmatel_spec *spec = codec->spec;
3889 struct auto_pin_cfg *cfg = &spec->autocfg;
3890 int i, presence;
3891
eb06ed8f 3892 presence = 0;
4fe5195c
MR		 3893 if (spec->gpio_mute)
3894 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3895 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3896
eb06ed8f 3897 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3898 if (presence)
3899 break;
d7a89436
TI		 3900 if (no_hp_sensing(spec, i))
3901 continue;
4fe5195c 3902 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3903 }
4e55096e
M		 3904
3905 if (presence) {
d7a89436 3906 /* disable lineouts */
7c2ba97b 3907 if (spec->hp_switch)
d7a89436
TI		 3908 stac92xx_reset_pinctl(codec, spec->hp_switch,
3909 AC_PINCTL_OUT_EN);
4e55096e
M		 3910 for (i = 0; i < cfg->line_outs; i++)
3911 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3912 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3913 for (i = 0; i < cfg->speaker_outs; i++)
3914 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3915 AC_PINCTL_OUT_EN);
0253fdcd 3916 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 3917 stac_gpio_set(codec, spec->gpio_mask,
3918 spec->gpio_dir, spec->gpio_data &
3919 ~spec->eapd_mask);
4e55096e 3920 } else {
d7a89436 3921 /* enable lineouts */
7c2ba97b 3922 if (spec->hp_switch)
d7a89436
TI		 3923 stac92xx_set_pinctl(codec, spec->hp_switch,
3924 AC_PINCTL_OUT_EN);
4e55096e
M		 3925 for (i = 0; i < cfg->line_outs; i++)
3926 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3927 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3928 for (i = 0; i < cfg->speaker_outs; i++)
3929 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3930 AC_PINCTL_OUT_EN);
0253fdcd 3931 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 3932 stac_gpio_set(codec, spec->gpio_mask,
3933 spec->gpio_dir, spec->gpio_data |
3934 spec->eapd_mask);
4e55096e 3935 }
d7a89436
TI		 3936 /* toggle hp outs */
3937 for (i = 0; i < cfg->hp_outs; i++) {
3938 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
3939 if (no_hp_sensing(spec, i))
3940 continue;
3941 if (presence)
3942 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
3943 else
3944 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
3945 }
4e55096e
M		 3946}
3947
a64135a2
MR		 3948static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3949{
3950 struct sigmatel_spec *spec = codec->spec;
3951 hda_nid_t nid = spec->pwr_nids[idx];
3952 int presence, val;
3953 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3954 & 0x000000ff;
3955 presence = get_hp_pin_presence(codec, nid);
d0513fc6
MR		 3956
3957 /* several codecs have two power down bits */
3958 if (spec->pwr_mapping)
3959 idx = spec->pwr_mapping[idx];
3960 else
3961 idx = 1 << idx;
a64135a2
MR		 3962
3963 if (presence)
3964 val &= ~idx;
3965 else
3966 val |= idx;
3967
3968 /* power down unused output ports */
3969 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3970};
3971
314634bc
TI		 3972static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3973{
a64135a2
MR		 3974 struct sigmatel_spec *spec = codec->spec;
3975 int idx = res >> 26 & 0x0f;
3976
72474be6 3977 switch ((res >> 26) & 0x70) {
314634bc
TI		 3978 case STAC_HP_EVENT:
3979 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3980 /* fallthru */
3981 case STAC_PWR_EVENT:
3982 if (spec->num_pwrs > 0)
3983 stac92xx_pin_sense(codec, idx);
72474be6
MR		 3984 break;
3985 case STAC_VREF_EVENT: {
3986 int data = snd_hda_codec_read(codec, codec->afg, 0,
3987 AC_VERB_GET_GPIO_DATA, 0);
3988 /* toggle VREF state based on GPIOx status */
3989 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
3990 !!(data & (1 << idx)));
3991 break;
3992 }
314634bc
TI		 3993 }
3994}
3995
cb53c626 3996#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3997static int stac92xx_resume(struct hda_codec *codec)
3998{
dc81bed1
TI		 3999 struct sigmatel_spec *spec = codec->spec;
4000
11b44bbd 4001 stac92xx_set_config_regs(codec);
dc81bed1 4002 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 4003 stac_gpio_set(codec, spec->gpio_mask,
4004 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 4005 snd_hda_codec_resume_amp(codec);
4006 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 4007 /* power down inactive DACs */
4008 if (spec->dac_list)
4009 stac92xx_power_down(codec);
dc81bed1
TI		 4010 /* invoke unsolicited event to reset the HP state */
4011 if (spec->hp_detect)
4012 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 4013 return 0;
4014}
4015#endif
4016
2f2f4251
M		 4017static struct hda_codec_ops stac92xx_patch_ops = {
4018 .build_controls = stac92xx_build_controls,
4019 .build_pcms = stac92xx_build_pcms,
4020 .init = stac92xx_init,
4021 .free = stac92xx_free,
4e55096e 4022 .unsol_event = stac92xx_unsol_event,
cb53c626 4023#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4024 .resume = stac92xx_resume,
4025#endif
2f2f4251
M		 4026};
4027
4028static int patch_stac9200(struct hda_codec *codec)
4029{
4030 struct sigmatel_spec *spec;
c7d4b2fa 4031 int err;
2f2f4251 4032
e560d8d8 4033 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4034 if (spec == NULL)
4035 return -ENOMEM;
4036
4037 codec->spec = spec;
a4eed138 4038 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4039 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4040 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4041 stac9200_models,
4042 stac9200_cfg_tbl);
11b44bbd
RF		 4043 if (spec->board_config < 0) {
4044 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4045 err = stac92xx_save_bios_config_regs(codec);
4046 if (err < 0) {
4047 stac92xx_free(codec);
4048 return err;
4049 }
4050 spec->pin_configs = spec->bios_pin_configs;
4051 } else {
403d1944
MP		 4052 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
4053 stac92xx_set_config_regs(codec);
4054 }
2f2f4251
M		 4055
4056 spec->multiout.max_channels = 2;
4057 spec->multiout.num_dacs = 1;
4058 spec->multiout.dac_nids = stac9200_dac_nids;
4059 spec->adc_nids = stac9200_adc_nids;
4060 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4061 spec->num_muxes = 1;
8b65727b 4062 spec->num_dmics = 0;
9e05b7a3 4063 spec->num_adcs = 1;
a64135a2 4064 spec->num_pwrs = 0;
c7d4b2fa 4065
bf277785
TD		 4066 if (spec->board_config == STAC_9200_GATEWAY ||
4067 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4068 spec->init = stac9200_eapd_init;
4069 else
4070 spec->init = stac9200_core_init;
2f2f4251 4071 spec->mixer = stac9200_mixer;
c7d4b2fa 4072
117f257d
TI		 4073 if (spec->board_config == STAC_9200_PANASONIC) {
4074 spec->gpio_mask = spec->gpio_dir = 0x09;
4075 spec->gpio_data = 0x00;
4076 }
4077
c7d4b2fa
M		 4078 err = stac9200_parse_auto_config(codec);
4079 if (err < 0) {
4080 stac92xx_free(codec);
4081 return err;
4082 }
2f2f4251
M		 4083
4084 codec->patch_ops = stac92xx_patch_ops;
4085
4086 return 0;
4087}
4088
8e21c34c
TD		 4089static int patch_stac925x(struct hda_codec *codec)
4090{
4091 struct sigmatel_spec *spec;
4092 int err;
4093
4094 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4095 if (spec == NULL)
4096 return -ENOMEM;
4097
4098 codec->spec = spec;
a4eed138 4099 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 4100 spec->pin_nids = stac925x_pin_nids;
4101 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
4102 stac925x_models,
4103 stac925x_cfg_tbl);
9e507abd 4104 again:
8e21c34c 4105 if (spec->board_config < 0) {
2c11f955
TD		 4106 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
4107 "using BIOS defaults\n");
8e21c34c
TD		 4108 err = stac92xx_save_bios_config_regs(codec);
4109 if (err < 0) {
4110 stac92xx_free(codec);
4111 return err;
4112 }
4113 spec->pin_configs = spec->bios_pin_configs;
4114 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
4115 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
4116 stac92xx_set_config_regs(codec);
4117 }
4118
4119 spec->multiout.max_channels = 2;
4120 spec->multiout.num_dacs = 1;
4121 spec->multiout.dac_nids = stac925x_dac_nids;
4122 spec->adc_nids = stac925x_adc_nids;
4123 spec->mux_nids = stac925x_mux_nids;
4124 spec->num_muxes = 1;
9e05b7a3 4125 spec->num_adcs = 1;
a64135a2 4126 spec->num_pwrs = 0;
2c11f955
TD		 4127 switch (codec->vendor_id) {
4128 case 0x83847632: /* STAC9202 */
4129 case 0x83847633: /* STAC9202D */
4130 case 0x83847636: /* STAC9251 */
4131 case 0x83847637: /* STAC9251D */
f6e9852a 4132 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4133 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4134 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4135 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4136 break;
4137 default:
4138 spec->num_dmics = 0;
4139 break;
4140 }
8e21c34c
TD		 4141
4142 spec->init = stac925x_core_init;
4143 spec->mixer = stac925x_mixer;
4144
4145 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4146 if (!err) {
4147 if (spec->board_config < 0) {
4148 printk(KERN_WARNING "hda_codec: No auto-config is "
4149 "available, default to model=ref\n");
4150 spec->board_config = STAC_925x_REF;
4151 goto again;
4152 }
4153 err = -EINVAL;
4154 }
8e21c34c
TD		 4155 if (err < 0) {
4156 stac92xx_free(codec);
4157 return err;
4158 }
4159
4160 codec->patch_ops = stac92xx_patch_ops;
4161
4162 return 0;
4163}
4164
e1f0d669
MR		 4165static struct hda_input_mux stac92hd73xx_dmux = {
4166 .num_items = 4,
4167 .items = {
4168 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4169 { "Digital Mic 1", 0x09 },
4170 { "Digital Mic 2", 0x0a },
2a9c7816 4171 { "CD", 0x08 },
e1f0d669
MR		 4172 }
4173};
4174
4175static int patch_stac92hd73xx(struct hda_codec *codec)
4176{
4177 struct sigmatel_spec *spec;
4178 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4179 int err = 0;
4180
4181 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4182 if (spec == NULL)
4183 return -ENOMEM;
4184
4185 codec->spec = spec;
e99d32b3 4186 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4187 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4188 spec->pin_nids = stac92hd73xx_pin_nids;
4189 spec->board_config = snd_hda_check_board_config(codec,
4190 STAC_92HD73XX_MODELS,
4191 stac92hd73xx_models,
4192 stac92hd73xx_cfg_tbl);
4193again:
4194 if (spec->board_config < 0) {
4195 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4196 " STAC92HD73XX, using BIOS defaults\n");
4197 err = stac92xx_save_bios_config_regs(codec);
4198 if (err < 0) {
4199 stac92xx_free(codec);
4200 return err;
4201 }
4202 spec->pin_configs = spec->bios_pin_configs;
4203 } else {
4204 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
4205 stac92xx_set_config_regs(codec);
4206 }
4207
4208 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4209 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4210
4211 if (spec->multiout.num_dacs < 0) {
4212 printk(KERN_WARNING "hda_codec: Could not determine "
4213 "number of channels defaulting to DAC count\n");
4214 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4215 }
4216
4217 switch (spec->multiout.num_dacs) {
4218 case 0x3: /* 6 Channel */
4219 spec->mixer = stac92hd73xx_6ch_mixer;
4220 spec->init = stac92hd73xx_6ch_core_init;
4221 break;
4222 case 0x4: /* 8 Channel */
e1f0d669
MR		 4223 spec->mixer = stac92hd73xx_8ch_mixer;
4224 spec->init = stac92hd73xx_8ch_core_init;
4225 break;
4226 case 0x5: /* 10 Channel */
e1f0d669
MR		 4227 spec->mixer = stac92hd73xx_10ch_mixer;
4228 spec->init = stac92hd73xx_10ch_core_init;
4229 };
4230
4231 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4232 spec->aloopback_mask = 0x01;
4233 spec->aloopback_shift = 8;
4234
1cd2224c 4235 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4236 spec->mux_nids = stac92hd73xx_mux_nids;
4237 spec->adc_nids = stac92hd73xx_adc_nids;
4238 spec->dmic_nids = stac92hd73xx_dmic_nids;
4239 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4240 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4241 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4242 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4243
4244 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4245 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4246 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4247 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4248 sizeof(stac92hd73xx_dmux));
4249
a7662640 4250 switch (spec->board_config) {
6b3ab21e 4251 case STAC_DELL_EQ:
d654a660 4252 spec->init = dell_eq_core_init;
6b3ab21e
MR		 4253 /* fallthru */
4254 case STAC_DELL_M6:
2a9c7816 4255 spec->num_smuxes = 0;
2a9c7816
MR		 4256 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4257 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
0253fdcd 4258 spec->eapd_switch = 0;
2a9c7816 4259 spec->num_amps = 1;
6b3ab21e
MR		 4260
4261 if (!spec->init)
4262 spec->init = dell_m6_core_init;
a7662640
MR		 4263 switch (codec->subsystem_id) {
4264 case 0x1028025e: /* Analog Mics */
4265 case 0x1028025f:
4266 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4267 spec->num_dmics = 0;
2a9c7816 4268 spec->private_dimux.num_items = 1;
a7662640 4269 break;
d654a660 4270 case 0x10280271: /* Digital Mics */
a7662640 4271 case 0x10280272:
d654a660
MR		 4272 case 0x10280254:
4273 case 0x10280255:
a7662640
MR		 4274 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4275 spec->num_dmics = 1;
2a9c7816 4276 spec->private_dimux.num_items = 2;
a7662640
MR		 4277 break;
4278 case 0x10280256: /* Both */
4279 case 0x10280057:
4280 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4281 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4282 spec->num_dmics = 1;
2a9c7816 4283 spec->private_dimux.num_items = 2;
a7662640
MR		 4284 break;
4285 }
4286 break;
4287 default:
4288 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4289 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
0253fdcd 4290 spec->eapd_switch = 1;
a7662640 4291 }
b2c4f4d7
MR		 4292 if (spec->board_config > STAC_92HD73XX_REF) {
4293 /* GPIO0 High = Enable EAPD */
4294 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4295 spec->gpio_data = 0x01;
4296 }
2a9c7816 4297 spec->dinput_mux = &spec->private_dimux;
a7662640 4298
a64135a2
MR		 4299 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4300 spec->pwr_nids = stac92hd73xx_pwr_nids;
4301
d9737751 4302 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4303
4304 if (!err) {
4305 if (spec->board_config < 0) {
4306 printk(KERN_WARNING "hda_codec: No auto-config is "
4307 "available, default to model=ref\n");
4308 spec->board_config = STAC_92HD73XX_REF;
4309 goto again;
4310 }
4311 err = -EINVAL;
4312 }
4313
4314 if (err < 0) {
4315 stac92xx_free(codec);
4316 return err;
4317 }
4318
4319 codec->patch_ops = stac92xx_patch_ops;
4320
4321 return 0;
4322}
4323
d0513fc6
MR		 4324static struct hda_input_mux stac92hd83xxx_dmux = {
4325 .num_items = 3,
4326 .items = {
4327 { "Analog Inputs", 0x03 },
4328 { "Digital Mic 1", 0x04 },
4329 { "Digital Mic 2", 0x05 },
4330 }
4331};
4332
4333static int patch_stac92hd83xxx(struct hda_codec *codec)
4334{
4335 struct sigmatel_spec *spec;
4336 int err;
4337
4338 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4339 if (spec == NULL)
4340 return -ENOMEM;
4341
4342 codec->spec = spec;
0ffa9807 4343 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4344 spec->mono_nid = 0x19;
4345 spec->digbeep_nid = 0x21;
4346 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4347 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4348 spec->adc_nids = stac92hd83xxx_adc_nids;
4349 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4350 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4351 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4352 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4353
4354 spec->init = stac92hd83xxx_core_init;
4355 switch (codec->vendor_id) {
4356 case 0x111d7605:
4357 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4358 break;
4359 default:
4360 spec->num_pwrs--;
4361 spec->init++; /* switch to config #2 */
4362 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4363 }
4364
4365 spec->mixer = stac92hd83xxx_mixer;
4366 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4367 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4368 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4369 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4370 spec->dinput_mux = &stac92hd83xxx_dmux;
4371 spec->pin_nids = stac92hd83xxx_pin_nids;
4372 spec->board_config = snd_hda_check_board_config(codec,
4373 STAC_92HD83XXX_MODELS,
4374 stac92hd83xxx_models,
4375 stac92hd83xxx_cfg_tbl);
4376again:
4377 if (spec->board_config < 0) {
4378 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4379 " STAC92HD83XXX, using BIOS defaults\n");
4380 err = stac92xx_save_bios_config_regs(codec);
4381 if (err < 0) {
4382 stac92xx_free(codec);
4383 return err;
4384 }
4385 spec->pin_configs = spec->bios_pin_configs;
4386 } else {
4387 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
4388 stac92xx_set_config_regs(codec);
4389 }
4390
4391 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4392 if (!err) {
4393 if (spec->board_config < 0) {
4394 printk(KERN_WARNING "hda_codec: No auto-config is "
4395 "available, default to model=ref\n");
4396 spec->board_config = STAC_92HD83XXX_REF;
4397 goto again;
4398 }
4399 err = -EINVAL;
4400 }
4401
4402 if (err < 0) {
4403 stac92xx_free(codec);
4404 return err;
4405 }
4406
4407 codec->patch_ops = stac92xx_patch_ops;
4408
4409 return 0;
4410}
4411
8daaaa97
MR		 4412#ifdef SND_HDA_NEEDS_RESUME
4413static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4414{
4415 struct sigmatel_spec *spec = codec->spec;
4416 int i;
4417 snd_hda_codec_write_cache(codec, codec->afg, 0,
4418 AC_VERB_SET_POWER_STATE, pwr);
4419
4420 msleep(1);
4421 for (i = 0; i < spec->num_adcs; i++) {
4422 snd_hda_codec_write_cache(codec,
4423 spec->adc_nids[i], 0,
4424 AC_VERB_SET_POWER_STATE, pwr);
4425 }
4426};
4427
4428static int stac92hd71xx_resume(struct hda_codec *codec)
4429{
4430 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4431 return stac92xx_resume(codec);
4432}
4433
4434static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4435{
0253fdcd
MR		 4436 struct sigmatel_spec *spec = codec->spec;
4437
8daaaa97 4438 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
0253fdcd
MR		 4439 if (spec->eapd_mask)
4440 stac_gpio_set(codec, spec->gpio_mask,
4441 spec->gpio_dir, spec->gpio_data &
4442 ~spec->eapd_mask);
8daaaa97
MR		 4443 return 0;
4444};
4445
4446#endif
4447
4448static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4449 .build_controls = stac92xx_build_controls,
4450 .build_pcms = stac92xx_build_pcms,
4451 .init = stac92xx_init,
4452 .free = stac92xx_free,
4453 .unsol_event = stac92xx_unsol_event,
4454#ifdef SND_HDA_NEEDS_RESUME
4455 .resume = stac92hd71xx_resume,
4456 .suspend = stac92hd71xx_suspend,
4457#endif
4458};
d0513fc6 4459
4b33c767
MR		 4460static struct hda_input_mux stac92hd71bxx_dmux = {
4461 .num_items = 4,
4462 .items = {
4463 { "Analog Inputs", 0x00 },
4464 { "Mixer", 0x01 },
4465 { "Digital Mic 1", 0x02 },
4466 { "Digital Mic 2", 0x03 },
4467 }
4468};
4469
e035b841
MR		 4470static int patch_stac92hd71bxx(struct hda_codec *codec)
4471{
4472 struct sigmatel_spec *spec;
4473 int err = 0;
4474
4475 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4476 if (spec == NULL)
4477 return -ENOMEM;
4478
4479 codec->spec = spec;
8daaaa97 4480 codec->patch_ops = stac92xx_patch_ops;
e035b841 4481 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4482 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4483 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4484 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4485 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4486 spec->board_config = snd_hda_check_board_config(codec,
4487 STAC_92HD71BXX_MODELS,
4488 stac92hd71bxx_models,
4489 stac92hd71bxx_cfg_tbl);
4490again:
4491 if (spec->board_config < 0) {
4492 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4493 " STAC92HD71BXX, using BIOS defaults\n");
4494 err = stac92xx_save_bios_config_regs(codec);
4495 if (err < 0) {
4496 stac92xx_free(codec);
4497 return err;
4498 }
4499 spec->pin_configs = spec->bios_pin_configs;
4500 } else {
4501 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
4502 stac92xx_set_config_regs(codec);
4503 }
4504
41c3b648
TI		 4505 if (spec->board_config > STAC_92HD71BXX_REF) {
4506 /* GPIO0 = EAPD */
4507 spec->gpio_mask = 0x01;
4508 spec->gpio_dir = 0x01;
4509 spec->gpio_data = 0x01;
4510 }
4511
541eee87
MR		 4512 switch (codec->vendor_id) {
4513 case 0x111d76b6: /* 4 Port without Analog Mixer */
4514 case 0x111d76b7:
4515 case 0x111d76b4: /* 6 Port without Analog Mixer */
4516 case 0x111d76b5:
4517 spec->mixer = stac92hd71bxx_mixer;
4518 spec->init = stac92hd71bxx_core_init;
0ffa9807 4519 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4520 break;
aafc4412 4521 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4522 switch (spec->board_config) {
4523 case STAC_HP_M4:
72474be6 4524 /* Enable VREF power saving on GPIO1 detect */
c5d08bb5 4525 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4526 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4527 snd_hda_codec_write_cache(codec, codec->afg, 0,
4528 AC_VERB_SET_UNSOLICITED_ENABLE,
4529 (AC_USRSP_EN | STAC_VREF_EVENT | 0x01));
4530 spec->gpio_mask |= 0x02;
4531 break;
4532 }
8daaaa97
MR		 4533 if ((codec->revision_id & 0xf) == 0 ||
4534 (codec->revision_id & 0xf) == 1) {
4535#ifdef SND_HDA_NEEDS_RESUME
4536 codec->patch_ops = stac92hd71bxx_patch_ops;
4537#endif
4538 spec->stream_delay = 40; /* 40 milliseconds */
4539 }
4540
aafc4412
MR		 4541 /* no output amps */
4542 spec->num_pwrs = 0;
4543 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4544 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4545
4546 /* disable VSW */
4547 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
4548 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
4549 break;
4550 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4551 if ((codec->revision_id & 0xf) == 1) {
4552#ifdef SND_HDA_NEEDS_RESUME
4553 codec->patch_ops = stac92hd71bxx_patch_ops;
4554#endif
4555 spec->stream_delay = 40; /* 40 milliseconds */
4556 }
4557
aafc4412
MR		 4558 /* no output amps */
4559 spec->num_pwrs = 0;
4560 /* fallthru */
541eee87 4561 default:
4b33c767 4562 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4563 spec->mixer = stac92hd71bxx_analog_mixer;
4564 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4565 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4566 }
4567
4b33c767 4568 spec->aloopback_mask = 0x50;
541eee87
MR		 4569 spec->aloopback_shift = 0;
4570
8daaaa97 4571 spec->powerdown_adcs = 1;
1cd2224c 4572 spec->digbeep_nid = 0x26;
e035b841
MR		 4573 spec->mux_nids = stac92hd71bxx_mux_nids;
4574 spec->adc_nids = stac92hd71bxx_adc_nids;
4575 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4576 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4577 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4578 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4579
4580 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4581 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4582
6a14f585
MR		 4583 switch (spec->board_config) {
4584 case STAC_HP_M4:
6a14f585 4585 /* enable internal microphone */
b9aea715
MR		 4586 stac92xx_set_config_reg(codec, 0x0e, 0x01813040);
4587 stac92xx_auto_set_pinctl(codec, 0x0e,
4588 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4589 /* fallthru */
4590 case STAC_DELL_M4_2:
4591 spec->num_dmics = 0;
4592 spec->num_smuxes = 0;
4593 spec->num_dmuxes = 0;
4594 break;
4595 case STAC_DELL_M4_1:
4596 case STAC_DELL_M4_3:
4597 spec->num_dmics = 1;
4598 spec->num_smuxes = 0;
4599 spec->num_dmuxes = 0;
6a14f585
MR		 4600 break;
4601 default:
4602 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4603 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4604 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4605 };
4606
aea7bb0a 4607 spec->multiout.num_dacs = 1;
e035b841
MR		 4608 spec->multiout.hp_nid = 0x11;
4609 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4b33c767
MR		 4610 if (spec->dinput_mux)
4611 spec->private_dimux.num_items +=
4612 spec->num_dmics -
4613 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4614
4615 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4616 if (!err) {
4617 if (spec->board_config < 0) {
4618 printk(KERN_WARNING "hda_codec: No auto-config is "
4619 "available, default to model=ref\n");
4620 spec->board_config = STAC_92HD71BXX_REF;
4621 goto again;
4622 }
4623 err = -EINVAL;
4624 }
4625
4626 if (err < 0) {
4627 stac92xx_free(codec);
4628 return err;
4629 }
4630
e035b841
MR		 4631 return 0;
4632};
4633
2f2f4251
M		 4634static int patch_stac922x(struct hda_codec *codec)
4635{
4636 struct sigmatel_spec *spec;
c7d4b2fa 4637 int err;
2f2f4251 4638
e560d8d8 4639 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4640 if (spec == NULL)
4641 return -ENOMEM;
4642
4643 codec->spec = spec;
a4eed138 4644 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4645 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4646 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4647 stac922x_models,
4648 stac922x_cfg_tbl);
536319af 4649 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4650 spec->gpio_mask = spec->gpio_dir = 0x03;
4651 spec->gpio_data = 0x03;
3fc24d85
TI		 4652 /* Intel Macs have all same PCI SSID, so we need to check
4653 * codec SSID to distinguish the exact models
4654 */
6f0778d8 4655 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4656 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4657
4658 case 0x106b0800:
4659 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4660 break;
5d5d3bc3
IZ		 4661 case 0x106b0600:
4662 case 0x106b0700:
4663 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4664 break;
5d5d3bc3
IZ		 4665 case 0x106b0e00:
4666 case 0x106b0f00:
4667 case 0x106b1600:
4668 case 0x106b1700:
4669 case 0x106b0200:
4670 case 0x106b1e00:
4671 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4672 break;
5d5d3bc3
IZ		 4673 case 0x106b1a00:
4674 case 0x00000100:
4675 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4676 break;
5d5d3bc3
IZ		 4677 case 0x106b0a00:
4678 case 0x106b2200:
4679 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4680 break;
536319af
NB		 4681 default:
4682 spec->board_config = STAC_INTEL_MAC_V3;
4683 break;
3fc24d85
TI		 4684 }
4685 }
4686
9e507abd 4687 again:
11b44bbd
RF		 4688 if (spec->board_config < 0) {
4689 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4690 "using BIOS defaults\n");
4691 err = stac92xx_save_bios_config_regs(codec);
4692 if (err < 0) {
4693 stac92xx_free(codec);
4694 return err;
4695 }
4696 spec->pin_configs = spec->bios_pin_configs;
4697 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4698 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4699 stac92xx_set_config_regs(codec);
4700 }
2f2f4251 4701
c7d4b2fa
M		 4702 spec->adc_nids = stac922x_adc_nids;
4703 spec->mux_nids = stac922x_mux_nids;
2549413e 4704 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4705 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4706 spec->num_dmics = 0;
a64135a2 4707 spec->num_pwrs = 0;
c7d4b2fa
M		 4708
4709 spec->init = stac922x_core_init;
2f2f4251 4710 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4711
4712 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4713
3cc08dc6 4714 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4715 if (!err) {
4716 if (spec->board_config < 0) {
4717 printk(KERN_WARNING "hda_codec: No auto-config is "
4718 "available, default to model=ref\n");
4719 spec->board_config = STAC_D945_REF;
4720 goto again;
4721 }
4722 err = -EINVAL;
4723 }
3cc08dc6
MP		 4724 if (err < 0) {
4725 stac92xx_free(codec);
4726 return err;
4727 }
4728
4729 codec->patch_ops = stac92xx_patch_ops;
4730
807a4636
TI		 4731 /* Fix Mux capture level; max to 2 */
4732 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4733 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4734 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4735 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4736 (0 << AC_AMPCAP_MUTE_SHIFT));
4737
3cc08dc6
MP		 4738 return 0;
4739}
4740
4741static int patch_stac927x(struct hda_codec *codec)
4742{
4743 struct sigmatel_spec *spec;
4744 int err;
4745
4746 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4747 if (spec == NULL)
4748 return -ENOMEM;
4749
4750 codec->spec = spec;
a4eed138 4751 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4752 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4753 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4754 stac927x_models,
4755 stac927x_cfg_tbl);
9e507abd 4756 again:
8e9068b1
MR		 4757 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4758 if (spec->board_config < 0)
4759 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4760 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4761 err = stac92xx_save_bios_config_regs(codec);
4762 if (err < 0) {
4763 stac92xx_free(codec);
4764 return err;
4765 }
4766 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4767 } else {
3cc08dc6
MP		 4768 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4769 stac92xx_set_config_regs(codec);
4770 }
4771
1cd2224c 4772 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4773 spec->adc_nids = stac927x_adc_nids;
4774 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4775 spec->mux_nids = stac927x_mux_nids;
4776 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4777 spec->smux_nids = stac927x_smux_nids;
4778 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 4779 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 4780 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4781 spec->multiout.dac_nids = spec->dac_nids;
4782
81d3dbde 4783 switch (spec->board_config) {
93ed1503 4784 case STAC_D965_3ST:
93ed1503 4785 case STAC_D965_5ST:
8e9068b1 4786 /* GPIO0 High = Enable EAPD */
0fc9dec4 4787 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4788 spec->gpio_data = 0x01;
8e9068b1
MR		 4789 spec->num_dmics = 0;
4790
93ed1503 4791 spec->init = d965_core_init;
9e05b7a3 4792 spec->mixer = stac927x_mixer;
81d3dbde 4793 break;
8e9068b1 4794 case STAC_DELL_BIOS:
780c8be4
MR		 4795 switch (codec->subsystem_id) {
4796 case 0x10280209:
4797 case 0x1028022e:
4798 /* correct the device field to SPDIF out */
4799 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4800 break;
4801 };
03d7ca17
MR		 4802 /* configure the analog microphone on some laptops */
4803 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4804 /* correct the front output jack as a hp out */
7989fba9 4805 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4806 /* correct the front input jack as a mic */
4807 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4808 /* fallthru */
8e9068b1
MR		 4809 case STAC_DELL_3ST:
4810 /* GPIO2 High = Enable EAPD */
0fc9dec4 4811 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4812 spec->gpio_data = 0x04;
7f16859a
MR		 4813 spec->dmic_nids = stac927x_dmic_nids;
4814 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4815
8e9068b1
MR		 4816 spec->init = d965_core_init;
4817 spec->mixer = stac927x_mixer;
4818 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4819 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4820 break;
4821 default:
b2c4f4d7
MR		 4822 if (spec->board_config > STAC_D965_REF) {
4823 /* GPIO0 High = Enable EAPD */
4824 spec->eapd_mask = spec->gpio_mask = 0x01;
4825 spec->gpio_dir = spec->gpio_data = 0x01;
4826 }
8e9068b1
MR		 4827 spec->num_dmics = 0;
4828
4829 spec->init = stac927x_core_init;
4830 spec->mixer = stac927x_mixer;
7f16859a
MR		 4831 }
4832
a64135a2 4833 spec->num_pwrs = 0;
e1f0d669
MR		 4834 spec->aloopback_mask = 0x40;
4835 spec->aloopback_shift = 0;
0253fdcd 4836 spec->eapd_switch = 1;
8e9068b1 4837
3cc08dc6 4838 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4839 if (!err) {
4840 if (spec->board_config < 0) {
4841 printk(KERN_WARNING "hda_codec: No auto-config is "
4842 "available, default to model=ref\n");
4843 spec->board_config = STAC_D965_REF;
4844 goto again;
4845 }
4846 err = -EINVAL;
4847 }
c7d4b2fa
M		 4848 if (err < 0) {
4849 stac92xx_free(codec);
4850 return err;
4851 }
2f2f4251
M		 4852
4853 codec->patch_ops = stac92xx_patch_ops;
4854
52987656
TI		 4855 /*
4856 * !!FIXME!!
4857 * The STAC927x seem to require fairly long delays for certain
4858 * command sequences. With too short delays (even if the answer
4859 * is set to RIRB properly), it results in the silence output
4860 * on some hardwares like Dell.
4861 *
4862 * The below flag enables the longer delay (see get_response
4863 * in hda_intel.c).
4864 */
4865 codec->bus->needs_damn_long_delay = 1;
4866
2f2f4251
M		 4867 return 0;
4868}
4869
f3302a59
MP		 4870static int patch_stac9205(struct hda_codec *codec)
4871{
4872 struct sigmatel_spec *spec;
8259980e 4873 int err;
f3302a59
MP		 4874
4875 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4876 if (spec == NULL)
4877 return -ENOMEM;
4878
4879 codec->spec = spec;
a4eed138 4880 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4881 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4882 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4883 stac9205_models,
4884 stac9205_cfg_tbl);
9e507abd 4885 again:
11b44bbd
RF		 4886 if (spec->board_config < 0) {
4887 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4888 err = stac92xx_save_bios_config_regs(codec);
4889 if (err < 0) {
4890 stac92xx_free(codec);
4891 return err;
4892 }
4893 spec->pin_configs = spec->bios_pin_configs;
4894 } else {
f3302a59
MP		 4895 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4896 stac92xx_set_config_regs(codec);
4897 }
4898
1cd2224c 4899 spec->digbeep_nid = 0x23;
f3302a59 4900 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4901 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4902 spec->mux_nids = stac9205_mux_nids;
2549413e 4903 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 4904 spec->smux_nids = stac9205_smux_nids;
4905 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 4906 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4907 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4908 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4909 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4910 spec->num_pwrs = 0;
f3302a59
MP		 4911
4912 spec->init = stac9205_core_init;
4913 spec->mixer = stac9205_mixer;
4914
e1f0d669
MR		 4915 spec->aloopback_mask = 0x40;
4916 spec->aloopback_shift = 0;
0253fdcd 4917 spec->eapd_switch = 1;
f3302a59 4918 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4919
ae0a8ed8 4920 switch (spec->board_config){
ae0a8ed8 4921 case STAC_9205_DELL_M43:
87d48363
MR		 4922 /* Enable SPDIF in/out */
4923 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4924 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4925
4fe5195c 4926 /* Enable unsol response for GPIO4/Dock HP connection */
c5d08bb5 4927 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 4928 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4929 snd_hda_codec_write_cache(codec, codec->afg, 0,
4930 AC_VERB_SET_UNSOLICITED_ENABLE,
4931 (AC_USRSP_EN | STAC_HP_EVENT));
4932
4933 spec->gpio_dir = 0x0b;
0fc9dec4 4934 spec->eapd_mask = 0x01;
4fe5195c
MR		 4935 spec->gpio_mask = 0x1b;
4936 spec->gpio_mute = 0x10;
e2e7d624 4937 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4938 * GPIO3 Low = DRM
87d48363 4939 */
4fe5195c 4940 spec->gpio_data = 0x01;
ae0a8ed8 4941 break;
b2c4f4d7
MR		 4942 case STAC_9205_REF:
4943 /* SPDIF-In enabled */
4944 break;
ae0a8ed8
TD		 4945 default:
4946 /* GPIO0 High = EAPD */
0fc9dec4 4947 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4948 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4949 break;
4950 }
33382403 4951
f3302a59 4952 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 4953 if (!err) {
4954 if (spec->board_config < 0) {
4955 printk(KERN_WARNING "hda_codec: No auto-config is "
4956 "available, default to model=ref\n");
4957 spec->board_config = STAC_9205_REF;
4958 goto again;
4959 }
4960 err = -EINVAL;
4961 }
f3302a59
MP		 4962 if (err < 0) {
4963 stac92xx_free(codec);
4964 return err;
4965 }
4966
4967 codec->patch_ops = stac92xx_patch_ops;
4968
4969 return 0;
4970}
4971
db064e50 4972/*
6d859065 4973 * STAC9872 hack
db064e50
TI		 4974 */
4975
99ccc560 4976/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 4977static hda_nid_t vaio_dacs[] = { 0x2 };
4978#define VAIO_HP_DAC 0x5
4979static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
4980static hda_nid_t vaio_mux_nids[] = { 0x15 };
4981
4982static struct hda_input_mux vaio_mux = {
a3a2f429 4983 .num_items = 3,
db064e50 4984 .items = {
d773781c 4985 /* { "HP", 0x0 }, */
1624cb9a
TI		 4986 { "Mic Jack", 0x1 },
4987 { "Internal Mic", 0x2 },
db064e50
TI		 4988 { "PCM", 0x3 },
4989 }
4990};
4991
4992static struct hda_verb vaio_init[] = {
4993 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 4994 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 4995 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4996 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4997 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4998 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4999 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 5000 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5001 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5002 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5003 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5004 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5005 {}
5006};
5007
6d859065
GM		 5008static struct hda_verb vaio_ar_init[] = {
5009 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5010 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5011 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5012 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5013/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5014 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5015 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5016 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5017 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5018/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5019 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5020 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5021 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5022 {}
5023};
5024
db064e50 5025/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 5026static struct hda_bind_ctls vaio_bind_master_vol = {
5027 .ops = &snd_hda_bind_vol,
5028 .values = {
5029 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
5030 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
5031 0
5032 },
5033};
db064e50
TI		 5034
5035/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 5036static struct hda_bind_ctls vaio_bind_master_sw = {
5037 .ops = &snd_hda_bind_sw,
5038 .values = {
5039 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
5040 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
5041 0,
5042 },
5043};
db064e50
TI		 5044
5045static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 5046 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
5047 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 5048 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5049 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5050 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5051 {
5052 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5053 .name = "Capture Source",
5054 .count = 1,
5055 .info = stac92xx_mux_enum_info,
5056 .get = stac92xx_mux_enum_get,
5057 .put = stac92xx_mux_enum_put,
5058 },
5059 {}
5060};
5061
6d859065 5062static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 5063 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
5064 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 5065 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5066 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5067 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5068 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5069 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5070 {
5071 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5072 .name = "Capture Source",
5073 .count = 1,
5074 .info = stac92xx_mux_enum_info,
5075 .get = stac92xx_mux_enum_get,
5076 .put = stac92xx_mux_enum_put,
5077 },
5078 {}
5079};
5080
5081static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5082 .build_controls = stac92xx_build_controls,
5083 .build_pcms = stac92xx_build_pcms,
5084 .init = stac92xx_init,
5085 .free = stac92xx_free,
cb53c626 5086#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5087 .resume = stac92xx_resume,
5088#endif
5089};
5090
72e7b0dd
TI		 5091static int stac9872_vaio_init(struct hda_codec *codec)
5092{
5093 int err;
5094
5095 err = stac92xx_init(codec);
5096 if (err < 0)
5097 return err;
5098 if (codec->patch_ops.unsol_event)
5099 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5100 return 0;
5101}
5102
5103static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5104{
40c1d308 5105 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5106 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5107 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5108 } else {
5109 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5110 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5111 }
5112}
5113
5114static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5115{
5116 switch (res >> 26) {
5117 case STAC_HP_EVENT:
5118 stac9872_vaio_hp_detect(codec, res);
5119 break;
5120 }
5121}
5122
5123static struct hda_codec_ops stac9872_vaio_patch_ops = {
5124 .build_controls = stac92xx_build_controls,
5125 .build_pcms = stac92xx_build_pcms,
5126 .init = stac9872_vaio_init,
5127 .free = stac92xx_free,
5128 .unsol_event = stac9872_vaio_unsol_event,
5129#ifdef CONFIG_PM
5130 .resume = stac92xx_resume,
5131#endif
5132};
5133
6d859065
GM		 5134enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5135 CXD9872RD_VAIO,
5136 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5137 STAC9872AK_VAIO,
5138 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5139 STAC9872K_VAIO,
5140 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5141 CXD9872AKD_VAIO,
5142 STAC_9872_MODELS,
5143};
5144
5145static const char *stac9872_models[STAC_9872_MODELS] = {
5146 [CXD9872RD_VAIO] = "vaio",
5147 [CXD9872AKD_VAIO] = "vaio-ar",
5148};
5149
5150static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5151 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5152 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5153 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5154 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5155 {}
5156};
5157
6d859065 5158static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5159{
5160 struct sigmatel_spec *spec;
5161 int board_config;
5162
f5fcc13c
TI		 5163 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5164 stac9872_models,
5165 stac9872_cfg_tbl);
db064e50
TI		 5166 if (board_config < 0)
5167 /* unknown config, let generic-parser do its job... */
5168 return snd_hda_parse_generic_codec(codec);
5169
5170 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5171 if (spec == NULL)
5172 return -ENOMEM;
5173
5174 codec->spec = spec;
5175 switch (board_config) {
6d859065
GM		 5176 case CXD9872RD_VAIO:
5177 case STAC9872AK_VAIO:
5178 case STAC9872K_VAIO:
db064e50
TI		 5179 spec->mixer = vaio_mixer;
5180 spec->init = vaio_init;
5181 spec->multiout.max_channels = 2;
5182 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5183 spec->multiout.dac_nids = vaio_dacs;
5184 spec->multiout.hp_nid = VAIO_HP_DAC;
5185 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5186 spec->adc_nids = vaio_adcs;
a64135a2 5187 spec->num_pwrs = 0;
db064e50
TI		 5188 spec->input_mux = &vaio_mux;
5189 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5190 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5191 break;
6d859065
GM		 5192
5193 case CXD9872AKD_VAIO:
5194 spec->mixer = vaio_ar_mixer;
5195 spec->init = vaio_ar_init;
5196 spec->multiout.max_channels = 2;
5197 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5198 spec->multiout.dac_nids = vaio_dacs;
5199 spec->multiout.hp_nid = VAIO_HP_DAC;
5200 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5201 spec->num_pwrs = 0;
6d859065
GM		 5202 spec->adc_nids = vaio_adcs;
5203 spec->input_mux = &vaio_mux;
5204 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5205 codec->patch_ops = stac9872_patch_ops;
6d859065 5206 break;
db064e50
TI		 5207 }
5208
db064e50
TI		 5209 return 0;
5210}
5211
5212
2f2f4251
M		 5213/*
5214 * patch entries
5215 */
5216struct hda_codec_preset snd_hda_preset_sigmatel[] = {
5217 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5218 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5219 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5220 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5221 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5222 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5223 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5224 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5225 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5226 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5227 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5228 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5229 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5230 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5231 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5232 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5233 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5234 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5235 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5236 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5237 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5238 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5239 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5240 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5241 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5242 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5243 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5244 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5245 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5246 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5247 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5248 /* The following does not take into account .id=0x83847661 when subsys =
5249 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5250 * currently not fully supported.
5251 */
5252 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5253 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5254 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5255 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5256 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5257 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5258 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5259 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5260 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5261 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5262 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5263 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5264 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5265 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5266 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5267 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5268 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5269 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5270 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5271 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5272 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5273 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5274 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5275 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5276 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5277 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5278 {} /* terminator */
5279};
Clone of davem's net-next-2.6 tree